; -------------------------------------------------------------------------------- ; @Title: RA8M1 On-Chip Peripherals ; @Props: Released ; @Author: KRZ ; @Changelog: 2023-12-12 KRZ ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Doc: Generated (TRACE32, build: 165142.), based on: ; R7FA8M1AH.svd (Ver. 1.2) ; @Core: Cortex-M85 ; @Chip: R7FA8M1AFECFP, R7FA8M1AFECFB, R7FA8M1AFECFC, R7FA8M1AFECBD, ; R7FA8M1AHECFP, R7FA8M1AHECFB, R7FA8M1AHECFC, R7FA8M1AHECBD ; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perra8m1.per 17224 2023-12-14 14:12:27Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 tree "Core Registers (Cortex-M85)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x13 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 27. " DISCRITAXIRUW ,Disable critical AXI read under write" "No,Yes" bitfld.long 0x00 15. " DISCRITAXIRUR ,Disable critical AXI read-under-read" "No,Yes" bitfld.long 0x00 14. " EVENTBUSEN ,Enable EVENTBUS output" "Disabled,Enabled" newline bitfld.long 0x00 13. " EVENTBUSEN_S ,Enable Secure-only EVENTBUSEN" "Disabled,Enabled" bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes" bitfld.long 0x00 11. " DISNWAMODE ,Disable no write allocate mode" "No,Yes" newline bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes" line.long 0x04 "CPPWR,Coprocessor Power Control Register" bitfld.long 0x04 23. " SUS11 ,State unknown secure only" "Both states,Secure only" bitfld.long 0x04 22. " SU11 ,State UNKNOWN 11" "Not permitted,Permitted" bitfld.long 0x04 21. " SUS10 ,State unknown secure only" "Both states,Secure only" newline bitfld.long 0x04 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x04 15. " SUS7 ,State unknown secure only" "Both states,Secure only" bitfld.long 0x04 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted" newline bitfld.long 0x04 13. " SUS6 ,State unknown secure only" "Both states,Secure only" bitfld.long 0x04 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x04 11. " SUS5 ,State unknown secure only" "Both states,Secure only" newline bitfld.long 0x04 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x04 9. " SUS4 ,State unknown secure only" "Both states,Secure only" bitfld.long 0x04 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted" newline bitfld.long 0x04 7. " SUS3 ,State unknown secure only" "Both states,Secure only" bitfld.long 0x04 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x04 5. " SUS2 ,State unknown secure only" "Both states,Secure only" newline bitfld.long 0x04 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x04 3. " SUS1 ,State unknown secure only" "Both states,Secure only" bitfld.long 0x04 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted" newline bitfld.long 0x04 1. " SUS0 ,State unknown secure only" "Both states,Secure only" bitfld.long 0x04 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted" line.long 0x08 "SYST_CSR,SysTick Control and Status Register" bitfld.long 0x08 16. " COUNTFLAG ,Counter flag" "Not counted,Counted" bitfld.long 0x08 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x08 1. " TICKINT ,Tick interrupt" "No SysTick,SysTick" newline bitfld.long 0x08 0. " ENABLE ,SysTick enable" "Disabled,Enabled" line.long 0x0C "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x0C 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x10 "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x10 0.--23. 1. " CURRENT ,Current counter value" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Olympus r0p1,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main extension" newline hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Reserved,Olympus r0p1,?..." group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control and State Register" setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMI_SET/CLR ,On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSV_SET/CLR ,On writes allows the PendSV exception for the selected security state to be set as pending on reads indicates whether the PendSV for the selected security state exception is pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDST_SET/CLR ,On writes sets the SysTick exception as pending on reads indicates the current state of the exception" "Not pending,Pending" newline bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is secure or non-secure" "Secure,Non-secure" rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt generated by the NVIC is pending" "Not pending,Pending" newline rhexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" rhexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 14. " PRIS ,Prioritize secure exceptions" "Disabled,Enabled" newline bitfld.long 0x08 13. " BFHFNMINS ,BusFault HardFault and NMI non-secure enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping group priority field bits/subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" bitfld.long 0x08 5. " IESB ,Implicit ESB enable" "Disabled,Enabled" newline bitfld.long 0x08 4. " DIT ,Data Independent Timing" "Not guaranteed,Guaranteed" bitfld.long 0x08 3. " SYSRESETREQS ,System reset request secure only" "Both states,Secure only" bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested" newline bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" newline bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether on an exit from an ISR that returns to the base level of execution priority the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 20. " TRD ,Thread reentrancy disabled. Enables checking for exception stack frame integrity signatures on SG instructions" "Disabled,Enabled" bitfld.long 0x10 19. " LOB ,Loop and branch info cache enable" "Disabled,Enabled" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" newline bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored" newline bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise bus faults on handlers running at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" newline bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" line.long 0x14 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7 SecureFault" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6 UsageFault" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5 BusFault" newline hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4 MemManage" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11 SVCall" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15 SysTick" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14 PendSV" hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12 DebugMonitor" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending" bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending" bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled" newline bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled" newline bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending" newline bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active" newline bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active" bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active" newline bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active" bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected security state" "Not active,Active" newline bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active" group.byte 0xD28++0x01 line.byte 0x00 "MMFSR,MemManage Fault Register" bitfld.byte 0x00 7. " MMARVALID ,Address valid flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,Stacking access violations" "Not occurred,Occurred" newline bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking access violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data access violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction access violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address valid flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred" newline bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" newline bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x01 line.word 0x00 "UFSR,UsageFault Status Register" eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error" newline eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" eventfld.word 0x00 1. " INVSTATE ,Invalid combination of EPSR and instruction" "No error,Error" newline eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x0F line.long 0x00 "HFSR,HardFault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" eventfld.long 0x04 5. " PMU ,PMU event" "Not occurred,Occurred" eventfld.long 0x04 4. " EXTERNAL ,Eternal event" "Not occurred,Occurred" eventfld.long 0x04 3. " VCATCH ,Vector catch event" "Not occurred,Occurred" newline eventfld.long 0x04 2. " DWTTRAP ,Watchpoint event" "Not occurred,Occurred" eventfld.long 0x04 1. " BKPT ,Breakpoint event" "Not occurred,Occurred" eventfld.long 0x04 0. " HALTED ,Halt or step event" "Not occurred,Occurred" line.long 0x08 "MMFAR,MemManage Fault Address Register" line.long 0x0C "BFAR,BusFault Address Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD28))&0x700)==0x700) group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" bitfld.long 0x00 30. " FPOISON ,Fetch fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 29. " FTGU ,Fetch fault caused by TCM gate unit (TGU) security violation" "Not occurred,Occurred" bitfld.long 0x00 28. " FECC ,Fetch fault caused by uncorrectable error correcting code (ECC) error" "Not occurred,Occurred" newline bitfld.long 0x00 27. " FMAXITYPE ,AXI response that caused the fetch fault" "SLVERR,DECERR" bitfld.long 0x00 24. " FMAXI ,Fetch fault on master AXI interface" "Not occurred,Occurred" bitfld.long 0x00 22. " FDTCM ,Fetch fault on data tightly coupled memory (DTCM) interface" "Not occurred,Occurred" newline bitfld.long 0x00 21. " FITCM ,Fetch fault on instruction tightly coupled memory (ITCM) interface" "Not occurred,Occurred" bitfld.long 0x00 19. " PPOISON ,Precise fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 18. " PTGU ,Precise fault caused by TGU security violation" "Not occurred,Occurred" newline bitfld.long 0x00 17. " PECC ,Precise fault caused by uncorrectable ECC error" "Not occurred,Occurred" bitfld.long 0x00 16. " PMAXITYPE ,AXI response that caused the precise fault" "SLVERR,DECERR" bitfld.long 0x00 15. " PIPPB ,Precise fault on internal private peripheral bus (IPPB) interface" "Not occurred,Occurred" newline bitfld.long 0x00 14. " PEPPB ,Precise fault on external private peripheral bus (EPPB) interface" "Not occurred,Occurred" bitfld.long 0x00 13. " PMAXI ,Precise fault on M-AXI interface" "Not occurred,Occurred" bitfld.long 0x00 12. " PPAHB ,Precise fault on peripheral AHB (P-AHB) interface" "Not occurred,Occurred" newline bitfld.long 0x00 11. " PDTCM ,Precise fault on DTCM interface" "Not occurred,Occurred" bitfld.long 0x00 10. " PITCM ,Precise fault on ITCM interface" "Not occurred,Occurred" bitfld.long 0x00 9. " IPOISON ,Imprecise BusFault because of RPOISON" "Not occurred,Occurred" newline bitfld.long 0x00 7. " IECC ,Imprecise fault caused by uncorrectable ECC error" "Not occurred,Occurred" bitfld.long 0x00 6. " IMAXITYPE ,AXI response that caused the imprecise fault" "SLVERR,DECERR" bitfld.long 0x00 4. " IEPPB ,Imprecise fault on EPPB interface" "Not occurred,Occurred" newline bitfld.long 0x00 3. " IMAXI ,Imprecise fault on M-AXI interface" "Not occurred,Occurred" bitfld.long 0x00 2. " IPAHB ,Imprecise fault on P-AHB interface" "Not occurred,Occurred" bitfld.long 0x00 1. " IDTCM ,Imprecise fault on DTCM interface" "Not occurred,Occurred" newline bitfld.long 0x00 0. " IITCM ,Imprecise fault on ITCM interface" "Not occurred,Occurred" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD28))&0x700)==0x600) group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" bitfld.long 0x00 19. " PPOISON ,Precise fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 18. " PTGU ,Precise fault caused by TGU security violation" "Not occurred,Occurred" bitfld.long 0x00 17. " PECC ,Precise fault caused by uncorrectable ECC error" "Not occurred,Occurred" newline bitfld.long 0x00 16. " PMAXITYPE ,AXI response that caused the precise fault" "SLVERR,DECERR" bitfld.long 0x00 15. " PIPPB ,Precise fault on internal private peripheral bus (IPPB) interface" "Not occurred,Occurred" bitfld.long 0x00 14. " PEPPB ,Precise fault on external private peripheral bus (EPPB) interface" "Not occurred,Occurred" newline bitfld.long 0x00 13. " PMAXI ,Precise fault on M-AXI interface" "Not occurred,Occurred" bitfld.long 0x00 12. " PPAHB ,Precise fault on peripheral AHB (P-AHB) interface" "Not occurred,Occurred" bitfld.long 0x00 11. " PDTCM ,Precise fault on DTCM interface" "Not occurred,Occurred" newline bitfld.long 0x00 10. " PITCM ,Precise fault on ITCM interface" "Not occurred,Occurred" bitfld.long 0x00 9. " IPOISON ,Imprecise BusFault because of RPOISON" "Not occurred,Occurred" bitfld.long 0x00 7. " IECC ,Imprecise fault caused by uncorrectable ECC error" "Not occurred,Occurred" newline bitfld.long 0x00 6. " IMAXITYPE ,AXI response that caused the imprecise fault" "SLVERR,DECERR" bitfld.long 0x00 4. " IEPPB ,Imprecise fault on EPPB interface" "Not occurred,Occurred" bitfld.long 0x00 3. " IMAXI ,Imprecise fault on M-AXI interface" "Not occurred,Occurred" newline bitfld.long 0x00 2. " IPAHB ,Imprecise fault on P-AHB interface" "Not occurred,Occurred" bitfld.long 0x00 1. " IDTCM ,Imprecise fault on DTCM interface" "Not occurred,Occurred" bitfld.long 0x00 0. " IITCM ,Imprecise fault on ITCM interface" "Not occurred,Occurred" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD28))&0x700)==0x500) group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" bitfld.long 0x00 30. " FPOISON ,Fetch fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 29. " FTGU ,Fetch fault caused by TCM gate unit (TGU) security violation" "Not occurred,Occurred" bitfld.long 0x00 28. " FECC ,Fetch fault caused by uncorrectable error correcting code (ECC) error" "Not occurred,Occurred" newline bitfld.long 0x00 27. " FMAXITYPE ,AXI response that caused the fetch fault" "SLVERR,DECERR" bitfld.long 0x00 24. " FMAXI ,Fetch fault on master AXI interface" "Not occurred,Occurred" bitfld.long 0x00 22. " FDTCM ,Fetch fault on data tightly coupled memory (DTCM) interface" "Not occurred,Occurred" newline bitfld.long 0x00 21. " FITCM ,Fetch fault on instruction tightly coupled memory (ITCM) interface" "Not occurred,Occurred" bitfld.long 0x00 9. " IPOISON ,Imprecise BusFault because of RPOISON" "Not occurred,Occurred" bitfld.long 0x00 7. " IECC ,Imprecise fault caused by uncorrectable ECC error" "Not occurred,Occurred" newline bitfld.long 0x00 6. " IMAXITYPE ,AXI response that caused the imprecise fault" "SLVERR,DECERR" bitfld.long 0x00 4. " IEPPB ,Imprecise fault on EPPB interface" "Not occurred,Occurred" bitfld.long 0x00 3. " IMAXI ,Imprecise fault on M-AXI interface" "Not occurred,Occurred" newline bitfld.long 0x00 2. " IPAHB ,Imprecise fault on P-AHB interface" "Not occurred,Occurred" bitfld.long 0x00 1. " IDTCM ,Imprecise fault on DTCM interface" "Not occurred,Occurred" bitfld.long 0x00 0. " IITCM ,Imprecise fault on ITCM interface" "Not occurred,Occurred" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD28))&0x700)==0x400) group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" bitfld.long 0x00 9. " IPOISON ,Imprecise BusFault because of RPOISON" "Not occurred,Occurred" bitfld.long 0x00 7. " IECC ,Imprecise fault caused by uncorrectable ECC error" "Not occurred,Occurred" bitfld.long 0x00 6. " IMAXITYPE ,AXI response that caused the imprecise fault" "SLVERR,DECERR" newline bitfld.long 0x00 4. " IEPPB ,Imprecise fault on EPPB interface" "Not occurred,Occurred" bitfld.long 0x00 3. " IMAXI ,Imprecise fault on M-AXI interface" "Not occurred,Occurred" bitfld.long 0x00 2. " IPAHB ,Imprecise fault on P-AHB interface" "Not occurred,Occurred" newline bitfld.long 0x00 1. " IDTCM ,Imprecise fault on DTCM interface" "Not occurred,Occurred" bitfld.long 0x00 0. " IITCM ,Imprecise fault on ITCM interface" "Not occurred,Occurred" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD28))&0x700)==0x300) group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" bitfld.long 0x00 30. " FPOISON ,Fetch fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 29. " FTGU ,Fetch fault caused by TCM gate unit (TGU) security violation" "Not occurred,Occurred" bitfld.long 0x00 28. " FECC ,Fetch fault caused by uncorrectable error correcting code (ECC) error" "Not occurred,Occurred" newline bitfld.long 0x00 27. " FMAXITYPE ,AXI response that caused the fetch fault" "SLVERR,DECERR" bitfld.long 0x00 24. " FMAXI ,Fetch fault on master AXI interface" "Not occurred,Occurred" bitfld.long 0x00 22. " FDTCM ,Fetch fault on data tightly coupled memory (DTCM) interface" "Not occurred,Occurred" newline bitfld.long 0x00 21. " FITCM ,Fetch fault on instruction tightly coupled memory (ITCM) interface" "Not occurred,Occurred" bitfld.long 0x00 19. " PPOISON ,Precise fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 18. " PTGU ,Precise fault caused by TGU security violation" "Not occurred,Occurred" newline bitfld.long 0x00 17. " PECC ,Precise fault caused by uncorrectable ECC error" "Not occurred,Occurred" bitfld.long 0x00 16. " PMAXITYPE ,AXI response that caused the precise fault" "SLVERR,DECERR" bitfld.long 0x00 15. " PIPPB ,Precise fault on internal private peripheral bus (IPPB) interface" "Not occurred,Occurred" newline bitfld.long 0x00 14. " PEPPB ,Precise fault on external private peripheral bus (EPPB) interface" "Not occurred,Occurred" bitfld.long 0x00 13. " PMAXI ,Precise fault on M-AXI interface" "Not occurred,Occurred" bitfld.long 0x00 12. " PPAHB ,Precise fault on peripheral AHB (P-AHB) interface" "Not occurred,Occurred" newline bitfld.long 0x00 11. " PDTCM ,Precise fault on DTCM interface" "Not occurred,Occurred" bitfld.long 0x00 10. " PITCM ,Precise fault on ITCM interface" "Not occurred,Occurred" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD28))&0x700)==0x200) group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" bitfld.long 0x00 19. " PPOISON ,Precise fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 18. " PTGU ,Precise fault caused by TGU security violation" "Not occurred,Occurred" bitfld.long 0x00 17. " PECC ,Precise fault caused by uncorrectable ECC error" "Not occurred,Occurred" newline bitfld.long 0x00 16. " PMAXITYPE ,AXI response that caused the precise fault" "SLVERR,DECERR" bitfld.long 0x00 15. " PIPPB ,Precise fault on internal private peripheral bus (IPPB) interface" "Not occurred,Occurred" bitfld.long 0x00 14. " PEPPB ,Precise fault on external private peripheral bus (EPPB) interface" "Not occurred,Occurred" newline bitfld.long 0x00 13. " PMAXI ,Precise fault on M-AXI interface" "Not occurred,Occurred" bitfld.long 0x00 12. " PPAHB ,Precise fault on peripheral AHB (P-AHB) interface" "Not occurred,Occurred" bitfld.long 0x00 11. " PDTCM ,Precise fault on DTCM interface" "Not occurred,Occurred" newline bitfld.long 0x00 10. " PITCM ,Precise fault on ITCM interface" "Not occurred,Occurred" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD28))&0x700)==0x100) group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" bitfld.long 0x00 30. " FPOISON ,Fetch fault caused by RPOISON or TEBRx.POISON" "Not occurred,Occurred" bitfld.long 0x00 29. " FTGU ,Fetch fault caused by TCM gate unit (TGU) security violation" "Not occurred,Occurred" bitfld.long 0x00 28. " FECC ,Fetch fault caused by uncorrectable error correcting code (ECC) error" "Not occurred,Occurred" newline bitfld.long 0x00 27. " FMAXITYPE ,AXI response that caused the fetch fault" "SLVERR,DECERR" bitfld.long 0x00 24. " FMAXI ,Fetch fault on master AXI interface" "Not occurred,Occurred" bitfld.long 0x00 22. " FDTCM ,Fetch fault on data tightly coupled memory (DTCM) interface" "Not occurred,Occurred" newline bitfld.long 0x00 21. " FITCM ,Fetch fault on instruction tightly coupled memory (ITCM) interface" "Not occurred,Occurred" else group.long 0xD3C++0x03 line.long 0x00 "AFSR,Auxiliary Fault Status Register" endif group.long 0xD88++0x07 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Denied,Privileged,Reserved,Full" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,Reserved,Full" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,Reserved,Full" newline bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,Reserved,Full" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,Reserved,Full" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,Reserved,Full" newline bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,Reserved,Full" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,Reserved,Full" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,Reserved,Full" newline bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,Reserved,Full" line.long 0x04 "NSACR,Non-secure Access Control Register" bitfld.long 0x04 11. " CP11 ,Enables non-secure access to coprocessor CP11" "Disabled,Enabled" bitfld.long 0x04 10. " CP10 ,Enables non-secure access to coprocessor CP10" "Disabled,Enabled" bitfld.long 0x04 7. " CP7 ,Enables non-secure access to coprocessor CP7" "Disabled,Enabled" newline bitfld.long 0x04 6. " CP6 ,Enables non-secure access to coprocessor CP6" "Disabled,Enabled" bitfld.long 0x04 5. " CP5 ,Enables non-secure access to coprocessor CP5" "Disabled,Enabled" bitfld.long 0x04 4. " CP4 ,Enables non-secure access to coprocessor CP4" "Disabled,Enabled" newline bitfld.long 0x04 3. " CP3 ,Enables non-secure access to coprocessor CP3" "Disabled,Enabled" bitfld.long 0x04 2. " CP2 ,Enables non-secure access to coprocessor CP2" "Disabled,Enabled" bitfld.long 0x04 1. " CP1 ,Enables non-secure access to coprocessor CP1" "Disabled,Enabled" newline bitfld.long 0x04 0. " CP0 ,Enables non-secure access to coprocessor CP0" "Disabled,Enabled" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Triggered Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended" wgroup.long 0x10700++0x03 line.long 0x00 "CFGINFOSEL,Processor Configuration Information Selection Register" rgroup.long 0x10704++0x03 line.long 0x00 "CFGINFORD,Processor Configuration Information Read Data Register" group.long 0x10004++0x03 line.long 0x00 "PFCR,Prefetcher Control Register" bitfld.long 0x00 7. " DIS_NLP ,Disables Next Line Prefetch mode" "No,Yes" bitfld.long 0x00 0. " ENABLE ,Prefetcher enable" "Disabled,Enabled" width 10. tree "Memory System" rgroup.long 0xD78++0x03 line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. " LOUU ,Level of unification uniprocessor" "Not implemented,Level 1,?..." bitfld.long 0x00 24.--26. " LOC ,Level of coherency" "Not implemented,Level 1,?..." newline bitfld.long 0x00 21.--23. " LOUIS ,Level of unification inner shareable" "Not implemented,Level 1,?..." bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..." if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C))&0xE0000000)==0x80000000) rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,Reserved,Reserved,Reserved,Cache,?..." bitfld.long 0x00 24.--27. " CWG ,Cache write-back granule" "No Cache,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,?..." bitfld.long 0x00 20.--23. " ERG ,Exclusives reservation granule" "Not provided,2 words,4 words,8 words,16 words,32 words,64 words,128 words,256 words,?..." newline bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,Reserved,Reserved,Reserved,Cache,?..." endif rgroup.long 0xD80++0x03 line.long 0x00 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Indicates support available for write-through" "Reserved,Supported" bitfld.long 0x00 30. " WB ,Indicates support available for write-back" "Reserved,Supported" bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Reserved,Supported" newline bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Reserved,Supported" hexmask.long.word 0x00 13.--27. 0x20 " NUMSETS ,Indicates the number of sets as (number of sets) - 1" hexmask.long.word 0x00 3.--12. 0x08 " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1" newline bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "Reserved,32 bytes,?..." group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" rbitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,I-Cache Invalidate All To PoU" wgroup.long 0xF58++0x1F line.long 0x00 "ICIMVAU,I-Cache Invalidate By MVA To PoU" line.long 0x04 "DCIMVAC,D-Cache Invalidate By MVA To PoC" line.long 0x08 "DCISW,D-Cache Invalidate By Set-Way" hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on minus 1" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x0C "DCCMVAU,D-Cache Clean By MVA To PoU" line.long 0x10 "DCCMVAC,D-Cache Clean By MVA To PoC" line.long 0x14 "DCCSW,D-Cache Clean By Set-Way" hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x18 "DCCIMVAC,D-Cache Clean And Invalidate By MVA To PoC" line.long 0x1C "DCCISW,D-Cache Clean And Invalidate By Set-Way" hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on minus" "L1,L2,L3,L4,L5,L6,L7,L8" group.long 0x10010++0x0B line.long 0x00 "ITCMCR,Instruction TCM Control Register" rbitfld.long 0x00 3.--6. " SZ ,TCM size" "Not implemented,Reserved,Reserved,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB" bitfld.long 0x00 0. " EN ,TCM enable" "Disabled,Enabled" line.long 0x04 "DTCMCR,Data TCM Control Register" rbitfld.long 0x04 3.--6. " SZ ,TCM size" "Not implemented,Reserved,Reserved,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB" bitfld.long 0x04 0. " EN ,TCM enable" "Disabled,Enabled" line.long 0x08 "PAHBCR,P-AHB Control Register" rbitfld.long 0x08 1.--3. " SZ ,P-AHB size" "Disabled,64 MB,128 MB,256 MB,512 MB,?..." bitfld.long 0x08 0. " EN ,P-AHB enable" "Disabled,Enabled" repeat 2. (increment 0x10100 0x04) (increment 0. 1.) group.long $1++0x03 line.long 0x00 "IEBR$2,Instruction Cache Error Bank Register $2" bitfld.long 0x00 30.--31. " SWDEF ,User-defined" "0,1,2,3" bitfld.long 0x00 16. " BANK ,Indicates which RAM bank to use" "Tag,Data" bitfld.long 0x00 15. " LOC_WAY ,Indicates the location in instruction cache RAM (way)" "0,1" newline hexmask.long.word 0x00 5.--14. 0x20 " LOC_INDEX ,Indicates the location in instruction cache RAM (index)" bitfld.long 0x00 2.--4. " LOC_OFFSET ,Indicates the location in instruction cache RAM (offset)" "0,1,2,3,4,5,6,7" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" newline bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" repeat.end repeat 2. (increment 0x10110 0x04) (increment 0. 1.) group.long $1++0x03 line.long 0x00 "DEBR$2,Data Cache Error Bank Register $2" bitfld.long 0x00 30.--31. " SWDEF ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TYPE ,Indicates the error type" "Single-bit,Multi-bit" bitfld.long 0x00 16. " BANK ,Indicates which RAM bank to use" "Tag,Data" newline bitfld.long 0x00 14.--15. " LOC_WAY ,Indicates the location in instruction cache RAM (way)" "0,1,2,3" hexmask.long.word 0x00 5.--13. 0x20 " LOC_INDEX ,Indicates the location in instruction cache RAM (index)" bitfld.long 0x00 2.--4. " LOC_OFFSET ,Indicates the location in instruction cache RAM (offset)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" repeat.end repeat 2. (increment 0x10120 0x04) (increment 0. 1.) group.long $1++0x03 line.long 0x00 "TEBR$2,TCM Error Bank Register $2" bitfld.long 0x00 30.--31. " SWDEF ,User-defined" "0,1,2,3" bitfld.long 0x00 28. " POISON ,Indicates whether a BusFault is generated or not" "Not generated,Generated" bitfld.long 0x00 27. " TYPE ,Indicates the error type" "Single-bit,Multi-bit" newline bitfld.long 0x00 24.--26. " BANK ,Indicates which RAM bank to use" "DTCM0,DTCM1,DTCM2,DTCM3,ITCM,?..." hexmask.long.tbyte 0x00 3.--23. 0x08 " LOCATION ,Indicates the location in data cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" newline bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" repeat.end group.long 0x10000++0x03 line.long 0x00 "MSCR,Memory System Control Register" rbitfld.long 0x00 17. " CPWRDN ,Data and instruction caches powered down or automatic invalidation enable" "Disabled,Enabled" bitfld.long 0x00 16. " DCCLEAN ,Data cache contains any dirty lines" "Contained,Not contained" bitfld.long 0x00 13. " ICACTIVE ,L1 instruction cache is active" "Not active,Active" newline bitfld.long 0x00 12. " DCACTIVE ,L1 data cache is active" "Not active,Active" bitfld.long 0x00 3. " EVECCFAULT ,Enables asynchronous BusFault exceptions when data is lost on evictions" "Disabled,Enabled" bitfld.long 0x00 2. " FORCEWT ,Enables forced write-through in the L1 data cache" "Disabled,Enabled" newline rbitfld.long 0x00 1. " ECCEN ,Indicates whether error correcting code is present and enabled" "Disabled,Enabled" newline rgroup.long 0x10200++0x07 line.long 0x00 "DCADCRR,Direct Cache Access Data Cache Read Register" bitfld.long 0x00 23.--25. " STATUS ,Clean or dirty transient and outer attributes of the cache line" "Clean/transient/unknown,Clean/not transient/unknown,Dirty/not transient/Non-cacheable,Dirty/Not transient/Non-cacheable/W-back/W-allocate,Dirty/not transient/W-back/no W-allocate,Dirty/not transient/W-through/W-allocate,Dirty/Not transient/W-through/no W-allocate,?..." newline bitfld.long 0x00 22. " VALID ,Valid state of the data cache line entry" "Not valid,Valid" hexmask.long.tbyte 0x00 0.--21. 0x01 " TAG ,Tag address" line.long 0x04 "DCAICRR,Direct Cache Access Instruction Cache Read Register" bitfld.long 0x04 21. " VALID ,Valid state of the instruction cache line" "Not valid,Valid" hexmask.long.tbyte 0x04 0.--20. 0x01 " TAG ,Tag address" newline group.long 0x10210++0x07 line.long 0x00 "DCADCLR,Direct Cache Access Location Register" rbitfld.long 0x00 30.--31. " WAY ,Cache way" "0,1,2,3" rhexmask.long.word 0x00 5.--13. 0x20 " SET ,Set index" rbitfld.long 0x00 2.--4. " OFFSET ,Data offset" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 0. " RAMTYPE ,RAM type" "Tag,Data" line.long 0x04 "DCAICLR,Direct Cache Access Location Register" rbitfld.long 0x04 30. " WAY ,Cache way" "0,1" rhexmask.long.word 0x04 5.--14. 0x20 " SET ,Set index" rbitfld.long 0x04 2.--4. " OFFSET ,Data offset" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x04 0. " RAMTYPE ,RAM type" "Tag,Data" tree.end tree "Feature Registers" rgroup.long 0xD40++0x37 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 28.--31. " RAS ,Identifies which version of the RAS architecture is implemented" "Reserved,Reserved,Version 1,?..." bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" "Reserved,Reserved,2-stack,?..." bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,Reserved,Implemented with state handling,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 28.--31. " UDE ,Unprivileged debug extension" "Not implemented,Implemented,?..." bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug indicates the supported M-profile debug architecture" "Not supported,Reserved,ARMv8-M Debug architecture,?..." line.long 0x0C "ID_AFR0,Auxiliary Feature Register 0" line.long 0x10 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x10 20.--23. " AUXREG ,Indicates the support for auxiliary registers" "Not supported,Supported,?..." bitfld.long 0x10 16.--19. " TCM ,Indicates the support for tightly coupled memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x10 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..." newline bitfld.long 0x10 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Ignored" bitfld.long 0x10 4.--7. " PMSASUP ,Indicates support for a PMSA" "Reserved,Reserved,Reserved,Reserved,PMSAv8,?..." line.long 0x14 "ID_MMFR1,Memory Model Feature Register 1" line.long 0x18 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x18 24.--27. " WFISTALL ,Indicates the support for wait for interrupt (WFI) stalling" "Not supported,Supported,?..." line.long 0x1C "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x1C 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..." bitfld.long 0x1C 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..." bitfld.long 0x1C 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..." line.long 0x20 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x20 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Reserved,SDIV/UDIV,?..." bitfld.long 0x20 20.--23. " DEBUG ,Indicates the supported debug instructions" "Reserved,BKPT,?..." bitfld.long 0x20 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Reserved,Reserved,Reserved,Supported,?..." newline bitfld.long 0x20 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Reserved,CBNZ/CBZ,Reserved,CBNZ/CBZ with looping,?..." bitfld.long 0x20 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x20 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Reserved,CLZ supported,?..." line.long 0x24 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x24 24.--27. " INTERWORK ,Indicates the supported interworking instructions" "Reserved,Reserved,BX/BLX,?..." bitfld.long 0x24 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Reserved,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x24 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Reserved,IT,?..." newline bitfld.long 0x24 12.--15. " EXTEND ,Indicates the supported extend instructions" "Reserved,Basic,Extended,?..." line.long 0x28 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x28 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Reserved,Reserved,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x28 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Reserved,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x28 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Reserved,SMULL/SMLAL,Reserved,SMULL/SMLAL/DSP,?..." newline bitfld.long 0x28 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Reserved,Reserved,MUL/MLA/MLS,?..." bitfld.long 0x28 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x28 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Reserved,Reserved,Reserved,PLD/PLI,?..." newline bitfld.long 0x28 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Reserved,Reserved,Load-acquire/Store-release/Exclusive,?..." line.long 0x2C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x2C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Reserved,Supported,?..." bitfld.long 0x2C 20.--23. " T32COPY ,Indicates the supported non flag-setting MOV instructions" "Reserved,Supported,?..." bitfld.long 0x2C 16.--19. " TABBRANCH ,Indicates the supported table branch instructions" "Reserved,TBB/TBH,?..." newline bitfld.long 0x2C 12.--15. " SYNCHPRIM ,Indicates the supported table branch instructions" "Reserved,Supported,?..." bitfld.long 0x2C 8.--11. " SVC ,Indicates the supported SVC instructions" "Reserved,SVC,?..." bitfld.long 0x2C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Reserved,Supported,Reserved,Extended,?..." newline bitfld.long 0x2C 0.--3. " SATURATE ,Indicates the supported saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..." line.long 0x30 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x30 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Reserved,CPS/MRS/MSR,?..." bitfld.long 0x30 20.--23. " SYNCHPRIMFRAC ,Indicate the implemented synchronization primitive instructions" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x30 16.--19. " BARRIER ,Indicates the supported barrier instructions" "Reserved,CSDB/DMB/DSB/ISB/PSSBB/SSBB,?..." newline bitfld.long 0x30 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Reserved,Supported,?..." bitfld.long 0x30 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x30 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Reserved,Reserved,Supported,?..." line.long 0x34 "ID_ISAR5,Instruction Set Attributes Register 5" bitfld.long 0x34 20.--23. " PACBTI ,Pointer authentication algorithm" "Not implemented,QARMA5,Implementation defined,Reserved,QARMA3,?..." tree.end newline rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 0x20 " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Reserved,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "M-Profile V3.0,?..." newline bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "Reserved,Reserved,M-Profile V3.0,?..." hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" rgroup.long 0xFCC++0x03 line.long 0x00 "DDEVTYPE,SCS Device Type Register" bitfld.long 0x00 4.--7. " SUB ,Component sub-type" "Other,?..." bitfld.long 0x00 0.--3. " MAJOR ,CoreSight major type" "Miscellaneous,?..." rgroup.long 0xCFC++0x03 line.long 0x00 "REVIDR,Revision ID Register" width 8. tree "Peripheral Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "DPIDR0,CoreSight Peripheral ID Register 0" hexmask.long.byte 0x00 0.--7. 1. " PART_NUM[7:0] ,Part number bits[7:0]" line.long 0x04 "DPIDR1,CoreSight Peripheral ID Register 1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " PART_NUM[11:8] ,Part number bits[11:8]" line.long 0x08 "DPIDR2,CoreSight Peripheral ID Register 2" hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "DPIDR3,CoreSight Peripheral ID Register 3" hexmask.long.byte 0x0C 4.--7. 1. " REVAND ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x0F line.long 0x00 "DPIDR4,CoreSight Peripheral ID Register 4" hexmask.long.byte 0x00 4.--7. 1. " COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" line.long 0x04 "DPIDR5,CoreSight Peripheral ID Register 5" line.long 0x08 "DPIDR6,CoreSight Peripheral ID Register 6" line.long 0x0C "DPIDR7,CoreSight Peripheral ID Register 7" rgroup.long 0xFF0++0x0F line.long 0x00 "DCIDR0,CoreSight Component ID Register 0" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DCIDR1,CoreSight Component ID Register 1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component identification preamble" line.long 0x08 "DCIDR2,CoreSight Component ID Register 2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0C "DCIDR3,CoreSight Component ID Register 3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 12. tree "Reliability, Availability, and Serviceability" base (CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))-0x9000) rgroup.long 0x00++0x03 line.long 0x00 "ERRFR0,RAS Error Record Feature" bitfld.long 0x00 8.--9. " UE ,Enable uncorrected error" "Reserved,Enabled,?..." bitfld.long 0x00 0.--1. " ED ,Error reporting and logging" "Reserved,Enabled,?..." hgroup.long 0x08++0x03 hide.long 0x00 "ERRCTRL0,RAS Error Record Control Register 0" group.long 0x10++0x03 line.long 0x00 "ERRSTATUS0,RAS Error Record Primary Status Register" eventfld.long 0x00 31. " AV ,Address valid" "Not valid,Valid" bitfld.long 0x00 30. " V ,Status valid" "Not valid,Valid" eventfld.long 0x00 29. " UE ,Uncorrected errors" "Not detected,Detected" newline eventfld.long 0x00 28. " ER ,BusFault caused by RAS" "Not occurred,Occurred" eventfld.long 0x00 27. " OF ,RAS event has occurred since the last time ERRSTATUS0.V was cleared" "At most one,At least two" eventfld.long 0x00 26. " MV ,Miscellaneous registers valid" "Not valid,Valid" newline bitfld.long 0x00 24.--25. " CE ,Corrected errors" "Not detected,Reserved,Detected,?..." eventfld.long 0x00 23. " DE ,Deferred errors" "No deferred,Deferred" bitfld.long 0x00 20.--21. " UET ,Uncorrectable error type" "UC,Reserved,Reserved,UER" newline hexmask.long.byte 0x00 0.--7. 1. " SERR ,Architecturally-defined primary error code" rgroup.long 0x18++0x07 line.long 0x00 "ERRADDR0,RAS Error Record Address Register" line.long 0x04 "ERRADDR20,RAS Error Record Address Register" bitfld.long 0x04 30. " SI ,Security information incorrect" "Reserved,Not valid" bitfld.long 0x04 29. " AI ,Address incorrect" "Valid,Not valid" hgroup.long 0x20++0x03 hide.long 0x00 "ERRMISC00,RAS Error Record Miscellaneous Register 00" rgroup.long 0x24++0x03 line.long 0x00 "ERRMISC10,RAS Error Record Miscellaneous Register 10" bitfld.long 0x00 0.--1. " TYPE ,Indicates the type of RAS event logged" "L1 instruction,L1 data,By processor,S-AHB" hgroup.long 0x28++0x03 hide.long 0x00 "ERRMISC20,RAS Error Record Miscellaneous Register 20" hgroup.long 0x2C++0x03 hide.long 0x00 "ERRMISC30,RAS Error Record Miscellaneous Register 30" hgroup.long 0x30++0x03 hide.long 0x00 "ERRMISC40,RAS Error Record Miscellaneous Register 40" hgroup.long 0x34++0x03 hide.long 0x00 "ERRMISC50,RAS Error Record Miscellaneous Register 50" hgroup.long 0x38++0x03 hide.long 0x00 "ERRMISC60,RAS Error Record Miscellaneous Register 60" hgroup.long 0x3C++0x03 hide.long 0x00 "ERRMISC70,RAS Error Record Miscellaneous Register 70" rgroup.long 0xE00++0x03 line.long 0x00 "ERRGSR0,RAS Fault Group Status Register" bitfld.long 0x00 0. " ERR0 ,Error record 0 valid" "Not valid,Valid" rgroup.long 0xFC8++0x03 line.long 0x00 "ERRDEVID,RAS Error Record Device ID Register" hexmask.long.word 0x00 0.--15. 1. " NUM ,Maximum error record index+1" group.long 0x9F04++0x03 line.long 0x00 "RFSR,RAS Fault Status Register" eventfld.long 0x00 31. " VALID ,Indicates whether the register is valid" "Not valid,Valid" bitfld.long 0x00 16.--30. " IS ,Implementation-defined syndrome" "L1 instruction,L1 data,TCM ECC,?..." bitfld.long 0x00 0.--1. " UET ,Error type" "Uncontainable,Reserved,Reserved,Recoverable" tree.end tree "TCM Security Gate" base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) group.long 0x10500++0x07 line.long 0x00 "ITGU_CTRL,ITGU Control Register" bitfld.long 0x00 1. " DEREN ,Enable slave AHB error response for TGU fault" "Disabled,Enabled" bitfld.long 0x00 0. " DBFEN ,Enable data side BusFault for TGU fault" "Disabled,Enabled" line.long 0x04 "ITGU_CFG,ITGU Configuration Register" bitfld.long 0x04 31. " PRESENT ,This field determines if the TGU is present" "Not present,Present" bitfld.long 0x04 8.--11. " NUMBLKS ,Number of TCM blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " BLKSZ ,TGU block size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" repeat 16. (increment 0x10510 0x04) (increment 0. 1.) group.long $1++0x03 line.long 0x00 "ITGU_LUT$2,ITGU Look Up Table Register $2" bitfld.long 0x00 31. " BLK31 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 30. " BLK30 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 29. " BLK29 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 28. " BLK28 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 27. " BLK27 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 26. " BLK26 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 25. " BLK25 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 24. " BLK24 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 23. " BLK23 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 22. " BLK22 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 21. " BLK21 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 20. " BLK20 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 19. " BLK19 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 18. " BLK18 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 17. " BLK17 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 16. " BLK16 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 15. " BLK15 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 14. " BLK14 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 13. " BLK13 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 12. " BLK12 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 11. " BLK11 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 10. " BLK10 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 9. " BLK9 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 8. " BLK8 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 7. " BLK7 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 6. " BLK6 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 5. " BLK5 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 4. " BLK4 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 3. " BLK3 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 2. " BLK2 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 1. " BLK1 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 0. " BLK0 ,Implemented block security mapping bit options" "Secure,Non-secure" repeat.end group.long 0x10500++0x07 line.long 0x00 "DTGU_CTRL,ITGU Control Register" bitfld.long 0x00 1. " DEREN ,Enable slave AHB error response for TGU fault" "Disabled,Enabled" bitfld.long 0x00 0. " DBFEN ,Enable data side BusFault for TGU fault" "Disabled,Enabled" line.long 0x04 "DTGU_CFG,ITGU Configuration Register" bitfld.long 0x04 31. " PRESENT ,This field determines if the TGU is present" "Not present,Present" bitfld.long 0x04 8.--11. " NUMBLKS ,Number of TCM blocks" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " BLKSZ ,TGU block size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" repeat 16. (increment 0x10510 0x04) (increment 0. 1.) group.long $1++0x03 line.long 0x00 "DTGU_LUT$2,ITGU Look Up Table Register $2" bitfld.long 0x00 31. " BLK31 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 30. " BLK30 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 29. " BLK29 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 28. " BLK28 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 27. " BLK27 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 26. " BLK26 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 25. " BLK25 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 24. " BLK24 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 23. " BLK23 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 22. " BLK22 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 21. " BLK21 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 20. " BLK20 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 19. " BLK19 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 18. " BLK18 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 17. " BLK17 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 16. " BLK16 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 15. " BLK15 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 14. " BLK14 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 13. " BLK13 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 12. " BLK12 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 11. " BLK11 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 10. " BLK10 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 9. " BLK9 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 8. " BLK8 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 7. " BLK7 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 6. " BLK6 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 5. " BLK5 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 4. " BLK4 ,Implemented block security mapping bit options" "Secure,Non-secure" newline bitfld.long 0x00 3. " BLK3 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 2. " BLK2 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 1. " BLK1 ,Implemented block security mapping bit options" "Secure,Non-secure" bitfld.long 0x00 0. " BLK0 ,Implemented block security mapping bit options" "Secure,Non-secure" repeat.end tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 13. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" hexmask.long.byte 0x00 8.--15. 1. " DREGION ,Number of regions supported by the MPU" bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..." group.long 0xD94++0x07 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" line.long 0x04 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x04 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x0 group.long 0xD9C++0x07 "Region 0" saveindex 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR0,MPU Region Attribute And Size Register 0" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveindex 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x0 hide.long 0x00 "MPU_RLAR0,MPU Region Attribute And Size Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x1 group.long 0xD9C++0x07 "Region 1" saveindex 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR1,MPU Region Attribute And Size Register 1" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveindex 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x1 hide.long 0x00 "MPU_RLAR1,MPU Region Attribute And Size Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x2 group.long 0xD9C++0x07 "Region 2" saveindex 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR2,MPU Region Attribute And Size Register 2" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveindex 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x2 hide.long 0x00 "MPU_RLAR2,MPU Region Attribute And Size Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x3 group.long 0xD9C++0x07 "Region 3" saveindex 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR3,MPU Region Attribute And Size Register 3" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveindex 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x3 hide.long 0x00 "MPU_RLAR3,MPU Region Attribute And Size Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x4 group.long 0xD9C++0x07 "Region 4" saveindex 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR4,MPU Region Attribute And Size Register 4" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveindex 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x4 hide.long 0x00 "MPU_RLAR4,MPU Region Attribute And Size Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x5 group.long 0xD9C++0x07 "Region 5" saveindex 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR5,MPU Region Attribute And Size Register 5" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveindex 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x5 hide.long 0x00 "MPU_RLAR5,MPU Region Attribute And Size Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x6 group.long 0xD9C++0x07 "Region 6" saveindex 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR6,MPU Region Attribute And Size Register 6" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveindex 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x6 hide.long 0x00 "MPU_RLAR6,MPU Region Attribute And Size Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x7 group.long 0xD9C++0x07 "Region 7" saveindex 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR7,MPU Region Attribute And Size Register 7" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveindex 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x7 hide.long 0x00 "MPU_RLAR7,MPU Region Attribute And Size Register 7" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x8 group.long 0xD9C++0x07 "Region 8" saveindex 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR8,MPU Region Attribute And Size Register 8" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveindex 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x8 hide.long 0x00 "MPU_RLAR8,MPU Region Attribute And Size Register 8" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0x9 group.long 0xD9C++0x07 "Region 9" saveindex 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR9,MPU Region Attribute And Size Register 9" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveindex 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0x9 hide.long 0x00 "MPU_RLAR9,MPU Region Attribute And Size Register 9" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0xA group.long 0xD9C++0x07 "Region 10" saveindex 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR10,MPU Region Attribute And Size Register 10" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveindex 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0xA hide.long 0x00 "MPU_RLAR10,MPU Region Attribute And Size Register 10" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0xB group.long 0xD9C++0x07 "Region 11" saveindex 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR11,MPU Region Attribute And Size Register 11" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveindex 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0xB hide.long 0x00 "MPU_RLAR11,MPU Region Attribute And Size Register 11" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0xC group.long 0xD9C++0x07 "Region 12" saveindex 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR12,MPU Region Attribute And Size Register 12" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveindex 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0xC hide.long 0x00 "MPU_RLAR12,MPU Region Attribute And Size Register 12" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0xD group.long 0xD9C++0x07 "Region 13" saveindex 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR13,MPU Region Attribute And Size Register 13" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveindex 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0xD hide.long 0x00 "MPU_RLAR13,MPU Region Attribute And Size Register 13" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0xE group.long 0xD9C++0x07 "Region 14" saveindex 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR14,MPU Region Attribute And Size Register 14" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveindex 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0xE hide.long 0x00 "MPU_RLAR14,MPU Region Attribute And Size Register 14" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xFF00)>>8)>0xF group.long 0xD9C++0x07 "Region 15" saveindex 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR15,MPU Region Attribute And Size Register 15" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveindex 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveindex 0xD98 %l 0xF hide.long 0x00 "MPU_RLAR15,MPU Region Attribute And Size Register 15" endif tree.end newline repeat 3. (increment 0xDA4 0x08)(increment 1. 1.) group.long $1++0x07 line.long 0x00 "MPU_RBAR_A$2,MPU Region Base Address Register Alias $2" hexmask.long 0x00 5.--31. 0x20 " BASE ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for normal memory" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" newline bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Permitted,Not Permitted" line.long 0x04 "MPU_RLAR_A$2,MPU Region Limit Address Register Alias $2" hexmask.long 0x04 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x04 4. " PXN ,Privileged execute never" "Permitted,Not permitted" bitfld.long 0x04 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. " EN ,Enable" "Disabled,Enabled" repeat.end newline group.long 0xDC0++0x07 line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1" bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Security Attribution Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. group.long 0xDD0++0x03 line.long 0x00 "SAU_CTRL,SAU Control Register" bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or secure" "Secure,Non-secure" bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled" rgroup.long 0xDD4++0x03 line.long 0x00 "SAU_TYPE,SAU Type Register" hexmask.long.byte 0x00 0.--7. 1. " SREGION ,The number of implemented SAU regions" group.long 0xDD8++0x03 line.long 0x00 "SAU_RNR,SAU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR" tree "SAU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x0 group.long 0xDDC++0x07 "Region 0" saveindex 0xDD8 %l 0x0 line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR0,SAU Region Limit Address Register 0" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 0 (not implemented)" saveindex 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x1 group.long 0xDDC++0x07 "Region 1" saveindex 0xDD8 %l 0x1 line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR1,SAU Region Limit Address Register 1" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 1 (not implemented)" saveindex 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x2 group.long 0xDDC++0x07 "Region 2" saveindex 0xDD8 %l 0x2 line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR2,SAU Region Limit Address Register 2" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 2 (not implemented)" saveindex 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x3 group.long 0xDDC++0x07 "Region 3" saveindex 0xDD8 %l 0x3 line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR3,SAU Region Limit Address Register 3" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 3 (not implemented)" saveindex 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x4 group.long 0xDDC++0x07 "Region 4" saveindex 0xDD8 %l 0x4 line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR4,SAU Region Limit Address Register 4" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 4 (not implemented)" saveindex 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x5 group.long 0xDDC++0x07 "Region 5" saveindex 0xDD8 %l 0x5 line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR5,SAU Region Limit Address Register 5" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 5 (not implemented)" saveindex 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x6 group.long 0xDDC++0x07 "Region 6" saveindex 0xDD8 %l 0x6 line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR6,SAU Region Limit Address Register 6" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 6 (not implemented)" saveindex 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD4)&0xFF))>0x7 group.long 0xDDC++0x07 "Region 7" saveindex 0xDD8 %l 0x7 line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " BADDR ,Base address of the region" line.long 0x04 "SAU_RLAR7,SAU Region Limit Address Register 7" hexmask.long 0x04 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x04 1. " NSC ,Controls whether non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x04 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 7 (not implemented)" saveindex 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveindex 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif tree.end newline group.long 0xDE4++0x07 line.long 0x00 "SFSR,Secure Fault Status Register" bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred" bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid" bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred" newline bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred" bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred" bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred" newline bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred" bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred" line.long 0x04 "SFAR,Secure Fault Address Register" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Control Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total number of interrupt lines in groups of 32" "0-31,0-63,0-95,0-127,0-159,0-191,0-223,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,?..." wgroup.long 0x10400++0x03 line.long 0x00 "EVENTSPR,Event Set Pending Register" bitfld.long 0x00 2. " EDBGREQ ,External debug request has occurred" "Not occurred,Occurred" bitfld.long 0x00 1. " NMI ,Non-maskable interrupt has occurred" "Not occurred,Occurred" bitfld.long 0x00 0. " EVENT ,RXEV event has occurred" "Not occurred,Occurred" rgroup.long 0x10480++0x03 line.long 0x00 "EVENTMASKA,Wake-Up Event Mask Register" bitfld.long 0x00 2. " EDBGREQ ,Mask for external debug request" "0,1" bitfld.long 0x00 1. " NMI ,Mask for non-maskable interrupt" "Not occurred,Occurred" bitfld.long 0x00 0. " EVENT ,RXEV event has occurred while WFE sleep" "Not occurred,Occurred" repeat 15. (increment 0x10484 0x04) (increment 0. 1.) rgroup.long $1++0x03 line.long 0x00 "EVENTMASK$2,Wake-up Event Mask Register $2" repeat.end width 24. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt set/clear enable bit" "Disabled,Enabled" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x104++0x03 line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x104++0x03 hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x108++0x03 line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x108++0x03 hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x10C++0x03 line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x10C++0x03 hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x110++0x03 line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x110++0x03 hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x114++0x03 line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x114++0x03 hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x118++0x03 line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x118++0x03 hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x11C++0x03 line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x11C++0x03 hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x120++0x03 line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x120++0x03 hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x124++0x03 line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x124++0x03 hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x128++0x03 line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x128++0x03 hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x12C++0x03 line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x12C++0x03 hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x130++0x03 line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x130++0x03 hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x134++0x03 line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x134++0x03 hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x138++0x03 line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt set/clear enable bit" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt set/clear enable bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt set/clear enable bit" "Disabled,Enabled" else hgroup.long 0x138++0x03 hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" endif tree.end width 24. tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt set/clear pending" "Not pending,Pending" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x204++0x03 line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x204++0x03 hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x208++0x03 line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x208++0x03 hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x20C++0x03 line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x20C++0x03 hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x210++0x03 line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x210++0x03 hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x214++0x03 line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x214++0x03 hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x218++0x03 line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x218++0x03 hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x21C++0x03 line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x21C++0x03 hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x220++0x03 line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x220++0x03 hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x224++0x03 line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x224++0x03 hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x228++0x03 line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x228++0x03 hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x22C++0x03 line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x22C++0x03 hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x230++0x03 line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x230++0x03 hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x234++0x03 line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x234++0x03 hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x238++0x03 line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt set/clear pending" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt set/clear pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt set/clear pending" "Not pending,Pending" else hgroup.long 0x238++0x03 hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" endif tree.end width 11. tree "Interrupt Active Bit Registers" rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE0,Active Bit Register 0" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE25 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE19 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE13 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE7 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE1 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt active flag" "Not active,Active" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) rgroup.long 0x304++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE63 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE62 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE61 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE60 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE59 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE58 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE57 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE56 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE55 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE54 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE53 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE52 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE51 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE50 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE49 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE48 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE47 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE46 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE45 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE44 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE43 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE42 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE41 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE40 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE39 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE38 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE37 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE36 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE35 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE34 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE33 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE32 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x304++0x03 hide.long 0x00 "ACTIVE1,Active Bit Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) rgroup.long 0x308++0x03 line.long 0x00 "ACTIVE2,Active Bit Register 2" bitfld.long 0x00 31. " ACTIVE95 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE94 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE93 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE92 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE91 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE90 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE89 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE88 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE87 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE86 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE85 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE84 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE83 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE82 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE81 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE80 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE79 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE78 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE77 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE76 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE75 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE74 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE73 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE72 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE71 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE70 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE69 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE68 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE67 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE66 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE65 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE64 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x308++0x03 hide.long 0x00 "ACTIVE2,Active Bit Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) rgroup.long 0x30C++0x03 line.long 0x00 "ACTIVE3,Active Bit Register 3" bitfld.long 0x00 31. " ACTIVE127 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE126 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE125 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE124 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE123 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE122 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE121 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE120 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE119 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE118 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE117 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE116 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE115 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE114 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE113 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE112 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE111 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE110 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE109 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE108 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE107 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE106 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE105 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE104 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE103 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE102 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE101 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE100 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE99 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE98 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE97 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE96 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x30C++0x03 hide.long 0x00 "ACTIVE3,Active Bit Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) rgroup.long 0x310++0x03 line.long 0x00 "ACTIVE4,Active Bit Register 4" bitfld.long 0x00 31. " ACTIVE159 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE158 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE157 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE156 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE155 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE154 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE153 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE152 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE151 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE150 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE149 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE148 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE147 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE146 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE145 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE144 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE143 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE142 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE141 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE140 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE139 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE138 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE137 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE136 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE135 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE134 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE133 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE132 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE131 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE130 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE129 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE128 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x310++0x03 hide.long 0x00 "ACTIVE4,Active Bit Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) rgroup.long 0x314++0x03 line.long 0x00 "ACTIVE5,Active Bit Register 5" bitfld.long 0x00 31. " ACTIVE191 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE190 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE189 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE188 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE187 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE186 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE185 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE184 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE183 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE182 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE181 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE180 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE179 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE178 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE177 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE176 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE175 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE174 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE173 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE172 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE171 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE170 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE169 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE168 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE167 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE166 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE165 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE164 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE163 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE162 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE161 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE160 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x314++0x03 hide.long 0x00 "ACTIVE5,Active Bit Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) rgroup.long 0x318++0x03 line.long 0x00 "ACTIVE6,Active Bit Register 6" bitfld.long 0x00 31. " ACTIVE223 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE222 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE221 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE220 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE219 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE218 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE217 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE216 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE215 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE214 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE213 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE212 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE211 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE210 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE209 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE208 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE207 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE206 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE205 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE204 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE203 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE202 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE201 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE200 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE199 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE198 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE197 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE196 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE195 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE194 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE193 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE192 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x318++0x03 hide.long 0x00 "ACTIVE6,Active Bit Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) rgroup.long 0x31C++0x03 line.long 0x00 "ACTIVE7,Active Bit Register 7" bitfld.long 0x00 31. " ACTIVE255 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE254 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE253 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE252 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE251 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE250 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE249 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE248 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE247 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE246 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE245 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE244 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE243 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE242 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE241 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE240 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE239 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE238 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE237 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE236 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE235 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE234 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE233 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE232 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE231 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE230 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE229 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE228 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE227 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE226 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE225 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE224 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x31C++0x03 hide.long 0x00 "ACTIVE7,Active Bit Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) rgroup.long 0x320++0x03 line.long 0x00 "ACTIVE8,Active Bit Register 8" bitfld.long 0x00 31. " ACTIVE287 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE286 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE285 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE284 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE283 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE282 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE281 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE280 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE279 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE278 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE277 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE276 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE275 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE274 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE273 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE272 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE271 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE270 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE269 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE268 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE267 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE266 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE265 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE264 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE263 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE262 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE261 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE260 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE259 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE258 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE257 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE256 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x320++0x03 hide.long 0x00 "ACTIVE8,Active Bit Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) rgroup.long 0x324++0x03 line.long 0x00 "ACTIVE9,Active Bit Register 9" bitfld.long 0x00 31. " ACTIVE319 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE318 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE317 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE316 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE315 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE314 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE313 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE312 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE311 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE310 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE309 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE308 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE307 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE306 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE305 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE304 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE303 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE302 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE301 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE300 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE299 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE298 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE297 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE296 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE295 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE294 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE293 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE292 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE291 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE290 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE289 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE288 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x324++0x03 hide.long 0x00 "ACTIVE9,Active Bit Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) rgroup.long 0x328++0x03 line.long 0x00 "ACTIVE10,Active Bit Register 10" bitfld.long 0x00 31. " ACTIVE351 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE350 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE349 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE348 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE347 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE346 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE345 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE344 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE343 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE342 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE341 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE340 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE339 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE338 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE337 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE336 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE335 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE334 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE333 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE332 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE331 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE330 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE329 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE328 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE327 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE326 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE325 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE324 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE323 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE322 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE321 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE320 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x328++0x03 hide.long 0x00 "ACTIVE10,Active Bit Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) rgroup.long 0x32C++0x03 line.long 0x00 "ACTIVE11,Active Bit Register 11" bitfld.long 0x00 31. " ACTIVE383 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE382 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE381 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE380 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE379 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE378 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE377 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE376 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE375 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE374 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE373 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE372 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE371 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE370 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE369 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE368 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE367 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE366 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE365 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE364 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE363 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE362 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE361 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE360 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE359 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE358 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE357 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE356 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE355 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE354 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE353 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE352 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x32C++0x03 hide.long 0x00 "ACTIVE11,Active Bit Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) rgroup.long 0x330++0x03 line.long 0x00 "ACTIVE12,Active Bit Register 12" bitfld.long 0x00 31. " ACTIVE415 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE414 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE413 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE412 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE411 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE410 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE409 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE408 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE407 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE406 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE405 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE404 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE403 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE402 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE401 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE400 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE399 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE398 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE397 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE396 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE395 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE394 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE393 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE392 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE391 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE390 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE389 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE388 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE387 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE386 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE385 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE384 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x330++0x03 hide.long 0x00 "ACTIVE12,Active Bit Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) rgroup.long 0x334++0x03 line.long 0x00 "ACTIVE13,Active Bit Register 13" bitfld.long 0x00 31. " ACTIVE447 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE446 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE445 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE444 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE443 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE442 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE441 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE440 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE439 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE438 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE437 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE436 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE435 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE434 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE433 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE432 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE431 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE430 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE429 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE428 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE427 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE426 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE425 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE424 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE423 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE422 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE421 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE420 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE419 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE418 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE417 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE416 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x334++0x03 hide.long 0x00 "ACTIVE13,Active Bit Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) rgroup.long 0x338++0x03 line.long 0x00 "ACTIVE14,Active Bit Register 14" bitfld.long 0x00 31. " ACTIVE479 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE478 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE477 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE476 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE475 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE474 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 25. " ACTIVE473 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE472 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE471 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE470 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE469 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE468 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 19. " ACTIVE467 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE466 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE465 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE464 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE463 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE462 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 13. " ACTIVE461 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE460 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE459 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE458 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE457 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE456 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 7. " ACTIVE455 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE454 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE453 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE452 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE451 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE450 ,Interrupt active flag" "Not active,Active" newline bitfld.long 0x00 1. " ACTIVE449 ,Interrupt active flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE448 ,Interrupt active flag" "Not active,Active" else hgroup.long 0x338++0x03 hide.long 0x00 "ACTIVE14,Active Bit Register 14" endif tree.end width 13. tree "Interrupt Target Non-Secure Registers" group.long 0x380++0x03 line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0" bitfld.long 0x00 31. " ITNS31 ,Interrupt targets non-secure 31" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS30 ,Interrupt targets non-secure 30" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS29 ,Interrupt targets non-secure 29" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS28 ,Interrupt targets non-secure 28" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS27 ,Interrupt targets non-secure 27" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS26 ,Interrupt targets non-secure 26" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS25 ,Interrupt targets non-secure 25" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS24 ,Interrupt targets non-secure 24" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS23 ,Interrupt targets non-secure 23" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS22 ,Interrupt targets non-secure 22" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS21 ,Interrupt targets non-secure 21" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS20 ,Interrupt targets non-secure 20" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS19 ,Interrupt targets non-secure 19" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS18 ,Interrupt targets non-secure 18" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS17 ,Interrupt targets non-secure 17" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS16 ,Interrupt targets non-secure 16" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS15 ,Interrupt targets non-secure 15" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS14 ,Interrupt targets non-secure 14" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS13 ,Interrupt targets non-secure 13" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS12 ,Interrupt targets non-secure 12" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS11 ,Interrupt targets non-secure 11" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS10 ,Interrupt targets non-secure 10" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS9 ,Interrupt targets non-secure 9" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS8 ,Interrupt targets non-secure 8" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS7 ,Interrupt targets non-secure 7" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS6 ,Interrupt targets non-secure 6" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS5 ,Interrupt targets non-secure 5" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS4 ,Interrupt targets non-secure 4" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS3 ,Interrupt targets non-secure 3" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS2 ,Interrupt targets non-secure 2" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS1 ,Interrupt targets non-secure 1" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS0 ,Interrupt targets non-secure 0" "Secure,Non-secure" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x384++0x03 line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" bitfld.long 0x00 31. " ITNS63 ,Interrupt targets non-secure 63" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS62 ,Interrupt targets non-secure 62" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS61 ,Interrupt targets non-secure 61" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS60 ,Interrupt targets non-secure 60" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS59 ,Interrupt targets non-secure 59" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS58 ,Interrupt targets non-secure 58" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS57 ,Interrupt targets non-secure 57" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS56 ,Interrupt targets non-secure 56" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS55 ,Interrupt targets non-secure 55" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS54 ,Interrupt targets non-secure 54" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS53 ,Interrupt targets non-secure 53" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS52 ,Interrupt targets non-secure 52" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS51 ,Interrupt targets non-secure 51" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS50 ,Interrupt targets non-secure 50" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS49 ,Interrupt targets non-secure 49" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS48 ,Interrupt targets non-secure 48" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS47 ,Interrupt targets non-secure 47" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS46 ,Interrupt targets non-secure 46" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS45 ,Interrupt targets non-secure 45" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS44 ,Interrupt targets non-secure 44" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS43 ,Interrupt targets non-secure 43" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS42 ,Interrupt targets non-secure 42" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS41 ,Interrupt targets non-secure 41" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS40 ,Interrupt targets non-secure 40" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS39 ,Interrupt targets non-secure 39" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS38 ,Interrupt targets non-secure 38" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS37 ,Interrupt targets non-secure 37" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS36 ,Interrupt targets non-secure 36" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS35 ,Interrupt targets non-secure 35" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS34 ,Interrupt targets non-secure 34" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS33 ,Interrupt targets non-secure 33" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS32 ,Interrupt targets non-secure 32" "Secure,Non-secure" else hgroup.long 0x384++0x03 hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x388++0x03 line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" bitfld.long 0x00 31. " ITNS95 ,Interrupt targets non-secure 95" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS94 ,Interrupt targets non-secure 94" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS93 ,Interrupt targets non-secure 93" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS92 ,Interrupt targets non-secure 92" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS91 ,Interrupt targets non-secure 91" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS90 ,Interrupt targets non-secure 90" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS89 ,Interrupt targets non-secure 89" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS88 ,Interrupt targets non-secure 88" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS87 ,Interrupt targets non-secure 87" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS86 ,Interrupt targets non-secure 86" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS85 ,Interrupt targets non-secure 85" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS84 ,Interrupt targets non-secure 84" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS83 ,Interrupt targets non-secure 83" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS82 ,Interrupt targets non-secure 82" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS81 ,Interrupt targets non-secure 81" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS80 ,Interrupt targets non-secure 80" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS79 ,Interrupt targets non-secure 79" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS78 ,Interrupt targets non-secure 78" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS77 ,Interrupt targets non-secure 77" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS76 ,Interrupt targets non-secure 76" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS75 ,Interrupt targets non-secure 75" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS74 ,Interrupt targets non-secure 74" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS73 ,Interrupt targets non-secure 73" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS72 ,Interrupt targets non-secure 72" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS71 ,Interrupt targets non-secure 71" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS70 ,Interrupt targets non-secure 70" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS69 ,Interrupt targets non-secure 69" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS68 ,Interrupt targets non-secure 68" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS67 ,Interrupt targets non-secure 67" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS66 ,Interrupt targets non-secure 66" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS65 ,Interrupt targets non-secure 65" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS64 ,Interrupt targets non-secure 64" "Secure,Non-secure" else hgroup.long 0x388++0x03 hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x38C++0x03 line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" bitfld.long 0x00 31. " ITNS127 ,Interrupt targets non-secure 127" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS126 ,Interrupt targets non-secure 126" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS125 ,Interrupt targets non-secure 125" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS124 ,Interrupt targets non-secure 124" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS123 ,Interrupt targets non-secure 123" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS122 ,Interrupt targets non-secure 122" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS121 ,Interrupt targets non-secure 121" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS120 ,Interrupt targets non-secure 120" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS119 ,Interrupt targets non-secure 119" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS118 ,Interrupt targets non-secure 118" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS117 ,Interrupt targets non-secure 117" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS116 ,Interrupt targets non-secure 116" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS115 ,Interrupt targets non-secure 115" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS114 ,Interrupt targets non-secure 114" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS113 ,Interrupt targets non-secure 113" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS112 ,Interrupt targets non-secure 112" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS111 ,Interrupt targets non-secure 111" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS110 ,Interrupt targets non-secure 110" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS109 ,Interrupt targets non-secure 109" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS108 ,Interrupt targets non-secure 108" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS107 ,Interrupt targets non-secure 107" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS106 ,Interrupt targets non-secure 106" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS105 ,Interrupt targets non-secure 105" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS104 ,Interrupt targets non-secure 104" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS103 ,Interrupt targets non-secure 103" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS102 ,Interrupt targets non-secure 102" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS101 ,Interrupt targets non-secure 101" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS100 ,Interrupt targets non-secure 100" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS99 ,Interrupt targets non-secure 99" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS98 ,Interrupt targets non-secure 98" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS97 ,Interrupt targets non-secure 97" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS96 ,Interrupt targets non-secure 96" "Secure,Non-secure" else hgroup.long 0x38C++0x03 hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x390++0x03 line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" bitfld.long 0x00 31. " ITNS159 ,Interrupt targets non-secure 159" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS158 ,Interrupt targets non-secure 158" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS157 ,Interrupt targets non-secure 157" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS156 ,Interrupt targets non-secure 156" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS155 ,Interrupt targets non-secure 155" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS154 ,Interrupt targets non-secure 154" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS153 ,Interrupt targets non-secure 153" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS152 ,Interrupt targets non-secure 152" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS151 ,Interrupt targets non-secure 151" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS150 ,Interrupt targets non-secure 150" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS149 ,Interrupt targets non-secure 149" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS148 ,Interrupt targets non-secure 148" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS147 ,Interrupt targets non-secure 147" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS146 ,Interrupt targets non-secure 146" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS145 ,Interrupt targets non-secure 145" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS144 ,Interrupt targets non-secure 144" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS143 ,Interrupt targets non-secure 143" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS142 ,Interrupt targets non-secure 142" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS141 ,Interrupt targets non-secure 141" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS140 ,Interrupt targets non-secure 140" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS139 ,Interrupt targets non-secure 139" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS138 ,Interrupt targets non-secure 138" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS137 ,Interrupt targets non-secure 137" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS136 ,Interrupt targets non-secure 136" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS135 ,Interrupt targets non-secure 135" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS134 ,Interrupt targets non-secure 134" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS133 ,Interrupt targets non-secure 133" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS132 ,Interrupt targets non-secure 132" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS131 ,Interrupt targets non-secure 131" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS130 ,Interrupt targets non-secure 130" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS129 ,Interrupt targets non-secure 129" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS128 ,Interrupt targets non-secure 128" "Secure,Non-secure" else hgroup.long 0x390++0x03 hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x394++0x03 line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" bitfld.long 0x00 31. " ITNS191 ,Interrupt targets non-secure 191" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS190 ,Interrupt targets non-secure 190" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS189 ,Interrupt targets non-secure 189" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS188 ,Interrupt targets non-secure 188" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS187 ,Interrupt targets non-secure 187" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS186 ,Interrupt targets non-secure 186" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS185 ,Interrupt targets non-secure 185" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS184 ,Interrupt targets non-secure 184" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS183 ,Interrupt targets non-secure 183" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS182 ,Interrupt targets non-secure 182" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS181 ,Interrupt targets non-secure 181" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS180 ,Interrupt targets non-secure 180" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS179 ,Interrupt targets non-secure 179" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS178 ,Interrupt targets non-secure 178" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS177 ,Interrupt targets non-secure 177" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS176 ,Interrupt targets non-secure 176" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS175 ,Interrupt targets non-secure 175" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS174 ,Interrupt targets non-secure 174" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS173 ,Interrupt targets non-secure 173" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS172 ,Interrupt targets non-secure 172" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS171 ,Interrupt targets non-secure 171" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS170 ,Interrupt targets non-secure 170" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS169 ,Interrupt targets non-secure 169" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS168 ,Interrupt targets non-secure 168" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS167 ,Interrupt targets non-secure 167" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS166 ,Interrupt targets non-secure 166" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS165 ,Interrupt targets non-secure 165" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS164 ,Interrupt targets non-secure 164" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS163 ,Interrupt targets non-secure 163" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS162 ,Interrupt targets non-secure 162" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS161 ,Interrupt targets non-secure 161" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS160 ,Interrupt targets non-secure 160" "Secure,Non-secure" else hgroup.long 0x394++0x03 hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x398++0x03 line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" bitfld.long 0x00 31. " ITNS223 ,Interrupt targets non-secure 223" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS222 ,Interrupt targets non-secure 222" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS221 ,Interrupt targets non-secure 221" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS220 ,Interrupt targets non-secure 220" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS219 ,Interrupt targets non-secure 219" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS218 ,Interrupt targets non-secure 218" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS217 ,Interrupt targets non-secure 217" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS216 ,Interrupt targets non-secure 216" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS215 ,Interrupt targets non-secure 215" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS214 ,Interrupt targets non-secure 214" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS213 ,Interrupt targets non-secure 213" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS212 ,Interrupt targets non-secure 212" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS211 ,Interrupt targets non-secure 211" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS210 ,Interrupt targets non-secure 210" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS209 ,Interrupt targets non-secure 209" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS208 ,Interrupt targets non-secure 208" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS207 ,Interrupt targets non-secure 207" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS206 ,Interrupt targets non-secure 206" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS205 ,Interrupt targets non-secure 205" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS204 ,Interrupt targets non-secure 204" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS203 ,Interrupt targets non-secure 203" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS202 ,Interrupt targets non-secure 202" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS201 ,Interrupt targets non-secure 201" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS200 ,Interrupt targets non-secure 200" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS199 ,Interrupt targets non-secure 199" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS198 ,Interrupt targets non-secure 198" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS197 ,Interrupt targets non-secure 197" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS196 ,Interrupt targets non-secure 196" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS195 ,Interrupt targets non-secure 195" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS194 ,Interrupt targets non-secure 194" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS193 ,Interrupt targets non-secure 193" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS192 ,Interrupt targets non-secure 192" "Secure,Non-secure" else hgroup.long 0x398++0x03 hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x39C++0x03 line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" bitfld.long 0x00 31. " ITNS255 ,Interrupt targets non-secure 255" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS254 ,Interrupt targets non-secure 254" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS253 ,Interrupt targets non-secure 253" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS252 ,Interrupt targets non-secure 252" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS251 ,Interrupt targets non-secure 251" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS250 ,Interrupt targets non-secure 250" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS249 ,Interrupt targets non-secure 249" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS248 ,Interrupt targets non-secure 248" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS247 ,Interrupt targets non-secure 247" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS246 ,Interrupt targets non-secure 246" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS245 ,Interrupt targets non-secure 245" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS244 ,Interrupt targets non-secure 244" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS243 ,Interrupt targets non-secure 243" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS242 ,Interrupt targets non-secure 242" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS241 ,Interrupt targets non-secure 241" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS240 ,Interrupt targets non-secure 240" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS239 ,Interrupt targets non-secure 239" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS238 ,Interrupt targets non-secure 238" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS237 ,Interrupt targets non-secure 237" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS236 ,Interrupt targets non-secure 236" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS235 ,Interrupt targets non-secure 235" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS234 ,Interrupt targets non-secure 234" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS233 ,Interrupt targets non-secure 233" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS232 ,Interrupt targets non-secure 232" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS231 ,Interrupt targets non-secure 231" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS230 ,Interrupt targets non-secure 230" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS229 ,Interrupt targets non-secure 229" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS228 ,Interrupt targets non-secure 228" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS227 ,Interrupt targets non-secure 227" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS226 ,Interrupt targets non-secure 226" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS225 ,Interrupt targets non-secure 225" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS224 ,Interrupt targets non-secure 224" "Secure,Non-secure" else hgroup.long 0x39C++0x03 hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x3A0++0x03 line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" bitfld.long 0x00 31. " ITNS287 ,Interrupt targets non-secure 287" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS286 ,Interrupt targets non-secure 286" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS285 ,Interrupt targets non-secure 285" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS284 ,Interrupt targets non-secure 284" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS283 ,Interrupt targets non-secure 283" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS282 ,Interrupt targets non-secure 282" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS281 ,Interrupt targets non-secure 281" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS280 ,Interrupt targets non-secure 280" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS279 ,Interrupt targets non-secure 279" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS278 ,Interrupt targets non-secure 278" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS277 ,Interrupt targets non-secure 277" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS276 ,Interrupt targets non-secure 276" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS275 ,Interrupt targets non-secure 275" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS274 ,Interrupt targets non-secure 274" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS273 ,Interrupt targets non-secure 273" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS272 ,Interrupt targets non-secure 272" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS271 ,Interrupt targets non-secure 271" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS270 ,Interrupt targets non-secure 270" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS269 ,Interrupt targets non-secure 269" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS268 ,Interrupt targets non-secure 268" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS267 ,Interrupt targets non-secure 267" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS266 ,Interrupt targets non-secure 266" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS265 ,Interrupt targets non-secure 265" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS264 ,Interrupt targets non-secure 264" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS263 ,Interrupt targets non-secure 263" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS262 ,Interrupt targets non-secure 262" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS261 ,Interrupt targets non-secure 261" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS260 ,Interrupt targets non-secure 260" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS259 ,Interrupt targets non-secure 259" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS258 ,Interrupt targets non-secure 258" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS257 ,Interrupt targets non-secure 257" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS256 ,Interrupt targets non-secure 256" "Secure,Non-secure" else hgroup.long 0x3A0++0x03 hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x3A4++0x03 line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" bitfld.long 0x00 31. " ITNS319 ,Interrupt targets non-secure 319" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS318 ,Interrupt targets non-secure 318" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS317 ,Interrupt targets non-secure 317" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS316 ,Interrupt targets non-secure 316" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS315 ,Interrupt targets non-secure 315" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS314 ,Interrupt targets non-secure 314" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS313 ,Interrupt targets non-secure 313" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS312 ,Interrupt targets non-secure 312" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS311 ,Interrupt targets non-secure 311" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS310 ,Interrupt targets non-secure 310" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS309 ,Interrupt targets non-secure 309" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS308 ,Interrupt targets non-secure 308" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS307 ,Interrupt targets non-secure 307" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS306 ,Interrupt targets non-secure 306" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS305 ,Interrupt targets non-secure 305" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS304 ,Interrupt targets non-secure 304" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS303 ,Interrupt targets non-secure 303" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS302 ,Interrupt targets non-secure 302" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS301 ,Interrupt targets non-secure 301" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS300 ,Interrupt targets non-secure 300" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS299 ,Interrupt targets non-secure 299" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS298 ,Interrupt targets non-secure 298" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS297 ,Interrupt targets non-secure 297" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS296 ,Interrupt targets non-secure 296" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS295 ,Interrupt targets non-secure 295" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS294 ,Interrupt targets non-secure 294" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS293 ,Interrupt targets non-secure 293" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS292 ,Interrupt targets non-secure 292" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS291 ,Interrupt targets non-secure 291" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS290 ,Interrupt targets non-secure 290" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS289 ,Interrupt targets non-secure 289" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS288 ,Interrupt targets non-secure 288" "Secure,Non-secure" else hgroup.long 0x3A4++0x03 hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x3A8++0x03 line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" bitfld.long 0x00 31. " ITNS351 ,Interrupt targets non-secure 351" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS350 ,Interrupt targets non-secure 350" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS349 ,Interrupt targets non-secure 349" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS348 ,Interrupt targets non-secure 348" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS347 ,Interrupt targets non-secure 347" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS346 ,Interrupt targets non-secure 346" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS345 ,Interrupt targets non-secure 345" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS344 ,Interrupt targets non-secure 344" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS343 ,Interrupt targets non-secure 343" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS342 ,Interrupt targets non-secure 342" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS341 ,Interrupt targets non-secure 341" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS340 ,Interrupt targets non-secure 340" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS339 ,Interrupt targets non-secure 339" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS338 ,Interrupt targets non-secure 338" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS337 ,Interrupt targets non-secure 337" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS336 ,Interrupt targets non-secure 336" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS335 ,Interrupt targets non-secure 335" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS334 ,Interrupt targets non-secure 334" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS333 ,Interrupt targets non-secure 333" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS332 ,Interrupt targets non-secure 332" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS331 ,Interrupt targets non-secure 331" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS330 ,Interrupt targets non-secure 330" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS329 ,Interrupt targets non-secure 329" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS328 ,Interrupt targets non-secure 328" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS327 ,Interrupt targets non-secure 327" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS326 ,Interrupt targets non-secure 326" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS325 ,Interrupt targets non-secure 325" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS324 ,Interrupt targets non-secure 324" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS323 ,Interrupt targets non-secure 323" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS322 ,Interrupt targets non-secure 322" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS321 ,Interrupt targets non-secure 321" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS320 ,Interrupt targets non-secure 320" "Secure,Non-secure" else hgroup.long 0x3A8++0x03 hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x3AC++0x03 line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" bitfld.long 0x00 31. " ITNS383 ,Interrupt targets non-secure 383" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS382 ,Interrupt targets non-secure 382" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS381 ,Interrupt targets non-secure 381" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS380 ,Interrupt targets non-secure 380" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS379 ,Interrupt targets non-secure 379" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS378 ,Interrupt targets non-secure 378" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS377 ,Interrupt targets non-secure 377" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS376 ,Interrupt targets non-secure 376" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS375 ,Interrupt targets non-secure 375" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS374 ,Interrupt targets non-secure 374" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS373 ,Interrupt targets non-secure 373" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS372 ,Interrupt targets non-secure 372" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS371 ,Interrupt targets non-secure 371" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS370 ,Interrupt targets non-secure 370" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS369 ,Interrupt targets non-secure 369" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS368 ,Interrupt targets non-secure 368" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS367 ,Interrupt targets non-secure 367" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS366 ,Interrupt targets non-secure 366" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS365 ,Interrupt targets non-secure 365" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS364 ,Interrupt targets non-secure 364" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS363 ,Interrupt targets non-secure 363" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS362 ,Interrupt targets non-secure 362" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS361 ,Interrupt targets non-secure 361" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS360 ,Interrupt targets non-secure 360" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS359 ,Interrupt targets non-secure 359" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS358 ,Interrupt targets non-secure 358" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS357 ,Interrupt targets non-secure 357" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS356 ,Interrupt targets non-secure 356" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS355 ,Interrupt targets non-secure 355" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS354 ,Interrupt targets non-secure 354" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS353 ,Interrupt targets non-secure 353" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS352 ,Interrupt targets non-secure 352" "Secure,Non-secure" else hgroup.long 0x3AC++0x03 hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x3B0++0x03 line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" bitfld.long 0x00 31. " ITNS415 ,Interrupt targets non-secure 415" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS414 ,Interrupt targets non-secure 414" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS413 ,Interrupt targets non-secure 413" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS412 ,Interrupt targets non-secure 412" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS411 ,Interrupt targets non-secure 411" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS410 ,Interrupt targets non-secure 410" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS409 ,Interrupt targets non-secure 409" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS408 ,Interrupt targets non-secure 408" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS407 ,Interrupt targets non-secure 407" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS406 ,Interrupt targets non-secure 406" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS405 ,Interrupt targets non-secure 405" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS404 ,Interrupt targets non-secure 404" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS403 ,Interrupt targets non-secure 403" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS402 ,Interrupt targets non-secure 402" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS401 ,Interrupt targets non-secure 401" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS400 ,Interrupt targets non-secure 400" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS399 ,Interrupt targets non-secure 399" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS398 ,Interrupt targets non-secure 398" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS397 ,Interrupt targets non-secure 397" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS396 ,Interrupt targets non-secure 396" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS395 ,Interrupt targets non-secure 395" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS394 ,Interrupt targets non-secure 394" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS393 ,Interrupt targets non-secure 393" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS392 ,Interrupt targets non-secure 392" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS391 ,Interrupt targets non-secure 391" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS390 ,Interrupt targets non-secure 390" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS389 ,Interrupt targets non-secure 389" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS388 ,Interrupt targets non-secure 388" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS387 ,Interrupt targets non-secure 387" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS386 ,Interrupt targets non-secure 386" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS385 ,Interrupt targets non-secure 385" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS384 ,Interrupt targets non-secure 384" "Secure,Non-secure" else hgroup.long 0x3B0++0x03 hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x3B4++0x03 line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" bitfld.long 0x00 31. " ITNS447 ,Interrupt targets non-secure 447" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS446 ,Interrupt targets non-secure 446" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS445 ,Interrupt targets non-secure 445" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS444 ,Interrupt targets non-secure 444" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS443 ,Interrupt targets non-secure 443" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS442 ,Interrupt targets non-secure 442" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS441 ,Interrupt targets non-secure 441" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS440 ,Interrupt targets non-secure 440" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS439 ,Interrupt targets non-secure 439" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS438 ,Interrupt targets non-secure 438" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS437 ,Interrupt targets non-secure 437" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS436 ,Interrupt targets non-secure 436" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS435 ,Interrupt targets non-secure 435" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS434 ,Interrupt targets non-secure 434" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS433 ,Interrupt targets non-secure 433" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS432 ,Interrupt targets non-secure 432" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS431 ,Interrupt targets non-secure 431" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS430 ,Interrupt targets non-secure 430" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS429 ,Interrupt targets non-secure 429" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS428 ,Interrupt targets non-secure 428" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS427 ,Interrupt targets non-secure 427" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS426 ,Interrupt targets non-secure 426" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS425 ,Interrupt targets non-secure 425" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS424 ,Interrupt targets non-secure 424" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS423 ,Interrupt targets non-secure 423" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS422 ,Interrupt targets non-secure 422" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS421 ,Interrupt targets non-secure 421" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS420 ,Interrupt targets non-secure 420" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS419 ,Interrupt targets non-secure 419" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS418 ,Interrupt targets non-secure 418" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS417 ,Interrupt targets non-secure 417" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS416 ,Interrupt targets non-secure 416" "Secure,Non-secure" else hgroup.long 0x3B4++0x03 hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x3B8++0x03 line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" bitfld.long 0x00 31. " ITNS479 ,Interrupt targets non-secure 479" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS478 ,Interrupt targets non-secure 478" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS477 ,Interrupt targets non-secure 477" "Secure,Non-secure" newline bitfld.long 0x00 28. " ITNS476 ,Interrupt targets non-secure 476" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS475 ,Interrupt targets non-secure 475" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS474 ,Interrupt targets non-secure 474" "Secure,Non-secure" newline bitfld.long 0x00 25. " ITNS473 ,Interrupt targets non-secure 473" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS472 ,Interrupt targets non-secure 472" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS471 ,Interrupt targets non-secure 471" "Secure,Non-secure" newline bitfld.long 0x00 22. " ITNS470 ,Interrupt targets non-secure 470" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS469 ,Interrupt targets non-secure 469" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS468 ,Interrupt targets non-secure 468" "Secure,Non-secure" newline bitfld.long 0x00 19. " ITNS467 ,Interrupt targets non-secure 467" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS466 ,Interrupt targets non-secure 466" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS465 ,Interrupt targets non-secure 465" "Secure,Non-secure" newline bitfld.long 0x00 16. " ITNS464 ,Interrupt targets non-secure 464" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS463 ,Interrupt targets non-secure 463" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS462 ,Interrupt targets non-secure 462" "Secure,Non-secure" newline bitfld.long 0x00 13. " ITNS461 ,Interrupt targets non-secure 461" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS460 ,Interrupt targets non-secure 460" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS459 ,Interrupt targets non-secure 459" "Secure,Non-secure" newline bitfld.long 0x00 10. " ITNS458 ,Interrupt targets non-secure 458" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS457 ,Interrupt targets non-secure 457" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS456 ,Interrupt targets non-secure 456" "Secure,Non-secure" newline bitfld.long 0x00 7. " ITNS455 ,Interrupt targets non-secure 455" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS454 ,Interrupt targets non-secure 454" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS453 ,Interrupt targets non-secure 453" "Secure,Non-secure" newline bitfld.long 0x00 4. " ITNS452 ,Interrupt targets non-secure 452" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS451 ,Interrupt targets non-secure 451" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS450 ,Interrupt targets non-secure 450" "Secure,Non-secure" newline bitfld.long 0x00 1. " ITNS449 ,Interrupt targets non-secure 449" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS448 ,Interrupt targets non-secure 448" "Secure,Non-secure" else hgroup.long 0x3B8++0x03 hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" endif tree.end tree "Interrupt Priority Registers" group.long 0x400++0x03 line.long 0x00 "IPR0 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_3 ,Interrupt 3 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_2 ,Interrupt 2 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_1 ,Interrupt 1 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_0 ,Interrupt 0 priority" group.long 0x404++0x03 line.long 0x00 "IPR1 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Interrupt 7 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Interrupt 6 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Interrupt 5 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Interrupt 4 priority" group.long 0x408++0x03 line.long 0x00 "IPR2 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_11 ,Interrupt 11 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_10 ,Interrupt 10 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_9 ,Interrupt 9 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_8 ,Interrupt 8 priority" group.long 0x40C++0x03 line.long 0x00 "IPR3 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_15 ,Interrupt 15 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_14 ,Interrupt 14 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_13 ,Interrupt 13 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_12 ,Interrupt 12 priority" group.long 0x410++0x03 line.long 0x00 "IPR4 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_19 ,Interrupt 19 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_18 ,Interrupt 18 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_17 ,Interrupt 17 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_16 ,Interrupt 16 priority" group.long 0x414++0x03 line.long 0x00 "IPR5 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_23 ,Interrupt 23 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_22 ,Interrupt 22 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_21 ,Interrupt 21 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_20 ,Interrupt 20 priority" group.long 0x418++0x03 line.long 0x00 "IPR6 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_27 ,Interrupt 27 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_26 ,Interrupt 26 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_25 ,Interrupt 25 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_24 ,Interrupt 24 priority" group.long 0x41C++0x03 line.long 0x00 "IPR7 ,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_31 ,Interrupt 31 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_30 ,Interrupt 30 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_29 ,Interrupt 29 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_28 ,Interrupt 28 priority" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x420++0x03 line.long 0x00 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_35 ,Interrupt 35 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_34 ,Interrupt 34 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_33 ,Interrupt 33 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_32 ,Interrupt 32 priority" group.long 0x424++0x03 line.long 0x00 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_39 ,Interrupt 39 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_38 ,Interrupt 38 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_37 ,Interrupt 37 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_36 ,Interrupt 36 priority" group.long 0x428++0x03 line.long 0x00 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_43 ,Interrupt 43 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_42 ,Interrupt 42 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_41 ,Interrupt 41 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_40 ,Interrupt 40 priority" group.long 0x42C++0x03 line.long 0x00 "IPR11,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_47 ,Interrupt 47 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_46 ,Interrupt 46 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_45 ,Interrupt 45 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_44 ,Interrupt 44 priority" group.long 0x430++0x03 line.long 0x00 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_51 ,Interrupt 51 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_50 ,Interrupt 50 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_49 ,Interrupt 49 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_48 ,Interrupt 48 priority" group.long 0x434++0x03 line.long 0x00 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_55 ,Interrupt 55 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_54 ,Interrupt 54 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_53 ,Interrupt 53 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_52 ,Interrupt 52 priority" group.long 0x438++0x03 line.long 0x00 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_59 ,Interrupt 59 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_58 ,Interrupt 58 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_57 ,Interrupt 57 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_56 ,Interrupt 56 priority" group.long 0x43C++0x03 line.long 0x00 "IPR15,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_63 ,Interrupt 63 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_62 ,Interrupt 62 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_61 ,Interrupt 61 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_60 ,Interrupt 60 priority" else repeat 8. (increment 0x420 0x04)(increment 8. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x440++0x03 line.long 0x00 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_67 ,Interrupt 67 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_66 ,Interrupt 66 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_65 ,Interrupt 65 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_64 ,Interrupt 64 priority" group.long 0x444++0x03 line.long 0x00 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_71 ,Interrupt 71 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_70 ,Interrupt 70 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_69 ,Interrupt 69 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_68 ,Interrupt 68 priority" group.long 0x448++0x03 line.long 0x00 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_75 ,Interrupt 75 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_74 ,Interrupt 74 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_73 ,Interrupt 73 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_72 ,Interrupt 72 priority" group.long 0x44C++0x03 line.long 0x00 "IPR19,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_79 ,Interrupt 79 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_78 ,Interrupt 78 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_77 ,Interrupt 77 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_76 ,Interrupt 76 priority" group.long 0x450++0x03 line.long 0x00 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_83 ,Interrupt 83 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_82 ,Interrupt 82 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_81 ,Interrupt 81 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_80 ,Interrupt 80 priority" group.long 0x454++0x03 line.long 0x00 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_87 ,Interrupt 87 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_86 ,Interrupt 86 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_85 ,Interrupt 85 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_84 ,Interrupt 84 priority" group.long 0x458++0x03 line.long 0x00 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_91 ,Interrupt 91 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_90 ,Interrupt 90 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_89 ,Interrupt 89 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_88 ,Interrupt 88 priority" group.long 0x45C++0x03 line.long 0x00 "IPR23,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_95 ,Interrupt 95 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_94 ,Interrupt 94 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_93 ,Interrupt 93 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_92 ,Interrupt 92 priority" else repeat 8. (increment 0x440 0x04)(increment 16. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x460++0x03 line.long 0x00 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_99 ,Interrupt 99 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_98 ,Interrupt 98 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_97 ,Interrupt 97 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_96 ,Interrupt 96 priority" group.long 0x464++0x03 line.long 0x00 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_103 ,Interrupt 103 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_102 ,Interrupt 102 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_101 ,Interrupt 101 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_100 ,Interrupt 100 priority" group.long 0x468++0x03 line.long 0x00 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_107 ,Interrupt 107 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_106 ,Interrupt 106 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_105 ,Interrupt 105 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_104 ,Interrupt 104 priority" group.long 0x46C++0x03 line.long 0x00 "IPR27,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_111 ,Interrupt 111 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_110 ,Interrupt 110 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_109 ,Interrupt 109 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_108 ,Interrupt 108 priority" group.long 0x470++0x03 line.long 0x00 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_115 ,Interrupt 115 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_114 ,Interrupt 114 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_113 ,Interrupt 113 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_112 ,Interrupt 112 priority" group.long 0x474++0x03 line.long 0x00 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_119 ,Interrupt 119 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_118 ,Interrupt 118 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_117 ,Interrupt 117 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_116 ,Interrupt 116 priority" group.long 0x478++0x03 line.long 0x00 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_123 ,Interrupt 123 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_122 ,Interrupt 122 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_121 ,Interrupt 121 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_120 ,Interrupt 120 priority" group.long 0x47C++0x03 line.long 0x00 "IPR31,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_127 ,Interrupt 127 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_126 ,Interrupt 126 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_125 ,Interrupt 125 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_124 ,Interrupt 124 priority" else repeat 8. (increment 0x460 0x04)(increment 24. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x480++0x03 line.long 0x00 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_131 ,Interrupt 131 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_130 ,Interrupt 130 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_129 ,Interrupt 129 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_128 ,Interrupt 128 priority" group.long 0x484++0x03 line.long 0x00 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_135 ,Interrupt 135 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_134 ,Interrupt 134 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_133 ,Interrupt 133 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_132 ,Interrupt 132 priority" group.long 0x488++0x03 line.long 0x00 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_139 ,Interrupt 139 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_138 ,Interrupt 138 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_137 ,Interrupt 137 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_136 ,Interrupt 136 priority" group.long 0x48C++0x03 line.long 0x00 "IPR35,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_143 ,Interrupt 143 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_142 ,Interrupt 142 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_141 ,Interrupt 141 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_140 ,Interrupt 140 priority" group.long 0x490++0x03 line.long 0x00 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_147 ,Interrupt 147 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_146 ,Interrupt 146 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_145 ,Interrupt 145 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_144 ,Interrupt 144 priority" group.long 0x494++0x03 line.long 0x00 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_151 ,Interrupt 151 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_150 ,Interrupt 150 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_149 ,Interrupt 149 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_148 ,Interrupt 148 priority" group.long 0x498++0x03 line.long 0x00 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_155 ,Interrupt 155 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_154 ,Interrupt 154 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_153 ,Interrupt 153 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_152 ,Interrupt 152 priority" group.long 0x49C++0x03 line.long 0x00 "IPR39,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_159 ,Interrupt 159 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_158 ,Interrupt 158 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_157 ,Interrupt 157 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_156 ,Interrupt 156 priority" else repeat 8. (increment 0x480 0x04)(increment 32. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "IPR40,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_163 ,Interrupt 163 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_162 ,Interrupt 162 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_161 ,Interrupt 161 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_160 ,Interrupt 160 priority" group.long 0x4A4++0x03 line.long 0x00 "IPR41,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_167 ,Interrupt 167 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_166 ,Interrupt 166 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_165 ,Interrupt 165 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_164 ,Interrupt 164 priority" group.long 0x4A8++0x03 line.long 0x00 "IPR42,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_171 ,Interrupt 171 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_170 ,Interrupt 170 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_169 ,Interrupt 169 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_168 ,Interrupt 168 priority" group.long 0x4AC++0x03 line.long 0x00 "IPR43,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_175 ,Interrupt 175 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_174 ,Interrupt 174 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_173 ,Interrupt 173 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_172 ,Interrupt 172 priority" group.long 0x4B0++0x03 line.long 0x00 "IPR44,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_179 ,Interrupt 179 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_178 ,Interrupt 178 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_177 ,Interrupt 177 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_176 ,Interrupt 176 priority" group.long 0x4B4++0x03 line.long 0x00 "IPR45,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_183 ,Interrupt 183 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_182 ,Interrupt 182 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_181 ,Interrupt 181 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_180 ,Interrupt 180 priority" group.long 0x4B8++0x03 line.long 0x00 "IPR46,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_187 ,Interrupt 187 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_186 ,Interrupt 186 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_185 ,Interrupt 185 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_184 ,Interrupt 184 priority" group.long 0x4BC++0x03 line.long 0x00 "IPR47,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_191 ,Interrupt 191 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_190 ,Interrupt 190 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_189 ,Interrupt 189 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_188 ,Interrupt 188 priority" else repeat 8. (increment 0x4A0 0x04)(increment 40. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "IPR48,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_195 ,Interrupt 195 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_194 ,Interrupt 194 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_193 ,Interrupt 193 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_192 ,Interrupt 192 priority" group.long 0x4C4++0x03 line.long 0x00 "IPR49,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_199 ,Interrupt 199 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_198 ,Interrupt 198 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_197 ,Interrupt 197 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_196 ,Interrupt 196 priority" group.long 0x4C8++0x03 line.long 0x00 "IPR50,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_203 ,Interrupt 203 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_202 ,Interrupt 202 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_201 ,Interrupt 201 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_200 ,Interrupt 200 priority" group.long 0x4CC++0x03 line.long 0x00 "IPR51,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_207 ,Interrupt 207 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_206 ,Interrupt 206 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_205 ,Interrupt 205 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_204 ,Interrupt 204 priority" group.long 0x4D0++0x03 line.long 0x00 "IPR52,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_211 ,Interrupt 211 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_210 ,Interrupt 210 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_209 ,Interrupt 209 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_208 ,Interrupt 208 priority" group.long 0x4D4++0x03 line.long 0x00 "IPR53,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_215 ,Interrupt 215 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_214 ,Interrupt 214 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_213 ,Interrupt 213 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_212 ,Interrupt 212 priority" group.long 0x4D8++0x03 line.long 0x00 "IPR54,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_219 ,Interrupt 219 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_218 ,Interrupt 218 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_217 ,Interrupt 217 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_216 ,Interrupt 216 priority" group.long 0x4DC++0x03 line.long 0x00 "IPR55,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_223 ,Interrupt 223 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_222 ,Interrupt 222 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_221 ,Interrupt 221 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_220 ,Interrupt 220 priority" else repeat 8. (increment 0x4C0 0x04)(increment 48. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "IPR56,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_227 ,Interrupt 227 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_226 ,Interrupt 226 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_225 ,Interrupt 225 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_224 ,Interrupt 224 priority" group.long 0x4E4++0x03 line.long 0x00 "IPR57,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_231 ,Interrupt 231 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_230 ,Interrupt 230 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_229 ,Interrupt 229 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_228 ,Interrupt 228 priority" group.long 0x4E8++0x03 line.long 0x00 "IPR58,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_235 ,Interrupt 235 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_234 ,Interrupt 234 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_233 ,Interrupt 233 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_232 ,Interrupt 232 priority" group.long 0x4EC++0x03 line.long 0x00 "IPR59,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_239 ,Interrupt 239 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_238 ,Interrupt 238 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_237 ,Interrupt 237 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_236 ,Interrupt 236 priority" group.long 0x4F0++0x03 line.long 0x00 "IPR60,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_243 ,Interrupt 243 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_242 ,Interrupt 242 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_241 ,Interrupt 241 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_240 ,Interrupt 240 priority" group.long 0x4F4++0x03 line.long 0x00 "IPR61,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_247 ,Interrupt 247 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_246 ,Interrupt 246 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_245 ,Interrupt 245 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_244 ,Interrupt 244 priority" group.long 0x4F8++0x03 line.long 0x00 "IPR62,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_251 ,Interrupt 251 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_250 ,Interrupt 250 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_249 ,Interrupt 249 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_248 ,Interrupt 248 priority" group.long 0x4FC++0x03 line.long 0x00 "IPR63,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_255 ,Interrupt 255 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_254 ,Interrupt 254 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_253 ,Interrupt 253 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_252 ,Interrupt 252 priority" else repeat 8. (increment 0x4E0 0x04)(increment 56. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x500++0x03 line.long 0x00 "IPR64,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_259 ,Interrupt 259 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_258 ,Interrupt 258 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_257 ,Interrupt 257 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_256 ,Interrupt 256 priority" group.long 0x504++0x03 line.long 0x00 "IPR65,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_263 ,Interrupt 263 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_262 ,Interrupt 262 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_261 ,Interrupt 261 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_260 ,Interrupt 260 priority" group.long 0x508++0x03 line.long 0x00 "IPR66,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_267 ,Interrupt 267 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_266 ,Interrupt 266 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_265 ,Interrupt 265 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_264 ,Interrupt 264 priority" group.long 0x50C++0x03 line.long 0x00 "IPR67,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_271 ,Interrupt 271 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_270 ,Interrupt 270 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_269 ,Interrupt 269 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_268 ,Interrupt 268 priority" group.long 0x510++0x03 line.long 0x00 "IPR68,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_275 ,Interrupt 275 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_274 ,Interrupt 274 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_273 ,Interrupt 273 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_272 ,Interrupt 272 priority" group.long 0x514++0x03 line.long 0x00 "IPR69,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_279 ,Interrupt 279 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_278 ,Interrupt 278 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_277 ,Interrupt 277 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_276 ,Interrupt 276 priority" group.long 0x518++0x03 line.long 0x00 "IPR70,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_283 ,Interrupt 283 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_282 ,Interrupt 282 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_281 ,Interrupt 281 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_280 ,Interrupt 280 priority" group.long 0x51C++0x03 line.long 0x00 "IPR71,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_287 ,Interrupt 287 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_286 ,Interrupt 286 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_285 ,Interrupt 285 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_284 ,Interrupt 284 priority" else repeat 8. (increment 0x500 0x04)(increment 64. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x520++0x03 line.long 0x00 "IPR72,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_291 ,Interrupt 291 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_290 ,Interrupt 290 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_289 ,Interrupt 289 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_288 ,Interrupt 288 priority" group.long 0x524++0x03 line.long 0x00 "IPR73,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_295 ,Interrupt 295 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_294 ,Interrupt 294 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_293 ,Interrupt 293 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_292 ,Interrupt 292 priority" group.long 0x528++0x03 line.long 0x00 "IPR74,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_299 ,Interrupt 299 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_298 ,Interrupt 298 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_297 ,Interrupt 297 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_296 ,Interrupt 296 priority" group.long 0x52C++0x03 line.long 0x00 "IPR75,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_303 ,Interrupt 303 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_302 ,Interrupt 302 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_301 ,Interrupt 301 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_300 ,Interrupt 300 priority" group.long 0x530++0x03 line.long 0x00 "IPR76,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_307 ,Interrupt 307 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_306 ,Interrupt 306 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_305 ,Interrupt 305 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_304 ,Interrupt 304 priority" group.long 0x534++0x03 line.long 0x00 "IPR77,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_311 ,Interrupt 311 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_310 ,Interrupt 310 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_309 ,Interrupt 309 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_308 ,Interrupt 308 priority" group.long 0x538++0x03 line.long 0x00 "IPR78,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_315 ,Interrupt 315 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_314 ,Interrupt 314 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_313 ,Interrupt 313 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_312 ,Interrupt 312 priority" group.long 0x53C++0x03 line.long 0x00 "IPR79,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_319 ,Interrupt 319 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_318 ,Interrupt 318 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_317 ,Interrupt 317 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_316 ,Interrupt 316 priority" else repeat 8. (increment 0x520 0x04)(increment 72. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "IPR80,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_323 ,Interrupt 323 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_322 ,Interrupt 322 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_321 ,Interrupt 321 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_320 ,Interrupt 320 priority" group.long 0x544++0x03 line.long 0x00 "IPR81,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_327 ,Interrupt 327 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_326 ,Interrupt 326 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_325 ,Interrupt 325 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_324 ,Interrupt 324 priority" group.long 0x548++0x03 line.long 0x00 "IPR82,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_331 ,Interrupt 331 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_330 ,Interrupt 330 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_329 ,Interrupt 329 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_328 ,Interrupt 328 priority" group.long 0x54C++0x03 line.long 0x00 "IPR83,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_335 ,Interrupt 335 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_334 ,Interrupt 334 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_333 ,Interrupt 333 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_332 ,Interrupt 332 priority" group.long 0x550++0x03 line.long 0x00 "IPR84,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_339 ,Interrupt 339 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_338 ,Interrupt 338 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_337 ,Interrupt 337 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_336 ,Interrupt 336 priority" group.long 0x554++0x03 line.long 0x00 "IPR85,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_343 ,Interrupt 343 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_342 ,Interrupt 342 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_341 ,Interrupt 341 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_340 ,Interrupt 340 priority" group.long 0x558++0x03 line.long 0x00 "IPR86,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_347 ,Interrupt 347 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_346 ,Interrupt 346 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_345 ,Interrupt 345 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_344 ,Interrupt 344 priority" group.long 0x55C++0x03 line.long 0x00 "IPR87,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_351 ,Interrupt 351 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_350 ,Interrupt 350 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_349 ,Interrupt 349 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_348 ,Interrupt 348 priority" else repeat 8. (increment 0x540 0x04)(increment 80. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "IPR88,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_355 ,Interrupt 355 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_354 ,Interrupt 354 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_353 ,Interrupt 353 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_352 ,Interrupt 352 priority" group.long 0x564++0x03 line.long 0x00 "IPR89,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_359 ,Interrupt 359 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_358 ,Interrupt 358 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_357 ,Interrupt 357 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_356 ,Interrupt 356 priority" group.long 0x568++0x03 line.long 0x00 "IPR90,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_363 ,Interrupt 363 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_362 ,Interrupt 362 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_361 ,Interrupt 361 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_360 ,Interrupt 360 priority" group.long 0x56C++0x03 line.long 0x00 "IPR91,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_367 ,Interrupt 367 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_366 ,Interrupt 366 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_365 ,Interrupt 365 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_364 ,Interrupt 364 priority" group.long 0x570++0x03 line.long 0x00 "IPR92,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_371 ,Interrupt 371 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_370 ,Interrupt 370 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_369 ,Interrupt 369 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_368 ,Interrupt 368 priority" group.long 0x574++0x03 line.long 0x00 "IPR93,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_375 ,Interrupt 375 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_374 ,Interrupt 374 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_373 ,Interrupt 373 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_372 ,Interrupt 372 priority" group.long 0x578++0x03 line.long 0x00 "IPR94,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_379 ,Interrupt 379 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_378 ,Interrupt 378 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_377 ,Interrupt 377 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_376 ,Interrupt 376 priority" group.long 0x57C++0x03 line.long 0x00 "IPR95,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_383 ,Interrupt 383 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_382 ,Interrupt 382 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_381 ,Interrupt 381 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_380 ,Interrupt 380 priority" else repeat 8. (increment 0x560 0x04)(increment 88. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "IPR96,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_387 ,Interrupt 387 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_386 ,Interrupt 386 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_385 ,Interrupt 385 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_384 ,Interrupt 384 priority" group.long 0x584++0x03 line.long 0x00 "IPR97,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_391 ,Interrupt 391 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_390 ,Interrupt 390 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_389 ,Interrupt 389 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_388 ,Interrupt 388 priority" group.long 0x588++0x03 line.long 0x00 "IPR98,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_395 ,Interrupt 395 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_394 ,Interrupt 394 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_393 ,Interrupt 393 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_392 ,Interrupt 392 priority" group.long 0x58C++0x03 line.long 0x00 "IPR99,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_399 ,Interrupt 399 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_398 ,Interrupt 398 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_397 ,Interrupt 397 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_396 ,Interrupt 396 priority" group.long 0x590++0x03 line.long 0x00 "IPR100,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_403 ,Interrupt 403 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_402 ,Interrupt 402 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_401 ,Interrupt 401 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_400 ,Interrupt 400 priority" group.long 0x594++0x03 line.long 0x00 "IPR101,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_407 ,Interrupt 407 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_406 ,Interrupt 406 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_405 ,Interrupt 405 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_404 ,Interrupt 404 priority" group.long 0x598++0x03 line.long 0x00 "IPR102,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_411 ,Interrupt 411 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_410 ,Interrupt 410 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_409 ,Interrupt 409 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_408 ,Interrupt 408 priority" group.long 0x59C++0x03 line.long 0x00 "IPR103,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_415 ,Interrupt 415 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_414 ,Interrupt 414 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_413 ,Interrupt 413 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_412 ,Interrupt 412 priority" else repeat 8. (increment 0x580 0x04)(increment 96. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "IPR104,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_419 ,Interrupt 419 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_418 ,Interrupt 418 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_417 ,Interrupt 417 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_416 ,Interrupt 416 priority" group.long 0x5A4++0x03 line.long 0x00 "IPR105,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_423 ,Interrupt 423 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_422 ,Interrupt 422 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_421 ,Interrupt 421 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_420 ,Interrupt 420 priority" group.long 0x5A8++0x03 line.long 0x00 "IPR106,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_427 ,Interrupt 427 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_426 ,Interrupt 426 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_425 ,Interrupt 425 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_424 ,Interrupt 424 priority" group.long 0x5AC++0x03 line.long 0x00 "IPR107,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_431 ,Interrupt 431 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_430 ,Interrupt 430 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_429 ,Interrupt 429 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_428 ,Interrupt 428 priority" group.long 0x5B0++0x03 line.long 0x00 "IPR108,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_435 ,Interrupt 435 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_434 ,Interrupt 434 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_433 ,Interrupt 433 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_432 ,Interrupt 432 priority" group.long 0x5B4++0x03 line.long 0x00 "IPR109,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_439 ,Interrupt 439 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_438 ,Interrupt 438 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_437 ,Interrupt 437 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_436 ,Interrupt 436 priority" group.long 0x5B8++0x03 line.long 0x00 "IPR110,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_443 ,Interrupt 443 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_442 ,Interrupt 442 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_441 ,Interrupt 441 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_440 ,Interrupt 440 priority" group.long 0x5BC++0x03 line.long 0x00 "IPR111,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_447 ,Interrupt 447 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_446 ,Interrupt 446 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_445 ,Interrupt 445 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_444 ,Interrupt 444 priority" else repeat 8. (increment 0x5A0 0x04)(increment 104. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "IPR112,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_451 ,Interrupt 451 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_450 ,Interrupt 450 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_449 ,Interrupt 449 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_448 ,Interrupt 448 priority" group.long 0x5C4++0x03 line.long 0x00 "IPR113,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_455 ,Interrupt 455 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_454 ,Interrupt 454 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_453 ,Interrupt 453 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_452 ,Interrupt 452 priority" group.long 0x5C8++0x03 line.long 0x00 "IPR114,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_459 ,Interrupt 459 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_458 ,Interrupt 458 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_457 ,Interrupt 457 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_456 ,Interrupt 456 priority" group.long 0x5CC++0x03 line.long 0x00 "IPR115,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_463 ,Interrupt 463 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_462 ,Interrupt 462 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_461 ,Interrupt 461 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_460 ,Interrupt 460 priority" group.long 0x5D0++0x03 line.long 0x00 "IPR116,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_467 ,Interrupt 467 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_466 ,Interrupt 466 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_465 ,Interrupt 465 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_464 ,Interrupt 464 priority" group.long 0x5D4++0x03 line.long 0x00 "IPR117,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_471 ,Interrupt 471 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_470 ,Interrupt 470 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_469 ,Interrupt 469 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_468 ,Interrupt 468 priority" group.long 0x5D8++0x03 line.long 0x00 "IPR118,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_475 ,Interrupt 475 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_474 ,Interrupt 474 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_473 ,Interrupt 473 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_472 ,Interrupt 472 priority" group.long 0x5DC++0x03 line.long 0x00 "IPR119,Interrupt Priority Register" hexmask.long.byte 0x00 24.--31. 1. " PRI_479 ,Interrupt 479 priority" hexmask.long.byte 0x00 16.--23. 1. " PRI_478 ,Interrupt 478 priority" hexmask.long.byte 0x00 8.--15. 1. " PRI_477 ,Interrupt 477 priority" hexmask.long.byte 0x00 0.--7. 1. " PRI_476 ,Interrupt 476 priority" else repeat 8. (increment 0x5C0 0x04)(increment 112. 1.) hgroup.long $1++0x03 hide.long 0x00 "IPR$2,Interrupt Priority Register" repeat.end endif tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Floating-Point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the non-secure state" "Writeable,Write ignored" newline bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled" bitfld.long 0x00 27. " CLRONRETS ,Clear on return secure only" "Both states,Secure only" bitfld.long 0x00 26. " TS ,Treat as secure" "Disabled,Enabled" newline bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the usage fault exception to pending" "Not able,Able" bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" newline bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able" bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" newline bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure" newline bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x08 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" newline bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" bitfld.long 0x08 19. " FZ16 ,Flush-to-zero mode control bit on half-precision data-processing instructions" "Disabled,Enabled" bitfld.long 0x08 16.--18. " LTPSIZE ,Vector element size used when applying low-overhead-loop tail predication to vector instructions" "8-bit,16-bit,32-bit,64-bit,Not applied,?..." rgroup.long 0xF40++0x0B line.long 0x00 "MVFR0,Media And FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" "Not supported,All supported,?..." bitfld.long 0x00 20.--23. " FPSQRT ,Indicates the hardware support for FP square root operations" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" "Not supported,Supported,?..." newline bitfld.long 0x00 8.--11. " FPDP ,Indicates the hardware support for FP double precision operations" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " FPSP ,Indicates the hardware support for FP single-precision operations" "Not supported,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" "Reserved,Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media And FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" "Not supported,Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" "Not supported,Half-single,Half-single/double,?..." bitfld.long 0x04 20.--23. " FP16 ,Floating-point half-precision data processing" "Not supported,Supported,?..." newline bitfld.long 0x04 8.--11. " MVE ,Indicates support for M-profile vector extension" "Not supported,Supported no FP,Supported with FP,?..." bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the default NaN mode" "Not supported,NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the flush-to-zero mode of operation" "Not supported,Fully denormalized,?..." line.long 0x08 "MVFR2,Media And FP Feature Register 2" bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,Reserved,Reserved,Reserved,Supported,?..." width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 13. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 5. " PMU ,Indicates whether a PMU counter overflow event has occurred" "Not occurred,Occurred" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a vector catch" "Not triggered,Triggered" newline eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates that a halt request debug event or step debug event has occurred" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--7. 1. " REGSEL ,Specifies the ARM core register special-purpose register or floating-point extension register" group.long 0xDF8++0x07 line.long 0x00 "DCRDR,Debug Core Register Data Register" line.long 0x04 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x04 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x04 23. " MONPRKEY ,Writes to the MON_PEND and MON_REQ fields are ignored" "Not ignored,Ignored" bitfld.long 0x04 21. " UMON_EN ,Unprivileged monitor enable" "Disabled,Enabled" newline rbitfld.long 0x04 20. " SDME ,Indicates whether the DebugMonitor targets the secure or the non-secure state" "Non-secure,Secure" bitfld.long 0x04 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x04 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x04 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x04 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x04 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" newline bitfld.long 0x04 10. " VC_HARDERR ,Enable halting debug trap on a hard fault exception" "Disabled,Enabled" bitfld.long 0x04 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x04 8. " VC_BUSERR ,Enable halting debug trap on a bus fault exception" "Disabled,Enabled" newline bitfld.long 0x04 7. " VC_STATERR ,Enable halting debug trap on a usage fault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x04 6. " VC_CHKERR ,Enable halting debug trap on a usage fault exception caused by a checking error" "Disabled,Enabled" bitfld.long 0x04 5. " VC_NOCPERR ,Enable halting debug trap on a usage fault caused by an access to a Coprocessor" "Disabled,Enabled" newline bitfld.long 0x04 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x04 0. " VC_CORERESET ,Enable reset vector catch" "Disabled,Enabled" group.long 0xE04++0x07 line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register" bitfld.long 0x00 10. " UIDEN ,Unprivileged invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 9. " UIDAPEN ,Unprivileged invasive DAP access enable" "Disabled,Enabled" bitfld.long 0x00 8. " FSDMA ,Force secure debug monitor allowed" "Not allowed,Allowed" newline bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN" bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled" newline bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN" line.long 0x04 "DSCSR,Debug Security Control and Status Register" bitfld.long 0x04 17. " CDSKEY ,CDS write-enable key" "Not ignored,Ignored" bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure" bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure" newline bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled" rgroup.long 0xFB8++0x03 line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 22.--23. " SUNID ,Secure unprivileged non-invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" bitfld.long 0x00 20.--21. " SUID ,Secure unprivileged invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" bitfld.long 0x00 18.--19. " NSUNID ,Non-secure unprivileged non-invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" newline bitfld.long 0x00 16.--17. " NSUID ,Non-secure unprivileged invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" bitfld.long 0x00 6.--7. " SNID ,Secure non-invasive debug" "Not implemented,Reserved,Implemented/Disabled,Implemented/Enabled" bitfld.long 0x00 4.--5. " SID ,Secure invasive debug" "Not implemented,Reserved,Implemented/Disabled,Implemented/Enabled" newline bitfld.long 0x00 2.--3. " NSNID ,Non-secure non-invasive debug" "Reserved,Reserved,Prohibited,Allowed" bitfld.long 0x00 0.--1. " NSID ,Non-secure invasive debug" "Reserved,Reserved,Prohibited,Allowed" group.long 0x10300++0x07 line.long 0x00 "CPDLPSTATE,Core Power Domain Low Power State Register" bitfld.long 0x00 8.--9. " RLPSTATE ,Power-on state for PDRAMS power domain" "ON,Reserved,Reserved,OFF" bitfld.long 0x00 4.--5. " ELPSTATE ,Type of low-power state for PDEPU" "ON,ON clock off,RET,OFF" bitfld.long 0x00 0.--1. " CLPSTATE ,Type of low-power state for PDCORE" "ON,ON clock off,RET,OFF" line.long 0x04 "DPDLPSTATE,Debug Power Domain Low Power State Register" bitfld.long 0x04 0.--1. " DLPSTATE ,Type of low-power state for PDDEBUG" "ON,ON clock off,Reserved,OFF" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "BreakPoint Unit (BPU)" sif COMPonent.AVAILABLE("BPU") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BPU",-1)) width 12. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" rbitfld.long 0x00 28.--31. " REV ,Flash patch breakpoint architecture revision" "Reserved,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "Not implemented,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 1. " KEY ,FP_CTRL write-enable key" "Ignored,Permitted" newline bitfld.long 0x00 0. " ENABLE ,Flash patch unit enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap" repeat 8. (increment 0x08 0x04) (increment 0. 1.) group.long $1++0x03 line.long 0x00 "FP_COMP$2,Flash Patch Comparator Register $2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between remapping and breakpoint functionality" "Disabled,Enabled" repeat.end rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Reserved,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "FPB v2,?..." newline bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "Reserved,FPB v2,?..." hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" width 10. tree "Peripheral Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "FP_PIDR0,FP Peripheral Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " PART_NUM[7:0] ,Part number bits[7:0]" line.long 0x04 "FP_PIDR1,FP Peripheral Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " PART_NUM[11:8] ,Part number bits[11:8]" line.long 0x08 "FP_PIDR2,FP Peripheral Identification Register 2" hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "FP_PIDR3,FP Peripheral Identification Register 3" hexmask.long.byte 0x0C 4.--7. 1. " REVAND ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "FP_PIDR4,FP Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "FP_CIDR0,FP Component Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "FP_CIDR1,FP Component Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "FP_CIDR2,FP Component Identification Register 2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0C "FP_CIDR3,FP Component Identification Register 3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0B else newline textline "BPU component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 16. group.long 0x00++0x03 line.long 0x00 "DWT_CTRL,DWT Control Register" bitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "Not supported,1,2,3,4,5,6,7,8,?..." bitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" bitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" newline bitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in secure state" "No,Yes" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow event counter packets generation" "Disabled,Enabled" newline bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the sleep counter overflow event" "Disabled,Enabled" newline bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" newline bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" newline bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x00) group.long 0x04++0x03 line.long 0x00 "DWT_CYCCNT,DWT Cycle Count Register" else rgroup.long 0x04++0x03 line.long 0x00 "DWT_CYCCNT,DWT Cycle Count Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))))&0x1000000)==0x00) group.long 0x08++0x13 line.long 0x00 "DWT_CPICNT,DWT CPI Count Register" hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter" line.long 0x04 "DWT_EXCCNT,DWT Exception Overhead Count Register" hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x08 "DWT_SLEEPCNT,DWT Sleep Count Register" hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep counter" line.long 0x0C "DWT_LSUCNT,DWT LSU Count Register" hexmask.long.byte 0x0C 0.--7. 1. " LSUCNT ,Load-store overhead counter" line.long 0x10 "DWT_FOLDCNT,DWT Folded-instruction Count Register" hexmask.long.byte 0x10 0.--7. 1. " FOLDCNT ,Folded-instruction counter" else rgroup.long 0x08++0x13 line.long 0x00 "DWT_CPICNT,DWT CPI Count Register" line.long 0x04 "DWT_EXCCNT,DWT Exception Overhead Count Register" line.long 0x08 "DWT_SLEEPCNT,DWT Sleep Count Register" line.long 0x0C "DWT_LSUCNT,DWT LSU Count Register" line.long 0x10 "DWT_FOLDCNT,DWT Folded-instruction Count Register" endif rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,DWT Program Counter Sample Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08))&0x0E)==0x02) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x0E)==0x02) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" endif group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0x0C)==0x08) group.long (0x30+0x0C)++0x03 line.long 0x00 "DWT_VMASK1,DWT Comparator Value Mask Register" bitfld.long 0x00 31. " VMASK[31] ,Data value mask 31" "Not masked,Masked" bitfld.long 0x00 30. " [30] ,Data value mask 30" "Not masked,Masked" bitfld.long 0x00 29. " [29] ,Data value mask 29" "Not masked,Masked" newline bitfld.long 0x00 28. " [28] ,Data value mask 28" "Not masked,Masked" bitfld.long 0x00 27. " [27] ,Data value mask 27" "Not masked,Masked" bitfld.long 0x00 26. " [26] ,Data value mask 26" "Not masked,Masked" newline bitfld.long 0x00 25. " [25] ,Data value mask 25" "Not masked,Masked" bitfld.long 0x00 24. " [24] ,Data value mask 24" "Not masked,Masked" bitfld.long 0x00 23. " [23] ,Data value mask 23" "Not masked,Masked" newline bitfld.long 0x00 22. " [22] ,Data value mask 22" "Not masked,Masked" bitfld.long 0x00 21. " [21] ,Data value mask 21" "Not masked,Masked" bitfld.long 0x00 20. " [20] ,Data value mask 20" "Not masked,Masked" newline bitfld.long 0x00 19. " [19] ,Data value mask 19" "Not masked,Masked" bitfld.long 0x00 18. " [18] ,Data value mask 18" "Not masked,Masked" bitfld.long 0x00 17. " [17] ,Data value mask 17" "Not masked,Masked" newline bitfld.long 0x00 16. " [16] ,Data value mask 16" "Not masked,Masked" bitfld.long 0x00 15. " [15] ,Data value mask 15" "Not masked,Masked" bitfld.long 0x00 14. " [14] ,Data value mask 14" "Not masked,Masked" newline bitfld.long 0x00 13. " [13] ,Data value mask 13" "Not masked,Masked" bitfld.long 0x00 12. " [12] ,Data value mask 12" "Not masked,Masked" bitfld.long 0x00 11. " [11] ,Data value mask 11" "Not masked,Masked" newline bitfld.long 0x00 10. " [10] ,Data value mask 10" "Not masked,Masked" bitfld.long 0x00 9. " [9] ,Data value mask 9" "Not masked,Masked" bitfld.long 0x00 8. " [8] ,Data value mask 8" "Not masked,Masked" newline bitfld.long 0x00 7. " [7] ,Data value mask 7" "Not masked,Masked" bitfld.long 0x00 6. " [6] ,Data value mask 6" "Not masked,Masked" bitfld.long 0x00 5. " [5] ,Data value mask 5" "Not masked,Masked" newline bitfld.long 0x00 4. " [4] ,Data value mask 4" "Not masked,Masked" bitfld.long 0x00 3. " [3] ,Data value mask 3" "Not masked,Masked" bitfld.long 0x00 2. " [2] ,Data value mask 2" "Not masked,Masked" newline bitfld.long 0x00 1. " [1] ,Data value mask 1" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Data value mask 0" "Not masked,Masked" else rgroup.long (0x30+0x0C)++0x03 line.long 0x00 "DWT_VMASK1,DWT Comparator Value Mask Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x0E)==0x02) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" endif group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x0E)==0x02) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" endif group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0x0C)==0x08) group.long (0x50+0x0C)++0x03 line.long 0x00 "DWT_VMASK3,DWT Comparator Value Mask Register" bitfld.long 0x00 31. " VMASK[31] ,Data value mask 31" "Not masked,Masked" bitfld.long 0x00 30. " [30] ,Data value mask 30" "Not masked,Masked" bitfld.long 0x00 29. " [29] ,Data value mask 29" "Not masked,Masked" newline bitfld.long 0x00 28. " [28] ,Data value mask 28" "Not masked,Masked" bitfld.long 0x00 27. " [27] ,Data value mask 27" "Not masked,Masked" bitfld.long 0x00 26. " [26] ,Data value mask 26" "Not masked,Masked" newline bitfld.long 0x00 25. " [25] ,Data value mask 25" "Not masked,Masked" bitfld.long 0x00 24. " [24] ,Data value mask 24" "Not masked,Masked" bitfld.long 0x00 23. " [23] ,Data value mask 23" "Not masked,Masked" newline bitfld.long 0x00 22. " [22] ,Data value mask 22" "Not masked,Masked" bitfld.long 0x00 21. " [21] ,Data value mask 21" "Not masked,Masked" bitfld.long 0x00 20. " [20] ,Data value mask 20" "Not masked,Masked" newline bitfld.long 0x00 19. " [19] ,Data value mask 19" "Not masked,Masked" bitfld.long 0x00 18. " [18] ,Data value mask 18" "Not masked,Masked" bitfld.long 0x00 17. " [17] ,Data value mask 17" "Not masked,Masked" newline bitfld.long 0x00 16. " [16] ,Data value mask 16" "Not masked,Masked" bitfld.long 0x00 15. " [15] ,Data value mask 15" "Not masked,Masked" bitfld.long 0x00 14. " [14] ,Data value mask 14" "Not masked,Masked" newline bitfld.long 0x00 13. " [13] ,Data value mask 13" "Not masked,Masked" bitfld.long 0x00 12. " [12] ,Data value mask 12" "Not masked,Masked" bitfld.long 0x00 11. " [11] ,Data value mask 11" "Not masked,Masked" newline bitfld.long 0x00 10. " [10] ,Data value mask 10" "Not masked,Masked" bitfld.long 0x00 9. " [9] ,Data value mask 9" "Not masked,Masked" bitfld.long 0x00 8. " [8] ,Data value mask 8" "Not masked,Masked" newline bitfld.long 0x00 7. " [7] ,Data value mask 7" "Not masked,Masked" bitfld.long 0x00 6. " [6] ,Data value mask 6" "Not masked,Masked" bitfld.long 0x00 5. " [5] ,Data value mask 5" "Not masked,Masked" newline bitfld.long 0x00 4. " [4] ,Data value mask 4" "Not masked,Masked" bitfld.long 0x00 3. " [3] ,Data value mask 3" "Not masked,Masked" bitfld.long 0x00 2. " [2] ,Data value mask 2" "Not masked,Masked" newline bitfld.long 0x00 1. " [1] ,Data value mask 1" "Not masked,Masked" bitfld.long 0x00 0. " [0] ,Data value mask 0" "Not masked,Masked" else rgroup.long (0x50+0x0C)++0x03 line.long 0x00 "DWT_VMASK3,DWT Comparator Value Mask Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x60+0x08))&0x0E)==0x02) group.long 0x60++0x03 line.long 0x00 "DWT_COMP4,DWT Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x60++0x03 line.long 0x00 "DWT_COMP4,DWT Comparator Register 4" endif group.long (0x60+0x08)++0x03 line.long 0x00 "DWT_FUNCTION4,DWT Function Register 4" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x70+0x08))&0x0E)==0x02) group.long 0x70++0x03 line.long 0x00 "DWT_COMP5,DWT Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x70++0x03 line.long 0x00 "DWT_COMP5,DWT Comparator Register 5" endif group.long (0x70+0x08)++0x03 line.long 0x00 "DWT_FUNCTION5,DWT Function Register 5" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x80+0x08))&0x0E)==0x02) group.long 0x80++0x03 line.long 0x00 "DWT_COMP6,DWT Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x80++0x03 line.long 0x00 "DWT_COMP6,DWT Comparator Register 6" endif group.long (0x80+0x08)++0x03 line.long 0x00 "DWT_FUNCTION6,DWT Function Register 6" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x90+0x08))&0x0E)==0x02) group.long 0x90++0x03 line.long 0x00 "DWT_COMP7,DWT Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " PCVALUE ,PC value" else group.long 0x90++0x03 line.long 0x00 "DWT_COMP7,DWT Comparator Register 7" endif group.long (0x90+0x08)++0x03 line.long 0x00 "DWT_FUNCTION7,DWT Function Register 7" rbitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr with value,Cycle counter/data addr/data addr with value,Instruction addr/data addr/data addr with value,Cycle counter/instruction addr/data addr/data addr with value,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Data addr/data addr limit/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data addr with value,Reserved,Data addr/data addr limit/data value/linked data value/data addr with value,Reserved,Instruction addr/instruction addr limit/data addr/data addr limit/data value/linked data value/data addr with value,?..." newline rbitfld.long 0x00 24. " MATCHED ,Comparator matched" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data value size" "1B,2B,4B,?..." bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace data address" newline bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value limit (R),?..." rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 0x20 " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Reserved,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "DWT v2.0,DWT v2.1,?..." newline bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "Reserved,DWT v2,?..." hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" rgroup.long 0xFCC++0x03 line.long 0x00 "DWT_DEVTYPE,DWT Device Type Identifier Register" bitfld.long 0x00 4.--7. " SUB ,Sub-type" "Other,?..." bitfld.long 0x00 0.--3. " MAJOR ,Major type" "Miscellaneous,?..." width 11. tree "Peripheral Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "DWT_PIDR0,DWT Peripheral Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " PART_NUM[7:0] ,Part number bits[7:0]" line.long 0x04 "DWT_PIDR1,DWT Peripheral Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " PART_NUM[11:8] ,Part number bits[11:8]" line.long 0x08 "DWT_PIDR2,DWT Peripheral Identification Register 2" hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "DWT_PIDR3,DWT Peripheral Identification Register 3" hexmask.long.byte 0x0C 4.--7. 1. " REVAND ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x0F line.long 0x00 "DWT_PIDR4,DWT Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" line.long 0x04 "DWT_PIDR5,DWT Peripheral Identification Register 5" line.long 0x08 "DWT_PIDR6,DWT Peripheral Identification Register 6" line.long 0x0C "DWT_PIDR7,DWT Peripheral Identification Register 7" rgroup.long 0xFF0++0x0F line.long 0x00 "DWT_CIDR0,DWT Component Identification Register 0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DWT_CIDR1,DWT Component Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DWT_CIDR2,DWT Component Identification Register 2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0C "DWT_CIDR3,DWT Component Identification Register 3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree "Performance Monitoring Unit Extension (PMU)" sif COMPonent.AVAILABLE("BMC") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1)) width 16. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x08) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x4++0x03 line.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x8++0x03 line.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0xC++0x03 line.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x10++0x03 line.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x14++0x03 line.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x18++0x03 line.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x1C++0x03 line.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x07) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x4++0x03 line.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x8++0x03 line.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0xC++0x03 line.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x10++0x03 line.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x14++0x03 line.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x18++0x03 line.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x06) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x4++0x03 line.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x8++0x03 line.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0xC++0x03 line.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x10++0x03 line.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x14++0x03 line.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" hgroup.long 0x18++0x03 hide.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x05) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x4++0x03 line.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x8++0x03 line.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0xC++0x03 line.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x10++0x03 line.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" hgroup.long 0x14++0x03 hide.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hgroup.long 0x18++0x03 hide.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x04) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x4++0x03 line.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x8++0x03 line.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0xC++0x03 line.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" hgroup.long 0x10++0x03 hide.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hgroup.long 0x14++0x03 hide.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hgroup.long 0x18++0x03 hide.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x03) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x4++0x03 line.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x8++0x03 line.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" hgroup.long 0xC++0x03 hide.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hgroup.long 0x10++0x03 hide.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hgroup.long 0x14++0x03 hide.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hgroup.long 0x18++0x03 hide.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x02) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" group.long 0x4++0x03 line.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" hgroup.long 0x8++0x03 hide.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hgroup.long 0xC++0x03 hide.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hgroup.long 0x10++0x03 hide.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hgroup.long 0x14++0x03 hide.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hgroup.long 0x18++0x03 hide.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x01) group.long 0x0++0x03 line.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hexmask.long.word 0x00 0.--15. 1. " COUNTER ,Event counter" hgroup.long 0x4++0x03 hide.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hgroup.long 0x8++0x03 hide.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hgroup.long 0xC++0x03 hide.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hgroup.long 0x10++0x03 hide.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hgroup.long 0x14++0x03 hide.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hgroup.long 0x18++0x03 hide.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" else hgroup.long 0x0++0x03 hide.long 0x00 "PMU_EVCNTR0,Performance Monitoring Unit Event Counter Register" hgroup.long 0x4++0x03 hide.long 0x00 "PMU_EVCNTR1,Performance Monitoring Unit Event Counter Register" hgroup.long 0x8++0x03 hide.long 0x00 "PMU_EVCNTR2,Performance Monitoring Unit Event Counter Register" hgroup.long 0xC++0x03 hide.long 0x00 "PMU_EVCNTR3,Performance Monitoring Unit Event Counter Register" hgroup.long 0x10++0x03 hide.long 0x00 "PMU_EVCNTR4,Performance Monitoring Unit Event Counter Register" hgroup.long 0x14++0x03 hide.long 0x00 "PMU_EVCNTR5,Performance Monitoring Unit Event Counter Register" hgroup.long 0x18++0x03 hide.long 0x00 "PMU_EVCNTR6,Performance Monitoring Unit Event Counter Register" hgroup.long 0x1C++0x03 hide.long 0x00 "PMU_EVCNTR7,Performance Monitoring Unit Event Counter Register" endif group.long 0x7C++0x03 line.long 0x00 "PMU_CCNTR,Performance Monitoring Unit Cycle Counter Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x08) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x404++0x03 line.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x408++0x03 line.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x40C++0x03 line.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x410++0x03 line.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x414++0x03 line.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x418++0x03 line.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x41C++0x03 line.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x07) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x404++0x03 line.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x408++0x03 line.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x40C++0x03 line.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x410++0x03 line.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x414++0x03 line.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x418++0x03 line.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x06) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x404++0x03 line.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x408++0x03 line.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x40C++0x03 line.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x410++0x03 line.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x414++0x03 line.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" hgroup.long 0x418++0x03 hide.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x05) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x404++0x03 line.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x408++0x03 line.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x40C++0x03 line.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x410++0x03 line.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" hgroup.long 0x414++0x03 hide.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x418++0x03 hide.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x04) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x404++0x03 line.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x408++0x03 line.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x40C++0x03 line.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" hgroup.long 0x410++0x03 hide.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x414++0x03 hide.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x418++0x03 hide.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x03) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x404++0x03 line.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x408++0x03 line.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" hgroup.long 0x40C++0x03 hide.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x410++0x03 hide.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x414++0x03 hide.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x418++0x03 hide.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x02) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" group.long 0x404++0x03 line.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" hgroup.long 0x408++0x03 hide.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x40C++0x03 hide.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x410++0x03 hide.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x414++0x03 hide.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x418++0x03 hide.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("BMC",-1))+0xE00))&0x0F)==0x01) group.long 0x400++0x03 line.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hexmask.long.word 0x00 0.--15. 1. " EVTCOUNT ,Event number" hgroup.long 0x404++0x03 hide.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x408++0x03 hide.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x40C++0x03 hide.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x410++0x03 hide.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x414++0x03 hide.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x418++0x03 hide.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" else hgroup.long 0x400++0x03 hide.long 0x00 "PMU_EVTYPER0,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x404++0x03 hide.long 0x00 "PMU_EVTYPER1,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x408++0x03 hide.long 0x00 "PMU_EVTYPER2,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x40C++0x03 hide.long 0x00 "PMU_EVTYPER3,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x410++0x03 hide.long 0x00 "PMU_EVTYPER4,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x414++0x03 hide.long 0x00 "PMU_EVTYPER5,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x418++0x03 hide.long 0x00 "PMU_EVTYPER6,Performance Monitoring Unit Event Type and Filter Register" hgroup.long 0x41C++0x03 hide.long 0x00 "PMU_EVTYPER7,Performance Monitoring Unit Event Type and Filter Register" endif rgroup.long 0x47C++0x03 line.long 0x00 "PMU_CCFILTR,Performance Monitoring Unit Cycle Counter Filter Register" group.long 0xC00++0x03 line.long 0x00 "PMU_CNTENSET,Performance Monitoring Unit Count Enable Set Register" bitfld.long 0x00 31. " C ,Cycle counter enable bit" "Disabled,Enabled" bitfld.long 0x00 7. " P7 ,Event counter PMN 7 enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,Event counter PMN 6 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 5. " P5 ,Event counter PMN 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event counter PMN 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,Event counter PMN 3 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 2. " P2 ,Event counter PMN 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event counter PMN 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event counter PMN 0 enable bit" "Disabled,Enabled" group.long 0xC20++0x03 line.long 0x00 "PMU_CNTENCLR,Performance Monitoring Unit Count Enable Clear Register" bitfld.long 0x00 31. " C ,Cycle counter enable bit" "Disabled,Enabled" bitfld.long 0x00 7. " P7 ,Event counter PMN 7 enable bit" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,Event counter PMN 6 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 5. " P5 ,Event counter PMN 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event counter PMN 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,Event counter PMN 3 enable bit" "Disabled,Enabled" newline bitfld.long 0x00 2. " P2 ,Event counter PMN 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event counter PMN 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event counter PMN 0 enable bit" "Disabled,Enabled" group.long 0xC40++0x03 line.long 0x00 "PMU_INTENSET,Performance Monitoring Unit Interrupt Enable Set Register" bitfld.long 0x00 31. " C ,CCNT overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " P7 ,PMCNT7 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,PMCNT6 overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " P5 ,PMCNT5 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " P2 ,PMCNT2 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 overflow interrupt enable" "Disabled,Enabled" group.long 0xC60++0x03 line.long 0x00 "PMU_INTENCLR,Performance Monitoring Unit Interrupt Enable Clear Register" bitfld.long 0x00 31. " C ,CCNT overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 7. " P7 ,PMCNT7 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,PMCNT6 overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 5. " P5 ,PMCNT5 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 2. " P2 ,PMCNT2 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 overflow interrupt enable" "Disabled,Enabled" group.long 0xC80++0x03 line.long 0x00 "PMU_OVSCLR,Performance Monitoring Unit Overflow Flag Status Clear Register" bitfld.long 0x00 31. " C ,PMCCNTR overflow" "No overflow,Overflow" bitfld.long 0x00 7. " P7 ,PMN7 overflow" "No overflow,Overflow" bitfld.long 0x00 6. " P6 ,PMN6 overflow" "No overflow,Overflow" newline bitfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" bitfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow" bitfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" newline bitfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" bitfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" bitfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" wgroup.long 0xCA0++0x03 line.long 0x00 "PMU_SWINC,Performance Monitoring Unit Software Increment Register" bitfld.long 0x00 7. " P7 ,PMN7 software increment" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,PMN6 software increment" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,PMN5 software increment" "Disabled,Enabled" newline bitfld.long 0x00 4. " P4 ,PMN4 software increment" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMN3 software increment" "Disabled,Enabled" bitfld.long 0x00 2. " P2 ,PMN2 software increment" "Disabled,Enabled" newline bitfld.long 0x00 1. " P1 ,PMN1 software increment" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMN0 software increment" "Disabled,Enabled" group.long 0xCC0++0x03 line.long 0x00 "PMU_OVSSET,Performance Monitoring Unit Overflow Flag Status Set Register" bitfld.long 0x00 31. " C ,PMCCNTR overflow" "No overflow,Overflow" bitfld.long 0x00 7. " P7 ,PMN7 overflow" "No overflow,Overflow" bitfld.long 0x00 6. " P6 ,PMN6 overflow" "No overflow,Overflow" newline bitfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" bitfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow" bitfld.long 0x00 3. " P3 ,PMN3 Overflow" "No overflow,Overflow" newline bitfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" bitfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" bitfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" rgroup.long 0xE00++0x03 line.long 0x00 "PMU_TYPE,Performance Monitoring Unit Type Register" bitfld.long 0x00 23. " TRO ,Trace-on-overflow support" "Not supported,Supported" bitfld.long 0x00 21. " FZO ,Freeze-on-overflow support" "Not supported,Supported" bitfld.long 0x00 14. " CC ,Dedicated cycle counter" "Disabled,Enabled" newline bitfld.long 0x00 8.--13. " SIZE ,Size of counters" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64" hexmask.long.byte 0x00 0.--7. 1. " N ,Number of event counters" group.long 0xE04++0x03 line.long 0x00 "PMU_CTRL,Performance Monitors Unit Control Register" bitfld.long 0x00 11. " TRO ,Trace-on-overflow" "Disabled,Enabled" bitfld.long 0x00 9. " FZO ,Freeze-on-overflow" "Disabled,Enabled" bitfld.long 0x00 5. " DP ,Disable cycle counter in prohibited regions" "No,Yes" newline bitfld.long 0x00 2. " C ,Clock counter reset" "No reset,Reset" bitfld.long 0x00 1. " P ,Event counter reset" "No reset,Reset" bitfld.long 0x00 0. " E ,Counters enable" "Disabled,Enabled" rgroup.long 0xFB8++0x07 line.long 0x00 "PMU_AUTHSTATUS,Performance Monitoring Unit Authentication Status Register" bitfld.long 0x00 22.--23. " SUNID ,Secure unprivileged non-invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" bitfld.long 0x00 20.--21. " SUID ,Secure unprivileged invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" bitfld.long 0x00 18.--19. " NSUNID ,Non-secure unprivileged non-invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" newline bitfld.long 0x00 16.--17. " NSUID ,Non-secure unprivileged invasive debug allowed" "Not implemented,Reserved,Prohibited,Allowed" bitfld.long 0x00 6.--7. " SNID ,Secure non-invasive debug" "Not implemented,Reserved,Implemented/Prohibited,Implemented/Allowed" bitfld.long 0x00 4.--5. " SID ,Secure invasive debug" "Not implemented,Reserved,Implemented/Prohibited,Implemented/Allowed" newline bitfld.long 0x00 2.--3. " NSNID ,Non-secure non-invasive debug" "Reserved,Reserved,Prohibited,Allowed" bitfld.long 0x00 0.--1. " NSID ,Non-secure invasive debug" "Reserved,Reserved,Prohibited,Allowed" line.long 0x04 "PMU_DEVARCH,Performance Monitoring Unit Device Architecture Register" hexmask.long.word 0x04 21.--31. 1. " ARCHITECT ,Defines the architect of the component" bitfld.long 0x04 20. " PRESENT ,Defines that the DEVARCH register is present" "Reserved,Present" bitfld.long 0x04 16.--19. " REVISION ,Defines the architecture revision" "Armv8.1-M,?..." newline hexmask.long.word 0x04 0.--15. 1. " ARCHID ,Defines this part to be a ARMv8-M debug component" rgroup.long 0xFCC++0x03 line.long 0x00 "PMU_DEVTYPE,Device Type Register" bitfld.long 0x00 4.--7. " SUB ,Sub-type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " MAJOR ,Major type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree "Peripheral Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PMU_PIDR0,PMU Peripheral Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. " PART_NUM[7:0] ,Part number bits[7:0]" line.long 0x04 "PMU_PIDR1,PMU Peripheral Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " PART_NUM[11:8] ,Part number bits[11:8]" line.long 0x08 "PMU_PIDR2,PMU Peripheral Identification Register 2" hexmask.long.byte 0x08 4.--7. 1. " REVISION ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PMU_PIDR3,PMU Peripheral Identification Register 3" hexmask.long.byte 0x0C 4.--7. 1. " REVAND ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x0F line.long 0x00 "PMU_PIDR4,PMU Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" line.long 0x04 "PMU_PIDR5,PMU Peripheral Identification Register 5" line.long 0x08 "PMU_PIDR6,PMU Peripheral Identification Register 6" line.long 0x0C "PMU_PIDR7,PMU Peripheral Identification Register 7" rgroup.long 0xFF0++0x0F line.long 0x00 "PMU_CIDR0,PMU Component Identification Register 0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "PMU_CIDR1,PMU Component Identification Register 1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class preamble" line.long 0x08 "PMU_CIDR2,PMU Component Identification Register 2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0C "PMU_CIDR3,PMU Component Identification Register 3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0B else newline textline "BMC component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end tree "ACMPHS (High-Speed Analog Comparator)" base ad:0x0 tree "ACMPHS0" base ad:0x40236000 group.byte 0x0++0x0 line.byte 0x0 "CMPCTL,Comparator Control Register" bitfld.byte 0x0 7. "HCMPON,Comparator operation control" "0: Operation stopped (the comparator outputs a..,1: Operation enabled (input to the comparator pins.." bitfld.byte 0x0 5.--6. "CDFS,Noise filter selection" "0: Noise filter not used.,1: Noise filter sampling frequency is 2^3/PCLKB.,?,?" newline bitfld.byte 0x0 3.--4. "CEG,Selection of valid edge (Edge selector)" "0: No edge selection.,1: Rising edge selection.,?,?" bitfld.byte 0x0 2. "CSTEN,Interrupt Select" "0: Output via the Edge selector,1: Direct output" newline bitfld.byte 0x0 1. "COE,Comparator output enable" "0: Comparator output disabled (the output signal is..,1: Comparator output enabled" bitfld.byte 0x0 0. "CINV,Comparator output polarity selection" "0: Comparator output not inverted,1: Comparator output inverted" group.byte 0x4++0x0 line.byte 0x0 "CMPSEL0,Comparator Input Select Register" hexmask.byte 0x0 0.--3. 1. "CMPSEL,Comparator input selection" group.byte 0x8++0x0 line.byte 0x0 "CMPSEL1,Comparator Reference Voltage Select Register" hexmask.byte 0x0 0.--3. 1. "CRVS,Reference voltage selection" rgroup.byte 0xC++0x0 line.byte 0x0 "CMPMON,Comparator Output Monitor Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "CMPMON,Comparator output monitor" "0: Comparator output Low,1: Comparator output High" group.byte 0x10++0x0 line.byte 0x0 "CPIOC,Comparator Output Control Register" bitfld.byte 0x0 7. "VREFEN,Internal Vref enable" "0: Internal Vref disable,1: Internal Vref enable" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "CPOE,Comparator output selection" "0: VCOUT pin output of the comparator is disabled..,1: VCOUT pin output of the comparator is enabled" group.byte 0x40++0x0 line.byte 0x0 "CPINTCTL,Comparator Interrupt Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MSKE,Comparator Interrupt Periodic Mask Enable" "0: Disable interrupt masking(Default),1: Enable interrupt masking by GPT output signal.." group.byte 0x44++0x0 line.byte 0x0 "CPMSKCTL,Comparator Interrupt Mask Control Register" bitfld.byte 0x0 0.--2. "MSKSEL,Comparator Interrupt Periodic Mask Selection" "0: Enable interrupt masking by GTIOC0A output signal,1: Enable interrupt masking by GTIOC1A output signal,?,?,?,?,?,?" tree.end tree "ACMPHS0_NS" base ad:0x50236000 group.byte 0x0++0x0 line.byte 0x0 "CMPCTL,Comparator Control Register" bitfld.byte 0x0 7. "HCMPON,Comparator operation control" "0: Operation stopped (the comparator outputs a..,1: Operation enabled (input to the comparator pins.." bitfld.byte 0x0 5.--6. "CDFS,Noise filter selection" "0: Noise filter not used.,1: Noise filter sampling frequency is 2^3/PCLKB.,?,?" newline bitfld.byte 0x0 3.--4. "CEG,Selection of valid edge (Edge selector)" "0: No edge selection.,1: Rising edge selection.,?,?" bitfld.byte 0x0 2. "CSTEN,Interrupt Select" "0: Output via the Edge selector,1: Direct output" newline bitfld.byte 0x0 1. "COE,Comparator output enable" "0: Comparator output disabled (the output signal is..,1: Comparator output enabled" bitfld.byte 0x0 0. "CINV,Comparator output polarity selection" "0: Comparator output not inverted,1: Comparator output inverted" group.byte 0x4++0x0 line.byte 0x0 "CMPSEL0,Comparator Input Select Register" hexmask.byte 0x0 0.--3. 1. "CMPSEL,Comparator input selection" group.byte 0x8++0x0 line.byte 0x0 "CMPSEL1,Comparator Reference Voltage Select Register" hexmask.byte 0x0 0.--3. 1. "CRVS,Reference voltage selection" rgroup.byte 0xC++0x0 line.byte 0x0 "CMPMON,Comparator Output Monitor Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "CMPMON,Comparator output monitor" "0: Comparator output Low,1: Comparator output High" group.byte 0x10++0x0 line.byte 0x0 "CPIOC,Comparator Output Control Register" bitfld.byte 0x0 7. "VREFEN,Internal Vref enable" "0: Internal Vref disable,1: Internal Vref enable" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "CPOE,Comparator output selection" "0: VCOUT pin output of the comparator is disabled..,1: VCOUT pin output of the comparator is enabled" group.byte 0x40++0x0 line.byte 0x0 "CPINTCTL,Comparator Interrupt Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MSKE,Comparator Interrupt Periodic Mask Enable" "0: Disable interrupt masking(Default),1: Enable interrupt masking by GPT output signal.." group.byte 0x44++0x0 line.byte 0x0 "CPMSKCTL,Comparator Interrupt Mask Control Register" bitfld.byte 0x0 0.--2. "MSKSEL,Comparator Interrupt Periodic Mask Selection" "0: Enable interrupt masking by GTIOC0A output signal,1: Enable interrupt masking by GTIOC1A output signal,?,?,?,?,?,?" tree.end tree "ACMPHS1" base ad:0x40236100 group.byte 0x0++0x0 line.byte 0x0 "CMPCTL,Comparator Control Register" bitfld.byte 0x0 7. "HCMPON,Comparator operation control" "0: Operation stopped (the comparator outputs a..,1: Operation enabled (input to the comparator pins.." bitfld.byte 0x0 5.--6. "CDFS,Noise filter selection" "0: Noise filter not used.,1: Noise filter sampling frequency is 2^3/PCLKB.,?,?" newline bitfld.byte 0x0 3.--4. "CEG,Selection of valid edge (Edge selector)" "0: No edge selection.,1: Rising edge selection.,?,?" bitfld.byte 0x0 2. "CSTEN,Interrupt Select" "0: Output via the Edge selector,1: Direct output" newline bitfld.byte 0x0 1. "COE,Comparator output enable" "0: Comparator output disabled (the output signal is..,1: Comparator output enabled" bitfld.byte 0x0 0. "CINV,Comparator output polarity selection" "0: Comparator output not inverted,1: Comparator output inverted" group.byte 0x4++0x0 line.byte 0x0 "CMPSEL0,Comparator Input Select Register" hexmask.byte 0x0 0.--3. 1. "CMPSEL,Comparator input selection" group.byte 0x8++0x0 line.byte 0x0 "CMPSEL1,Comparator Reference Voltage Select Register" hexmask.byte 0x0 0.--3. 1. "CRVS,Reference voltage selection" rgroup.byte 0xC++0x0 line.byte 0x0 "CMPMON,Comparator Output Monitor Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "CMPMON,Comparator output monitor" "0: Comparator output Low,1: Comparator output High" group.byte 0x10++0x0 line.byte 0x0 "CPIOC,Comparator Output Control Register" bitfld.byte 0x0 7. "VREFEN,Internal Vref enable" "0: Internal Vref disable,1: Internal Vref enable" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "CPOE,Comparator output selection" "0: VCOUT pin output of the comparator is disabled..,1: VCOUT pin output of the comparator is enabled" group.byte 0x40++0x0 line.byte 0x0 "CPINTCTL,Comparator Interrupt Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MSKE,Comparator Interrupt Periodic Mask Enable" "0: Disable interrupt masking(Default),1: Enable interrupt masking by GPT output signal.." group.byte 0x44++0x0 line.byte 0x0 "CPMSKCTL,Comparator Interrupt Mask Control Register" bitfld.byte 0x0 0.--2. "MSKSEL,Comparator Interrupt Periodic Mask Selection" "0: Enable interrupt masking by GTIOC0A output signal,1: Enable interrupt masking by GTIOC1A output signal,?,?,?,?,?,?" tree.end tree "ACMPHS1_NS" base ad:0x50236100 group.byte 0x0++0x0 line.byte 0x0 "CMPCTL,Comparator Control Register" bitfld.byte 0x0 7. "HCMPON,Comparator operation control" "0: Operation stopped (the comparator outputs a..,1: Operation enabled (input to the comparator pins.." bitfld.byte 0x0 5.--6. "CDFS,Noise filter selection" "0: Noise filter not used.,1: Noise filter sampling frequency is 2^3/PCLKB.,?,?" newline bitfld.byte 0x0 3.--4. "CEG,Selection of valid edge (Edge selector)" "0: No edge selection.,1: Rising edge selection.,?,?" bitfld.byte 0x0 2. "CSTEN,Interrupt Select" "0: Output via the Edge selector,1: Direct output" newline bitfld.byte 0x0 1. "COE,Comparator output enable" "0: Comparator output disabled (the output signal is..,1: Comparator output enabled" bitfld.byte 0x0 0. "CINV,Comparator output polarity selection" "0: Comparator output not inverted,1: Comparator output inverted" group.byte 0x4++0x0 line.byte 0x0 "CMPSEL0,Comparator Input Select Register" hexmask.byte 0x0 0.--3. 1. "CMPSEL,Comparator input selection" group.byte 0x8++0x0 line.byte 0x0 "CMPSEL1,Comparator Reference Voltage Select Register" hexmask.byte 0x0 0.--3. 1. "CRVS,Reference voltage selection" rgroup.byte 0xC++0x0 line.byte 0x0 "CMPMON,Comparator Output Monitor Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "CMPMON,Comparator output monitor" "0: Comparator output Low,1: Comparator output High" group.byte 0x10++0x0 line.byte 0x0 "CPIOC,Comparator Output Control Register" bitfld.byte 0x0 7. "VREFEN,Internal Vref enable" "0: Internal Vref disable,1: Internal Vref enable" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "CPOE,Comparator output selection" "0: VCOUT pin output of the comparator is disabled..,1: VCOUT pin output of the comparator is enabled" group.byte 0x40++0x0 line.byte 0x0 "CPINTCTL,Comparator Interrupt Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MSKE,Comparator Interrupt Periodic Mask Enable" "0: Disable interrupt masking(Default),1: Enable interrupt masking by GPT output signal.." group.byte 0x44++0x0 line.byte 0x0 "CPMSKCTL,Comparator Interrupt Mask Control Register" bitfld.byte 0x0 0.--2. "MSKSEL,Comparator Interrupt Periodic Mask Selection" "0: Enable interrupt masking by GTIOC0A output signal,1: Enable interrupt masking by GTIOC1A output signal,?,?,?,?,?,?" tree.end tree.end tree "ADC12 (12bit A/D Converter)" base ad:0x0 tree "ADC120" base ad:0x40332000 group.word 0x0++0x1 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. "ADST,A/D Conversion Start" "0: Stops A/D conversion process.,1: Starts A/D conversion process." bitfld.word 0x0 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,?,?" newline bitfld.word 0x0 12. "ADIE,Scan End Interrupt Enable" "0: Disables S12ADI0 interrupt generation upon scan..,1: Enables S12ADI0 interrupt generation upon scan.." bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ADHSC,A/D Conversion Operation Mode Select" "0: High speed A/D conversion mode,1: Low current A/D conversion mode" bitfld.word 0x0 9. "TRGE,Trigger Start Enable" "0: Disables A/D conversion to be started by the..,1: Enables A/D conversion to be started by the.." newline bitfld.word 0x0 8. "EXTRG,Trigger Select" "0: A/D conversion is started by the synchronous..,1: A/D conversion is started by the asynchronous.." bitfld.word 0x0 7. "DBLE,Double Trigger Mode Select" "0: Double trigger mode non-selection,1: Double trigger mode selection" newline bitfld.word 0x0 6. "GBADIE,Group B Scan End Interrupt Enable" "0: Disables S12GBADI0 interrupt generation upon..,1: Enables S12GBADI0 interrupt generation upon.." bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--4. 1. "DBLANS,Double Trigger Channel SelectThese bits select one analog input channel for double triggered operation. The setting is only effective while double trigger mode is selected." group.word 0x4++0x7 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "ANSA08,AN008 Select" "0: AN008 is not subjected to conversion.,1: AN008 is subjected to conversion." newline bitfld.word 0x0 7. "ANSA07,AN007 Select" "0: AN007 is not subjected to conversion.,1: AN007 is subjected to conversion." bitfld.word 0x0 6. "ANSA06,AN006 Select" "0: AN006 is not subjected to conversion.,1: AN006 is subjected to conversion." newline bitfld.word 0x0 5. "ANSA05,AN005 Select" "0: AN005 is not subjected to conversion.,1: AN005 is subjected to conversion." bitfld.word 0x0 4. "ANSA04,AN004 Select" "0: AN004 is not subjected to conversion.,1: AN004 is subjected to conversion." newline bitfld.word 0x0 3. "ANSA03,AN003 Select" "0: AN003 is not subjected to conversion.,1: AN003 is subjected to conversion." bitfld.word 0x0 2. "ANSA02,AN002 Select" "0: AN002 is not subjected to conversion.,1: AN002 is subjected to conversion." newline bitfld.word 0x0 1. "ANSA01,AN001 Select" "0: AN001 is not subjected to conversion.,1: AN001 is subjected to conversion." bitfld.word 0x0 0. "ANSA00,AN000 Select" "0: AN000 is not subjected to conversion.,1: AN000 is subjected to conversion." line.word 0x2 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 3. "ANSA19,AN019 Select" "0: AN019 is not subjected to conversion.,1: AN019 is subjected to conversion." bitfld.word 0x2 2. "ANSA18,AN018 Select" "0: AN018 is not subjected to conversion.,1: AN018 is subjected to conversion." newline bitfld.word 0x2 1. "ANSA17,AN017 Select" "0: AN017 is not subjected to conversion.,1: AN017 is subjected to conversion." bitfld.word 0x2 0. "ANSA16,AN016 Select" "0: AN016 is not subjected to conversion.,1: AN016 is subjected to conversion." line.word 0x4 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "ADS08,A/D-Converted Value Addition/Average Channel AN008 Select" "0: AN008 is not selected.,1: AN008 is selected." newline bitfld.word 0x4 7. "ADS07,A/D-Converted Value Addition/Average Channel AN007 Select" "0: AN007 is not selected.,1: AN007 is selected." bitfld.word 0x4 6. "ADS06,A/D-Converted Value Addition/Average Channel AN006 Select" "0: AN006 is not selected.,1: AN006 is selected." newline bitfld.word 0x4 5. "ADS05,A/D-Converted Value Addition/Average Channel AN005 Select" "0: AN005 is not selected.,1: AN005 is selected." bitfld.word 0x4 4. "ADS04,A/D-Converted Value Addition/Average Channel AN004 Select" "0: AN004 is not selected.,1: AN004 is selected." newline bitfld.word 0x4 3. "ADS03,A/D-Converted Value Addition/Average Channel AN003 Select" "0: AN003 is not selected.,1: AN003 is selected." bitfld.word 0x4 2. "ADS02,A/D-Converted Value Addition/Average Channel AN002 Select" "0: AN002 is not selected.,1: AN002 is selected." newline bitfld.word 0x4 1. "ADS01,A/D-Converted Value Addition/Average Channel AN001 Select" "0: AN001 is not selected.,1: AN001 is selected." bitfld.word 0x4 0. "ADS00,A/D-Converted Value Addition/Average Channel AN000 Select" "0: AN000 is not selected.,1: AN000 is selected." line.word 0x6 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 3. "ADS19,A/D-Converted Value Addition/Average Channel AN019 Select" "0: AN019 is not selected.,1: AN019 is selected." bitfld.word 0x6 2. "ADS18,A/D-Converted Value Addition/Average Channel AN018 Select" "0: AN018 is not selected.,1: AN018 is selected." newline bitfld.word 0x6 1. "ADS17,A/D-Converted Value Addition/Average Channel AN017 Select" "0: AN017 is not selected.,1: AN017 is selected." bitfld.word 0x6 0. "ADS16,A/D-Converted Value Addition/Average Channel AN016 Select" "0: AN016 is not selected.,1: AN016 is selected." group.byte 0xC++0x0 line.byte 0x0 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x0 7. "AVEE,Average mode enable bit.Note: The AVEE bit converts twice and only when converting it four times is effective. Please do not set (ADADC.AVEE=1) to conversion (ADADC.ADC 2:0=010b) three times when you select the average mode." "0: Disabled,1: Enabled" hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0.--2. "ADC,Addition frequency selection bit.NOTE: AVEE bit is valid at the only setting of ADC[2:0] bits = 001b or 011b. When average mode is selected by setting the ADADC.AVEE bit to 1 do not set the addition count to three times (ADADC.ADC[2:0] = 010b)" "0: Setting prohibited,1: 2-time conversion (addition once),?,?,?,?,?,?" group.word 0xE++0x9 line.word 0x0 "ADCER,A/D Control Extended Register" bitfld.word 0x0 15. "ADRFMT,A/D Data Register Format Select" "0: Flush-right is selected for the A/D data..,1: Flush-left is selected for the A/D data register.." bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 11. "DIAGM,Self-Diagnosis Enable" "0: Disables self-diagnosis of ADC12.,1: Enables self-diagnosis of ADC12." bitfld.word 0x0 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Rotation mode for self-diagnosis voltage,1: Fixed mode for self-diagnosis voltage" newline bitfld.word 0x0 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: When the self-diagnosis fixation mode is..,1: The self-diagnosis by using the voltage of 0V.,?,?" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Disables automatic clearing.,1: Enables automatic clearing." bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1.--2. "ADPRC,A/D Conversion Accuracy Specify" "0: A/D conversion is performed with 12-bit accuracy.,1: A/D conversion is performed with 10-bit accuracy.,?,?" newline bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.word 0x2 "ADSTRGR,A/D Conversion Start Trigger Select Register" bitfld.word 0x2 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 8.--13. 1. "TRSA,A/D Conversion Start Trigger SelectSelect the A/D conversion start trigger in single scan mode and continuous mode. In group scan mode the A/D conversion start trigger for group A is selected." newline bitfld.word 0x2 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 0.--5. 1. "TRSB,A/D Conversion Start Trigger Select for Group BSelect the A/D conversion start trigger for group B in group scan mode." line.word 0x4 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 11. "OCSB,Internal Reference Voltage A/D Conversion Select for Group B" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 10. "TSSB,Temperature Sensor Output A/D Conversion Select for Group B" "0: The temperature sensor output is not selected.,1: The temperature sensor output is not selected.." bitfld.word 0x4 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: The temperature sensor output is not selected.,1: The temperature sensor output is selected." hexmask.word.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x4 1. "OCSAD,Internal Reference Voltage A/D converted Value Addition/Average Mode Select" "0: Internal reference voltage A/D-converted value..,1: Internal reference voltage A/D-converted value.." bitfld.word 0x4 0. "TSSAD,Temperature Sensor Output A/D converted Value Addition/Average Mode Select" "0: Temperature sensor output A/D-converted value..,1: Temperature sensor output A/D-converted value.." line.word 0x6 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "ANSB08,AN008 Select" "0: AN008 is not subjected to conversion.,1: AN008 is subjected to conversion." newline bitfld.word 0x6 7. "ANSB07,AN007 Select" "0: AN007 is not subjected to conversion.,1: AN007 is subjected to conversion." bitfld.word 0x6 6. "ANSB06,AN006 Select" "0: AN006 is not subjected to conversion.,1: AN006 is subjected to conversion." newline bitfld.word 0x6 5. "ANSB05,AN005 Select" "0: AN005 is not subjected to conversion.,1: AN005 is subjected to conversion." bitfld.word 0x6 4. "ANSB04,AN004 Select" "0: AN004 is not subjected to conversion.,1: AN004 is subjected to conversion." newline bitfld.word 0x6 3. "ANSB03,AN003 Select" "0: AN003 is not subjected to conversion.,1: AN003 is subjected to conversion." bitfld.word 0x6 2. "ANSB02,AN002 Select" "0: AN002 is not subjected to conversion.,1: AN002 is subjected to conversion." newline bitfld.word 0x6 1. "ANSB01,AN001 Select" "0: AN001 is not subjected to conversion.,1: AN001 is subjected to conversion." bitfld.word 0x6 0. "ANSB00,AN000 Select" "0: AN000 is not subjected to conversion.,1: AN000 is subjected to conversion." line.word 0x8 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 3. "ANSB19,AN019 Select" "0: AN019 is not subjected to conversion.,1: AN019 is subjected to conversion." bitfld.word 0x8 2. "ANSB18,AN018 Select" "0: AN018 is not subjected to conversion.,1: AN018 is subjected to conversion." newline bitfld.word 0x8 1. "ANSB17,AN017 Select" "0: AN017 is not subjected to conversion.,1: AN017 is subjected to conversion." bitfld.word 0x8 0. "ANSB16,AN016 Select" "0: AN016 is not subjected to conversion.,1: AN016 is subjected to conversion." rgroup.word 0x18++0x7 line.word 0x0 "ADDBLDR,A/D Data Duplication Register" hexmask.word 0x0 0.--15. 1. "ADDBLDR,This is a 16-bit read-only register for storing the result of A/D conversion in response to the second trigger in double trigger mode." line.word 0x2 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x2 0.--15. 1. "ADTSDR,This is a 16-bit read-only register for storing the A/D conversion result of temperature sensor output." line.word 0x4 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x4 0.--15. 1. "ADOCDR,This is a 16-bit read-only register for storing the A/D result of internal reference voltage." line.word 0x6 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x6 14.--15. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis has never been executed since..,1: Self-diagnosis using the voltage of 0 V has been..,?,?" bitfld.word 0x6 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" newline hexmask.word 0x6 0.--11. 1. "AD,A/D-converted value (right-justified)NOTE: Unused bits in the AD bit field are fixed '0'" repeat 32. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0x20)++0x1 line.word 0x0 "ADDR$1,A/D Data Register %s" hexmask.word 0x0 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion." repeat.end rgroup.word 0x26++0x1 line.word 0x0 "ADVMDR,A/D VBATMONITOR Data Register" hexmask.word 0x0 0.--15. 1. "ADDR," group.word 0x66++0x1 line.word 0x0 "ADSHCR,A/D Sample and Hold Circuit Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SHANS2,AN002 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline bitfld.word 0x0 9. "SHANS1,AN001 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." bitfld.word 0x0 8. "SHANS0,AN000 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline hexmask.word.byte 0x0 0.--7. 1. "SSTSH,Channel-Dedicated Sample-and-Hold Circuit Sampling Time Setting Set the sampling time (4 to 255 states)" group.byte 0x7A++0x0 line.byte 0x0 "ADDISCR,A/D Disconnection Detection Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PCHG,Selection of Precharge or Discharge" "0: Discharge,1: Precharge" newline hexmask.byte 0x0 0.--3. 1. "ADNDIS,The charging time" group.byte 0x7C++0x0 line.byte 0x0 "ADSHMSR,A/D Sample and Hold Operation Mode Select Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SHMD,Channel-Dedicated Sample-and-Hold Circuit Operation Mode Select" "0: Sampling by channel-dedicated sample-and-hold..,1: Sampling by channel-dedicated sample-and-hold.." group.word 0x80++0x1 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 15. "GBRP,Group B Single Scan Continuous Start(Enabled only when PGS = 1. Reserved when PGS = 0.)Note: When the GBRP bit has been set to 1 single scan is performed continuously for group B regardless of the setting of the GBRSCN bit." "0: Single scan for group B is not continuously..,1: Single scan for group B is continuously activated." hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 1. "GBRSCN,Group B Restart Setting(Enabled only when PGS = 1. Reserved when PGS = 0.)" "0: Scanning for group B is not restarted after..,1: Scanning for group B is restarted after having.." bitfld.word 0x0 0. "PGS,Group A priority control setting bit.Note: When the PGS bit is to be set to 1 the ADCSR.ADCS[1:0] bits must be set to 01b (group scan mode). If the bits are set to any other values proper operation is not guaranteed." "0: Operation is without group A priority control,1: Operation is with group A priority control" rgroup.word 0x84++0x3 line.word 0x0 "ADDBLDRA,A/D Data Duplication Register A" hexmask.word 0x0 0.--15. 1. "ADDBLDRA,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." line.word 0x2 "ADDBLDRB,A/D Data Duplication Register B" hexmask.word 0x2 0.--15. 1. "ADDBLDRB,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." rgroup.byte 0x8C++0x0 line.byte 0x0 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met.,1: Window B comparison conditions are met." newline bitfld.byte 0x0 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met.,1: Window A comparison conditions are met." bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "MONCOMB,Combination result monitorThis bit indicates the combination result.This bit is valid when both window A operation and window B operation are enabled." "0: Window A / window B composite conditions are not..,1: Window A / window B composite conditions are met." group.word 0x90++0x1 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. "CMPAIE,Compare A Interrupt Enable" "0: S12ADCMPAIi interrupt is disabled when..,1: S12ADCMPAIi interrupt is enabled when comparison.." bitfld.word 0x0 14. "WCMPE,Window Function Setting" "0: Window function is disabled. Window A and window..,1: Window function is enabled. Window A and window.." newline bitfld.word 0x0 13. "CMPBIE,Compare B Interrupt Enable" "0: S12ADCMPBIi interrupt is disabled when..,1: S12ADCMPBIi interrupt is enabled when comparison.." bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "CMPAE,Compare Window A Operation Enable" "0: Compare window A operation is disabled.,1: Compare window A operation is enabled." bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "CMPBE,Compare Window B Operation Enable" "0: Compare window B operation is disabled.,1: Compare window B operation is enabled." hexmask.word.byte 0x0 2.--8. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0.--1. "CMPAB,Window A/B Composite Conditions SettingNOTE: These bits are valid when both window A and window B are enabled (CMPAE = 1 and CMPBE = 1)." "0: S12ADWMELC is output when window A comparison..,1: S12ADWMELC is output when window A comparison..,?,?" group.byte 0x92++0x1 line.byte 0x0 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPOCA,Internal reference voltage Compare selection bit." "0: Excludes the internal reference voltage from the..,1: Includes the internal reference voltage in the.." newline bitfld.byte 0x0 0. "CMPTSA,Temperature sensor output Compare selection bit." "0: Excludes the temperature sensor output from the..,1: Includes the temperature sensor output in the.." line.byte 0x1 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "CMPLOCA,Compare Window A Internal Reference Voltage ComparisonCondition Select" "0: ADCMPDR0 value > A/D converted..,1: ADCMPDR0 value < A/D converted.." newline bitfld.byte 0x1 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: ADCMPDR0 register value > A/D-converted..,1: ADCMPDR0 register value < A/D-converted.." group.word 0x94++0xF line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "CMPCHA08,Compare Window A Channel AN008 Select" "0: Disable compare function for AN008,1: Enable compare function for AN008" newline bitfld.word 0x0 7. "CMPCHA07,Compare Window A Channel AN007 Select" "0: Disable compare function for AN007,1: Enable compare function for AN007" bitfld.word 0x0 6. "CMPCHA06,Compare Window A Channel AN006 Select" "0: Disable compare function for AN006,1: Enable compare function for AN006" newline bitfld.word 0x0 5. "CMPCHA05,Compare Window A Channel AN005 Select" "0: Disable compare function for AN005,1: Enable compare function for AN005" bitfld.word 0x0 4. "CMPCHA04,Compare Window A Channel AN004 Select" "0: Disable compare function for AN004,1: Enable compare function for AN004" newline bitfld.word 0x0 3. "CMPCHA03,Compare Window A Channel AN003 Select" "0: Disable compare function for AN003,1: Enable compare function for AN003" bitfld.word 0x0 2. "CMPCHA02,Compare Window A Channel AN002 Select" "0: Disable compare function for AN002,1: Enable compare function for AN002" newline bitfld.word 0x0 1. "CMPCHA01,Compare Window A Channel AN001 Select" "0: Disable compare function for AN001,1: Enable compare function for AN001" bitfld.word 0x0 0. "CMPCHA00,Compare Window A Channel AN000 Select" "0: Disable compare function for AN000,1: Enable compare function for AN000" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 3. "CMPCHA19,AN019 Select" "0: Excludes AN019 from the compare window A target..,1: Includes AN019 from the compare window A target.." bitfld.word 0x2 2. "CMPCHA18,AN018 Select" "0: Excludes AN018 from the compare window A target..,1: Includes AN018 from the compare window A target.." newline bitfld.word 0x2 1. "CMPCHA17,AN017 Select" "0: Excludes AN017 from the compare window A target..,1: Includes AN017 from the compare window A target.." bitfld.word 0x2 0. "CMPCHA16,AN016 Select" "0: Excludes AN016 from the compare window A target..,1: Includes AN016 from the compare window A target.." line.word 0x4 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "CMPLCHA08,Comparison condition of AN008" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 7. "CMPLCHA07,Comparison condition of AN007" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 6. "CMPLCHA06,Comparison condition of AN006" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 5. "CMPLCHA05,Comparison condition of AN005" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 4. "CMPLCHA04,Comparison condition of AN004" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 3. "CMPLCHA03,Comparison condition of AN003" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 2. "CMPLCHA02,Comparison condition of AN002" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 1. "CMPLCHA01,Comparison condition of AN001" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 0. "CMPLCHA00,Comparison condition of AN000" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x6 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 3. "CMPLCHA19,Comparison condition of AN019" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 2. "CMPLCHA18,Comparison condition of AN018" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 1. "CMPLCHA17,Comparison condition of AN017" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 0. "CMPLCHA16,Comparison condition of AN016" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x8 "ADCMPDR0,A/D Compare Function Window A Lower-Side Level Setting Register" hexmask.word 0x8 0.--15. 1. "ADCMPDR0,The ADCMPDR0 register sets the reference data when the compare window A function is used. ADCMPDR0 sets the lower-side level of window A." line.word 0xA "ADCMPDR1,A/D Compare Function Window A Upper-Side Level Setting Register" hexmask.word 0xA 0.--15. 1. "ADCMPDR1,The ADCMPDR1 register sets the reference data when the compare window A function is used. ADCMPDR1 sets the upper-side level of window A.." line.word 0xC "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0" bitfld.word 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 8. "CMPSTCHA08,Compare window A flag of AN008" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 7. "CMPSTCHA07,Compare window A flag of AN007" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 6. "CMPSTCHA06,Compare window A flag of AN006" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 5. "CMPSTCHA05,Compare window A flag of AN005" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 4. "CMPSTCHA04,Compare window A flag of AN004" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 3. "CMPSTCHA03,Compare window A flag of AN003" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 2. "CMPSTCHA02,Compare window A flag of AN002" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 1. "CMPSTCHA01,Compare window A flag of AN001" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 0. "CMPSTCHA00,Compare window A flag of AN000" "0: Comparison conditions are not met.,1: Comparison conditions are met." line.word 0xE "ADCMPSR1,A/D Compare Function Window A Channel Status Register 1" bitfld.word 0xE 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 3. "CMPSTCHA19,Compare window A flag of AN019" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 2. "CMPSTCHA18,Compare window A flag of AN018" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 1. "CMPSTCHA17,Compare window A flag of AN017" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 0. "CMPSTCHA16,Compare window A flag of AN016" "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA4++0x0 line.byte 0x0 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.byte 0x0 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA6++0x0 line.byte 0x0 "ADCMPBNSR,A/D Compare Function Window B Channel Selection Register" bitfld.byte 0x0 7. "CMPLB,Compare window B Compare condition setting bit." "0: CMPLLB value > A/D converted value..,1: CMPLLB value < A/D converted.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x0 0.--5. 1. "CMPCHB,Compare window B channel selection bit.The channel that compares it on the condition of compare window B is selected." group.word 0xA8++0x3 line.word 0x0 "ADWINLLB,A/D Compare Function Window B Lower-Side Level Setting Register" hexmask.word 0x0 0.--15. 1. "ADWINLLB,This register is used to compare A window function is used to set the lower level of the window B." line.word 0x2 "ADWINULB,A/D Compare Function Window B Upper-Side Level Setting Register" hexmask.word 0x2 0.--15. 1. "ADWINULB,This register is used to compare A window function is used to set the higher level of the window B." group.byte 0xAC++0x0 line.byte 0x0 "ADCMPBSR,A/D Compare Function Window B Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CMPSTB,Compare window B flag.It is a status flag that shows the comparative result of CH (AN000-AN008 AN016-AN019 temperature sensor and internal reference voltage) made the object of window B relation condition." "0: AN008,1: Comparison conditions are met." repeat 16. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0xB0)++0x1 line.word 0x0 "ADBUF$1,A/D Data Buffer Register %s" hexmask.word 0x0 0.--15. 1. "ADBUF,A/D data buffer registers (ADBUF) are 16-bit read-only registers that sequentially store all A/D converted values. The automatic clear function is not applied to these registers." repeat.end group.byte 0xD0++0x0 line.byte 0x0 "ADBUFEN,A/D Data Buffer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BUFEN,Data Buffer Enable" "0: The data buffer is not used.,1: The data buffer is used." group.byte 0xD2++0x0 line.byte 0x0 "ADBUFPTR,A/D Data Buffer Pointer Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "PTROVF,Pointer Overflow Flag" "0: The data buffer pointer has not overflowed.,1: The data buffer pointer has overflowed." newline hexmask.byte 0x0 0.--3. 1. "BUFPTR,Data Buffer PointerThese bits indicate the number of data buffer to which the next A/D converted data is transferred." group.byte 0xDD++0x2 line.byte 0x0 "ADSSTRL,A/D Sampling State Register L" hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting (AN016-AN019)" line.byte 0x1 "ADSSTRT,A/D Sampling State Register T" hexmask.byte 0x1 0.--7. 1. "SST,Sampling Time Setting (temperature sensor output)" line.byte 0x2 "ADSSTRO,A/D Sampling State Register O" hexmask.byte 0x2 0.--7. 1. "SST,Sampling Time Setting (Internal reference voltage)" repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0xE0)++0x0 line.byte 0x0 "ADSSTR$1,A/D Sampling State Register %s" hexmask.byte 0x0 0.--7. 1. "SST,Sampling time setting" repeat.end tree.end tree "ADC120_NS" base ad:0x50332000 group.word 0x0++0x1 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. "ADST,A/D Conversion Start" "0: Stops A/D conversion process.,1: Starts A/D conversion process." bitfld.word 0x0 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,?,?" newline bitfld.word 0x0 12. "ADIE,Scan End Interrupt Enable" "0: Disables S12ADI0 interrupt generation upon scan..,1: Enables S12ADI0 interrupt generation upon scan.." bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ADHSC,A/D Conversion Operation Mode Select" "0: High speed A/D conversion mode,1: Low current A/D conversion mode" bitfld.word 0x0 9. "TRGE,Trigger Start Enable" "0: Disables A/D conversion to be started by the..,1: Enables A/D conversion to be started by the.." newline bitfld.word 0x0 8. "EXTRG,Trigger Select" "0: A/D conversion is started by the synchronous..,1: A/D conversion is started by the asynchronous.." bitfld.word 0x0 7. "DBLE,Double Trigger Mode Select" "0: Double trigger mode non-selection,1: Double trigger mode selection" newline bitfld.word 0x0 6. "GBADIE,Group B Scan End Interrupt Enable" "0: Disables S12GBADI0 interrupt generation upon..,1: Enables S12GBADI0 interrupt generation upon.." bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--4. 1. "DBLANS,Double Trigger Channel SelectThese bits select one analog input channel for double triggered operation. The setting is only effective while double trigger mode is selected." group.word 0x4++0x7 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "ANSA08,AN008 Select" "0: AN008 is not subjected to conversion.,1: AN008 is subjected to conversion." newline bitfld.word 0x0 7. "ANSA07,AN007 Select" "0: AN007 is not subjected to conversion.,1: AN007 is subjected to conversion." bitfld.word 0x0 6. "ANSA06,AN006 Select" "0: AN006 is not subjected to conversion.,1: AN006 is subjected to conversion." newline bitfld.word 0x0 5. "ANSA05,AN005 Select" "0: AN005 is not subjected to conversion.,1: AN005 is subjected to conversion." bitfld.word 0x0 4. "ANSA04,AN004 Select" "0: AN004 is not subjected to conversion.,1: AN004 is subjected to conversion." newline bitfld.word 0x0 3. "ANSA03,AN003 Select" "0: AN003 is not subjected to conversion.,1: AN003 is subjected to conversion." bitfld.word 0x0 2. "ANSA02,AN002 Select" "0: AN002 is not subjected to conversion.,1: AN002 is subjected to conversion." newline bitfld.word 0x0 1. "ANSA01,AN001 Select" "0: AN001 is not subjected to conversion.,1: AN001 is subjected to conversion." bitfld.word 0x0 0. "ANSA00,AN000 Select" "0: AN000 is not subjected to conversion.,1: AN000 is subjected to conversion." line.word 0x2 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 3. "ANSA19,AN019 Select" "0: AN019 is not subjected to conversion.,1: AN019 is subjected to conversion." bitfld.word 0x2 2. "ANSA18,AN018 Select" "0: AN018 is not subjected to conversion.,1: AN018 is subjected to conversion." newline bitfld.word 0x2 1. "ANSA17,AN017 Select" "0: AN017 is not subjected to conversion.,1: AN017 is subjected to conversion." bitfld.word 0x2 0. "ANSA16,AN016 Select" "0: AN016 is not subjected to conversion.,1: AN016 is subjected to conversion." line.word 0x4 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "ADS08,A/D-Converted Value Addition/Average Channel AN008 Select" "0: AN008 is not selected.,1: AN008 is selected." newline bitfld.word 0x4 7. "ADS07,A/D-Converted Value Addition/Average Channel AN007 Select" "0: AN007 is not selected.,1: AN007 is selected." bitfld.word 0x4 6. "ADS06,A/D-Converted Value Addition/Average Channel AN006 Select" "0: AN006 is not selected.,1: AN006 is selected." newline bitfld.word 0x4 5. "ADS05,A/D-Converted Value Addition/Average Channel AN005 Select" "0: AN005 is not selected.,1: AN005 is selected." bitfld.word 0x4 4. "ADS04,A/D-Converted Value Addition/Average Channel AN004 Select" "0: AN004 is not selected.,1: AN004 is selected." newline bitfld.word 0x4 3. "ADS03,A/D-Converted Value Addition/Average Channel AN003 Select" "0: AN003 is not selected.,1: AN003 is selected." bitfld.word 0x4 2. "ADS02,A/D-Converted Value Addition/Average Channel AN002 Select" "0: AN002 is not selected.,1: AN002 is selected." newline bitfld.word 0x4 1. "ADS01,A/D-Converted Value Addition/Average Channel AN001 Select" "0: AN001 is not selected.,1: AN001 is selected." bitfld.word 0x4 0. "ADS00,A/D-Converted Value Addition/Average Channel AN000 Select" "0: AN000 is not selected.,1: AN000 is selected." line.word 0x6 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 3. "ADS19,A/D-Converted Value Addition/Average Channel AN019 Select" "0: AN019 is not selected.,1: AN019 is selected." bitfld.word 0x6 2. "ADS18,A/D-Converted Value Addition/Average Channel AN018 Select" "0: AN018 is not selected.,1: AN018 is selected." newline bitfld.word 0x6 1. "ADS17,A/D-Converted Value Addition/Average Channel AN017 Select" "0: AN017 is not selected.,1: AN017 is selected." bitfld.word 0x6 0. "ADS16,A/D-Converted Value Addition/Average Channel AN016 Select" "0: AN016 is not selected.,1: AN016 is selected." group.byte 0xC++0x0 line.byte 0x0 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x0 7. "AVEE,Average mode enable bit.Note: The AVEE bit converts twice and only when converting it four times is effective. Please do not set (ADADC.AVEE=1) to conversion (ADADC.ADC 2:0=010b) three times when you select the average mode." "0: Disabled,1: Enabled" hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0.--2. "ADC,Addition frequency selection bit.NOTE: AVEE bit is valid at the only setting of ADC[2:0] bits = 001b or 011b. When average mode is selected by setting the ADADC.AVEE bit to 1 do not set the addition count to three times (ADADC.ADC[2:0] = 010b)" "0: Setting prohibited,1: 2-time conversion (addition once),?,?,?,?,?,?" group.word 0xE++0x9 line.word 0x0 "ADCER,A/D Control Extended Register" bitfld.word 0x0 15. "ADRFMT,A/D Data Register Format Select" "0: Flush-right is selected for the A/D data..,1: Flush-left is selected for the A/D data register.." bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 11. "DIAGM,Self-Diagnosis Enable" "0: Disables self-diagnosis of ADC12.,1: Enables self-diagnosis of ADC12." bitfld.word 0x0 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Rotation mode for self-diagnosis voltage,1: Fixed mode for self-diagnosis voltage" newline bitfld.word 0x0 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: When the self-diagnosis fixation mode is..,1: The self-diagnosis by using the voltage of 0V.,?,?" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Disables automatic clearing.,1: Enables automatic clearing." bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1.--2. "ADPRC,A/D Conversion Accuracy Specify" "0: A/D conversion is performed with 12-bit accuracy.,1: A/D conversion is performed with 10-bit accuracy.,?,?" newline bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.word 0x2 "ADSTRGR,A/D Conversion Start Trigger Select Register" bitfld.word 0x2 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 8.--13. 1. "TRSA,A/D Conversion Start Trigger SelectSelect the A/D conversion start trigger in single scan mode and continuous mode. In group scan mode the A/D conversion start trigger for group A is selected." newline bitfld.word 0x2 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 0.--5. 1. "TRSB,A/D Conversion Start Trigger Select for Group BSelect the A/D conversion start trigger for group B in group scan mode." line.word 0x4 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 11. "OCSB,Internal Reference Voltage A/D Conversion Select for Group B" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 10. "TSSB,Temperature Sensor Output A/D Conversion Select for Group B" "0: The temperature sensor output is not selected.,1: The temperature sensor output is not selected.." bitfld.word 0x4 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: The temperature sensor output is not selected.,1: The temperature sensor output is selected." hexmask.word.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x4 1. "OCSAD,Internal Reference Voltage A/D converted Value Addition/Average Mode Select" "0: Internal reference voltage A/D-converted value..,1: Internal reference voltage A/D-converted value.." bitfld.word 0x4 0. "TSSAD,Temperature Sensor Output A/D converted Value Addition/Average Mode Select" "0: Temperature sensor output A/D-converted value..,1: Temperature sensor output A/D-converted value.." line.word 0x6 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "ANSB08,AN008 Select" "0: AN008 is not subjected to conversion.,1: AN008 is subjected to conversion." newline bitfld.word 0x6 7. "ANSB07,AN007 Select" "0: AN007 is not subjected to conversion.,1: AN007 is subjected to conversion." bitfld.word 0x6 6. "ANSB06,AN006 Select" "0: AN006 is not subjected to conversion.,1: AN006 is subjected to conversion." newline bitfld.word 0x6 5. "ANSB05,AN005 Select" "0: AN005 is not subjected to conversion.,1: AN005 is subjected to conversion." bitfld.word 0x6 4. "ANSB04,AN004 Select" "0: AN004 is not subjected to conversion.,1: AN004 is subjected to conversion." newline bitfld.word 0x6 3. "ANSB03,AN003 Select" "0: AN003 is not subjected to conversion.,1: AN003 is subjected to conversion." bitfld.word 0x6 2. "ANSB02,AN002 Select" "0: AN002 is not subjected to conversion.,1: AN002 is subjected to conversion." newline bitfld.word 0x6 1. "ANSB01,AN001 Select" "0: AN001 is not subjected to conversion.,1: AN001 is subjected to conversion." bitfld.word 0x6 0. "ANSB00,AN000 Select" "0: AN000 is not subjected to conversion.,1: AN000 is subjected to conversion." line.word 0x8 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 3. "ANSB19,AN019 Select" "0: AN019 is not subjected to conversion.,1: AN019 is subjected to conversion." bitfld.word 0x8 2. "ANSB18,AN018 Select" "0: AN018 is not subjected to conversion.,1: AN018 is subjected to conversion." newline bitfld.word 0x8 1. "ANSB17,AN017 Select" "0: AN017 is not subjected to conversion.,1: AN017 is subjected to conversion." bitfld.word 0x8 0. "ANSB16,AN016 Select" "0: AN016 is not subjected to conversion.,1: AN016 is subjected to conversion." rgroup.word 0x18++0x7 line.word 0x0 "ADDBLDR,A/D Data Duplication Register" hexmask.word 0x0 0.--15. 1. "ADDBLDR,This is a 16-bit read-only register for storing the result of A/D conversion in response to the second trigger in double trigger mode." line.word 0x2 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x2 0.--15. 1. "ADTSDR,This is a 16-bit read-only register for storing the A/D conversion result of temperature sensor output." line.word 0x4 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x4 0.--15. 1. "ADOCDR,This is a 16-bit read-only register for storing the A/D result of internal reference voltage." line.word 0x6 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x6 14.--15. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis has never been executed since..,1: Self-diagnosis using the voltage of 0 V has been..,?,?" bitfld.word 0x6 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" newline hexmask.word 0x6 0.--11. 1. "AD,A/D-converted value (right-justified)NOTE: Unused bits in the AD bit field are fixed '0'" repeat 32. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0x20)++0x1 line.word 0x0 "ADDR$1,A/D Data Register %s" hexmask.word 0x0 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion." repeat.end rgroup.word 0x26++0x1 line.word 0x0 "ADVMDR,A/D VBATMONITOR Data Register" hexmask.word 0x0 0.--15. 1. "ADDR," group.word 0x66++0x1 line.word 0x0 "ADSHCR,A/D Sample and Hold Circuit Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SHANS2,AN002 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline bitfld.word 0x0 9. "SHANS1,AN001 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." bitfld.word 0x0 8. "SHANS0,AN000 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline hexmask.word.byte 0x0 0.--7. 1. "SSTSH,Channel-Dedicated Sample-and-Hold Circuit Sampling Time Setting Set the sampling time (4 to 255 states)" group.byte 0x7A++0x0 line.byte 0x0 "ADDISCR,A/D Disconnection Detection Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PCHG,Selection of Precharge or Discharge" "0: Discharge,1: Precharge" newline hexmask.byte 0x0 0.--3. 1. "ADNDIS,The charging time" group.byte 0x7C++0x0 line.byte 0x0 "ADSHMSR,A/D Sample and Hold Operation Mode Select Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SHMD,Channel-Dedicated Sample-and-Hold Circuit Operation Mode Select" "0: Sampling by channel-dedicated sample-and-hold..,1: Sampling by channel-dedicated sample-and-hold.." group.word 0x80++0x1 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 15. "GBRP,Group B Single Scan Continuous Start(Enabled only when PGS = 1. Reserved when PGS = 0.)Note: When the GBRP bit has been set to 1 single scan is performed continuously for group B regardless of the setting of the GBRSCN bit." "0: Single scan for group B is not continuously..,1: Single scan for group B is continuously activated." hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 1. "GBRSCN,Group B Restart Setting(Enabled only when PGS = 1. Reserved when PGS = 0.)" "0: Scanning for group B is not restarted after..,1: Scanning for group B is restarted after having.." bitfld.word 0x0 0. "PGS,Group A priority control setting bit.Note: When the PGS bit is to be set to 1 the ADCSR.ADCS[1:0] bits must be set to 01b (group scan mode). If the bits are set to any other values proper operation is not guaranteed." "0: Operation is without group A priority control,1: Operation is with group A priority control" rgroup.word 0x84++0x3 line.word 0x0 "ADDBLDRA,A/D Data Duplication Register A" hexmask.word 0x0 0.--15. 1. "ADDBLDRA,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." line.word 0x2 "ADDBLDRB,A/D Data Duplication Register B" hexmask.word 0x2 0.--15. 1. "ADDBLDRB,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." rgroup.byte 0x8C++0x0 line.byte 0x0 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met.,1: Window B comparison conditions are met." newline bitfld.byte 0x0 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met.,1: Window A comparison conditions are met." bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "MONCOMB,Combination result monitorThis bit indicates the combination result.This bit is valid when both window A operation and window B operation are enabled." "0: Window A / window B composite conditions are not..,1: Window A / window B composite conditions are met." group.word 0x90++0x1 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. "CMPAIE,Compare A Interrupt Enable" "0: S12ADCMPAIi interrupt is disabled when..,1: S12ADCMPAIi interrupt is enabled when comparison.." bitfld.word 0x0 14. "WCMPE,Window Function Setting" "0: Window function is disabled. Window A and window..,1: Window function is enabled. Window A and window.." newline bitfld.word 0x0 13. "CMPBIE,Compare B Interrupt Enable" "0: S12ADCMPBIi interrupt is disabled when..,1: S12ADCMPBIi interrupt is enabled when comparison.." bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "CMPAE,Compare Window A Operation Enable" "0: Compare window A operation is disabled.,1: Compare window A operation is enabled." bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "CMPBE,Compare Window B Operation Enable" "0: Compare window B operation is disabled.,1: Compare window B operation is enabled." hexmask.word.byte 0x0 2.--8. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0.--1. "CMPAB,Window A/B Composite Conditions SettingNOTE: These bits are valid when both window A and window B are enabled (CMPAE = 1 and CMPBE = 1)." "0: S12ADWMELC is output when window A comparison..,1: S12ADWMELC is output when window A comparison..,?,?" group.byte 0x92++0x1 line.byte 0x0 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPOCA,Internal reference voltage Compare selection bit." "0: Excludes the internal reference voltage from the..,1: Includes the internal reference voltage in the.." newline bitfld.byte 0x0 0. "CMPTSA,Temperature sensor output Compare selection bit." "0: Excludes the temperature sensor output from the..,1: Includes the temperature sensor output in the.." line.byte 0x1 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "CMPLOCA,Compare Window A Internal Reference Voltage ComparisonCondition Select" "0: ADCMPDR0 value > A/D converted..,1: ADCMPDR0 value < A/D converted.." newline bitfld.byte 0x1 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: ADCMPDR0 register value > A/D-converted..,1: ADCMPDR0 register value < A/D-converted.." group.word 0x94++0xF line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "CMPCHA08,Compare Window A Channel AN008 Select" "0: Disable compare function for AN008,1: Enable compare function for AN008" newline bitfld.word 0x0 7. "CMPCHA07,Compare Window A Channel AN007 Select" "0: Disable compare function for AN007,1: Enable compare function for AN007" bitfld.word 0x0 6. "CMPCHA06,Compare Window A Channel AN006 Select" "0: Disable compare function for AN006,1: Enable compare function for AN006" newline bitfld.word 0x0 5. "CMPCHA05,Compare Window A Channel AN005 Select" "0: Disable compare function for AN005,1: Enable compare function for AN005" bitfld.word 0x0 4. "CMPCHA04,Compare Window A Channel AN004 Select" "0: Disable compare function for AN004,1: Enable compare function for AN004" newline bitfld.word 0x0 3. "CMPCHA03,Compare Window A Channel AN003 Select" "0: Disable compare function for AN003,1: Enable compare function for AN003" bitfld.word 0x0 2. "CMPCHA02,Compare Window A Channel AN002 Select" "0: Disable compare function for AN002,1: Enable compare function for AN002" newline bitfld.word 0x0 1. "CMPCHA01,Compare Window A Channel AN001 Select" "0: Disable compare function for AN001,1: Enable compare function for AN001" bitfld.word 0x0 0. "CMPCHA00,Compare Window A Channel AN000 Select" "0: Disable compare function for AN000,1: Enable compare function for AN000" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 3. "CMPCHA19,AN019 Select" "0: Excludes AN019 from the compare window A target..,1: Includes AN019 from the compare window A target.." bitfld.word 0x2 2. "CMPCHA18,AN018 Select" "0: Excludes AN018 from the compare window A target..,1: Includes AN018 from the compare window A target.." newline bitfld.word 0x2 1. "CMPCHA17,AN017 Select" "0: Excludes AN017 from the compare window A target..,1: Includes AN017 from the compare window A target.." bitfld.word 0x2 0. "CMPCHA16,AN016 Select" "0: Excludes AN016 from the compare window A target..,1: Includes AN016 from the compare window A target.." line.word 0x4 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "CMPLCHA08,Comparison condition of AN008" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 7. "CMPLCHA07,Comparison condition of AN007" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 6. "CMPLCHA06,Comparison condition of AN006" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 5. "CMPLCHA05,Comparison condition of AN005" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 4. "CMPLCHA04,Comparison condition of AN004" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 3. "CMPLCHA03,Comparison condition of AN003" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 2. "CMPLCHA02,Comparison condition of AN002" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 1. "CMPLCHA01,Comparison condition of AN001" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 0. "CMPLCHA00,Comparison condition of AN000" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x6 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 3. "CMPLCHA19,Comparison condition of AN019" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 2. "CMPLCHA18,Comparison condition of AN018" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 1. "CMPLCHA17,Comparison condition of AN017" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 0. "CMPLCHA16,Comparison condition of AN016" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x8 "ADCMPDR0,A/D Compare Function Window A Lower-Side Level Setting Register" hexmask.word 0x8 0.--15. 1. "ADCMPDR0,The ADCMPDR0 register sets the reference data when the compare window A function is used. ADCMPDR0 sets the lower-side level of window A." line.word 0xA "ADCMPDR1,A/D Compare Function Window A Upper-Side Level Setting Register" hexmask.word 0xA 0.--15. 1. "ADCMPDR1,The ADCMPDR1 register sets the reference data when the compare window A function is used. ADCMPDR1 sets the upper-side level of window A.." line.word 0xC "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0" bitfld.word 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 8. "CMPSTCHA08,Compare window A flag of AN008" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 7. "CMPSTCHA07,Compare window A flag of AN007" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 6. "CMPSTCHA06,Compare window A flag of AN006" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 5. "CMPSTCHA05,Compare window A flag of AN005" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 4. "CMPSTCHA04,Compare window A flag of AN004" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 3. "CMPSTCHA03,Compare window A flag of AN003" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 2. "CMPSTCHA02,Compare window A flag of AN002" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 1. "CMPSTCHA01,Compare window A flag of AN001" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 0. "CMPSTCHA00,Compare window A flag of AN000" "0: Comparison conditions are not met.,1: Comparison conditions are met." line.word 0xE "ADCMPSR1,A/D Compare Function Window A Channel Status Register 1" bitfld.word 0xE 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 3. "CMPSTCHA19,Compare window A flag of AN019" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 2. "CMPSTCHA18,Compare window A flag of AN018" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 1. "CMPSTCHA17,Compare window A flag of AN017" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 0. "CMPSTCHA16,Compare window A flag of AN016" "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA4++0x0 line.byte 0x0 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.byte 0x0 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA6++0x0 line.byte 0x0 "ADCMPBNSR,A/D Compare Function Window B Channel Selection Register" bitfld.byte 0x0 7. "CMPLB,Compare window B Compare condition setting bit." "0: CMPLLB value > A/D converted value..,1: CMPLLB value < A/D converted.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x0 0.--5. 1. "CMPCHB,Compare window B channel selection bit.The channel that compares it on the condition of compare window B is selected." group.word 0xA8++0x3 line.word 0x0 "ADWINLLB,A/D Compare Function Window B Lower-Side Level Setting Register" hexmask.word 0x0 0.--15. 1. "ADWINLLB,This register is used to compare A window function is used to set the lower level of the window B." line.word 0x2 "ADWINULB,A/D Compare Function Window B Upper-Side Level Setting Register" hexmask.word 0x2 0.--15. 1. "ADWINULB,This register is used to compare A window function is used to set the higher level of the window B." group.byte 0xAC++0x0 line.byte 0x0 "ADCMPBSR,A/D Compare Function Window B Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CMPSTB,Compare window B flag.It is a status flag that shows the comparative result of CH (AN000-AN008 AN016-AN019 temperature sensor and internal reference voltage) made the object of window B relation condition." "0: AN008,1: Comparison conditions are met." repeat 16. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0xB0)++0x1 line.word 0x0 "ADBUF$1,A/D Data Buffer Register %s" hexmask.word 0x0 0.--15. 1. "ADBUF,A/D data buffer registers (ADBUF) are 16-bit read-only registers that sequentially store all A/D converted values. The automatic clear function is not applied to these registers." repeat.end group.byte 0xD0++0x0 line.byte 0x0 "ADBUFEN,A/D Data Buffer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BUFEN,Data Buffer Enable" "0: The data buffer is not used.,1: The data buffer is used." group.byte 0xD2++0x0 line.byte 0x0 "ADBUFPTR,A/D Data Buffer Pointer Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "PTROVF,Pointer Overflow Flag" "0: The data buffer pointer has not overflowed.,1: The data buffer pointer has overflowed." newline hexmask.byte 0x0 0.--3. 1. "BUFPTR,Data Buffer PointerThese bits indicate the number of data buffer to which the next A/D converted data is transferred." group.byte 0xDD++0x2 line.byte 0x0 "ADSSTRL,A/D Sampling State Register L" hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting (AN016-AN019)" line.byte 0x1 "ADSSTRT,A/D Sampling State Register T" hexmask.byte 0x1 0.--7. 1. "SST,Sampling Time Setting (temperature sensor output)" line.byte 0x2 "ADSSTRO,A/D Sampling State Register O" hexmask.byte 0x2 0.--7. 1. "SST,Sampling Time Setting (Internal reference voltage)" repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0xE0)++0x0 line.byte 0x0 "ADSSTR$1,A/D Sampling State Register %s" hexmask.byte 0x0 0.--7. 1. "SST,Sampling time setting" repeat.end tree.end tree "ADC121" base ad:0x40332200 group.word 0x0++0x1 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. "ADST,A/D Conversion Start" "0: Stops A/D conversion process.,1: Starts A/D conversion process." bitfld.word 0x0 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,?,?" newline bitfld.word 0x0 12. "ADIE,Scan End Interrupt Enable" "0: Disables S12ADI1 interrupt generation upon scan..,1: Enables S12ADI1 interrupt generation upon scan.." bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ADHSC,A/D Conversion Operation Mode Select" "0: High speed A/D conversion mode,1: Low current A/D conversion mode" bitfld.word 0x0 9. "TRGE,Trigger Start Enable" "0: Disables A/D conversion to be started by the..,1: Enables A/D conversion to be started by the.." newline bitfld.word 0x0 8. "EXTRG,Trigger Select" "0: A/D conversion is started by the synchronous..,1: A/D conversion is started by the asynchronous.." bitfld.word 0x0 7. "DBLE,Double Trigger Mode Select" "0: Double trigger mode non-selection,1: Double trigger mode selection" newline bitfld.word 0x0 6. "GBADIE,Group B Scan End Interrupt Enable" "0: Disables S12GBADI1 interrupt generation upon..,1: Enables S12GBADI1 interrupt generation upon.." bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--4. 1. "DBLANS,Double Trigger Channel SelectThese bits select one analog input channel for double triggered operation. The setting is only effective while double trigger mode is selected." group.word 0x4++0x7 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "ANSA06,AN106 Select" "0: AN106 is not subjected to conversion.,1: AN106 is subjected to conversion." newline bitfld.word 0x0 5. "ANSA05,AN105 Select" "0: AN105 is not subjected to conversion.,1: AN105 is subjected to conversion." bitfld.word 0x0 4. "ANSA04,AN104 Select" "0: AN104 is not subjected to conversion.,1: AN104 is subjected to conversion." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "ANSA02,AN102 Select" "0: AN102 is not subjected to conversion.,1: AN102 is subjected to conversion." newline bitfld.word 0x0 1. "ANSA01,AN101 Select" "0: AN101 is not subjected to conversion.,1: AN101 is subjected to conversion." bitfld.word 0x0 0. "ANSA00,AN100 Select" "0: AN100 is not subjected to conversion.,1: AN100 is subjected to conversion." line.word 0x2 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "ANSA22,AN122 Select" "0: AN122 is not subjected to conversion.,1: AN122 is subjected to conversion." newline bitfld.word 0x2 5. "ANSA21,AN121 Select" "0: AN121 is not subjected to conversion.,1: AN121 is subjected to conversion." bitfld.word 0x2 4. "ANSA20,AN120 Select" "0: AN120 is not subjected to conversion.,1: AN120 is subjected to conversion." newline bitfld.word 0x2 3. "ANSA19,AN119 Select" "0: AN119 is not subjected to conversion.,1: AN119 is subjected to conversion." bitfld.word 0x2 2. "ANSA18,AN118 Select" "0: AN118 is not subjected to conversion.,1: AN118 is subjected to conversion." newline bitfld.word 0x2 1. "ANSA17,AN117 Select" "0: AN117 is not subjected to conversion.,1: AN117 is subjected to conversion." bitfld.word 0x2 0. "ANSA16,AN116 Select" "0: AN116 is not subjected to conversion.,1: AN116 is subjected to conversion." line.word 0x4 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 6. "ADS06,A/D-Converted Value Addition/Average Channel AN106 Select" "0: AN106 is not selected.,1: AN106 is selected." newline bitfld.word 0x4 5. "ADS05,A/D-Converted Value Addition/Average Channel AN105 Select" "0: AN105 is not selected.,1: AN105 is selected." bitfld.word 0x4 4. "ADS04,A/D-Converted Value Addition/Average Channel AN104 Select" "0: AN104 is not selected.,1: AN104 is selected." newline bitfld.word 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 2. "ADS02,A/D-Converted Value Addition/Average Channel AN102 Select" "0: AN102 is not selected.,1: AN102 is selected." newline bitfld.word 0x4 1. "ADS01,A/D-Converted Value Addition/Average Channel AN101 Select" "0: AN101 is not selected.,1: AN101 is selected." bitfld.word 0x4 0. "ADS00,A/D-Converted Value Addition/Average Channel AN100 Select" "0: AN100 is not selected.,1: AN100 is selected." line.word 0x6 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "ADS22,A/D-Converted Value Addition/Average Channel AN122 Select" "0: AN122 is not selected.,1: AN122 is selected." newline bitfld.word 0x6 5. "ADS21,A/D-Converted Value Addition/Average Channel AN121 Select" "0: AN121 is not selected.,1: AN121 is selected." bitfld.word 0x6 4. "ADS20,A/D-Converted Value Addition/Average Channel AN120 Select" "0: AN120 is not selected.,1: AN120 is selected." newline bitfld.word 0x6 3. "ADS19,A/D-Converted Value Addition/Average Channel AN119 Select" "0: AN119 is not selected.,1: AN119 is selected." bitfld.word 0x6 2. "ADS18,A/D-Converted Value Addition/Average Channel AN118 Select" "0: AN118 is not selected.,1: AN118 is selected." newline bitfld.word 0x6 1. "ADS17,A/D-Converted Value Addition/Average Channel AN117 Select" "0: AN117 is not selected.,1: AN117 is selected." bitfld.word 0x6 0. "ADS16,A/D-Converted Value Addition/Average Channel AN116 Select" "0: AN116 is not selected.,1: AN116 is selected." group.byte 0xC++0x0 line.byte 0x0 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x0 7. "AVEE,Average mode enable bit.Note: The AVEE bit converts twice and only when converting it four times is effective. Please do not set (ADADC.AVEE=1) to conversion (ADADC.ADC 2:0=010b) three times when you select the average mode." "0: Disabled,1: Enabled" hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0.--2. "ADC,Addition frequency selection bit.NOTE: AVEE bit is valid at the only setting of ADC[2:0] bits = 001b or 011b. When average mode is selected by setting the ADADC.AVEE bit to 1 do not set the addition count to three times (ADADC.ADC[2:0] = 010b)" "0: Setting prohibited,1: 2-time conversion (addition once),?,?,?,?,?,?" group.word 0xE++0x9 line.word 0x0 "ADCER,A/D Control Extended Register" bitfld.word 0x0 15. "ADRFMT,A/D Data Register Format Select" "0: Flush-right is selected for the A/D data..,1: Flush-left is selected for the A/D data register.." bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 11. "DIAGM,Self-Diagnosis Enable" "0: Disables self-diagnosis of ADC12.,1: Enables self-diagnosis of ADC12." bitfld.word 0x0 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Rotation mode for self-diagnosis voltage,1: Fixed mode for self-diagnosis voltage" newline bitfld.word 0x0 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: When the self-diagnosis fixation mode is..,1: The self-diagnosis by using the voltage of 0V.,?,?" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Disables automatic clearing.,1: Enables automatic clearing." bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1.--2. "ADPRC,A/D Conversion Accuracy Specify" "0: A/D conversion is performed with 12-bit accuracy.,1: A/D conversion is performed with 10-bit accuracy.,?,?" newline bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.word 0x2 "ADSTRGR,A/D Conversion Start Trigger Select Register" bitfld.word 0x2 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 8.--13. 1. "TRSA,A/D Conversion Start Trigger SelectSelect the A/D conversion start trigger in single scan mode and continuous mode. In group scan mode the A/D conversion start trigger for group A is selected." newline bitfld.word 0x2 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 0.--5. 1. "TRSB,A/D Conversion Start Trigger Select for Group BSelect the A/D conversion start trigger for group B in group scan mode." line.word 0x4 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 11. "OCSB,Internal Reference Voltage A/D Conversion Select for Group B" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 10. "TSSB,Temperature Sensor Output A/D Conversion Select for Group B" "0: The temperature sensor output is not selected.,1: The temperature sensor output is not selected.." bitfld.word 0x4 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: The temperature sensor output is not selected.,1: The temperature sensor output is selected." hexmask.word.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x4 1. "OCSAD,Internal Reference Voltage A/D converted Value Addition/Average Mode Select" "0: Internal reference voltage A/D-converted value..,1: Internal reference voltage A/D-converted value.." bitfld.word 0x4 0. "TSSAD,Temperature Sensor Output A/D converted Value Addition/Average Mode Select" "0: Temperature sensor output A/D-converted value..,1: Temperature sensor output A/D-converted value.." line.word 0x6 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "ANSB06,AN106 Select" "0: AN106 is not subjected to conversion.,1: AN106 is subjected to conversion." newline bitfld.word 0x6 5. "ANSB05,AN105 Select" "0: AN105 is not subjected to conversion.,1: AN105 is subjected to conversion." bitfld.word 0x6 4. "ANSB04,AN104 Select" "0: AN104 is not subjected to conversion.,1: AN104 is subjected to conversion." newline bitfld.word 0x6 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 2. "ANSB02,AN102 Select" "0: AN102 is not subjected to conversion.,1: AN102 is subjected to conversion." newline bitfld.word 0x6 1. "ANSB01,AN101 Select" "0: AN101 is not subjected to conversion.,1: AN101 is subjected to conversion." bitfld.word 0x6 0. "ANSB00,AN100 Select" "0: AN100 is not subjected to conversion.,1: AN100 is subjected to conversion." line.word 0x8 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 6. "ANSB22,AN122 Select" "0: AN122 is not subjected to conversion.,1: AN122 is subjected to conversion." newline bitfld.word 0x8 5. "ANSB21,AN121 Select" "0: AN121 is not subjected to conversion.,1: AN121 is subjected to conversion." bitfld.word 0x8 4. "ANSB20,AN120 Select" "0: AN120 is not subjected to conversion.,1: AN120 is subjected to conversion." newline bitfld.word 0x8 3. "ANSB19,AN119 Select" "0: AN119 is not subjected to conversion.,1: AN119 is subjected to conversion." bitfld.word 0x8 2. "ANSB18,AN118 Select" "0: AN118 is not subjected to conversion.,1: AN118 is subjected to conversion." newline bitfld.word 0x8 1. "ANSB17,AN117 Select" "0: AN117 is not subjected to conversion.,1: AN117 is subjected to conversion." bitfld.word 0x8 0. "ANSB16,AN116 Select" "0: AN116 is not subjected to conversion.,1: AN116 is subjected to conversion." rgroup.word 0x18++0x7 line.word 0x0 "ADDBLDR,A/D Data Duplication Register" hexmask.word 0x0 0.--15. 1. "ADDBLDR,This is a 16-bit read-only register for storing the result of A/D conversion in response to the second trigger in double trigger mode." line.word 0x2 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x2 0.--15. 1. "ADTSDR,This is a 16-bit read-only register for storing the A/D conversion result of temperature sensor output." line.word 0x4 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x4 0.--15. 1. "ADOCDR,This is a 16-bit read-only register for storing the A/D result of internal reference voltage." line.word 0x6 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x6 14.--15. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis has never been executed since..,1: Self-diagnosis using the voltage of 0 V has been..,?,?" bitfld.word 0x6 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" newline hexmask.word 0x6 0.--11. 1. "AD,A/D-converted value (right-justified)NOTE: Unused bits in the AD bit field are fixed '0'" repeat 32. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0x20)++0x1 line.word 0x0 "ADDR$1,A/D Data Register %s" hexmask.word 0x0 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion." repeat.end rgroup.word 0x26++0x1 line.word 0x0 "ADVMDR,A/D VBATMONITOR Data Register" hexmask.word 0x0 0.--15. 1. "ADDR," group.word 0x66++0x1 line.word 0x0 "ADSHCR,A/D Sample and Hold Circuit Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SHANS2,AN102 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline bitfld.word 0x0 9. "SHANS1,AN101 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." bitfld.word 0x0 8. "SHANS0,AN100 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline hexmask.word.byte 0x0 0.--7. 1. "SSTSH,Channel-Dedicated Sample-and-Hold Circuit Sampling Time Setting Set the sampling time (4 to 255 states)" group.byte 0x7A++0x0 line.byte 0x0 "ADDISCR,A/D Disconnection Detection Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PCHG,Selection of Precharge or Discharge" "0: Discharge,1: Precharge" newline hexmask.byte 0x0 0.--3. 1. "ADNDIS,The charging time" group.byte 0x7C++0x0 line.byte 0x0 "ADSHMSR,A/D Sample and Hold Operation Mode Select Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SHMD,Channel-Dedicated Sample-and-Hold Circuit Operation Mode Select" "0: Sampling by channel-dedicated sample-and-hold..,1: Sampling by channel-dedicated sample-and-hold.." group.word 0x80++0x1 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 15. "GBRP,Group B Single Scan Continuous Start(Enabled only when PGS = 1. Reserved when PGS = 0.)Note: When the GBRP bit has been set to 1 single scan is performed continuously for group B regardless of the setting of the GBRSCN bit." "0: Single scan for group B is not continuously..,1: Single scan for group B is continuously activated." hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 1. "GBRSCN,Group B Restart Setting(Enabled only when PGS = 1. Reserved when PGS = 0.)" "0: Scanning for group B is not restarted after..,1: Scanning for group B is restarted after having.." bitfld.word 0x0 0. "PGS,Group A priority control setting bit.Note: When the PGS bit is to be set to 1 the ADCSR.ADCS[1:0] bits must be set to 01b (group scan mode). If the bits are set to any other values proper operation is not guaranteed." "0: Operation is without group A priority control,1: Operation is with group A priority control" rgroup.word 0x84++0x3 line.word 0x0 "ADDBLDRA,A/D Data Duplication Register A" hexmask.word 0x0 0.--15. 1. "ADDBLDRA,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." line.word 0x2 "ADDBLDRB,A/D Data Duplication Register B" hexmask.word 0x2 0.--15. 1. "ADDBLDRB,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." rgroup.byte 0x8C++0x0 line.byte 0x0 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met.,1: Window B comparison conditions are met." newline bitfld.byte 0x0 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met.,1: Window A comparison conditions are met." bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "MONCOMB,Combination result monitorThis bit indicates the combination result.This bit is valid when both window A operation and window B operation are enabled." "0: Window A / window B composite conditions are not..,1: Window A / window B composite conditions are met." group.word 0x90++0x1 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. "CMPAIE,Compare A Interrupt Enable" "0: S12ADCMPAIi interrupt is disabled when..,1: S12ADCMPAIi interrupt is enabled when comparison.." bitfld.word 0x0 14. "WCMPE,Window Function Setting" "0: Window function is disabled. Window A and window..,1: Window function is enabled. Window A and window.." newline bitfld.word 0x0 13. "CMPBIE,Compare B Interrupt Enable" "0: S12ADCMPBIi interrupt is disabled when..,1: S12ADCMPBIi interrupt is enabled when comparison.." bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "CMPAE,Compare Window A Operation Enable" "0: Compare window A operation is disabled.,1: Compare window A operation is enabled." bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "CMPBE,Compare Window B Operation Enable" "0: Compare window B operation is disabled.,1: Compare window B operation is enabled." hexmask.word.byte 0x0 2.--8. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0.--1. "CMPAB,Window A/B Composite Conditions SettingNOTE: These bits are valid when both window A and window B are enabled (CMPAE = 1 and CMPBE = 1)." "0: S12ADWMELC is output when window A comparison..,1: S12ADWMELC is output when window A comparison..,?,?" group.byte 0x92++0x1 line.byte 0x0 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPOCA,Internal reference voltage Compare selection bit." "0: Excludes the internal reference voltage from the..,1: Includes the internal reference voltage in the.." newline bitfld.byte 0x0 0. "CMPTSA,Temperature sensor output Compare selection bit." "0: Excludes the temperature sensor output from the..,1: Includes the temperature sensor output in the.." line.byte 0x1 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "CMPLOCA,Compare Window A Internal Reference Voltage ComparisonCondition Select" "0: ADCMPDR0 value > A/D converted..,1: ADCMPDR0 value < A/D converted.." newline bitfld.byte 0x1 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: ADCMPDR0 register value > A/D-converted..,1: ADCMPDR0 register value < A/D-converted.." group.word 0x94++0xF line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "CMPCHA06,Compare Window A Channel AN106 Select" "0: Disable compare function for AN106,1: Enable compare function for AN106" newline bitfld.word 0x0 5. "CMPCHA05,Compare Window A Channel AN105 Select" "0: Disable compare function for AN105,1: Enable compare function for AN105" bitfld.word 0x0 4. "CMPCHA04,Compare Window A Channel AN104 Select" "0: Disable compare function for AN104,1: Enable compare function for AN104" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "CMPCHA02,Compare Window A Channel AN102 Select" "0: Disable compare function for AN102,1: Enable compare function for AN102" newline bitfld.word 0x0 1. "CMPCHA01,Compare Window A Channel AN101 Select" "0: Disable compare function for AN101,1: Enable compare function for AN101" bitfld.word 0x0 0. "CMPCHA00,Compare Window A Channel AN100 Select" "0: Disable compare function for AN100,1: Enable compare function for AN100" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "CMPCHA22,AN122 Select" "0: Excludes AN122 from the compare window A target..,1: Includes AN122 from the compare window A target.." newline bitfld.word 0x2 5. "CMPCHA21,AN121 Select" "0: Excludes AN121 from the compare window A target..,1: Includes AN121 from the compare window A target.." bitfld.word 0x2 4. "CMPCHA20,AN120 Select" "0: Excludes AN120 from the compare window A target..,1: Includes AN120 from the compare window A target.." newline bitfld.word 0x2 3. "CMPCHA19,AN119 Select" "0: Excludes AN119 from the compare window A target..,1: Includes AN119 from the compare window A target.." bitfld.word 0x2 2. "CMPCHA18,AN118 Select" "0: Excludes AN118 from the compare window A target..,1: Includes AN118 from the compare window A target.." newline bitfld.word 0x2 1. "CMPCHA17,AN117 Select" "0: Excludes AN117 from the compare window A target..,1: Includes AN117 from the compare window A target.." bitfld.word 0x2 0. "CMPCHA16,AN116 Select" "0: Excludes AN116 from the compare window A target..,1: Includes AN116 from the compare window A target.." line.word 0x4 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 6. "CMPLCHA06,Comparison condition of AN106" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 5. "CMPLCHA05,Comparison condition of AN105" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 4. "CMPLCHA04,Comparison condition of AN104" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 2. "CMPLCHA02,Comparison condition of AN102" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 1. "CMPLCHA01,Comparison condition of AN101" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 0. "CMPLCHA00,Comparison condition of AN100" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x6 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "CMPLCHA22,Comparison condition of AN122" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 5. "CMPLCHA21,Comparison condition of AN121" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 4. "CMPLCHA20,Comparison condition of AN120" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 3. "CMPLCHA19,Comparison condition of AN119" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 2. "CMPLCHA18,Comparison condition of AN118" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 1. "CMPLCHA17,Comparison condition of AN117" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 0. "CMPLCHA16,Comparison condition of AN116" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x8 "ADCMPDR0,A/D Compare Function Window A Lower-Side Level Setting Register" hexmask.word 0x8 0.--15. 1. "ADCMPDR0,The ADCMPDR0 register sets the reference data when the compare window A function is used. ADCMPDR0 sets the lower-side level of window A." line.word 0xA "ADCMPDR1,A/D Compare Function Window A Upper-Side Level Setting Register" hexmask.word 0xA 0.--15. 1. "ADCMPDR1,The ADCMPDR1 register sets the reference data when the compare window A function is used. ADCMPDR1 sets the upper-side level of window A.." line.word 0xC "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0" bitfld.word 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 6. "CMPSTCHA06,Compare window A flag of AN106" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 5. "CMPSTCHA05,Compare window A flag of AN105" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 4. "CMPSTCHA04,Compare window A flag of AN104" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 2. "CMPSTCHA02,Compare window A flag of AN102" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 1. "CMPSTCHA01,Compare window A flag of AN101" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 0. "CMPSTCHA00,Compare window A flag of AN100" "0: Comparison conditions are not met.,1: Comparison conditions are met." line.word 0xE "ADCMPSR1,A/D Compare Function Window A Channel Status Register 1" bitfld.word 0xE 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 6. "CMPSTCHA22,Compare window A flag of AN122" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 5. "CMPSTCHA21,Compare window A flag of AN121" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 4. "CMPSTCHA20,Compare window A flag of AN120" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 3. "CMPSTCHA19,Compare window A flag of AN119" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 2. "CMPSTCHA18,Compare window A flag of AN018" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 1. "CMPSTCHA17,Compare window A flag of AN017" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 0. "CMPSTCHA16,Compare window A flag of AN016" "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA4++0x0 line.byte 0x0 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.byte 0x0 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA6++0x0 line.byte 0x0 "ADCMPBNSR,A/D Compare Function Window B Channel Selection Register" bitfld.byte 0x0 7. "CMPLB,Compare window B Compare condition setting bit." "0: CMPLLB value > A/D converted value..,1: CMPLLB value < A/D converted.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x0 0.--5. 1. "CMPCHB,Compare window B channel selection bit.The channel that compares it on the condition of compare window B is selected." group.word 0xA8++0x3 line.word 0x0 "ADWINLLB,A/D Compare Function Window B Lower-Side Level Setting Register" hexmask.word 0x0 0.--15. 1. "ADWINLLB,This register is used to compare A window function is used to set the lower level of the window B." line.word 0x2 "ADWINULB,A/D Compare Function Window B Upper-Side Level Setting Register" hexmask.word 0x2 0.--15. 1. "ADWINULB,This register is used to compare A window function is used to set the higher level of the window B." group.byte 0xAC++0x0 line.byte 0x0 "ADCMPBSR,A/D Compare Function Window B Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CMPSTB,Compare window B flag.It is a status flag that shows the comparative result of CH (AN100-AN102 AN104-AN106 AN116-AN122 temperature sensor and internal reference voltage) made the object of window B relation condition." "0: Comparison conditions are not met.,1: Comparison conditions are met." repeat 16. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0xB0)++0x1 line.word 0x0 "ADBUF$1,A/D Data Buffer Register %s" hexmask.word 0x0 0.--15. 1. "ADBUF,A/D data buffer registers (ADBUF) are 16-bit read-only registers that sequentially store all A/D converted values. The automatic clear function is not applied to these registers." repeat.end group.byte 0xD0++0x0 line.byte 0x0 "ADBUFEN,A/D Data Buffer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BUFEN,Data Buffer Enable" "0: The data buffer is not used.,1: The data buffer is used." group.byte 0xD2++0x0 line.byte 0x0 "ADBUFPTR,A/D Data Buffer Pointer Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "PTROVF,Pointer Overflow Flag" "0: The data buffer pointer has not overflowed.,1: The data buffer pointer has overflowed." newline hexmask.byte 0x0 0.--3. 1. "BUFPTR,Data Buffer PointerThese bits indicate the number of data buffer to which the next A/D converted data is transferred." group.byte 0xDD++0x2 line.byte 0x0 "ADSSTRL,A/D Sampling State Register L" hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting (AN116-AN122)" line.byte 0x1 "ADSSTRT,A/D Sampling State Register T" hexmask.byte 0x1 0.--7. 1. "SST,Sampling Time Setting (temperature sensor output)" line.byte 0x2 "ADSSTRO,A/D Sampling State Register O" hexmask.byte 0x2 0.--7. 1. "SST,Sampling Time Setting (Internal reference voltage)" repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0xE0)++0x0 line.byte 0x0 "ADSSTR$1,A/D Sampling State Register %s" hexmask.byte 0x0 0.--7. 1. "SST,Sampling time setting" repeat.end tree.end tree "ADC121_NS" base ad:0x50332200 group.word 0x0++0x1 line.word 0x0 "ADCSR,A/D Control Register" bitfld.word 0x0 15. "ADST,A/D Conversion Start" "0: Stops A/D conversion process.,1: Starts A/D conversion process." bitfld.word 0x0 13.--14. "ADCS,Scan Mode Select" "0: Single scan mode,1: Group scan mode,?,?" newline bitfld.word 0x0 12. "ADIE,Scan End Interrupt Enable" "0: Disables S12ADI1 interrupt generation upon scan..,1: Enables S12ADI1 interrupt generation upon scan.." bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ADHSC,A/D Conversion Operation Mode Select" "0: High speed A/D conversion mode,1: Low current A/D conversion mode" bitfld.word 0x0 9. "TRGE,Trigger Start Enable" "0: Disables A/D conversion to be started by the..,1: Enables A/D conversion to be started by the.." newline bitfld.word 0x0 8. "EXTRG,Trigger Select" "0: A/D conversion is started by the synchronous..,1: A/D conversion is started by the asynchronous.." bitfld.word 0x0 7. "DBLE,Double Trigger Mode Select" "0: Double trigger mode non-selection,1: Double trigger mode selection" newline bitfld.word 0x0 6. "GBADIE,Group B Scan End Interrupt Enable" "0: Disables S12GBADI1 interrupt generation upon..,1: Enables S12GBADI1 interrupt generation upon.." bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--4. 1. "DBLANS,Double Trigger Channel SelectThese bits select one analog input channel for double triggered operation. The setting is only effective while double trigger mode is selected." group.word 0x4++0x7 line.word 0x0 "ADANSA0,A/D Channel Select Register A0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "ANSA06,AN106 Select" "0: AN106 is not subjected to conversion.,1: AN106 is subjected to conversion." newline bitfld.word 0x0 5. "ANSA05,AN105 Select" "0: AN105 is not subjected to conversion.,1: AN105 is subjected to conversion." bitfld.word 0x0 4. "ANSA04,AN104 Select" "0: AN104 is not subjected to conversion.,1: AN104 is subjected to conversion." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "ANSA02,AN102 Select" "0: AN102 is not subjected to conversion.,1: AN102 is subjected to conversion." newline bitfld.word 0x0 1. "ANSA01,AN101 Select" "0: AN101 is not subjected to conversion.,1: AN101 is subjected to conversion." bitfld.word 0x0 0. "ANSA00,AN100 Select" "0: AN100 is not subjected to conversion.,1: AN100 is subjected to conversion." line.word 0x2 "ADANSA1,A/D Channel Select Register A1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "ANSA22,AN122 Select" "0: AN122 is not subjected to conversion.,1: AN122 is subjected to conversion." newline bitfld.word 0x2 5. "ANSA21,AN121 Select" "0: AN121 is not subjected to conversion.,1: AN121 is subjected to conversion." bitfld.word 0x2 4. "ANSA20,AN120 Select" "0: AN120 is not subjected to conversion.,1: AN120 is subjected to conversion." newline bitfld.word 0x2 3. "ANSA19,AN119 Select" "0: AN119 is not subjected to conversion.,1: AN119 is subjected to conversion." bitfld.word 0x2 2. "ANSA18,AN118 Select" "0: AN118 is not subjected to conversion.,1: AN118 is subjected to conversion." newline bitfld.word 0x2 1. "ANSA17,AN117 Select" "0: AN117 is not subjected to conversion.,1: AN117 is subjected to conversion." bitfld.word 0x2 0. "ANSA16,AN116 Select" "0: AN116 is not subjected to conversion.,1: AN116 is subjected to conversion." line.word 0x4 "ADADS0,A/D-Converted Value Addition/Average Channel Select Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 6. "ADS06,A/D-Converted Value Addition/Average Channel AN106 Select" "0: AN106 is not selected.,1: AN106 is selected." newline bitfld.word 0x4 5. "ADS05,A/D-Converted Value Addition/Average Channel AN105 Select" "0: AN105 is not selected.,1: AN105 is selected." bitfld.word 0x4 4. "ADS04,A/D-Converted Value Addition/Average Channel AN104 Select" "0: AN104 is not selected.,1: AN104 is selected." newline bitfld.word 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 2. "ADS02,A/D-Converted Value Addition/Average Channel AN102 Select" "0: AN102 is not selected.,1: AN102 is selected." newline bitfld.word 0x4 1. "ADS01,A/D-Converted Value Addition/Average Channel AN101 Select" "0: AN101 is not selected.,1: AN101 is selected." bitfld.word 0x4 0. "ADS00,A/D-Converted Value Addition/Average Channel AN100 Select" "0: AN100 is not selected.,1: AN100 is selected." line.word 0x6 "ADADS1,A/D-Converted Value Addition/Average Channel Select Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "ADS22,A/D-Converted Value Addition/Average Channel AN122 Select" "0: AN122 is not selected.,1: AN122 is selected." newline bitfld.word 0x6 5. "ADS21,A/D-Converted Value Addition/Average Channel AN121 Select" "0: AN121 is not selected.,1: AN121 is selected." bitfld.word 0x6 4. "ADS20,A/D-Converted Value Addition/Average Channel AN120 Select" "0: AN120 is not selected.,1: AN120 is selected." newline bitfld.word 0x6 3. "ADS19,A/D-Converted Value Addition/Average Channel AN119 Select" "0: AN119 is not selected.,1: AN119 is selected." bitfld.word 0x6 2. "ADS18,A/D-Converted Value Addition/Average Channel AN118 Select" "0: AN118 is not selected.,1: AN118 is selected." newline bitfld.word 0x6 1. "ADS17,A/D-Converted Value Addition/Average Channel AN117 Select" "0: AN117 is not selected.,1: AN117 is selected." bitfld.word 0x6 0. "ADS16,A/D-Converted Value Addition/Average Channel AN116 Select" "0: AN116 is not selected.,1: AN116 is selected." group.byte 0xC++0x0 line.byte 0x0 "ADADC,A/D-Converted Value Addition/Average Count Select Register" bitfld.byte 0x0 7. "AVEE,Average mode enable bit.Note: The AVEE bit converts twice and only when converting it four times is effective. Please do not set (ADADC.AVEE=1) to conversion (ADADC.ADC 2:0=010b) three times when you select the average mode." "0: Disabled,1: Enabled" hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0.--2. "ADC,Addition frequency selection bit.NOTE: AVEE bit is valid at the only setting of ADC[2:0] bits = 001b or 011b. When average mode is selected by setting the ADADC.AVEE bit to 1 do not set the addition count to three times (ADADC.ADC[2:0] = 010b)" "0: Setting prohibited,1: 2-time conversion (addition once),?,?,?,?,?,?" group.word 0xE++0x9 line.word 0x0 "ADCER,A/D Control Extended Register" bitfld.word 0x0 15. "ADRFMT,A/D Data Register Format Select" "0: Flush-right is selected for the A/D data..,1: Flush-left is selected for the A/D data register.." bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 11. "DIAGM,Self-Diagnosis Enable" "0: Disables self-diagnosis of ADC12.,1: Enables self-diagnosis of ADC12." bitfld.word 0x0 10. "DIAGLD,Self-Diagnosis Mode Select" "0: Rotation mode for self-diagnosis voltage,1: Fixed mode for self-diagnosis voltage" newline bitfld.word 0x0 8.--9. "DIAGVAL,Self-Diagnosis Conversion Voltage Select" "0: When the self-diagnosis fixation mode is..,1: The self-diagnosis by using the voltage of 0V.,?,?" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "ACE,A/D Data Register Automatic Clearing Enable" "0: Disables automatic clearing.,1: Enables automatic clearing." bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1.--2. "ADPRC,A/D Conversion Accuracy Specify" "0: A/D conversion is performed with 12-bit accuracy.,1: A/D conversion is performed with 10-bit accuracy.,?,?" newline bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.word 0x2 "ADSTRGR,A/D Conversion Start Trigger Select Register" bitfld.word 0x2 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 8.--13. 1. "TRSA,A/D Conversion Start Trigger SelectSelect the A/D conversion start trigger in single scan mode and continuous mode. In group scan mode the A/D conversion start trigger for group A is selected." newline bitfld.word 0x2 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 0.--5. 1. "TRSB,A/D Conversion Start Trigger Select for Group BSelect the A/D conversion start trigger for group B in group scan mode." line.word 0x4 "ADEXICR,A/D Conversion Extended Input Control Register" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 11. "OCSB,Internal Reference Voltage A/D Conversion Select for Group B" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 10. "TSSB,Temperature Sensor Output A/D Conversion Select for Group B" "0: The temperature sensor output is not selected.,1: The temperature sensor output is not selected.." bitfld.word 0x4 9. "OCSA,Internal Reference Voltage A/D Conversion Select" "0: The internal reference voltage is not selected.,1: The internal reference voltage is selected for.." newline bitfld.word 0x4 8. "TSSA,Temperature Sensor Output A/D Conversion Select" "0: The temperature sensor output is not selected.,1: The temperature sensor output is selected." hexmask.word.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x4 1. "OCSAD,Internal Reference Voltage A/D converted Value Addition/Average Mode Select" "0: Internal reference voltage A/D-converted value..,1: Internal reference voltage A/D-converted value.." bitfld.word 0x4 0. "TSSAD,Temperature Sensor Output A/D converted Value Addition/Average Mode Select" "0: Temperature sensor output A/D-converted value..,1: Temperature sensor output A/D-converted value.." line.word 0x6 "ADANSB0,A/D Channel Select Register B0" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "ANSB06,AN106 Select" "0: AN106 is not subjected to conversion.,1: AN106 is subjected to conversion." newline bitfld.word 0x6 5. "ANSB05,AN105 Select" "0: AN105 is not subjected to conversion.,1: AN105 is subjected to conversion." bitfld.word 0x6 4. "ANSB04,AN104 Select" "0: AN104 is not subjected to conversion.,1: AN104 is subjected to conversion." newline bitfld.word 0x6 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 2. "ANSB02,AN102 Select" "0: AN102 is not subjected to conversion.,1: AN102 is subjected to conversion." newline bitfld.word 0x6 1. "ANSB01,AN101 Select" "0: AN101 is not subjected to conversion.,1: AN101 is subjected to conversion." bitfld.word 0x6 0. "ANSB00,AN100 Select" "0: AN100 is not subjected to conversion.,1: AN100 is subjected to conversion." line.word 0x8 "ADANSB1,A/D Channel Select Register B1" bitfld.word 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 6. "ANSB22,AN122 Select" "0: AN122 is not subjected to conversion.,1: AN122 is subjected to conversion." newline bitfld.word 0x8 5. "ANSB21,AN121 Select" "0: AN121 is not subjected to conversion.,1: AN121 is subjected to conversion." bitfld.word 0x8 4. "ANSB20,AN120 Select" "0: AN120 is not subjected to conversion.,1: AN120 is subjected to conversion." newline bitfld.word 0x8 3. "ANSB19,AN119 Select" "0: AN119 is not subjected to conversion.,1: AN119 is subjected to conversion." bitfld.word 0x8 2. "ANSB18,AN118 Select" "0: AN118 is not subjected to conversion.,1: AN118 is subjected to conversion." newline bitfld.word 0x8 1. "ANSB17,AN117 Select" "0: AN117 is not subjected to conversion.,1: AN117 is subjected to conversion." bitfld.word 0x8 0. "ANSB16,AN116 Select" "0: AN116 is not subjected to conversion.,1: AN116 is subjected to conversion." rgroup.word 0x18++0x7 line.word 0x0 "ADDBLDR,A/D Data Duplication Register" hexmask.word 0x0 0.--15. 1. "ADDBLDR,This is a 16-bit read-only register for storing the result of A/D conversion in response to the second trigger in double trigger mode." line.word 0x2 "ADTSDR,A/D Temperature Sensor Data Register" hexmask.word 0x2 0.--15. 1. "ADTSDR,This is a 16-bit read-only register for storing the A/D conversion result of temperature sensor output." line.word 0x4 "ADOCDR,A/D Internal Reference Voltage Data Register" hexmask.word 0x4 0.--15. 1. "ADOCDR,This is a 16-bit read-only register for storing the A/D result of internal reference voltage." line.word 0x6 "ADRD,A/D Self-Diagnosis Data Register" bitfld.word 0x6 14.--15. "DIAGST,Self-Diagnosis Status" "0: Self-diagnosis has never been executed since..,1: Self-diagnosis using the voltage of 0 V has been..,?,?" bitfld.word 0x6 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" newline hexmask.word 0x6 0.--11. 1. "AD,A/D-converted value (right-justified)NOTE: Unused bits in the AD bit field are fixed '0'" repeat 32. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0x20)++0x1 line.word 0x0 "ADDR$1,A/D Data Register %s" hexmask.word 0x0 0.--15. 1. "ADDR,The ADDR register is a 16-bit read-only registers for storing the result of A/D conversion." repeat.end rgroup.word 0x26++0x1 line.word 0x0 "ADVMDR,A/D VBATMONITOR Data Register" hexmask.word 0x0 0.--15. 1. "ADDR," group.word 0x66++0x1 line.word 0x0 "ADSHCR,A/D Sample and Hold Circuit Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SHANS2,AN102 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline bitfld.word 0x0 9. "SHANS1,AN101 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." bitfld.word 0x0 8. "SHANS0,AN100 sample-and-hold circuit Select" "0: Bypass the sample-and-hold circuit.,1: Use the sample-and-hold circuit." newline hexmask.word.byte 0x0 0.--7. 1. "SSTSH,Channel-Dedicated Sample-and-Hold Circuit Sampling Time Setting Set the sampling time (4 to 255 states)" group.byte 0x7A++0x0 line.byte 0x0 "ADDISCR,A/D Disconnection Detection Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PCHG,Selection of Precharge or Discharge" "0: Discharge,1: Precharge" newline hexmask.byte 0x0 0.--3. 1. "ADNDIS,The charging time" group.byte 0x7C++0x0 line.byte 0x0 "ADSHMSR,A/D Sample and Hold Operation Mode Select Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SHMD,Channel-Dedicated Sample-and-Hold Circuit Operation Mode Select" "0: Sampling by channel-dedicated sample-and-hold..,1: Sampling by channel-dedicated sample-and-hold.." group.word 0x80++0x1 line.word 0x0 "ADGSPCR,A/D Group Scan Priority Control Register" bitfld.word 0x0 15. "GBRP,Group B Single Scan Continuous Start(Enabled only when PGS = 1. Reserved when PGS = 0.)Note: When the GBRP bit has been set to 1 single scan is performed continuously for group B regardless of the setting of the GBRSCN bit." "0: Single scan for group B is not continuously..,1: Single scan for group B is continuously activated." hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 1. "GBRSCN,Group B Restart Setting(Enabled only when PGS = 1. Reserved when PGS = 0.)" "0: Scanning for group B is not restarted after..,1: Scanning for group B is restarted after having.." bitfld.word 0x0 0. "PGS,Group A priority control setting bit.Note: When the PGS bit is to be set to 1 the ADCSR.ADCS[1:0] bits must be set to 01b (group scan mode). If the bits are set to any other values proper operation is not guaranteed." "0: Operation is without group A priority control,1: Operation is with group A priority control" rgroup.word 0x84++0x3 line.word 0x0 "ADDBLDRA,A/D Data Duplication Register A" hexmask.word 0x0 0.--15. 1. "ADDBLDRA,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." line.word 0x2 "ADDBLDRB,A/D Data Duplication Register B" hexmask.word 0x2 0.--15. 1. "ADDBLDRB,This register is a 16-bit read-only registers for storing the result of A/D conversion in response to the respective triggers during extended operation in double trigger mode." rgroup.byte 0x8C++0x0 line.byte 0x0 "ADWINMON,A/D Compare Function Window A/B Status Monitor Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "MONCMPB,Comparison Result Monitor B" "0: Window B comparison conditions are not met.,1: Window B comparison conditions are met." newline bitfld.byte 0x0 4. "MONCMPA,Comparison Result Monitor A" "0: Window A comparison conditions are not met.,1: Window A comparison conditions are met." bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "MONCOMB,Combination result monitorThis bit indicates the combination result.This bit is valid when both window A operation and window B operation are enabled." "0: Window A / window B composite conditions are not..,1: Window A / window B composite conditions are met." group.word 0x90++0x1 line.word 0x0 "ADCMPCR,A/D Compare Function Control Register" bitfld.word 0x0 15. "CMPAIE,Compare A Interrupt Enable" "0: S12ADCMPAIi interrupt is disabled when..,1: S12ADCMPAIi interrupt is enabled when comparison.." bitfld.word 0x0 14. "WCMPE,Window Function Setting" "0: Window function is disabled. Window A and window..,1: Window function is enabled. Window A and window.." newline bitfld.word 0x0 13. "CMPBIE,Compare B Interrupt Enable" "0: S12ADCMPBIi interrupt is disabled when..,1: S12ADCMPBIi interrupt is enabled when comparison.." bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "CMPAE,Compare Window A Operation Enable" "0: Compare window A operation is disabled.,1: Compare window A operation is enabled." bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "CMPBE,Compare Window B Operation Enable" "0: Compare window B operation is disabled.,1: Compare window B operation is enabled." hexmask.word.byte 0x0 2.--8. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0.--1. "CMPAB,Window A/B Composite Conditions SettingNOTE: These bits are valid when both window A and window B are enabled (CMPAE = 1 and CMPBE = 1)." "0: S12ADWMELC is output when window A comparison..,1: S12ADWMELC is output when window A comparison..,?,?" group.byte 0x92++0x1 line.byte 0x0 "ADCMPANSER,A/D Compare Function Window A Extended Input Select Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPOCA,Internal reference voltage Compare selection bit." "0: Excludes the internal reference voltage from the..,1: Includes the internal reference voltage in the.." newline bitfld.byte 0x0 0. "CMPTSA,Temperature sensor output Compare selection bit." "0: Excludes the temperature sensor output from the..,1: Includes the temperature sensor output in the.." line.byte 0x1 "ADCMPLER,A/D Compare Function Window A Extended Input Comparison Condition Setting Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "CMPLOCA,Compare Window A Internal Reference Voltage ComparisonCondition Select" "0: ADCMPDR0 value > A/D converted..,1: ADCMPDR0 value < A/D converted.." newline bitfld.byte 0x1 0. "CMPLTSA,Compare Window A Temperature Sensor Output Comparison Condition Select" "0: ADCMPDR0 register value > A/D-converted..,1: ADCMPDR0 register value < A/D-converted.." group.word 0x94++0xF line.word 0x0 "ADCMPANSR0,A/D Compare Function Window A Channel Select Register 0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "CMPCHA06,Compare Window A Channel AN106 Select" "0: Disable compare function for AN106,1: Enable compare function for AN106" newline bitfld.word 0x0 5. "CMPCHA05,Compare Window A Channel AN105 Select" "0: Disable compare function for AN105,1: Enable compare function for AN105" bitfld.word 0x0 4. "CMPCHA04,Compare Window A Channel AN104 Select" "0: Disable compare function for AN104,1: Enable compare function for AN104" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "CMPCHA02,Compare Window A Channel AN102 Select" "0: Disable compare function for AN102,1: Enable compare function for AN102" newline bitfld.word 0x0 1. "CMPCHA01,Compare Window A Channel AN101 Select" "0: Disable compare function for AN101,1: Enable compare function for AN101" bitfld.word 0x0 0. "CMPCHA00,Compare Window A Channel AN100 Select" "0: Disable compare function for AN100,1: Enable compare function for AN100" line.word 0x2 "ADCMPANSR1,A/D Compare Function Window A Channel Select Register 1" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 6. "CMPCHA22,AN122 Select" "0: Excludes AN122 from the compare window A target..,1: Includes AN122 from the compare window A target.." newline bitfld.word 0x2 5. "CMPCHA21,AN121 Select" "0: Excludes AN121 from the compare window A target..,1: Includes AN121 from the compare window A target.." bitfld.word 0x2 4. "CMPCHA20,AN120 Select" "0: Excludes AN120 from the compare window A target..,1: Includes AN120 from the compare window A target.." newline bitfld.word 0x2 3. "CMPCHA19,AN119 Select" "0: Excludes AN119 from the compare window A target..,1: Includes AN119 from the compare window A target.." bitfld.word 0x2 2. "CMPCHA18,AN118 Select" "0: Excludes AN118 from the compare window A target..,1: Includes AN118 from the compare window A target.." newline bitfld.word 0x2 1. "CMPCHA17,AN117 Select" "0: Excludes AN117 from the compare window A target..,1: Includes AN117 from the compare window A target.." bitfld.word 0x2 0. "CMPCHA16,AN116 Select" "0: Excludes AN116 from the compare window A target..,1: Includes AN116 from the compare window A target.." line.word 0x4 "ADCMPLR0,A/D Compare Function Window A Comparison Condition Setting Register 0" bitfld.word 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 6. "CMPLCHA06,Comparison condition of AN106" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 5. "CMPLCHA05,Comparison condition of AN105" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 4. "CMPLCHA04,Comparison condition of AN104" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 2. "CMPLCHA02,Comparison condition of AN102" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x4 1. "CMPLCHA01,Comparison condition of AN101" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x4 0. "CMPLCHA00,Comparison condition of AN100" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x6 "ADCMPLR1,A/D Compare Function Window A Comparison Condition Setting Register 1" bitfld.word 0x6 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "CMPLCHA22,Comparison condition of AN122" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 5. "CMPLCHA21,Comparison condition of AN121" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 4. "CMPLCHA20,Comparison condition of AN120" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 3. "CMPLCHA19,Comparison condition of AN119" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 2. "CMPLCHA18,Comparison condition of AN118" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." newline bitfld.word 0x6 1. "CMPLCHA17,Comparison condition of AN117" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." bitfld.word 0x6 0. "CMPLCHA16,Comparison condition of AN116" "0: ADCMPDR0 value > A/D converted value..,1: ADCMPDR0 value < A/D converted value.." line.word 0x8 "ADCMPDR0,A/D Compare Function Window A Lower-Side Level Setting Register" hexmask.word 0x8 0.--15. 1. "ADCMPDR0,The ADCMPDR0 register sets the reference data when the compare window A function is used. ADCMPDR0 sets the lower-side level of window A." line.word 0xA "ADCMPDR1,A/D Compare Function Window A Upper-Side Level Setting Register" hexmask.word 0xA 0.--15. 1. "ADCMPDR1,The ADCMPDR1 register sets the reference data when the compare window A function is used. ADCMPDR1 sets the upper-side level of window A.." line.word 0xC "ADCMPSR0,A/D Compare Function Window A Channel Status Register 0" bitfld.word 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 6. "CMPSTCHA06,Compare window A flag of AN106" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 5. "CMPSTCHA05,Compare window A flag of AN105" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 4. "CMPSTCHA04,Compare window A flag of AN104" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 2. "CMPSTCHA02,Compare window A flag of AN102" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xC 1. "CMPSTCHA01,Compare window A flag of AN101" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xC 0. "CMPSTCHA00,Compare window A flag of AN100" "0: Comparison conditions are not met.,1: Comparison conditions are met." line.word 0xE "ADCMPSR1,A/D Compare Function Window A Channel Status Register 1" bitfld.word 0xE 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xE 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xE 6. "CMPSTCHA22,Compare window A flag of AN122" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 5. "CMPSTCHA21,Compare window A flag of AN121" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 4. "CMPSTCHA20,Compare window A flag of AN120" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 3. "CMPSTCHA19,Compare window A flag of AN119" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 2. "CMPSTCHA18,Compare window A flag of AN018" "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.word 0xE 1. "CMPSTCHA17,Compare window A flag of AN017" "0: Comparison conditions are not met.,1: Comparison conditions are met." bitfld.word 0xE 0. "CMPSTCHA16,Compare window A flag of AN016" "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA4++0x0 line.byte 0x0 "ADCMPSER,A/D Compare Function Window A Extended Input Channel Status Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "CMPSTOCA,Compare Window A Internal Reference Voltage Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." newline bitfld.byte 0x0 0. "CMPSTTSA,Compare Window A Temperature Sensor Output Compare Flag When window A operation is enabled (ADCMPCR.CMPAE = 1b) this bit indicates the temperature sensor output comparison result. When window A operation is disabled (ADCMPCR.CMPAE = 0b) .." "0: Comparison conditions are not met.,1: Comparison conditions are met." group.byte 0xA6++0x0 line.byte 0x0 "ADCMPBNSR,A/D Compare Function Window B Channel Selection Register" bitfld.byte 0x0 7. "CMPLB,Compare window B Compare condition setting bit." "0: CMPLLB value > A/D converted value..,1: CMPLLB value < A/D converted.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x0 0.--5. 1. "CMPCHB,Compare window B channel selection bit.The channel that compares it on the condition of compare window B is selected." group.word 0xA8++0x3 line.word 0x0 "ADWINLLB,A/D Compare Function Window B Lower-Side Level Setting Register" hexmask.word 0x0 0.--15. 1. "ADWINLLB,This register is used to compare A window function is used to set the lower level of the window B." line.word 0x2 "ADWINULB,A/D Compare Function Window B Upper-Side Level Setting Register" hexmask.word 0x2 0.--15. 1. "ADWINULB,This register is used to compare A window function is used to set the higher level of the window B." group.byte 0xAC++0x0 line.byte 0x0 "ADCMPBSR,A/D Compare Function Window B Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CMPSTB,Compare window B flag.It is a status flag that shows the comparative result of CH (AN100-AN102 AN104-AN106 AN116-AN122 temperature sensor and internal reference voltage) made the object of window B relation condition." "0: Comparison conditions are not met.,1: Comparison conditions are met." repeat 16. (increment 0x0 0x1)(increment 0x0 0x2) rgroup.word ($2+0xB0)++0x1 line.word 0x0 "ADBUF$1,A/D Data Buffer Register %s" hexmask.word 0x0 0.--15. 1. "ADBUF,A/D data buffer registers (ADBUF) are 16-bit read-only registers that sequentially store all A/D converted values. The automatic clear function is not applied to these registers." repeat.end group.byte 0xD0++0x0 line.byte 0x0 "ADBUFEN,A/D Data Buffer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BUFEN,Data Buffer Enable" "0: The data buffer is not used.,1: The data buffer is used." group.byte 0xD2++0x0 line.byte 0x0 "ADBUFPTR,A/D Data Buffer Pointer Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "PTROVF,Pointer Overflow Flag" "0: The data buffer pointer has not overflowed.,1: The data buffer pointer has overflowed." newline hexmask.byte 0x0 0.--3. 1. "BUFPTR,Data Buffer PointerThese bits indicate the number of data buffer to which the next A/D converted data is transferred." group.byte 0xDD++0x2 line.byte 0x0 "ADSSTRL,A/D Sampling State Register L" hexmask.byte 0x0 0.--7. 1. "SST,Sampling Time Setting (AN116-AN122)" line.byte 0x1 "ADSSTRT,A/D Sampling State Register T" hexmask.byte 0x1 0.--7. 1. "SST,Sampling Time Setting (temperature sensor output)" line.byte 0x2 "ADSSTRO,A/D Sampling State Register O" hexmask.byte 0x2 0.--7. 1. "SST,Sampling Time Setting (Internal reference voltage)" repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0xE0)++0x0 line.byte 0x0 "ADSSTR$1,A/D Sampling State Register %s" hexmask.byte 0x0 0.--7. 1. "SST,Sampling time setting" repeat.end tree.end tree.end tree "AGT (Low Power Asynchronous General Purpose Timer)" base ad:0x0 tree "AGT0" base ad:0x40221000 group.word 0x0++0x5 line.word 0x0 "AGT,AGT Counter Register" hexmask.word 0x0 0.--15. 1. "AGT,16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register the 16-bit counter is forcibly stopped and set to FFFFH." line.word 0x2 "AGTCMA,AGT Compare Match A Register" hexmask.word 0x2 0.--15. 1. "AGTCMA,AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register set to FFFFH" line.word 0x4 "AGTCMB,AGT Compare Match B Register" hexmask.word 0x4 0.--15. 1. "AGTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register set to FFFFH" group.byte 0x8++0x2 line.byte 0x0 "AGTCR,AGT Control Register" bitfld.byte 0x0 7. "TCMBF,AGT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,AGT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,AGT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 4. "TEDGF,Active edge judgement flag" "0: No active edge received,1: Active edge received" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TSTOP,AGT count forced stop" "0: no effect,1: The count is forcibly stopped." newline rbitfld.byte 0x0 1. "TCSTF,AGT count status flag" "0: Count stops,1: Count starts" bitfld.byte 0x0 0. "TSTART,AGT count start" "0: Count stops,1: Count starts" line.byte 0x1 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4.--6. "TCK,AGT count source select" "0: Setting prohibited,1: PCLKB/8,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "TEDGPL,AGTIO edge polarity select" "0: One edge,1: Both edges" bitfld.byte 0x1 0.--2. "TMOD,AGT operating mode select" "0: Setting prohibited,1: Pulse output mode,?,?,?,?,?,?" line.byte 0x2 "AGTMR2,AGT Mode Register 2" bitfld.byte 0x2 7. "LPM,AGT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" group.byte 0xC++0x3 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 6.--7. "TIOGT,AGTIO count control" "0: Setting prohibited,1: Event is counted during polarity period..,?,?" bitfld.byte 0x0 4.--5. "TIPF,AGTIO input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TOE,AGTO output enable" "0: AGTO output disabled (port),1: AGTO output enabled" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "TEDGSEL,I/O polarity switchFunction varies depending on the operating mode." "0,1" line.byte 0x1 "AGTISR,AGT Event Pin Select Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "EEPS,AGTEE polarty selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level period" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x2 "AGTCMSR,AGT Compare Match Function Select Register" bitfld.byte 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 6. "TOPOLB,AGTOB polarity select" "0: AGTOB Output is started at low,1: AGTOB Output is started at high" newline bitfld.byte 0x2 5. "TOEB,AGTOB output enable" "0: AGTOB output disabled (port),1: AGTOB output enabled" bitfld.byte 0x2 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x2 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 2. "TOPOLA,AGTOA polarity select" "0: AGTOA Output is started at low,1: AGTOA Output is started at high" newline bitfld.byte 0x2 1. "TOEA,AGTOA output enable" "0: AGTOA output disabled (port),1: AGTOA output enabled" bitfld.byte 0x2 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" line.byte 0x3 "AGTIOSEL,AGT Pin Select Register" bitfld.byte 0x3 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x3 4. "TIES,AGTIO input enable" "0: external event input disable during software..,1: external event input enable during software.." newline bitfld.byte 0x3 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x3 0.--1. "SEL,AGTIO pin select" "0: AGTIO_A can not be used as AGTIO input pin in..,1: Setting prohibited,?,?" tree.end tree "AGT0_NS" base ad:0x50221000 group.word 0x0++0x5 line.word 0x0 "AGT,AGT Counter Register" hexmask.word 0x0 0.--15. 1. "AGT,16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register the 16-bit counter is forcibly stopped and set to FFFFH." line.word 0x2 "AGTCMA,AGT Compare Match A Register" hexmask.word 0x2 0.--15. 1. "AGTCMA,AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register set to FFFFH" line.word 0x4 "AGTCMB,AGT Compare Match B Register" hexmask.word 0x4 0.--15. 1. "AGTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register set to FFFFH" group.byte 0x8++0x2 line.byte 0x0 "AGTCR,AGT Control Register" bitfld.byte 0x0 7. "TCMBF,AGT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,AGT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,AGT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 4. "TEDGF,Active edge judgement flag" "0: No active edge received,1: Active edge received" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TSTOP,AGT count forced stop" "0: no effect,1: The count is forcibly stopped." newline rbitfld.byte 0x0 1. "TCSTF,AGT count status flag" "0: Count stops,1: Count starts" bitfld.byte 0x0 0. "TSTART,AGT count start" "0: Count stops,1: Count starts" line.byte 0x1 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4.--6. "TCK,AGT count source select" "0: Setting prohibited,1: PCLKB/8,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "TEDGPL,AGTIO edge polarity select" "0: One edge,1: Both edges" bitfld.byte 0x1 0.--2. "TMOD,AGT operating mode select" "0: Setting prohibited,1: Pulse output mode,?,?,?,?,?,?" line.byte 0x2 "AGTMR2,AGT Mode Register 2" bitfld.byte 0x2 7. "LPM,AGT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" group.byte 0xC++0x3 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 6.--7. "TIOGT,AGTIO count control" "0: Setting prohibited,1: Event is counted during polarity period..,?,?" bitfld.byte 0x0 4.--5. "TIPF,AGTIO input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TOE,AGTO output enable" "0: AGTO output disabled (port),1: AGTO output enabled" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "TEDGSEL,I/O polarity switchFunction varies depending on the operating mode." "0,1" line.byte 0x1 "AGTISR,AGT Event Pin Select Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "EEPS,AGTEE polarty selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level period" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x2 "AGTCMSR,AGT Compare Match Function Select Register" bitfld.byte 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 6. "TOPOLB,AGTOB polarity select" "0: AGTOB Output is started at low,1: AGTOB Output is started at high" newline bitfld.byte 0x2 5. "TOEB,AGTOB output enable" "0: AGTOB output disabled (port),1: AGTOB output enabled" bitfld.byte 0x2 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x2 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 2. "TOPOLA,AGTOA polarity select" "0: AGTOA Output is started at low,1: AGTOA Output is started at high" newline bitfld.byte 0x2 1. "TOEA,AGTOA output enable" "0: AGTOA output disabled (port),1: AGTOA output enabled" bitfld.byte 0x2 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" line.byte 0x3 "AGTIOSEL,AGT Pin Select Register" bitfld.byte 0x3 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x3 4. "TIES,AGTIO input enable" "0: external event input disable during software..,1: external event input enable during software.." newline bitfld.byte 0x3 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x3 0.--1. "SEL,AGTIO pin select" "0: AGTIO_A can not be used as AGTIO input pin in..,1: Setting prohibited,?,?" tree.end tree "AGT1" base ad:0x40221100 group.word 0x0++0x5 line.word 0x0 "AGT,AGT Counter Register" hexmask.word 0x0 0.--15. 1. "AGT,16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register the 16-bit counter is forcibly stopped and set to FFFFH." line.word 0x2 "AGTCMA,AGT Compare Match A Register" hexmask.word 0x2 0.--15. 1. "AGTCMA,AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register set to FFFFH" line.word 0x4 "AGTCMB,AGT Compare Match B Register" hexmask.word 0x4 0.--15. 1. "AGTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register set to FFFFH" group.byte 0x8++0x2 line.byte 0x0 "AGTCR,AGT Control Register" bitfld.byte 0x0 7. "TCMBF,AGT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,AGT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,AGT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 4. "TEDGF,Active edge judgement flag" "0: No active edge received,1: Active edge received" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TSTOP,AGT count forced stop" "0: no effect,1: The count is forcibly stopped." newline rbitfld.byte 0x0 1. "TCSTF,AGT count status flag" "0: Count stops,1: Count starts" bitfld.byte 0x0 0. "TSTART,AGT count start" "0: Count stops,1: Count starts" line.byte 0x1 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4.--6. "TCK,AGT count source select" "0: Setting prohibited,1: PCLKB/8,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "TEDGPL,AGTIO edge polarity select" "0: One edge,1: Both edges" bitfld.byte 0x1 0.--2. "TMOD,AGT operating mode select" "0: Setting prohibited,1: Pulse output mode,?,?,?,?,?,?" line.byte 0x2 "AGTMR2,AGT Mode Register 2" bitfld.byte 0x2 7. "LPM,AGT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" group.byte 0xC++0x3 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 6.--7. "TIOGT,AGTIO count control" "0: Setting prohibited,1: Event is counted during polarity period..,?,?" bitfld.byte 0x0 4.--5. "TIPF,AGTIO input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TOE,AGTO output enable" "0: AGTO output disabled (port),1: AGTO output enabled" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "TEDGSEL,I/O polarity switchFunction varies depending on the operating mode." "0,1" line.byte 0x1 "AGTISR,AGT Event Pin Select Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "EEPS,AGTEE polarty selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level period" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x2 "AGTCMSR,AGT Compare Match Function Select Register" bitfld.byte 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 6. "TOPOLB,AGTOB polarity select" "0: AGTOB Output is started at low,1: AGTOB Output is started at high" newline bitfld.byte 0x2 5. "TOEB,AGTOB output enable" "0: AGTOB output disabled (port),1: AGTOB output enabled" bitfld.byte 0x2 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x2 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 2. "TOPOLA,AGTOA polarity select" "0: AGTOA Output is started at low,1: AGTOA Output is started at high" newline bitfld.byte 0x2 1. "TOEA,AGTOA output enable" "0: AGTOA output disabled (port),1: AGTOA output enabled" bitfld.byte 0x2 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" line.byte 0x3 "AGTIOSEL,AGT Pin Select Register" bitfld.byte 0x3 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x3 4. "TIES,AGTIO input enable" "0: external event input disable during software..,1: external event input enable during software.." newline bitfld.byte 0x3 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x3 0.--1. "SEL,AGTIO pin select" "0: AGTIO_A can not be used as AGTIO input pin in..,1: Setting prohibited,?,?" tree.end tree "AGT1_NS" base ad:0x50221100 group.word 0x0++0x5 line.word 0x0 "AGT,AGT Counter Register" hexmask.word 0x0 0.--15. 1. "AGT,16bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the AGTCRn register the 16-bit counter is forcibly stopped and set to FFFFH." line.word 0x2 "AGTCMA,AGT Compare Match A Register" hexmask.word 0x2 0.--15. 1. "AGTCMA,AGT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCRn register set to FFFFH" line.word 0x4 "AGTCMB,AGT Compare Match B Register" hexmask.word 0x4 0.--15. 1. "AGTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the AGTCR register set to FFFFH" group.byte 0x8++0x2 line.byte 0x0 "AGTCR,AGT Control Register" bitfld.byte 0x0 7. "TCMBF,AGT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,AGT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,AGT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 4. "TEDGF,Active edge judgement flag" "0: No active edge received,1: Active edge received" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TSTOP,AGT count forced stop" "0: no effect,1: The count is forcibly stopped." newline rbitfld.byte 0x0 1. "TCSTF,AGT count status flag" "0: Count stops,1: Count starts" bitfld.byte 0x0 0. "TSTART,AGT count start" "0: Count stops,1: Count starts" line.byte 0x1 "AGTMR1,AGT Mode Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4.--6. "TCK,AGT count source select" "0: Setting prohibited,1: PCLKB/8,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "TEDGPL,AGTIO edge polarity select" "0: One edge,1: Both edges" bitfld.byte 0x1 0.--2. "TMOD,AGT operating mode select" "0: Setting prohibited,1: Pulse output mode,?,?,?,?,?,?" line.byte 0x2 "AGTMR2,AGT Mode Register 2" bitfld.byte 0x2 7. "LPM,AGT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" group.byte 0xC++0x3 line.byte 0x0 "AGTIOC,AGT I/O Control Register" bitfld.byte 0x0 6.--7. "TIOGT,AGTIO count control" "0: Setting prohibited,1: Event is counted during polarity period..,?,?" bitfld.byte 0x0 4.--5. "TIPF,AGTIO input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "TOE,AGTO output enable" "0: AGTO output disabled (port),1: AGTO output enabled" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "TEDGSEL,I/O polarity switchFunction varies depending on the operating mode." "0,1" line.byte 0x1 "AGTISR,AGT Event Pin Select Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "EEPS,AGTEE polarty selection" "0: An event is counted during the low-level period,1: An event is counted during the high-level period" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x2 "AGTCMSR,AGT Compare Match Function Select Register" bitfld.byte 0x2 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 6. "TOPOLB,AGTOB polarity select" "0: AGTOB Output is started at low,1: AGTOB Output is started at high" newline bitfld.byte 0x2 5. "TOEB,AGTOB output enable" "0: AGTOB output disabled (port),1: AGTOB output enabled" bitfld.byte 0x2 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x2 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x2 2. "TOPOLA,AGTOA polarity select" "0: AGTOA Output is started at low,1: AGTOA Output is started at high" newline bitfld.byte 0x2 1. "TOEA,AGTOA output enable" "0: AGTOA output disabled (port),1: AGTOA output enabled" bitfld.byte 0x2 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" line.byte 0x3 "AGTIOSEL,AGT Pin Select Register" bitfld.byte 0x3 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x3 4. "TIES,AGTIO input enable" "0: external event input disable during software..,1: external event input enable during software.." newline bitfld.byte 0x3 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x3 0.--1. "SEL,AGTIO pin select" "0: AGTIO_A can not be used as AGTIO input pin in..,1: Setting prohibited,?,?" tree.end tree.end tree "BUS (BUS Control)" base ad:0x0 tree "BUS" base ad:0x40003000 repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x2)++0x1 line.word 0x0 "CS$1MOD,CS%s Mode Register" bitfld.word 0x0 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" hexmask.word.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 9. "PWENB,Page Write Access Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 8. "PRENB,Page Read Access Enable" "0: Disabled,1: Enabled" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 3. "EWENB,External Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x4)++0x3 line.long 0x0 "CS$1WCR1,CS%s Wait Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "CSRWAIT,Normal Read Cycle Wait Select" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CSWWAIT,Normal Write Cycle Wait Select" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1." "0: Wait with a length of CSPRWAIT clock cycle is..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1." "0: Wait with a length of CSPWWAIT clock cycle is..,?,?,?,?,?,?,?" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x8)++0x3 line.long 0x0 "CS$1WCR2,CS%s Wait Control Register 2" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28.--30. "CSON,CS Assert Wait Select" "0: Wait with a length of CSON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "WDON,Write Data Output Wait Select" "0: Wait with a length of WDON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 20.--22. "WRON,WR Assert Wait Select" "0: Wait with a length of WRON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "RDON,RD Assert Wait Select" "0: Wait with a length of RDON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 12.--13. "AWAIT,Address Cycle Wait Select" "0: Wait with a length of AWAIT clock cycle is..,?,?,?" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: Wait with a length of WDOFF clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4.--6. "CSWOFF,Write Access CS Extension Cycle Select" "0: Wait with a length of CSWOFF clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "CSROFF,Read Access CS Extension Cycle Select" "0: Wait with a length of CSROFF clock cycle is..,?,?,?,?,?,?,?" repeat.end group.word 0x802++0x1 line.word 0x0 "CS0CR,CS0 Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "EMODE,Endian Mode" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "BSIZE,External Bus Width Select" "0: Setting prohibited.,1: 32-bit bus space,?,?" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80A)++0x1 line.word 0x0 "CS$1REC,CS%s Recovery Cycle Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 8.--11. 1. "WRCV,Write Recovery" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 0.--3. 1. "RRCV,Read Recovery" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x812)++0x1 line.word 0x0 "CS$1CR,CS%s Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "EMODE,Endian Mode" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "BSIZE,External Bus Width Select" "0: Setting prohibited.,1: 32-bit bus space,?,?" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" repeat.end group.word 0x880++0x1 line.word 0x0 "CSRECEN,CS Recovery Cycle Insertion Enable Register" bitfld.word 0x0 15. "RCVENM7,Multiplexed Bus Recovery Cycle Insertion Enable 7" "0: Disabled,1: Enabled" bitfld.word 0x0 14. "RCVENM6,Multiplexed Bus Recovery Cycle Insertion Enable 6" "0: Disabled,1: Enabled" newline bitfld.word 0x0 13. "RCVENM5,Multiplexed Bus Recovery Cycle Insertion Enable 5" "0: Disabled,1: Enabled" bitfld.word 0x0 12. "RCVENM4,Multiplexed Bus Recovery Cycle Insertion Enable 4" "0: Disabled,1: Enabled" newline bitfld.word 0x0 11. "RCVENM3,Multiplexed Bus Recovery Cycle Insertion Enable 3" "0: Disabled,1: Enabled" bitfld.word 0x0 10. "RCVENM2,Multiplexed Bus Recovery Cycle Insertion Enable 2" "0: Disabled,1: Enabled" newline bitfld.word 0x0 9. "RCVENM1,Multiplexed Bus Recovery Cycle Insertion Enable 1" "0: Disabled,1: Enabled" bitfld.word 0x0 8. "RCVENM0,Multiplexed Bus Recovery Cycle Insertion Enable 0" "0: Disabled,1: Enabled" newline bitfld.word 0x0 7. "RCVEN7,Separate Bus Recovery Cycle Insertion Enable 7" "0: Disabled,1: Enabled" bitfld.word 0x0 6. "RCVEN6,Separate Bus Recovery Cycle Insertion Enable 6" "0: Disabled,1: Enabled" newline bitfld.word 0x0 5. "RCVEN5,Separate Bus Recovery Cycle Insertion Enable 5" "0: Disabled,1: Enabled" bitfld.word 0x0 4. "RCVEN4,Separate Bus Recovery Cycle Insertion Enable 4" "0: Disabled,1: Enabled" newline bitfld.word 0x0 3. "RCVEN3,Separate Bus Recovery Cycle Insertion Enable 3" "0: Disabled,1: Enabled" bitfld.word 0x0 2. "RCVEN2,Separate Bus Recovery Cycle Insertion Enable 2" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1. "RCVEN1,Separate Bus Recovery Cycle Insertion Enable 1" "0: Disabled,1: Enabled" bitfld.word 0x0 0. "RCVEN0,Separate Bus Recovery Cycle Insertion Enable 0" "0: Disabled,1: Enabled" group.byte 0xC00++0x2 line.byte 0x0 "SDCCR,SDC Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "BSIZE,SDRAM Bus Width Select" "0: Setting prohibited.,1: 32-bit bus space,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "EXENB,Operation Enable" "0: Disable,1: Enable" line.byte 0x1 "SDCMOD,SDC Mode Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "EMODE,Endian Mode" "0: Endian order of SDRAM address space is the same..,1: Endian order of SDRAM address space is not the.." line.byte 0x2 "SDAMOD,SDRAM Access Mode Register" hexmask.byte 0x2 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x2 0. "BE,Continuous Access Enable" "0: Continuous access is disabled,1: Continuous access is enabled" group.byte 0xC10++0x0 line.byte 0x0 "SDSELF,SDRAM Self-Refresh Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SFEN,SDRAM Self-Refresh Enable" "0: Disable,1: Enable" group.word 0xC14++0x1 line.word 0x0 "SDRFCR,SDRAM Refresh Control Register" hexmask.word.byte 0x0 12.--15. 1. "REFW,Auto-Refresh Cycle/ Self-Refresh Clearing Cycle Count Setting. ( REFW+1 Cycles )" hexmask.word 0x0 0.--11. 1. "RFC,Auto-Refresh Request Interval Setting" group.byte 0xC16++0x0 line.byte 0x0 "SDRFEN,SDRAM Auto-Refresh Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "RFEN,Auto-Refresh Operation Enable" "0: Disable,1: Enable" group.byte 0xC20++0x0 line.byte 0x0 "SDICR,SDRAM Initialization Sequence Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "INIRQ,Initialization Sequence Start" "0: Invalid,1: Initialization sequence starts" group.word 0xC24++0x1 line.word 0x0 "SDIR,SDRAM Initialization Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "PRC,Initialization Precharge Cycle Count ( PRF+3 cycles )" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 4.--7. 1. "ARFC,Initialization Auto-Refresh Count" hexmask.word.byte 0x0 0.--3. 1. "ARFI,Initialization Auto-Refresh Interval ( PRF+3 cycles )" group.byte 0xC40++0x0 line.byte 0x0 "SDADR,SDRAM Address Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "MXC,Address Multiplex Select" "0: 8-bit shift,1: 9-bit shift,?,?" group.long 0xC44++0x3 line.long 0x0 "SDTR,SDRAM Timing Register" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 16.--18. "RAI,Row Active Interval" "0: 1 cycle,1: 2 cycles,?,?,?,?,?,?" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 12.--13. "RCD,Row Column Latency ( RCD+1 cycles )" "0,1,2,3" newline bitfld.long 0x0 9.--11. "RP,Row Precharge Interval ( RP+1 cycles )" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8. "WR,Write Recovery Interval" "0: 1 cycle,1: 2 cycles" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "CL,SDRAMC Column Latency" "0: Setting prohibited,1: 1 cycle,?,?,?,?,?,?" group.word 0xC48++0x1 line.word 0x0 "SDMOD,SDRAM Mode Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word 0x0 0.--14. 1. "MR,Mode Register SettingWriting to these bits: Mode register set command is issued." rgroup.byte 0xC50++0x0 line.byte 0x0 "SDSR,SDRAM Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SRFST,Self-Refresh Transition/Recovery Status" "0: Transition/recovery not in progress,1: Transition/recovery in progress" newline bitfld.byte 0x0 3. "INIST,Initialization Status" "0: Initialization sequence not in progress,1: Initialization sequence in progress" bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.byte 0x0 0. "MRSST,Mode Register Setting Status" "0: Mode register setting not in progress,1: Mode register setting in progress" group.word 0x1000++0x1 line.word 0x0 "BUSOAD,BUS_Operation_After_Detection Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "BWERROAD,Bufferable write error operation after detection" "0: NMI,1: Reset" newline bitfld.word 0x0 1. "SLERROAD,Slave bus error operation after detection" "0: NMI,1: Reset" bitfld.word 0x0 0. "ILERROAD,Illegal address access error operation after detection" "0: NMI,1: Reset" group.word 0x1004++0x1 line.word 0x0 "BUSOADPT,BUS_Operation_After_Detection Protect Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: BUSOAD register writing is possible.,1: BUSOAD register writing is protected. Read is.." group.long 0x1100++0x3 line.long 0x0 "BUSMABT,Bus Master Arbitration Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1200++0x3 line.long 0x0 "BUSSABT1FHBI,Bus Slave Arbitration Control Register 1 FHBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ARBS,Arbitration Select" "0: Fixed priority,1: Setting prohibited,?,?" group.long 0x1210++0x3 line.long 0x0 "BUSSABT0FLBI,Bus Slave Arbitration Control Register 0 FLBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1218++0x3 line.long 0x0 "BUSSABT1S0BI,Bus Slave Arbitration Control Register 1 S0BI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ARBS,Arbitration Select" "0: Fixed priority,1: Setting prohibited,?,?" group.long 0x1220++0x3 line.long 0x0 "BUSSABT1S1BI,Bus Slave Arbitration Control Register 1 S1BI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ARBS,Arbitration Select" "0: Fixed priority,1: Setting prohibited,?,?" group.long 0x1248++0x3 line.long 0x0 "BUSSABT0STBYSBI,Bus Slave Arbitration Control Register 0 STBYSBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1250++0x3 line.long 0x0 "BUSSABT2ECBI,Bus Slave Arbitration Control Register 2 ECBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x0 2. "ARBS2,Arbitration Select" "0: Fixed priority,1: Round-robin" bitfld.long 0x0 1. "ARBS1,Arbitration Select" "0: Fixed priority,1: Round-robin" newline bitfld.long 0x0 0. "ARBS0,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1258++0x3 line.long 0x0 "BUSSABT2EOBI,Bus Slave Arbitration Control Register 2 EOBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x0 2. "ARBS2,Arbitration Select" "0: Fixed priority,1: Round-robin" bitfld.long 0x0 1. "ARBS1,Arbitration Select" "0: Fixed priority,1: Round-robin" newline bitfld.long 0x0 0. "ARBS0,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1260++0x3 line.long 0x0 "BUSSABT0PBBI,Bus Slave Arbitration Control Register 0 PBBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1268++0x3 line.long 0x0 "BUSSABT0PABI,Bus Slave Arbitration Control Register 0 PABI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1270++0x3 line.long 0x0 "BUSSABT0PIBI,Bus Slave Arbitration Control Register 0 PIBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1278++0x3 line.long 0x0 "BUSSABT0PSBI,Bus Slave Arbitration Control Register 0 PSBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1300++0x3 line.long 0x0 "BUSDIVBYP,Bus Divider Bypass Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "CPU0SBPE,Divider for CPUSAHBI bypass enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.long 0x0 3. "GDSSBPE,Divider for GDSSBI bypass enable" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "LCDC1BPE,Divider for GLCDC1BI bypass enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "LCDC0BPE,Divider for GLCDC0BI bypass enable" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "EDMABPE,Divider for EDMACBI bypass enable" "0: Disable,1: Enable" group.long 0x1400++0x3 line.long 0x0 "QOSPRI,QoS Priority Setting After Reach Threshold" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "QPCEU," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 6. "QPDRW1," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "QPDRW0," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "QPLCD1," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "QPLCD0," "0: Priority LOW,1: Priority MIDDLE" repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1410)++0x3 line.long 0x0 "QOSCYC$1,QoS Cycle Setting Register %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSCYC,QoS Unit Cycle Setting" repeat.end group.long 0x1430++0x3 line.long 0x0 "BUSMPRI,Bus Master priority setting register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.byte 0x0 0.--3. 1. "PRI,Priority Select" group.long 0x1438++0x3 line.long 0x0 "QOSCYC4,QoS Cycle Setting Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSCYC,QoS Unit Cycle Setting" repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1500)++0x3 line.long 0x0 "QOSTHD$1,QoS Threshold Setting Register %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSTHD,QoS Threshold Setting" repeat.end group.long 0x1528++0x3 line.long 0x0 "QOSTHD4,QoS Threshold Setting Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSTHD,QoS Threshold Setting" repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1600)++0x3 line.long 0x0 "QOSDMON$1,QoS Data Transferred Amount Monitor Register %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSDMON,QoS data transferred amount within a unit cycle" repeat.end group.long 0x1628++0x3 line.long 0x0 "QOSDMON4,QoS Data Transferred Amount Monitor Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSDMON,QoS data transferred amount within a unit cycle" repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.long ($2+0x1830)++0x3 line.long 0x0 "BUS$1ERRADD,Bus Error Address Register %s" hexmask.long 0x0 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address." repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x1834)++0x0 line.byte 0x0 "BUS$1ERRRW,Bus Error RW Register %s" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "RWSTAT,error access Read/Write STAtus" "0: Read access,1: Write access" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.long ($2+0x1930)++0x3 line.long 0x0 "BTZF$1ERRADD,Bus TZF Error Address Register %s" hexmask.long 0x0 0.--31. 1. "BTZFERAD,Bus TZF Error Adress When a TZF error occurs It stores an error address." repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x1934)++0x0 line.byte 0x0 "BTZF$1ERRRW,Bus ZTF Error RW Register %s" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "TRWSTAT,TrustZone filter error access Read/Write STAtus" "0: Read access,1: Write access" repeat.end repeat 12. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x1A00)++0x0 line.byte 0x0 "BUS$1ERRSTAT,Bus Error Status Register %s" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "MSERRSTAT,Master Security attribution unit ERRor STATus" "0: No error occurred,1: Error occurred" newline bitfld.byte 0x0 4. "ILERRSTAT,Illegal address access ERRor STATus" "0: No error occurred,1: Error occurred" bitfld.byte 0x0 3. "MMERRSTAT,Master MPU ERRor STATus" "0: No error occurred,1: Error occurred" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 1. "STERRSTAT,Slave TrustZone filter ERRor STATus" "0: No error occurred,1: Error occurred" newline bitfld.byte 0x0 0. "SLERRSTAT,Slave bus ERRor STATus" "0: No error occurred,1: Error occurred" repeat.end repeat 12. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x1A08)++0x0 line.byte 0x0 "BUS$1ERRCLR,Bus Error Status Register %s" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "MSERRCLR,Master Security attribution unit ERRor CleaR" "0,1" newline bitfld.byte 0x0 4. "ILERRCLR,Illegal address access ERRor CleaR" "0,1" bitfld.byte 0x0 3. "MMERRCLR,Master MPU ERRor CleaR" "0,1" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "STERRCLR,Slave TrustZone filter ERRor CleaR" "0,1" newline bitfld.byte 0x0 0. "SLERRCLR,Slave bus ERRor CleaR" "0,1" repeat.end rgroup.long 0x1B00++0x3 line.long 0x0 "MBWERRSTAT,Master Bufferable Write Error Status Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x0 23. "MBWERR23,Master Bufferable Write Error" "0: No bufferable write error in Master #23,1: Bufferable write error occurs in Master #23" newline bitfld.long 0x0 22. "MBWERR22,Master Bufferable Write Error" "0: No bufferable write error in Master #22,1: Bufferable write error occurs in Master #22" bitfld.long 0x0 21. "MBWERR21,Master Bufferable Write Error" "0: No bufferable write error in Master #21,1: Bufferable write error occurs in Master #21" newline bitfld.long 0x0 20. "MBWERR20,Master Bufferable Write Error" "0: No bufferable write error in Master #20,1: Bufferable write error occurs in Master #20" bitfld.long 0x0 19. "MBWERR19,Master Bufferable Write Error" "0: No bufferable write error in Master #19,1: Bufferable write error occurs in Master #19" newline bitfld.long 0x0 18. "MBWERR18,Master Bufferable Write Error" "0: No bufferable write error in Master #18,1: Bufferable write error occurs in Master #18" bitfld.long 0x0 17. "MBWERR17,Master Bufferable Write Error" "0: No bufferable write error in Master #17,1: Bufferable write error occurs in Master #17" newline bitfld.long 0x0 16. "MBWERR16,Master Bufferable Write Error" "0: No bufferable write error in Master #16,1: Bufferable write error occurs in Master #16" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 8. "MBWERR8,Master Bufferable Write Error" "0: No bufferable write error in Master #8,1: Bufferable write error occurs in Master #8" hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 1. "MBWERR1,Master Bufferable Write Error" "0: No bufferable write error in Master #1,1: Bufferable write error occurs in Master #1" bitfld.long 0x0 0. "MBWERR0,Master Bufferable Write Error" "0: No bufferable write error in Master #0,1: Bufferable write error occurs in Master #0" group.long 0x1B08++0x3 line.long 0x0 "MBWERRCLR,Master Bufferable Write Error Clear Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 23. "MBWECLR23,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 22. "MBWECLR22,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 21. "MBWECLR21,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 20. "MBWECLR20,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 19. "MBWECLR19,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 18. "MBWECLR18,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 17. "MBWECLR17,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 16. "MBWECLR16,Master Bufferable Write Error Clear" "0,1" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "MBWECLR8,Master Bufferable Write Error Clear" "0,1" hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 1. "MBWECLR1,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 0. "MBWECLR0,Master Bufferable Write Error Clear" "0,1" rgroup.long 0x1B20++0x3 line.long 0x0 "SBWERRSTAT,Slave Bufferable Write Error Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "SBWERR12,Slave Bufferable Write Error" "0: No bufferable write error in Slave #12,1: Bufferable write error occurs in Slave #12" bitfld.long 0x0 11. "SBWERR11,Slave Bufferable Write Error" "0: No bufferable write error in Slave #11,1: Bufferable write error occurs in Slave #11" newline bitfld.long 0x0 10. "SBWERR10,Slave Bufferable Write Error" "0: No bufferable write error in Slave #10,1: Bufferable write error occurs in Slave #10" bitfld.long 0x0 9. "SBWERR9,Slave Bufferable Write Error" "0: No bufferable write error in Slave #9,1: Bufferable write error occurs in Slave #9" newline bitfld.long 0x0 8. "SBWERR8,Slave Bufferable Write Error" "0: No bufferable write error in Slave #8,1: Bufferable write error occurs in Slave #8" bitfld.long 0x0 7. "SBWERR7,Slave Bufferable Write Error" "0: No bufferable write error in Slave #7,1: Bufferable write error occurs in Slave #7" newline bitfld.long 0x0 6. "SBWERR6,Slave Bufferable Write Error" "0: No bufferable write error in Slave #6,1: Bufferable write error occurs in Slave #6" bitfld.long 0x0 5. "SBWERR5,Slave Bufferable Write Error" "0: No bufferable write error in Slave #5,1: Bufferable write error occurs in Slave #5" newline bitfld.long 0x0 4. "SBWERR4,Slave Bufferable Write Error" "0: No bufferable write error in Slave #4,1: Bufferable write error occurs in Slave #4" bitfld.long 0x0 3. "SBWERR3,Slave Bufferable Write Error" "0: No bufferable write error in Slave #3,1: Bufferable write error occurs in Slave #3" newline bitfld.long 0x0 2. "SBWERR2,Slave Bufferable Write Error" "0: No bufferable write error in Slave #2,1: Bufferable write error occurs in Slave #2" bitfld.long 0x0 1. "SBWERR1,Slave Bufferable Write Error" "0: No bufferable write error in Slave #1,1: Bufferable write error occurs in Slave #1" newline bitfld.long 0x0 0. "SBWERR0,Slave Bufferable Write Error" "0: No bufferable write error in Slave #0,1: Bufferable write error occurs in Slave #0" group.long 0x1B28++0x3 line.long 0x0 "SBWERRCLR,Slave Bufferable Write Error Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "SBWECLR12,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 11. "SBWECLR11,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 10. "SBWECLR10,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 9. "SBWECLR9,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 8. "SBWECLR8,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 7. "SBWECLR7,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 6. "SBWECLR6,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 5. "SBWECLR5,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 4. "SBWECLR4,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 3. "SBWECLR3,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 2. "SBWECLR2,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 1. "SBWECLR1,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 0. "SBWECLR0,Slave Bufferable Write Error Clear" "0,1" tree.end tree "BUS_NS" base ad:0x50003000 repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x2)++0x1 line.word 0x0 "CS$1MOD,CS%s Mode Register" bitfld.word 0x0 15. "PRMOD,Page Read Access Mode Select" "0: Normal access compatible mode,1: External data read continuous assertion mode" hexmask.word.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 9. "PWENB,Page Write Access Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 8. "PRENB,Page Read Access Enable" "0: Disabled,1: Enabled" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 3. "EWENB,External Wait Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0. "WRMOD,Write Access Mode Select" "0: Byte strobe mode,1: Single write strobe mode" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x4)++0x3 line.long 0x0 "CS$1WCR1,CS%s Wait Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "CSRWAIT,Normal Read Cycle Wait Select" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CSWWAIT,Normal Write Cycle Wait Select" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 8.--10. "CSPRWAIT,Page Read Cycle Wait SelectNOTE: The CSPRWAIT value is valid only when the PRENB bit in CSnMOD is set to 1." "0: Wait with a length of CSPRWAIT clock cycle is..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "CSPWWAIT,Page Write Cycle Wait SelectNOTE: The CSPWWAIT value is valid only when the PWENB bit in CSnMOD is set to 1." "0: Wait with a length of CSPWWAIT clock cycle is..,?,?,?,?,?,?,?" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x8)++0x3 line.long 0x0 "CS$1WCR2,CS%s Wait Control Register 2" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28.--30. "CSON,CS Assert Wait Select" "0: Wait with a length of CSON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "WDON,Write Data Output Wait Select" "0: Wait with a length of WDON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 20.--22. "WRON,WR Assert Wait Select" "0: Wait with a length of WRON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "RDON,RD Assert Wait Select" "0: Wait with a length of RDON clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 12.--13. "AWAIT,Address Cycle Wait Select" "0: Wait with a length of AWAIT clock cycle is..,?,?,?" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8.--10. "WDOFF,Write Data Output Extension Cycle Select" "0: Wait with a length of WDOFF clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4.--6. "CSWOFF,Write Access CS Extension Cycle Select" "0: Wait with a length of CSWOFF clock cycle is..,?,?,?,?,?,?,?" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "CSROFF,Read Access CS Extension Cycle Select" "0: Wait with a length of CSROFF clock cycle is..,?,?,?,?,?,?,?" repeat.end group.word 0x802++0x1 line.word 0x0 "CS0CR,CS0 Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "EMODE,Endian Mode" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "BSIZE,External Bus Width Select" "0: Setting prohibited.,1: 32-bit bus space,?,?" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80A)++0x1 line.word 0x0 "CS$1REC,CS%s Recovery Cycle Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 8.--11. 1. "WRCV,Write Recovery" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 0.--3. 1. "RRCV,Read Recovery" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x812)++0x1 line.word 0x0 "CS$1CR,CS%s Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "MPXEN,Address/Data Multiplexed I/O Interface Select" "0: Separate bus interface is selected for area n,1: Address/data multiplexed I/O interface is.." newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "EMODE,Endian Mode" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "BSIZE,External Bus Width Select" "0: Setting prohibited.,1: 32-bit bus space,?,?" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "EXENB,Operation Enable" "0: Disable operation,1: Enable operation" repeat.end group.word 0x880++0x1 line.word 0x0 "CSRECEN,CS Recovery Cycle Insertion Enable Register" bitfld.word 0x0 15. "RCVENM7,Multiplexed Bus Recovery Cycle Insertion Enable 7" "0: Disabled,1: Enabled" bitfld.word 0x0 14. "RCVENM6,Multiplexed Bus Recovery Cycle Insertion Enable 6" "0: Disabled,1: Enabled" newline bitfld.word 0x0 13. "RCVENM5,Multiplexed Bus Recovery Cycle Insertion Enable 5" "0: Disabled,1: Enabled" bitfld.word 0x0 12. "RCVENM4,Multiplexed Bus Recovery Cycle Insertion Enable 4" "0: Disabled,1: Enabled" newline bitfld.word 0x0 11. "RCVENM3,Multiplexed Bus Recovery Cycle Insertion Enable 3" "0: Disabled,1: Enabled" bitfld.word 0x0 10. "RCVENM2,Multiplexed Bus Recovery Cycle Insertion Enable 2" "0: Disabled,1: Enabled" newline bitfld.word 0x0 9. "RCVENM1,Multiplexed Bus Recovery Cycle Insertion Enable 1" "0: Disabled,1: Enabled" bitfld.word 0x0 8. "RCVENM0,Multiplexed Bus Recovery Cycle Insertion Enable 0" "0: Disabled,1: Enabled" newline bitfld.word 0x0 7. "RCVEN7,Separate Bus Recovery Cycle Insertion Enable 7" "0: Disabled,1: Enabled" bitfld.word 0x0 6. "RCVEN6,Separate Bus Recovery Cycle Insertion Enable 6" "0: Disabled,1: Enabled" newline bitfld.word 0x0 5. "RCVEN5,Separate Bus Recovery Cycle Insertion Enable 5" "0: Disabled,1: Enabled" bitfld.word 0x0 4. "RCVEN4,Separate Bus Recovery Cycle Insertion Enable 4" "0: Disabled,1: Enabled" newline bitfld.word 0x0 3. "RCVEN3,Separate Bus Recovery Cycle Insertion Enable 3" "0: Disabled,1: Enabled" bitfld.word 0x0 2. "RCVEN2,Separate Bus Recovery Cycle Insertion Enable 2" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1. "RCVEN1,Separate Bus Recovery Cycle Insertion Enable 1" "0: Disabled,1: Enabled" bitfld.word 0x0 0. "RCVEN0,Separate Bus Recovery Cycle Insertion Enable 0" "0: Disabled,1: Enabled" group.byte 0xC00++0x2 line.byte 0x0 "SDCCR,SDC Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "BSIZE,SDRAM Bus Width Select" "0: Setting prohibited.,1: 32-bit bus space,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "EXENB,Operation Enable" "0: Disable,1: Enable" line.byte 0x1 "SDCMOD,SDC Mode Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "EMODE,Endian Mode" "0: Endian order of SDRAM address space is the same..,1: Endian order of SDRAM address space is not the.." line.byte 0x2 "SDAMOD,SDRAM Access Mode Register" hexmask.byte 0x2 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x2 0. "BE,Continuous Access Enable" "0: Continuous access is disabled,1: Continuous access is enabled" group.byte 0xC10++0x0 line.byte 0x0 "SDSELF,SDRAM Self-Refresh Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SFEN,SDRAM Self-Refresh Enable" "0: Disable,1: Enable" group.word 0xC14++0x1 line.word 0x0 "SDRFCR,SDRAM Refresh Control Register" hexmask.word.byte 0x0 12.--15. 1. "REFW,Auto-Refresh Cycle/ Self-Refresh Clearing Cycle Count Setting. ( REFW+1 Cycles )" hexmask.word 0x0 0.--11. 1. "RFC,Auto-Refresh Request Interval Setting" group.byte 0xC16++0x0 line.byte 0x0 "SDRFEN,SDRAM Auto-Refresh Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "RFEN,Auto-Refresh Operation Enable" "0: Disable,1: Enable" group.byte 0xC20++0x0 line.byte 0x0 "SDICR,SDRAM Initialization Sequence Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "INIRQ,Initialization Sequence Start" "0: Invalid,1: Initialization sequence starts" group.word 0xC24++0x1 line.word 0x0 "SDIR,SDRAM Initialization Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "PRC,Initialization Precharge Cycle Count ( PRF+3 cycles )" "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 4.--7. 1. "ARFC,Initialization Auto-Refresh Count" hexmask.word.byte 0x0 0.--3. 1. "ARFI,Initialization Auto-Refresh Interval ( PRF+3 cycles )" group.byte 0xC40++0x0 line.byte 0x0 "SDADR,SDRAM Address Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "MXC,Address Multiplex Select" "0: 8-bit shift,1: 9-bit shift,?,?" group.long 0xC44++0x3 line.long 0x0 "SDTR,SDRAM Timing Register" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 16.--18. "RAI,Row Active Interval" "0: 1 cycle,1: 2 cycles,?,?,?,?,?,?" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 12.--13. "RCD,Row Column Latency ( RCD+1 cycles )" "0,1,2,3" newline bitfld.long 0x0 9.--11. "RP,Row Precharge Interval ( RP+1 cycles )" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8. "WR,Write Recovery Interval" "0: 1 cycle,1: 2 cycles" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "CL,SDRAMC Column Latency" "0: Setting prohibited,1: 1 cycle,?,?,?,?,?,?" group.word 0xC48++0x1 line.word 0x0 "SDMOD,SDRAM Mode Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word 0x0 0.--14. 1. "MR,Mode Register SettingWriting to these bits: Mode register set command is issued." rgroup.byte 0xC50++0x0 line.byte 0x0 "SDSR,SDRAM Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SRFST,Self-Refresh Transition/Recovery Status" "0: Transition/recovery not in progress,1: Transition/recovery in progress" newline bitfld.byte 0x0 3. "INIST,Initialization Status" "0: Initialization sequence not in progress,1: Initialization sequence in progress" bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.byte 0x0 0. "MRSST,Mode Register Setting Status" "0: Mode register setting not in progress,1: Mode register setting in progress" group.word 0x1000++0x1 line.word 0x0 "BUSOAD,BUS_Operation_After_Detection Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "BWERROAD,Bufferable write error operation after detection" "0: NMI,1: Reset" newline bitfld.word 0x0 1. "SLERROAD,Slave bus error operation after detection" "0: NMI,1: Reset" bitfld.word 0x0 0. "ILERROAD,Illegal address access error operation after detection" "0: NMI,1: Reset" group.word 0x1004++0x1 line.word 0x0 "BUSOADPT,BUS_Operation_After_Detection Protect Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: BUSOAD register writing is possible.,1: BUSOAD register writing is protected. Read is.." group.long 0x1100++0x3 line.long 0x0 "BUSMABT,Bus Master Arbitration Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1200++0x3 line.long 0x0 "BUSSABT1FHBI,Bus Slave Arbitration Control Register 1 FHBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ARBS,Arbitration Select" "0: Fixed priority,1: Setting prohibited,?,?" group.long 0x1210++0x3 line.long 0x0 "BUSSABT0FLBI,Bus Slave Arbitration Control Register 0 FLBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1218++0x3 line.long 0x0 "BUSSABT1S0BI,Bus Slave Arbitration Control Register 1 S0BI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ARBS,Arbitration Select" "0: Fixed priority,1: Setting prohibited,?,?" group.long 0x1220++0x3 line.long 0x0 "BUSSABT1S1BI,Bus Slave Arbitration Control Register 1 S1BI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ARBS,Arbitration Select" "0: Fixed priority,1: Setting prohibited,?,?" group.long 0x1248++0x3 line.long 0x0 "BUSSABT0STBYSBI,Bus Slave Arbitration Control Register 0 STBYSBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1250++0x3 line.long 0x0 "BUSSABT2ECBI,Bus Slave Arbitration Control Register 2 ECBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x0 2. "ARBS2,Arbitration Select" "0: Fixed priority,1: Round-robin" bitfld.long 0x0 1. "ARBS1,Arbitration Select" "0: Fixed priority,1: Round-robin" newline bitfld.long 0x0 0. "ARBS0,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1258++0x3 line.long 0x0 "BUSSABT2EOBI,Bus Slave Arbitration Control Register 2 EOBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x0 2. "ARBS2,Arbitration Select" "0: Fixed priority,1: Round-robin" bitfld.long 0x0 1. "ARBS1,Arbitration Select" "0: Fixed priority,1: Round-robin" newline bitfld.long 0x0 0. "ARBS0,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1260++0x3 line.long 0x0 "BUSSABT0PBBI,Bus Slave Arbitration Control Register 0 PBBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1268++0x3 line.long 0x0 "BUSSABT0PABI,Bus Slave Arbitration Control Register 0 PABI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1270++0x3 line.long 0x0 "BUSSABT0PIBI,Bus Slave Arbitration Control Register 0 PIBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1278++0x3 line.long 0x0 "BUSSABT0PSBI,Bus Slave Arbitration Control Register 0 PSBI" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "ARBS,Arbitration Select" "0: Fixed priority,1: Round-robin" group.long 0x1300++0x3 line.long 0x0 "BUSDIVBYP,Bus Divider Bypass Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "CPU0SBPE,Divider for CPUSAHBI bypass enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.long 0x0 3. "GDSSBPE,Divider for GDSSBI bypass enable" "0: Disable,1: Enable" newline bitfld.long 0x0 2. "LCDC1BPE,Divider for GLCDC1BI bypass enable" "0: Disable,1: Enable" bitfld.long 0x0 1. "LCDC0BPE,Divider for GLCDC0BI bypass enable" "0: Disable,1: Enable" newline bitfld.long 0x0 0. "EDMABPE,Divider for EDMACBI bypass enable" "0: Disable,1: Enable" group.long 0x1400++0x3 line.long 0x0 "QOSPRI,QoS Priority Setting After Reach Threshold" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "QPCEU," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 6. "QPDRW1," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "QPDRW0," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "QPLCD1," "0: Priority LOW,1: Priority MIDDLE" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "QPLCD0," "0: Priority LOW,1: Priority MIDDLE" repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1410)++0x3 line.long 0x0 "QOSCYC$1,QoS Cycle Setting Register %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSCYC,QoS Unit Cycle Setting" repeat.end group.long 0x1430++0x3 line.long 0x0 "BUSMPRI,Bus Master priority setting register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.byte 0x0 0.--3. 1. "PRI,Priority Select" group.long 0x1438++0x3 line.long 0x0 "QOSCYC4,QoS Cycle Setting Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSCYC,QoS Unit Cycle Setting" repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1500)++0x3 line.long 0x0 "QOSTHD$1,QoS Threshold Setting Register %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSTHD,QoS Threshold Setting" repeat.end group.long 0x1528++0x3 line.long 0x0 "QOSTHD4,QoS Threshold Setting Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSTHD,QoS Threshold Setting" repeat 4. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1600)++0x3 line.long 0x0 "QOSDMON$1,QoS Data Transferred Amount Monitor Register %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSDMON,QoS data transferred amount within a unit cycle" repeat.end group.long 0x1628++0x3 line.long 0x0 "QOSDMON4,QoS Data Transferred Amount Monitor Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "QOSDMON,QoS data transferred amount within a unit cycle" repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.long ($2+0x1830)++0x3 line.long 0x0 "BUS$1ERRADD,Bus Error Address Register %s" hexmask.long 0x0 0.--31. 1. "BERAD,Bus Error AddressWhen a bus error occurs It stores an error address." repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x1834)++0x0 line.byte 0x0 "BUS$1ERRRW,Bus Error RW Register %s" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "RWSTAT,error access Read/Write STAtus" "0: Read access,1: Write access" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.long ($2+0x1930)++0x3 line.long 0x0 "BTZF$1ERRADD,Bus TZF Error Address Register %s" hexmask.long 0x0 0.--31. 1. "BTZFERAD,Bus TZF Error Adress When a TZF error occurs It stores an error address." repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x1934)++0x0 line.byte 0x0 "BTZF$1ERRRW,Bus ZTF Error RW Register %s" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "TRWSTAT,TrustZone filter error access Read/Write STAtus" "0: Read access,1: Write access" repeat.end repeat 12. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x1A00)++0x0 line.byte 0x0 "BUS$1ERRSTAT,Bus Error Status Register %s" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "MSERRSTAT,Master Security attribution unit ERRor STATus" "0: No error occurred,1: Error occurred" newline bitfld.byte 0x0 4. "ILERRSTAT,Illegal address access ERRor STATus" "0: No error occurred,1: Error occurred" bitfld.byte 0x0 3. "MMERRSTAT,Master MPU ERRor STATus" "0: No error occurred,1: Error occurred" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 1. "STERRSTAT,Slave TrustZone filter ERRor STATus" "0: No error occurred,1: Error occurred" newline bitfld.byte 0x0 0. "SLERRSTAT,Slave bus ERRor STATus" "0: No error occurred,1: Error occurred" repeat.end repeat 12. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x1A08)++0x0 line.byte 0x0 "BUS$1ERRCLR,Bus Error Status Register %s" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "MSERRCLR,Master Security attribution unit ERRor CleaR" "0,1" newline bitfld.byte 0x0 4. "ILERRCLR,Illegal address access ERRor CleaR" "0,1" bitfld.byte 0x0 3. "MMERRCLR,Master MPU ERRor CleaR" "0,1" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "STERRCLR,Slave TrustZone filter ERRor CleaR" "0,1" newline bitfld.byte 0x0 0. "SLERRCLR,Slave bus ERRor CleaR" "0,1" repeat.end rgroup.long 0x1B00++0x3 line.long 0x0 "MBWERRSTAT,Master Bufferable Write Error Status Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x0 23. "MBWERR23,Master Bufferable Write Error" "0: No bufferable write error in Master #23,1: Bufferable write error occurs in Master #23" newline bitfld.long 0x0 22. "MBWERR22,Master Bufferable Write Error" "0: No bufferable write error in Master #22,1: Bufferable write error occurs in Master #22" bitfld.long 0x0 21. "MBWERR21,Master Bufferable Write Error" "0: No bufferable write error in Master #21,1: Bufferable write error occurs in Master #21" newline bitfld.long 0x0 20. "MBWERR20,Master Bufferable Write Error" "0: No bufferable write error in Master #20,1: Bufferable write error occurs in Master #20" bitfld.long 0x0 19. "MBWERR19,Master Bufferable Write Error" "0: No bufferable write error in Master #19,1: Bufferable write error occurs in Master #19" newline bitfld.long 0x0 18. "MBWERR18,Master Bufferable Write Error" "0: No bufferable write error in Master #18,1: Bufferable write error occurs in Master #18" bitfld.long 0x0 17. "MBWERR17,Master Bufferable Write Error" "0: No bufferable write error in Master #17,1: Bufferable write error occurs in Master #17" newline bitfld.long 0x0 16. "MBWERR16,Master Bufferable Write Error" "0: No bufferable write error in Master #16,1: Bufferable write error occurs in Master #16" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 8. "MBWERR8,Master Bufferable Write Error" "0: No bufferable write error in Master #8,1: Bufferable write error occurs in Master #8" hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 1. "MBWERR1,Master Bufferable Write Error" "0: No bufferable write error in Master #1,1: Bufferable write error occurs in Master #1" bitfld.long 0x0 0. "MBWERR0,Master Bufferable Write Error" "0: No bufferable write error in Master #0,1: Bufferable write error occurs in Master #0" group.long 0x1B08++0x3 line.long 0x0 "MBWERRCLR,Master Bufferable Write Error Clear Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 23. "MBWECLR23,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 22. "MBWECLR22,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 21. "MBWECLR21,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 20. "MBWECLR20,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 19. "MBWECLR19,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 18. "MBWECLR18,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 17. "MBWECLR17,Master Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 16. "MBWECLR16,Master Bufferable Write Error Clear" "0,1" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "MBWECLR8,Master Bufferable Write Error Clear" "0,1" hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 1. "MBWECLR1,Master Bufferable Write Error Clear" "0,1" bitfld.long 0x0 0. "MBWECLR0,Master Bufferable Write Error Clear" "0,1" rgroup.long 0x1B20++0x3 line.long 0x0 "SBWERRSTAT,Slave Bufferable Write Error Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "SBWERR12,Slave Bufferable Write Error" "0: No bufferable write error in Slave #12,1: Bufferable write error occurs in Slave #12" bitfld.long 0x0 11. "SBWERR11,Slave Bufferable Write Error" "0: No bufferable write error in Slave #11,1: Bufferable write error occurs in Slave #11" newline bitfld.long 0x0 10. "SBWERR10,Slave Bufferable Write Error" "0: No bufferable write error in Slave #10,1: Bufferable write error occurs in Slave #10" bitfld.long 0x0 9. "SBWERR9,Slave Bufferable Write Error" "0: No bufferable write error in Slave #9,1: Bufferable write error occurs in Slave #9" newline bitfld.long 0x0 8. "SBWERR8,Slave Bufferable Write Error" "0: No bufferable write error in Slave #8,1: Bufferable write error occurs in Slave #8" bitfld.long 0x0 7. "SBWERR7,Slave Bufferable Write Error" "0: No bufferable write error in Slave #7,1: Bufferable write error occurs in Slave #7" newline bitfld.long 0x0 6. "SBWERR6,Slave Bufferable Write Error" "0: No bufferable write error in Slave #6,1: Bufferable write error occurs in Slave #6" bitfld.long 0x0 5. "SBWERR5,Slave Bufferable Write Error" "0: No bufferable write error in Slave #5,1: Bufferable write error occurs in Slave #5" newline bitfld.long 0x0 4. "SBWERR4,Slave Bufferable Write Error" "0: No bufferable write error in Slave #4,1: Bufferable write error occurs in Slave #4" bitfld.long 0x0 3. "SBWERR3,Slave Bufferable Write Error" "0: No bufferable write error in Slave #3,1: Bufferable write error occurs in Slave #3" newline bitfld.long 0x0 2. "SBWERR2,Slave Bufferable Write Error" "0: No bufferable write error in Slave #2,1: Bufferable write error occurs in Slave #2" bitfld.long 0x0 1. "SBWERR1,Slave Bufferable Write Error" "0: No bufferable write error in Slave #1,1: Bufferable write error occurs in Slave #1" newline bitfld.long 0x0 0. "SBWERR0,Slave Bufferable Write Error" "0: No bufferable write error in Slave #0,1: Bufferable write error occurs in Slave #0" group.long 0x1B28++0x3 line.long 0x0 "SBWERRCLR,Slave Bufferable Write Error Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "SBWECLR12,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 11. "SBWECLR11,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 10. "SBWECLR10,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 9. "SBWECLR9,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 8. "SBWECLR8,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 7. "SBWECLR7,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 6. "SBWECLR6,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 5. "SBWECLR5,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 4. "SBWECLR4,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 3. "SBWECLR3,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 2. "SBWECLR2,Slave Bufferable Write Error Clear" "0,1" bitfld.long 0x0 1. "SBWECLR1,Slave Bufferable Write Error Clear" "0,1" newline bitfld.long 0x0 0. "SBWECLR0,Slave Bufferable Write Error Clear" "0,1" tree.end tree.end tree "CAC (Clock Frequency Accuracy Measurement Circuit)" base ad:0x0 tree "CAC" base ad:0x40202400 group.byte 0x0++0x3 line.byte 0x0 "CACR0,CAC Control Register 0" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CFME,Clock Frequency Measurement Enable." "0: Disable,1: Enable" line.byte 0x1 "CACR1,CAC Control Register 1" bitfld.byte 0x1 6.--7. "EDGES,Valid Edge Select" "0: Rising edge,1: Falling edge,?,?" bitfld.byte 0x1 4.--5. "TCSS,Measurement Target Clock Frequency Division Ratio Select" "0: No division,1: x 1/4 clock,?,?" newline bitfld.byte 0x1 1.--3. "FMCS,Measurement Target Clock Select" "0: Main clock,1: Sub-clock,?,?,?,?,?,?" bitfld.byte 0x1 0. "CACREFE,CACREF Pin Input Enable" "0: Disable,1: Enable" line.byte 0x2 "CACR2,CAC Control Register 2" bitfld.byte 0x2 6.--7. "DFS,Digital Filter Selection" "0: Digital filtering is disabled.,1: The sampling clock for the digital filter is the..,?,?" bitfld.byte 0x2 4.--5. "RCDS,Measurement Reference Clock Frequency Division Ratio Select" "0: 1/32 clock,1: 1/128 clock,?,?" newline bitfld.byte 0x2 1.--3. "RSCS,Measurement Reference Clock Select" "0: Main clock,1: Sub-clock,?,?,?,?,?,?" bitfld.byte 0x2 0. "RPS,Reference Signal Select" "0: CACREF pin input,1: Internal clock (internally generated signal)" line.byte 0x3 "CAICR,CAC Interrupt Control Register" bitfld.byte 0x3 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 6. "OVFFCL,OVFF Clear" "0: No effect on operations,1: Clears the OVFF flag" newline bitfld.byte 0x3 5. "MENDFCL,MENDF Clear" "0: No effect on operations,1: Clears the MENDF flag" bitfld.byte 0x3 4. "FERRFCL,FERRF Clear" "0: No effect on operations,1: Clears the FERRF flag" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "OVFIE,Overflow Interrupt Request Enable" "0: Disable,1: Enable" newline bitfld.byte 0x3 1. "MENDIE,Measurement End Interrupt Request Enable" "0: Disable,1: Enable" bitfld.byte 0x3 0. "FERRIE,Frequency Error Interrupt Request Enable" "0: Disable,1: Enable" rgroup.byte 0x4++0x0 line.byte 0x0 "CASTR,CAC Status Register" bitfld.byte 0x0 2. "OVFF,Counter Overflow Flag" "0: The counter has not overflowed.,1: The counter has overflowed." bitfld.byte 0x0 1. "MENDF,Measurement End Flag" "0: Measurement is in progress.,1: Measurement has ended." newline bitfld.byte 0x0 0. "FERRF,Frequency Error Flag" "0: The clock frequency is within the range..,1: The clock frequency has deviated beyond the.." group.word 0x6++0x3 line.word 0x0 "CAULVR,CAC Upper-Limit Value Setting Register" hexmask.word 0x0 0.--15. 1. "CAULVR,CAULVR is a 16-bit readable/writable register that stores the upper-limit value of the frequency." line.word 0x2 "CALLVR,CAC Lower-Limit Value Setting Register" hexmask.word 0x2 0.--15. 1. "CALLVR,CALLVR is a 16-bit readable/writable register that stores the lower-limit value of the frequency." rgroup.word 0xA++0x1 line.word 0x0 "CACNTBR,CAC Counter Buffer Register" hexmask.word 0x0 0.--15. 1. "CACNTBR,CACNTBR is a 16-bit read-only register that retains the counter value at the time a valid reference signal edge is input" tree.end tree "CAC_NS" base ad:0x50202400 group.byte 0x0++0x3 line.byte 0x0 "CACR0,CAC Control Register 0" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CFME,Clock Frequency Measurement Enable." "0: Disable,1: Enable" line.byte 0x1 "CACR1,CAC Control Register 1" bitfld.byte 0x1 6.--7. "EDGES,Valid Edge Select" "0: Rising edge,1: Falling edge,?,?" bitfld.byte 0x1 4.--5. "TCSS,Measurement Target Clock Frequency Division Ratio Select" "0: No division,1: x 1/4 clock,?,?" newline bitfld.byte 0x1 1.--3. "FMCS,Measurement Target Clock Select" "0: Main clock,1: Sub-clock,?,?,?,?,?,?" bitfld.byte 0x1 0. "CACREFE,CACREF Pin Input Enable" "0: Disable,1: Enable" line.byte 0x2 "CACR2,CAC Control Register 2" bitfld.byte 0x2 6.--7. "DFS,Digital Filter Selection" "0: Digital filtering is disabled.,1: The sampling clock for the digital filter is the..,?,?" bitfld.byte 0x2 4.--5. "RCDS,Measurement Reference Clock Frequency Division Ratio Select" "0: 1/32 clock,1: 1/128 clock,?,?" newline bitfld.byte 0x2 1.--3. "RSCS,Measurement Reference Clock Select" "0: Main clock,1: Sub-clock,?,?,?,?,?,?" bitfld.byte 0x2 0. "RPS,Reference Signal Select" "0: CACREF pin input,1: Internal clock (internally generated signal)" line.byte 0x3 "CAICR,CAC Interrupt Control Register" bitfld.byte 0x3 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 6. "OVFFCL,OVFF Clear" "0: No effect on operations,1: Clears the OVFF flag" newline bitfld.byte 0x3 5. "MENDFCL,MENDF Clear" "0: No effect on operations,1: Clears the MENDF flag" bitfld.byte 0x3 4. "FERRFCL,FERRF Clear" "0: No effect on operations,1: Clears the FERRF flag" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "OVFIE,Overflow Interrupt Request Enable" "0: Disable,1: Enable" newline bitfld.byte 0x3 1. "MENDIE,Measurement End Interrupt Request Enable" "0: Disable,1: Enable" bitfld.byte 0x3 0. "FERRIE,Frequency Error Interrupt Request Enable" "0: Disable,1: Enable" rgroup.byte 0x4++0x0 line.byte 0x0 "CASTR,CAC Status Register" bitfld.byte 0x0 2. "OVFF,Counter Overflow Flag" "0: The counter has not overflowed.,1: The counter has overflowed." bitfld.byte 0x0 1. "MENDF,Measurement End Flag" "0: Measurement is in progress.,1: Measurement has ended." newline bitfld.byte 0x0 0. "FERRF,Frequency Error Flag" "0: The clock frequency is within the range..,1: The clock frequency has deviated beyond the.." group.word 0x6++0x3 line.word 0x0 "CAULVR,CAC Upper-Limit Value Setting Register" hexmask.word 0x0 0.--15. 1. "CAULVR,CAULVR is a 16-bit readable/writable register that stores the upper-limit value of the frequency." line.word 0x2 "CALLVR,CAC Lower-Limit Value Setting Register" hexmask.word 0x2 0.--15. 1. "CALLVR,CALLVR is a 16-bit readable/writable register that stores the lower-limit value of the frequency." rgroup.word 0xA++0x1 line.word 0x0 "CACNTBR,CAC Counter Buffer Register" hexmask.word 0x0 0.--15. 1. "CACNTBR,CACNTBR is a 16-bit read-only register that retains the counter value at the time a valid reference signal edge is input" tree.end tree.end tree "CANFD (CAN with Flexible Data-rate)" base ad:0x0 tree "CANFD0" base ad:0x40380000 group.long 0x0++0xF line.long 0x0 "CFDC0NCFG,Channel 0 Nominal Bitrate Configuration Register" hexmask.long.byte 0x0 25.--31. 1. "NTSEG2,Timing Segment 2" hexmask.long.byte 0x0 17.--24. 1. "NTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 10.--16. 1. "NSJW,Resynchronization Jump Width" hexmask.long.word 0x0 0.--9. 1. "NBRP,Channel Nominal Baud Rate Prescaler" line.long 0x4 "CFDC0CTR,Channel 0 Control Registers" bitfld.long 0x4 31. "ROM,Restricted Operation Mode" "0: Restricted Operation Mode disabled,1: Restricted Operation Mode enabled" bitfld.long 0x4 30. "BFT,Bit Flip Test" "0: First data bit of reception stream not inverted,1: First data bit of reception stream inverted" newline bitfld.long 0x4 29. "TRR,TEC/REC Reset" "0: Error counter normal operation,1: Error counter reset" bitfld.long 0x4 28. "TRH,TEC/REC Hold" "0: Error counter normal operation,1: Error counter frozen" newline bitfld.long 0x4 27. "TRWE,TEC/REC Write Enable" "0: Error Counter write disabled,1: Error Counter write enabled" bitfld.long 0x4 25.--26. "CTMS,Channel Test Mode Select" "0: Basic test mode,1: Listen-Only mode,?,?" newline bitfld.long 0x4 24. "CTME,Channel Test Mode Enable" "0: Channel Test Mode disabled,1: Channel Test Mode enabled" bitfld.long 0x4 23. "ERRD,Channel Error Display" "0: Only the 1st set of error codes displayed,1: Accumulated error codes displayed" newline bitfld.long 0x4 21.--22. "BOM,Channel Bus-Off Mode" "0: Normal mode (comply with ISO 11898-1),1: Entry to Halt Mode automatically at Bus-Off start,?,?" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "TDCVFIE,Transceiver Delay Compensation Violation Interrupt enable" "0: Transceiver Delay Compensation Violation..,1: Transceiver Delay Compensation Violation.." bitfld.long 0x4 18. "SOCOIE,Successful Occurrence Counter Overflow Interrupt enable" "0: Successful occurrence counter overflow interrupt..,1: Successful occurrence counter overflow interrupt.." newline bitfld.long 0x4 17. "EOCOIE,Error occurrence counter overflow Interrupt enable" "0: Error occurrence counter overflow Interrupt..,1: Error occurrence counter overflow Interrupt.." bitfld.long 0x4 16. "TAIE,Transmission abort Interrupt Enable" "0: TX abort Interrupt disabled,1: TX abort Interrupt enabled" newline bitfld.long 0x4 15. "ALIE,Arbitration Lost Interrupt Enable" "0: Arbitration Lost Interrupt disabled,1: Arbitration Lost Interrupt enabled" bitfld.long 0x4 14. "BLIE,Bus Lock Interrupt Enable" "0: Bus Lock Interrupt disabled,1: Bus Lock Interrupt enabled" newline bitfld.long 0x4 13. "OLIE,Overload Interrupt Enable" "0: Overload Interrupt disabled,1: Overload Interrupt enabled" bitfld.long 0x4 12. "BORIE,Bus-Off Recovery Interrupt Enable" "0: Bus-Off Recovery Interrupt disabled,1: Bus-Off Recovery Interrupt enabled" newline bitfld.long 0x4 11. "BOEIE,Bus-Off Entry Interrupt Enable" "0: Bus-Off Entry Interrupt disabled,1: Bus-Off Entry Interrupt enabled" bitfld.long 0x4 10. "EPIE,Error Passive Interrupt Enable" "0: Error Passive Interrupt disabled,1: Error Passive Interrupt enabled" newline bitfld.long 0x4 9. "EWIE,Error Warning Interrupt Enable" "0: Error Warning Interrupt disabled,1: Error Warning Interrupt enabled" bitfld.long 0x4 8. "BEIE,Bus Error Interrupt Enable" "0: Bus Error Interrupt disabled,1: Bus Error Interrupt enabled" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "RTBO,Return from Bus-Off" "0: Channel is not forced to return from Bus-Off,1: Channel is forced to return from Bus-Off" newline bitfld.long 0x4 2. "CSLPR,Channel Sleep Request" "0: Channel Sleep Request disabled,1: Channel Sleep Request enabled" bitfld.long 0x4 0.--1. "CHMDC,Channel Mode Control" "0: Channel Operation Mode request,1: Channel Reset request,?,?" line.long 0x8 "CFDC0STS,Channel 0 Status Registers" hexmask.long.byte 0x8 24.--31. 1. "TEC,Transmission Error Count" hexmask.long.byte 0x8 16.--23. 1. "REC,Reception Error Count" newline hexmask.long.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 8. "ESIF,Error State Indication Flag" "0: No CAN-FD message has been received with the ESI..,1: At least 1 CAN-FD message was received where the.." newline rbitfld.long 0x8 7. "COMSTS,Channel Communication Status" "0: Channel is not ready for communication,1: Channel is ready for communication" rbitfld.long 0x8 6. "RECSTS,Channel Receive Status" "0: Channel is not receiving,1: Channel is receiving" newline rbitfld.long 0x8 5. "TRMSTS,Channel Transmit Status" "0: Channel is not transmitting,1: Channel is transmitting" rbitfld.long 0x8 4. "BOSTS,Channel Bus-Off Status" "0: Channel not in Bus-Off state,1: Channel in Bus-Off state" newline rbitfld.long 0x8 3. "EPSTS,Channel Error Passive Status" "0: Channel not in Error Passive state.,1: Channel in Error Passive state." rbitfld.long 0x8 2. "CSLPSTS,Channel SLEEP Status" "0: Channel not in Sleep Mode,1: Channel in Sleep Mode" newline rbitfld.long 0x8 1. "CHLTSTS,Channel HALT Status" "0: Channel not in Halt Mode,1: Channel in Halt Mode" rbitfld.long 0x8 0. "CRSTSTS,Channel RESET Status" "0: Channel not in Reset Mode,1: Channel in Reset Mode" line.long 0xC "CFDC0ERFL,Channel 0 Error Flag Registers" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0xC 16.--30. 1. "CRCREG,CRC Register value" newline bitfld.long 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 14. "ADERR,Acknowledge Delimiter Error" "0: Channel Ack Del Error not detected,1: Channel Ack Del Error detected" newline bitfld.long 0xC 13. "B0ERR,Bit 0 Error" "0: Channel Bit 0 Error not detected,1: Channel Bit 0 Error detected" bitfld.long 0xC 12. "B1ERR,Bit 1 Error" "0: Channel Bit 1 Error not detected,1: Channel Bit 1 Error detected" newline bitfld.long 0xC 11. "CERR,CRC Error" "0: Channel CRC Error not detected,1: Channel CRC Error detected" bitfld.long 0xC 10. "AERR,Acknowledge Error" "0: Channel Ack Error not detected,1: Channel Ack Error detected" newline bitfld.long 0xC 9. "FERR,Form Error" "0: Channel Form Error not detected,1: Channel Form Error detected" bitfld.long 0xC 8. "SERR,Stuff Error" "0: Channel stuff Error not detected,?" newline bitfld.long 0xC 7. "ALF,Arbitration Lost Flag" "0: Channel Arbitration Lost not detected,1: Channel Arbitration Lost detected" bitfld.long 0xC 6. "BLF,Bus Lock Flag" "0: Channel Bus Lock not detected,1: Channel Bus Lock detected" newline bitfld.long 0xC 5. "OVLF,Overload Flag" "0: Channel Overload not detected,1: Channel Overload detected" bitfld.long 0xC 4. "BORF,Bus-Off Recovery Flag" "0: Channel Bus-Off Recovery not detected,1: Channel Bus-Off Recovery detected" newline bitfld.long 0xC 3. "BOEF,Bus-Off Entry Flag" "0: Channel Bus-Off Entry not detected,1: Channel Bus-Off Entry detected" bitfld.long 0xC 2. "EPF,Error Passive Flag" "0: Channel Error Passive not detected,1: Channel Error Passive detected" newline bitfld.long 0xC 1. "EWF,Error Warning Flag" "0: Channel Error Warning not detected,1: Channel Error Warning detected" bitfld.long 0xC 0. "BEF,Bus Error Flag" "0: Channel Bus Error not detected,1: Channel Bus Error detected" rgroup.long 0x10++0x3 line.long 0x0 "CFDGIPV,Global IP Version Register" hexmask.long.word 0x0 16.--31. 1. "PSI,Parameter Status Information" bitfld.long 0x0 15. "CPUBUS,CPU bus information" "0,1" newline hexmask.long.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 8.--9. "IPT,IP Type Release Number" "0,1,2,3" newline hexmask.long.byte 0x0 0.--7. 1. "IPV,IP Version Release Number" group.long 0x14++0x7 line.long 0x0 "CFDGCFG,Global Configuration Register" hexmask.long.word 0x0 16.--31. 1. "ITRCP,Interval Timer Reference Clock Prescaler" bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSSS,Timestamp Source Select" "0: Source clock for Timestamp counter is peripheral..,1: Source clock for Timestamp counter is bit time.." hexmask.long.byte 0x0 8.--11. 1. "TSP,Timestamp Prescaler" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "CMPOC,CAN-FD message Payload overflow configuration" "0: Message is rejected,1: Message payload is cut to fit to configured.." newline bitfld.long 0x0 4. "DCS,Data Link Controller Clock Select" "0: Internal clean clock,1: External Clock source connected to clk_xincan pin" bitfld.long 0x0 3. "MME,Mirror Mode Enable" "0: Mirror Mode disabled,1: Mirror Mode enabled" newline bitfld.long 0x0 2. "DRE,DLC Replacement Enable" "0: DLC replacement disabled,1: DLC replacement enabled" bitfld.long 0x0 1. "DCE,DLC Check Enable" "0: DLC check disabled,1: DLC check enabled" newline bitfld.long 0x0 0. "TPRI,Transmission Priority" "0: ID Priority,1: Message Buffer Number Priority" line.long 0x4 "CFDGCTR,Global Control Register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "TSWR,Timestamp Write" "0: Timestamp write disabled,1: Timestamp write enabled" newline bitfld.long 0x4 16. "TSRST,Timestamp Reset" "0: Timestamp not reset,1: Timestamp reset" hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 11. "CMPOFIE,CAN-FD message payload overflow Flag Interrupt enable" "0: CAN-FD message payload overflow Flag Interrupt..,1: CAN-FD message payload overflow Flag Interrupt.." bitfld.long 0x4 10. "THLEIE,TX History List Entry Lost Interrupt Enable" "0: TX History List Entry Lost Interrupt Disabled,1: TX History List Entry Lost Interrupt Enabled" newline bitfld.long 0x4 9. "MEIE,Message lost Error Interrupt Enable" "0: Message Lost Error Interrupt Disabled,1: Message Lost Error Interrupt Enabled" bitfld.long 0x4 8. "DEIE,DLC check Interrupt Enable" "0: DLC check Interrupt Disabled,1: DLC check Interrupt Enabled" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 2. "GSLPR,Global Sleep Request" "0: Global Sleep Request Disabled,1: Global Sleep Request Enabled" newline bitfld.long 0x4 0.--1. "GMDC,Global Mode Control" "0: ID Priority,1: Message Buffer Number Priority,?,?" rgroup.long 0x1C++0x3 line.long 0x0 "CFDGSTS,Global Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." bitfld.long 0x0 3. "GRAMINIT,Global RAM Initialisation" "0: RAM initialisation is finished,1: RAM initialisation ongoing" newline bitfld.long 0x0 2. "GSLPSTS,Global Sleep Status" "0: Not in Sleep Mode,1: In Sleep Mode" bitfld.long 0x0 1. "GHLTSTS,Global Halt Status" "0: Not in Halt Mode,1: In Halt Mode" newline bitfld.long 0x0 0. "GRSTSTS,Global Reset Status" "0: Not in Reset Mode,1: In Reset Mode" group.long 0x20++0x3 line.long 0x0 "CFDGERFL,Global Error Flag Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "EEF,ECC Error Flag" "0: ECC Error not detected during TX-SCAN,1: ECC Error detected during TX-SCAN" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "RXSFAIL,RX Scan Fail" "0: RX Scan fail not detected,1: RX Scan fail detected" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.long 0x0 5. "OTBMLTSTS,OTB FIFO Message Lost Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 3. "CMPOF,CAN-FD message payload overflow Flag" "0: CAN-FD message payload overflow not detected,1: CAN-FD message payload overflow detected" newline rbitfld.long 0x0 2. "THLES,TX History List Entry Lost Error Status" "0: TX History List Entry Lost Error not detected,1: TX History List Entry Lost Error detected" rbitfld.long 0x0 1. "MES,Message Lost Error Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 0. "DEF,DLC Error Flag" "?,1: DLC Error detected" rgroup.long 0x24++0x3 line.long 0x0 "CFDGTSC,Global Timestamp Counter Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "TS,Timestamp Value" group.long 0x28++0x13 line.long 0x0 "CFDGAFLECTR,Global Acceptance Filter List Entry Control Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "AFLDAE,Acceptance Filter List Data Access Enable" "0: Acceptance Filter List Data access disabled,1: Acceptance Filter List Data access enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.long 0x4 "CFDGAFLCFG,Global Acceptance Filter List Configuration Register" hexmask.long.word 0x4 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." hexmask.long.byte 0x4 16.--21. 1. "RNC,Rule Number" newline hexmask.long.word 0x4 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x8 "CFDRMNB,RX Message Buffer Number Register" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x8 8.--10. "RMPLS,Reception Message Buffer Payload Data Size" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" newline bitfld.long 0x8 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "NRXMB,Number of RX Message Buffers" line.long 0xC "CFDRMND,RX Message Buffer New Data Register t(t=0)" hexmask.long 0xC 0.--31. 1. "RMNSu,RX Message Buffer New Data Status" line.long 0x10 "CFDRMIEC,RX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x10 0.--31. 1. "RMIE,RX Message Buffer Interrupt Enable" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3C)++0x3 line.long 0x0 "CFDRFCC$1,RX FIFO Configuration / Control Registers %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "RFIGCV,RX FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" newline bitfld.long 0x0 12. "RFIM,RX FIFO Interrupt Mode" "0: Interrupt generated when RX FIFO counter reaches..,1: Interrupt generated at the end of every received.." bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 8.--10. "RFDC,RX FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4.--6. "RFPLS,Rx FIFO Payload Data Size configuration" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "RFIE,RX FIFO Interrupt Enable" "0: FIFO Interrupt generation disabled,1: FIFO Interrupt generation enabled" bitfld.long 0x0 0. "RFE,RX FIFO Enable" "0: FIFO disabled,1: FIFO enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CFDRFSTS$1,RX FIFO Status Registers %s" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x0 8.--13. 1. "RFMC,RX FIFO Message Count" newline hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 3. "RFIF,RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied,1: FIFO Full interrupt condition satisfied" newline bitfld.long 0x0 2. "RFMLT,RX FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 1. "RFFLL,RX FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 0. "RFEMP,RX FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4C)++0x3 line.long 0x0 "CFDRFPCTR$1,RX FIFO Pointer Control Registers %s" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RFPC,RX FIFO Pointer Control" repeat.end group.long 0x54++0xB line.long 0x0 "CFDCFCC,Common FIFO Configuration / Control Registers" hexmask.long.byte 0x0 24.--31. 1. "CFITT,Common FIFO Interval Transmission Time" bitfld.long 0x0 21.--23. "CFDC,Common FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" newline bitfld.long 0x0 18.--20. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--17. "CFTML,Common FIFO TX Message Buffer Link" "0,1,2,3" newline bitfld.long 0x0 13.--15. "CFIGCV,Common FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" bitfld.long 0x0 12. "CFIM,Common FIFO Interrupt Mode" "0,1" newline bitfld.long 0x0 11. "CFITR,Common FIFO Interval Timer Resolution" "0: Reference Clock Period x1,1: Reference Clock Period x10" bitfld.long 0x0 10. "CFITSS,Common FIFO Interval Timer Source Select" "0: Reference Clock (x1 / x10 period),1: Bit Time Clock of related channel (FIFO is.." newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8. "CFM,Common FIFO Mode" "0: RX FIFO Mode,1: TX FIFO Mode" newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4.--6. "CFPLS,Common FIFO Payload Data size configuration" "0: 8 Bytes,?,?,?,?,?,?,?" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "CFTXIE,Common FIFO TX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame TX,1: FIFO Interrupt generation enabled for Frame TX" newline bitfld.long 0x0 1. "CFRXIE,Common FIFO RX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame RX,1: FIFO Interrupt generation enabled for Frame RX" bitfld.long 0x0 0. "CFE,Common FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDCFSTS,Common FIFO Status Registers" hexmask.long.tbyte 0x4 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x4 8.--13. 1. "CFMC,Common FIFO Message Count" newline bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 4. "CFTXIF,Common TX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." newline bitfld.long 0x4 3. "CFRXIF,Common RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." bitfld.long 0x4 2. "CFMLT,Common FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" newline rbitfld.long 0x4 1. "CFFLL,Common FIFO Full" "0: FIFO Not Full,1: FIFO Full" rbitfld.long 0x4 0. "CFEMP,Common FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDCFPCTR,Common FIFO Pointer Control Registers" hexmask.long.tbyte 0x8 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x8 0.--7. 1. "CFPC,Common FIFO Pointer Control" rgroup.long 0x60++0xF line.long 0x0 "CFDFESTS,FIFO Empty Status Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x0 8. "CFEMP,Common FIF0 Empty Status" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 1. "RF1EMP,RX FIF0 1 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x0 0. "RF0EMP,RX FIF0 0 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x4 "CFDFFSTS,FIFO Full Status Register" hexmask.long.tbyte 0x4 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x4 8. "CFFLL,Common FIF0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x4 1. "RF1FLL,RX FIF0 1 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x4 0. "RF0FLL,RX FIF0 0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDFMSTS,FIFO Message Lost Status Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x8 8. "CFMLT,Common FIFO Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "RF1MLT,RX FIFO 1 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline bitfld.long 0x8 0. "RF0MLT,RX FIFO 0 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" line.long 0xC "CFDRFISTS,RX FIFO Interrupt Flag Status Register" hexmask.long 0xC 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000." bitfld.long 0xC 1. "RF1IF,RX FIFO[1] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" newline bitfld.long 0xC 0. "RF0IF,RX FIFO[0] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x70)++0x0 line.byte 0x0 "CFDTMC$1,TX Message Buffer Control Registers %s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TMOM,TX Message Buffer One-shot Mode" "0: TX Message Buffer not configured in one-shot mode,1: TX Message Buffer configured in one-shot mode" newline bitfld.byte 0x0 1. "TMTAR,TX Message Buffer Transmission abort Request" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." bitfld.byte 0x0 0. "TMTR,TX Message Buffer Transmission Request" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x74)++0x0 line.byte 0x0 "CFDTMSTS$1,TX Message Buffer Status Registers %s" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "TMTARM,TX Message Buffer Transmission abort Request Mirrored" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." newline rbitfld.byte 0x0 3. "TMTRM,TX Message Buffer Transmission Request Mirrored" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" bitfld.byte 0x0 1.--2. "TMTRF,TX Message Buffer Transmission Result Flag" "0: No Result,1: Transmission aborted from the TX MB,?,?" newline rbitfld.byte 0x0 0. "TMTSTS,TX Message Buffer Transmission Status" "0: No transmission ongoing,1: Transmission ongoing" repeat.end rgroup.long 0x78++0xF line.long 0x0 "CFDTMTRSTS,TX Message Buffer Transmission Request Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "CFDTMTRSTS,TX Message Buffer Transmission Request Status" line.long 0x4 "CFDTMTARSTS,TX Message Buffer Transmission Abort Request Status Register" hexmask.long 0x4 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x4 0.--3. 1. "CFDTMTARSTS,TX Message Buffer Transmission abort Request Status" line.long 0x8 "CFDTMTCSTS,TX Message Buffer Transmission Completion Status Register" hexmask.long 0x8 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x8 0.--3. 1. "CFDTMTCSTS,TX Message Buffer Transmission Completion Status" line.long 0xC "CFDTMTASTS,TX Message Buffer Transmission Abort Status Register" hexmask.long 0xC 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0xC 0.--3. 1. "CFDTMTASTS,TX Message Buffer Transmission abort Status" group.long 0x88++0xB line.long 0x0 "CFDTMIEC,TX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "TMIE,TX Message Buffer Interrupt Enable" line.long 0x4 "CFDTXQCC,TX Queue Configuration / Control Registers" hexmask.long.tbyte 0x4 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x4 8.--9. "TXQDC,TX Queue Depth Configuration" "0: 0 messages,1: Reserved,?,?" newline bitfld.long 0x4 7. "TXQIM,TX Queue Interrupt Mode" "0: when the last message is successfully transmitted,1: At every successful transmission" bitfld.long 0x4 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 5. "TXQTXIE,TX Queue TX Interrupt Enable" "0: TX Queue TX Interrupt disabled,1: TX Queue TX Interrupt enabled" hexmask.long.byte 0x4 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 0. "TXQE,TX Queue Enable" "0: TX Queue disabled,1: TX Queue enabled" line.long 0x8 "CFDTXQSTS,TX Queue Status Registers0" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." rbitfld.long 0x8 8.--10. "TXQMC,TX Queue Message Count" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x8 2. "TXQTXIF,TX Queue TX Interrupt Flag" "0: TX Queue interrupt condition not satisfied after..,1: TX Queue interrupt condition satisfied after.." newline rbitfld.long 0x8 1. "TXQFLL,TX Queue Full" "0: TX Queue Not Full,1: TX Queue Full" rbitfld.long 0x8 0. "TXQEMP,TX Queue Empty" "0: TX Queue Not Empty,1: TX Queue Empty" wgroup.long 0x94++0x3 line.long 0x0 "CFDTXQPCTR,TX Queue Pointer Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TXQPC,TX Queue Pointer Control" group.long 0x98++0x7 line.long 0x0 "CFDTHLCC,TX History List Configuration / Control Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "THLDTE,TX History List Dedicated TX Enable" "0: TX FIFO + TX Queue (TX FIFO Only RL version),1: Flat TX MB + TX FIFO + TX Queue (Flat TX MB + TX.." newline bitfld.long 0x0 9. "THLIM,TX History List Interrupt Mode" "0: Interrupt generated if TX History List level..,1: Interrupt generated for every successfully.." bitfld.long 0x0 8. "THLIE,TX History List Interrupt Enable" "0: TX History List Interrupt disabled,1: TX History List Interrupt enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "THLE,TX History List Enable" "0: TX History List disabled,1: TX History List enabled" line.long 0x4 "CFDTHLSTS,TX History List Status Register" hexmask.long.tbyte 0x4 12.--31. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." hexmask.long.byte 0x4 8.--11. 1. "THLMC,TX History List Message Count" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "THLIF,TX History List Interrupt Flag" "0: TX History List Interrupt condition not satisfied,1: TX History List Interrupt condition satisfied" newline bitfld.long 0x4 2. "THLELT,TX History List Entry Lost" "0: No Entry Lost in TX History List,1: TX History List Entry Lost" rbitfld.long 0x4 1. "THLFLL,TX History List Full" "0: TX History List Not Full,1: TX History List Full" newline rbitfld.long 0x4 0. "THLEMP,TX History List Empty" "0: TX History List Not Empty,1: TX History List Empty" wgroup.long 0xA0++0x3 line.long 0x0 "CFDTHLPCTR,TX History List Pointer Control Registers" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "THLPC,TX History List Pointer Control" rgroup.long 0xA4++0x3 line.long 0x0 "CFDGTINTSTS,Global TX Interrupt Status Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." bitfld.long 0x0 4. "THIF,TX History List Interrupt Channel" "0: Channel n TX History List Interrupt flag not set,1: Channel n TX History List Interrupt flag set" newline bitfld.long 0x0 3. "CFTIF,COM FIFO TX/GW Mode Interrupt Flag Channel" "0: Channel n COM FIFO TX/GW mode Interrupt flag not..,1: Channel n COM FIFO TX/GW mode Interrupt flag set" bitfld.long 0x0 2. "TQIF,TX Queue Interrupt Flag Channel" "0: Channel n TX Queue Interrupt flag not set,1: Channel n TX Queue Interrupt flag set" newline bitfld.long 0x0 1. "TAIF,TX Abort Interrupt Flag Channel" "0: Channel n TX abort Interrupt flag not set,1: Channel n TX abort Interrupt flag set" bitfld.long 0x0 0. "TSIF,TX Successful Interrupt Flag Channel" "0: Channel n TX Successful completion Interrupt..,1: Channel n TX Successful completion Interrupt.." group.long 0xA8++0xB line.long 0x0 "CFDGTSTCFG,Global Test Configuration Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x0 16.--19. 1. "RTMPS,RAM Test Mode Page Select" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "CFDGTSTCTR,Global Test Control Register" hexmask.long 0x4 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x4 2. "RTME,RAM Test Mode Enable" "0: RAM Test Mode disabled,1: RAM Test Mode enabled" newline bitfld.long 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.long 0x8 "CFDGFDCFG,Global FD configuration register" hexmask.long.tbyte 0x8 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x8 8.--9. "TSCCFG,Timestamp capture configuration" "0: Timestamp capture at the sample point of SOF..,1: Timestamp capture at frame valid indication,?,?" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "RPED,RES bit Protocol exception disable" "0: Protocol exception event detection enabled,1: Protocol exception event detection disabled" wgroup.long 0xB8++0x3 line.long 0x0 "CFDGLOCKK,Global Lock Key Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "LOCK,Lock Key" group.long 0xBC++0x1F line.long 0x0 "CFDGLOTB,Global OTB FIFO Configuration / Status Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." rbitfld.long 0x0 11.--12. "OTBMC,OTB FIFO Message Count" "0,1,2,3" newline bitfld.long 0x0 10. "OTBMLT,OTB FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 9. "OTBFLL,OTB FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 8. "OTBEMP,OTB FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 0. "OTBFE,OTB FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDGAFLIGNENT,Global AFL Ignore Entry Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline hexmask.long.byte 0x4 0.--4. 1. "IRN,Ignore Rule Number" line.long 0x8 "CFDGAFLIGNCTR,Global AFL Ignore Control Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "IREN,Ignore Rule Enable" "0: AFL rule number does not ignore,1: AFL rule number ignores" line.long 0xC "CFDCDTCT,DMA Transfer Control Register" hexmask.long.tbyte 0xC 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0xC 8. "CFDMAE,DMA Transfer Enable for Common FIFO 0 of channel 0" "0: DMA Transfer Request disabled for channel n,1: DMA Transfer Request enabled for channel n" newline hexmask.long.byte 0xC 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0xC 1. "RFDMAE1,DMA Transfer Enable for RXFIFO 1" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" newline bitfld.long 0xC 0. "RFDMAE0,DMA Transfer Enable for RXFIFO 0" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" line.long 0x10 "CFDCDTSTS,DMA Transfer Status Register" hexmask.long.tbyte 0x10 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." rbitfld.long 0x10 8. "CFDMASTS,DMA Transfer Status only for Common FIFO 0 of channel 0" "0: DMA transfer stopped,1: DMA transfer ongoing" newline hexmask.long.byte 0x10 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." rbitfld.long 0x10 1. "RFDMASTS1,DMA Transfer Status for RX FIFO 1" "0: DMA transfer stopped,1: DMA transfer ongoing" newline rbitfld.long 0x10 0. "RFDMASTS0,DMA Transfer Status for RX FIFO 0" "0: DMA transfer stopped,1: DMA transfer ongoing" line.long 0x14 "CFDGPFLECTR,Global Pretended Network Filter List Entry control Register" hexmask.long.tbyte 0x14 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x14 8. "PFLDAE,Pretended Network Filter List Data Access Enable" "0: Pretended Network Filter List Data access disabled,1: Pretended Network Filter List Data access enabled" newline hexmask.long.byte 0x14 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.long 0x18 "CFDGPFLCFG,Global Pretended Network Filter List configuration Register" hexmask.long.byte 0x18 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x18 24.--25. "RNC,Rule Number" "0,1,2,3" newline hexmask.long.byte 0x18 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.word 0x18 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x1C "CFDGRSTC,Global Reset Control Register" hexmask.long.word 0x1C 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x1C 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "SRST,SW reset" "0: normal state,1: SW reset state" group.long 0x100++0x13 line.long 0x0 "CFDC0DCFG,Channel 0 Data Bitrate Configuration Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 24.--27. 1. "DSJW,Resynchronization Jump Width" newline hexmask.long.byte 0x0 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 16.--19. 1. "DTSEG2,Timing Segment 2" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 0.--7. 1. "DBRP,Channel Data Baud Rate Prescaler" line.long 0x4 "CFDC0FDCFG,Channel 0 CAN-FD Configuration Register" bitfld.long 0x4 31. "CFDTE,CAN-FD Tolerance enable" "0: CAN-FD Tolerance mode disabled.,1: CAN-FD Tolerance mode enabled" bitfld.long 0x4 30. "CLOE,Classical CAN only enable" "0: Classical only mode disabled,1: Classical only mode enabled" newline bitfld.long 0x4 29. "REFE,RX edge filter enable" "0: RX edge filter disabled,1: RX edge filter enabled" bitfld.long 0x4 28. "FDOE,FD only enable" "0: FD only mode disabled,1: FD only mode enabled" newline hexmask.long.byte 0x4 24.--27. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 16.--23. 1. "TDCO,Transceiver Delay Compensation Offset" newline bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 12.--13. "RPNMD,Return Pretended Network Filter Mode" "0: Return to Acceptance Filter Mode,1: Return to Pretended Network Filter ID only and..,?,?" newline bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 10. "ESIC,Error State Indication Configuration" "0: The ESI bit in the frame will be representing..,1: The ESI bit in the frame will be representing.." newline bitfld.long 0x4 9. "TDCE,Transceiver Delay Compensation Enable" "0: Transceiver Delay Compensation disabled,1: Transceiver Delay Compensation enabled" bitfld.long 0x4 8. "TDCOC,Transceiver Delay Compensation Offset Configuration" "0: Measured + offset,1: offset only" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 0.--2. "EOCCFG,Error Occurrence Counter Configuration" "0: All Transmitter or Receiver CAN Frames,1: All Transmitter CAN Frames,?,?,?,?,?,?" line.long 0x8 "CFDC0FDCTR,Channel 0 CAN-FD Control Register" hexmask.long.byte 0x8 24.--31. 1. "KEY,Key code" hexmask.long.byte 0x8 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 16.--17. "PNMDC,Pretended Network Filter Mode Control" "0,1,2,3" hexmask.long.word 0x8 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x8 1. "SOCCLR,Successful Occurrence Counter Clear" "0: No Successful Occurrence Counter clear,1: Clear Successful Occurrence Counter" bitfld.long 0x8 0. "EOCCLR,Error Occurrence Counter Clear" "0: No Error Occurrence Counter clear,1: Clear Error Occurrence Counter" line.long 0xC "CFDC0FDSTS,Channel 0 CAN-FD Status Register" hexmask.long.byte 0xC 24.--31. 1. "SOC,Successful occurrence counter register" hexmask.long.byte 0xC 16.--23. 1. "EOC,Error occurrence counter register" newline bitfld.long 0xC 15. "TDCVF,Transceiver Delay Compensation Violation Flag" "0: Transceiver Delay Compensation Violation has not..,1: Transceiver Delay Compensation Violation has.." bitfld.long 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.long 0xC 12.--13. "PNSTS,Pretended Network Filter State" "0: Acceptance Filter Mode,1: Pretended Network Filter Mode,?,?" bitfld.long 0xC 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0xC 9. "SOCO,Successful occurrence counter overflow" "0: Successful occurrence counter has not overflowed,1: Successful occurrence counter has overflowed" bitfld.long 0xC 8. "EOCO,Error occurrence counter overflow" "0: Error occurrence counter has not overflowed,1: Error occurrence counter has overflowed" newline hexmask.long.byte 0xC 0.--7. 1. "TDCR,Transceiver Delay Compensation Result" line.long 0x10 "CFDC0FDCRC,Channel 0 CAN-FD CRC Register" hexmask.long.byte 0x10 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x10 24.--27. 1. "SCNT,Stuff bit count" newline bitfld.long 0x10 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x10 0.--20. 1. "CRCREG,CRC Register value" repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x120)++0x3 line.long 0x0 "CFDGAFLID$1,Global Acceptance Filter List ID Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDE,Global Acceptance Filter List Entry IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GAFLRTR,Global Acceptance Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GAFLLB,Global Acceptance Filter List Entry Loopback Configuration" "0: Global Acceptance Filter List entry ID for..,1: Global Acceptance Filter List entry ID for.." hexmask.long 0x0 0.--28. 1. "GAFLID,Global Acceptance Filter List Entry ID Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x124)++0x3 line.long 0x0 "CFDGAFLM$1,Global Acceptance Filter List Mask Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDEM,Global Acceptance Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GAFLRTRM,Global Acceptance Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GAFLIFL1,Global Acceptance Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GAFLIDM,Global Acceptance Filter List ID Mask Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x128)++0x3 line.long 0x0 "CFDGAFLP0$1,Global Acceptance Filter List Pointer 0 Registers r = [1...10]h" hexmask.long.word 0x0 16.--31. 1. "GAFLPTR,Global Acceptance Filter List Pointer Field" bitfld.long 0x0 15. "GAFLRMV,Global Acceptance Filter List RX Message Buffer Valid" "0: Global Acceptance Filter List Single Message..,1: Global Acceptance Filter List Single Message.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GAFLRMDP,Global Acceptance Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GAFLIFL0,Global Acceptance Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GAFLDLC,Global Acceptance Filter List DLC Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x12C)++0x3 line.long 0x0 "CFDGAFLP1$1,Global Acceptance Filter List Pointer 1 Registers r = [1...10]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GAFLFDP8,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[8])" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GAFLFDP1,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[1])" "0,1" newline bitfld.long 0x0 0. "GAFLFDP0,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[0])" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x220)++0x3 line.long 0x0 "CFDGPFLID$1,Global Pretended Network Filter List ID Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDE,Global Pretended Network Filter List IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GPFLRTR,Global Pretended Network Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GPFLLB,Global Pretended Network Filter List Entry Loopback Configuration" "0: Global Pretended Network Filter List entry ID..,1: Global Pretended Network Filter List entry ID.." hexmask.long 0x0 0.--28. 1. "GPFLID,Global Pretended Network Filter List ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x224)++0x3 line.long 0x0 "CFDGPFLM$1,Global Pretended Network Filter List MASK Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDEM,Global Pretended Network Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GPFLRTRM,Global Pretended Network Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GPFLIFL1,Global Pretended Network Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GPFLIDM,Global Pretended Network Filter List ID Mask Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x228)++0x3 line.long 0x0 "CFDGPFLP0$1,Global Pretended Network Filter List Pointer 0 Registers s = [1...2]h" hexmask.long.word 0x0 16.--31. 1. "GPFLPTR,Global Pretended Network Filter List Pointer Field" bitfld.long 0x0 15. "GPFLRMV,Global Pretended Network Filter List RX Message Buffer Valid" "0: Global Pretended Network Filter List Single..,1: Global Pretended Network Filter List Single.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GPFLRMDP,Global Pretended Network Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GPFLIFL0,Global Pretended Network Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GPFLDLC,Global Pretended Network Filter List DLC Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x22C)++0x3 line.long 0x0 "CFDGPFLP1$1,Global Pretended Network Filter List Pointer 1 Registers s = [1...2]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GPFLFDP8,Global Pretended Network Filter List FIFO Direction Pointer [8]" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GPFLFDP1,Global Pretended Network Filter List FIFO Direction Pointer [1]" "0,1" newline bitfld.long 0x0 0. "GPFLFDP0,Global Pretended Network Filter List FIFO Direction Pointer [0]" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x230)++0x3 line.long 0x0 "CFDGPFLPT$1,Global Pretended Network Filter List Filter Type Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLANDOR,Global Pretended Network filter conditions of the filters 0 and 1" "0: Both of filters 0 and 1 are successful.,1: One of the filter 0 or 1 is successful." bitfld.long 0x0 30. "GPFLRANG0,Global Pretended Network filter comparison conditions of the filter0" "0: payload data match filter,1: upper / lower filter" newline bitfld.long 0x0 29. "GPFLOUT0,Global Pretended Network filter conditions of upper / lower filter of the filter0" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." hexmask.long.word 0x0 20.--28. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline hexmask.long.byte 0x0 16.--19. 1. "GPFLOFFSET0,Global Pretended Network filter offset value of the filter0" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "GPFLRANG1,Global Pretended Network filter comparison conditions of the filter1" "0: payload data match filter,1: upper / lower filter" bitfld.long 0x0 13. "GPFLOUT1,Global Pretended Network filter conditions of upper / lower filter of the filter1" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." newline hexmask.long.word 0x0 4.--12. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 0.--3. 1. "GPFLOFFSET1,Global Pretended Network filter offset value of the filter1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x234)++0x3 line.long 0x0 "CFDGPFLPD0$1,Global Pretended Network Filter List Payload Data 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x238)++0x3 line.long 0x0 "CFDGPFLPM0$1,Global Pretended Network Filter List Payload Mask 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x23C)++0x3 line.long 0x0 "CFDGPFLPD1$1,Global Pretended Network Filter List Payload Data 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x240)++0x3 line.long 0x0 "CFDGPFLPM1$1,Global Pretended Network Filter List Payload Mask 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "CFDRPGACC$1,RAM Test Page Access Registers" hexmask.long 0x0 0.--31. 1. "RDTA,RAM Data Test Access" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x520)++0x3 line.long 0x0 "CFDRFID$1,RX FIFO Access ID Registers" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x524)++0x3 line.long 0x0 "CFDRFPTR$1,RX FIFO Access Pointer Register" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x528)++0x3 line.long 0x0 "CFDRFFDSTS$1,RX FIFO Access CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x52C)++0x3 line.long 0x0 "CFDRFDF0$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x578)++0x3 line.long 0x0 "CFDRFDF1$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x5B8++0x4B line.long 0x0 "CFDCFID,Common FIFO Access ID Registers" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTR,Common FIFO Access Pointer Registers" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTS,Common FIFO Access CAN-FD Control/Status Register" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" line.long 0xC "CFDCFDF0,Common FIFO Access Data Field p Registers" hexmask.long.byte 0xC 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0xC 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0xC 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0xC 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x10 "CFDCFDF1,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x10 24.--31. 1. "CFDB7,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x10 16.--23. 1. "CFDB6,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x10 8.--15. 1. "CFDB5,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x10 0.--7. 1. "CFDB4,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x14 "CFDCFDF2,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x14 24.--31. 1. "CFDB11,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x14 16.--23. 1. "CFDB10,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x14 8.--15. 1. "CFDB9,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x14 0.--7. 1. "CFDB8,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x18 "CFDCFDF3,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x18 24.--31. 1. "CFDB15,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x18 16.--23. 1. "CFDB14,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x18 8.--15. 1. "CFDB13,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x18 0.--7. 1. "CFDB12,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x1C "CFDCFDF4,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x1C 24.--31. 1. "CFDB19,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x1C 16.--23. 1. "CFDB18,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x1C 8.--15. 1. "CFDB17,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x1C 0.--7. 1. "CFDB16,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x20 "CFDCFDF5,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x20 24.--31. 1. "CFDB23,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x20 16.--23. 1. "CFDB22,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x20 8.--15. 1. "CFDB21,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x20 0.--7. 1. "CFDB20,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x24 "CFDCFDF6,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x24 24.--31. 1. "CFDB27,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x24 16.--23. 1. "CFDB26,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x24 8.--15. 1. "CFDB25,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x24 0.--7. 1. "CFDB24,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x28 "CFDCFDF7,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x28 24.--31. 1. "CFDB31,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x28 16.--23. 1. "CFDB30,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x28 8.--15. 1. "CFDB29,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x28 0.--7. 1. "CFDB28,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x2C "CFDCFDF8,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x2C 24.--31. 1. "CFDB35,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x2C 16.--23. 1. "CFDB34,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x2C 8.--15. 1. "CFDB33,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x2C 0.--7. 1. "CFDB32,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x30 "CFDCFDF9,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x30 24.--31. 1. "CFDB39,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x30 16.--23. 1. "CFDB38,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x30 8.--15. 1. "CFDB37,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x30 0.--7. 1. "CFDB36,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x34 "CFDCFDF10,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x34 24.--31. 1. "CFDB43,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x34 16.--23. 1. "CFDB42,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x34 8.--15. 1. "CFDB41,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x34 0.--7. 1. "CFDB40,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x38 "CFDCFDF11,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x38 24.--31. 1. "CFDB47,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x38 16.--23. 1. "CFDB46,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x38 8.--15. 1. "CFDB45,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x38 0.--7. 1. "CFDB44,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x3C "CFDCFDF12,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x3C 24.--31. 1. "CFDB51,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x3C 16.--23. 1. "CFDB50,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x3C 8.--15. 1. "CFDB49,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x3C 0.--7. 1. "CFDB48,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x40 "CFDCFDF13,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x40 24.--31. 1. "CFDB55,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x40 16.--23. 1. "CFDB54,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x40 8.--15. 1. "CFDB53,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x40 0.--7. 1. "CFDB52,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x44 "CFDCFDF14,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x44 24.--31. 1. "CFDB59,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x44 16.--23. 1. "CFDB58,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x44 8.--15. 1. "CFDB57,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x44 0.--7. 1. "CFDB56,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x48 "CFDCFDF15,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x48 24.--31. 1. "CFDB63,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x48 16.--23. 1. "CFDB62,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x48 8.--15. 1. "CFDB61,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x48 0.--7. 1. "CFDB60,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x604)++0x3 line.long 0x0 "CFDTMID$1,TX Message Buffer ID Registers" bitfld.long 0x0 31. "TMIDE,TX Message Buffer IDE Bit" "0: STD-ID will be transmitted,1: EXT-ID will be transmitted" bitfld.long 0x0 30. "TMRTR,TX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,Tx History List Entry" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "TMID,TX Message Buffer ID Field" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x608)++0x3 line.long 0x0 "CFDTMPTR$1,TX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "TMDLC,TX Message Buffer DLC Field" hexmask.long 0x0 0.--27. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x60C)++0x3 line.long 0x0 "CFDTMFDCTR$1,TX Message Buffer CAN-FD Control Register" hexmask.long.word 0x0 16.--31. 1. "TMPTR,TX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "TMIFL,TX Message Buffer Information Label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "TMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "TMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "TMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x610)++0x3 line.long 0x0 "CFDTMDF0_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB3,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB2,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB1,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB0,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x65C)++0x3 line.long 0x0 "CFDTMDF1_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB7,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB6,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB5,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB4,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6A8)++0x3 line.long 0x0 "CFDTMDF2_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB11,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB10,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB9,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB8,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6F4)++0x3 line.long 0x0 "CFDTMDF3_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB15,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB14,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB13,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB12,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end rgroup.long 0x740++0x7 line.long 0x0 "CFDTHLACC0,Channel 0 TX History List Access Registers0" hexmask.long.word 0x0 16.--31. 1. "TMTS,Transmit Timestamp" hexmask.long.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 3.--4. "BN,Buffer No." "0,1,2,3" bitfld.long 0x0 0.--2. "BT,Buffer Type" "?,1: Flat TX Message Buffer,?,?,?,?,?,?" line.long 0x4 "CFDTHLACC1,Channel 0 TX History List Access Registers1" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000." bitfld.long 0x4 16.--17. "TIFL,Transmit Information Label" "0,1,2,3" newline hexmask.long.word 0x4 0.--15. 1. "TID,Transmit ID" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x920)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x924)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x928)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x92C)++0x3 line.long 0x0 "CFDRMDF0_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB3,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB2,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB1,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB0,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x978)++0x3 line.long 0x0 "CFDRMDF1_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB7,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB6,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB5,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB4,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x9C4)++0x3 line.long 0x0 "CFDRMDF2_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB11,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB10,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB9,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB8,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA10)++0x3 line.long 0x0 "CFDRMDF3_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB15,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB14,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB13,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB12,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA5C)++0x3 line.long 0x0 "CFDRMDF4_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB19,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB18,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB17,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB16,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAA8)++0x3 line.long 0x0 "CFDRMDF5_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB23,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB22,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB21,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB20,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAF4)++0x3 line.long 0x0 "CFDRMDF6_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB27,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB26,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB25,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB24,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xB40)++0x3 line.long 0x0 "CFDRMDF7_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB31,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB30,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB29,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB28,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD20)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD24)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD28)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD2C)++0x3 line.long 0x0 "CFDRMDF8_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB35,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB34,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB33,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB32,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD78)++0x3 line.long 0x0 "CFDRMDF9_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB39,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB38,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB37,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB36,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xDC4)++0x3 line.long 0x0 "CFDRMDF10_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB43,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB42,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB41,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB40,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE10)++0x3 line.long 0x0 "CFDRMDF11_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB47,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB46,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB45,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB44,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE5C)++0x3 line.long 0x0 "CFDRMDF12_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB51,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB50,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB49,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB48,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEA8)++0x3 line.long 0x0 "CFDRMDF13_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB55,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB54,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB53,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB52,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEF4)++0x3 line.long 0x0 "CFDRMDF14_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB59,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB58,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB57,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB56,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xF40)++0x3 line.long 0x0 "CFDRMDF15_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB63,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB62,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB61,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB60,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1120)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1124)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1128)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x112C)++0x3 line.long 0x0 "CFDRMDF16_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB67,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB66,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB65,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB64,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1178)++0x3 line.long 0x0 "CFDRMDF17_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB71,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB70,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB69,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB68,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x11C4)++0x3 line.long 0x0 "CFDRMDF18_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB75,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB74,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB73,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB72,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1210)++0x3 line.long 0x0 "CFDRMDF19_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB79,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB78,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB77,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB76,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x125C)++0x3 line.long 0x0 "CFDRMDF20_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB83,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB82,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB81,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB80,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12A8)++0x3 line.long 0x0 "CFDRMDF21_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB87,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB86,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB85,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB84,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12F4)++0x3 line.long 0x0 "CFDRMDF22_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB91,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB90,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB89,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB88,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1340)++0x3 line.long 0x0 "CFDRMDF23_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB95,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB94,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB93,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB92,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1520)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1524)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1528)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x152C)++0x3 line.long 0x0 "CFDRMDF24_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB99,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB98,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB97,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB96,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1578)++0x3 line.long 0x0 "CFDRMDF25_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB103,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB102,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB101,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB100,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x15C4)++0x3 line.long 0x0 "CFDRMDF26_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB107,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB106,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB105,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB104,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1610)++0x3 line.long 0x0 "CFDRMDF27_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB111,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB110,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB109,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB108,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x165C)++0x3 line.long 0x0 "CFDRMDF28_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB115,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB114,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB113,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB112,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16A8)++0x3 line.long 0x0 "CFDRMDF29_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB119,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB118,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB117,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB116,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16F4)++0x3 line.long 0x0 "CFDRMDF30_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB123,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB122,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB121,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB120,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1740)++0x3 line.long 0x0 "CFDRMDF31_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB127,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB126,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB125,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB124,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1920)++0x3 line.long 0x0 "CFDRFIDE$1,RX FIFO Access ID Registers for Emulation" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1924)++0x3 line.long 0x0 "CFDRFPTRE$1,RX FIFO Access Pointer Registers for Emulation" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1928)++0x3 line.long 0x0 "CFDRFFDSTSE$1,RX FIFO Access CAN-FD Status Registers for Emulation" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x192C)++0x3 line.long 0x0 "CFDRFDF0E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1930)++0x3 line.long 0x0 "CFDRFDF1E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1934)++0x3 line.long 0x0 "CFDRFDF2E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB11,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB10,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB9,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB8,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1938)++0x3 line.long 0x0 "CFDRFDF3E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB15,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB14,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB13,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB12,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x193C)++0x3 line.long 0x0 "CFDRFDF4E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB19,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB18,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB17,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB16,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1940)++0x3 line.long 0x0 "CFDRFDF5E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB23,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB22,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB21,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB20,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1944)++0x3 line.long 0x0 "CFDRFDF6E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB27,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB26,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB25,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB24,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1948)++0x3 line.long 0x0 "CFDRFDF7E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB31,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB30,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB29,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB28,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x194C)++0x3 line.long 0x0 "CFDRFDF8E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB35,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB34,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB33,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB32,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1950)++0x3 line.long 0x0 "CFDRFDF9E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB39,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB38,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB37,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB36,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1954)++0x3 line.long 0x0 "CFDRFDF10E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB43,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB42,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB41,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB40,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1958)++0x3 line.long 0x0 "CFDRFDF11E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB47,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB46,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB45,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB44,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x195C)++0x3 line.long 0x0 "CFDRFDF12E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB51,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB50,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB49,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB48,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1960)++0x3 line.long 0x0 "CFDRFDF13E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB55,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB54,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB53,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB52,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1964)++0x3 line.long 0x0 "CFDRFDF14E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB59,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB58,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB57,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB56,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1968)++0x3 line.long 0x0 "CFDRFDF15E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB63,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB62,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB61,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB60,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x19B8++0xB line.long 0x0 "CFDCFIDE,Common FIFO Access ID Register for Emulation" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTRE,Common FIFO Access Pointer Register for Emulation" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTSE,Common FIFO Access CAN-FD Control/Status Register for Emulation" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x19C4)++0x3 line.long 0x0 "CFDCFDF$1E,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end tree.end tree "CANFD0_NS" base ad:0x50380000 group.long 0x0++0xF line.long 0x0 "CFDC0NCFG,Channel 0 Nominal Bitrate Configuration Register" hexmask.long.byte 0x0 25.--31. 1. "NTSEG2,Timing Segment 2" hexmask.long.byte 0x0 17.--24. 1. "NTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 10.--16. 1. "NSJW,Resynchronization Jump Width" hexmask.long.word 0x0 0.--9. 1. "NBRP,Channel Nominal Baud Rate Prescaler" line.long 0x4 "CFDC0CTR,Channel 0 Control Registers" bitfld.long 0x4 31. "ROM,Restricted Operation Mode" "0: Restricted Operation Mode disabled,1: Restricted Operation Mode enabled" bitfld.long 0x4 30. "BFT,Bit Flip Test" "0: First data bit of reception stream not inverted,1: First data bit of reception stream inverted" newline bitfld.long 0x4 29. "TRR,TEC/REC Reset" "0: Error counter normal operation,1: Error counter reset" bitfld.long 0x4 28. "TRH,TEC/REC Hold" "0: Error counter normal operation,1: Error counter frozen" newline bitfld.long 0x4 27. "TRWE,TEC/REC Write Enable" "0: Error Counter write disabled,1: Error Counter write enabled" bitfld.long 0x4 25.--26. "CTMS,Channel Test Mode Select" "0: Basic test mode,1: Listen-Only mode,?,?" newline bitfld.long 0x4 24. "CTME,Channel Test Mode Enable" "0: Channel Test Mode disabled,1: Channel Test Mode enabled" bitfld.long 0x4 23. "ERRD,Channel Error Display" "0: Only the 1st set of error codes displayed,1: Accumulated error codes displayed" newline bitfld.long 0x4 21.--22. "BOM,Channel Bus-Off Mode" "0: Normal mode (comply with ISO 11898-1),1: Entry to Halt Mode automatically at Bus-Off start,?,?" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "TDCVFIE,Transceiver Delay Compensation Violation Interrupt enable" "0: Transceiver Delay Compensation Violation..,1: Transceiver Delay Compensation Violation.." bitfld.long 0x4 18. "SOCOIE,Successful Occurrence Counter Overflow Interrupt enable" "0: Successful occurrence counter overflow interrupt..,1: Successful occurrence counter overflow interrupt.." newline bitfld.long 0x4 17. "EOCOIE,Error occurrence counter overflow Interrupt enable" "0: Error occurrence counter overflow Interrupt..,1: Error occurrence counter overflow Interrupt.." bitfld.long 0x4 16. "TAIE,Transmission abort Interrupt Enable" "0: TX abort Interrupt disabled,1: TX abort Interrupt enabled" newline bitfld.long 0x4 15. "ALIE,Arbitration Lost Interrupt Enable" "0: Arbitration Lost Interrupt disabled,1: Arbitration Lost Interrupt enabled" bitfld.long 0x4 14. "BLIE,Bus Lock Interrupt Enable" "0: Bus Lock Interrupt disabled,1: Bus Lock Interrupt enabled" newline bitfld.long 0x4 13. "OLIE,Overload Interrupt Enable" "0: Overload Interrupt disabled,1: Overload Interrupt enabled" bitfld.long 0x4 12. "BORIE,Bus-Off Recovery Interrupt Enable" "0: Bus-Off Recovery Interrupt disabled,1: Bus-Off Recovery Interrupt enabled" newline bitfld.long 0x4 11. "BOEIE,Bus-Off Entry Interrupt Enable" "0: Bus-Off Entry Interrupt disabled,1: Bus-Off Entry Interrupt enabled" bitfld.long 0x4 10. "EPIE,Error Passive Interrupt Enable" "0: Error Passive Interrupt disabled,1: Error Passive Interrupt enabled" newline bitfld.long 0x4 9. "EWIE,Error Warning Interrupt Enable" "0: Error Warning Interrupt disabled,1: Error Warning Interrupt enabled" bitfld.long 0x4 8. "BEIE,Bus Error Interrupt Enable" "0: Bus Error Interrupt disabled,1: Bus Error Interrupt enabled" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "RTBO,Return from Bus-Off" "0: Channel is not forced to return from Bus-Off,1: Channel is forced to return from Bus-Off" newline bitfld.long 0x4 2. "CSLPR,Channel Sleep Request" "0: Channel Sleep Request disabled,1: Channel Sleep Request enabled" bitfld.long 0x4 0.--1. "CHMDC,Channel Mode Control" "0: Channel Operation Mode request,1: Channel Reset request,?,?" line.long 0x8 "CFDC0STS,Channel 0 Status Registers" hexmask.long.byte 0x8 24.--31. 1. "TEC,Transmission Error Count" hexmask.long.byte 0x8 16.--23. 1. "REC,Reception Error Count" newline hexmask.long.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 8. "ESIF,Error State Indication Flag" "0: No CAN-FD message has been received with the ESI..,1: At least 1 CAN-FD message was received where the.." newline rbitfld.long 0x8 7. "COMSTS,Channel Communication Status" "0: Channel is not ready for communication,1: Channel is ready for communication" rbitfld.long 0x8 6. "RECSTS,Channel Receive Status" "0: Channel is not receiving,1: Channel is receiving" newline rbitfld.long 0x8 5. "TRMSTS,Channel Transmit Status" "0: Channel is not transmitting,1: Channel is transmitting" rbitfld.long 0x8 4. "BOSTS,Channel Bus-Off Status" "0: Channel not in Bus-Off state,1: Channel in Bus-Off state" newline rbitfld.long 0x8 3. "EPSTS,Channel Error Passive Status" "0: Channel not in Error Passive state.,1: Channel in Error Passive state." rbitfld.long 0x8 2. "CSLPSTS,Channel SLEEP Status" "0: Channel not in Sleep Mode,1: Channel in Sleep Mode" newline rbitfld.long 0x8 1. "CHLTSTS,Channel HALT Status" "0: Channel not in Halt Mode,1: Channel in Halt Mode" rbitfld.long 0x8 0. "CRSTSTS,Channel RESET Status" "0: Channel not in Reset Mode,1: Channel in Reset Mode" line.long 0xC "CFDC0ERFL,Channel 0 Error Flag Registers" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0xC 16.--30. 1. "CRCREG,CRC Register value" newline bitfld.long 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 14. "ADERR,Acknowledge Delimiter Error" "0: Channel Ack Del Error not detected,1: Channel Ack Del Error detected" newline bitfld.long 0xC 13. "B0ERR,Bit 0 Error" "0: Channel Bit 0 Error not detected,1: Channel Bit 0 Error detected" bitfld.long 0xC 12. "B1ERR,Bit 1 Error" "0: Channel Bit 1 Error not detected,1: Channel Bit 1 Error detected" newline bitfld.long 0xC 11. "CERR,CRC Error" "0: Channel CRC Error not detected,1: Channel CRC Error detected" bitfld.long 0xC 10. "AERR,Acknowledge Error" "0: Channel Ack Error not detected,1: Channel Ack Error detected" newline bitfld.long 0xC 9. "FERR,Form Error" "0: Channel Form Error not detected,1: Channel Form Error detected" bitfld.long 0xC 8. "SERR,Stuff Error" "0: Channel stuff Error not detected,?" newline bitfld.long 0xC 7. "ALF,Arbitration Lost Flag" "0: Channel Arbitration Lost not detected,1: Channel Arbitration Lost detected" bitfld.long 0xC 6. "BLF,Bus Lock Flag" "0: Channel Bus Lock not detected,1: Channel Bus Lock detected" newline bitfld.long 0xC 5. "OVLF,Overload Flag" "0: Channel Overload not detected,1: Channel Overload detected" bitfld.long 0xC 4. "BORF,Bus-Off Recovery Flag" "0: Channel Bus-Off Recovery not detected,1: Channel Bus-Off Recovery detected" newline bitfld.long 0xC 3. "BOEF,Bus-Off Entry Flag" "0: Channel Bus-Off Entry not detected,1: Channel Bus-Off Entry detected" bitfld.long 0xC 2. "EPF,Error Passive Flag" "0: Channel Error Passive not detected,1: Channel Error Passive detected" newline bitfld.long 0xC 1. "EWF,Error Warning Flag" "0: Channel Error Warning not detected,1: Channel Error Warning detected" bitfld.long 0xC 0. "BEF,Bus Error Flag" "0: Channel Bus Error not detected,1: Channel Bus Error detected" rgroup.long 0x10++0x3 line.long 0x0 "CFDGIPV,Global IP Version Register" hexmask.long.word 0x0 16.--31. 1. "PSI,Parameter Status Information" bitfld.long 0x0 15. "CPUBUS,CPU bus information" "0,1" newline hexmask.long.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 8.--9. "IPT,IP Type Release Number" "0,1,2,3" newline hexmask.long.byte 0x0 0.--7. 1. "IPV,IP Version Release Number" group.long 0x14++0x7 line.long 0x0 "CFDGCFG,Global Configuration Register" hexmask.long.word 0x0 16.--31. 1. "ITRCP,Interval Timer Reference Clock Prescaler" bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSSS,Timestamp Source Select" "0: Source clock for Timestamp counter is peripheral..,1: Source clock for Timestamp counter is bit time.." hexmask.long.byte 0x0 8.--11. 1. "TSP,Timestamp Prescaler" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "CMPOC,CAN-FD message Payload overflow configuration" "0: Message is rejected,1: Message payload is cut to fit to configured.." newline bitfld.long 0x0 4. "DCS,Data Link Controller Clock Select" "0: Internal clean clock,1: External Clock source connected to clk_xincan pin" bitfld.long 0x0 3. "MME,Mirror Mode Enable" "0: Mirror Mode disabled,1: Mirror Mode enabled" newline bitfld.long 0x0 2. "DRE,DLC Replacement Enable" "0: DLC replacement disabled,1: DLC replacement enabled" bitfld.long 0x0 1. "DCE,DLC Check Enable" "0: DLC check disabled,1: DLC check enabled" newline bitfld.long 0x0 0. "TPRI,Transmission Priority" "0: ID Priority,1: Message Buffer Number Priority" line.long 0x4 "CFDGCTR,Global Control Register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "TSWR,Timestamp Write" "0: Timestamp write disabled,1: Timestamp write enabled" newline bitfld.long 0x4 16. "TSRST,Timestamp Reset" "0: Timestamp not reset,1: Timestamp reset" hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 11. "CMPOFIE,CAN-FD message payload overflow Flag Interrupt enable" "0: CAN-FD message payload overflow Flag Interrupt..,1: CAN-FD message payload overflow Flag Interrupt.." bitfld.long 0x4 10. "THLEIE,TX History List Entry Lost Interrupt Enable" "0: TX History List Entry Lost Interrupt Disabled,1: TX History List Entry Lost Interrupt Enabled" newline bitfld.long 0x4 9. "MEIE,Message lost Error Interrupt Enable" "0: Message Lost Error Interrupt Disabled,1: Message Lost Error Interrupt Enabled" bitfld.long 0x4 8. "DEIE,DLC check Interrupt Enable" "0: DLC check Interrupt Disabled,1: DLC check Interrupt Enabled" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 2. "GSLPR,Global Sleep Request" "0: Global Sleep Request Disabled,1: Global Sleep Request Enabled" newline bitfld.long 0x4 0.--1. "GMDC,Global Mode Control" "0: ID Priority,1: Message Buffer Number Priority,?,?" rgroup.long 0x1C++0x3 line.long 0x0 "CFDGSTS,Global Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." bitfld.long 0x0 3. "GRAMINIT,Global RAM Initialisation" "0: RAM initialisation is finished,1: RAM initialisation ongoing" newline bitfld.long 0x0 2. "GSLPSTS,Global Sleep Status" "0: Not in Sleep Mode,1: In Sleep Mode" bitfld.long 0x0 1. "GHLTSTS,Global Halt Status" "0: Not in Halt Mode,1: In Halt Mode" newline bitfld.long 0x0 0. "GRSTSTS,Global Reset Status" "0: Not in Reset Mode,1: In Reset Mode" group.long 0x20++0x3 line.long 0x0 "CFDGERFL,Global Error Flag Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "EEF,ECC Error Flag" "0: ECC Error not detected during TX-SCAN,1: ECC Error detected during TX-SCAN" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "RXSFAIL,RX Scan Fail" "0: RX Scan fail not detected,1: RX Scan fail detected" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.long 0x0 5. "OTBMLTSTS,OTB FIFO Message Lost Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 3. "CMPOF,CAN-FD message payload overflow Flag" "0: CAN-FD message payload overflow not detected,1: CAN-FD message payload overflow detected" newline rbitfld.long 0x0 2. "THLES,TX History List Entry Lost Error Status" "0: TX History List Entry Lost Error not detected,1: TX History List Entry Lost Error detected" rbitfld.long 0x0 1. "MES,Message Lost Error Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 0. "DEF,DLC Error Flag" "?,1: DLC Error detected" rgroup.long 0x24++0x3 line.long 0x0 "CFDGTSC,Global Timestamp Counter Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "TS,Timestamp Value" group.long 0x28++0x13 line.long 0x0 "CFDGAFLECTR,Global Acceptance Filter List Entry Control Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "AFLDAE,Acceptance Filter List Data Access Enable" "0: Acceptance Filter List Data access disabled,1: Acceptance Filter List Data access enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.long 0x4 "CFDGAFLCFG,Global Acceptance Filter List Configuration Register" hexmask.long.word 0x4 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." hexmask.long.byte 0x4 16.--21. 1. "RNC,Rule Number" newline hexmask.long.word 0x4 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x8 "CFDRMNB,RX Message Buffer Number Register" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x8 8.--10. "RMPLS,Reception Message Buffer Payload Data Size" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" newline bitfld.long 0x8 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "NRXMB,Number of RX Message Buffers" line.long 0xC "CFDRMND,RX Message Buffer New Data Register t(t=0)" hexmask.long 0xC 0.--31. 1. "RMNSu,RX Message Buffer New Data Status" line.long 0x10 "CFDRMIEC,RX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x10 0.--31. 1. "RMIE,RX Message Buffer Interrupt Enable" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3C)++0x3 line.long 0x0 "CFDRFCC$1,RX FIFO Configuration / Control Registers %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "RFIGCV,RX FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" newline bitfld.long 0x0 12. "RFIM,RX FIFO Interrupt Mode" "0: Interrupt generated when RX FIFO counter reaches..,1: Interrupt generated at the end of every received.." bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 8.--10. "RFDC,RX FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4.--6. "RFPLS,Rx FIFO Payload Data Size configuration" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "RFIE,RX FIFO Interrupt Enable" "0: FIFO Interrupt generation disabled,1: FIFO Interrupt generation enabled" bitfld.long 0x0 0. "RFE,RX FIFO Enable" "0: FIFO disabled,1: FIFO enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CFDRFSTS$1,RX FIFO Status Registers %s" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x0 8.--13. 1. "RFMC,RX FIFO Message Count" newline hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 3. "RFIF,RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied,1: FIFO Full interrupt condition satisfied" newline bitfld.long 0x0 2. "RFMLT,RX FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 1. "RFFLL,RX FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 0. "RFEMP,RX FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4C)++0x3 line.long 0x0 "CFDRFPCTR$1,RX FIFO Pointer Control Registers %s" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RFPC,RX FIFO Pointer Control" repeat.end group.long 0x54++0xB line.long 0x0 "CFDCFCC,Common FIFO Configuration / Control Registers" hexmask.long.byte 0x0 24.--31. 1. "CFITT,Common FIFO Interval Transmission Time" bitfld.long 0x0 21.--23. "CFDC,Common FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" newline bitfld.long 0x0 18.--20. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--17. "CFTML,Common FIFO TX Message Buffer Link" "0,1,2,3" newline bitfld.long 0x0 13.--15. "CFIGCV,Common FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" bitfld.long 0x0 12. "CFIM,Common FIFO Interrupt Mode" "0,1" newline bitfld.long 0x0 11. "CFITR,Common FIFO Interval Timer Resolution" "0: Reference Clock Period x1,1: Reference Clock Period x10" bitfld.long 0x0 10. "CFITSS,Common FIFO Interval Timer Source Select" "0: Reference Clock (x1 / x10 period),1: Bit Time Clock of related channel (FIFO is.." newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8. "CFM,Common FIFO Mode" "0: RX FIFO Mode,1: TX FIFO Mode" newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4.--6. "CFPLS,Common FIFO Payload Data size configuration" "0: 8 Bytes,?,?,?,?,?,?,?" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "CFTXIE,Common FIFO TX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame TX,1: FIFO Interrupt generation enabled for Frame TX" newline bitfld.long 0x0 1. "CFRXIE,Common FIFO RX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame RX,1: FIFO Interrupt generation enabled for Frame RX" bitfld.long 0x0 0. "CFE,Common FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDCFSTS,Common FIFO Status Registers" hexmask.long.tbyte 0x4 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x4 8.--13. 1. "CFMC,Common FIFO Message Count" newline bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 4. "CFTXIF,Common TX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." newline bitfld.long 0x4 3. "CFRXIF,Common RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." bitfld.long 0x4 2. "CFMLT,Common FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" newline rbitfld.long 0x4 1. "CFFLL,Common FIFO Full" "0: FIFO Not Full,1: FIFO Full" rbitfld.long 0x4 0. "CFEMP,Common FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDCFPCTR,Common FIFO Pointer Control Registers" hexmask.long.tbyte 0x8 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x8 0.--7. 1. "CFPC,Common FIFO Pointer Control" rgroup.long 0x60++0xF line.long 0x0 "CFDFESTS,FIFO Empty Status Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x0 8. "CFEMP,Common FIF0 Empty Status" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 1. "RF1EMP,RX FIF0 1 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x0 0. "RF0EMP,RX FIF0 0 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x4 "CFDFFSTS,FIFO Full Status Register" hexmask.long.tbyte 0x4 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x4 8. "CFFLL,Common FIF0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x4 1. "RF1FLL,RX FIF0 1 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x4 0. "RF0FLL,RX FIF0 0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDFMSTS,FIFO Message Lost Status Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x8 8. "CFMLT,Common FIFO Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "RF1MLT,RX FIFO 1 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline bitfld.long 0x8 0. "RF0MLT,RX FIFO 0 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" line.long 0xC "CFDRFISTS,RX FIFO Interrupt Flag Status Register" hexmask.long 0xC 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000." bitfld.long 0xC 1. "RF1IF,RX FIFO[1] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" newline bitfld.long 0xC 0. "RF0IF,RX FIFO[0] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x70)++0x0 line.byte 0x0 "CFDTMC$1,TX Message Buffer Control Registers %s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TMOM,TX Message Buffer One-shot Mode" "0: TX Message Buffer not configured in one-shot mode,1: TX Message Buffer configured in one-shot mode" newline bitfld.byte 0x0 1. "TMTAR,TX Message Buffer Transmission abort Request" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." bitfld.byte 0x0 0. "TMTR,TX Message Buffer Transmission Request" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x74)++0x0 line.byte 0x0 "CFDTMSTS$1,TX Message Buffer Status Registers %s" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "TMTARM,TX Message Buffer Transmission abort Request Mirrored" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." newline rbitfld.byte 0x0 3. "TMTRM,TX Message Buffer Transmission Request Mirrored" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" bitfld.byte 0x0 1.--2. "TMTRF,TX Message Buffer Transmission Result Flag" "0: No Result,1: Transmission aborted from the TX MB,?,?" newline rbitfld.byte 0x0 0. "TMTSTS,TX Message Buffer Transmission Status" "0: No transmission ongoing,1: Transmission ongoing" repeat.end rgroup.long 0x78++0xF line.long 0x0 "CFDTMTRSTS,TX Message Buffer Transmission Request Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "CFDTMTRSTS,TX Message Buffer Transmission Request Status" line.long 0x4 "CFDTMTARSTS,TX Message Buffer Transmission Abort Request Status Register" hexmask.long 0x4 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x4 0.--3. 1. "CFDTMTARSTS,TX Message Buffer Transmission abort Request Status" line.long 0x8 "CFDTMTCSTS,TX Message Buffer Transmission Completion Status Register" hexmask.long 0x8 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x8 0.--3. 1. "CFDTMTCSTS,TX Message Buffer Transmission Completion Status" line.long 0xC "CFDTMTASTS,TX Message Buffer Transmission Abort Status Register" hexmask.long 0xC 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0xC 0.--3. 1. "CFDTMTASTS,TX Message Buffer Transmission abort Status" group.long 0x88++0xB line.long 0x0 "CFDTMIEC,TX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "TMIE,TX Message Buffer Interrupt Enable" line.long 0x4 "CFDTXQCC,TX Queue Configuration / Control Registers" hexmask.long.tbyte 0x4 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x4 8.--9. "TXQDC,TX Queue Depth Configuration" "0: 0 messages,1: Reserved,?,?" newline bitfld.long 0x4 7. "TXQIM,TX Queue Interrupt Mode" "0: when the last message is successfully transmitted,1: At every successful transmission" bitfld.long 0x4 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 5. "TXQTXIE,TX Queue TX Interrupt Enable" "0: TX Queue TX Interrupt disabled,1: TX Queue TX Interrupt enabled" hexmask.long.byte 0x4 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 0. "TXQE,TX Queue Enable" "0: TX Queue disabled,1: TX Queue enabled" line.long 0x8 "CFDTXQSTS,TX Queue Status Registers0" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." rbitfld.long 0x8 8.--10. "TXQMC,TX Queue Message Count" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x8 2. "TXQTXIF,TX Queue TX Interrupt Flag" "0: TX Queue interrupt condition not satisfied after..,1: TX Queue interrupt condition satisfied after.." newline rbitfld.long 0x8 1. "TXQFLL,TX Queue Full" "0: TX Queue Not Full,1: TX Queue Full" rbitfld.long 0x8 0. "TXQEMP,TX Queue Empty" "0: TX Queue Not Empty,1: TX Queue Empty" wgroup.long 0x94++0x3 line.long 0x0 "CFDTXQPCTR,TX Queue Pointer Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TXQPC,TX Queue Pointer Control" group.long 0x98++0x7 line.long 0x0 "CFDTHLCC,TX History List Configuration / Control Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "THLDTE,TX History List Dedicated TX Enable" "0: TX FIFO + TX Queue (TX FIFO Only RL version),1: Flat TX MB + TX FIFO + TX Queue (Flat TX MB + TX.." newline bitfld.long 0x0 9. "THLIM,TX History List Interrupt Mode" "0: Interrupt generated if TX History List level..,1: Interrupt generated for every successfully.." bitfld.long 0x0 8. "THLIE,TX History List Interrupt Enable" "0: TX History List Interrupt disabled,1: TX History List Interrupt enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "THLE,TX History List Enable" "0: TX History List disabled,1: TX History List enabled" line.long 0x4 "CFDTHLSTS,TX History List Status Register" hexmask.long.tbyte 0x4 12.--31. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." hexmask.long.byte 0x4 8.--11. 1. "THLMC,TX History List Message Count" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "THLIF,TX History List Interrupt Flag" "0: TX History List Interrupt condition not satisfied,1: TX History List Interrupt condition satisfied" newline bitfld.long 0x4 2. "THLELT,TX History List Entry Lost" "0: No Entry Lost in TX History List,1: TX History List Entry Lost" rbitfld.long 0x4 1. "THLFLL,TX History List Full" "0: TX History List Not Full,1: TX History List Full" newline rbitfld.long 0x4 0. "THLEMP,TX History List Empty" "0: TX History List Not Empty,1: TX History List Empty" wgroup.long 0xA0++0x3 line.long 0x0 "CFDTHLPCTR,TX History List Pointer Control Registers" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "THLPC,TX History List Pointer Control" rgroup.long 0xA4++0x3 line.long 0x0 "CFDGTINTSTS,Global TX Interrupt Status Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." bitfld.long 0x0 4. "THIF,TX History List Interrupt Channel" "0: Channel n TX History List Interrupt flag not set,1: Channel n TX History List Interrupt flag set" newline bitfld.long 0x0 3. "CFTIF,COM FIFO TX/GW Mode Interrupt Flag Channel" "0: Channel n COM FIFO TX/GW mode Interrupt flag not..,1: Channel n COM FIFO TX/GW mode Interrupt flag set" bitfld.long 0x0 2. "TQIF,TX Queue Interrupt Flag Channel" "0: Channel n TX Queue Interrupt flag not set,1: Channel n TX Queue Interrupt flag set" newline bitfld.long 0x0 1. "TAIF,TX Abort Interrupt Flag Channel" "0: Channel n TX abort Interrupt flag not set,1: Channel n TX abort Interrupt flag set" bitfld.long 0x0 0. "TSIF,TX Successful Interrupt Flag Channel" "0: Channel n TX Successful completion Interrupt..,1: Channel n TX Successful completion Interrupt.." group.long 0xA8++0xB line.long 0x0 "CFDGTSTCFG,Global Test Configuration Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x0 16.--19. 1. "RTMPS,RAM Test Mode Page Select" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "CFDGTSTCTR,Global Test Control Register" hexmask.long 0x4 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x4 2. "RTME,RAM Test Mode Enable" "0: RAM Test Mode disabled,1: RAM Test Mode enabled" newline bitfld.long 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.long 0x8 "CFDGFDCFG,Global FD configuration register" hexmask.long.tbyte 0x8 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x8 8.--9. "TSCCFG,Timestamp capture configuration" "0: Timestamp capture at the sample point of SOF..,1: Timestamp capture at frame valid indication,?,?" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "RPED,RES bit Protocol exception disable" "0: Protocol exception event detection enabled,1: Protocol exception event detection disabled" wgroup.long 0xB8++0x3 line.long 0x0 "CFDGLOCKK,Global Lock Key Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "LOCK,Lock Key" group.long 0xBC++0x1F line.long 0x0 "CFDGLOTB,Global OTB FIFO Configuration / Status Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." rbitfld.long 0x0 11.--12. "OTBMC,OTB FIFO Message Count" "0,1,2,3" newline bitfld.long 0x0 10. "OTBMLT,OTB FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 9. "OTBFLL,OTB FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 8. "OTBEMP,OTB FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 0. "OTBFE,OTB FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDGAFLIGNENT,Global AFL Ignore Entry Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline hexmask.long.byte 0x4 0.--4. 1. "IRN,Ignore Rule Number" line.long 0x8 "CFDGAFLIGNCTR,Global AFL Ignore Control Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "IREN,Ignore Rule Enable" "0: AFL rule number does not ignore,1: AFL rule number ignores" line.long 0xC "CFDCDTCT,DMA Transfer Control Register" hexmask.long.tbyte 0xC 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0xC 8. "CFDMAE,DMA Transfer Enable for Common FIFO 0 of channel 0" "0: DMA Transfer Request disabled for channel n,1: DMA Transfer Request enabled for channel n" newline hexmask.long.byte 0xC 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0xC 1. "RFDMAE1,DMA Transfer Enable for RXFIFO 1" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" newline bitfld.long 0xC 0. "RFDMAE0,DMA Transfer Enable for RXFIFO 0" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" line.long 0x10 "CFDCDTSTS,DMA Transfer Status Register" hexmask.long.tbyte 0x10 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." rbitfld.long 0x10 8. "CFDMASTS,DMA Transfer Status only for Common FIFO 0 of channel 0" "0: DMA transfer stopped,1: DMA transfer ongoing" newline hexmask.long.byte 0x10 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." rbitfld.long 0x10 1. "RFDMASTS1,DMA Transfer Status for RX FIFO 1" "0: DMA transfer stopped,1: DMA transfer ongoing" newline rbitfld.long 0x10 0. "RFDMASTS0,DMA Transfer Status for RX FIFO 0" "0: DMA transfer stopped,1: DMA transfer ongoing" line.long 0x14 "CFDGPFLECTR,Global Pretended Network Filter List Entry control Register" hexmask.long.tbyte 0x14 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x14 8. "PFLDAE,Pretended Network Filter List Data Access Enable" "0: Pretended Network Filter List Data access disabled,1: Pretended Network Filter List Data access enabled" newline hexmask.long.byte 0x14 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.long 0x18 "CFDGPFLCFG,Global Pretended Network Filter List configuration Register" hexmask.long.byte 0x18 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x18 24.--25. "RNC,Rule Number" "0,1,2,3" newline hexmask.long.byte 0x18 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.word 0x18 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x1C "CFDGRSTC,Global Reset Control Register" hexmask.long.word 0x1C 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x1C 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "SRST,SW reset" "0: normal state,1: SW reset state" group.long 0x100++0x13 line.long 0x0 "CFDC0DCFG,Channel 0 Data Bitrate Configuration Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 24.--27. 1. "DSJW,Resynchronization Jump Width" newline hexmask.long.byte 0x0 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 16.--19. 1. "DTSEG2,Timing Segment 2" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 0.--7. 1. "DBRP,Channel Data Baud Rate Prescaler" line.long 0x4 "CFDC0FDCFG,Channel 0 CAN-FD Configuration Register" bitfld.long 0x4 31. "CFDTE,CAN-FD Tolerance enable" "0: CAN-FD Tolerance mode disabled.,1: CAN-FD Tolerance mode enabled" bitfld.long 0x4 30. "CLOE,Classical CAN only enable" "0: Classical only mode disabled,1: Classical only mode enabled" newline bitfld.long 0x4 29. "REFE,RX edge filter enable" "0: RX edge filter disabled,1: RX edge filter enabled" bitfld.long 0x4 28. "FDOE,FD only enable" "0: FD only mode disabled,1: FD only mode enabled" newline hexmask.long.byte 0x4 24.--27. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 16.--23. 1. "TDCO,Transceiver Delay Compensation Offset" newline bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 12.--13. "RPNMD,Return Pretended Network Filter Mode" "0: Return to Acceptance Filter Mode,1: Return to Pretended Network Filter ID only and..,?,?" newline bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 10. "ESIC,Error State Indication Configuration" "0: The ESI bit in the frame will be representing..,1: The ESI bit in the frame will be representing.." newline bitfld.long 0x4 9. "TDCE,Transceiver Delay Compensation Enable" "0: Transceiver Delay Compensation disabled,1: Transceiver Delay Compensation enabled" bitfld.long 0x4 8. "TDCOC,Transceiver Delay Compensation Offset Configuration" "0: Measured + offset,1: offset only" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 0.--2. "EOCCFG,Error Occurrence Counter Configuration" "0: All Transmitter or Receiver CAN Frames,1: All Transmitter CAN Frames,?,?,?,?,?,?" line.long 0x8 "CFDC0FDCTR,Channel 0 CAN-FD Control Register" hexmask.long.byte 0x8 24.--31. 1. "KEY,Key code" hexmask.long.byte 0x8 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 16.--17. "PNMDC,Pretended Network Filter Mode Control" "0,1,2,3" hexmask.long.word 0x8 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x8 1. "SOCCLR,Successful Occurrence Counter Clear" "0: No Successful Occurrence Counter clear,1: Clear Successful Occurrence Counter" bitfld.long 0x8 0. "EOCCLR,Error Occurrence Counter Clear" "0: No Error Occurrence Counter clear,1: Clear Error Occurrence Counter" line.long 0xC "CFDC0FDSTS,Channel 0 CAN-FD Status Register" hexmask.long.byte 0xC 24.--31. 1. "SOC,Successful occurrence counter register" hexmask.long.byte 0xC 16.--23. 1. "EOC,Error occurrence counter register" newline bitfld.long 0xC 15. "TDCVF,Transceiver Delay Compensation Violation Flag" "0: Transceiver Delay Compensation Violation has not..,1: Transceiver Delay Compensation Violation has.." bitfld.long 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.long 0xC 12.--13. "PNSTS,Pretended Network Filter State" "0: Acceptance Filter Mode,1: Pretended Network Filter Mode,?,?" bitfld.long 0xC 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0xC 9. "SOCO,Successful occurrence counter overflow" "0: Successful occurrence counter has not overflowed,1: Successful occurrence counter has overflowed" bitfld.long 0xC 8. "EOCO,Error occurrence counter overflow" "0: Error occurrence counter has not overflowed,1: Error occurrence counter has overflowed" newline hexmask.long.byte 0xC 0.--7. 1. "TDCR,Transceiver Delay Compensation Result" line.long 0x10 "CFDC0FDCRC,Channel 0 CAN-FD CRC Register" hexmask.long.byte 0x10 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x10 24.--27. 1. "SCNT,Stuff bit count" newline bitfld.long 0x10 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x10 0.--20. 1. "CRCREG,CRC Register value" repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x120)++0x3 line.long 0x0 "CFDGAFLID$1,Global Acceptance Filter List ID Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDE,Global Acceptance Filter List Entry IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GAFLRTR,Global Acceptance Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GAFLLB,Global Acceptance Filter List Entry Loopback Configuration" "0: Global Acceptance Filter List entry ID for..,1: Global Acceptance Filter List entry ID for.." hexmask.long 0x0 0.--28. 1. "GAFLID,Global Acceptance Filter List Entry ID Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x124)++0x3 line.long 0x0 "CFDGAFLM$1,Global Acceptance Filter List Mask Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDEM,Global Acceptance Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GAFLRTRM,Global Acceptance Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GAFLIFL1,Global Acceptance Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GAFLIDM,Global Acceptance Filter List ID Mask Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x128)++0x3 line.long 0x0 "CFDGAFLP0$1,Global Acceptance Filter List Pointer 0 Registers r = [1...10]h" hexmask.long.word 0x0 16.--31. 1. "GAFLPTR,Global Acceptance Filter List Pointer Field" bitfld.long 0x0 15. "GAFLRMV,Global Acceptance Filter List RX Message Buffer Valid" "0: Global Acceptance Filter List Single Message..,1: Global Acceptance Filter List Single Message.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GAFLRMDP,Global Acceptance Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GAFLIFL0,Global Acceptance Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GAFLDLC,Global Acceptance Filter List DLC Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x12C)++0x3 line.long 0x0 "CFDGAFLP1$1,Global Acceptance Filter List Pointer 1 Registers r = [1...10]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GAFLFDP8,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[8])" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GAFLFDP1,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[1])" "0,1" newline bitfld.long 0x0 0. "GAFLFDP0,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[0])" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x220)++0x3 line.long 0x0 "CFDGPFLID$1,Global Pretended Network Filter List ID Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDE,Global Pretended Network Filter List IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GPFLRTR,Global Pretended Network Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GPFLLB,Global Pretended Network Filter List Entry Loopback Configuration" "0: Global Pretended Network Filter List entry ID..,1: Global Pretended Network Filter List entry ID.." hexmask.long 0x0 0.--28. 1. "GPFLID,Global Pretended Network Filter List ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x224)++0x3 line.long 0x0 "CFDGPFLM$1,Global Pretended Network Filter List MASK Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDEM,Global Pretended Network Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GPFLRTRM,Global Pretended Network Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GPFLIFL1,Global Pretended Network Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GPFLIDM,Global Pretended Network Filter List ID Mask Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x228)++0x3 line.long 0x0 "CFDGPFLP0$1,Global Pretended Network Filter List Pointer 0 Registers s = [1...2]h" hexmask.long.word 0x0 16.--31. 1. "GPFLPTR,Global Pretended Network Filter List Pointer Field" bitfld.long 0x0 15. "GPFLRMV,Global Pretended Network Filter List RX Message Buffer Valid" "0: Global Pretended Network Filter List Single..,1: Global Pretended Network Filter List Single.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GPFLRMDP,Global Pretended Network Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GPFLIFL0,Global Pretended Network Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GPFLDLC,Global Pretended Network Filter List DLC Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x22C)++0x3 line.long 0x0 "CFDGPFLP1$1,Global Pretended Network Filter List Pointer 1 Registers s = [1...2]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GPFLFDP8,Global Pretended Network Filter List FIFO Direction Pointer [8]" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GPFLFDP1,Global Pretended Network Filter List FIFO Direction Pointer [1]" "0,1" newline bitfld.long 0x0 0. "GPFLFDP0,Global Pretended Network Filter List FIFO Direction Pointer [0]" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x230)++0x3 line.long 0x0 "CFDGPFLPT$1,Global Pretended Network Filter List Filter Type Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLANDOR,Global Pretended Network filter conditions of the filters 0 and 1" "0: Both of filters 0 and 1 are successful.,1: One of the filter 0 or 1 is successful." bitfld.long 0x0 30. "GPFLRANG0,Global Pretended Network filter comparison conditions of the filter0" "0: payload data match filter,1: upper / lower filter" newline bitfld.long 0x0 29. "GPFLOUT0,Global Pretended Network filter conditions of upper / lower filter of the filter0" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." hexmask.long.word 0x0 20.--28. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline hexmask.long.byte 0x0 16.--19. 1. "GPFLOFFSET0,Global Pretended Network filter offset value of the filter0" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "GPFLRANG1,Global Pretended Network filter comparison conditions of the filter1" "0: payload data match filter,1: upper / lower filter" bitfld.long 0x0 13. "GPFLOUT1,Global Pretended Network filter conditions of upper / lower filter of the filter1" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." newline hexmask.long.word 0x0 4.--12. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 0.--3. 1. "GPFLOFFSET1,Global Pretended Network filter offset value of the filter1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x234)++0x3 line.long 0x0 "CFDGPFLPD0$1,Global Pretended Network Filter List Payload Data 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x238)++0x3 line.long 0x0 "CFDGPFLPM0$1,Global Pretended Network Filter List Payload Mask 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x23C)++0x3 line.long 0x0 "CFDGPFLPD1$1,Global Pretended Network Filter List Payload Data 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x240)++0x3 line.long 0x0 "CFDGPFLPM1$1,Global Pretended Network Filter List Payload Mask 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "CFDRPGACC$1,RAM Test Page Access Registers" hexmask.long 0x0 0.--31. 1. "RDTA,RAM Data Test Access" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x520)++0x3 line.long 0x0 "CFDRFID$1,RX FIFO Access ID Registers" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x524)++0x3 line.long 0x0 "CFDRFPTR$1,RX FIFO Access Pointer Register" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x528)++0x3 line.long 0x0 "CFDRFFDSTS$1,RX FIFO Access CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x52C)++0x3 line.long 0x0 "CFDRFDF0$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x578)++0x3 line.long 0x0 "CFDRFDF1$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x5B8++0x4B line.long 0x0 "CFDCFID,Common FIFO Access ID Registers" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTR,Common FIFO Access Pointer Registers" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTS,Common FIFO Access CAN-FD Control/Status Register" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" line.long 0xC "CFDCFDF0,Common FIFO Access Data Field p Registers" hexmask.long.byte 0xC 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0xC 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0xC 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0xC 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x10 "CFDCFDF1,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x10 24.--31. 1. "CFDB7,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x10 16.--23. 1. "CFDB6,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x10 8.--15. 1. "CFDB5,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x10 0.--7. 1. "CFDB4,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x14 "CFDCFDF2,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x14 24.--31. 1. "CFDB11,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x14 16.--23. 1. "CFDB10,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x14 8.--15. 1. "CFDB9,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x14 0.--7. 1. "CFDB8,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x18 "CFDCFDF3,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x18 24.--31. 1. "CFDB15,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x18 16.--23. 1. "CFDB14,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x18 8.--15. 1. "CFDB13,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x18 0.--7. 1. "CFDB12,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x1C "CFDCFDF4,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x1C 24.--31. 1. "CFDB19,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x1C 16.--23. 1. "CFDB18,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x1C 8.--15. 1. "CFDB17,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x1C 0.--7. 1. "CFDB16,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x20 "CFDCFDF5,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x20 24.--31. 1. "CFDB23,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x20 16.--23. 1. "CFDB22,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x20 8.--15. 1. "CFDB21,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x20 0.--7. 1. "CFDB20,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x24 "CFDCFDF6,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x24 24.--31. 1. "CFDB27,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x24 16.--23. 1. "CFDB26,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x24 8.--15. 1. "CFDB25,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x24 0.--7. 1. "CFDB24,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x28 "CFDCFDF7,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x28 24.--31. 1. "CFDB31,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x28 16.--23. 1. "CFDB30,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x28 8.--15. 1. "CFDB29,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x28 0.--7. 1. "CFDB28,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x2C "CFDCFDF8,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x2C 24.--31. 1. "CFDB35,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x2C 16.--23. 1. "CFDB34,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x2C 8.--15. 1. "CFDB33,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x2C 0.--7. 1. "CFDB32,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x30 "CFDCFDF9,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x30 24.--31. 1. "CFDB39,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x30 16.--23. 1. "CFDB38,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x30 8.--15. 1. "CFDB37,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x30 0.--7. 1. "CFDB36,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x34 "CFDCFDF10,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x34 24.--31. 1. "CFDB43,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x34 16.--23. 1. "CFDB42,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x34 8.--15. 1. "CFDB41,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x34 0.--7. 1. "CFDB40,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x38 "CFDCFDF11,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x38 24.--31. 1. "CFDB47,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x38 16.--23. 1. "CFDB46,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x38 8.--15. 1. "CFDB45,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x38 0.--7. 1. "CFDB44,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x3C "CFDCFDF12,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x3C 24.--31. 1. "CFDB51,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x3C 16.--23. 1. "CFDB50,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x3C 8.--15. 1. "CFDB49,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x3C 0.--7. 1. "CFDB48,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x40 "CFDCFDF13,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x40 24.--31. 1. "CFDB55,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x40 16.--23. 1. "CFDB54,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x40 8.--15. 1. "CFDB53,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x40 0.--7. 1. "CFDB52,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x44 "CFDCFDF14,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x44 24.--31. 1. "CFDB59,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x44 16.--23. 1. "CFDB58,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x44 8.--15. 1. "CFDB57,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x44 0.--7. 1. "CFDB56,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x48 "CFDCFDF15,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x48 24.--31. 1. "CFDB63,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x48 16.--23. 1. "CFDB62,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x48 8.--15. 1. "CFDB61,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x48 0.--7. 1. "CFDB60,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x604)++0x3 line.long 0x0 "CFDTMID$1,TX Message Buffer ID Registers" bitfld.long 0x0 31. "TMIDE,TX Message Buffer IDE Bit" "0: STD-ID will be transmitted,1: EXT-ID will be transmitted" bitfld.long 0x0 30. "TMRTR,TX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,Tx History List Entry" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "TMID,TX Message Buffer ID Field" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x608)++0x3 line.long 0x0 "CFDTMPTR$1,TX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "TMDLC,TX Message Buffer DLC Field" hexmask.long 0x0 0.--27. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x60C)++0x3 line.long 0x0 "CFDTMFDCTR$1,TX Message Buffer CAN-FD Control Register" hexmask.long.word 0x0 16.--31. 1. "TMPTR,TX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "TMIFL,TX Message Buffer Information Label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "TMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "TMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "TMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x610)++0x3 line.long 0x0 "CFDTMDF0_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB3,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB2,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB1,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB0,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x65C)++0x3 line.long 0x0 "CFDTMDF1_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB7,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB6,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB5,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB4,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6A8)++0x3 line.long 0x0 "CFDTMDF2_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB11,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB10,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB9,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB8,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6F4)++0x3 line.long 0x0 "CFDTMDF3_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB15,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB14,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB13,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB12,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end rgroup.long 0x740++0x7 line.long 0x0 "CFDTHLACC0,Channel 0 TX History List Access Registers0" hexmask.long.word 0x0 16.--31. 1. "TMTS,Transmit Timestamp" hexmask.long.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 3.--4. "BN,Buffer No." "0,1,2,3" bitfld.long 0x0 0.--2. "BT,Buffer Type" "?,1: Flat TX Message Buffer,?,?,?,?,?,?" line.long 0x4 "CFDTHLACC1,Channel 0 TX History List Access Registers1" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000." bitfld.long 0x4 16.--17. "TIFL,Transmit Information Label" "0,1,2,3" newline hexmask.long.word 0x4 0.--15. 1. "TID,Transmit ID" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x920)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x924)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x928)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x92C)++0x3 line.long 0x0 "CFDRMDF0_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB3,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB2,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB1,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB0,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x978)++0x3 line.long 0x0 "CFDRMDF1_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB7,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB6,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB5,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB4,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x9C4)++0x3 line.long 0x0 "CFDRMDF2_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB11,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB10,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB9,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB8,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA10)++0x3 line.long 0x0 "CFDRMDF3_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB15,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB14,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB13,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB12,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA5C)++0x3 line.long 0x0 "CFDRMDF4_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB19,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB18,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB17,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB16,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAA8)++0x3 line.long 0x0 "CFDRMDF5_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB23,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB22,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB21,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB20,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAF4)++0x3 line.long 0x0 "CFDRMDF6_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB27,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB26,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB25,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB24,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xB40)++0x3 line.long 0x0 "CFDRMDF7_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB31,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB30,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB29,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB28,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD20)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD24)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD28)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD2C)++0x3 line.long 0x0 "CFDRMDF8_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB35,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB34,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB33,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB32,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD78)++0x3 line.long 0x0 "CFDRMDF9_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB39,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB38,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB37,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB36,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xDC4)++0x3 line.long 0x0 "CFDRMDF10_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB43,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB42,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB41,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB40,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE10)++0x3 line.long 0x0 "CFDRMDF11_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB47,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB46,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB45,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB44,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE5C)++0x3 line.long 0x0 "CFDRMDF12_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB51,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB50,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB49,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB48,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEA8)++0x3 line.long 0x0 "CFDRMDF13_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB55,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB54,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB53,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB52,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEF4)++0x3 line.long 0x0 "CFDRMDF14_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB59,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB58,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB57,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB56,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xF40)++0x3 line.long 0x0 "CFDRMDF15_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB63,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB62,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB61,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB60,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1120)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1124)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1128)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x112C)++0x3 line.long 0x0 "CFDRMDF16_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB67,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB66,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB65,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB64,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1178)++0x3 line.long 0x0 "CFDRMDF17_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB71,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB70,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB69,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB68,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x11C4)++0x3 line.long 0x0 "CFDRMDF18_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB75,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB74,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB73,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB72,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1210)++0x3 line.long 0x0 "CFDRMDF19_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB79,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB78,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB77,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB76,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x125C)++0x3 line.long 0x0 "CFDRMDF20_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB83,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB82,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB81,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB80,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12A8)++0x3 line.long 0x0 "CFDRMDF21_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB87,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB86,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB85,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB84,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12F4)++0x3 line.long 0x0 "CFDRMDF22_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB91,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB90,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB89,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB88,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1340)++0x3 line.long 0x0 "CFDRMDF23_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB95,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB94,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB93,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB92,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1520)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1524)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1528)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x152C)++0x3 line.long 0x0 "CFDRMDF24_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB99,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB98,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB97,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB96,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1578)++0x3 line.long 0x0 "CFDRMDF25_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB103,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB102,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB101,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB100,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x15C4)++0x3 line.long 0x0 "CFDRMDF26_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB107,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB106,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB105,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB104,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1610)++0x3 line.long 0x0 "CFDRMDF27_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB111,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB110,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB109,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB108,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x165C)++0x3 line.long 0x0 "CFDRMDF28_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB115,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB114,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB113,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB112,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16A8)++0x3 line.long 0x0 "CFDRMDF29_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB119,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB118,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB117,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB116,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16F4)++0x3 line.long 0x0 "CFDRMDF30_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB123,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB122,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB121,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB120,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1740)++0x3 line.long 0x0 "CFDRMDF31_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB127,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB126,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB125,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB124,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1920)++0x3 line.long 0x0 "CFDRFIDE$1,RX FIFO Access ID Registers for Emulation" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1924)++0x3 line.long 0x0 "CFDRFPTRE$1,RX FIFO Access Pointer Registers for Emulation" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1928)++0x3 line.long 0x0 "CFDRFFDSTSE$1,RX FIFO Access CAN-FD Status Registers for Emulation" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x192C)++0x3 line.long 0x0 "CFDRFDF0E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1930)++0x3 line.long 0x0 "CFDRFDF1E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1934)++0x3 line.long 0x0 "CFDRFDF2E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB11,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB10,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB9,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB8,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1938)++0x3 line.long 0x0 "CFDRFDF3E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB15,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB14,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB13,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB12,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x193C)++0x3 line.long 0x0 "CFDRFDF4E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB19,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB18,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB17,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB16,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1940)++0x3 line.long 0x0 "CFDRFDF5E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB23,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB22,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB21,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB20,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1944)++0x3 line.long 0x0 "CFDRFDF6E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB27,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB26,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB25,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB24,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1948)++0x3 line.long 0x0 "CFDRFDF7E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB31,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB30,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB29,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB28,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x194C)++0x3 line.long 0x0 "CFDRFDF8E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB35,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB34,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB33,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB32,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1950)++0x3 line.long 0x0 "CFDRFDF9E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB39,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB38,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB37,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB36,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1954)++0x3 line.long 0x0 "CFDRFDF10E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB43,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB42,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB41,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB40,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1958)++0x3 line.long 0x0 "CFDRFDF11E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB47,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB46,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB45,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB44,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x195C)++0x3 line.long 0x0 "CFDRFDF12E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB51,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB50,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB49,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB48,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1960)++0x3 line.long 0x0 "CFDRFDF13E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB55,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB54,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB53,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB52,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1964)++0x3 line.long 0x0 "CFDRFDF14E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB59,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB58,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB57,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB56,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1968)++0x3 line.long 0x0 "CFDRFDF15E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB63,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB62,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB61,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB60,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x19B8++0xB line.long 0x0 "CFDCFIDE,Common FIFO Access ID Register for Emulation" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTRE,Common FIFO Access Pointer Register for Emulation" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTSE,Common FIFO Access CAN-FD Control/Status Register for Emulation" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x19C4)++0x3 line.long 0x0 "CFDCFDF$1E,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end tree.end tree "CANFD1" base ad:0x40382000 group.long 0x0++0xF line.long 0x0 "CFDC0NCFG,Channel 0 Nominal Bitrate Configuration Register" hexmask.long.byte 0x0 25.--31. 1. "NTSEG2,Timing Segment 2" hexmask.long.byte 0x0 17.--24. 1. "NTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 10.--16. 1. "NSJW,Resynchronization Jump Width" hexmask.long.word 0x0 0.--9. 1. "NBRP,Channel Nominal Baud Rate Prescaler" line.long 0x4 "CFDC0CTR,Channel 0 Control Registers" bitfld.long 0x4 31. "ROM,Restricted Operation Mode" "0: Restricted Operation Mode disabled,1: Restricted Operation Mode enabled" bitfld.long 0x4 30. "BFT,Bit Flip Test" "0: First data bit of reception stream not inverted,1: First data bit of reception stream inverted" newline bitfld.long 0x4 29. "TRR,TEC/REC Reset" "0: Error counter normal operation,1: Error counter reset" bitfld.long 0x4 28. "TRH,TEC/REC Hold" "0: Error counter normal operation,1: Error counter frozen" newline bitfld.long 0x4 27. "TRWE,TEC/REC Write Enable" "0: Error Counter write disabled,1: Error Counter write enabled" bitfld.long 0x4 25.--26. "CTMS,Channel Test Mode Select" "0: Basic test mode,1: Listen-Only mode,?,?" newline bitfld.long 0x4 24. "CTME,Channel Test Mode Enable" "0: Channel Test Mode disabled,1: Channel Test Mode enabled" bitfld.long 0x4 23. "ERRD,Channel Error Display" "0: Only the 1st set of error codes displayed,1: Accumulated error codes displayed" newline bitfld.long 0x4 21.--22. "BOM,Channel Bus-Off Mode" "0: Normal mode (comply with ISO 11898-1),1: Entry to Halt Mode automatically at Bus-Off start,?,?" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "TDCVFIE,Transceiver Delay Compensation Violation Interrupt enable" "0: Transceiver Delay Compensation Violation..,1: Transceiver Delay Compensation Violation.." bitfld.long 0x4 18. "SOCOIE,Successful Occurrence Counter Overflow Interrupt enable" "0: Successful occurrence counter overflow interrupt..,1: Successful occurrence counter overflow interrupt.." newline bitfld.long 0x4 17. "EOCOIE,Error occurrence counter overflow Interrupt enable" "0: Error occurrence counter overflow Interrupt..,1: Error occurrence counter overflow Interrupt.." bitfld.long 0x4 16. "TAIE,Transmission abort Interrupt Enable" "0: TX abort Interrupt disabled,1: TX abort Interrupt enabled" newline bitfld.long 0x4 15. "ALIE,Arbitration Lost Interrupt Enable" "0: Arbitration Lost Interrupt disabled,1: Arbitration Lost Interrupt enabled" bitfld.long 0x4 14. "BLIE,Bus Lock Interrupt Enable" "0: Bus Lock Interrupt disabled,1: Bus Lock Interrupt enabled" newline bitfld.long 0x4 13. "OLIE,Overload Interrupt Enable" "0: Overload Interrupt disabled,1: Overload Interrupt enabled" bitfld.long 0x4 12. "BORIE,Bus-Off Recovery Interrupt Enable" "0: Bus-Off Recovery Interrupt disabled,1: Bus-Off Recovery Interrupt enabled" newline bitfld.long 0x4 11. "BOEIE,Bus-Off Entry Interrupt Enable" "0: Bus-Off Entry Interrupt disabled,1: Bus-Off Entry Interrupt enabled" bitfld.long 0x4 10. "EPIE,Error Passive Interrupt Enable" "0: Error Passive Interrupt disabled,1: Error Passive Interrupt enabled" newline bitfld.long 0x4 9. "EWIE,Error Warning Interrupt Enable" "0: Error Warning Interrupt disabled,1: Error Warning Interrupt enabled" bitfld.long 0x4 8. "BEIE,Bus Error Interrupt Enable" "0: Bus Error Interrupt disabled,1: Bus Error Interrupt enabled" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "RTBO,Return from Bus-Off" "0: Channel is not forced to return from Bus-Off,1: Channel is forced to return from Bus-Off" newline bitfld.long 0x4 2. "CSLPR,Channel Sleep Request" "0: Channel Sleep Request disabled,1: Channel Sleep Request enabled" bitfld.long 0x4 0.--1. "CHMDC,Channel Mode Control" "0: Channel Operation Mode request,1: Channel Reset request,?,?" line.long 0x8 "CFDC0STS,Channel 0 Status Registers" hexmask.long.byte 0x8 24.--31. 1. "TEC,Transmission Error Count" hexmask.long.byte 0x8 16.--23. 1. "REC,Reception Error Count" newline hexmask.long.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 8. "ESIF,Error State Indication Flag" "0: No CAN-FD message has been received with the ESI..,1: At least 1 CAN-FD message was received where the.." newline rbitfld.long 0x8 7. "COMSTS,Channel Communication Status" "0: Channel is not ready for communication,1: Channel is ready for communication" rbitfld.long 0x8 6. "RECSTS,Channel Receive Status" "0: Channel is not receiving,1: Channel is receiving" newline rbitfld.long 0x8 5. "TRMSTS,Channel Transmit Status" "0: Channel is not transmitting,1: Channel is transmitting" rbitfld.long 0x8 4. "BOSTS,Channel Bus-Off Status" "0: Channel not in Bus-Off state,1: Channel in Bus-Off state" newline rbitfld.long 0x8 3. "EPSTS,Channel Error Passive Status" "0: Channel not in Error Passive state.,1: Channel in Error Passive state." rbitfld.long 0x8 2. "CSLPSTS,Channel SLEEP Status" "0: Channel not in Sleep Mode,1: Channel in Sleep Mode" newline rbitfld.long 0x8 1. "CHLTSTS,Channel HALT Status" "0: Channel not in Halt Mode,1: Channel in Halt Mode" rbitfld.long 0x8 0. "CRSTSTS,Channel RESET Status" "0: Channel not in Reset Mode,1: Channel in Reset Mode" line.long 0xC "CFDC0ERFL,Channel 0 Error Flag Registers" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0xC 16.--30. 1. "CRCREG,CRC Register value" newline bitfld.long 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 14. "ADERR,Acknowledge Delimiter Error" "0: Channel Ack Del Error not detected,1: Channel Ack Del Error detected" newline bitfld.long 0xC 13. "B0ERR,Bit 0 Error" "0: Channel Bit 0 Error not detected,1: Channel Bit 0 Error detected" bitfld.long 0xC 12. "B1ERR,Bit 1 Error" "0: Channel Bit 1 Error not detected,1: Channel Bit 1 Error detected" newline bitfld.long 0xC 11. "CERR,CRC Error" "0: Channel CRC Error not detected,1: Channel CRC Error detected" bitfld.long 0xC 10. "AERR,Acknowledge Error" "0: Channel Ack Error not detected,1: Channel Ack Error detected" newline bitfld.long 0xC 9. "FERR,Form Error" "0: Channel Form Error not detected,1: Channel Form Error detected" bitfld.long 0xC 8. "SERR,Stuff Error" "0: Channel stuff Error not detected,?" newline bitfld.long 0xC 7. "ALF,Arbitration Lost Flag" "0: Channel Arbitration Lost not detected,1: Channel Arbitration Lost detected" bitfld.long 0xC 6. "BLF,Bus Lock Flag" "0: Channel Bus Lock not detected,1: Channel Bus Lock detected" newline bitfld.long 0xC 5. "OVLF,Overload Flag" "0: Channel Overload not detected,1: Channel Overload detected" bitfld.long 0xC 4. "BORF,Bus-Off Recovery Flag" "0: Channel Bus-Off Recovery not detected,1: Channel Bus-Off Recovery detected" newline bitfld.long 0xC 3. "BOEF,Bus-Off Entry Flag" "0: Channel Bus-Off Entry not detected,1: Channel Bus-Off Entry detected" bitfld.long 0xC 2. "EPF,Error Passive Flag" "0: Channel Error Passive not detected,1: Channel Error Passive detected" newline bitfld.long 0xC 1. "EWF,Error Warning Flag" "0: Channel Error Warning not detected,1: Channel Error Warning detected" bitfld.long 0xC 0. "BEF,Bus Error Flag" "0: Channel Bus Error not detected,1: Channel Bus Error detected" rgroup.long 0x10++0x3 line.long 0x0 "CFDGIPV,Global IP Version Register" hexmask.long.word 0x0 16.--31. 1. "PSI,Parameter Status Information" bitfld.long 0x0 15. "CPUBUS,CPU bus information" "0,1" newline hexmask.long.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 8.--9. "IPT,IP Type Release Number" "0,1,2,3" newline hexmask.long.byte 0x0 0.--7. 1. "IPV,IP Version Release Number" group.long 0x14++0x7 line.long 0x0 "CFDGCFG,Global Configuration Register" hexmask.long.word 0x0 16.--31. 1. "ITRCP,Interval Timer Reference Clock Prescaler" bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSSS,Timestamp Source Select" "0: Source clock for Timestamp counter is peripheral..,1: Source clock for Timestamp counter is bit time.." hexmask.long.byte 0x0 8.--11. 1. "TSP,Timestamp Prescaler" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "CMPOC,CAN-FD message Payload overflow configuration" "0: Message is rejected,1: Message payload is cut to fit to configured.." newline bitfld.long 0x0 4. "DCS,Data Link Controller Clock Select" "0: Internal clean clock,1: External Clock source connected to clk_xincan pin" bitfld.long 0x0 3. "MME,Mirror Mode Enable" "0: Mirror Mode disabled,1: Mirror Mode enabled" newline bitfld.long 0x0 2. "DRE,DLC Replacement Enable" "0: DLC replacement disabled,1: DLC replacement enabled" bitfld.long 0x0 1. "DCE,DLC Check Enable" "0: DLC check disabled,1: DLC check enabled" newline bitfld.long 0x0 0. "TPRI,Transmission Priority" "0: ID Priority,1: Message Buffer Number Priority" line.long 0x4 "CFDGCTR,Global Control Register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "TSWR,Timestamp Write" "0: Timestamp write disabled,1: Timestamp write enabled" newline bitfld.long 0x4 16. "TSRST,Timestamp Reset" "0: Timestamp not reset,1: Timestamp reset" hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 11. "CMPOFIE,CAN-FD message payload overflow Flag Interrupt enable" "0: CAN-FD message payload overflow Flag Interrupt..,1: CAN-FD message payload overflow Flag Interrupt.." bitfld.long 0x4 10. "THLEIE,TX History List Entry Lost Interrupt Enable" "0: TX History List Entry Lost Interrupt Disabled,1: TX History List Entry Lost Interrupt Enabled" newline bitfld.long 0x4 9. "MEIE,Message lost Error Interrupt Enable" "0: Message Lost Error Interrupt Disabled,1: Message Lost Error Interrupt Enabled" bitfld.long 0x4 8. "DEIE,DLC check Interrupt Enable" "0: DLC check Interrupt Disabled,1: DLC check Interrupt Enabled" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 2. "GSLPR,Global Sleep Request" "0: Global Sleep Request Disabled,1: Global Sleep Request Enabled" newline bitfld.long 0x4 0.--1. "GMDC,Global Mode Control" "0: ID Priority,1: Message Buffer Number Priority,?,?" rgroup.long 0x1C++0x3 line.long 0x0 "CFDGSTS,Global Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." bitfld.long 0x0 3. "GRAMINIT,Global RAM Initialisation" "0: RAM initialisation is finished,1: RAM initialisation ongoing" newline bitfld.long 0x0 2. "GSLPSTS,Global Sleep Status" "0: Not in Sleep Mode,1: In Sleep Mode" bitfld.long 0x0 1. "GHLTSTS,Global Halt Status" "0: Not in Halt Mode,1: In Halt Mode" newline bitfld.long 0x0 0. "GRSTSTS,Global Reset Status" "0: Not in Reset Mode,1: In Reset Mode" group.long 0x20++0x3 line.long 0x0 "CFDGERFL,Global Error Flag Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "EEF,ECC Error Flag" "0: ECC Error not detected during TX-SCAN,1: ECC Error detected during TX-SCAN" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "RXSFAIL,RX Scan Fail" "0: RX Scan fail not detected,1: RX Scan fail detected" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.long 0x0 5. "OTBMLTSTS,OTB FIFO Message Lost Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 3. "CMPOF,CAN-FD message payload overflow Flag" "0: CAN-FD message payload overflow not detected,1: CAN-FD message payload overflow detected" newline rbitfld.long 0x0 2. "THLES,TX History List Entry Lost Error Status" "0: TX History List Entry Lost Error not detected,1: TX History List Entry Lost Error detected" rbitfld.long 0x0 1. "MES,Message Lost Error Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 0. "DEF,DLC Error Flag" "?,1: DLC Error detected" rgroup.long 0x24++0x3 line.long 0x0 "CFDGTSC,Global Timestamp Counter Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "TS,Timestamp Value" group.long 0x28++0x13 line.long 0x0 "CFDGAFLECTR,Global Acceptance Filter List Entry Control Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "AFLDAE,Acceptance Filter List Data Access Enable" "0: Acceptance Filter List Data access disabled,1: Acceptance Filter List Data access enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.long 0x4 "CFDGAFLCFG,Global Acceptance Filter List Configuration Register" hexmask.long.word 0x4 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." hexmask.long.byte 0x4 16.--21. 1. "RNC,Rule Number" newline hexmask.long.word 0x4 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x8 "CFDRMNB,RX Message Buffer Number Register" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x8 8.--10. "RMPLS,Reception Message Buffer Payload Data Size" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" newline bitfld.long 0x8 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "NRXMB,Number of RX Message Buffers" line.long 0xC "CFDRMND,RX Message Buffer New Data Register t(t=0)" hexmask.long 0xC 0.--31. 1. "RMNSu,RX Message Buffer New Data Status" line.long 0x10 "CFDRMIEC,RX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x10 0.--31. 1. "RMIE,RX Message Buffer Interrupt Enable" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3C)++0x3 line.long 0x0 "CFDRFCC$1,RX FIFO Configuration / Control Registers %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "RFIGCV,RX FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" newline bitfld.long 0x0 12. "RFIM,RX FIFO Interrupt Mode" "0: Interrupt generated when RX FIFO counter reaches..,1: Interrupt generated at the end of every received.." bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 8.--10. "RFDC,RX FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4.--6. "RFPLS,Rx FIFO Payload Data Size configuration" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "RFIE,RX FIFO Interrupt Enable" "0: FIFO Interrupt generation disabled,1: FIFO Interrupt generation enabled" bitfld.long 0x0 0. "RFE,RX FIFO Enable" "0: FIFO disabled,1: FIFO enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CFDRFSTS$1,RX FIFO Status Registers %s" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x0 8.--13. 1. "RFMC,RX FIFO Message Count" newline hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 3. "RFIF,RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied,1: FIFO Full interrupt condition satisfied" newline bitfld.long 0x0 2. "RFMLT,RX FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 1. "RFFLL,RX FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 0. "RFEMP,RX FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4C)++0x3 line.long 0x0 "CFDRFPCTR$1,RX FIFO Pointer Control Registers %s" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RFPC,RX FIFO Pointer Control" repeat.end group.long 0x54++0xB line.long 0x0 "CFDCFCC,Common FIFO Configuration / Control Registers" hexmask.long.byte 0x0 24.--31. 1. "CFITT,Common FIFO Interval Transmission Time" bitfld.long 0x0 21.--23. "CFDC,Common FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" newline bitfld.long 0x0 18.--20. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--17. "CFTML,Common FIFO TX Message Buffer Link" "0,1,2,3" newline bitfld.long 0x0 13.--15. "CFIGCV,Common FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" bitfld.long 0x0 12. "CFIM,Common FIFO Interrupt Mode" "0,1" newline bitfld.long 0x0 11. "CFITR,Common FIFO Interval Timer Resolution" "0: Reference Clock Period x1,1: Reference Clock Period x10" bitfld.long 0x0 10. "CFITSS,Common FIFO Interval Timer Source Select" "0: Reference Clock (x1 / x10 period),1: Bit Time Clock of related channel (FIFO is.." newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8. "CFM,Common FIFO Mode" "0: RX FIFO Mode,1: TX FIFO Mode" newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4.--6. "CFPLS,Common FIFO Payload Data size configuration" "0: 8 Bytes,?,?,?,?,?,?,?" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "CFTXIE,Common FIFO TX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame TX,1: FIFO Interrupt generation enabled for Frame TX" newline bitfld.long 0x0 1. "CFRXIE,Common FIFO RX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame RX,1: FIFO Interrupt generation enabled for Frame RX" bitfld.long 0x0 0. "CFE,Common FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDCFSTS,Common FIFO Status Registers" hexmask.long.tbyte 0x4 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x4 8.--13. 1. "CFMC,Common FIFO Message Count" newline bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 4. "CFTXIF,Common TX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." newline bitfld.long 0x4 3. "CFRXIF,Common RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." bitfld.long 0x4 2. "CFMLT,Common FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" newline rbitfld.long 0x4 1. "CFFLL,Common FIFO Full" "0: FIFO Not Full,1: FIFO Full" rbitfld.long 0x4 0. "CFEMP,Common FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDCFPCTR,Common FIFO Pointer Control Registers" hexmask.long.tbyte 0x8 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x8 0.--7. 1. "CFPC,Common FIFO Pointer Control" rgroup.long 0x60++0xF line.long 0x0 "CFDFESTS,FIFO Empty Status Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x0 8. "CFEMP,Common FIF0 Empty Status" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 1. "RF1EMP,RX FIF0 1 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x0 0. "RF0EMP,RX FIF0 0 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x4 "CFDFFSTS,FIFO Full Status Register" hexmask.long.tbyte 0x4 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x4 8. "CFFLL,Common FIF0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x4 1. "RF1FLL,RX FIF0 1 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x4 0. "RF0FLL,RX FIF0 0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDFMSTS,FIFO Message Lost Status Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x8 8. "CFMLT,Common FIFO Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "RF1MLT,RX FIFO 1 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline bitfld.long 0x8 0. "RF0MLT,RX FIFO 0 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" line.long 0xC "CFDRFISTS,RX FIFO Interrupt Flag Status Register" hexmask.long 0xC 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000." bitfld.long 0xC 1. "RF1IF,RX FIFO[1] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" newline bitfld.long 0xC 0. "RF0IF,RX FIFO[0] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x70)++0x0 line.byte 0x0 "CFDTMC$1,TX Message Buffer Control Registers %s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TMOM,TX Message Buffer One-shot Mode" "0: TX Message Buffer not configured in one-shot mode,1: TX Message Buffer configured in one-shot mode" newline bitfld.byte 0x0 1. "TMTAR,TX Message Buffer Transmission abort Request" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." bitfld.byte 0x0 0. "TMTR,TX Message Buffer Transmission Request" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x74)++0x0 line.byte 0x0 "CFDTMSTS$1,TX Message Buffer Status Registers %s" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "TMTARM,TX Message Buffer Transmission abort Request Mirrored" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." newline rbitfld.byte 0x0 3. "TMTRM,TX Message Buffer Transmission Request Mirrored" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" bitfld.byte 0x0 1.--2. "TMTRF,TX Message Buffer Transmission Result Flag" "0: No Result,1: Transmission aborted from the TX MB,?,?" newline rbitfld.byte 0x0 0. "TMTSTS,TX Message Buffer Transmission Status" "0: No transmission ongoing,1: Transmission ongoing" repeat.end rgroup.long 0x78++0xF line.long 0x0 "CFDTMTRSTS,TX Message Buffer Transmission Request Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "CFDTMTRSTS,TX Message Buffer Transmission Request Status" line.long 0x4 "CFDTMTARSTS,TX Message Buffer Transmission Abort Request Status Register" hexmask.long 0x4 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x4 0.--3. 1. "CFDTMTARSTS,TX Message Buffer Transmission abort Request Status" line.long 0x8 "CFDTMTCSTS,TX Message Buffer Transmission Completion Status Register" hexmask.long 0x8 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x8 0.--3. 1. "CFDTMTCSTS,TX Message Buffer Transmission Completion Status" line.long 0xC "CFDTMTASTS,TX Message Buffer Transmission Abort Status Register" hexmask.long 0xC 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0xC 0.--3. 1. "CFDTMTASTS,TX Message Buffer Transmission abort Status" group.long 0x88++0xB line.long 0x0 "CFDTMIEC,TX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "TMIE,TX Message Buffer Interrupt Enable" line.long 0x4 "CFDTXQCC,TX Queue Configuration / Control Registers" hexmask.long.tbyte 0x4 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x4 8.--9. "TXQDC,TX Queue Depth Configuration" "0: 0 messages,1: Reserved,?,?" newline bitfld.long 0x4 7. "TXQIM,TX Queue Interrupt Mode" "0: when the last message is successfully transmitted,1: At every successful transmission" bitfld.long 0x4 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 5. "TXQTXIE,TX Queue TX Interrupt Enable" "0: TX Queue TX Interrupt disabled,1: TX Queue TX Interrupt enabled" hexmask.long.byte 0x4 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 0. "TXQE,TX Queue Enable" "0: TX Queue disabled,1: TX Queue enabled" line.long 0x8 "CFDTXQSTS,TX Queue Status Registers0" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." rbitfld.long 0x8 8.--10. "TXQMC,TX Queue Message Count" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x8 2. "TXQTXIF,TX Queue TX Interrupt Flag" "0: TX Queue interrupt condition not satisfied after..,1: TX Queue interrupt condition satisfied after.." newline rbitfld.long 0x8 1. "TXQFLL,TX Queue Full" "0: TX Queue Not Full,1: TX Queue Full" rbitfld.long 0x8 0. "TXQEMP,TX Queue Empty" "0: TX Queue Not Empty,1: TX Queue Empty" wgroup.long 0x94++0x3 line.long 0x0 "CFDTXQPCTR,TX Queue Pointer Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TXQPC,TX Queue Pointer Control" group.long 0x98++0x7 line.long 0x0 "CFDTHLCC,TX History List Configuration / Control Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "THLDTE,TX History List Dedicated TX Enable" "0: TX FIFO + TX Queue (TX FIFO Only RL version),1: Flat TX MB + TX FIFO + TX Queue (Flat TX MB + TX.." newline bitfld.long 0x0 9. "THLIM,TX History List Interrupt Mode" "0: Interrupt generated if TX History List level..,1: Interrupt generated for every successfully.." bitfld.long 0x0 8. "THLIE,TX History List Interrupt Enable" "0: TX History List Interrupt disabled,1: TX History List Interrupt enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "THLE,TX History List Enable" "0: TX History List disabled,1: TX History List enabled" line.long 0x4 "CFDTHLSTS,TX History List Status Register" hexmask.long.tbyte 0x4 12.--31. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." hexmask.long.byte 0x4 8.--11. 1. "THLMC,TX History List Message Count" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "THLIF,TX History List Interrupt Flag" "0: TX History List Interrupt condition not satisfied,1: TX History List Interrupt condition satisfied" newline bitfld.long 0x4 2. "THLELT,TX History List Entry Lost" "0: No Entry Lost in TX History List,1: TX History List Entry Lost" rbitfld.long 0x4 1. "THLFLL,TX History List Full" "0: TX History List Not Full,1: TX History List Full" newline rbitfld.long 0x4 0. "THLEMP,TX History List Empty" "0: TX History List Not Empty,1: TX History List Empty" wgroup.long 0xA0++0x3 line.long 0x0 "CFDTHLPCTR,TX History List Pointer Control Registers" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "THLPC,TX History List Pointer Control" rgroup.long 0xA4++0x3 line.long 0x0 "CFDGTINTSTS,Global TX Interrupt Status Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." bitfld.long 0x0 4. "THIF,TX History List Interrupt Channel" "0: Channel n TX History List Interrupt flag not set,1: Channel n TX History List Interrupt flag set" newline bitfld.long 0x0 3. "CFTIF,COM FIFO TX/GW Mode Interrupt Flag Channel" "0: Channel n COM FIFO TX/GW mode Interrupt flag not..,1: Channel n COM FIFO TX/GW mode Interrupt flag set" bitfld.long 0x0 2. "TQIF,TX Queue Interrupt Flag Channel" "0: Channel n TX Queue Interrupt flag not set,1: Channel n TX Queue Interrupt flag set" newline bitfld.long 0x0 1. "TAIF,TX Abort Interrupt Flag Channel" "0: Channel n TX abort Interrupt flag not set,1: Channel n TX abort Interrupt flag set" bitfld.long 0x0 0. "TSIF,TX Successful Interrupt Flag Channel" "0: Channel n TX Successful completion Interrupt..,1: Channel n TX Successful completion Interrupt.." group.long 0xA8++0xB line.long 0x0 "CFDGTSTCFG,Global Test Configuration Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x0 16.--19. 1. "RTMPS,RAM Test Mode Page Select" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "CFDGTSTCTR,Global Test Control Register" hexmask.long 0x4 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x4 2. "RTME,RAM Test Mode Enable" "0: RAM Test Mode disabled,1: RAM Test Mode enabled" newline bitfld.long 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.long 0x8 "CFDGFDCFG,Global FD configuration register" hexmask.long.tbyte 0x8 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x8 8.--9. "TSCCFG,Timestamp capture configuration" "0: Timestamp capture at the sample point of SOF..,1: Timestamp capture at frame valid indication,?,?" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "RPED,RES bit Protocol exception disable" "0: Protocol exception event detection enabled,1: Protocol exception event detection disabled" wgroup.long 0xB8++0x3 line.long 0x0 "CFDGLOCKK,Global Lock Key Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "LOCK,Lock Key" group.long 0xBC++0x1F line.long 0x0 "CFDGLOTB,Global OTB FIFO Configuration / Status Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." rbitfld.long 0x0 11.--12. "OTBMC,OTB FIFO Message Count" "0,1,2,3" newline bitfld.long 0x0 10. "OTBMLT,OTB FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 9. "OTBFLL,OTB FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 8. "OTBEMP,OTB FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 0. "OTBFE,OTB FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDGAFLIGNENT,Global AFL Ignore Entry Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline hexmask.long.byte 0x4 0.--4. 1. "IRN,Ignore Rule Number" line.long 0x8 "CFDGAFLIGNCTR,Global AFL Ignore Control Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "IREN,Ignore Rule Enable" "0: AFL rule number does not ignore,1: AFL rule number ignores" line.long 0xC "CFDCDTCT,DMA Transfer Control Register" hexmask.long.tbyte 0xC 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0xC 8. "CFDMAE,DMA Transfer Enable for Common FIFO 0 of channel 0" "0: DMA Transfer Request disabled for channel n,1: DMA Transfer Request enabled for channel n" newline hexmask.long.byte 0xC 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0xC 1. "RFDMAE1,DMA Transfer Enable for RXFIFO 1" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" newline bitfld.long 0xC 0. "RFDMAE0,DMA Transfer Enable for RXFIFO 0" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" line.long 0x10 "CFDCDTSTS,DMA Transfer Status Register" hexmask.long.tbyte 0x10 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." rbitfld.long 0x10 8. "CFDMASTS,DMA Transfer Status only for Common FIFO 0 of channel 0" "0: DMA transfer stopped,1: DMA transfer ongoing" newline hexmask.long.byte 0x10 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." rbitfld.long 0x10 1. "RFDMASTS1,DMA Transfer Status for RX FIFO 1" "0: DMA transfer stopped,1: DMA transfer ongoing" newline rbitfld.long 0x10 0. "RFDMASTS0,DMA Transfer Status for RX FIFO 0" "0: DMA transfer stopped,1: DMA transfer ongoing" line.long 0x14 "CFDGPFLECTR,Global Pretended Network Filter List Entry control Register" hexmask.long.tbyte 0x14 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x14 8. "PFLDAE,Pretended Network Filter List Data Access Enable" "0: Pretended Network Filter List Data access disabled,1: Pretended Network Filter List Data access enabled" newline hexmask.long.byte 0x14 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.long 0x18 "CFDGPFLCFG,Global Pretended Network Filter List configuration Register" hexmask.long.byte 0x18 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x18 24.--25. "RNC,Rule Number" "0,1,2,3" newline hexmask.long.byte 0x18 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.word 0x18 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x1C "CFDGRSTC,Global Reset Control Register" hexmask.long.word 0x1C 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x1C 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "SRST,SW reset" "0: normal state,1: SW reset state" group.long 0x100++0x13 line.long 0x0 "CFDC0DCFG,Channel 0 Data Bitrate Configuration Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 24.--27. 1. "DSJW,Resynchronization Jump Width" newline hexmask.long.byte 0x0 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 16.--19. 1. "DTSEG2,Timing Segment 2" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 0.--7. 1. "DBRP,Channel Data Baud Rate Prescaler" line.long 0x4 "CFDC0FDCFG,Channel 0 CAN-FD Configuration Register" bitfld.long 0x4 31. "CFDTE,CAN-FD Tolerance enable" "0: CAN-FD Tolerance mode disabled.,1: CAN-FD Tolerance mode enabled" bitfld.long 0x4 30. "CLOE,Classical CAN only enable" "0: Classical only mode disabled,1: Classical only mode enabled" newline bitfld.long 0x4 29. "REFE,RX edge filter enable" "0: RX edge filter disabled,1: RX edge filter enabled" bitfld.long 0x4 28. "FDOE,FD only enable" "0: FD only mode disabled,1: FD only mode enabled" newline hexmask.long.byte 0x4 24.--27. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 16.--23. 1. "TDCO,Transceiver Delay Compensation Offset" newline bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 12.--13. "RPNMD,Return Pretended Network Filter Mode" "0: Return to Acceptance Filter Mode,1: Return to Pretended Network Filter ID only and..,?,?" newline bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 10. "ESIC,Error State Indication Configuration" "0: The ESI bit in the frame will be representing..,1: The ESI bit in the frame will be representing.." newline bitfld.long 0x4 9. "TDCE,Transceiver Delay Compensation Enable" "0: Transceiver Delay Compensation disabled,1: Transceiver Delay Compensation enabled" bitfld.long 0x4 8. "TDCOC,Transceiver Delay Compensation Offset Configuration" "0: Measured + offset,1: offset only" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 0.--2. "EOCCFG,Error Occurrence Counter Configuration" "0: All Transmitter or Receiver CAN Frames,1: All Transmitter CAN Frames,?,?,?,?,?,?" line.long 0x8 "CFDC0FDCTR,Channel 0 CAN-FD Control Register" hexmask.long.byte 0x8 24.--31. 1. "KEY,Key code" hexmask.long.byte 0x8 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 16.--17. "PNMDC,Pretended Network Filter Mode Control" "0,1,2,3" hexmask.long.word 0x8 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x8 1. "SOCCLR,Successful Occurrence Counter Clear" "0: No Successful Occurrence Counter clear,1: Clear Successful Occurrence Counter" bitfld.long 0x8 0. "EOCCLR,Error Occurrence Counter Clear" "0: No Error Occurrence Counter clear,1: Clear Error Occurrence Counter" line.long 0xC "CFDC0FDSTS,Channel 0 CAN-FD Status Register" hexmask.long.byte 0xC 24.--31. 1. "SOC,Successful occurrence counter register" hexmask.long.byte 0xC 16.--23. 1. "EOC,Error occurrence counter register" newline bitfld.long 0xC 15. "TDCVF,Transceiver Delay Compensation Violation Flag" "0: Transceiver Delay Compensation Violation has not..,1: Transceiver Delay Compensation Violation has.." bitfld.long 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.long 0xC 12.--13. "PNSTS,Pretended Network Filter State" "0: Acceptance Filter Mode,1: Pretended Network Filter Mode,?,?" bitfld.long 0xC 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0xC 9. "SOCO,Successful occurrence counter overflow" "0: Successful occurrence counter has not overflowed,1: Successful occurrence counter has overflowed" bitfld.long 0xC 8. "EOCO,Error occurrence counter overflow" "0: Error occurrence counter has not overflowed,1: Error occurrence counter has overflowed" newline hexmask.long.byte 0xC 0.--7. 1. "TDCR,Transceiver Delay Compensation Result" line.long 0x10 "CFDC0FDCRC,Channel 0 CAN-FD CRC Register" hexmask.long.byte 0x10 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x10 24.--27. 1. "SCNT,Stuff bit count" newline bitfld.long 0x10 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x10 0.--20. 1. "CRCREG,CRC Register value" repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x120)++0x3 line.long 0x0 "CFDGAFLID$1,Global Acceptance Filter List ID Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDE,Global Acceptance Filter List Entry IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GAFLRTR,Global Acceptance Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GAFLLB,Global Acceptance Filter List Entry Loopback Configuration" "0: Global Acceptance Filter List entry ID for..,1: Global Acceptance Filter List entry ID for.." hexmask.long 0x0 0.--28. 1. "GAFLID,Global Acceptance Filter List Entry ID Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x124)++0x3 line.long 0x0 "CFDGAFLM$1,Global Acceptance Filter List Mask Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDEM,Global Acceptance Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GAFLRTRM,Global Acceptance Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GAFLIFL1,Global Acceptance Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GAFLIDM,Global Acceptance Filter List ID Mask Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x128)++0x3 line.long 0x0 "CFDGAFLP0$1,Global Acceptance Filter List Pointer 0 Registers r = [1...10]h" hexmask.long.word 0x0 16.--31. 1. "GAFLPTR,Global Acceptance Filter List Pointer Field" bitfld.long 0x0 15. "GAFLRMV,Global Acceptance Filter List RX Message Buffer Valid" "0: Global Acceptance Filter List Single Message..,1: Global Acceptance Filter List Single Message.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GAFLRMDP,Global Acceptance Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GAFLIFL0,Global Acceptance Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GAFLDLC,Global Acceptance Filter List DLC Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x12C)++0x3 line.long 0x0 "CFDGAFLP1$1,Global Acceptance Filter List Pointer 1 Registers r = [1...10]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GAFLFDP8,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[8])" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GAFLFDP1,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[1])" "0,1" newline bitfld.long 0x0 0. "GAFLFDP0,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[0])" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x220)++0x3 line.long 0x0 "CFDGPFLID$1,Global Pretended Network Filter List ID Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDE,Global Pretended Network Filter List IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GPFLRTR,Global Pretended Network Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GPFLLB,Global Pretended Network Filter List Entry Loopback Configuration" "0: Global Pretended Network Filter List entry ID..,1: Global Pretended Network Filter List entry ID.." hexmask.long 0x0 0.--28. 1. "GPFLID,Global Pretended Network Filter List ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x224)++0x3 line.long 0x0 "CFDGPFLM$1,Global Pretended Network Filter List MASK Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDEM,Global Pretended Network Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GPFLRTRM,Global Pretended Network Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GPFLIFL1,Global Pretended Network Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GPFLIDM,Global Pretended Network Filter List ID Mask Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x228)++0x3 line.long 0x0 "CFDGPFLP0$1,Global Pretended Network Filter List Pointer 0 Registers s = [1...2]h" hexmask.long.word 0x0 16.--31. 1. "GPFLPTR,Global Pretended Network Filter List Pointer Field" bitfld.long 0x0 15. "GPFLRMV,Global Pretended Network Filter List RX Message Buffer Valid" "0: Global Pretended Network Filter List Single..,1: Global Pretended Network Filter List Single.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GPFLRMDP,Global Pretended Network Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GPFLIFL0,Global Pretended Network Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GPFLDLC,Global Pretended Network Filter List DLC Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x22C)++0x3 line.long 0x0 "CFDGPFLP1$1,Global Pretended Network Filter List Pointer 1 Registers s = [1...2]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GPFLFDP8,Global Pretended Network Filter List FIFO Direction Pointer [8]" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GPFLFDP1,Global Pretended Network Filter List FIFO Direction Pointer [1]" "0,1" newline bitfld.long 0x0 0. "GPFLFDP0,Global Pretended Network Filter List FIFO Direction Pointer [0]" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x230)++0x3 line.long 0x0 "CFDGPFLPT$1,Global Pretended Network Filter List Filter Type Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLANDOR,Global Pretended Network filter conditions of the filters 0 and 1" "0: Both of filters 0 and 1 are successful.,1: One of the filter 0 or 1 is successful." bitfld.long 0x0 30. "GPFLRANG0,Global Pretended Network filter comparison conditions of the filter0" "0: payload data match filter,1: upper / lower filter" newline bitfld.long 0x0 29. "GPFLOUT0,Global Pretended Network filter conditions of upper / lower filter of the filter0" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." hexmask.long.word 0x0 20.--28. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline hexmask.long.byte 0x0 16.--19. 1. "GPFLOFFSET0,Global Pretended Network filter offset value of the filter0" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "GPFLRANG1,Global Pretended Network filter comparison conditions of the filter1" "0: payload data match filter,1: upper / lower filter" bitfld.long 0x0 13. "GPFLOUT1,Global Pretended Network filter conditions of upper / lower filter of the filter1" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." newline hexmask.long.word 0x0 4.--12. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 0.--3. 1. "GPFLOFFSET1,Global Pretended Network filter offset value of the filter1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x234)++0x3 line.long 0x0 "CFDGPFLPD0$1,Global Pretended Network Filter List Payload Data 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x238)++0x3 line.long 0x0 "CFDGPFLPM0$1,Global Pretended Network Filter List Payload Mask 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x23C)++0x3 line.long 0x0 "CFDGPFLPD1$1,Global Pretended Network Filter List Payload Data 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x240)++0x3 line.long 0x0 "CFDGPFLPM1$1,Global Pretended Network Filter List Payload Mask 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "CFDRPGACC$1,RAM Test Page Access Registers" hexmask.long 0x0 0.--31. 1. "RDTA,RAM Data Test Access" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x520)++0x3 line.long 0x0 "CFDRFID$1,RX FIFO Access ID Registers" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x524)++0x3 line.long 0x0 "CFDRFPTR$1,RX FIFO Access Pointer Register" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x528)++0x3 line.long 0x0 "CFDRFFDSTS$1,RX FIFO Access CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x52C)++0x3 line.long 0x0 "CFDRFDF0$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x578)++0x3 line.long 0x0 "CFDRFDF1$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x5B8++0x4B line.long 0x0 "CFDCFID,Common FIFO Access ID Registers" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTR,Common FIFO Access Pointer Registers" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTS,Common FIFO Access CAN-FD Control/Status Register" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" line.long 0xC "CFDCFDF0,Common FIFO Access Data Field p Registers" hexmask.long.byte 0xC 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0xC 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0xC 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0xC 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x10 "CFDCFDF1,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x10 24.--31. 1. "CFDB7,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x10 16.--23. 1. "CFDB6,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x10 8.--15. 1. "CFDB5,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x10 0.--7. 1. "CFDB4,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x14 "CFDCFDF2,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x14 24.--31. 1. "CFDB11,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x14 16.--23. 1. "CFDB10,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x14 8.--15. 1. "CFDB9,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x14 0.--7. 1. "CFDB8,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x18 "CFDCFDF3,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x18 24.--31. 1. "CFDB15,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x18 16.--23. 1. "CFDB14,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x18 8.--15. 1. "CFDB13,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x18 0.--7. 1. "CFDB12,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x1C "CFDCFDF4,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x1C 24.--31. 1. "CFDB19,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x1C 16.--23. 1. "CFDB18,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x1C 8.--15. 1. "CFDB17,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x1C 0.--7. 1. "CFDB16,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x20 "CFDCFDF5,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x20 24.--31. 1. "CFDB23,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x20 16.--23. 1. "CFDB22,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x20 8.--15. 1. "CFDB21,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x20 0.--7. 1. "CFDB20,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x24 "CFDCFDF6,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x24 24.--31. 1. "CFDB27,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x24 16.--23. 1. "CFDB26,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x24 8.--15. 1. "CFDB25,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x24 0.--7. 1. "CFDB24,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x28 "CFDCFDF7,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x28 24.--31. 1. "CFDB31,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x28 16.--23. 1. "CFDB30,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x28 8.--15. 1. "CFDB29,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x28 0.--7. 1. "CFDB28,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x2C "CFDCFDF8,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x2C 24.--31. 1. "CFDB35,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x2C 16.--23. 1. "CFDB34,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x2C 8.--15. 1. "CFDB33,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x2C 0.--7. 1. "CFDB32,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x30 "CFDCFDF9,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x30 24.--31. 1. "CFDB39,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x30 16.--23. 1. "CFDB38,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x30 8.--15. 1. "CFDB37,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x30 0.--7. 1. "CFDB36,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x34 "CFDCFDF10,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x34 24.--31. 1. "CFDB43,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x34 16.--23. 1. "CFDB42,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x34 8.--15. 1. "CFDB41,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x34 0.--7. 1. "CFDB40,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x38 "CFDCFDF11,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x38 24.--31. 1. "CFDB47,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x38 16.--23. 1. "CFDB46,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x38 8.--15. 1. "CFDB45,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x38 0.--7. 1. "CFDB44,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x3C "CFDCFDF12,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x3C 24.--31. 1. "CFDB51,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x3C 16.--23. 1. "CFDB50,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x3C 8.--15. 1. "CFDB49,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x3C 0.--7. 1. "CFDB48,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x40 "CFDCFDF13,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x40 24.--31. 1. "CFDB55,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x40 16.--23. 1. "CFDB54,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x40 8.--15. 1. "CFDB53,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x40 0.--7. 1. "CFDB52,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x44 "CFDCFDF14,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x44 24.--31. 1. "CFDB59,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x44 16.--23. 1. "CFDB58,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x44 8.--15. 1. "CFDB57,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x44 0.--7. 1. "CFDB56,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x48 "CFDCFDF15,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x48 24.--31. 1. "CFDB63,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x48 16.--23. 1. "CFDB62,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x48 8.--15. 1. "CFDB61,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x48 0.--7. 1. "CFDB60,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x604)++0x3 line.long 0x0 "CFDTMID$1,TX Message Buffer ID Registers" bitfld.long 0x0 31. "TMIDE,TX Message Buffer IDE Bit" "0: STD-ID will be transmitted,1: EXT-ID will be transmitted" bitfld.long 0x0 30. "TMRTR,TX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,Tx History List Entry" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "TMID,TX Message Buffer ID Field" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x608)++0x3 line.long 0x0 "CFDTMPTR$1,TX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "TMDLC,TX Message Buffer DLC Field" hexmask.long 0x0 0.--27. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x60C)++0x3 line.long 0x0 "CFDTMFDCTR$1,TX Message Buffer CAN-FD Control Register" hexmask.long.word 0x0 16.--31. 1. "TMPTR,TX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "TMIFL,TX Message Buffer Information Label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "TMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "TMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "TMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x610)++0x3 line.long 0x0 "CFDTMDF0_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB3,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB2,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB1,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB0,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x65C)++0x3 line.long 0x0 "CFDTMDF1_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB7,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB6,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB5,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB4,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6A8)++0x3 line.long 0x0 "CFDTMDF2_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB11,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB10,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB9,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB8,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6F4)++0x3 line.long 0x0 "CFDTMDF3_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB15,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB14,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB13,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB12,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end rgroup.long 0x740++0x7 line.long 0x0 "CFDTHLACC0,Channel 0 TX History List Access Registers0" hexmask.long.word 0x0 16.--31. 1. "TMTS,Transmit Timestamp" hexmask.long.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 3.--4. "BN,Buffer No." "0,1,2,3" bitfld.long 0x0 0.--2. "BT,Buffer Type" "?,1: Flat TX Message Buffer,?,?,?,?,?,?" line.long 0x4 "CFDTHLACC1,Channel 0 TX History List Access Registers1" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000." bitfld.long 0x4 16.--17. "TIFL,Transmit Information Label" "0,1,2,3" newline hexmask.long.word 0x4 0.--15. 1. "TID,Transmit ID" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x920)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x924)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x928)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x92C)++0x3 line.long 0x0 "CFDRMDF0_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB3,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB2,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB1,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB0,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x978)++0x3 line.long 0x0 "CFDRMDF1_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB7,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB6,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB5,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB4,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x9C4)++0x3 line.long 0x0 "CFDRMDF2_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB11,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB10,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB9,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB8,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA10)++0x3 line.long 0x0 "CFDRMDF3_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB15,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB14,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB13,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB12,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA5C)++0x3 line.long 0x0 "CFDRMDF4_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB19,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB18,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB17,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB16,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAA8)++0x3 line.long 0x0 "CFDRMDF5_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB23,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB22,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB21,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB20,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAF4)++0x3 line.long 0x0 "CFDRMDF6_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB27,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB26,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB25,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB24,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xB40)++0x3 line.long 0x0 "CFDRMDF7_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB31,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB30,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB29,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB28,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD20)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD24)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD28)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD2C)++0x3 line.long 0x0 "CFDRMDF8_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB35,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB34,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB33,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB32,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD78)++0x3 line.long 0x0 "CFDRMDF9_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB39,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB38,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB37,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB36,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xDC4)++0x3 line.long 0x0 "CFDRMDF10_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB43,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB42,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB41,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB40,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE10)++0x3 line.long 0x0 "CFDRMDF11_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB47,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB46,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB45,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB44,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE5C)++0x3 line.long 0x0 "CFDRMDF12_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB51,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB50,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB49,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB48,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEA8)++0x3 line.long 0x0 "CFDRMDF13_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB55,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB54,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB53,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB52,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEF4)++0x3 line.long 0x0 "CFDRMDF14_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB59,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB58,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB57,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB56,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xF40)++0x3 line.long 0x0 "CFDRMDF15_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB63,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB62,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB61,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB60,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1120)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1124)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1128)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x112C)++0x3 line.long 0x0 "CFDRMDF16_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB67,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB66,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB65,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB64,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1178)++0x3 line.long 0x0 "CFDRMDF17_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB71,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB70,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB69,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB68,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x11C4)++0x3 line.long 0x0 "CFDRMDF18_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB75,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB74,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB73,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB72,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1210)++0x3 line.long 0x0 "CFDRMDF19_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB79,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB78,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB77,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB76,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x125C)++0x3 line.long 0x0 "CFDRMDF20_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB83,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB82,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB81,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB80,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12A8)++0x3 line.long 0x0 "CFDRMDF21_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB87,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB86,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB85,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB84,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12F4)++0x3 line.long 0x0 "CFDRMDF22_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB91,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB90,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB89,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB88,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1340)++0x3 line.long 0x0 "CFDRMDF23_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB95,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB94,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB93,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB92,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1520)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1524)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1528)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x152C)++0x3 line.long 0x0 "CFDRMDF24_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB99,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB98,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB97,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB96,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1578)++0x3 line.long 0x0 "CFDRMDF25_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB103,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB102,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB101,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB100,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x15C4)++0x3 line.long 0x0 "CFDRMDF26_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB107,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB106,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB105,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB104,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1610)++0x3 line.long 0x0 "CFDRMDF27_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB111,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB110,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB109,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB108,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x165C)++0x3 line.long 0x0 "CFDRMDF28_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB115,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB114,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB113,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB112,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16A8)++0x3 line.long 0x0 "CFDRMDF29_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB119,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB118,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB117,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB116,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16F4)++0x3 line.long 0x0 "CFDRMDF30_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB123,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB122,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB121,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB120,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1740)++0x3 line.long 0x0 "CFDRMDF31_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB127,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB126,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB125,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB124,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1920)++0x3 line.long 0x0 "CFDRFIDE$1,RX FIFO Access ID Registers for Emulation" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1924)++0x3 line.long 0x0 "CFDRFPTRE$1,RX FIFO Access Pointer Registers for Emulation" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1928)++0x3 line.long 0x0 "CFDRFFDSTSE$1,RX FIFO Access CAN-FD Status Registers for Emulation" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x192C)++0x3 line.long 0x0 "CFDRFDF0E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1930)++0x3 line.long 0x0 "CFDRFDF1E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1934)++0x3 line.long 0x0 "CFDRFDF2E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB11,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB10,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB9,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB8,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1938)++0x3 line.long 0x0 "CFDRFDF3E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB15,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB14,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB13,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB12,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x193C)++0x3 line.long 0x0 "CFDRFDF4E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB19,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB18,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB17,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB16,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1940)++0x3 line.long 0x0 "CFDRFDF5E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB23,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB22,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB21,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB20,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1944)++0x3 line.long 0x0 "CFDRFDF6E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB27,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB26,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB25,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB24,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1948)++0x3 line.long 0x0 "CFDRFDF7E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB31,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB30,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB29,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB28,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x194C)++0x3 line.long 0x0 "CFDRFDF8E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB35,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB34,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB33,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB32,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1950)++0x3 line.long 0x0 "CFDRFDF9E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB39,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB38,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB37,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB36,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1954)++0x3 line.long 0x0 "CFDRFDF10E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB43,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB42,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB41,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB40,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1958)++0x3 line.long 0x0 "CFDRFDF11E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB47,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB46,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB45,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB44,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x195C)++0x3 line.long 0x0 "CFDRFDF12E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB51,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB50,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB49,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB48,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1960)++0x3 line.long 0x0 "CFDRFDF13E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB55,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB54,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB53,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB52,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1964)++0x3 line.long 0x0 "CFDRFDF14E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB59,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB58,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB57,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB56,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1968)++0x3 line.long 0x0 "CFDRFDF15E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB63,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB62,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB61,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB60,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x19B8++0xB line.long 0x0 "CFDCFIDE,Common FIFO Access ID Register for Emulation" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTRE,Common FIFO Access Pointer Register for Emulation" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTSE,Common FIFO Access CAN-FD Control/Status Register for Emulation" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x19C4)++0x3 line.long 0x0 "CFDCFDF$1E,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end tree.end tree "CANFD1_NS" base ad:0x50382000 group.long 0x0++0xF line.long 0x0 "CFDC0NCFG,Channel 0 Nominal Bitrate Configuration Register" hexmask.long.byte 0x0 25.--31. 1. "NTSEG2,Timing Segment 2" hexmask.long.byte 0x0 17.--24. 1. "NTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 10.--16. 1. "NSJW,Resynchronization Jump Width" hexmask.long.word 0x0 0.--9. 1. "NBRP,Channel Nominal Baud Rate Prescaler" line.long 0x4 "CFDC0CTR,Channel 0 Control Registers" bitfld.long 0x4 31. "ROM,Restricted Operation Mode" "0: Restricted Operation Mode disabled,1: Restricted Operation Mode enabled" bitfld.long 0x4 30. "BFT,Bit Flip Test" "0: First data bit of reception stream not inverted,1: First data bit of reception stream inverted" newline bitfld.long 0x4 29. "TRR,TEC/REC Reset" "0: Error counter normal operation,1: Error counter reset" bitfld.long 0x4 28. "TRH,TEC/REC Hold" "0: Error counter normal operation,1: Error counter frozen" newline bitfld.long 0x4 27. "TRWE,TEC/REC Write Enable" "0: Error Counter write disabled,1: Error Counter write enabled" bitfld.long 0x4 25.--26. "CTMS,Channel Test Mode Select" "0: Basic test mode,1: Listen-Only mode,?,?" newline bitfld.long 0x4 24. "CTME,Channel Test Mode Enable" "0: Channel Test Mode disabled,1: Channel Test Mode enabled" bitfld.long 0x4 23. "ERRD,Channel Error Display" "0: Only the 1st set of error codes displayed,1: Accumulated error codes displayed" newline bitfld.long 0x4 21.--22. "BOM,Channel Bus-Off Mode" "0: Normal mode (comply with ISO 11898-1),1: Entry to Halt Mode automatically at Bus-Off start,?,?" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "TDCVFIE,Transceiver Delay Compensation Violation Interrupt enable" "0: Transceiver Delay Compensation Violation..,1: Transceiver Delay Compensation Violation.." bitfld.long 0x4 18. "SOCOIE,Successful Occurrence Counter Overflow Interrupt enable" "0: Successful occurrence counter overflow interrupt..,1: Successful occurrence counter overflow interrupt.." newline bitfld.long 0x4 17. "EOCOIE,Error occurrence counter overflow Interrupt enable" "0: Error occurrence counter overflow Interrupt..,1: Error occurrence counter overflow Interrupt.." bitfld.long 0x4 16. "TAIE,Transmission abort Interrupt Enable" "0: TX abort Interrupt disabled,1: TX abort Interrupt enabled" newline bitfld.long 0x4 15. "ALIE,Arbitration Lost Interrupt Enable" "0: Arbitration Lost Interrupt disabled,1: Arbitration Lost Interrupt enabled" bitfld.long 0x4 14. "BLIE,Bus Lock Interrupt Enable" "0: Bus Lock Interrupt disabled,1: Bus Lock Interrupt enabled" newline bitfld.long 0x4 13. "OLIE,Overload Interrupt Enable" "0: Overload Interrupt disabled,1: Overload Interrupt enabled" bitfld.long 0x4 12. "BORIE,Bus-Off Recovery Interrupt Enable" "0: Bus-Off Recovery Interrupt disabled,1: Bus-Off Recovery Interrupt enabled" newline bitfld.long 0x4 11. "BOEIE,Bus-Off Entry Interrupt Enable" "0: Bus-Off Entry Interrupt disabled,1: Bus-Off Entry Interrupt enabled" bitfld.long 0x4 10. "EPIE,Error Passive Interrupt Enable" "0: Error Passive Interrupt disabled,1: Error Passive Interrupt enabled" newline bitfld.long 0x4 9. "EWIE,Error Warning Interrupt Enable" "0: Error Warning Interrupt disabled,1: Error Warning Interrupt enabled" bitfld.long 0x4 8. "BEIE,Bus Error Interrupt Enable" "0: Bus Error Interrupt disabled,1: Bus Error Interrupt enabled" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "RTBO,Return from Bus-Off" "0: Channel is not forced to return from Bus-Off,1: Channel is forced to return from Bus-Off" newline bitfld.long 0x4 2. "CSLPR,Channel Sleep Request" "0: Channel Sleep Request disabled,1: Channel Sleep Request enabled" bitfld.long 0x4 0.--1. "CHMDC,Channel Mode Control" "0: Channel Operation Mode request,1: Channel Reset request,?,?" line.long 0x8 "CFDC0STS,Channel 0 Status Registers" hexmask.long.byte 0x8 24.--31. 1. "TEC,Transmission Error Count" hexmask.long.byte 0x8 16.--23. 1. "REC,Reception Error Count" newline hexmask.long.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 8. "ESIF,Error State Indication Flag" "0: No CAN-FD message has been received with the ESI..,1: At least 1 CAN-FD message was received where the.." newline rbitfld.long 0x8 7. "COMSTS,Channel Communication Status" "0: Channel is not ready for communication,1: Channel is ready for communication" rbitfld.long 0x8 6. "RECSTS,Channel Receive Status" "0: Channel is not receiving,1: Channel is receiving" newline rbitfld.long 0x8 5. "TRMSTS,Channel Transmit Status" "0: Channel is not transmitting,1: Channel is transmitting" rbitfld.long 0x8 4. "BOSTS,Channel Bus-Off Status" "0: Channel not in Bus-Off state,1: Channel in Bus-Off state" newline rbitfld.long 0x8 3. "EPSTS,Channel Error Passive Status" "0: Channel not in Error Passive state.,1: Channel in Error Passive state." rbitfld.long 0x8 2. "CSLPSTS,Channel SLEEP Status" "0: Channel not in Sleep Mode,1: Channel in Sleep Mode" newline rbitfld.long 0x8 1. "CHLTSTS,Channel HALT Status" "0: Channel not in Halt Mode,1: Channel in Halt Mode" rbitfld.long 0x8 0. "CRSTSTS,Channel RESET Status" "0: Channel not in Reset Mode,1: Channel in Reset Mode" line.long 0xC "CFDC0ERFL,Channel 0 Error Flag Registers" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0xC 16.--30. 1. "CRCREG,CRC Register value" newline bitfld.long 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 14. "ADERR,Acknowledge Delimiter Error" "0: Channel Ack Del Error not detected,1: Channel Ack Del Error detected" newline bitfld.long 0xC 13. "B0ERR,Bit 0 Error" "0: Channel Bit 0 Error not detected,1: Channel Bit 0 Error detected" bitfld.long 0xC 12. "B1ERR,Bit 1 Error" "0: Channel Bit 1 Error not detected,1: Channel Bit 1 Error detected" newline bitfld.long 0xC 11. "CERR,CRC Error" "0: Channel CRC Error not detected,1: Channel CRC Error detected" bitfld.long 0xC 10. "AERR,Acknowledge Error" "0: Channel Ack Error not detected,1: Channel Ack Error detected" newline bitfld.long 0xC 9. "FERR,Form Error" "0: Channel Form Error not detected,1: Channel Form Error detected" bitfld.long 0xC 8. "SERR,Stuff Error" "0: Channel stuff Error not detected,?" newline bitfld.long 0xC 7. "ALF,Arbitration Lost Flag" "0: Channel Arbitration Lost not detected,1: Channel Arbitration Lost detected" bitfld.long 0xC 6. "BLF,Bus Lock Flag" "0: Channel Bus Lock not detected,1: Channel Bus Lock detected" newline bitfld.long 0xC 5. "OVLF,Overload Flag" "0: Channel Overload not detected,1: Channel Overload detected" bitfld.long 0xC 4. "BORF,Bus-Off Recovery Flag" "0: Channel Bus-Off Recovery not detected,1: Channel Bus-Off Recovery detected" newline bitfld.long 0xC 3. "BOEF,Bus-Off Entry Flag" "0: Channel Bus-Off Entry not detected,1: Channel Bus-Off Entry detected" bitfld.long 0xC 2. "EPF,Error Passive Flag" "0: Channel Error Passive not detected,1: Channel Error Passive detected" newline bitfld.long 0xC 1. "EWF,Error Warning Flag" "0: Channel Error Warning not detected,1: Channel Error Warning detected" bitfld.long 0xC 0. "BEF,Bus Error Flag" "0: Channel Bus Error not detected,1: Channel Bus Error detected" rgroup.long 0x10++0x3 line.long 0x0 "CFDGIPV,Global IP Version Register" hexmask.long.word 0x0 16.--31. 1. "PSI,Parameter Status Information" bitfld.long 0x0 15. "CPUBUS,CPU bus information" "0,1" newline hexmask.long.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 8.--9. "IPT,IP Type Release Number" "0,1,2,3" newline hexmask.long.byte 0x0 0.--7. 1. "IPV,IP Version Release Number" group.long 0x14++0x7 line.long 0x0 "CFDGCFG,Global Configuration Register" hexmask.long.word 0x0 16.--31. 1. "ITRCP,Interval Timer Reference Clock Prescaler" bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSSS,Timestamp Source Select" "0: Source clock for Timestamp counter is peripheral..,1: Source clock for Timestamp counter is bit time.." hexmask.long.byte 0x0 8.--11. 1. "TSP,Timestamp Prescaler" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "CMPOC,CAN-FD message Payload overflow configuration" "0: Message is rejected,1: Message payload is cut to fit to configured.." newline bitfld.long 0x0 4. "DCS,Data Link Controller Clock Select" "0: Internal clean clock,1: External Clock source connected to clk_xincan pin" bitfld.long 0x0 3. "MME,Mirror Mode Enable" "0: Mirror Mode disabled,1: Mirror Mode enabled" newline bitfld.long 0x0 2. "DRE,DLC Replacement Enable" "0: DLC replacement disabled,1: DLC replacement enabled" bitfld.long 0x0 1. "DCE,DLC Check Enable" "0: DLC check disabled,1: DLC check enabled" newline bitfld.long 0x0 0. "TPRI,Transmission Priority" "0: ID Priority,1: Message Buffer Number Priority" line.long 0x4 "CFDGCTR,Global Control Register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "TSWR,Timestamp Write" "0: Timestamp write disabled,1: Timestamp write enabled" newline bitfld.long 0x4 16. "TSRST,Timestamp Reset" "0: Timestamp not reset,1: Timestamp reset" hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 11. "CMPOFIE,CAN-FD message payload overflow Flag Interrupt enable" "0: CAN-FD message payload overflow Flag Interrupt..,1: CAN-FD message payload overflow Flag Interrupt.." bitfld.long 0x4 10. "THLEIE,TX History List Entry Lost Interrupt Enable" "0: TX History List Entry Lost Interrupt Disabled,1: TX History List Entry Lost Interrupt Enabled" newline bitfld.long 0x4 9. "MEIE,Message lost Error Interrupt Enable" "0: Message Lost Error Interrupt Disabled,1: Message Lost Error Interrupt Enabled" bitfld.long 0x4 8. "DEIE,DLC check Interrupt Enable" "0: DLC check Interrupt Disabled,1: DLC check Interrupt Enabled" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 2. "GSLPR,Global Sleep Request" "0: Global Sleep Request Disabled,1: Global Sleep Request Enabled" newline bitfld.long 0x4 0.--1. "GMDC,Global Mode Control" "0: ID Priority,1: Message Buffer Number Priority,?,?" rgroup.long 0x1C++0x3 line.long 0x0 "CFDGSTS,Global Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." bitfld.long 0x0 3. "GRAMINIT,Global RAM Initialisation" "0: RAM initialisation is finished,1: RAM initialisation ongoing" newline bitfld.long 0x0 2. "GSLPSTS,Global Sleep Status" "0: Not in Sleep Mode,1: In Sleep Mode" bitfld.long 0x0 1. "GHLTSTS,Global Halt Status" "0: Not in Halt Mode,1: In Halt Mode" newline bitfld.long 0x0 0. "GRSTSTS,Global Reset Status" "0: Not in Reset Mode,1: In Reset Mode" group.long 0x20++0x3 line.long 0x0 "CFDGERFL,Global Error Flag Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "EEF,ECC Error Flag" "0: ECC Error not detected during TX-SCAN,1: ECC Error detected during TX-SCAN" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "RXSFAIL,RX Scan Fail" "0: RX Scan fail not detected,1: RX Scan fail detected" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.long 0x0 5. "OTBMLTSTS,OTB FIFO Message Lost Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 3. "CMPOF,CAN-FD message payload overflow Flag" "0: CAN-FD message payload overflow not detected,1: CAN-FD message payload overflow detected" newline rbitfld.long 0x0 2. "THLES,TX History List Entry Lost Error Status" "0: TX History List Entry Lost Error not detected,1: TX History List Entry Lost Error detected" rbitfld.long 0x0 1. "MES,Message Lost Error Status" "0: Message lost Error not detected,1: Message lost Error detected" newline bitfld.long 0x0 0. "DEF,DLC Error Flag" "?,1: DLC Error detected" rgroup.long 0x24++0x3 line.long 0x0 "CFDGTSC,Global Timestamp Counter Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "TS,Timestamp Value" group.long 0x28++0x13 line.long 0x0 "CFDGAFLECTR,Global Acceptance Filter List Entry Control Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "AFLDAE,Acceptance Filter List Data Access Enable" "0: Acceptance Filter List Data access disabled,1: Acceptance Filter List Data access enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.long 0x4 "CFDGAFLCFG,Global Acceptance Filter List Configuration Register" hexmask.long.word 0x4 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." hexmask.long.byte 0x4 16.--21. 1. "RNC,Rule Number" newline hexmask.long.word 0x4 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x8 "CFDRMNB,RX Message Buffer Number Register" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x8 8.--10. "RMPLS,Reception Message Buffer Payload Data Size" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" newline bitfld.long 0x8 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x8 0.--5. 1. "NRXMB,Number of RX Message Buffers" line.long 0xC "CFDRMND,RX Message Buffer New Data Register t(t=0)" hexmask.long 0xC 0.--31. 1. "RMNSu,RX Message Buffer New Data Status" line.long 0x10 "CFDRMIEC,RX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x10 0.--31. 1. "RMIE,RX Message Buffer Interrupt Enable" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3C)++0x3 line.long 0x0 "CFDRFCC$1,RX FIFO Configuration / Control Registers %s" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "RFIGCV,RX FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" newline bitfld.long 0x0 12. "RFIM,RX FIFO Interrupt Mode" "0: Interrupt generated when RX FIFO counter reaches..,1: Interrupt generated at the end of every received.." bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 8.--10. "RFDC,RX FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4.--6. "RFPLS,Rx FIFO Payload Data Size configuration" "0: 8 Bytes,1: 12 Bytes,?,?,?,?,?,?" bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "RFIE,RX FIFO Interrupt Enable" "0: FIFO Interrupt generation disabled,1: FIFO Interrupt generation enabled" bitfld.long 0x0 0. "RFE,RX FIFO Enable" "0: FIFO disabled,1: FIFO enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CFDRFSTS$1,RX FIFO Status Registers %s" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x0 8.--13. 1. "RFMC,RX FIFO Message Count" newline hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 3. "RFIF,RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied,1: FIFO Full interrupt condition satisfied" newline bitfld.long 0x0 2. "RFMLT,RX FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 1. "RFFLL,RX FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 0. "RFEMP,RX FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4C)++0x3 line.long 0x0 "CFDRFPCTR$1,RX FIFO Pointer Control Registers %s" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RFPC,RX FIFO Pointer Control" repeat.end group.long 0x54++0xB line.long 0x0 "CFDCFCC,Common FIFO Configuration / Control Registers" hexmask.long.byte 0x0 24.--31. 1. "CFITT,Common FIFO Interval Transmission Time" bitfld.long 0x0 21.--23. "CFDC,Common FIFO Depth Configuration" "0: FIFO Depth = 0 Messages,1: FIFO Depth = 4 Messages,?,?,?,?,?,?" newline bitfld.long 0x0 18.--20. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--17. "CFTML,Common FIFO TX Message Buffer Link" "0,1,2,3" newline bitfld.long 0x0 13.--15. "CFIGCV,Common FIFO Interrupt Generation Counter Value" "0: Interrupt generated when FIFO is 1/8th Full,1: Interrupt generated when FIFO is 1/4th Full,?,?,?,?,?,?" bitfld.long 0x0 12. "CFIM,Common FIFO Interrupt Mode" "0,1" newline bitfld.long 0x0 11. "CFITR,Common FIFO Interval Timer Resolution" "0: Reference Clock Period x1,1: Reference Clock Period x10" bitfld.long 0x0 10. "CFITSS,Common FIFO Interval Timer Source Select" "0: Reference Clock (x1 / x10 period),1: Bit Time Clock of related channel (FIFO is.." newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8. "CFM,Common FIFO Mode" "0: RX FIFO Mode,1: TX FIFO Mode" newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4.--6. "CFPLS,Common FIFO Payload Data size configuration" "0: 8 Bytes,?,?,?,?,?,?,?" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "CFTXIE,Common FIFO TX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame TX,1: FIFO Interrupt generation enabled for Frame TX" newline bitfld.long 0x0 1. "CFRXIE,Common FIFO RX Interrupt Enable" "0: FIFO Interrupt generation disabled for Frame RX,1: FIFO Interrupt generation enabled for Frame RX" bitfld.long 0x0 0. "CFE,Common FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDCFSTS,Common FIFO Status Registers" hexmask.long.tbyte 0x4 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." hexmask.long.byte 0x4 8.--13. 1. "CFMC,Common FIFO Message Count" newline bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 4. "CFTXIF,Common TX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." newline bitfld.long 0x4 3. "CFRXIF,Common RX FIFO Interrupt Flag" "0: FIFO Interrupt condition not satisfied after..,1: FIFO Interrupt condition satisfied after Frame.." bitfld.long 0x4 2. "CFMLT,Common FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" newline rbitfld.long 0x4 1. "CFFLL,Common FIFO Full" "0: FIFO Not Full,1: FIFO Full" rbitfld.long 0x4 0. "CFEMP,Common FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDCFPCTR,Common FIFO Pointer Control Registers" hexmask.long.tbyte 0x8 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x8 0.--7. 1. "CFPC,Common FIFO Pointer Control" rgroup.long 0x60++0xF line.long 0x0 "CFDFESTS,FIFO Empty Status Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x0 8. "CFEMP,Common FIF0 Empty Status" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 1. "RF1EMP,RX FIF0 1 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x0 0. "RF0EMP,RX FIF0 0 Empty Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x4 "CFDFFSTS,FIFO Full Status Register" hexmask.long.tbyte 0x4 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x4 8. "CFFLL,Common FIF0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x4 1. "RF1FLL,RX FIF0 1 Full Status" "0: FIFO Not Empty,1: FIFO Empty" newline bitfld.long 0x4 0. "RF0FLL,RX FIF0 0 Full Status" "0: FIFO Not Empty,1: FIFO Empty" line.long 0x8 "CFDFMSTS,FIFO Message Lost Status Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x8 8. "CFMLT,Common FIFO Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "RF1MLT,RX FIFO 1 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" newline bitfld.long 0x8 0. "RF0MLT,RX FIFO 0 Msg Lost Status" "0: Corresponding FIFO Msg Lost flag not set,1: Corresponding FIFO Msg Lost flag set" line.long 0xC "CFDRFISTS,RX FIFO Interrupt Flag Status Register" hexmask.long 0xC 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000." bitfld.long 0xC 1. "RF1IF,RX FIFO[1] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" newline bitfld.long 0xC 0. "RF0IF,RX FIFO[0] Interrupt Flag Status" "0: Corresponding RX FIFO interrupt flag not set,1: Corresponding RX FIFO interrupt flag set" repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x70)++0x0 line.byte 0x0 "CFDTMC$1,TX Message Buffer Control Registers %s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TMOM,TX Message Buffer One-shot Mode" "0: TX Message Buffer not configured in one-shot mode,1: TX Message Buffer configured in one-shot mode" newline bitfld.byte 0x0 1. "TMTAR,TX Message Buffer Transmission abort Request" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." bitfld.byte 0x0 0. "TMTR,TX Message Buffer Transmission Request" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x74)++0x0 line.byte 0x0 "CFDTMSTS$1,TX Message Buffer Status Registers %s" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "TMTARM,TX Message Buffer Transmission abort Request Mirrored" "0: TX Message Buffer transmission request abort not..,1: TX Message Buffer transmission request abort.." newline rbitfld.byte 0x0 3. "TMTRM,TX Message Buffer Transmission Request Mirrored" "0: TX Message Buffer Transmission not requested,1: TX Message Buffer Transmission requested" bitfld.byte 0x0 1.--2. "TMTRF,TX Message Buffer Transmission Result Flag" "0: No Result,1: Transmission aborted from the TX MB,?,?" newline rbitfld.byte 0x0 0. "TMTSTS,TX Message Buffer Transmission Status" "0: No transmission ongoing,1: Transmission ongoing" repeat.end rgroup.long 0x78++0xF line.long 0x0 "CFDTMTRSTS,TX Message Buffer Transmission Request Status Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "CFDTMTRSTS,TX Message Buffer Transmission Request Status" line.long 0x4 "CFDTMTARSTS,TX Message Buffer Transmission Abort Request Status Register" hexmask.long 0x4 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x4 0.--3. 1. "CFDTMTARSTS,TX Message Buffer Transmission abort Request Status" line.long 0x8 "CFDTMTCSTS,TX Message Buffer Transmission Completion Status Register" hexmask.long 0x8 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0x8 0.--3. 1. "CFDTMTCSTS,TX Message Buffer Transmission Completion Status" line.long 0xC "CFDTMTASTS,TX Message Buffer Transmission Abort Status Register" hexmask.long 0xC 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000." hexmask.long.byte 0xC 0.--3. 1. "CFDTMTASTS,TX Message Buffer Transmission abort Status" group.long 0x88++0xB line.long 0x0 "CFDTMIEC,TX Message Buffer Interrupt Enable Configuration Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "TMIE,TX Message Buffer Interrupt Enable" line.long 0x4 "CFDTXQCC,TX Queue Configuration / Control Registers" hexmask.long.tbyte 0x4 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x4 8.--9. "TXQDC,TX Queue Depth Configuration" "0: 0 messages,1: Reserved,?,?" newline bitfld.long 0x4 7. "TXQIM,TX Queue Interrupt Mode" "0: when the last message is successfully transmitted,1: At every successful transmission" bitfld.long 0x4 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 5. "TXQTXIE,TX Queue TX Interrupt Enable" "0: TX Queue TX Interrupt disabled,1: TX Queue TX Interrupt enabled" hexmask.long.byte 0x4 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 0. "TXQE,TX Queue Enable" "0: TX Queue disabled,1: TX Queue enabled" line.long 0x8 "CFDTXQSTS,TX Queue Status Registers0" hexmask.long.tbyte 0x8 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." rbitfld.long 0x8 8.--10. "TXQMC,TX Queue Message Count" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x8 2. "TXQTXIF,TX Queue TX Interrupt Flag" "0: TX Queue interrupt condition not satisfied after..,1: TX Queue interrupt condition satisfied after.." newline rbitfld.long 0x8 1. "TXQFLL,TX Queue Full" "0: TX Queue Not Full,1: TX Queue Full" rbitfld.long 0x8 0. "TXQEMP,TX Queue Empty" "0: TX Queue Not Empty,1: TX Queue Empty" wgroup.long 0x94++0x3 line.long 0x0 "CFDTXQPCTR,TX Queue Pointer Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TXQPC,TX Queue Pointer Control" group.long 0x98++0x7 line.long 0x0 "CFDTHLCC,TX History List Configuration / Control Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "THLDTE,TX History List Dedicated TX Enable" "0: TX FIFO + TX Queue (TX FIFO Only RL version),1: Flat TX MB + TX FIFO + TX Queue (Flat TX MB + TX.." newline bitfld.long 0x0 9. "THLIM,TX History List Interrupt Mode" "0: Interrupt generated if TX History List level..,1: Interrupt generated for every successfully.." bitfld.long 0x0 8. "THLIE,TX History List Interrupt Enable" "0: TX History List Interrupt disabled,1: TX History List Interrupt enabled" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "THLE,TX History List Enable" "0: TX History List disabled,1: TX History List enabled" line.long 0x4 "CFDTHLSTS,TX History List Status Register" hexmask.long.tbyte 0x4 12.--31. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." hexmask.long.byte 0x4 8.--11. 1. "THLMC,TX History List Message Count" newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "THLIF,TX History List Interrupt Flag" "0: TX History List Interrupt condition not satisfied,1: TX History List Interrupt condition satisfied" newline bitfld.long 0x4 2. "THLELT,TX History List Entry Lost" "0: No Entry Lost in TX History List,1: TX History List Entry Lost" rbitfld.long 0x4 1. "THLFLL,TX History List Full" "0: TX History List Not Full,1: TX History List Full" newline rbitfld.long 0x4 0. "THLEMP,TX History List Empty" "0: TX History List Not Empty,1: TX History List Empty" wgroup.long 0xA0++0x3 line.long 0x0 "CFDTHLPCTR,TX History List Pointer Control Registers" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "THLPC,TX History List Pointer Control" rgroup.long 0xA4++0x3 line.long 0x0 "CFDGTINTSTS,Global TX Interrupt Status Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." bitfld.long 0x0 4. "THIF,TX History List Interrupt Channel" "0: Channel n TX History List Interrupt flag not set,1: Channel n TX History List Interrupt flag set" newline bitfld.long 0x0 3. "CFTIF,COM FIFO TX/GW Mode Interrupt Flag Channel" "0: Channel n COM FIFO TX/GW mode Interrupt flag not..,1: Channel n COM FIFO TX/GW mode Interrupt flag set" bitfld.long 0x0 2. "TQIF,TX Queue Interrupt Flag Channel" "0: Channel n TX Queue Interrupt flag not set,1: Channel n TX Queue Interrupt flag set" newline bitfld.long 0x0 1. "TAIF,TX Abort Interrupt Flag Channel" "0: Channel n TX abort Interrupt flag not set,1: Channel n TX abort Interrupt flag set" bitfld.long 0x0 0. "TSIF,TX Successful Interrupt Flag Channel" "0: Channel n TX Successful completion Interrupt..,1: Channel n TX Successful completion Interrupt.." group.long 0xA8++0xB line.long 0x0 "CFDGTSTCFG,Global Test Configuration Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x0 16.--19. 1. "RTMPS,RAM Test Mode Page Select" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "CFDGTSTCTR,Global Test Control Register" hexmask.long 0x4 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x4 2. "RTME,RAM Test Mode Enable" "0: RAM Test Mode disabled,1: RAM Test Mode enabled" newline bitfld.long 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.long 0x8 "CFDGFDCFG,Global FD configuration register" hexmask.long.tbyte 0x8 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x8 8.--9. "TSCCFG,Timestamp capture configuration" "0: Timestamp capture at the sample point of SOF..,1: Timestamp capture at frame valid indication,?,?" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "RPED,RES bit Protocol exception disable" "0: Protocol exception event detection enabled,1: Protocol exception event detection disabled" wgroup.long 0xB8++0x3 line.long 0x0 "CFDGLOCKK,Global Lock Key Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "LOCK,Lock Key" group.long 0xBC++0x1F line.long 0x0 "CFDGLOTB,Global OTB FIFO Configuration / Status Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." rbitfld.long 0x0 11.--12. "OTBMC,OTB FIFO Message Count" "0,1,2,3" newline bitfld.long 0x0 10. "OTBMLT,OTB FIFO Message Lost" "0: No Message Lost in FIFO,1: FIFO Message Lost" rbitfld.long 0x0 9. "OTBFLL,OTB FIFO Full" "0: FIFO Not Full,1: FIFO Full" newline rbitfld.long 0x0 8. "OTBEMP,OTB FIFO Empty" "0: FIFO Not Empty,1: FIFO Empty" hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 0. "OTBFE,OTB FIFO Enable" "0: FIFO disabled,1: FIFO enabled" line.long 0x4 "CFDGAFLIGNENT,Global AFL Ignore Entry Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline hexmask.long.byte 0x4 0.--4. 1. "IRN,Ignore Rule Number" line.long 0x8 "CFDGAFLIGNCTR,Global AFL Ignore Control Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "IREN,Ignore Rule Enable" "0: AFL rule number does not ignore,1: AFL rule number ignores" line.long 0xC "CFDCDTCT,DMA Transfer Control Register" hexmask.long.tbyte 0xC 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0xC 8. "CFDMAE,DMA Transfer Enable for Common FIFO 0 of channel 0" "0: DMA Transfer Request disabled for channel n,1: DMA Transfer Request enabled for channel n" newline hexmask.long.byte 0xC 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0xC 1. "RFDMAE1,DMA Transfer Enable for RXFIFO 1" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" newline bitfld.long 0xC 0. "RFDMAE0,DMA Transfer Enable for RXFIFO 0" "0: DMA Transfer Request disabled,1: DMA Transfer Request enabled" line.long 0x10 "CFDCDTSTS,DMA Transfer Status Register" hexmask.long.tbyte 0x10 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." rbitfld.long 0x10 8. "CFDMASTS,DMA Transfer Status only for Common FIFO 0 of channel 0" "0: DMA transfer stopped,1: DMA transfer ongoing" newline hexmask.long.byte 0x10 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." rbitfld.long 0x10 1. "RFDMASTS1,DMA Transfer Status for RX FIFO 1" "0: DMA transfer stopped,1: DMA transfer ongoing" newline rbitfld.long 0x10 0. "RFDMASTS0,DMA Transfer Status for RX FIFO 0" "0: DMA transfer stopped,1: DMA transfer ongoing" line.long 0x14 "CFDGPFLECTR,Global Pretended Network Filter List Entry control Register" hexmask.long.tbyte 0x14 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x14 8. "PFLDAE,Pretended Network Filter List Data Access Enable" "0: Pretended Network Filter List Data access disabled,1: Pretended Network Filter List Data access enabled" newline hexmask.long.byte 0x14 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.long 0x18 "CFDGPFLCFG,Global Pretended Network Filter List configuration Register" hexmask.long.byte 0x18 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x18 24.--25. "RNC,Rule Number" "0,1,2,3" newline hexmask.long.byte 0x18 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.word 0x18 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x1C "CFDGRSTC,Global Reset Control Register" hexmask.long.word 0x1C 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x1C 8.--15. 1. "KEY,Key code" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "SRST,SW reset" "0: normal state,1: SW reset state" group.long 0x100++0x13 line.long 0x0 "CFDC0DCFG,Channel 0 Data Bitrate Configuration Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 24.--27. 1. "DSJW,Resynchronization Jump Width" newline hexmask.long.byte 0x0 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 16.--19. 1. "DTSEG2,Timing Segment 2" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DTSEG1,Timing Segment 1" newline hexmask.long.byte 0x0 0.--7. 1. "DBRP,Channel Data Baud Rate Prescaler" line.long 0x4 "CFDC0FDCFG,Channel 0 CAN-FD Configuration Register" bitfld.long 0x4 31. "CFDTE,CAN-FD Tolerance enable" "0: CAN-FD Tolerance mode disabled.,1: CAN-FD Tolerance mode enabled" bitfld.long 0x4 30. "CLOE,Classical CAN only enable" "0: Classical only mode disabled,1: Classical only mode enabled" newline bitfld.long 0x4 29. "REFE,RX edge filter enable" "0: RX edge filter disabled,1: RX edge filter enabled" bitfld.long 0x4 28. "FDOE,FD only enable" "0: FD only mode disabled,1: FD only mode enabled" newline hexmask.long.byte 0x4 24.--27. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 16.--23. 1. "TDCO,Transceiver Delay Compensation Offset" newline bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 12.--13. "RPNMD,Return Pretended Network Filter Mode" "0: Return to Acceptance Filter Mode,1: Return to Pretended Network Filter ID only and..,?,?" newline bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 10. "ESIC,Error State Indication Configuration" "0: The ESI bit in the frame will be representing..,1: The ESI bit in the frame will be representing.." newline bitfld.long 0x4 9. "TDCE,Transceiver Delay Compensation Enable" "0: Transceiver Delay Compensation disabled,1: Transceiver Delay Compensation enabled" bitfld.long 0x4 8. "TDCOC,Transceiver Delay Compensation Offset Configuration" "0: Measured + offset,1: offset only" newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x4 0.--2. "EOCCFG,Error Occurrence Counter Configuration" "0: All Transmitter or Receiver CAN Frames,1: All Transmitter CAN Frames,?,?,?,?,?,?" line.long 0x8 "CFDC0FDCTR,Channel 0 CAN-FD Control Register" hexmask.long.byte 0x8 24.--31. 1. "KEY,Key code" hexmask.long.byte 0x8 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 16.--17. "PNMDC,Pretended Network Filter Mode Control" "0,1,2,3" hexmask.long.word 0x8 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x8 1. "SOCCLR,Successful Occurrence Counter Clear" "0: No Successful Occurrence Counter clear,1: Clear Successful Occurrence Counter" bitfld.long 0x8 0. "EOCCLR,Error Occurrence Counter Clear" "0: No Error Occurrence Counter clear,1: Clear Error Occurrence Counter" line.long 0xC "CFDC0FDSTS,Channel 0 CAN-FD Status Register" hexmask.long.byte 0xC 24.--31. 1. "SOC,Successful occurrence counter register" hexmask.long.byte 0xC 16.--23. 1. "EOC,Error occurrence counter register" newline bitfld.long 0xC 15. "TDCVF,Transceiver Delay Compensation Violation Flag" "0: Transceiver Delay Compensation Violation has not..,1: Transceiver Delay Compensation Violation has.." bitfld.long 0xC 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.long 0xC 12.--13. "PNSTS,Pretended Network Filter State" "0: Acceptance Filter Mode,1: Pretended Network Filter Mode,?,?" bitfld.long 0xC 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0xC 9. "SOCO,Successful occurrence counter overflow" "0: Successful occurrence counter has not overflowed,1: Successful occurrence counter has overflowed" bitfld.long 0xC 8. "EOCO,Error occurrence counter overflow" "0: Error occurrence counter has not overflowed,1: Error occurrence counter has overflowed" newline hexmask.long.byte 0xC 0.--7. 1. "TDCR,Transceiver Delay Compensation Result" line.long 0x10 "CFDC0FDCRC,Channel 0 CAN-FD CRC Register" hexmask.long.byte 0x10 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x10 24.--27. 1. "SCNT,Stuff bit count" newline bitfld.long 0x10 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x10 0.--20. 1. "CRCREG,CRC Register value" repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x120)++0x3 line.long 0x0 "CFDGAFLID$1,Global Acceptance Filter List ID Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDE,Global Acceptance Filter List Entry IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GAFLRTR,Global Acceptance Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GAFLLB,Global Acceptance Filter List Entry Loopback Configuration" "0: Global Acceptance Filter List entry ID for..,1: Global Acceptance Filter List entry ID for.." hexmask.long 0x0 0.--28. 1. "GAFLID,Global Acceptance Filter List Entry ID Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x124)++0x3 line.long 0x0 "CFDGAFLM$1,Global Acceptance Filter List Mask Registers r = [1...10]h" bitfld.long 0x0 31. "GAFLIDEM,Global Acceptance Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GAFLRTRM,Global Acceptance Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GAFLIFL1,Global Acceptance Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GAFLIDM,Global Acceptance Filter List ID Mask Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x128)++0x3 line.long 0x0 "CFDGAFLP0$1,Global Acceptance Filter List Pointer 0 Registers r = [1...10]h" hexmask.long.word 0x0 16.--31. 1. "GAFLPTR,Global Acceptance Filter List Pointer Field" bitfld.long 0x0 15. "GAFLRMV,Global Acceptance Filter List RX Message Buffer Valid" "0: Global Acceptance Filter List Single Message..,1: Global Acceptance Filter List Single Message.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GAFLRMDP,Global Acceptance Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GAFLIFL0,Global Acceptance Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GAFLDLC,Global Acceptance Filter List DLC Field" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x12C)++0x3 line.long 0x0 "CFDGAFLP1$1,Global Acceptance Filter List Pointer 1 Registers r = [1...10]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GAFLFDP8,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[8])" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GAFLFDP1,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[1])" "0,1" newline bitfld.long 0x0 0. "GAFLFDP0,Global Acceptance Filter List FIFO Direction Pointer (GAFLFDP[0])" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x220)++0x3 line.long 0x0 "CFDGPFLID$1,Global Pretended Network Filter List ID Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDE,Global Pretended Network Filter List IDE Field" "0: Standard Identifier of Rule entry ID is valid..,1: Extended Identifier of Rule entry ID is valid.." bitfld.long 0x0 30. "GPFLRTR,Global Pretended Network Filter List Entry RTR Field" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "GPFLLB,Global Pretended Network Filter List Entry Loopback Configuration" "0: Global Pretended Network Filter List entry ID..,1: Global Pretended Network Filter List entry ID.." hexmask.long 0x0 0.--28. 1. "GPFLID,Global Pretended Network Filter List ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x224)++0x3 line.long 0x0 "CFDGPFLM$1,Global Pretended Network Filter List MASK Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLIDEM,Global Pretended Network Filter List IDE Mask" "0: IDE bit is not considered for ID matching,1: IDE bit is considered for ID matching" bitfld.long 0x0 30. "GPFLRTRM,Global Pretended Network Filter List Entry RTR Mask" "0: RTR bit is not considered for ID matching,1: RTR bit is considered for ID matching" newline bitfld.long 0x0 29. "GPFLIFL1,Global Pretended Network Filter List Information Label 1" "0,1" hexmask.long 0x0 0.--28. 1. "GPFLIDM,Global Pretended Network Filter List ID Mask Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x228)++0x3 line.long 0x0 "CFDGPFLP0$1,Global Pretended Network Filter List Pointer 0 Registers s = [1...2]h" hexmask.long.word 0x0 16.--31. 1. "GPFLPTR,Global Pretended Network Filter List Pointer Field" bitfld.long 0x0 15. "GPFLRMV,Global Pretended Network Filter List RX Message Buffer Valid" "0: Global Pretended Network Filter List Single..,1: Global Pretended Network Filter List Single.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "GPFLRMDP,Global Pretended Network Filter List RX Message Buffer Direction Pointer" newline bitfld.long 0x0 7. "GPFLIFL0,Global Pretended Network Filter List Information Label 0" "0,1" bitfld.long 0x0 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 0.--3. 1. "GPFLDLC,Global Pretended Network Filter List DLC Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x22C)++0x3 line.long 0x0 "CFDGPFLP1$1,Global Pretended Network Filter List Pointer 1 Registers s = [1...2]h" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "GPFLFDP8,Global Pretended Network Filter List FIFO Direction Pointer [8]" "0,1" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "GPFLFDP1,Global Pretended Network Filter List FIFO Direction Pointer [1]" "0,1" newline bitfld.long 0x0 0. "GPFLFDP0,Global Pretended Network Filter List FIFO Direction Pointer [0]" "0,1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x230)++0x3 line.long 0x0 "CFDGPFLPT$1,Global Pretended Network Filter List Filter Type Registers s = [1...2]h" bitfld.long 0x0 31. "GPFLANDOR,Global Pretended Network filter conditions of the filters 0 and 1" "0: Both of filters 0 and 1 are successful.,1: One of the filter 0 or 1 is successful." bitfld.long 0x0 30. "GPFLRANG0,Global Pretended Network filter comparison conditions of the filter0" "0: payload data match filter,1: upper / lower filter" newline bitfld.long 0x0 29. "GPFLOUT0,Global Pretended Network filter conditions of upper / lower filter of the filter0" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." hexmask.long.word 0x0 20.--28. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline hexmask.long.byte 0x0 16.--19. 1. "GPFLOFFSET0,Global Pretended Network filter offset value of the filter0" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "GPFLRANG1,Global Pretended Network filter comparison conditions of the filter1" "0: payload data match filter,1: upper / lower filter" bitfld.long 0x0 13. "GPFLOUT1,Global Pretended Network filter conditions of upper / lower filter of the filter1" "0: Within the range of upper limit and lower limit,1: Outside of the range of upper limit and lower.." newline hexmask.long.word 0x0 4.--12. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 0.--3. 1. "GPFLOFFSET1,Global Pretended Network filter offset value of the filter1" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x234)++0x3 line.long 0x0 "CFDGPFLPD0$1,Global Pretended Network Filter List Payload Data 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x238)++0x3 line.long 0x0 "CFDGPFLPM0$1,Global Pretended Network Filter List Payload Mask 0 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x23C)++0x3 line.long 0x0 "CFDGPFLPD1$1,Global Pretended Network Filter List Payload Data 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FDATA,Pretended Network Filter List Filter data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x24) group.long ($2+0x240)++0x3 line.long 0x0 "CFDGPFLPM1$1,Global Pretended Network Filter List Payload Mask 1 Registers s = [1...2]h" hexmask.long 0x0 0.--31. 1. "FMASK,Pretended Network Filter List Filter data mask field" repeat.end repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "CFDRPGACC$1,RAM Test Page Access Registers" hexmask.long 0x0 0.--31. 1. "RDTA,RAM Data Test Access" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x520)++0x3 line.long 0x0 "CFDRFID$1,RX FIFO Access ID Registers" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x524)++0x3 line.long 0x0 "CFDRFPTR$1,RX FIFO Access Pointer Register" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x528)++0x3 line.long 0x0 "CFDRFFDSTS$1,RX FIFO Access CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x52C)++0x3 line.long 0x0 "CFDRFDF0$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x578)++0x3 line.long 0x0 "CFDRFDF1$1,RX FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x5B8++0x4B line.long 0x0 "CFDCFID,Common FIFO Access ID Registers" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTR,Common FIFO Access Pointer Registers" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTS,Common FIFO Access CAN-FD Control/Status Register" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" line.long 0xC "CFDCFDF0,Common FIFO Access Data Field p Registers" hexmask.long.byte 0xC 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0xC 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0xC 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0xC 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x10 "CFDCFDF1,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x10 24.--31. 1. "CFDB7,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x10 16.--23. 1. "CFDB6,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x10 8.--15. 1. "CFDB5,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x10 0.--7. 1. "CFDB4,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x14 "CFDCFDF2,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x14 24.--31. 1. "CFDB11,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x14 16.--23. 1. "CFDB10,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x14 8.--15. 1. "CFDB9,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x14 0.--7. 1. "CFDB8,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x18 "CFDCFDF3,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x18 24.--31. 1. "CFDB15,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x18 16.--23. 1. "CFDB14,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x18 8.--15. 1. "CFDB13,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x18 0.--7. 1. "CFDB12,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x1C "CFDCFDF4,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x1C 24.--31. 1. "CFDB19,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x1C 16.--23. 1. "CFDB18,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x1C 8.--15. 1. "CFDB17,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x1C 0.--7. 1. "CFDB16,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x20 "CFDCFDF5,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x20 24.--31. 1. "CFDB23,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x20 16.--23. 1. "CFDB22,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x20 8.--15. 1. "CFDB21,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x20 0.--7. 1. "CFDB20,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x24 "CFDCFDF6,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x24 24.--31. 1. "CFDB27,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x24 16.--23. 1. "CFDB26,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x24 8.--15. 1. "CFDB25,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x24 0.--7. 1. "CFDB24,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x28 "CFDCFDF7,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x28 24.--31. 1. "CFDB31,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x28 16.--23. 1. "CFDB30,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x28 8.--15. 1. "CFDB29,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x28 0.--7. 1. "CFDB28,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x2C "CFDCFDF8,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x2C 24.--31. 1. "CFDB35,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x2C 16.--23. 1. "CFDB34,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x2C 8.--15. 1. "CFDB33,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x2C 0.--7. 1. "CFDB32,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x30 "CFDCFDF9,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x30 24.--31. 1. "CFDB39,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x30 16.--23. 1. "CFDB38,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x30 8.--15. 1. "CFDB37,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x30 0.--7. 1. "CFDB36,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x34 "CFDCFDF10,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x34 24.--31. 1. "CFDB43,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x34 16.--23. 1. "CFDB42,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x34 8.--15. 1. "CFDB41,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x34 0.--7. 1. "CFDB40,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x38 "CFDCFDF11,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x38 24.--31. 1. "CFDB47,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x38 16.--23. 1. "CFDB46,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x38 8.--15. 1. "CFDB45,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x38 0.--7. 1. "CFDB44,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x3C "CFDCFDF12,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x3C 24.--31. 1. "CFDB51,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x3C 16.--23. 1. "CFDB50,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x3C 8.--15. 1. "CFDB49,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x3C 0.--7. 1. "CFDB48,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x40 "CFDCFDF13,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x40 24.--31. 1. "CFDB55,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x40 16.--23. 1. "CFDB54,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x40 8.--15. 1. "CFDB53,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x40 0.--7. 1. "CFDB52,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x44 "CFDCFDF14,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x44 24.--31. 1. "CFDB59,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x44 16.--23. 1. "CFDB58,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x44 8.--15. 1. "CFDB57,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x44 0.--7. 1. "CFDB56,Common FIFO Buffer Data Byte ((p*q)+(q-4))" line.long 0x48 "CFDCFDF15,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x48 24.--31. 1. "CFDB63,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x48 16.--23. 1. "CFDB62,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x48 8.--15. 1. "CFDB61,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x48 0.--7. 1. "CFDB60,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x604)++0x3 line.long 0x0 "CFDTMID$1,TX Message Buffer ID Registers" bitfld.long 0x0 31. "TMIDE,TX Message Buffer IDE Bit" "0: STD-ID will be transmitted,1: EXT-ID will be transmitted" bitfld.long 0x0 30. "TMRTR,TX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,Tx History List Entry" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "TMID,TX Message Buffer ID Field" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x608)++0x3 line.long 0x0 "CFDTMPTR$1,TX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "TMDLC,TX Message Buffer DLC Field" hexmask.long 0x0 0.--27. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4C) group.long ($2+0x60C)++0x3 line.long 0x0 "CFDTMFDCTR$1,TX Message Buffer CAN-FD Control Register" hexmask.long.word 0x0 16.--31. 1. "TMPTR,TX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "TMIFL,TX Message Buffer Information Label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "TMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "TMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "TMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x610)++0x3 line.long 0x0 "CFDTMDF0_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB3,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB2,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB1,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB0,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x65C)++0x3 line.long 0x0 "CFDTMDF1_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB7,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB6,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB5,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB4,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6A8)++0x3 line.long 0x0 "CFDTMDF2_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB11,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB10,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB9,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB8,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6F4)++0x3 line.long 0x0 "CFDTMDF3_$1,TX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "TMDB15,TX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "TMDB14,TX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "TMDB13,TX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "TMDB12,TX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end rgroup.long 0x740++0x7 line.long 0x0 "CFDTHLACC0,Channel 0 TX History List Access Registers0" hexmask.long.word 0x0 16.--31. 1. "TMTS,Transmit Timestamp" hexmask.long.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 3.--4. "BN,Buffer No." "0,1,2,3" bitfld.long 0x0 0.--2. "BT,Buffer Type" "?,1: Flat TX Message Buffer,?,?,?,?,?,?" line.long 0x4 "CFDTHLACC1,Channel 0 TX History List Access Registers1" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000." bitfld.long 0x4 16.--17. "TIFL,Transmit Information Label" "0,1,2,3" newline hexmask.long.word 0x4 0.--15. 1. "TID,Transmit ID" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x920)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x924)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x928)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x92C)++0x3 line.long 0x0 "CFDRMDF0_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB3,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB2,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB1,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB0,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x978)++0x3 line.long 0x0 "CFDRMDF1_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB7,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB6,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB5,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB4,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x9C4)++0x3 line.long 0x0 "CFDRMDF2_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB11,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB10,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB9,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB8,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA10)++0x3 line.long 0x0 "CFDRMDF3_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB15,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB14,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB13,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB12,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xA5C)++0x3 line.long 0x0 "CFDRMDF4_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB19,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB18,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB17,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB16,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAA8)++0x3 line.long 0x0 "CFDRMDF5_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB23,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB22,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB21,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB20,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xAF4)++0x3 line.long 0x0 "CFDRMDF6_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB27,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB26,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB25,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB24,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xB40)++0x3 line.long 0x0 "CFDRMDF7_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB31,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB30,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB29,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB28,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD20)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD24)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0xD28)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD2C)++0x3 line.long 0x0 "CFDRMDF8_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB35,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB34,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB33,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB32,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD78)++0x3 line.long 0x0 "CFDRMDF9_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB39,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB38,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB37,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB36,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xDC4)++0x3 line.long 0x0 "CFDRMDF10_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB43,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB42,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB41,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB40,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE10)++0x3 line.long 0x0 "CFDRMDF11_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB47,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB46,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB45,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB44,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xE5C)++0x3 line.long 0x0 "CFDRMDF12_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB51,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB50,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB49,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB48,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEA8)++0x3 line.long 0x0 "CFDRMDF13_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB55,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB54,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB53,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB52,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xEF4)++0x3 line.long 0x0 "CFDRMDF14_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB59,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB58,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB57,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB56,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xF40)++0x3 line.long 0x0 "CFDRMDF15_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB63,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB62,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB61,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB60,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1120)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1124)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1128)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x112C)++0x3 line.long 0x0 "CFDRMDF16_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB67,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB66,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB65,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB64,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1178)++0x3 line.long 0x0 "CFDRMDF17_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB71,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB70,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB69,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB68,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x11C4)++0x3 line.long 0x0 "CFDRMDF18_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB75,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB74,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB73,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB72,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1210)++0x3 line.long 0x0 "CFDRMDF19_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB79,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB78,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB77,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB76,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x125C)++0x3 line.long 0x0 "CFDRMDF20_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB83,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB82,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB81,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB80,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12A8)++0x3 line.long 0x0 "CFDRMDF21_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB87,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB86,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB85,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB84,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x12F4)++0x3 line.long 0x0 "CFDRMDF22_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB91,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB90,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB89,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB88,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1340)++0x3 line.long 0x0 "CFDRMDF23_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB95,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB94,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB93,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB92,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1520)++0x3 line.long 0x0 "CFDRMID$1,RX Message Buffer ID Registers" bitfld.long 0x0 31. "RMIDE,RX Message Buffer IDE Bit" "0: STD-ID is stored,1: EXT-ID is stored" bitfld.long 0x0 30. "RMRTR,RX Message Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RMID,RX Message Buffer ID Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1524)++0x3 line.long 0x0 "CFDRMPTR$1,RX Message Buffer Pointer Registers" hexmask.long.byte 0x0 28.--31. 1. "RMDLC,RX Message Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RMTS,RX Message Buffer Timestamp Field" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1528)++0x3 line.long 0x0 "CFDRMFDSTS$1,RX Message Buffer CAN-FD Status Register" hexmask.long.word 0x0 16.--31. 1. "RMPTR,RX Message Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RMIFL,RX Message Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RMFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RMBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RMESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x152C)++0x3 line.long 0x0 "CFDRMDF24_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB99,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB98,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB97,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB96,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1578)++0x3 line.long 0x0 "CFDRMDF25_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB103,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB102,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB101,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB100,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x15C4)++0x3 line.long 0x0 "CFDRMDF26_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB107,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB106,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB105,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB104,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1610)++0x3 line.long 0x0 "CFDRMDF27_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB111,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB110,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB109,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB108,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x165C)++0x3 line.long 0x0 "CFDRMDF28_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB115,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB114,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB113,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB112,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16A8)++0x3 line.long 0x0 "CFDRMDF29_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB119,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB118,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB117,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB116,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x16F4)++0x3 line.long 0x0 "CFDRMDF30_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB123,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB122,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB121,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB120,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1740)++0x3 line.long 0x0 "CFDRMDF31_$1,RX Message Buffer Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "RMDB127,RX Message Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RMDB126,RX Message Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RMDB125,RX Message Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RMDB124,RX Message Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1920)++0x3 line.long 0x0 "CFDRFIDE$1,RX FIFO Access ID Registers for Emulation" bitfld.long 0x0 31. "RFIDE,RX FIFO Buffer IDE Bit" "0: STD-ID has been received,1: EXT-ID has been received" bitfld.long 0x0 30. "RFRTR,RX FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--28. 1. "RFID,RX FIFO Buffer ID Field" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1924)++0x3 line.long 0x0 "CFDRFPTRE$1,RX FIFO Access Pointer Registers for Emulation" hexmask.long.byte 0x0 28.--31. 1. "RFDLC,RX FIFO Buffer DLC Field" hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000." newline hexmask.long.word 0x0 0.--15. 1. "RFTS,RX FIFO Timestamp Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1928)++0x3 line.long 0x0 "CFDRFFDSTSE$1,RX FIFO Access CAN-FD Status Registers for Emulation" hexmask.long.word 0x0 16.--31. 1. "CFDRFPTR,RX FIFO Buffer Pointer Field" hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8.--9. "RFIFL,RX FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 2. "RFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x0 1. "RFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x0 0. "RFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x192C)++0x3 line.long 0x0 "CFDRFDF0E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB3,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB2,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB1,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB0,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1930)++0x3 line.long 0x0 "CFDRFDF1E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB7,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB6,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB5,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB4,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1934)++0x3 line.long 0x0 "CFDRFDF2E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB11,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB10,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB9,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB8,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1938)++0x3 line.long 0x0 "CFDRFDF3E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB15,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB14,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB13,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB12,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x193C)++0x3 line.long 0x0 "CFDRFDF4E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB19,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB18,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB17,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB16,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1940)++0x3 line.long 0x0 "CFDRFDF5E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB23,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB22,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB21,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB20,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1944)++0x3 line.long 0x0 "CFDRFDF6E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB27,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB26,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB25,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB24,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1948)++0x3 line.long 0x0 "CFDRFDF7E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB31,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB30,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB29,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB28,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x194C)++0x3 line.long 0x0 "CFDRFDF8E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB35,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB34,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB33,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB32,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1950)++0x3 line.long 0x0 "CFDRFDF9E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB39,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB38,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB37,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB36,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1954)++0x3 line.long 0x0 "CFDRFDF10E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB43,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB42,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB41,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB40,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1958)++0x3 line.long 0x0 "CFDRFDF11E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB47,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB46,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB45,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB44,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x195C)++0x3 line.long 0x0 "CFDRFDF12E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB51,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB50,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB49,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB48,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1960)++0x3 line.long 0x0 "CFDRFDF13E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB55,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB54,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB53,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB52,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1964)++0x3 line.long 0x0 "CFDRFDF14E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB59,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB58,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB57,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB56,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4C) rgroup.long ($2+0x1968)++0x3 line.long 0x0 "CFDRFDF15E$1,RX FIFO Access Data Field p Registers for Emulation" hexmask.long.byte 0x0 24.--31. 1. "RFDB63,RX FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "RFDB62,RX FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "RFDB61,RX FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "RFDB60,RX FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end group.long 0x19B8++0xB line.long 0x0 "CFDCFIDE,Common FIFO Access ID Register for Emulation" bitfld.long 0x0 31. "CFIDE,Common FIFO Buffer IDE Bit" "0: STD-ID will be transmitted or has been received,1: EXT-ID will be transmitted or has been received" bitfld.long 0x0 30. "CFRTR,Common FIFO Buffer RTR Bit" "0: Data Frame,1: Remote Frame" newline bitfld.long 0x0 29. "THLEN,THL Entry enable" "0: Entry will not be stored in THL after successful..,1: Entry will be stored in THL after successful TX." hexmask.long 0x0 0.--28. 1. "CFID,Common FIFO Buffer ID Field" line.long 0x4 "CFDCFPTRE,Common FIFO Access Pointer Register for Emulation" hexmask.long.byte 0x4 28.--31. 1. "CFDLC,Common FIFO Buffer DLC Field" hexmask.long.word 0x4 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline hexmask.long.word 0x4 0.--15. 1. "CFTS,Common FIFO Timestamp Value" line.long 0x8 "CFDCFFDCSTSE,Common FIFO Access CAN-FD Control/Status Register for Emulation" hexmask.long.word 0x8 16.--31. 1. "CFPTR,Common FIFO Buffer Pointer Field" hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 8.--9. "CFIFL,COMMON FIFO Buffer Information label Field" "0,1,2,3" hexmask.long.byte 0x8 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 2. "CFFDF,CAN FD Format bit" "0: Non CAN-FD frame received,1: CAN-FD frame received" bitfld.long 0x8 1. "CFBRS,Bit Rate Switch bit" "0: CAN-FD frame received with no bit rate switch,1: CAN-FD frame received with bit rate switch" newline bitfld.long 0x8 0. "CFESI,Error State Indicator bit" "0: CAN-FD frame received from error active node,1: CAN-FD frame received from error passive node" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x19C4)++0x3 line.long 0x0 "CFDCFDF$1E,Common FIFO Access Data Field p Registers" hexmask.long.byte 0x0 24.--31. 1. "CFDB3,Common FIFO Buffer Data Byte ((p*q)+(q-1))" hexmask.long.byte 0x0 16.--23. 1. "CFDB2,Common FIFO Buffer Data Byte ((p*q)+(q-2))" newline hexmask.long.byte 0x0 8.--15. 1. "CFDB1,Common FIFO Buffer Data Byte ((p*q)+(q-3))" hexmask.long.byte 0x0 0.--7. 1. "CFDB0,Common FIFO Buffer Data Byte ((p*q)+(q-4))" repeat.end tree.end tree "ECCMB0" base ad:0x4036F200 group.long 0x0++0x3 line.long 0x0 "EC710CTL,ECC control register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." rbitfld.long 0x0 17. "ECDEDF0,Flag bit of ECC Dual bit Error Detection" "0: no bit error,1: 2bits error occurred" newline rbitfld.long 0x0 16. "ECSEDF0,Flag bit of ECC Single bit Error Detection" "0: no bit error,1: 1bits error occurred" bitfld.long 0x0 15. "EMCA1,Access control bit1 to ECC mode select bit" "0,1" newline bitfld.long 0x0 14. "EMCA0,Access control bit0 to ECC mode select bit" "0,1" bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 11. "ECOVFF,Flag bit of ECC overflow detection" "0: Overflow is not occurred after reset or clearing..,1: Error address register overflowed" bitfld.long 0x0 10. "ECER2C,Flag clear bit of 2bits ECC error detection" "0,1" newline bitfld.long 0x0 9. "ECER1C,Flag clear bit of accumulating ECC error detection and correction" "0,1" bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 7. "ECTHM,Select bit of ECC function through mode" "0: Through mode disable (normal operation mode).,1: Through mode enable." bitfld.long 0x0 6. "ECERVF,Flag bit to enable ECC error judgment" "0,1" newline bitfld.long 0x0 5. "EC1ECP,Permission bit of ECC 1bit error correction" "0,1" bitfld.long 0x0 4. "EC2EDIC,Control bit of interrupt at ECC 2bits error detection" "0: Interrupt is not occurred at detecting 2bits..,1: EC7TIE2 is outputted at detecting 2bits error." newline bitfld.long 0x0 3. "EC1EDIC,Control bit of interrupt at ECC 1bit error detection" "0: Interrupt is not occurred at detecting 2bit error.,1: EC7TIE2 is outputted at detecting 1bit error." rbitfld.long 0x0 2. "ECER2F,Flag bit of 2bits ECC error detection" "0,1" newline rbitfld.long 0x0 1. "ECER1F,Flag bit of ECC error detection and correction" "0,1" rbitfld.long 0x0 0. "ECEMF,Flag bit of ECC error message" "0,1" group.word 0x4++0x1 line.word 0x0 "EC710TMC,ECC test mode control register" bitfld.word 0x0 15. "ETMA1,Access control bit1 and bit0 to ECC test mode bit" "0,1" bitfld.word 0x0 14. "ETMA0,Access control bit1 and bit0 to ECC test mode bit" "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 7. "ECTMCE,Enable bit of ECC test mode control" "0,1" newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "ECDCS,Select bit of ECC decode input" "0,1" bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0xC++0x3 line.long 0x0 "EC710TED,ECC encode or decode data test register" hexmask.long 0x0 0.--31. 1. "ECEDB,At test mode this register data is used as input data to encode circuit or decode circuit" rgroup.long 0x10++0x3 line.long 0x0 "EC710EAD0,ECC error address register0" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--30. 1. "ECEAD,This is read only register to hold the ECC error occurred address." tree.end tree "ECCMB0_NS" base ad:0x5036F200 group.long 0x0++0x3 line.long 0x0 "EC710CTL,ECC control register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." rbitfld.long 0x0 17. "ECDEDF0,Flag bit of ECC Dual bit Error Detection" "0: no bit error,1: 2bits error occurred" newline rbitfld.long 0x0 16. "ECSEDF0,Flag bit of ECC Single bit Error Detection" "0: no bit error,1: 1bits error occurred" bitfld.long 0x0 15. "EMCA1,Access control bit1 to ECC mode select bit" "0,1" newline bitfld.long 0x0 14. "EMCA0,Access control bit0 to ECC mode select bit" "0,1" bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 11. "ECOVFF,Flag bit of ECC overflow detection" "0: Overflow is not occurred after reset or clearing..,1: Error address register overflowed" bitfld.long 0x0 10. "ECER2C,Flag clear bit of 2bits ECC error detection" "0,1" newline bitfld.long 0x0 9. "ECER1C,Flag clear bit of accumulating ECC error detection and correction" "0,1" bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 7. "ECTHM,Select bit of ECC function through mode" "0: Through mode disable (normal operation mode).,1: Through mode enable." bitfld.long 0x0 6. "ECERVF,Flag bit to enable ECC error judgment" "0,1" newline bitfld.long 0x0 5. "EC1ECP,Permission bit of ECC 1bit error correction" "0,1" bitfld.long 0x0 4. "EC2EDIC,Control bit of interrupt at ECC 2bits error detection" "0: Interrupt is not occurred at detecting 2bits..,1: EC7TIE2 is outputted at detecting 2bits error." newline bitfld.long 0x0 3. "EC1EDIC,Control bit of interrupt at ECC 1bit error detection" "0: Interrupt is not occurred at detecting 2bit error.,1: EC7TIE2 is outputted at detecting 1bit error." rbitfld.long 0x0 2. "ECER2F,Flag bit of 2bits ECC error detection" "0,1" newline rbitfld.long 0x0 1. "ECER1F,Flag bit of ECC error detection and correction" "0,1" rbitfld.long 0x0 0. "ECEMF,Flag bit of ECC error message" "0,1" group.word 0x4++0x1 line.word 0x0 "EC710TMC,ECC test mode control register" bitfld.word 0x0 15. "ETMA1,Access control bit1 and bit0 to ECC test mode bit" "0,1" bitfld.word 0x0 14. "ETMA0,Access control bit1 and bit0 to ECC test mode bit" "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 7. "ECTMCE,Enable bit of ECC test mode control" "0,1" newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "ECDCS,Select bit of ECC decode input" "0,1" bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0xC++0x3 line.long 0x0 "EC710TED,ECC encode or decode data test register" hexmask.long 0x0 0.--31. 1. "ECEDB,At test mode this register data is used as input data to encode circuit or decode circuit" rgroup.long 0x10++0x3 line.long 0x0 "EC710EAD0,ECC error address register0" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--30. 1. "ECEAD,This is read only register to hold the ECC error occurred address." tree.end tree "ECCMB1" base ad:0x4036F300 group.long 0x0++0x3 line.long 0x0 "EC710CTL,ECC control register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." rbitfld.long 0x0 17. "ECDEDF0,Flag bit of ECC Dual bit Error Detection" "0: no bit error,1: 2bits error occurred" newline rbitfld.long 0x0 16. "ECSEDF0,Flag bit of ECC Single bit Error Detection" "0: no bit error,1: 1bits error occurred" bitfld.long 0x0 15. "EMCA1,Access control bit1 to ECC mode select bit" "0,1" newline bitfld.long 0x0 14. "EMCA0,Access control bit0 to ECC mode select bit" "0,1" bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 11. "ECOVFF,Flag bit of ECC overflow detection" "0: Overflow is not occurred after reset or clearing..,1: Error address register overflowed" bitfld.long 0x0 10. "ECER2C,Flag clear bit of 2bits ECC error detection" "0,1" newline bitfld.long 0x0 9. "ECER1C,Flag clear bit of accumulating ECC error detection and correction" "0,1" bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 7. "ECTHM,Select bit of ECC function through mode" "0: Through mode disable (normal operation mode).,1: Through mode enable." bitfld.long 0x0 6. "ECERVF,Flag bit to enable ECC error judgment" "0,1" newline bitfld.long 0x0 5. "EC1ECP,Permission bit of ECC 1bit error correction" "0,1" bitfld.long 0x0 4. "EC2EDIC,Control bit of interrupt at ECC 2bits error detection" "0: Interrupt is not occurred at detecting 2bits..,1: EC7TIE2 is outputted at detecting 2bits error." newline bitfld.long 0x0 3. "EC1EDIC,Control bit of interrupt at ECC 1bit error detection" "0: Interrupt is not occurred at detecting 2bit error.,1: EC7TIE2 is outputted at detecting 1bit error." rbitfld.long 0x0 2. "ECER2F,Flag bit of 2bits ECC error detection" "0,1" newline rbitfld.long 0x0 1. "ECER1F,Flag bit of ECC error detection and correction" "0,1" rbitfld.long 0x0 0. "ECEMF,Flag bit of ECC error message" "0,1" group.word 0x4++0x1 line.word 0x0 "EC710TMC,ECC test mode control register" bitfld.word 0x0 15. "ETMA1,Access control bit1 and bit0 to ECC test mode bit" "0,1" bitfld.word 0x0 14. "ETMA0,Access control bit1 and bit0 to ECC test mode bit" "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 7. "ECTMCE,Enable bit of ECC test mode control" "0,1" newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "ECDCS,Select bit of ECC decode input" "0,1" bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0xC++0x3 line.long 0x0 "EC710TED,ECC encode or decode data test register" hexmask.long 0x0 0.--31. 1. "ECEDB,At test mode this register data is used as input data to encode circuit or decode circuit" rgroup.long 0x10++0x3 line.long 0x0 "EC710EAD0,ECC error address register0" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--30. 1. "ECEAD,This is read only register to hold the ECC error occurred address." tree.end tree "ECCMB1_NS" base ad:0x5036F300 group.long 0x0++0x3 line.long 0x0 "EC710CTL,ECC control register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." rbitfld.long 0x0 17. "ECDEDF0,Flag bit of ECC Dual bit Error Detection" "0: no bit error,1: 2bits error occurred" newline rbitfld.long 0x0 16. "ECSEDF0,Flag bit of ECC Single bit Error Detection" "0: no bit error,1: 1bits error occurred" bitfld.long 0x0 15. "EMCA1,Access control bit1 to ECC mode select bit" "0,1" newline bitfld.long 0x0 14. "EMCA0,Access control bit0 to ECC mode select bit" "0,1" bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 11. "ECOVFF,Flag bit of ECC overflow detection" "0: Overflow is not occurred after reset or clearing..,1: Error address register overflowed" bitfld.long 0x0 10. "ECER2C,Flag clear bit of 2bits ECC error detection" "0,1" newline bitfld.long 0x0 9. "ECER1C,Flag clear bit of accumulating ECC error detection and correction" "0,1" bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 7. "ECTHM,Select bit of ECC function through mode" "0: Through mode disable (normal operation mode).,1: Through mode enable." bitfld.long 0x0 6. "ECERVF,Flag bit to enable ECC error judgment" "0,1" newline bitfld.long 0x0 5. "EC1ECP,Permission bit of ECC 1bit error correction" "0,1" bitfld.long 0x0 4. "EC2EDIC,Control bit of interrupt at ECC 2bits error detection" "0: Interrupt is not occurred at detecting 2bits..,1: EC7TIE2 is outputted at detecting 2bits error." newline bitfld.long 0x0 3. "EC1EDIC,Control bit of interrupt at ECC 1bit error detection" "0: Interrupt is not occurred at detecting 2bit error.,1: EC7TIE2 is outputted at detecting 1bit error." rbitfld.long 0x0 2. "ECER2F,Flag bit of 2bits ECC error detection" "0,1" newline rbitfld.long 0x0 1. "ECER1F,Flag bit of ECC error detection and correction" "0,1" rbitfld.long 0x0 0. "ECEMF,Flag bit of ECC error message" "0,1" group.word 0x4++0x1 line.word 0x0 "EC710TMC,ECC test mode control register" bitfld.word 0x0 15. "ETMA1,Access control bit1 and bit0 to ECC test mode bit" "0,1" bitfld.word 0x0 14. "ETMA0,Access control bit1 and bit0 to ECC test mode bit" "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 7. "ECTMCE,Enable bit of ECC test mode control" "0,1" newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "ECDCS,Select bit of ECC decode input" "0,1" bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0xC++0x3 line.long 0x0 "EC710TED,ECC encode or decode data test register" hexmask.long 0x0 0.--31. 1. "ECEDB,At test mode this register data is used as input data to encode circuit or decode circuit" rgroup.long 0x10++0x3 line.long 0x0 "EC710EAD0,ECC error address register0" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" hexmask.long 0x0 0.--30. 1. "ECEAD,This is read only register to hold the ECC error occurred address." tree.end tree.end tree "CEU (Capture Engine Unit)" base ad:0x0 tree "CEU" base ad:0x40348000 group.long 0x0++0x1B line.long 0x0 "CAPSR,Capture Start Register" bitfld.long 0x0 16. "CPKIL,Write 1 to this bit to perform a software reset of capturing." "0: Normal state,1: Software reset of capturing" bitfld.long 0x0 0. "CE,Capture enable" "0: Stops capturing,1: Starts capturing" line.long 0x4 "CAPCR,Capture Control Register" hexmask.long.byte 0x4 24.--31. 1. "FDRP,Set the frame drop interval in continuous-frame capture." bitfld.long 0x4 20.--21. "MTCM,Specify the unit for transferring data to a bus bridge module." "0: Image capture: Y data and C data are transferred..,1: Image capture: Y data and C data are transferred..,?,?" newline bitfld.long 0x4 16. "CTNCP,When capturing is started with this bit set to 1 capturing continues until the CE bit in CAPSR is cleared to 0 or a software reset is initiated by the CPKIL bit in CAPSR (see ). Continuous capture must be set before capturing is started." "0: One-frame capture when the CE bit is 1,1: Continuous capture until the CE bit is cleared.." line.long 0x8 "CAMCR,Capture interface control register" bitfld.long 0x8 27. "VDSEL,Sets the edge for capturing the vertical sync signal (VD) from an external module." "0: VD is captured at the rising edge of the camera..,1: VD is captured at the falling edge of the camera.." bitfld.long 0x8 26. "HDSEL,Sets the edge for capturing the horizontal sync signal (HD) from an external module." "0: HD is captured at the rising edge of the camera..,1: HD is captured at the falling edge of the camera.." newline bitfld.long 0x8 25. "FLDSEL,Sets the edge for capturing the field identification signal (FLD) from an external module." "0: FLD is captured at the rising edge of the camera..,1: FLD is captured at the falling edge of the.." bitfld.long 0x8 24. "DSEL,Sets the edge for fetching the image data (D7 to D0) from an external module." "0: D7 to D0 are fetched at the rising edge of the..,1: D7 to D0 are fetched at the falling edge of the.." newline bitfld.long 0x8 16. "FLDPOL,Sets the polarity of the field identification signal (FLD) from an external module." "0: When the FLD signal is high-active the field is..,1: When the FLD signal is low-active the field is.." bitfld.long 0x8 12. "DTIF,Sets the digital image input pins from which data is to be captured." "0: Data input to 8-bit digital image input pins is..,1: Data input to 16-bit digital image input pins is.." newline bitfld.long 0x8 8.--9. "DTARY,Set the input order of the luminance component and chrominance component." "0: 8-bit interface: Image input data is fetched in..,1: 8-bit interface: Image input data is fetched in..,?,?" bitfld.long 0x8 4.--5. "JPG,These bits select the fetched data type." "0: Image capture mode (input data are separated..,1: Data synchronous fetch mode (specified size of..,?,?" newline bitfld.long 0x8 1. "VDPOL,Sets the polarity for detection of the vertical sync signal input from an external module." "0: Vertical sync signal (VD) from an external..,1: Vertical sync signal (VD) from an external.." bitfld.long 0x8 0. "HDPOL,Sets the polarity for detection of the horizontal sync signal input from an external module." "0: Horizontal sync signal (HD) from an external..,1: Horizontal sync signal (HD) from an external.." line.long 0xC "CMCYR,Capture Interface Cycle Register" hexmask.long.word 0xC 16.--29. 1. "VCYL,Vertical HD Count of External Module" hexmask.long.word 0xC 0.--13. 1. "HCYL,Horizontal Cycle Count of External Module" line.long 0x10 "CAMOR,Capture Interface Offset Register" hexmask.long.word 0x10 16.--27. 1. "VOFST,Specify the capture start location in terms of the HD count from a vertical sync signal (1-HD units)." hexmask.long.word 0x10 0.--12. 1. "HOFST,Specify the capture start location in terms of the number of clock cycles from a horizontal sync signal (1-cycle units)." line.long 0x14 "CAPWR,Capture Interface Width Register" hexmask.long.word 0x14 16.--27. 1. "VWDTH,Specify the vertical capture period (4-HD units)." hexmask.long.word 0x14 0.--12. 1. "HWDTH,Specify the horizontal capture period." line.long 0x18 "CAIFR,Capture Interface Input Format Register" bitfld.long 0x18 8. "IFS,Sets the input mode for capturing images." "0: Progressive,1: Interlace" bitfld.long 0x18 4. "CIM,Sets the images to be captured." "0: Capture of frame image (1 VD) or both-field..,1: Capture of one-field image (1 VD)" newline bitfld.long 0x18 0.--1. "FCI,Set the timing to start capturing." "0: Capture starts from the VD input immediately..,1: After the CEU activation input of a top-field..,?,?" group.long 0x28++0x27 line.long 0x0 "CRCNTR,CEU Register Control Register" bitfld.long 0x0 4. "RVS,Sets the timing to switch the register plane in both-field capture." "0: Switches the register plane every 2 VD,1: Switches the register plane every 1 VD" bitfld.long 0x0 1. "RS,Specifies which register plane is used by the CEU in synchronization with VD." "0: Uses plane A of the register,1: Uses plane B of the register" newline bitfld.long 0x0 0. "RC,Specifies switching of the register plane used by the CEU in synchronization with VD." "0: Uses the specified register plane in..,1: Switches the register plane in synchronization.." line.long 0x4 "CRCMPR,CEU Register Forcible Control Register" bitfld.long 0x4 0. "RA,Indicates the register plane currently specified." "0: Specifies plane A of the register,1: Specifies plane B of the register" line.long 0x8 "CFLCR,Capture Filter Control Register" hexmask.long.byte 0x8 28.--31. 1. "VMANT,Mantissa Part of Vertical Scale-Down Factor" hexmask.long.word 0x8 16.--27. 1. "VFRAC,Fraction Part of Vertical Scale-Down Factor" newline hexmask.long.byte 0x8 12.--15. 1. "HMANT,Mantissa Part of Horizontal Scale-Down Factor" hexmask.long.word 0x8 0.--11. 1. "HFRAC,Fraction Part of Horizontal Scale-Down Factor" line.long 0xC "CFSZR,Capture Filter Size Clip Register" hexmask.long.word 0xC 16.--27. 1. "VFCLP,Set the vertical clipping value of the filter output size (4-pixel units)." hexmask.long.word 0xC 0.--11. 1. "HFCLP,Specify the horizontal clipping value of the filter output size (4-pixel units)." line.long 0x10 "CDWDR,Capture Destination Width Register" hexmask.long.word 0x10 0.--12. 1. "CHDW,Specify the horizontal image size in the memory area where the captured image is to be stored (4-byte units)." line.long 0x14 "CDAYR,Capture Data Address Y Register" hexmask.long 0x14 0.--31. 1. "CAYR,Capture Data Address Y" line.long 0x18 "CDACR,Capture Data Address C Register" hexmask.long 0x18 0.--31. 1. "CACR,Capture Data Address C" line.long 0x1C "CDBYR,Capture Data Bottom-Field Address Y Register" hexmask.long 0x1C 0.--31. 1. "CBYR,Set the address for storing the Y (luminance) component data of the captured bottom-field data (4-pixel units)." line.long 0x20 "CDBCR,Capture Data Bottom-Field Address C Register" hexmask.long 0x20 0.--31. 1. "CBCR,Set the address for storing the C (chrominance) component data of the captured bottom-field data (4-pixel units)." line.long 0x24 "CBDSR,Capture Bundle Destination Size Register" hexmask.long.tbyte 0x24 0.--22. 1. "CBVS,Select the number of lines or number of bytes for output to the memory in a bundle write." group.long 0x5C++0xB line.long 0x0 "CFWCR,Firewall Operation Control Register" hexmask.long 0x0 5.--31. 1. "FWV,Specify the upper limit of a write address." bitfld.long 0x0 0. "FWE,With the setting of FWE = 1 when an address exceeds the value set with FWV the address is retained and an interrupt source FWF is set. After this the address is not incremented and data is overwritten on the upper limit address." "0: Firewall is not activated.,1: Firewall is activated." line.long 0x4 "CLFCR,Capture Low-Pass Filter Control Register" bitfld.long 0x4 0. "LPF,Enables or disables operation of the low-pass filter." "0: Low-pass filter not used,1: Low-pass filter used (only in the horizontal.." line.long 0x8 "CDOCR,Capture Data Output Control Register" bitfld.long 0x8 16. "CBE,Controls the number of lines of captured data to be written to the memory." "0: Normal write,1: Bundle write" bitfld.long 0x8 4. "CDS,Sets the image format when outputting the image data captured in the YCbCr422 format to the memory." "0: Converts the YCbCr422 format to the YCbCr420..,1: Outputs data in the YCbCr422 format to the.." newline bitfld.long 0x8 2. "COLS,Controls swapping in 32-bit units for data output from the CEU." "0: Data is not swapped in 32-bit units,1: Data is swapped in 32-bit units" bitfld.long 0x8 1. "COWS,Controls swapping in 16-bit units for data output from the CEU." "0: Data is not swapped in 16-bit units,1: Data is swapped in 16-bit units" newline bitfld.long 0x8 0. "COBS,Controls swapping in 8-bit units for data output from the CEU." "0: Data is not swapped in 8-bit units,1: Data is swapped in 8-bit units" group.long 0x70++0x7 line.long 0x0 "CEIER,Capture Event Interrupt Enable Register" bitfld.long 0x0 25. "NVDIE,Non-VD Interrupt Enable" "0: Disables a non-VD interrupt,1: Enables a non-VD interrupt" bitfld.long 0x0 24. "NHDIE,Non-HD Interrupt Enable" "0: Disables a non-HD interrupt,1: Enables a non-HD interrupt" newline bitfld.long 0x0 23. "FWFIE,FWF Interrupt Enable" "0: Disables a FWF interrupt,1: Enables a FWF interrupt" bitfld.long 0x0 20. "VBPIE,VBP Interrupt Enable" "0: Disables a VBP interrupt,1: Enables a VBP interrupt" newline bitfld.long 0x0 18. "IGVSIE,IGVS Interrupt Enable" "0: Disables an IGVS interrupt,1: Enables an IGVS interrupt" bitfld.long 0x0 17. "IGHSIE,IGHS Interrupt Enable" "0: Disables an IGHS interrupt,1: Enables an IGHS interrupt" newline bitfld.long 0x0 16. "CDTOFIE,CDTOF Interrupt Enable" "0: Disables a CDTOF interrupt,1: Enables a CDTOF interrupt" bitfld.long 0x0 15. "CPBE4IE,CPBE4 Interrupt Enable" "0: Disables a CPBE4 interrupt,1: Enables a CPBE4 interrupt" newline bitfld.long 0x0 14. "CPBE3IE,CPBE3 Interrupt Enable" "0: Disables a CPBE3 interrupt,1: Enables a CPBE3 interrupt" bitfld.long 0x0 13. "CPBE2IE,CPBE2 Interrupt Enable" "0: Disables a CPBE2 interrupt,1: Enables a CPBE2 interrupt" newline bitfld.long 0x0 12. "CPBE1IE,CPBE1 Interrupt Enable" "0: Disables a CPBE1 interrupt,1: Enables a CPBE1 interrupt" bitfld.long 0x0 9. "VDIE,VD Interrupt Enable" "0: Disables a VD interrupt,1: Enables a VD interrupt" newline bitfld.long 0x0 8. "HDIE,HD Interrupt Enable" "0: Disables an HD interrupt,1: Enables an HD interrupt" bitfld.long 0x0 4. "IGRWIE,Register-Access-During-Capture Interrupt Enable" "0: Disables a register-access-during-capture..,1: Enables a register-access-during-capture interrupt" newline bitfld.long 0x0 1. "CFEIE,CFE Interrupt Enable" "0: Disables a CFE interrupt,1: Enables a CFE interrupt" bitfld.long 0x0 0. "CPEIE,One-Frame Capture End Interrupt Enable" "0: Disables a one-frame capture end interrupt,1: Enables a one-frame capture end interrupt" line.long 0x4 "CETCR,Capture Event Flag Clear Register" bitfld.long 0x4 25. "NVD,An interrupt indicating that no VD was input." "0,1" bitfld.long 0x4 24. "NHD,An interrupt indicating that no HD was input." "0,1" newline bitfld.long 0x4 23. "FWF,The interrupt is generated when data is written to the address that exceeds the value specified with CFWCR.FMV." "0,1" bitfld.long 0x4 20. "VBP,An interrupt indicating that VD has been input while the CEU holds data (insufficient vertical-sync front porch)." "0,1" newline bitfld.long 0x4 18. "IGVS,An interrupt generated when the number of VD cycles set in CMCYR differ from the number of VD cycles input from an external module." "0,1" bitfld.long 0x4 17. "IGHS,An interrupt generated when the number of HD cycles set in CMCYR differ from the number of HD cycles input from an external module." "0,1" newline bitfld.long 0x4 16. "CDTOF,An interrupt indicating that data overflowed in the CRAM of the write buffer" "0,1" bitfld.long 0x4 15. "CPBE4,An interrupt indicating that writing to CDBYR2 and CDBCR2 in a bundle write has finished." "0,1" newline bitfld.long 0x4 14. "CPBE3,An interrupt indicating that writing to CDBYR and CDBCR in a bundle write has finished." "0,1" bitfld.long 0x4 13. "CPBE2,An interrupt indicating that writing to CDAYR2 and CDACR2 in a bundle write has finished." "0,1" newline bitfld.long 0x4 12. "CPBE1,An interrupt indicating that writing to CDAYR and CDACR in a bundle write has finished." "0,1" bitfld.long 0x4 9. "VD,An interrupt indicating that VD (vertical sync signal) was input from an external module." "0,1" newline bitfld.long 0x4 8. "HD,An interrupt indicating that HD (horizontal sync signal) was input from an external module." "0,1" bitfld.long 0x4 4. "IGRW,An interrupt indicating that during capturing access was attempted to a register to which writing during operation is prohibited." "0,1" newline bitfld.long 0x4 1. "CFE,An interrupt indicating that capturing of one field from an external module has finished." "0,1" bitfld.long 0x4 0. "CPE,An interrupt indicating that capturing of one frame from an external module has finished." "0,1" rgroup.long 0x7C++0x3 line.long 0x0 "CSTSR,Capture Status Register" bitfld.long 0x0 24. "CRST,Indicates which register plane is currently used." "0: Plane A of the register is being used,1: Plane B of the register is being used" bitfld.long 0x0 16. "CPFLD,Indicates which field is being captured." "0: Bottom field is being captured,1: Top field is being captured" newline bitfld.long 0x0 0. "CPTON,Indicates that the CEU is operating." "0,1" rgroup.long 0x84++0x3 line.long 0x0 "CDSSR,Capture Data Size Register" hexmask.long 0x0 0.--31. 1. "CDSS,Indicate the size of data written to the memory in data enable fetch." group.long 0x90++0x13 line.long 0x0 "CDAYR2,Capture Data Address Y Register 2" hexmask.long 0x0 0.--31. 1. "CAYR2,Capture Data Address Y" line.long 0x4 "CDACR2,Capture Data Address C Register 2" hexmask.long 0x4 0.--31. 1. "CACR2,Capture Data Address C2" line.long 0x8 "CDBYR2,Capture Data Bottom-Field Address Y Register 2" hexmask.long 0x8 0.--31. 1. "CBYR2,Set the address for storing the Y component data of the captured bottom-field data (4-pixel units)." line.long 0xC "CDBCR2,Capture Data Bottom-Field Address C Register 2" hexmask.long 0xC 0.--31. 1. "CBCR2,Set the address for storing the C component data of the captured bottom-field data (4-pixel units)." line.long 0x10 "AXIBUSCTL2,AXI Bus Control Register 2" hexmask.long.byte 0x10 0.--3. 1. "AWCACHE,AWCACHE[3:0] Signals for Capture Engine Unit" group.long 0x1010++0x7 line.long 0x0 "CAMOR_B,Capture Interface Offset Register" hexmask.long.word 0x0 16.--27. 1. "VOFST,Specify the capture start location in terms of the HD count from a vertical sync signal (1-HD units)." hexmask.long.word 0x0 0.--12. 1. "HOFST,Specify the capture start location in terms of the number of clock cycles from a horizontal sync signal (1-cycle units)." line.long 0x4 "CAPWR_B,Capture Interface Width Register" hexmask.long.word 0x4 16.--27. 1. "VWDTH,Specify the vertical capture period (4-HD units)." hexmask.long.word 0x4 0.--12. 1. "HWDTH,Specify the horizontal capture period." group.long 0x1030++0x1F line.long 0x0 "CFLCR_B,Capture Filter Control Register" hexmask.long.byte 0x0 28.--31. 1. "VMANT,Mantissa Part of Vertical Scale-Down Factor" hexmask.long.word 0x0 16.--27. 1. "VFRAC,Fraction Part of Vertical Scale-Down Factor" newline hexmask.long.byte 0x0 12.--15. 1. "HMANT,Mantissa Part of Horizontal Scale-Down Factor" hexmask.long.word 0x0 0.--11. 1. "HFRAC,Fraction Part of Horizontal Scale-Down Factor" line.long 0x4 "CFSZR_B,Capture Filter Size Clip Register" hexmask.long.word 0x4 16.--27. 1. "VFCLP,Set the vertical clipping value of the filter output size (4-pixel units)." hexmask.long.word 0x4 0.--11. 1. "HFCLP,Specify the horizontal clipping value of the filter output size (4-pixel units)." line.long 0x8 "CDWDR_B,Capture Destination Width Register" hexmask.long.word 0x8 0.--12. 1. "CHDW,Specify the horizontal image size in the memory area where the captured image is to be stored (4-byte units)." line.long 0xC "CDAYR_B,Capture Data Address Y Register" hexmask.long 0xC 0.--31. 1. "CAYR,Capture Data Address Y" line.long 0x10 "CDACR_B,Capture Data Address C Register" hexmask.long 0x10 0.--31. 1. "CACR,Capture Data Address C" line.long 0x14 "CDBYR_B,Capture Data Bottom-Field Address Y Register" hexmask.long 0x14 0.--31. 1. "CBYR,Set the address for storing the Y (luminance) component data of the captured bottom-field data (4-pixel units)." line.long 0x18 "CDBCR_B,Capture Data Bottom-Field Address C Register" hexmask.long 0x18 0.--31. 1. "CBCR,Set the address for storing the C (chrominance) component data of the captured bottom-field data (4-pixel units)." line.long 0x1C "CBDSR_B,Capture Bundle Destination Size Register" hexmask.long.tbyte 0x1C 0.--22. 1. "CBVS,Select the number of lines or number of bytes for output to the memory in a bundle write." group.long 0x1060++0x7 line.long 0x0 "CLFCR_B,Capture Low-Pass Filter Control Register" bitfld.long 0x0 0. "LPF,Enables or disables operation of the low-pass filter." "0: Low-pass filter not used,1: Low-pass filter used (only in the horizontal.." line.long 0x4 "CDOCR_B,Capture Data Output Control Register" bitfld.long 0x4 16. "CBE,Controls the number of lines of captured data to be written to the memory." "0: Normal write,1: Bundle write" bitfld.long 0x4 4. "CDS,Sets the image format when outputting the image data captured in the YCbCr422 format to the memory." "0: Converts the YCbCr422 format to the YCbCr420..,1: Outputs data in the YCbCr422 format to the.." newline bitfld.long 0x4 2. "COLS,Controls swapping in 32-bit units for data output from the CEU." "0: Data is not swapped in 32-bit units,1: Data is swapped in 32-bit units" bitfld.long 0x4 1. "COWS,Controls swapping in 16-bit units for data output from the CEU." "0: Data is not swapped in 16-bit units,1: Data is swapped in 16-bit units" newline bitfld.long 0x4 0. "COBS,Controls swapping in 8-bit units for data output from the CEU." "0: Data is not swapped in 8-bit units,1: Data is swapped in 8-bit units" group.long 0x1090++0xF line.long 0x0 "CDAYR2_B,Capture Data Address Y Register 2" hexmask.long 0x0 0.--31. 1. "CAYR2,Capture Data Address Y" line.long 0x4 "CDACR2_B,Capture Data Address C Register 2" hexmask.long 0x4 0.--31. 1. "CACR2,Capture Data Address C2" line.long 0x8 "CDBYR2_B,Capture Data Bottom-Field Address Y Register 2" hexmask.long 0x8 0.--31. 1. "CBYR2,Set the address for storing the Y component data of the captured bottom-field data (4-pixel units)." line.long 0xC "CDBCR2_B,Capture Data Bottom-Field Address C Register 2" hexmask.long 0xC 0.--31. 1. "CBCR2,Set the address for storing the C component data of the captured bottom-field data (4-pixel units)." group.long 0x2010++0x7 line.long 0x0 "CAMOR_M,Capture Interface Offset Register" hexmask.long.word 0x0 16.--27. 1. "VOFST,Specify the capture start location in terms of the HD count from a vertical sync signal (1-HD units)." hexmask.long.word 0x0 0.--12. 1. "HOFST,Specify the capture start location in terms of the number of clock cycles from a horizontal sync signal (1-cycle units)." line.long 0x4 "CAPWR_M,Capture Interface Width Register" hexmask.long.word 0x4 16.--27. 1. "VWDTH,Specify the vertical capture period (4-HD units)." hexmask.long.word 0x4 0.--12. 1. "HWDTH,Specify the horizontal capture period." group.long 0x2030++0x1F line.long 0x0 "CFLCR_M,Capture Filter Control Register" hexmask.long.byte 0x0 28.--31. 1. "VMANT,Mantissa Part of Vertical Scale-Down Factor" hexmask.long.word 0x0 16.--27. 1. "VFRAC,Fraction Part of Vertical Scale-Down Factor" newline hexmask.long.byte 0x0 12.--15. 1. "HMANT,Mantissa Part of Horizontal Scale-Down Factor" hexmask.long.word 0x0 0.--11. 1. "HFRAC,Fraction Part of Horizontal Scale-Down Factor" line.long 0x4 "CFSZR_M,Capture Filter Size Clip Register" hexmask.long.word 0x4 16.--27. 1. "VFCLP,Set the vertical clipping value of the filter output size (4-pixel units)." hexmask.long.word 0x4 0.--11. 1. "HFCLP,Specify the horizontal clipping value of the filter output size (4-pixel units)." line.long 0x8 "CDWDR_M,Capture Destination Width Register" hexmask.long.word 0x8 0.--12. 1. "CHDW,Specify the horizontal image size in the memory area where the captured image is to be stored (4-byte units)." line.long 0xC "CDAYR_M,Capture Data Address Y Register" hexmask.long 0xC 0.--31. 1. "CAYR,Capture Data Address Y" line.long 0x10 "CDACR_M,Capture Data Address C Register" hexmask.long 0x10 0.--31. 1. "CACR,Capture Data Address C" line.long 0x14 "CDBYR_M,Capture Data Bottom-Field Address Y Register" hexmask.long 0x14 0.--31. 1. "CBYR,Set the address for storing the Y (luminance) component data of the captured bottom-field data (4-pixel units)." line.long 0x18 "CDBCR_M,Capture Data Bottom-Field Address C Register" hexmask.long 0x18 0.--31. 1. "CBCR,Set the address for storing the C (chrominance) component data of the captured bottom-field data (4-pixel units)." line.long 0x1C "CBDSR_M,Capture Bundle Destination Size Register" hexmask.long.tbyte 0x1C 0.--22. 1. "CBVS,Select the number of lines or number of bytes for output to the memory in a bundle write." group.long 0x2060++0x7 line.long 0x0 "CLFCR_M,Capture Low-Pass Filter Control Register" bitfld.long 0x0 0. "LPF,Enables or disables operation of the low-pass filter." "0: Low-pass filter not used,1: Low-pass filter used (only in the horizontal.." line.long 0x4 "CDOCR_M,Capture Data Output Control Register" bitfld.long 0x4 16. "CBE,Controls the number of lines of captured data to be written to the memory." "0: Normal write,1: Bundle write" bitfld.long 0x4 4. "CDS,Sets the image format when outputting the image data captured in the YCbCr422 format to the memory." "0: Converts the YCbCr422 format to the YCbCr420..,1: Outputs data in the YCbCr422 format to the.." newline bitfld.long 0x4 2. "COLS,Controls swapping in 32-bit units for data output from the CEU." "0: Data is not swapped in 32-bit units,1: Data is swapped in 32-bit units" bitfld.long 0x4 1. "COWS,Controls swapping in 16-bit units for data output from the CEU." "0: Data is not swapped in 16-bit units,1: Data is swapped in 16-bit units" newline bitfld.long 0x4 0. "COBS,Controls swapping in 8-bit units for data output from the CEU." "0: Data is not swapped in 8-bit units,1: Data is swapped in 8-bit units" group.long 0x2090++0xF line.long 0x0 "CDAYR2_M,Capture Data Address Y Register 2" hexmask.long 0x0 0.--31. 1. "CAYR2,Capture Data Address Y" line.long 0x4 "CDACR2_M,Capture Data Address C Register 2" hexmask.long 0x4 0.--31. 1. "CACR2,Capture Data Address C2" line.long 0x8 "CDBYR2_M,Capture Data Bottom-Field Address Y Register 2" hexmask.long 0x8 0.--31. 1. "CBYR2,Set the address for storing the Y component data of the captured bottom-field data (4-pixel units)." line.long 0xC "CDBCR2_M,Capture Data Bottom-Field Address C Register 2" hexmask.long 0xC 0.--31. 1. "CBCR2,Set the address for storing the C component data of the captured bottom-field data (4-pixel units)." tree.end tree "CEU_NS" base ad:0x50348000 group.long 0x0++0x1B line.long 0x0 "CAPSR,Capture Start Register" bitfld.long 0x0 16. "CPKIL,Write 1 to this bit to perform a software reset of capturing." "0: Normal state,1: Software reset of capturing" bitfld.long 0x0 0. "CE,Capture enable" "0: Stops capturing,1: Starts capturing" line.long 0x4 "CAPCR,Capture Control Register" hexmask.long.byte 0x4 24.--31. 1. "FDRP,Set the frame drop interval in continuous-frame capture." bitfld.long 0x4 20.--21. "MTCM,Specify the unit for transferring data to a bus bridge module." "0: Image capture: Y data and C data are transferred..,1: Image capture: Y data and C data are transferred..,?,?" newline bitfld.long 0x4 16. "CTNCP,When capturing is started with this bit set to 1 capturing continues until the CE bit in CAPSR is cleared to 0 or a software reset is initiated by the CPKIL bit in CAPSR (see ). Continuous capture must be set before capturing is started." "0: One-frame capture when the CE bit is 1,1: Continuous capture until the CE bit is cleared.." line.long 0x8 "CAMCR,Capture interface control register" bitfld.long 0x8 27. "VDSEL,Sets the edge for capturing the vertical sync signal (VD) from an external module." "0: VD is captured at the rising edge of the camera..,1: VD is captured at the falling edge of the camera.." bitfld.long 0x8 26. "HDSEL,Sets the edge for capturing the horizontal sync signal (HD) from an external module." "0: HD is captured at the rising edge of the camera..,1: HD is captured at the falling edge of the camera.." newline bitfld.long 0x8 25. "FLDSEL,Sets the edge for capturing the field identification signal (FLD) from an external module." "0: FLD is captured at the rising edge of the camera..,1: FLD is captured at the falling edge of the.." bitfld.long 0x8 24. "DSEL,Sets the edge for fetching the image data (D7 to D0) from an external module." "0: D7 to D0 are fetched at the rising edge of the..,1: D7 to D0 are fetched at the falling edge of the.." newline bitfld.long 0x8 16. "FLDPOL,Sets the polarity of the field identification signal (FLD) from an external module." "0: When the FLD signal is high-active the field is..,1: When the FLD signal is low-active the field is.." bitfld.long 0x8 12. "DTIF,Sets the digital image input pins from which data is to be captured." "0: Data input to 8-bit digital image input pins is..,1: Data input to 16-bit digital image input pins is.." newline bitfld.long 0x8 8.--9. "DTARY,Set the input order of the luminance component and chrominance component." "0: 8-bit interface: Image input data is fetched in..,1: 8-bit interface: Image input data is fetched in..,?,?" bitfld.long 0x8 4.--5. "JPG,These bits select the fetched data type." "0: Image capture mode (input data are separated..,1: Data synchronous fetch mode (specified size of..,?,?" newline bitfld.long 0x8 1. "VDPOL,Sets the polarity for detection of the vertical sync signal input from an external module." "0: Vertical sync signal (VD) from an external..,1: Vertical sync signal (VD) from an external.." bitfld.long 0x8 0. "HDPOL,Sets the polarity for detection of the horizontal sync signal input from an external module." "0: Horizontal sync signal (HD) from an external..,1: Horizontal sync signal (HD) from an external.." line.long 0xC "CMCYR,Capture Interface Cycle Register" hexmask.long.word 0xC 16.--29. 1. "VCYL,Vertical HD Count of External Module" hexmask.long.word 0xC 0.--13. 1. "HCYL,Horizontal Cycle Count of External Module" line.long 0x10 "CAMOR,Capture Interface Offset Register" hexmask.long.word 0x10 16.--27. 1. "VOFST,Specify the capture start location in terms of the HD count from a vertical sync signal (1-HD units)." hexmask.long.word 0x10 0.--12. 1. "HOFST,Specify the capture start location in terms of the number of clock cycles from a horizontal sync signal (1-cycle units)." line.long 0x14 "CAPWR,Capture Interface Width Register" hexmask.long.word 0x14 16.--27. 1. "VWDTH,Specify the vertical capture period (4-HD units)." hexmask.long.word 0x14 0.--12. 1. "HWDTH,Specify the horizontal capture period." line.long 0x18 "CAIFR,Capture Interface Input Format Register" bitfld.long 0x18 8. "IFS,Sets the input mode for capturing images." "0: Progressive,1: Interlace" bitfld.long 0x18 4. "CIM,Sets the images to be captured." "0: Capture of frame image (1 VD) or both-field..,1: Capture of one-field image (1 VD)" newline bitfld.long 0x18 0.--1. "FCI,Set the timing to start capturing." "0: Capture starts from the VD input immediately..,1: After the CEU activation input of a top-field..,?,?" group.long 0x28++0x27 line.long 0x0 "CRCNTR,CEU Register Control Register" bitfld.long 0x0 4. "RVS,Sets the timing to switch the register plane in both-field capture." "0: Switches the register plane every 2 VD,1: Switches the register plane every 1 VD" bitfld.long 0x0 1. "RS,Specifies which register plane is used by the CEU in synchronization with VD." "0: Uses plane A of the register,1: Uses plane B of the register" newline bitfld.long 0x0 0. "RC,Specifies switching of the register plane used by the CEU in synchronization with VD." "0: Uses the specified register plane in..,1: Switches the register plane in synchronization.." line.long 0x4 "CRCMPR,CEU Register Forcible Control Register" bitfld.long 0x4 0. "RA,Indicates the register plane currently specified." "0: Specifies plane A of the register,1: Specifies plane B of the register" line.long 0x8 "CFLCR,Capture Filter Control Register" hexmask.long.byte 0x8 28.--31. 1. "VMANT,Mantissa Part of Vertical Scale-Down Factor" hexmask.long.word 0x8 16.--27. 1. "VFRAC,Fraction Part of Vertical Scale-Down Factor" newline hexmask.long.byte 0x8 12.--15. 1. "HMANT,Mantissa Part of Horizontal Scale-Down Factor" hexmask.long.word 0x8 0.--11. 1. "HFRAC,Fraction Part of Horizontal Scale-Down Factor" line.long 0xC "CFSZR,Capture Filter Size Clip Register" hexmask.long.word 0xC 16.--27. 1. "VFCLP,Set the vertical clipping value of the filter output size (4-pixel units)." hexmask.long.word 0xC 0.--11. 1. "HFCLP,Specify the horizontal clipping value of the filter output size (4-pixel units)." line.long 0x10 "CDWDR,Capture Destination Width Register" hexmask.long.word 0x10 0.--12. 1. "CHDW,Specify the horizontal image size in the memory area where the captured image is to be stored (4-byte units)." line.long 0x14 "CDAYR,Capture Data Address Y Register" hexmask.long 0x14 0.--31. 1. "CAYR,Capture Data Address Y" line.long 0x18 "CDACR,Capture Data Address C Register" hexmask.long 0x18 0.--31. 1. "CACR,Capture Data Address C" line.long 0x1C "CDBYR,Capture Data Bottom-Field Address Y Register" hexmask.long 0x1C 0.--31. 1. "CBYR,Set the address for storing the Y (luminance) component data of the captured bottom-field data (4-pixel units)." line.long 0x20 "CDBCR,Capture Data Bottom-Field Address C Register" hexmask.long 0x20 0.--31. 1. "CBCR,Set the address for storing the C (chrominance) component data of the captured bottom-field data (4-pixel units)." line.long 0x24 "CBDSR,Capture Bundle Destination Size Register" hexmask.long.tbyte 0x24 0.--22. 1. "CBVS,Select the number of lines or number of bytes for output to the memory in a bundle write." group.long 0x5C++0xB line.long 0x0 "CFWCR,Firewall Operation Control Register" hexmask.long 0x0 5.--31. 1. "FWV,Specify the upper limit of a write address." bitfld.long 0x0 0. "FWE,With the setting of FWE = 1 when an address exceeds the value set with FWV the address is retained and an interrupt source FWF is set. After this the address is not incremented and data is overwritten on the upper limit address." "0: Firewall is not activated.,1: Firewall is activated." line.long 0x4 "CLFCR,Capture Low-Pass Filter Control Register" bitfld.long 0x4 0. "LPF,Enables or disables operation of the low-pass filter." "0: Low-pass filter not used,1: Low-pass filter used (only in the horizontal.." line.long 0x8 "CDOCR,Capture Data Output Control Register" bitfld.long 0x8 16. "CBE,Controls the number of lines of captured data to be written to the memory." "0: Normal write,1: Bundle write" bitfld.long 0x8 4. "CDS,Sets the image format when outputting the image data captured in the YCbCr422 format to the memory." "0: Converts the YCbCr422 format to the YCbCr420..,1: Outputs data in the YCbCr422 format to the.." newline bitfld.long 0x8 2. "COLS,Controls swapping in 32-bit units for data output from the CEU." "0: Data is not swapped in 32-bit units,1: Data is swapped in 32-bit units" bitfld.long 0x8 1. "COWS,Controls swapping in 16-bit units for data output from the CEU." "0: Data is not swapped in 16-bit units,1: Data is swapped in 16-bit units" newline bitfld.long 0x8 0. "COBS,Controls swapping in 8-bit units for data output from the CEU." "0: Data is not swapped in 8-bit units,1: Data is swapped in 8-bit units" group.long 0x70++0x7 line.long 0x0 "CEIER,Capture Event Interrupt Enable Register" bitfld.long 0x0 25. "NVDIE,Non-VD Interrupt Enable" "0: Disables a non-VD interrupt,1: Enables a non-VD interrupt" bitfld.long 0x0 24. "NHDIE,Non-HD Interrupt Enable" "0: Disables a non-HD interrupt,1: Enables a non-HD interrupt" newline bitfld.long 0x0 23. "FWFIE,FWF Interrupt Enable" "0: Disables a FWF interrupt,1: Enables a FWF interrupt" bitfld.long 0x0 20. "VBPIE,VBP Interrupt Enable" "0: Disables a VBP interrupt,1: Enables a VBP interrupt" newline bitfld.long 0x0 18. "IGVSIE,IGVS Interrupt Enable" "0: Disables an IGVS interrupt,1: Enables an IGVS interrupt" bitfld.long 0x0 17. "IGHSIE,IGHS Interrupt Enable" "0: Disables an IGHS interrupt,1: Enables an IGHS interrupt" newline bitfld.long 0x0 16. "CDTOFIE,CDTOF Interrupt Enable" "0: Disables a CDTOF interrupt,1: Enables a CDTOF interrupt" bitfld.long 0x0 15. "CPBE4IE,CPBE4 Interrupt Enable" "0: Disables a CPBE4 interrupt,1: Enables a CPBE4 interrupt" newline bitfld.long 0x0 14. "CPBE3IE,CPBE3 Interrupt Enable" "0: Disables a CPBE3 interrupt,1: Enables a CPBE3 interrupt" bitfld.long 0x0 13. "CPBE2IE,CPBE2 Interrupt Enable" "0: Disables a CPBE2 interrupt,1: Enables a CPBE2 interrupt" newline bitfld.long 0x0 12. "CPBE1IE,CPBE1 Interrupt Enable" "0: Disables a CPBE1 interrupt,1: Enables a CPBE1 interrupt" bitfld.long 0x0 9. "VDIE,VD Interrupt Enable" "0: Disables a VD interrupt,1: Enables a VD interrupt" newline bitfld.long 0x0 8. "HDIE,HD Interrupt Enable" "0: Disables an HD interrupt,1: Enables an HD interrupt" bitfld.long 0x0 4. "IGRWIE,Register-Access-During-Capture Interrupt Enable" "0: Disables a register-access-during-capture..,1: Enables a register-access-during-capture interrupt" newline bitfld.long 0x0 1. "CFEIE,CFE Interrupt Enable" "0: Disables a CFE interrupt,1: Enables a CFE interrupt" bitfld.long 0x0 0. "CPEIE,One-Frame Capture End Interrupt Enable" "0: Disables a one-frame capture end interrupt,1: Enables a one-frame capture end interrupt" line.long 0x4 "CETCR,Capture Event Flag Clear Register" bitfld.long 0x4 25. "NVD,An interrupt indicating that no VD was input." "0,1" bitfld.long 0x4 24. "NHD,An interrupt indicating that no HD was input." "0,1" newline bitfld.long 0x4 23. "FWF,The interrupt is generated when data is written to the address that exceeds the value specified with CFWCR.FMV." "0,1" bitfld.long 0x4 20. "VBP,An interrupt indicating that VD has been input while the CEU holds data (insufficient vertical-sync front porch)." "0,1" newline bitfld.long 0x4 18. "IGVS,An interrupt generated when the number of VD cycles set in CMCYR differ from the number of VD cycles input from an external module." "0,1" bitfld.long 0x4 17. "IGHS,An interrupt generated when the number of HD cycles set in CMCYR differ from the number of HD cycles input from an external module." "0,1" newline bitfld.long 0x4 16. "CDTOF,An interrupt indicating that data overflowed in the CRAM of the write buffer" "0,1" bitfld.long 0x4 15. "CPBE4,An interrupt indicating that writing to CDBYR2 and CDBCR2 in a bundle write has finished." "0,1" newline bitfld.long 0x4 14. "CPBE3,An interrupt indicating that writing to CDBYR and CDBCR in a bundle write has finished." "0,1" bitfld.long 0x4 13. "CPBE2,An interrupt indicating that writing to CDAYR2 and CDACR2 in a bundle write has finished." "0,1" newline bitfld.long 0x4 12. "CPBE1,An interrupt indicating that writing to CDAYR and CDACR in a bundle write has finished." "0,1" bitfld.long 0x4 9. "VD,An interrupt indicating that VD (vertical sync signal) was input from an external module." "0,1" newline bitfld.long 0x4 8. "HD,An interrupt indicating that HD (horizontal sync signal) was input from an external module." "0,1" bitfld.long 0x4 4. "IGRW,An interrupt indicating that during capturing access was attempted to a register to which writing during operation is prohibited." "0,1" newline bitfld.long 0x4 1. "CFE,An interrupt indicating that capturing of one field from an external module has finished." "0,1" bitfld.long 0x4 0. "CPE,An interrupt indicating that capturing of one frame from an external module has finished." "0,1" rgroup.long 0x7C++0x3 line.long 0x0 "CSTSR,Capture Status Register" bitfld.long 0x0 24. "CRST,Indicates which register plane is currently used." "0: Plane A of the register is being used,1: Plane B of the register is being used" bitfld.long 0x0 16. "CPFLD,Indicates which field is being captured." "0: Bottom field is being captured,1: Top field is being captured" newline bitfld.long 0x0 0. "CPTON,Indicates that the CEU is operating." "0,1" rgroup.long 0x84++0x3 line.long 0x0 "CDSSR,Capture Data Size Register" hexmask.long 0x0 0.--31. 1. "CDSS,Indicate the size of data written to the memory in data enable fetch." group.long 0x90++0x13 line.long 0x0 "CDAYR2,Capture Data Address Y Register 2" hexmask.long 0x0 0.--31. 1. "CAYR2,Capture Data Address Y" line.long 0x4 "CDACR2,Capture Data Address C Register 2" hexmask.long 0x4 0.--31. 1. "CACR2,Capture Data Address C2" line.long 0x8 "CDBYR2,Capture Data Bottom-Field Address Y Register 2" hexmask.long 0x8 0.--31. 1. "CBYR2,Set the address for storing the Y component data of the captured bottom-field data (4-pixel units)." line.long 0xC "CDBCR2,Capture Data Bottom-Field Address C Register 2" hexmask.long 0xC 0.--31. 1. "CBCR2,Set the address for storing the C component data of the captured bottom-field data (4-pixel units)." line.long 0x10 "AXIBUSCTL2,AXI Bus Control Register 2" hexmask.long.byte 0x10 0.--3. 1. "AWCACHE,AWCACHE[3:0] Signals for Capture Engine Unit" group.long 0x1010++0x7 line.long 0x0 "CAMOR_B,Capture Interface Offset Register" hexmask.long.word 0x0 16.--27. 1. "VOFST,Specify the capture start location in terms of the HD count from a vertical sync signal (1-HD units)." hexmask.long.word 0x0 0.--12. 1. "HOFST,Specify the capture start location in terms of the number of clock cycles from a horizontal sync signal (1-cycle units)." line.long 0x4 "CAPWR_B,Capture Interface Width Register" hexmask.long.word 0x4 16.--27. 1. "VWDTH,Specify the vertical capture period (4-HD units)." hexmask.long.word 0x4 0.--12. 1. "HWDTH,Specify the horizontal capture period." group.long 0x1030++0x1F line.long 0x0 "CFLCR_B,Capture Filter Control Register" hexmask.long.byte 0x0 28.--31. 1. "VMANT,Mantissa Part of Vertical Scale-Down Factor" hexmask.long.word 0x0 16.--27. 1. "VFRAC,Fraction Part of Vertical Scale-Down Factor" newline hexmask.long.byte 0x0 12.--15. 1. "HMANT,Mantissa Part of Horizontal Scale-Down Factor" hexmask.long.word 0x0 0.--11. 1. "HFRAC,Fraction Part of Horizontal Scale-Down Factor" line.long 0x4 "CFSZR_B,Capture Filter Size Clip Register" hexmask.long.word 0x4 16.--27. 1. "VFCLP,Set the vertical clipping value of the filter output size (4-pixel units)." hexmask.long.word 0x4 0.--11. 1. "HFCLP,Specify the horizontal clipping value of the filter output size (4-pixel units)." line.long 0x8 "CDWDR_B,Capture Destination Width Register" hexmask.long.word 0x8 0.--12. 1. "CHDW,Specify the horizontal image size in the memory area where the captured image is to be stored (4-byte units)." line.long 0xC "CDAYR_B,Capture Data Address Y Register" hexmask.long 0xC 0.--31. 1. "CAYR,Capture Data Address Y" line.long 0x10 "CDACR_B,Capture Data Address C Register" hexmask.long 0x10 0.--31. 1. "CACR,Capture Data Address C" line.long 0x14 "CDBYR_B,Capture Data Bottom-Field Address Y Register" hexmask.long 0x14 0.--31. 1. "CBYR,Set the address for storing the Y (luminance) component data of the captured bottom-field data (4-pixel units)." line.long 0x18 "CDBCR_B,Capture Data Bottom-Field Address C Register" hexmask.long 0x18 0.--31. 1. "CBCR,Set the address for storing the C (chrominance) component data of the captured bottom-field data (4-pixel units)." line.long 0x1C "CBDSR_B,Capture Bundle Destination Size Register" hexmask.long.tbyte 0x1C 0.--22. 1. "CBVS,Select the number of lines or number of bytes for output to the memory in a bundle write." group.long 0x1060++0x7 line.long 0x0 "CLFCR_B,Capture Low-Pass Filter Control Register" bitfld.long 0x0 0. "LPF,Enables or disables operation of the low-pass filter." "0: Low-pass filter not used,1: Low-pass filter used (only in the horizontal.." line.long 0x4 "CDOCR_B,Capture Data Output Control Register" bitfld.long 0x4 16. "CBE,Controls the number of lines of captured data to be written to the memory." "0: Normal write,1: Bundle write" bitfld.long 0x4 4. "CDS,Sets the image format when outputting the image data captured in the YCbCr422 format to the memory." "0: Converts the YCbCr422 format to the YCbCr420..,1: Outputs data in the YCbCr422 format to the.." newline bitfld.long 0x4 2. "COLS,Controls swapping in 32-bit units for data output from the CEU." "0: Data is not swapped in 32-bit units,1: Data is swapped in 32-bit units" bitfld.long 0x4 1. "COWS,Controls swapping in 16-bit units for data output from the CEU." "0: Data is not swapped in 16-bit units,1: Data is swapped in 16-bit units" newline bitfld.long 0x4 0. "COBS,Controls swapping in 8-bit units for data output from the CEU." "0: Data is not swapped in 8-bit units,1: Data is swapped in 8-bit units" group.long 0x1090++0xF line.long 0x0 "CDAYR2_B,Capture Data Address Y Register 2" hexmask.long 0x0 0.--31. 1. "CAYR2,Capture Data Address Y" line.long 0x4 "CDACR2_B,Capture Data Address C Register 2" hexmask.long 0x4 0.--31. 1. "CACR2,Capture Data Address C2" line.long 0x8 "CDBYR2_B,Capture Data Bottom-Field Address Y Register 2" hexmask.long 0x8 0.--31. 1. "CBYR2,Set the address for storing the Y component data of the captured bottom-field data (4-pixel units)." line.long 0xC "CDBCR2_B,Capture Data Bottom-Field Address C Register 2" hexmask.long 0xC 0.--31. 1. "CBCR2,Set the address for storing the C component data of the captured bottom-field data (4-pixel units)." group.long 0x2010++0x7 line.long 0x0 "CAMOR_M,Capture Interface Offset Register" hexmask.long.word 0x0 16.--27. 1. "VOFST,Specify the capture start location in terms of the HD count from a vertical sync signal (1-HD units)." hexmask.long.word 0x0 0.--12. 1. "HOFST,Specify the capture start location in terms of the number of clock cycles from a horizontal sync signal (1-cycle units)." line.long 0x4 "CAPWR_M,Capture Interface Width Register" hexmask.long.word 0x4 16.--27. 1. "VWDTH,Specify the vertical capture period (4-HD units)." hexmask.long.word 0x4 0.--12. 1. "HWDTH,Specify the horizontal capture period." group.long 0x2030++0x1F line.long 0x0 "CFLCR_M,Capture Filter Control Register" hexmask.long.byte 0x0 28.--31. 1. "VMANT,Mantissa Part of Vertical Scale-Down Factor" hexmask.long.word 0x0 16.--27. 1. "VFRAC,Fraction Part of Vertical Scale-Down Factor" newline hexmask.long.byte 0x0 12.--15. 1. "HMANT,Mantissa Part of Horizontal Scale-Down Factor" hexmask.long.word 0x0 0.--11. 1. "HFRAC,Fraction Part of Horizontal Scale-Down Factor" line.long 0x4 "CFSZR_M,Capture Filter Size Clip Register" hexmask.long.word 0x4 16.--27. 1. "VFCLP,Set the vertical clipping value of the filter output size (4-pixel units)." hexmask.long.word 0x4 0.--11. 1. "HFCLP,Specify the horizontal clipping value of the filter output size (4-pixel units)." line.long 0x8 "CDWDR_M,Capture Destination Width Register" hexmask.long.word 0x8 0.--12. 1. "CHDW,Specify the horizontal image size in the memory area where the captured image is to be stored (4-byte units)." line.long 0xC "CDAYR_M,Capture Data Address Y Register" hexmask.long 0xC 0.--31. 1. "CAYR,Capture Data Address Y" line.long 0x10 "CDACR_M,Capture Data Address C Register" hexmask.long 0x10 0.--31. 1. "CACR,Capture Data Address C" line.long 0x14 "CDBYR_M,Capture Data Bottom-Field Address Y Register" hexmask.long 0x14 0.--31. 1. "CBYR,Set the address for storing the Y (luminance) component data of the captured bottom-field data (4-pixel units)." line.long 0x18 "CDBCR_M,Capture Data Bottom-Field Address C Register" hexmask.long 0x18 0.--31. 1. "CBCR,Set the address for storing the C (chrominance) component data of the captured bottom-field data (4-pixel units)." line.long 0x1C "CBDSR_M,Capture Bundle Destination Size Register" hexmask.long.tbyte 0x1C 0.--22. 1. "CBVS,Select the number of lines or number of bytes for output to the memory in a bundle write." group.long 0x2060++0x7 line.long 0x0 "CLFCR_M,Capture Low-Pass Filter Control Register" bitfld.long 0x0 0. "LPF,Enables or disables operation of the low-pass filter." "0: Low-pass filter not used,1: Low-pass filter used (only in the horizontal.." line.long 0x4 "CDOCR_M,Capture Data Output Control Register" bitfld.long 0x4 16. "CBE,Controls the number of lines of captured data to be written to the memory." "0: Normal write,1: Bundle write" bitfld.long 0x4 4. "CDS,Sets the image format when outputting the image data captured in the YCbCr422 format to the memory." "0: Converts the YCbCr422 format to the YCbCr420..,1: Outputs data in the YCbCr422 format to the.." newline bitfld.long 0x4 2. "COLS,Controls swapping in 32-bit units for data output from the CEU." "0: Data is not swapped in 32-bit units,1: Data is swapped in 32-bit units" bitfld.long 0x4 1. "COWS,Controls swapping in 16-bit units for data output from the CEU." "0: Data is not swapped in 16-bit units,1: Data is swapped in 16-bit units" newline bitfld.long 0x4 0. "COBS,Controls swapping in 8-bit units for data output from the CEU." "0: Data is not swapped in 8-bit units,1: Data is swapped in 8-bit units" group.long 0x2090++0xF line.long 0x0 "CDAYR2_M,Capture Data Address Y Register 2" hexmask.long 0x0 0.--31. 1. "CAYR2,Capture Data Address Y" line.long 0x4 "CDACR2_M,Capture Data Address C Register 2" hexmask.long 0x4 0.--31. 1. "CACR2,Capture Data Address C2" line.long 0x8 "CDBYR2_M,Capture Data Bottom-Field Address Y Register 2" hexmask.long 0x8 0.--31. 1. "CBYR2,Set the address for storing the Y component data of the captured bottom-field data (4-pixel units)." line.long 0xC "CDBCR2_M,Capture Data Bottom-Field Address C Register 2" hexmask.long 0xC 0.--31. 1. "CBCR2,Set the address for storing the C component data of the captured bottom-field data (4-pixel units)." tree.end tree.end tree "CPSCU (CPU System Security Control Unit)" base ad:0x0 tree "CPSCU" base ad:0x40008000 group.long 0x10++0x3 line.long 0x0 "SRAMSAR,SRAM Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "SRAMWTSA,Security attributes of registers for SRAMWTSC" "0: Secure.,1: Non-secure." bitfld.long 0x0 7. "STBRAMSA,Security attributes of registers for StandbySRAM" "0: Secure.,1: Non-secure." newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "SRAMSA1,Security attributes of registers for SRAM1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "SRAMSA0,Security attributes of registers for SRAM0" "0: Secure.,1: Non-secure." group.long 0x30++0x7 line.long 0x0 "DTCSAR,DTC Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "DTCSTSA,DTC Security Attribution" "0: Secure.,1: Non-secure." line.long 0x4 "DMACSAR,DMAC Security Attribution Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x4 0. "DMASTSA,DMAST Security Attribution" "0: Secure.,1: Non-secure." group.long 0x40++0x7 line.long 0x0 "ICUSARA,ICU Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 15. "SAIRQCR15,Security attributes of registers for the IRQCR15 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 14. "SAIRQCR14,Security attributes of registers for the IRQCR14 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 13. "SAIRQCR13,Security attributes of registers for the IRQCR13 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 12. "SAIRQCR12,Security attributes of registers for the IRQCR12 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 11. "SAIRQCR11,Security attributes of registers for the IRQCR11 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 10. "SAIRQCR10,Security attributes of registers for the IRQCR10 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 9. "SAIRQCR9,Security attributes of registers for the IRQCR9 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 8. "SAIRQCR8,Security attributes of registers for the IRQCR8 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 7. "SAIRQCR7,Security attributes of registers for the IRQCR7 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "SAIRQCR6,Security attributes of registers for the IRQCR6 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 5. "SAIRQCR5,Security attributes of registers for the IRQCR5 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 4. "SAIRQCR4,Security attributes of registers for the IRQCR4 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 3. "SAIRQCR3,Security attributes of registers for the IRQCR3 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "SAIRQCR2,Security attributes of registers for the IRQCR2 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 1. "SAIRQCR1,Security attributes of registers for the IRQCR1 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 0. "SAIRQCR0,Security attributes of registers for the IRQCR0 register" "0: Secure.,1: Non-secure." line.long 0x4 "ICUSARB,ICU Security Attribution Register B" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x4 0. "SANMI,Security attributes of registers for non-maskable interrupt" "0: Secure.,1: Non-secure." group.long 0x50++0x7 line.long 0x0 "ICUSARE,ICU Security Attribution Register E" bitfld.long 0x0 31. "SAIIC0WUP,Security attributes of registers for WUPEN0.b31" "0: Secure,1: Non-secure" bitfld.long 0x0 30. "SAAGT1CBWUP,Security attributes of registers for WUPEN0.b30" "0: Secure,1: Non-secure" bitfld.long 0x0 29. "SAAGT1CAWUP,Security attributes of registers for WUPEN0.b29" "0: Secure,1: Non-secure" bitfld.long 0x0 28. "SAAGT1UDWUP,Security attributes of registers for WUPEN0.b28" "0: Secure,1: Non-secure" newline bitfld.long 0x0 27. "SAUSBFS0WUP,Security attributes of registers for WUPEN0.b27" "0: Secure,1: Non-secure" bitfld.long 0x0 26. "SAUSBHS0WUP,Security attributes of registers for WUPEN0.b26" "0: Secure,1: Non-secure" bitfld.long 0x0 25. "SARTCPRDWUP,Security attributes of registers for WUPEN0.b25" "0: Secure,1: Non-secure" bitfld.long 0x0 24. "SARTCALMWUP,Security attributes of registers for WUPEN0.b24" "0: Secure,1: Non-secure" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SAVBATTWUP,Security attributes of registers for WUPEN0.b20" "0: Secure,1: Non-secure" bitfld.long 0x0 19. "SAPVD2WUP,Security attributes of registers for WUPEN0.b19" "0: Secure,1: Non-secure" bitfld.long 0x0 18. "SAPVD1WUP,Security attributes of registers for WUPEN0.b18" "0: Secure,1: Non-secure" newline bitfld.long 0x0 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16. "SAIWDTWUP,Security attributes of registers for WUPEN0.b16" "0: Secure,1: Non-secure" hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "ICUSARF,ICU Security Attribution Register F" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 14. "SAULP1BWUP,Security attributes of registers for WUPEN1.b14" "0: Secure,1: Non-secure" bitfld.long 0x4 13. "SAULP1AWUP,Security attributes of registers for WUPEN1.b13" "0: Secure,1: Non-secure" newline bitfld.long 0x4 12. "SAULP1UWUP,Security attributes of registers for WUPEN1.b12" "0: Secure,1: Non-secure" bitfld.long 0x4 11. "SAI3CWUP,Security attributes of registers for WUPEN1.b11" "0: Secure,1: Non-secure" bitfld.long 0x4 10. "SAULP0BWUP,Security attributes of registers for WUPEN1.b10" "0: Secure,1: Non-secure" bitfld.long 0x4 9. "SAULP0AWUP,Security attributes of registers for WUPEN1.b9" "0: Secure,1: Non-secure" newline bitfld.long 0x4 8. "SAULP0UWUP,Security attributes of registers for WUPEN1.b8" "0: Secure,1: Non-secure" hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "SACOMPHS0WUP,Security attributes of registers for WUPEN1.b3" "0: Secure,1: Non-secure" bitfld.long 0x4 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.long 0x70++0xB line.long 0x0 "ICUSARG,ICU Security Attribution Register G" bitfld.long 0x0 31. "SAIELSR31,Security attributes of registers for IELSR31" "0: Secure.,1: Non-secure." bitfld.long 0x0 30. "SAIELSR30,Security attributes of registers for IELSR30" "0: Secure.,1: Non-secure." bitfld.long 0x0 29. "SAIELSR29,Security attributes of registers for IELSR29" "0: Secure.,1: Non-secure." bitfld.long 0x0 28. "SAIELSR28,Security attributes of registers for IELSR28" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 27. "SAIELSR27,Security attributes of registers for IELSR27" "0: Secure.,1: Non-secure." bitfld.long 0x0 26. "SAIELSR26,Security attributes of registers for IELSR26" "0: Secure.,1: Non-secure." bitfld.long 0x0 25. "SAIELSR25,Security attributes of registers for IELSR25" "0: Secure.,1: Non-secure." bitfld.long 0x0 24. "SAIELSR24,Security attributes of registers for IELSR24" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 23. "SAIELSR23,Security attributes of registers for IELSR23" "0: Secure.,1: Non-secure." bitfld.long 0x0 22. "SAIELSR22,Security attributes of registers for IELSR22" "0: Secure.,1: Non-secure." bitfld.long 0x0 21. "SAIELSR21,Security attributes of registers for IELSR21" "0: Secure.,1: Non-secure." bitfld.long 0x0 20. "SAIELSR20,Security attributes of registers for IELSR20" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 19. "SAIELSR19,Security attributes of registers for IELSR19" "0: Secure.,1: Non-secure." bitfld.long 0x0 18. "SAIELSR18,Security attributes of registers for IELSR18" "0: Secure.,1: Non-secure." bitfld.long 0x0 17. "SAIELSR17,Security attributes of registers for IELSR17" "0: Secure.,1: Non-secure." bitfld.long 0x0 16. "SAIELSR16,Security attributes of registers for IELSR16" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 15. "SAIELSR15,Security attributes of registers for IELSR15" "0: Secure.,1: Non-secure." bitfld.long 0x0 14. "SAIELSR14,Security attributes of registers for IELSR14" "0: Secure.,1: Non-secure." bitfld.long 0x0 13. "SAIELSR13,Security attributes of registers for IELSR13" "0: Secure.,1: Non-secure." bitfld.long 0x0 12. "SAIELSR12,Security attributes of registers for IELSR12" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 11. "SAIELSR11,Security attributes of registers for IELSR11" "0: Secure.,1: Non-secure." bitfld.long 0x0 10. "SAIELSR10,Security attributes of registers for IELSR10" "0: Secure.,1: Non-secure." bitfld.long 0x0 9. "SAIELSR9,Security attributes of registers for IELSR9" "0: Secure.,1: Non-secure." bitfld.long 0x0 8. "SAIELSR8,Security attributes of registers for IELSR8" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 7. "SAIELSR7,Security attributes of registers for IELSR7" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "SAIELSR6,Security attributes of registers for IELSR6" "0: Secure.,1: Non-secure." bitfld.long 0x0 5. "SAIELSR5,Security attributes of registers for IELSR5" "0: Secure.,1: Non-secure." bitfld.long 0x0 4. "SAIELSR4,Security attributes of registers for IELSR4" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 3. "SAIELSR3,Security attributes of registers for IELSR3" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "SAIELSR2,Security attributes of registers for IELSR2" "0: Secure.,1: Non-secure." bitfld.long 0x0 1. "SAIELSR1,Security attributes of registers for IELSR1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "SAIELSR0,Security attributes of registers for IELSR0" "0: Secure.,1: Non-secure." line.long 0x4 "ICUSARH,ICU Security Attribution Register H" bitfld.long 0x4 31. "SAIELSR63,Security attributes of registers for IELSR63" "0: Secure.,1: Non-secure." bitfld.long 0x4 30. "SAIELSR62,Security attributes of registers for IELSR62" "0: Secure.,1: Non-secure." bitfld.long 0x4 29. "SAIELSR61,Security attributes of registers for IELSR61" "0: Secure.,1: Non-secure." bitfld.long 0x4 28. "SAIELSR60,Security attributes of registers for IELSR60" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 27. "SAIELSR59,Security attributes of registers for IELSR59" "0: Secure.,1: Non-secure." bitfld.long 0x4 26. "SAIELSR58,Security attributes of registers for IELSR58" "0: Secure.,1: Non-secure." bitfld.long 0x4 25. "SAIELSR57,Security attributes of registers for IELSR57" "0: Secure.,1: Non-secure." bitfld.long 0x4 24. "SAIELSR56,Security attributes of registers for IELSR56" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 23. "SAIELSR55,Security attributes of registers for IELSR55" "0: Secure.,1: Non-secure." bitfld.long 0x4 22. "SAIELSR54,Security attributes of registers for IELSR54" "0: Secure.,1: Non-secure." bitfld.long 0x4 21. "SAIELSR53,Security attributes of registers for IELSR53" "0: Secure.,1: Non-secure." bitfld.long 0x4 20. "SAIELSR52,Security attributes of registers for IELSR52" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 19. "SAIELSR51,Security attributes of registers for IELSR51" "0: Secure.,1: Non-secure." bitfld.long 0x4 18. "SAIELSR50,Security attributes of registers for IELSR50" "0: Secure.,1: Non-secure." bitfld.long 0x4 17. "SAIELSR49,Security attributes of registers for IELSR49" "0: Secure.,1: Non-secure." bitfld.long 0x4 16. "SAIELSR48,Security attributes of registers for IELSR48" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 15. "SAIELSR47,Security attributes of registers for IELSR47" "0: Secure.,1: Non-secure." bitfld.long 0x4 14. "SAIELSR46,Security attributes of registers for IELSR46" "0: Secure.,1: Non-secure." bitfld.long 0x4 13. "SAIELSR45,Security attributes of registers for IELSR45" "0: Secure.,1: Non-secure." bitfld.long 0x4 12. "SAIELSR44,Security attributes of registers for IELSR44" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 11. "SAIELSR43,Security attributes of registers for IELSR43" "0: Secure.,1: Non-secure." bitfld.long 0x4 10. "SAIELSR42,Security attributes of registers for IELSR42" "0: Secure.,1: Non-secure." bitfld.long 0x4 9. "SAIELSR41,Security attributes of registers for IELSR41" "0: Secure.,1: Non-secure." bitfld.long 0x4 8. "SAIELSR40,Security attributes of registers for IELSR40" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 7. "SAIELSR39,Security attributes of registers for IELSR39" "0: Secure.,1: Non-secure." bitfld.long 0x4 6. "SAIELSR38,Security attributes of registers for IELSR38" "0: Secure.,1: Non-secure." bitfld.long 0x4 5. "SAIELSR37,Security attributes of registers for IELSR37" "0: Secure.,1: Non-secure." bitfld.long 0x4 4. "SAIELSR36,Security attributes of registers for IELSR36" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 3. "SAIELSR35,Security attributes of registers for IELSR35" "0: Secure.,1: Non-secure." bitfld.long 0x4 2. "SAIELSR34,Security attributes of registers for IELSR34" "0: Secure.,1: Non-secure." bitfld.long 0x4 1. "SAIELSR33,Security attributes of registers for IELSR33" "0: Secure.,1: Non-secure." bitfld.long 0x4 0. "SAIELSR32,Security attributes of registers for IELSR32" "0: Secure.,1: Non-secure." line.long 0x8 "ICUSARI,ICU Security Attribution Register I" bitfld.long 0x8 31. "SAIELSR95,Security attributes of registers for IELSR95" "0: Secure.,1: Non-secure." bitfld.long 0x8 30. "SAIELSR94,Security attributes of registers for IELSR94" "0: Secure.,1: Non-secure." bitfld.long 0x8 29. "SAIELSR93,Security attributes of registers for IELSR93" "0: Secure.,1: Non-secure." bitfld.long 0x8 28. "SAIELSR92,Security attributes of registers for IELSR92" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 27. "SAIELSR91,Security attributes of registers for IELSR91" "0: Secure.,1: Non-secure." bitfld.long 0x8 26. "SAIELSR90,Security attributes of registers for IELSR90" "0: Secure.,1: Non-secure." bitfld.long 0x8 25. "SAIELSR89,Security attributes of registers for IELSR89" "0: Secure.,1: Non-secure." bitfld.long 0x8 24. "SAIELSR88,Security attributes of registers for IELSR88" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 23. "SAIELSR87,Security attributes of registers for IELSR87" "0: Secure.,1: Non-secure." bitfld.long 0x8 22. "SAIELSR86,Security attributes of registers for IELSR86" "0: Secure.,1: Non-secure." bitfld.long 0x8 21. "SAIELSR85,Security attributes of registers for IELSR85" "0: Secure.,1: Non-secure." bitfld.long 0x8 20. "SAIELSR84,Security attributes of registers for IELSR84" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 19. "SAIELSR83,Security attributes of registers for IELSR83" "0: Secure.,1: Non-secure." bitfld.long 0x8 18. "SAIELSR82,Security attributes of registers for IELSR82" "0: Secure.,1: Non-secure." bitfld.long 0x8 17. "SAIELSR81,Security attributes of registers for IELSR81" "0: Secure.,1: Non-secure." bitfld.long 0x8 16. "SAIELSR80,Security attributes of registers for IELSR80" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 15. "SAIELSR79,Security attributes of registers for IELSR79" "0: Secure.,1: Non-secure." bitfld.long 0x8 14. "SAIELSR78,Security attributes of registers for IELSR78" "0: Secure.,1: Non-secure." bitfld.long 0x8 13. "SAIELSR77,Security attributes of registers for IELSR77" "0: Secure.,1: Non-secure." bitfld.long 0x8 12. "SAIELSR76,Security attributes of registers for IELSR76" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 11. "SAIELSR75,Security attributes of registers for IELSR75" "0: Secure.,1: Non-secure." bitfld.long 0x8 10. "SAIELSR74,Security attributes of registers for IELSR74" "0: Secure.,1: Non-secure." bitfld.long 0x8 9. "SAIELSR73,Security attributes of registers for IELSR73" "0: Secure.,1: Non-secure." bitfld.long 0x8 8. "SAIELSR72,Security attributes of registers for IELSR72" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 7. "SAIELSR71,Security attributes of registers for IELSR71" "0: Secure.,1: Non-secure." bitfld.long 0x8 6. "SAIELSR70,Security attributes of registers for IELSR70" "0: Secure.,1: Non-secure." bitfld.long 0x8 5. "SAIELSR69,Security attributes of registers for IELSR69" "0: Secure.,1: Non-secure." bitfld.long 0x8 4. "SAIELSR68,Security attributes of registers for IELSR68" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 3. "SAIELSR67,Security attributes of registers for IELSR67" "0: Secure.,1: Non-secure." bitfld.long 0x8 2. "SAIELSR66,Security attributes of registers for IELSR66" "0: Secure.,1: Non-secure." bitfld.long 0x8 1. "SAIELSR65,Security attributes of registers for IELSR65" "0: Secure.,1: Non-secure." bitfld.long 0x8 0. "SAIELSR64,Security attributes of registers for IELSR64" "0: Secure.,1: Non-secure." group.long 0x100++0x7 line.long 0x0 "BUSSARA,BUS Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "QOSSA,Security attributes of registers for QOS register" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "BUSSA0,BUS Security attributes A0." "0: Secure.,1: Non-secure." line.long 0x4 "BUSSARB,BUS Security Attribution Register B" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x4 0. "BUSSB0,BUS Security attributes B0." "0: Secure.,1: Non-secure." group.long 0x110++0x7 line.long 0x0 "BUSSARC,BUS Security Attribution Register C (External BUS)" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "BUSSC0,External BUS Security attributes." "0: Secure.,1: Non-secure." line.long 0x4 "BUSPARC,BUS Privileged Attribution Register C (External BUS)" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 111111111111111. The write value should be 111111111111111." bitfld.long 0x4 0. "BUSPA0,External BUS Privileged attributes." "0: privileged.,1: unprivileged." group.long 0x130++0x7 line.long 0x0 "MMPUSARA,Master MPU Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 7. "MMPUSA7,MMPUA Security attributes7" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "MMPUSA6,MMPUA Security attributes6" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 5. "MMPUSA5,MMPUA Security attributes5" "0: Secure.,1: Non-secure." bitfld.long 0x0 4. "MMPUSA4,MMPUA Security attributes4" "0: Secure.,1: Non-secure." bitfld.long 0x0 3. "MMPUSA3,MMPUA Security attributes3" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "MMPUSA2,MMPUA Security attributes2" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 1. "MMPUSA1,MMPUA Security attributes1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "MMPUSA0,MMPUA Security attributes0" "0: Secure.,1: Non-secure." line.long 0x4 "MMPUSARB,Master MPU Security Attribution Register B" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "MMPUBSA8 ,MMPUB8 Security attributes." "0: Secure.,1: Non-secure." hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 0. "MMPUBSA0,MMPUB0 Security attributes." "0: Secure.,1: Non-secure." group.long 0x180++0x3 line.long 0x0 "DEBUGSAR,Debug Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "DBGSA0,Security attributes of registers for the DEBUG register" "0: Secure,1: Non-secure" group.long 0x1A0++0x3 line.long 0x0 "DMACCHSAR,DMAC channel Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 7. "SADMAC7,Security attributes of registers for DMAC channel 7" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "SADMAC6,Security attributes of registers for DMAC channel 6" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 5. "SADMAC5,Security attributes of registers for DMAC channel 5" "0: Secure.,1: Non-secure." bitfld.long 0x0 4. "SADMAC4,Security attributes of registers for DMAC channel 4" "0: Secure.,1: Non-secure." bitfld.long 0x0 3. "SADMAC3,Security attributes of registers for DMAC channel 3" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "SADMAC2,Security attributes of registers for DMAC channel 2" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 1. "SADMAC1,Security attributes of registers for DMAC channel 1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "SADMAC0,Security attributes of registers for DMAC channel 0" "0: Secure.,1: Non-secure." group.long 0x1F0++0x3 line.long 0x0 "DMACCHPAR,DMAC channel Privileged Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 11111111. The write value should be 11111111." bitfld.long 0x0 7. "PADMAC7,Privileged attributes of registers for DMAC channel 7" "0: privileged,1: unprivileged" bitfld.long 0x0 6. "PADMAC6,Privileged attributes of registers for DMAC channel 6" "0: privileged,1: unprivileged" newline bitfld.long 0x0 5. "PADMAC5,Privileged attributes of registers for DMAC channel 5" "0: privileged,1: unprivileged" bitfld.long 0x0 4. "PADMAC4,Privileged attributes of registers for DMAC channel 4" "0: privileged,1: unprivileged" bitfld.long 0x0 3. "PADMAC3,Privileged attributes of registers for DMAC channel 3" "0: privileged,1: unprivileged" bitfld.long 0x0 2. "PADMAC2,Privileged attributes of registers for DMAC channel 2" "0: privileged,1: unprivileged" newline bitfld.long 0x0 1. "PADMAC1,Privileged attributes of registers for DMAC channel 1" "0: privileged,1: unprivileged" bitfld.long 0x0 0. "PADMAC0,Privileged attributes of registers for DMAC channel 0" "0: privileged,1: unprivileged" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x400)++0x3 line.long 0x0 "SRAMSABAR$1,SRAM Security Attribute Boundary Address Register %s" hexmask.long 0x0 0.--31. 1. "Reserved,These bits are read as 00000000000111111110000000000000. The write value should be 00000000000111111110000000000000." repeat.end group.long 0x420++0x3 line.long 0x0 "STBRAMSABAR,Standby SRAM Security Attribute Boundary Address Register" hexmask.long 0x0 0.--31. 1. "Reserved,These bits are read as 00000000000000000111111110000000. The write value should be 00000000000000000111111110000000." group.long 0x490++0x7 line.long 0x0 "STBRAMPABAR_NS,Standby SRAM Privileged Attribute Boundary Address Register for Non-Secure region" hexmask.long 0x0 0.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000000. The write value should be 00000000000000000000000000000000." line.long 0x4 "STBRAMPABAR_S,Standby SRAM Privileged Attribute Boundary Address Register for Secure region" hexmask.long 0x4 0.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000000. The write value should be 00000000000000000000000000000000." group.long 0x600++0x3 line.long 0x0 "TEVTRCR,Trusted EVenT Route Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "TEVTE,Trusted Event Route Control" "0: Disable,1: Enable" rgroup.byte 0xD00++0x0 line.byte 0x0 "BUSMEMERRSTS,BUS Memory Error Status Register" bitfld.byte 0x0 3. "SRAMESTS,SRAM Error STatuS" "0: No error occurred,1: Error occurred." bitfld.byte 0x0 2. "LMEM1ESTS,Local_MEMory1 Error STatuS" "0: No error occurred,1: Error occurred." bitfld.byte 0x0 1. "LMEM0ESTS,Local_MEMory0 Error STatuS" "0: No error occurred,1: Error occurred." bitfld.byte 0x0 0. "BUSESTS,BUS Error STatuS" "0: No error occurred,1: Error occurred." tree.end tree "CPSCU_NS" base ad:0x50008000 group.long 0x10++0x3 line.long 0x0 "SRAMSAR,SRAM Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "SRAMWTSA,Security attributes of registers for SRAMWTSC" "0: Secure.,1: Non-secure." bitfld.long 0x0 7. "STBRAMSA,Security attributes of registers for StandbySRAM" "0: Secure.,1: Non-secure." newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "SRAMSA1,Security attributes of registers for SRAM1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "SRAMSA0,Security attributes of registers for SRAM0" "0: Secure.,1: Non-secure." group.long 0x30++0x7 line.long 0x0 "DTCSAR,DTC Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "DTCSTSA,DTC Security Attribution" "0: Secure.,1: Non-secure." line.long 0x4 "DMACSAR,DMAC Security Attribution Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x4 0. "DMASTSA,DMAST Security Attribution" "0: Secure.,1: Non-secure." group.long 0x40++0x7 line.long 0x0 "ICUSARA,ICU Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 15. "SAIRQCR15,Security attributes of registers for the IRQCR15 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 14. "SAIRQCR14,Security attributes of registers for the IRQCR14 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 13. "SAIRQCR13,Security attributes of registers for the IRQCR13 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 12. "SAIRQCR12,Security attributes of registers for the IRQCR12 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 11. "SAIRQCR11,Security attributes of registers for the IRQCR11 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 10. "SAIRQCR10,Security attributes of registers for the IRQCR10 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 9. "SAIRQCR9,Security attributes of registers for the IRQCR9 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 8. "SAIRQCR8,Security attributes of registers for the IRQCR8 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 7. "SAIRQCR7,Security attributes of registers for the IRQCR7 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "SAIRQCR6,Security attributes of registers for the IRQCR6 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 5. "SAIRQCR5,Security attributes of registers for the IRQCR5 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 4. "SAIRQCR4,Security attributes of registers for the IRQCR4 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 3. "SAIRQCR3,Security attributes of registers for the IRQCR3 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "SAIRQCR2,Security attributes of registers for the IRQCR2 register" "0: Secure.,1: Non-secure." bitfld.long 0x0 1. "SAIRQCR1,Security attributes of registers for the IRQCR1 register" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 0. "SAIRQCR0,Security attributes of registers for the IRQCR0 register" "0: Secure.,1: Non-secure." line.long 0x4 "ICUSARB,ICU Security Attribution Register B" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x4 0. "SANMI,Security attributes of registers for non-maskable interrupt" "0: Secure.,1: Non-secure." group.long 0x50++0x7 line.long 0x0 "ICUSARE,ICU Security Attribution Register E" bitfld.long 0x0 31. "SAIIC0WUP,Security attributes of registers for WUPEN0.b31" "0: Secure,1: Non-secure" bitfld.long 0x0 30. "SAAGT1CBWUP,Security attributes of registers for WUPEN0.b30" "0: Secure,1: Non-secure" bitfld.long 0x0 29. "SAAGT1CAWUP,Security attributes of registers for WUPEN0.b29" "0: Secure,1: Non-secure" bitfld.long 0x0 28. "SAAGT1UDWUP,Security attributes of registers for WUPEN0.b28" "0: Secure,1: Non-secure" newline bitfld.long 0x0 27. "SAUSBFS0WUP,Security attributes of registers for WUPEN0.b27" "0: Secure,1: Non-secure" bitfld.long 0x0 26. "SAUSBHS0WUP,Security attributes of registers for WUPEN0.b26" "0: Secure,1: Non-secure" bitfld.long 0x0 25. "SARTCPRDWUP,Security attributes of registers for WUPEN0.b25" "0: Secure,1: Non-secure" bitfld.long 0x0 24. "SARTCALMWUP,Security attributes of registers for WUPEN0.b24" "0: Secure,1: Non-secure" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SAVBATTWUP,Security attributes of registers for WUPEN0.b20" "0: Secure,1: Non-secure" bitfld.long 0x0 19. "SAPVD2WUP,Security attributes of registers for WUPEN0.b19" "0: Secure,1: Non-secure" bitfld.long 0x0 18. "SAPVD1WUP,Security attributes of registers for WUPEN0.b18" "0: Secure,1: Non-secure" newline bitfld.long 0x0 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16. "SAIWDTWUP,Security attributes of registers for WUPEN0.b16" "0: Secure,1: Non-secure" hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "ICUSARF,ICU Security Attribution Register F" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 14. "SAULP1BWUP,Security attributes of registers for WUPEN1.b14" "0: Secure,1: Non-secure" bitfld.long 0x4 13. "SAULP1AWUP,Security attributes of registers for WUPEN1.b13" "0: Secure,1: Non-secure" newline bitfld.long 0x4 12. "SAULP1UWUP,Security attributes of registers for WUPEN1.b12" "0: Secure,1: Non-secure" bitfld.long 0x4 11. "SAI3CWUP,Security attributes of registers for WUPEN1.b11" "0: Secure,1: Non-secure" bitfld.long 0x4 10. "SAULP0BWUP,Security attributes of registers for WUPEN1.b10" "0: Secure,1: Non-secure" bitfld.long 0x4 9. "SAULP0AWUP,Security attributes of registers for WUPEN1.b9" "0: Secure,1: Non-secure" newline bitfld.long 0x4 8. "SAULP0UWUP,Security attributes of registers for WUPEN1.b8" "0: Secure,1: Non-secure" hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "SACOMPHS0WUP,Security attributes of registers for WUPEN1.b3" "0: Secure,1: Non-secure" bitfld.long 0x4 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.long 0x70++0xB line.long 0x0 "ICUSARG,ICU Security Attribution Register G" bitfld.long 0x0 31. "SAIELSR31,Security attributes of registers for IELSR31" "0: Secure.,1: Non-secure." bitfld.long 0x0 30. "SAIELSR30,Security attributes of registers for IELSR30" "0: Secure.,1: Non-secure." bitfld.long 0x0 29. "SAIELSR29,Security attributes of registers for IELSR29" "0: Secure.,1: Non-secure." bitfld.long 0x0 28. "SAIELSR28,Security attributes of registers for IELSR28" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 27. "SAIELSR27,Security attributes of registers for IELSR27" "0: Secure.,1: Non-secure." bitfld.long 0x0 26. "SAIELSR26,Security attributes of registers for IELSR26" "0: Secure.,1: Non-secure." bitfld.long 0x0 25. "SAIELSR25,Security attributes of registers for IELSR25" "0: Secure.,1: Non-secure." bitfld.long 0x0 24. "SAIELSR24,Security attributes of registers for IELSR24" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 23. "SAIELSR23,Security attributes of registers for IELSR23" "0: Secure.,1: Non-secure." bitfld.long 0x0 22. "SAIELSR22,Security attributes of registers for IELSR22" "0: Secure.,1: Non-secure." bitfld.long 0x0 21. "SAIELSR21,Security attributes of registers for IELSR21" "0: Secure.,1: Non-secure." bitfld.long 0x0 20. "SAIELSR20,Security attributes of registers for IELSR20" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 19. "SAIELSR19,Security attributes of registers for IELSR19" "0: Secure.,1: Non-secure." bitfld.long 0x0 18. "SAIELSR18,Security attributes of registers for IELSR18" "0: Secure.,1: Non-secure." bitfld.long 0x0 17. "SAIELSR17,Security attributes of registers for IELSR17" "0: Secure.,1: Non-secure." bitfld.long 0x0 16. "SAIELSR16,Security attributes of registers for IELSR16" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 15. "SAIELSR15,Security attributes of registers for IELSR15" "0: Secure.,1: Non-secure." bitfld.long 0x0 14. "SAIELSR14,Security attributes of registers for IELSR14" "0: Secure.,1: Non-secure." bitfld.long 0x0 13. "SAIELSR13,Security attributes of registers for IELSR13" "0: Secure.,1: Non-secure." bitfld.long 0x0 12. "SAIELSR12,Security attributes of registers for IELSR12" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 11. "SAIELSR11,Security attributes of registers for IELSR11" "0: Secure.,1: Non-secure." bitfld.long 0x0 10. "SAIELSR10,Security attributes of registers for IELSR10" "0: Secure.,1: Non-secure." bitfld.long 0x0 9. "SAIELSR9,Security attributes of registers for IELSR9" "0: Secure.,1: Non-secure." bitfld.long 0x0 8. "SAIELSR8,Security attributes of registers for IELSR8" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 7. "SAIELSR7,Security attributes of registers for IELSR7" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "SAIELSR6,Security attributes of registers for IELSR6" "0: Secure.,1: Non-secure." bitfld.long 0x0 5. "SAIELSR5,Security attributes of registers for IELSR5" "0: Secure.,1: Non-secure." bitfld.long 0x0 4. "SAIELSR4,Security attributes of registers for IELSR4" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 3. "SAIELSR3,Security attributes of registers for IELSR3" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "SAIELSR2,Security attributes of registers for IELSR2" "0: Secure.,1: Non-secure." bitfld.long 0x0 1. "SAIELSR1,Security attributes of registers for IELSR1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "SAIELSR0,Security attributes of registers for IELSR0" "0: Secure.,1: Non-secure." line.long 0x4 "ICUSARH,ICU Security Attribution Register H" bitfld.long 0x4 31. "SAIELSR63,Security attributes of registers for IELSR63" "0: Secure.,1: Non-secure." bitfld.long 0x4 30. "SAIELSR62,Security attributes of registers for IELSR62" "0: Secure.,1: Non-secure." bitfld.long 0x4 29. "SAIELSR61,Security attributes of registers for IELSR61" "0: Secure.,1: Non-secure." bitfld.long 0x4 28. "SAIELSR60,Security attributes of registers for IELSR60" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 27. "SAIELSR59,Security attributes of registers for IELSR59" "0: Secure.,1: Non-secure." bitfld.long 0x4 26. "SAIELSR58,Security attributes of registers for IELSR58" "0: Secure.,1: Non-secure." bitfld.long 0x4 25. "SAIELSR57,Security attributes of registers for IELSR57" "0: Secure.,1: Non-secure." bitfld.long 0x4 24. "SAIELSR56,Security attributes of registers for IELSR56" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 23. "SAIELSR55,Security attributes of registers for IELSR55" "0: Secure.,1: Non-secure." bitfld.long 0x4 22. "SAIELSR54,Security attributes of registers for IELSR54" "0: Secure.,1: Non-secure." bitfld.long 0x4 21. "SAIELSR53,Security attributes of registers for IELSR53" "0: Secure.,1: Non-secure." bitfld.long 0x4 20. "SAIELSR52,Security attributes of registers for IELSR52" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 19. "SAIELSR51,Security attributes of registers for IELSR51" "0: Secure.,1: Non-secure." bitfld.long 0x4 18. "SAIELSR50,Security attributes of registers for IELSR50" "0: Secure.,1: Non-secure." bitfld.long 0x4 17. "SAIELSR49,Security attributes of registers for IELSR49" "0: Secure.,1: Non-secure." bitfld.long 0x4 16. "SAIELSR48,Security attributes of registers for IELSR48" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 15. "SAIELSR47,Security attributes of registers for IELSR47" "0: Secure.,1: Non-secure." bitfld.long 0x4 14. "SAIELSR46,Security attributes of registers for IELSR46" "0: Secure.,1: Non-secure." bitfld.long 0x4 13. "SAIELSR45,Security attributes of registers for IELSR45" "0: Secure.,1: Non-secure." bitfld.long 0x4 12. "SAIELSR44,Security attributes of registers for IELSR44" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 11. "SAIELSR43,Security attributes of registers for IELSR43" "0: Secure.,1: Non-secure." bitfld.long 0x4 10. "SAIELSR42,Security attributes of registers for IELSR42" "0: Secure.,1: Non-secure." bitfld.long 0x4 9. "SAIELSR41,Security attributes of registers for IELSR41" "0: Secure.,1: Non-secure." bitfld.long 0x4 8. "SAIELSR40,Security attributes of registers for IELSR40" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 7. "SAIELSR39,Security attributes of registers for IELSR39" "0: Secure.,1: Non-secure." bitfld.long 0x4 6. "SAIELSR38,Security attributes of registers for IELSR38" "0: Secure.,1: Non-secure." bitfld.long 0x4 5. "SAIELSR37,Security attributes of registers for IELSR37" "0: Secure.,1: Non-secure." bitfld.long 0x4 4. "SAIELSR36,Security attributes of registers for IELSR36" "0: Secure.,1: Non-secure." newline bitfld.long 0x4 3. "SAIELSR35,Security attributes of registers for IELSR35" "0: Secure.,1: Non-secure." bitfld.long 0x4 2. "SAIELSR34,Security attributes of registers for IELSR34" "0: Secure.,1: Non-secure." bitfld.long 0x4 1. "SAIELSR33,Security attributes of registers for IELSR33" "0: Secure.,1: Non-secure." bitfld.long 0x4 0. "SAIELSR32,Security attributes of registers for IELSR32" "0: Secure.,1: Non-secure." line.long 0x8 "ICUSARI,ICU Security Attribution Register I" bitfld.long 0x8 31. "SAIELSR95,Security attributes of registers for IELSR95" "0: Secure.,1: Non-secure." bitfld.long 0x8 30. "SAIELSR94,Security attributes of registers for IELSR94" "0: Secure.,1: Non-secure." bitfld.long 0x8 29. "SAIELSR93,Security attributes of registers for IELSR93" "0: Secure.,1: Non-secure." bitfld.long 0x8 28. "SAIELSR92,Security attributes of registers for IELSR92" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 27. "SAIELSR91,Security attributes of registers for IELSR91" "0: Secure.,1: Non-secure." bitfld.long 0x8 26. "SAIELSR90,Security attributes of registers for IELSR90" "0: Secure.,1: Non-secure." bitfld.long 0x8 25. "SAIELSR89,Security attributes of registers for IELSR89" "0: Secure.,1: Non-secure." bitfld.long 0x8 24. "SAIELSR88,Security attributes of registers for IELSR88" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 23. "SAIELSR87,Security attributes of registers for IELSR87" "0: Secure.,1: Non-secure." bitfld.long 0x8 22. "SAIELSR86,Security attributes of registers for IELSR86" "0: Secure.,1: Non-secure." bitfld.long 0x8 21. "SAIELSR85,Security attributes of registers for IELSR85" "0: Secure.,1: Non-secure." bitfld.long 0x8 20. "SAIELSR84,Security attributes of registers for IELSR84" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 19. "SAIELSR83,Security attributes of registers for IELSR83" "0: Secure.,1: Non-secure." bitfld.long 0x8 18. "SAIELSR82,Security attributes of registers for IELSR82" "0: Secure.,1: Non-secure." bitfld.long 0x8 17. "SAIELSR81,Security attributes of registers for IELSR81" "0: Secure.,1: Non-secure." bitfld.long 0x8 16. "SAIELSR80,Security attributes of registers for IELSR80" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 15. "SAIELSR79,Security attributes of registers for IELSR79" "0: Secure.,1: Non-secure." bitfld.long 0x8 14. "SAIELSR78,Security attributes of registers for IELSR78" "0: Secure.,1: Non-secure." bitfld.long 0x8 13. "SAIELSR77,Security attributes of registers for IELSR77" "0: Secure.,1: Non-secure." bitfld.long 0x8 12. "SAIELSR76,Security attributes of registers for IELSR76" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 11. "SAIELSR75,Security attributes of registers for IELSR75" "0: Secure.,1: Non-secure." bitfld.long 0x8 10. "SAIELSR74,Security attributes of registers for IELSR74" "0: Secure.,1: Non-secure." bitfld.long 0x8 9. "SAIELSR73,Security attributes of registers for IELSR73" "0: Secure.,1: Non-secure." bitfld.long 0x8 8. "SAIELSR72,Security attributes of registers for IELSR72" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 7. "SAIELSR71,Security attributes of registers for IELSR71" "0: Secure.,1: Non-secure." bitfld.long 0x8 6. "SAIELSR70,Security attributes of registers for IELSR70" "0: Secure.,1: Non-secure." bitfld.long 0x8 5. "SAIELSR69,Security attributes of registers for IELSR69" "0: Secure.,1: Non-secure." bitfld.long 0x8 4. "SAIELSR68,Security attributes of registers for IELSR68" "0: Secure.,1: Non-secure." newline bitfld.long 0x8 3. "SAIELSR67,Security attributes of registers for IELSR67" "0: Secure.,1: Non-secure." bitfld.long 0x8 2. "SAIELSR66,Security attributes of registers for IELSR66" "0: Secure.,1: Non-secure." bitfld.long 0x8 1. "SAIELSR65,Security attributes of registers for IELSR65" "0: Secure.,1: Non-secure." bitfld.long 0x8 0. "SAIELSR64,Security attributes of registers for IELSR64" "0: Secure.,1: Non-secure." group.long 0x100++0x7 line.long 0x0 "BUSSARA,BUS Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "QOSSA,Security attributes of registers for QOS register" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "BUSSA0,BUS Security attributes A0." "0: Secure.,1: Non-secure." line.long 0x4 "BUSSARB,BUS Security Attribution Register B" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x4 0. "BUSSB0,BUS Security attributes B0." "0: Secure.,1: Non-secure." group.long 0x110++0x7 line.long 0x0 "BUSSARC,BUS Security Attribution Register C (External BUS)" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "BUSSC0,External BUS Security attributes." "0: Secure.,1: Non-secure." line.long 0x4 "BUSPARC,BUS Privileged Attribution Register C (External BUS)" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 111111111111111. The write value should be 111111111111111." bitfld.long 0x4 0. "BUSPA0,External BUS Privileged attributes." "0: privileged.,1: unprivileged." group.long 0x130++0x7 line.long 0x0 "MMPUSARA,Master MPU Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 7. "MMPUSA7,MMPUA Security attributes7" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "MMPUSA6,MMPUA Security attributes6" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 5. "MMPUSA5,MMPUA Security attributes5" "0: Secure.,1: Non-secure." bitfld.long 0x0 4. "MMPUSA4,MMPUA Security attributes4" "0: Secure.,1: Non-secure." bitfld.long 0x0 3. "MMPUSA3,MMPUA Security attributes3" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "MMPUSA2,MMPUA Security attributes2" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 1. "MMPUSA1,MMPUA Security attributes1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "MMPUSA0,MMPUA Security attributes0" "0: Secure.,1: Non-secure." line.long 0x4 "MMPUSARB,Master MPU Security Attribution Register B" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "MMPUBSA8 ,MMPUB8 Security attributes." "0: Secure.,1: Non-secure." hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 0. "MMPUBSA0,MMPUB0 Security attributes." "0: Secure.,1: Non-secure." group.long 0x180++0x3 line.long 0x0 "DEBUGSAR,Debug Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "DBGSA0,Security attributes of registers for the DEBUG register" "0: Secure,1: Non-secure" group.long 0x1A0++0x3 line.long 0x0 "DMACCHSAR,DMAC channel Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 7. "SADMAC7,Security attributes of registers for DMAC channel 7" "0: Secure.,1: Non-secure." bitfld.long 0x0 6. "SADMAC6,Security attributes of registers for DMAC channel 6" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 5. "SADMAC5,Security attributes of registers for DMAC channel 5" "0: Secure.,1: Non-secure." bitfld.long 0x0 4. "SADMAC4,Security attributes of registers for DMAC channel 4" "0: Secure.,1: Non-secure." bitfld.long 0x0 3. "SADMAC3,Security attributes of registers for DMAC channel 3" "0: Secure.,1: Non-secure." bitfld.long 0x0 2. "SADMAC2,Security attributes of registers for DMAC channel 2" "0: Secure.,1: Non-secure." newline bitfld.long 0x0 1. "SADMAC1,Security attributes of registers for DMAC channel 1" "0: Secure.,1: Non-secure." bitfld.long 0x0 0. "SADMAC0,Security attributes of registers for DMAC channel 0" "0: Secure.,1: Non-secure." group.long 0x1F0++0x3 line.long 0x0 "DMACCHPAR,DMAC channel Privileged Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 11111111. The write value should be 11111111." bitfld.long 0x0 7. "PADMAC7,Privileged attributes of registers for DMAC channel 7" "0: privileged,1: unprivileged" bitfld.long 0x0 6. "PADMAC6,Privileged attributes of registers for DMAC channel 6" "0: privileged,1: unprivileged" newline bitfld.long 0x0 5. "PADMAC5,Privileged attributes of registers for DMAC channel 5" "0: privileged,1: unprivileged" bitfld.long 0x0 4. "PADMAC4,Privileged attributes of registers for DMAC channel 4" "0: privileged,1: unprivileged" bitfld.long 0x0 3. "PADMAC3,Privileged attributes of registers for DMAC channel 3" "0: privileged,1: unprivileged" bitfld.long 0x0 2. "PADMAC2,Privileged attributes of registers for DMAC channel 2" "0: privileged,1: unprivileged" newline bitfld.long 0x0 1. "PADMAC1,Privileged attributes of registers for DMAC channel 1" "0: privileged,1: unprivileged" bitfld.long 0x0 0. "PADMAC0,Privileged attributes of registers for DMAC channel 0" "0: privileged,1: unprivileged" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x400)++0x3 line.long 0x0 "SRAMSABAR$1,SRAM Security Attribute Boundary Address Register %s" hexmask.long 0x0 0.--31. 1. "Reserved,These bits are read as 00000000000111111110000000000000. The write value should be 00000000000111111110000000000000." repeat.end group.long 0x420++0x3 line.long 0x0 "STBRAMSABAR,Standby SRAM Security Attribute Boundary Address Register" hexmask.long 0x0 0.--31. 1. "Reserved,These bits are read as 00000000000000000111111110000000. The write value should be 00000000000000000111111110000000." group.long 0x490++0x7 line.long 0x0 "STBRAMPABAR_NS,Standby SRAM Privileged Attribute Boundary Address Register for Non-Secure region" hexmask.long 0x0 0.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000000. The write value should be 00000000000000000000000000000000." line.long 0x4 "STBRAMPABAR_S,Standby SRAM Privileged Attribute Boundary Address Register for Secure region" hexmask.long 0x4 0.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000000. The write value should be 00000000000000000000000000000000." group.long 0x600++0x3 line.long 0x0 "TEVTRCR,Trusted EVenT Route Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "TEVTE,Trusted Event Route Control" "0: Disable,1: Enable" rgroup.byte 0xD00++0x0 line.byte 0x0 "BUSMEMERRSTS,BUS Memory Error Status Register" bitfld.byte 0x0 3. "SRAMESTS,SRAM Error STatuS" "0: No error occurred,1: Error occurred." bitfld.byte 0x0 2. "LMEM1ESTS,Local_MEMory1 Error STatuS" "0: No error occurred,1: Error occurred." bitfld.byte 0x0 1. "LMEM0ESTS,Local_MEMory0 Error STatuS" "0: No error occurred,1: Error occurred." bitfld.byte 0x0 0. "BUSESTS,BUS Error STatuS" "0: No error occurred,1: Error occurred." tree.end tree.end tree "CPU_DBG (Debug Function)" base ad:0x0 tree "CPU_DBG" base ad:0x4001B000 rgroup.long 0x0++0x3 line.long 0x0 "DBGSTR,Debug Status Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 29. "CDBGPWRUPACK,Debug power-up acknowledge" "0: Debug power-up request is not acknowledged,1: Debug power-up request is acknowledged" newline bitfld.long 0x0 28. "CDBGPWRUPREQ,Debug power-up request" "0: OCD is not requesting debug power-up,1: OCD is requesting debug power-up" hexmask.long 0x0 0.--27. 1. "Reserved,These bits are read as 0000000000000000000000000000." group.long 0x10++0x3 line.long 0x0 "DBGSTOPCR,Debug Stop Control Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 18.--30. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x0 17. "DBGSTOP_PVD,Mask bit for PVDn (n!=0) reset/interrupt" "0: Enable PVDn (n!=0) reset/interrupt,1: Mask PVDn (n!=0) reset/interrupt" bitfld.long 0x0 16. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x0 1. "DBGSTOP_WDT0,Mask bit for WDT0 reset/interrupt in the OCD run modeIn the OCD break mode the reset/interrupt is masked and WDT0 counter is stopped regardless of this bit value." "0: Enable WDT0 reset/interrupt,1: Mask WDT0 reset/interrupt and stop WDT0 counter" newline bitfld.long 0x0 0. "DBGSTOP_IWDT,Mask bit for IWDT reset/interrupt in the OCD run modeIn the OCD break mode the reset/interrupt is masked and IWDT counter is stopped regardless of this bit value." "0: Enable IWDT reset/interrupt,1: Mask IWDT reset/interrupt and stop IWDT counter" group.long 0x20++0x7 line.long 0x0 "DBGAUTH0,Debug Authentication Control Register 0" bitfld.long 0x0 31. "SWDBG,Software control of debug function" "0: Enabled,1: Disabled" hexmask.long.word 0x0 17.--30. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 16. "DEVICEEN,APB-AP (AP1) authentication" "0: Enabled,1: Disabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "DBGENAP0,CPU0 AHB-AP (AP0) debug enable" "0: Enabled,1: Disabled" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "NIDEN0,CPU0 non-invasive debug enable" "0: Enabled,1: Disabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "DBGEN0,CPU0 invasive debug enable" "0: Enabled,1: Disabled" line.long 0x4 "DBGAUTH1,Debug Authentication Control Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 8. "SPIDENAP0,CPU0 AHB-AP (AP0) debug enable" "0: Enabled,1: Disabled" hexmask.long.byte 0x4 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.long 0x30++0x7 line.long 0x0 "TRPORTCR,Trace Port Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 2.--3. "DRV,Port Drive Capability Control indicate trace port buffer speed" "0: Low,1: Middle,?,?" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "OE,Data Out Enable bit indicates whether Trace Clock Trace Data and SWO outputs are enabled or not" "0: Output disabled,1: Output enabled" line.long 0x4 "TRACECR,Trace Control Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x4 0. "TSCLKCHGE,Timestamp clock ratio change is notified to trace data" "0: Disabled,1: Enabled" group.long 0x40++0x3 line.long 0x0 "CACHEDBGCR,Trace Port Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "L1RSTDIS,Disable L1 cache automatic invalidation" "0: Enable automatic invalidation of the L1 cache,1: Disable automatic invalidation of the L1 cache" group.long 0x100++0x3 line.long 0x0 "ALCTRL,Authentication Level Control Register" bitfld.long 0x0 30.--31. "FAILCNT,Number of times responding incorrect response data" "0: No responding incorrect response data,1: First time of responding incorrect response data,?,?" hexmask.long.word 0x0 16.--29. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 0.--7. 1. "AL,AL monitor" group.long 0x200++0x3 line.long 0x0 "FSBLSTAT,First Stage Boot Loader Status Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." rbitfld.long 0x0 8.--10. "FSBLCLK,System clock frequency selection during FSBL execution" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "RS,FSBL result status." "0: FSBL failed.,1: FSBL passed." newline bitfld.long 0x0 0. "CS,FSBL completion status." "0: FSBL is executing.,1: FSBL execution is complete." group.long 0x300++0x3 line.long 0x0 "DBGMOCOEN,MOCO Enable Request Register for Debug" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "MOCOEN,MOCO enable request" "0: No request MOCO enable,1: Request MOCO enable" group.long 0x310++0x3 line.long 0x0 "DBGFCLKSEL,Flash Sequencer Clock Select Register for Debug" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "FCLKSEL,Flash sequencer clock select" "0: FCLK,1: MOCO" tree.end tree "CPU_DBG_NS" base ad:0x5001B000 rgroup.long 0x0++0x3 line.long 0x0 "DBGSTR,Debug Status Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 29. "CDBGPWRUPACK,Debug power-up acknowledge" "0: Debug power-up request is not acknowledged,1: Debug power-up request is acknowledged" newline bitfld.long 0x0 28. "CDBGPWRUPREQ,Debug power-up request" "0: OCD is not requesting debug power-up,1: OCD is requesting debug power-up" hexmask.long 0x0 0.--27. 1. "Reserved,These bits are read as 0000000000000000000000000000." group.long 0x10++0x3 line.long 0x0 "DBGSTOPCR,Debug Stop Control Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 18.--30. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x0 17. "DBGSTOP_PVD,Mask bit for PVDn (n!=0) reset/interrupt" "0: Enable PVDn (n!=0) reset/interrupt,1: Mask PVDn (n!=0) reset/interrupt" bitfld.long 0x0 16. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x0 1. "DBGSTOP_WDT0,Mask bit for WDT0 reset/interrupt in the OCD run modeIn the OCD break mode the reset/interrupt is masked and WDT0 counter is stopped regardless of this bit value." "0: Enable WDT0 reset/interrupt,1: Mask WDT0 reset/interrupt and stop WDT0 counter" newline bitfld.long 0x0 0. "DBGSTOP_IWDT,Mask bit for IWDT reset/interrupt in the OCD run modeIn the OCD break mode the reset/interrupt is masked and IWDT counter is stopped regardless of this bit value." "0: Enable IWDT reset/interrupt,1: Mask IWDT reset/interrupt and stop IWDT counter" group.long 0x20++0x7 line.long 0x0 "DBGAUTH0,Debug Authentication Control Register 0" bitfld.long 0x0 31. "SWDBG,Software control of debug function" "0: Enabled,1: Disabled" hexmask.long.word 0x0 17.--30. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 16. "DEVICEEN,APB-AP (AP1) authentication" "0: Enabled,1: Disabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "DBGENAP0,CPU0 AHB-AP (AP0) debug enable" "0: Enabled,1: Disabled" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "NIDEN0,CPU0 non-invasive debug enable" "0: Enabled,1: Disabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "DBGEN0,CPU0 invasive debug enable" "0: Enabled,1: Disabled" line.long 0x4 "DBGAUTH1,Debug Authentication Control Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 8. "SPIDENAP0,CPU0 AHB-AP (AP0) debug enable" "0: Enabled,1: Disabled" hexmask.long.byte 0x4 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.long 0x30++0x7 line.long 0x0 "TRPORTCR,Trace Port Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 2.--3. "DRV,Port Drive Capability Control indicate trace port buffer speed" "0: Low,1: Middle,?,?" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "OE,Data Out Enable bit indicates whether Trace Clock Trace Data and SWO outputs are enabled or not" "0: Output disabled,1: Output enabled" line.long 0x4 "TRACECR,Trace Control Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x4 0. "TSCLKCHGE,Timestamp clock ratio change is notified to trace data" "0: Disabled,1: Enabled" group.long 0x40++0x3 line.long 0x0 "CACHEDBGCR,Trace Port Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "L1RSTDIS,Disable L1 cache automatic invalidation" "0: Enable automatic invalidation of the L1 cache,1: Disable automatic invalidation of the L1 cache" group.long 0x100++0x3 line.long 0x0 "ALCTRL,Authentication Level Control Register" bitfld.long 0x0 30.--31. "FAILCNT,Number of times responding incorrect response data" "0: No responding incorrect response data,1: First time of responding incorrect response data,?,?" hexmask.long.word 0x0 16.--29. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 0.--7. 1. "AL,AL monitor" group.long 0x200++0x3 line.long 0x0 "FSBLSTAT,First Stage Boot Loader Status Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." rbitfld.long 0x0 8.--10. "FSBLCLK,System clock frequency selection during FSBL execution" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "RS,FSBL result status." "0: FSBL failed.,1: FSBL passed." newline bitfld.long 0x0 0. "CS,FSBL completion status." "0: FSBL is executing.,1: FSBL execution is complete." group.long 0x300++0x3 line.long 0x0 "DBGMOCOEN,MOCO Enable Request Register for Debug" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "MOCOEN,MOCO enable request" "0: No request MOCO enable,1: Request MOCO enable" group.long 0x310++0x3 line.long 0x0 "DBGFCLKSEL,Flash Sequencer Clock Select Register for Debug" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "FCLKSEL,Flash sequencer clock select" "0: FCLK,1: MOCO" tree.end tree.end tree "CPU_OCD (On-Chip Debug)" base ad:0x0 tree "CPU_OCD" base ad:0x40011000 group.long 0x4++0x3 line.long 0x0 "MCUCTRL,MCU Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "CPUWAIT,CPU WAIT SETTING" "0: Clear CPUWAIT to Low,1: Set CPUWAIT to High" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "DBIRQ,Writing 1 to the bit wakes up the CPU from Deep Sleep mode or the MCU from Software Standby Mode or Seep Software Standby mode" "0: Debug interrupt is not requested.,1: Debug interrupt requested." hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "EDBGRQ,External Debug Request. Writing 1 to the bit causes CPU Halt or Debug Monitor exception request." "0: Not request Debug Event.,1: Request Debug Event." group.long 0x100++0x3 line.long 0x0 "JBMDR,JTAG Boot Mode Entry Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 0.--7. 1. "KEY,Mode entry key" group.long 0x120++0x3 line.long 0x0 "JBRDR,JTAG Boot Receive Data Register" hexmask.long 0x0 0.--31. 1. "RDAT,Received data register" group.long 0x130++0x3 line.long 0x0 "JBTDR,JTAG Boot Transmit Data Register" hexmask.long 0x0 0.--31. 1. "TDAT,Transmitted data register" group.long 0x140++0x3 line.long 0x0 "JBSTR,JTAG Boot Status register for External Host" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x0 1. "TDE,Transmit data empty" "0: There is data transmission,1: No data transmission" newline bitfld.long 0x0 0. "RDF,Receive buffer full" "0: No receiving data,1: There is receiving data" group.long 0x150++0x3 line.long 0x0 "JBICR,JTAG Boot Interrupt Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "RDFIE,Receive buffer full interrupt enabled" "0: Interrupt request disabled by RDF = 1,1: Enable interrupt request by RDF = 1" rgroup.long 0x300++0x3 line.long 0x0 "FSBLSTATM,First Stage Boot Loader Status Monitor Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 8.--10. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 1. "RS,FSBL result status." "0: FSBL failed.,1: FSBL passed." bitfld.long 0x0 0. "CS,FSBL completion status." "0: FSBL isn't complete.,1: FSBL is complete." tree.end tree "CPU_OCD_NS" base ad:0x50011000 group.long 0x4++0x3 line.long 0x0 "MCUCTRL,MCU Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "CPUWAIT,CPU WAIT SETTING" "0: Clear CPUWAIT to Low,1: Set CPUWAIT to High" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "DBIRQ,Writing 1 to the bit wakes up the CPU from Deep Sleep mode or the MCU from Software Standby Mode or Seep Software Standby mode" "0: Debug interrupt is not requested.,1: Debug interrupt requested." hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "EDBGRQ,External Debug Request. Writing 1 to the bit causes CPU Halt or Debug Monitor exception request." "0: Not request Debug Event.,1: Request Debug Event." group.long 0x100++0x3 line.long 0x0 "JBMDR,JTAG Boot Mode Entry Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 0.--7. 1. "KEY,Mode entry key" group.long 0x120++0x3 line.long 0x0 "JBRDR,JTAG Boot Receive Data Register" hexmask.long 0x0 0.--31. 1. "RDAT,Received data register" group.long 0x130++0x3 line.long 0x0 "JBTDR,JTAG Boot Transmit Data Register" hexmask.long 0x0 0.--31. 1. "TDAT,Transmitted data register" group.long 0x140++0x3 line.long 0x0 "JBSTR,JTAG Boot Status register for External Host" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x0 1. "TDE,Transmit data empty" "0: There is data transmission,1: No data transmission" newline bitfld.long 0x0 0. "RDF,Receive buffer full" "0: No receiving data,1: There is receiving data" group.long 0x150++0x3 line.long 0x0 "JBICR,JTAG Boot Interrupt Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "RDFIE,Receive buffer full interrupt enabled" "0: Interrupt request disabled by RDF = 1,1: Enable interrupt request by RDF = 1" rgroup.long 0x300++0x3 line.long 0x0 "FSBLSTATM,First Stage Boot Loader Status Monitor Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 8.--10. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 1. "RS,FSBL result status." "0: FSBL failed.,1: FSBL passed." bitfld.long 0x0 0. "CS,FSBL completion status." "0: FSBL isn't complete.,1: FSBL is complete." tree.end tree.end tree "CRC (Cyclic Redundancy Check)" base ad:0x0 tree "CRC" base ad:0x40310000 group.byte 0x0++0x1 line.byte 0x0 "CRCCR0,CRC Control Register0" bitfld.byte 0x0 7. "DORCLR,CRCDOR Register Clear" "0: No effect.,1: Clears the CRCDOR register." bitfld.byte 0x0 6. "LMS,CRC Calculation Switching" "0: Generates CRC for LSB first communication.,1: Generates CRC for MSB first communication." bitfld.byte 0x0 3.--5. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0.--2. "GPS,CRC Generating Polynomial Switching" "0: No calculation is executed.,1: 8-bit CRC-8 (X8 + X2 + X + 1),?,?,?,?,?,?" line.byte 0x1 "CRCCR1,CRC Control Register1" bitfld.byte 0x1 7. "CRCSEN,Snoop enable bit" "0: Disabled,1: Enabled" bitfld.byte 0x1 6. "CRCSWR,Snoop-on-write/read switch bit" "0: Snoop-on-read,1: Snoop-on-write" hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.long 0x4++0x3 line.long 0x0 "CRCDIR,CRC Data Input Register" hexmask.long 0x0 0.--31. 1. "CRCDIR,Calculation input Data (Case of CRC-32 CRC-32C )" group.byte 0x4++0x0 line.byte 0x0 "CRCDIR_BY,CRC Data Input Register (byte access)" hexmask.byte 0x0 0.--7. 1. "CRCDIR_BY,Calculation input Data ( Case of CRC-8 CRC-16 or CRC-CCITT )" group.long 0x8++0x3 line.long 0x0 "CRCDOR,CRC Data Output Register" hexmask.long 0x0 0.--31. 1. "CRCDOR,Calculation output Data (Case of CRC-32 CRC-32C )" group.word 0x8++0x1 line.word 0x0 "CRCDOR_HA,CRC Data Output Register (halfword access)" hexmask.word 0x0 0.--15. 1. "CRCDOR_HA,Calculation output Data (Case of CRC-16 or CRC-CCITT )" group.byte 0x8++0x0 line.byte 0x0 "CRCDOR_BY,CRC Data Output Register(byte access)" hexmask.byte 0x0 0.--7. 1. "CRCDOR_BY,Calculation output Data (Case of CRC-8 )" group.word 0xC++0x1 line.word 0x0 "CRCSAR,Snoop Address Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word 0x0 0.--13. 1. "CRCSA,snoop address bitSet the I/O register address to snoop" tree.end tree "CRC_NS" base ad:0x50310000 group.byte 0x0++0x1 line.byte 0x0 "CRCCR0,CRC Control Register0" bitfld.byte 0x0 7. "DORCLR,CRCDOR Register Clear" "0: No effect.,1: Clears the CRCDOR register." bitfld.byte 0x0 6. "LMS,CRC Calculation Switching" "0: Generates CRC for LSB first communication.,1: Generates CRC for MSB first communication." bitfld.byte 0x0 3.--5. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0.--2. "GPS,CRC Generating Polynomial Switching" "0: No calculation is executed.,1: 8-bit CRC-8 (X8 + X2 + X + 1),?,?,?,?,?,?" line.byte 0x1 "CRCCR1,CRC Control Register1" bitfld.byte 0x1 7. "CRCSEN,Snoop enable bit" "0: Disabled,1: Enabled" bitfld.byte 0x1 6. "CRCSWR,Snoop-on-write/read switch bit" "0: Snoop-on-read,1: Snoop-on-write" hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.long 0x4++0x3 line.long 0x0 "CRCDIR,CRC Data Input Register" hexmask.long 0x0 0.--31. 1. "CRCDIR,Calculation input Data (Case of CRC-32 CRC-32C )" group.byte 0x4++0x0 line.byte 0x0 "CRCDIR_BY,CRC Data Input Register (byte access)" hexmask.byte 0x0 0.--7. 1. "CRCDIR_BY,Calculation input Data ( Case of CRC-8 CRC-16 or CRC-CCITT )" group.long 0x8++0x3 line.long 0x0 "CRCDOR,CRC Data Output Register" hexmask.long 0x0 0.--31. 1. "CRCDOR,Calculation output Data (Case of CRC-32 CRC-32C )" group.word 0x8++0x1 line.word 0x0 "CRCDOR_HA,CRC Data Output Register (halfword access)" hexmask.word 0x0 0.--15. 1. "CRCDOR_HA,Calculation output Data (Case of CRC-16 or CRC-CCITT )" group.byte 0x8++0x0 line.byte 0x0 "CRCDOR_BY,CRC Data Output Register(byte access)" hexmask.byte 0x0 0.--7. 1. "CRCDOR_BY,Calculation output Data (Case of CRC-8 )" group.word 0xC++0x1 line.word 0x0 "CRCSAR,Snoop Address Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word 0x0 0.--13. 1. "CRCSA,snoop address bitSet the I/O register address to snoop" tree.end tree.end tree "DAC12 (12-bit D/A converter)" base ad:0x0 tree "DAC12" base ad:0x40333000 repeat 2. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2)++0x1 line.word 0x0 "DADR$1,D/A Data Register %s" hexmask.word 0x0 0.--15. 1. "DADR,D/A Data RegisterNOTE: When DADPR.DPSEL = 0 the high-order 4 bits are fixed to 0: right justified format. When DADPR.DPSEL = 1 the low-order 4 bits are fixed to 0: left justified format." repeat.end group.byte 0x4++0x2 line.byte 0x0 "DACR,D/A Control Register" bitfld.byte 0x0 7. "DAOE1,D/A Output Enable 1" "0: Analog output of channel 1 (DA1) is disabled.,1: D/A conversion of channel 1 is enabled. Analog.." bitfld.byte 0x0 6. "DAOE0,D/A Output Enable 0" "0: Analog output of channel 0 (DA0) is disabled.,1: D/A conversion of channel 0 is enabled. Analog.." newline bitfld.byte 0x0 5. "DAE,D/A Enable" "0: D/A conversion is independently controlled on..,1: D/A conversion on channels 0 and 1 is controlled.." hexmask.byte 0x0 0.--4. 1. "Reserved,These bits are read as 11111. The write value should be 11111." line.byte 0x1 "DADPR,DADRm Format Select Register" bitfld.byte 0x1 7. "DPSEL,DADRm Format Select" "0: Right justified format.,1: Left justified format." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." line.byte 0x2 "DAADSCR,D/A-A/D Synchronous Start Control Register" bitfld.byte 0x2 7. "DAADST,D/A-A/D Synchronous Conversion" "0: D/A converter operation does not synchronize..,1: D/A converter operation synchronizes with A/D.." group.byte 0x8++0x0 line.byte 0x0 "DAAMPCR,D/A Output Amplifier Control Register" bitfld.byte 0x0 7. "DAAMP1,Amplifier Control 1" "0: Output amplifier of channel 1 is not used.,1: Output amplifier of channel 1 is used." bitfld.byte 0x0 6. "DAAMP0,Amplifier Control 0" "0: Output amplifier of channel 0 is not used.,1: Output amplifier of channel 0 is used." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x1C++0x0 line.byte 0x0 "DAASWCR,D/A Amplifier Stabilization Wait Control Register" bitfld.byte 0x0 7. "DAASW1,D/A Amplifier Stabilization Wait 1" "0: Amplifier stabilization wait off (output) for..,1: Amplifier stabilization wait on (high-Z) for.." bitfld.byte 0x0 6. "DAASW0,D/A Amplifier Stabilization Wait 0" "0: Amplifier stabilization wait off (output) for..,1: Amplifier stabilization wait on (high-Z) for.." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x10C0++0x0 line.byte 0x0 "DAADUSR,D/A A/D Synchronous Unit Select Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "AMADSEL1,A/D Unit 1 Select" "0: Unit 1 is not selected.,1: Unit 1 is selected." newline bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" tree.end tree "DAC12_NS" base ad:0x50333000 repeat 2. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2)++0x1 line.word 0x0 "DADR$1,D/A Data Register %s" hexmask.word 0x0 0.--15. 1. "DADR,D/A Data RegisterNOTE: When DADPR.DPSEL = 0 the high-order 4 bits are fixed to 0: right justified format. When DADPR.DPSEL = 1 the low-order 4 bits are fixed to 0: left justified format." repeat.end group.byte 0x4++0x2 line.byte 0x0 "DACR,D/A Control Register" bitfld.byte 0x0 7. "DAOE1,D/A Output Enable 1" "0: Analog output of channel 1 (DA1) is disabled.,1: D/A conversion of channel 1 is enabled. Analog.." bitfld.byte 0x0 6. "DAOE0,D/A Output Enable 0" "0: Analog output of channel 0 (DA0) is disabled.,1: D/A conversion of channel 0 is enabled. Analog.." newline bitfld.byte 0x0 5. "DAE,D/A Enable" "0: D/A conversion is independently controlled on..,1: D/A conversion on channels 0 and 1 is controlled.." hexmask.byte 0x0 0.--4. 1. "Reserved,These bits are read as 11111. The write value should be 11111." line.byte 0x1 "DADPR,DADRm Format Select Register" bitfld.byte 0x1 7. "DPSEL,DADRm Format Select" "0: Right justified format.,1: Left justified format." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." line.byte 0x2 "DAADSCR,D/A-A/D Synchronous Start Control Register" bitfld.byte 0x2 7. "DAADST,D/A-A/D Synchronous Conversion" "0: D/A converter operation does not synchronize..,1: D/A converter operation synchronizes with A/D.." group.byte 0x8++0x0 line.byte 0x0 "DAAMPCR,D/A Output Amplifier Control Register" bitfld.byte 0x0 7. "DAAMP1,Amplifier Control 1" "0: Output amplifier of channel 1 is not used.,1: Output amplifier of channel 1 is used." bitfld.byte 0x0 6. "DAAMP0,Amplifier Control 0" "0: Output amplifier of channel 0 is not used.,1: Output amplifier of channel 0 is used." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x1C++0x0 line.byte 0x0 "DAASWCR,D/A Amplifier Stabilization Wait Control Register" bitfld.byte 0x0 7. "DAASW1,D/A Amplifier Stabilization Wait 1" "0: Amplifier stabilization wait off (output) for..,1: Amplifier stabilization wait on (high-Z) for.." bitfld.byte 0x0 6. "DAASW0,D/A Amplifier Stabilization Wait 0" "0: Amplifier stabilization wait off (output) for..,1: Amplifier stabilization wait on (high-Z) for.." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x10C0++0x0 line.byte 0x0 "DAADUSR,D/A A/D Synchronous Unit Select Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "AMADSEL1,A/D Unit 1 Select" "0: Unit 1 is not selected.,1: Unit 1 is selected." newline bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" tree.end tree.end tree "DMAC (DMA Controller)" base ad:0x0 tree "DMA" base ad:0x4000A800 group.byte 0x0++0x0 line.byte 0x0 "DMAST,DMA Module Activation Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DMST,DMAC Operation Enable" "0: DMAC activation is disabled.,1: DMAC activation is enabled." group.long 0x40++0x3 line.long 0x0 "DMECHR,DMACA Error Channel Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "DMESTA,DMAC Error Status" "0: No DMA transfer error occurred,1: DMA transfer error occurred" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "DMECHSAM,DMAC Error channel SA Monitor" "0,1" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "DMECH,DMAC Error channel" "0,1,2,3,4,5,6,7" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "DELSR$1,DMAC Event Link Setting Register %s" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "IR,DMAC Activation Request Status flag" "0: No DMAC activation request occurred,1: DMAC activation request occurred. ( '1' write to.." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.word 0x0 0.--8. 1. "DELS,DMAC Event Link Select" repeat.end tree.end tree "DMA_NS" base ad:0x5000A800 group.byte 0x0++0x0 line.byte 0x0 "DMAST,DMA Module Activation Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DMST,DMAC Operation Enable" "0: DMAC activation is disabled.,1: DMAC activation is enabled." group.long 0x40++0x3 line.long 0x0 "DMECHR,DMACA Error Channel Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "DMESTA,DMAC Error Status" "0: No DMA transfer error occurred,1: DMA transfer error occurred" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "DMECHSAM,DMAC Error channel SA Monitor" "0,1" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "DMECH,DMAC Error channel" "0,1,2,3,4,5,6,7" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "DELSR$1,DMAC Event Link Setting Register %s" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "IR,DMAC Activation Request Status flag" "0: No DMAC activation request occurred,1: DMAC activation request occurred. ( '1' write to.." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.word 0x0 0.--8. 1. "DELS,DMAC Event Link Select" repeat.end tree.end tree "DMAC0" base ad:0x4000A000 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC0_NS" base ad:0x5000A000 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC1" base ad:0x4000A040 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC1_NS" base ad:0x5000A040 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC2" base ad:0x4000A080 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC2_NS" base ad:0x5000A080 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC3" base ad:0x4000A0C0 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC3_NS" base ad:0x5000A0C0 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC4" base ad:0x4000A100 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC4_NS" base ad:0x5000A100 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC5" base ad:0x4000A140 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC5_NS" base ad:0x5000A140 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC6" base ad:0x4000A180 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC6_NS" base ad:0x5000A180 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC7" base ad:0x4000A1C0 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree "DMAC7_NS" base ad:0x5000A1C0 group.long 0x0++0xF line.long 0x0 "DMSAR,DMA Source Address Register" hexmask.long 0x0 0.--31. 1. "DMSAR,Specifies the transfer source start address." line.long 0x4 "DMDAR,DMA Destination Address Register" hexmask.long 0x4 0.--31. 1. "DMDAR,Specifies the transfer destination start address." line.long 0x8 "DMCRA,DMA Transfer Count Register" hexmask.long.byte 0x8 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0x8 16.--25. 1. "DMCRAH,Upper bits of transfer count" newline hexmask.long.word 0x8 0.--15. 1. "DMCRAL,Lower bits of transfer count" line.long 0xC "DMCRB,DMA Block Transfer Count Register" hexmask.long.word 0xC 16.--31. 1. "DMCRBH,Specifies the number of block transfer operations or repeat transfer operations." hexmask.long.word 0xC 0.--15. 1. "DMCRBL,Functions as a number of block transfer counter or repeat transfer counter." group.word 0x10++0x1 line.word 0x0 "DMTMD,DMA Transfer Mode Register" bitfld.word 0x0 14.--15. "MD,Transfer Mode Select" "0: Normal transfer,1: Repeat transfer,?,?" bitfld.word 0x0 12.--13. "DTS,Repeat Area Select" "0: Specify destination as the repeat area or block..,1: Specify source as the repeat area or block area,?,?" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "TKP,Transfer Keeping" "0: Transfer is stopped by completion of specified..,1: Transfer is not stopped by completion of.." newline bitfld.word 0x0 8.--9. "SZ,Transfer Data Size Select" "0: 8 bits,1: 16 bits,?,?" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "DCTG,Transfer Request Source Select" "0: Setting prohibited,1: Interrupts from peripheral modules or external..,?,?" group.byte 0x13++0x0 line.byte 0x0 "DMINT,DMA Interrupt Setting Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "DTIE,Transfer End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 3. "ESIE,Transfer Escape End Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 2. "RPTIE,Repeat Size End Interrupt Enable" "0: Disable,1: Enable." newline bitfld.byte 0x0 1. "SARIE,Source Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." bitfld.byte 0x0 0. "DARIE,Destination Address Extended Repeat Area Overflow Interrupt Enable" "0: Disable,1: Enable." group.word 0x14++0x1 line.word 0x0 "DMAMD,DMA Address Mode Register" bitfld.word 0x0 14.--15. "SM,Source Address Update Mode" "0: Fixed address,1: Offset addition,?,?" bitfld.word 0x0 13. "SADR,Source Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" newline hexmask.word.byte 0x0 8.--12. 1. "SARA,Source Address Extended Repeat Area Specifies the extended repeat area on the source address. For details on the settings." bitfld.word 0x0 6.--7. "DM,Destination Address Update Mode" "0: Fixed address,1: Offset addition,?,?" newline bitfld.word 0x0 5. "DADR,Destination Address Update Select After Reload" "0: Only reloading,1: Add index after reloading" hexmask.word.byte 0x0 0.--4. 1. "DARA,Destination Address Extended Repeat Area Specifies the extended repeat area on the destination address. For details on the settings." group.long 0x18++0x3 line.long 0x0 "DMOFR,DMA Offset Register" hexmask.long 0x0 0.--31. 1. "DMOFR,Specifies the offset when offset addition is selected as the address update mode for transfer source or destination." group.byte 0x1C++0x2 line.byte 0x0 "DMCNT,DMA Transfer Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTE,DMA Transfer Enable" "0: Disable,1: Enable" line.byte 0x1 "DMREQ,DMA Software Start Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLRS,DMA Software Start Bit Auto Clear Select" "0: Clear SWREQ bit after DMA transfer is started by..,1: Do not clear SWREQ bit after DMA transfer is.." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SWREQ,DMA Software Start" "0: Do not request DMA transfer,1: Request DMA transfer." line.byte 0x2 "DMSTS,DMAC Module Activation Register" rbitfld.byte 0x2 7. "ACT,DMA Active Flag" "0: DMAC operation is suspended.,1: DMAC is operating." bitfld.byte 0x2 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x2 4. "DTIF,Transfer End Interrupt Flag" "0: No interrupt occurred,1: Interrupt occurred." bitfld.byte 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x2 0. "ESIF,Transfer Escape End Interrupt Flag" "0: A transfer escape end interrupt has not been..,1: A transfer escape end interrupt has been.." group.long 0x20++0xF line.long 0x0 "DMSRR,DMA Source Reload Address Register" hexmask.long 0x0 0.--31. 1. "DMSRR,Specifies the transfer source reload address." line.long 0x4 "DMDRR,DMA Destination Reload Address Register" hexmask.long 0x4 0.--31. 1. "DMDRR,Specifies the transfer destination reload address." line.long 0x8 "DMSBS,DMA Source Buffer Size Register" hexmask.long.word 0x8 16.--31. 1. "DMSBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0x8 0.--15. 1. "DMSBSL,Functions as data transfer counter in repeat block transfer mode." line.long 0xC "DMDBS,DMA Source Buffer Size Register" hexmask.long.word 0xC 16.--31. 1. "DMDBSH,Specifies the repeat-area size in repeat block transfer mode." hexmask.long.word 0xC 0.--15. 1. "DMDBSL,Functions as data transfer counter in repeat block transfer mode." group.byte 0x30++0x0 line.byte 0x0 "DMBWR,DMA Bufferable Write Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BWE,Bufferable Write Enable" "0: Disables Bufferable Write.,1: Enables Bufferable Write" tree.end tree.end tree "DOC (Data Operation Circuit)" base ad:0x0 tree "DOC" base ad:0x40311000 group.byte 0x0++0x0 line.byte 0x0 "DOCR,DOC Control Register" bitfld.byte 0x0 7. "DOPCIE,Data Operation Circuit Interrput Enable" "0: Disables interrupts from the data operation..,1: Enables interrupts from the data operation.." bitfld.byte 0x0 4.--6. "DCSEL,Detection Condition Select" "0: 0: Data mismatch( DODSR0 != DODIR ),?,?,?,?,?,?,?" bitfld.byte 0x0 3. "DOBW,Data Operation Width Select" "0: 16-bit,1: 32-bit" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--1. "OMS,Operating Mode Select" "0: Data comparison mode,1: Data addition mode,?,?" rgroup.byte 0x4++0x0 line.byte 0x0 "DOSR,Data Operation Circuit Flag Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "DOPCF,Data Operation Circuit Flag" "0,1" wgroup.byte 0x8++0x0 line.byte 0x0 "DOSCR,Data Operation Circuit Flag Status Clear Register" hexmask.byte 0x0 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x0 0. "DOPCFCL,Data Operation Circuit Flag Clear" "0: Maintains the DOPCF flag state.,1: Clears the DOPCF flag." group.long 0xC++0x3 line.long 0x0 "DODIR,Data Operation Circuit Data Input Register" hexmask.long 0x0 0.--31. 1. "DODIR,DODIR is a readable/writable register which can store the data in the operations." group.word 0xC++0x1 line.word 0x0 "DODIR_HA,Data Operation Circuit Data Input Register" hexmask.word 0x0 0.--15. 1. "DODIR_HA,DODIR_HA is a readable/writable register which can store the data in the operations." group.long 0x10++0x3 line.long 0x0 "DODSR0,Data Operation Circuit Data Setting Register0" hexmask.long 0x0 0.--31. 1. "DODSR0,DODSR0 is a readable/writable register which can store a reference data in the data comparison mode and the result of data addition/subtraction mode." group.word 0x10++0x1 line.word 0x0 "DODSR0_HA,Data Operation Circuit Data Setting Register0" hexmask.word 0x0 0.--15. 1. "DODSR0_HA,DODSR0_HA is a readable/writable register which can store a reference data in the data comparison mode and the result of data addition/subtraction mode." group.long 0x14++0x3 line.long 0x0 "DODSR1,Data Operation Circuit Data Setting Register1" hexmask.long 0x0 0.--31. 1. "DODSR1,DODSR1 is a readable/writable register which can store a reference data in the data window comparison mode" group.word 0x14++0x1 line.word 0x0 "DODSR1_HA,Data Operation Circuit Data Setting Register1" hexmask.word 0x0 0.--15. 1. "DODSR1_HA,DODSR1_HA is a readable/writable register which can store a reference data in the data window comparison mode" tree.end tree "DOC_NS" base ad:0x50311000 group.byte 0x0++0x0 line.byte 0x0 "DOCR,DOC Control Register" bitfld.byte 0x0 7. "DOPCIE,Data Operation Circuit Interrput Enable" "0: Disables interrupts from the data operation..,1: Enables interrupts from the data operation.." bitfld.byte 0x0 4.--6. "DCSEL,Detection Condition Select" "0: 0: Data mismatch( DODSR0 != DODIR ),?,?,?,?,?,?,?" bitfld.byte 0x0 3. "DOBW,Data Operation Width Select" "0: 16-bit,1: 32-bit" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--1. "OMS,Operating Mode Select" "0: Data comparison mode,1: Data addition mode,?,?" rgroup.byte 0x4++0x0 line.byte 0x0 "DOSR,Data Operation Circuit Flag Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "DOPCF,Data Operation Circuit Flag" "0,1" wgroup.byte 0x8++0x0 line.byte 0x0 "DOSCR,Data Operation Circuit Flag Status Clear Register" hexmask.byte 0x0 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x0 0. "DOPCFCL,Data Operation Circuit Flag Clear" "0: Maintains the DOPCF flag state.,1: Clears the DOPCF flag." group.long 0xC++0x3 line.long 0x0 "DODIR,Data Operation Circuit Data Input Register" hexmask.long 0x0 0.--31. 1. "DODIR,DODIR is a readable/writable register which can store the data in the operations." group.word 0xC++0x1 line.word 0x0 "DODIR_HA,Data Operation Circuit Data Input Register" hexmask.word 0x0 0.--15. 1. "DODIR_HA,DODIR_HA is a readable/writable register which can store the data in the operations." group.long 0x10++0x3 line.long 0x0 "DODSR0,Data Operation Circuit Data Setting Register0" hexmask.long 0x0 0.--31. 1. "DODSR0,DODSR0 is a readable/writable register which can store a reference data in the data comparison mode and the result of data addition/subtraction mode." group.word 0x10++0x1 line.word 0x0 "DODSR0_HA,Data Operation Circuit Data Setting Register0" hexmask.word 0x0 0.--15. 1. "DODSR0_HA,DODSR0_HA is a readable/writable register which can store a reference data in the data comparison mode and the result of data addition/subtraction mode." group.long 0x14++0x3 line.long 0x0 "DODSR1,Data Operation Circuit Data Setting Register1" hexmask.long 0x0 0.--31. 1. "DODSR1,DODSR1 is a readable/writable register which can store a reference data in the data window comparison mode" group.word 0x14++0x1 line.word 0x0 "DODSR1_HA,Data Operation Circuit Data Setting Register1" hexmask.word 0x0 0.--15. 1. "DODSR1_HA,DODSR1_HA is a readable/writable register which can store a reference data in the data window comparison mode" tree.end tree.end tree "DPHYCNT (D-PHY Controller Top)" base ad:0x0 tree "DPHYCNT" base ad:0x40346C00 group.long 0x0++0x3 line.long 0x0 "DPHYREFCR,D-PHY Reference Clock Setting Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RFREQ,Reference Clock Frequency Setting" group.word 0x0++0x1 line.word 0x0 "DPHYREFCR_L,D-PHY Reference Clock Setting Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "RFREQ,Reference Clock Frequency Setting" group.byte 0x0++0x0 line.byte 0x0 "DPHYREFCR_LL,D-PHY Reference Clock Setting Register" hexmask.byte 0x0 0.--7. 1. "RFREQ,Reference Clock Frequency Setting" group.long 0x4++0x3 line.long 0x0 "DPHYPLFCR,D-PHY PLL Frequency Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "NMUL,D-PHY PLL Frequency Multiplication Factor Select (Integer Part)" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 8.--9. "NFMUL,D-PHY PLL Frequency Multiplication Factor Select (Fractional Part)" "0: 0.00,1: 0.33,?,?" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "IDIV,D-PHY PLL Input Frequency Division Ratio Select" "0: 1,1: 1/2,?,?" group.word 0x4++0x1 line.word 0x0 "DPHYPLFCR_L,D-PHY PLL Frequency Control Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "NFMUL,D-PHY PLL Frequency Multiplication Factor Select (Fractional Part)" "0: 0.00,1: 0.33,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 0.--1. "IDIV,D-PHY PLL Input Frequency Division Ratio Select" "0: 1,1: 1/2,?,?" group.byte 0x4++0x1 line.byte 0x0 "DPHYPLFCR_LL,D-PHY PLL Frequency Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "IDIV,D-PHY PLL Input Frequency Division Ratio Select" "0: 1,1: 1/2,?,?" line.byte 0x1 "DPHYPLFCR_LH,D-PHY PLL Frequency Control Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "NFMUL,D-PHY PLL Frequency Multiplication Factor Select (Fractional Part)" "0: 0.00,1: 0.33,?,?" group.word 0x6++0x1 line.word 0x0 "DPHYPLFCR_H,D-PHY PLL Frequency Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "NMUL,D-PHY PLL Frequency Multiplication Factor Select (Integer Part)" group.byte 0x6++0x0 line.byte 0x0 "DPHYPLFCR_HL,D-PHY PLL Frequency Control Register" hexmask.byte 0x0 0.--7. 1. "NMUL,D-PHY PLL Frequency Multiplication Factor Select (Integer Part)" group.long 0x8++0x3 line.long 0x0 "DPHYPLOCR,D-PHY PLL Operation Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PLLSTP,D-PHY PLL Operation Control" "0: Operate the PLL,1: Stop the PLL" group.word 0x8++0x1 line.word 0x0 "DPHYPLOCR_L,D-PHY PLL Operation Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "PLLSTP,D-PHY PLL Operation Control" "0: Operate the PLL,1: Stop the PLL" group.byte 0x8++0x0 line.byte 0x0 "DPHYPLOCR_LL,D-PHY PLL Operation Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PLLSTP,D-PHY PLL Operation Control" "0: Operate the PLL,1: Stop the PLL" group.long 0xC++0x3 line.long 0x0 "DPHYESCCR,D-PHY Escape Mode Clock Control Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." hexmask.long.byte 0x0 0.--4. 1. "ESCDIV,Escape Mode Transfer Clock Division Ratio" group.word 0xC++0x1 line.word 0x0 "DPHYESCCR_L,D-PHY Escape Mode Clock Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "ESCDIV,Escape Mode Transfer Clock Division Ratio" group.byte 0xC++0x0 line.byte 0x0 "DPHYESCCR_LL,D-PHY Escape Mode Clock Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "ESCDIV,Escape Mode Transfer Clock Division Ratio" group.long 0x10++0x3 line.long 0x0 "DPHYPWRCR,D-PHY Power Supplying Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PWRSEN,D-PHY Power Supplying Control" "0: Disable D-PHY LDO operation (Stop supplying..,1: Enable D-PHY LDO operation (Supply VDD_DPHY)" group.word 0x10++0x1 line.word 0x0 "DPHYPWRCR_L,D-PHY Power Supplying Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "PWRSEN,D-PHY Power Supplying Control" "0: Disable D-PHY LDO operation (Stop supplying..,1: Enable D-PHY LDO operation (Supply VDD_DPHY)" group.byte 0x10++0x0 line.byte 0x0 "DPHYPWRCR_LL,D-PHY Power Supplying Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PWRSEN,D-PHY Power Supplying Control" "0: Disable D-PHY LDO operation (Stop supplying..,1: Enable D-PHY LDO operation (Supply VDD_DPHY)" rgroup.long 0x1C++0x3 line.long 0x0 "DPHYSFR,D-PHY Status Flag Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x0 8. "PLLSF,D-PHY PLL Oscillation Stabilization Flag" "0: D-PHY PLL clock is stopped or is not yet stable,1: D-PHY PLL clock is stable" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 0. "PWRSF,D-PHY LDO Power-on Status Flag" "0: D-PHY LDO is stopped or starting up,1: D-PHY LDO startup is completed (VDD_DPHY is.." rgroup.word 0x1C++0x1 line.word 0x0 "DPHYSFR_L,D-PHY Status Flag Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 8. "PLLSF,D-PHY PLL Oscillation Stabilization Flag" "0: D-PHY PLL clock is stopped or is not yet stable,1: D-PHY PLL clock is stable" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 0. "PWRSF,D-PHY LDO Power-on Status Flag" "0: D-PHY LDO is stopped or starting up,1: D-PHY LDO startup is completed (VDD_DPHY is.." rgroup.byte 0x1C++0x1 line.byte 0x0 "DPHYSFR_LL,D-PHY Status Flag Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "PWRSF,D-PHY LDO Power-on Status Flag" "0: D-PHY LDO is stopped or starting up,1: D-PHY LDO startup is completed (VDD_DPHY is.." line.byte 0x1 "DPHYSFR_LH,D-PHY Status Flag Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x1 0. "PLLSF,D-PHY PLL Oscillation Stabilization Flag" "0: D-PHY PLL clock is stopped or is not yet stable,1: D-PHY PLL clock is stable" group.long 0x20++0x3 line.long 0x0 "DPHYOCR,D-PHY Operation Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "DPHYEN,D-PHY Operation Control" "0: Disable D-PHY operation,1: Enable D-PHY operation" group.word 0x20++0x1 line.word 0x0 "DPHYOCR_L,D-PHY Operation Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "DPHYEN,D-PHY Operation Control" "0: Disable D-PHY operation,1: Enable D-PHY operation" group.byte 0x20++0x0 line.byte 0x0 "DPHYOCR_LL,D-PHY Operation Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DPHYEN,D-PHY Operation Control" "0: Disable D-PHY operation,1: Enable D-PHY operation" group.long 0x24++0x3 line.long 0x0 "DPHYTIM1,D-PHY Timing Control Register 1" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." hexmask.long.tbyte 0x0 0.--18. 1. "TINIT,D-PHY T_INIT Parameter Setting" group.word 0x24++0x1 line.word 0x0 "DPHYTIM1_L,D-PHY Timing Control Register 1" hexmask.word 0x0 0.--15. 1. "TINIT,D-PHY T_INIT Parameter Setting" group.byte 0x24++0x1 line.byte 0x0 "DPHYTIM1_LL,D-PHY Timing Control Register 1" hexmask.byte 0x0 0.--7. 1. "TINIT,D-PHY T_INIT Parameter Setting" line.byte 0x1 "DPHYTIM1_LH,D-PHY Timing Control Register 1" hexmask.byte 0x1 0.--7. 1. "TINIT,D-PHY T_INIT Parameter Setting" group.word 0x26++0x1 line.word 0x0 "DPHYTIM1_H,D-PHY Timing Control Register 1" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "TINIT,D-PHY T_INIT Parameter Setting" "0,1,2,3,4,5,6,7" group.byte 0x26++0x0 line.byte 0x0 "DPHYTIM1_HL,D-PHY Timing Control Register 1" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TINIT,D-PHY T_INIT Parameter Setting" "0,1,2,3,4,5,6,7" group.byte 0x28++0x2 line.byte 0x0 "DPHYTIM2_LL,D-PHY Timing Control Register 2" hexmask.byte 0x0 0.--7. 1. "TCLKPREP,D-PHY T_CLK_PREPARE Parameter Setting" line.byte 0x1 "DPHYTIM2_LH,D-PHY Timing Control Register 2" hexmask.byte 0x1 0.--7. 1. "Reserved,These bits are read as 00010000. The write value should be 00010000." line.byte 0x2 "DPHYTIM2_HL,D-PHY Timing Control Register 2" hexmask.byte 0x2 0.--7. 1. "Reserved,These bits are read as 00000010. The write value should be 00000010." group.byte 0x2C++0x1 line.byte 0x0 "DPHYTIM3_LL,D-PHY Timing Control Register 3" hexmask.byte 0x0 0.--7. 1. "THSPREP,D-PHY T_THS_PREPARE Parameter Setting" line.byte 0x1 "DPHYTIM3_LH,D-PHY Timing Control Register 3" hexmask.byte 0x1 0.--7. 1. "Reserved,These bits are read as 00010000. The write value should be 00010000." group.long 0x30++0x3 line.long 0x0 "DPHYTIM4,D-PHY Timing Control Register 4" hexmask.long.byte 0x0 24.--31. 1. "TCLKTRL,D-PHY T_TCLK_TRAIL Parameter Setting" hexmask.long.byte 0x0 16.--23. 1. "TCLKPOST,D-PHY T_TCLK_POST Parameter Setting" newline hexmask.long.byte 0x0 8.--15. 1. "TCLKPRE,D-PHY T_TCLK_PRE Parameter Setting" hexmask.long.byte 0x0 0.--7. 1. "TCLKZERO,D-PHY T_CLK_ZERO Parameter Setting" group.word 0x30++0x1 line.word 0x0 "DPHYTIM4_L,D-PHY Timing Control Register 4" hexmask.word.byte 0x0 8.--15. 1. "TCLKPRE,D-PHY T_TCLK_PRE Parameter Setting" hexmask.word.byte 0x0 0.--7. 1. "TCLKZERO,D-PHY T_CLK_ZERO Parameter Setting" group.byte 0x30++0x1 line.byte 0x0 "DPHYTIM4_LL,D-PHY Timing Control Register 4" hexmask.byte 0x0 0.--7. 1. "TCLKZERO,D-PHY T_CLK_ZERO Parameter Setting" line.byte 0x1 "DPHYTIM4_LH,D-PHY Timing Control Register 4" hexmask.byte 0x1 0.--7. 1. "TCLKPRE,D-PHY T_TCLK_PRE Parameter Setting" group.word 0x32++0x1 line.word 0x0 "DPHYTIM4_H,D-PHY Timing Control Register 4" hexmask.word.byte 0x0 8.--15. 1. "TCLKTRL,D-PHY T_TCLK_TRAIL Parameter Setting" hexmask.word.byte 0x0 0.--7. 1. "TCLKPOST,D-PHY T_TCLK_POST Parameter Setting" group.byte 0x32++0x1 line.byte 0x0 "DPHYTIM4_HL,D-PHY Timing Control Register 4" hexmask.byte 0x0 0.--7. 1. "TCLKPOST,D-PHY T_TCLK_POST Parameter Setting" line.byte 0x1 "DPHYTIM4_HH,D-PHY Timing Control Register 4" hexmask.byte 0x1 0.--7. 1. "TCLKTRL,D-PHY T_TCLK_TRAIL Parameter Setting" group.long 0x34++0x3 line.long 0x0 "DPHYTIM5,D-PHY Timing Control Register 5" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "THSEXIT,D-PHY T_THS_EXIT Parameter Setting" newline hexmask.long.byte 0x0 8.--15. 1. "THSTRL,D-PHY T_THS_TRAIL Parameter Setting" hexmask.long.byte 0x0 0.--7. 1. "THSZERO,D-PHY T_THS_ZERO Parameter Setting" group.word 0x34++0x1 line.word 0x0 "DPHYTIM5_L,D-PHY Timing Control Register 5" hexmask.word.byte 0x0 8.--15. 1. "THSTRL,D-PHY T_THS_TRAIL Parameter Setting" hexmask.word.byte 0x0 0.--7. 1. "THSZERO,D-PHY T_THS_ZERO Parameter Setting" group.byte 0x34++0x1 line.byte 0x0 "DPHYTIM5_LL,D-PHY Timing Control Register 5" hexmask.byte 0x0 0.--7. 1. "THSZERO,D-PHY T_THS_ZERO Parameter Setting" line.byte 0x1 "DPHYTIM5_LH,D-PHY Timing Control Register 5" hexmask.byte 0x1 0.--7. 1. "THSTRL,D-PHY T_THS_TRAIL Parameter Setting" group.word 0x36++0x1 line.word 0x0 "DPHYTIM5_H,D-PHY Timing Control Register 5" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "THSEXIT,D-PHY T_THS_EXIT Parameter Setting" group.byte 0x36++0x0 line.byte 0x0 "DPHYTIM5_HL,D-PHY Timing Control Register 5" hexmask.byte 0x0 0.--7. 1. "THSEXIT,D-PHY T_THS_EXIT Parameter Setting" group.long 0x38++0x3 line.long 0x0 "DPHYTIM6,D-PHY Timing Control Register 6" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TLPX,D-PHY T_TLPX Parameter Setting" group.word 0x38++0x1 line.word 0x0 "DPHYTIM6_L,D-PHY Timing Control Register 6" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "TLPX,D-PHY T_TLPX Parameter Setting" group.byte 0x38++0x0 line.byte 0x0 "DPHYTIM6_LL,D-PHY Timing Control Register 6" hexmask.byte 0x0 0.--7. 1. "TLPX,D-PHY T_TLPX Parameter Setting" tree.end tree "DPHYCNT_NS" base ad:0x50346C00 group.long 0x0++0x3 line.long 0x0 "DPHYREFCR,D-PHY Reference Clock Setting Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RFREQ,Reference Clock Frequency Setting" group.word 0x0++0x1 line.word 0x0 "DPHYREFCR_L,D-PHY Reference Clock Setting Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "RFREQ,Reference Clock Frequency Setting" group.byte 0x0++0x0 line.byte 0x0 "DPHYREFCR_LL,D-PHY Reference Clock Setting Register" hexmask.byte 0x0 0.--7. 1. "RFREQ,Reference Clock Frequency Setting" group.long 0x4++0x3 line.long 0x0 "DPHYPLFCR,D-PHY PLL Frequency Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "NMUL,D-PHY PLL Frequency Multiplication Factor Select (Integer Part)" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 8.--9. "NFMUL,D-PHY PLL Frequency Multiplication Factor Select (Fractional Part)" "0: 0.00,1: 0.33,?,?" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "IDIV,D-PHY PLL Input Frequency Division Ratio Select" "0: 1,1: 1/2,?,?" group.word 0x4++0x1 line.word 0x0 "DPHYPLFCR_L,D-PHY PLL Frequency Control Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "NFMUL,D-PHY PLL Frequency Multiplication Factor Select (Fractional Part)" "0: 0.00,1: 0.33,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 0.--1. "IDIV,D-PHY PLL Input Frequency Division Ratio Select" "0: 1,1: 1/2,?,?" group.byte 0x4++0x1 line.byte 0x0 "DPHYPLFCR_LL,D-PHY PLL Frequency Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "IDIV,D-PHY PLL Input Frequency Division Ratio Select" "0: 1,1: 1/2,?,?" line.byte 0x1 "DPHYPLFCR_LH,D-PHY PLL Frequency Control Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "NFMUL,D-PHY PLL Frequency Multiplication Factor Select (Fractional Part)" "0: 0.00,1: 0.33,?,?" group.word 0x6++0x1 line.word 0x0 "DPHYPLFCR_H,D-PHY PLL Frequency Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "NMUL,D-PHY PLL Frequency Multiplication Factor Select (Integer Part)" group.byte 0x6++0x0 line.byte 0x0 "DPHYPLFCR_HL,D-PHY PLL Frequency Control Register" hexmask.byte 0x0 0.--7. 1. "NMUL,D-PHY PLL Frequency Multiplication Factor Select (Integer Part)" group.long 0x8++0x3 line.long 0x0 "DPHYPLOCR,D-PHY PLL Operation Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PLLSTP,D-PHY PLL Operation Control" "0: Operate the PLL,1: Stop the PLL" group.word 0x8++0x1 line.word 0x0 "DPHYPLOCR_L,D-PHY PLL Operation Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "PLLSTP,D-PHY PLL Operation Control" "0: Operate the PLL,1: Stop the PLL" group.byte 0x8++0x0 line.byte 0x0 "DPHYPLOCR_LL,D-PHY PLL Operation Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PLLSTP,D-PHY PLL Operation Control" "0: Operate the PLL,1: Stop the PLL" group.long 0xC++0x3 line.long 0x0 "DPHYESCCR,D-PHY Escape Mode Clock Control Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." hexmask.long.byte 0x0 0.--4. 1. "ESCDIV,Escape Mode Transfer Clock Division Ratio" group.word 0xC++0x1 line.word 0x0 "DPHYESCCR_L,D-PHY Escape Mode Clock Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "ESCDIV,Escape Mode Transfer Clock Division Ratio" group.byte 0xC++0x0 line.byte 0x0 "DPHYESCCR_LL,D-PHY Escape Mode Clock Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "ESCDIV,Escape Mode Transfer Clock Division Ratio" group.long 0x10++0x3 line.long 0x0 "DPHYPWRCR,D-PHY Power Supplying Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PWRSEN,D-PHY Power Supplying Control" "0: Disable D-PHY LDO operation (Stop supplying..,1: Enable D-PHY LDO operation (Supply VDD_DPHY)" group.word 0x10++0x1 line.word 0x0 "DPHYPWRCR_L,D-PHY Power Supplying Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "PWRSEN,D-PHY Power Supplying Control" "0: Disable D-PHY LDO operation (Stop supplying..,1: Enable D-PHY LDO operation (Supply VDD_DPHY)" group.byte 0x10++0x0 line.byte 0x0 "DPHYPWRCR_LL,D-PHY Power Supplying Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PWRSEN,D-PHY Power Supplying Control" "0: Disable D-PHY LDO operation (Stop supplying..,1: Enable D-PHY LDO operation (Supply VDD_DPHY)" rgroup.long 0x1C++0x3 line.long 0x0 "DPHYSFR,D-PHY Status Flag Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000." bitfld.long 0x0 8. "PLLSF,D-PHY PLL Oscillation Stabilization Flag" "0: D-PHY PLL clock is stopped or is not yet stable,1: D-PHY PLL clock is stable" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 0. "PWRSF,D-PHY LDO Power-on Status Flag" "0: D-PHY LDO is stopped or starting up,1: D-PHY LDO startup is completed (VDD_DPHY is.." rgroup.word 0x1C++0x1 line.word 0x0 "DPHYSFR_L,D-PHY Status Flag Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 8. "PLLSF,D-PHY PLL Oscillation Stabilization Flag" "0: D-PHY PLL clock is stopped or is not yet stable,1: D-PHY PLL clock is stable" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 0. "PWRSF,D-PHY LDO Power-on Status Flag" "0: D-PHY LDO is stopped or starting up,1: D-PHY LDO startup is completed (VDD_DPHY is.." rgroup.byte 0x1C++0x1 line.byte 0x0 "DPHYSFR_LL,D-PHY Status Flag Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "PWRSF,D-PHY LDO Power-on Status Flag" "0: D-PHY LDO is stopped or starting up,1: D-PHY LDO startup is completed (VDD_DPHY is.." line.byte 0x1 "DPHYSFR_LH,D-PHY Status Flag Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x1 0. "PLLSF,D-PHY PLL Oscillation Stabilization Flag" "0: D-PHY PLL clock is stopped or is not yet stable,1: D-PHY PLL clock is stable" group.long 0x20++0x3 line.long 0x0 "DPHYOCR,D-PHY Operation Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "DPHYEN,D-PHY Operation Control" "0: Disable D-PHY operation,1: Enable D-PHY operation" group.word 0x20++0x1 line.word 0x0 "DPHYOCR_L,D-PHY Operation Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "DPHYEN,D-PHY Operation Control" "0: Disable D-PHY operation,1: Enable D-PHY operation" group.byte 0x20++0x0 line.byte 0x0 "DPHYOCR_LL,D-PHY Operation Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DPHYEN,D-PHY Operation Control" "0: Disable D-PHY operation,1: Enable D-PHY operation" group.long 0x24++0x3 line.long 0x0 "DPHYTIM1,D-PHY Timing Control Register 1" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." hexmask.long.tbyte 0x0 0.--18. 1. "TINIT,D-PHY T_INIT Parameter Setting" group.word 0x24++0x1 line.word 0x0 "DPHYTIM1_L,D-PHY Timing Control Register 1" hexmask.word 0x0 0.--15. 1. "TINIT,D-PHY T_INIT Parameter Setting" group.byte 0x24++0x1 line.byte 0x0 "DPHYTIM1_LL,D-PHY Timing Control Register 1" hexmask.byte 0x0 0.--7. 1. "TINIT,D-PHY T_INIT Parameter Setting" line.byte 0x1 "DPHYTIM1_LH,D-PHY Timing Control Register 1" hexmask.byte 0x1 0.--7. 1. "TINIT,D-PHY T_INIT Parameter Setting" group.word 0x26++0x1 line.word 0x0 "DPHYTIM1_H,D-PHY Timing Control Register 1" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "TINIT,D-PHY T_INIT Parameter Setting" "0,1,2,3,4,5,6,7" group.byte 0x26++0x0 line.byte 0x0 "DPHYTIM1_HL,D-PHY Timing Control Register 1" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TINIT,D-PHY T_INIT Parameter Setting" "0,1,2,3,4,5,6,7" group.byte 0x28++0x2 line.byte 0x0 "DPHYTIM2_LL,D-PHY Timing Control Register 2" hexmask.byte 0x0 0.--7. 1. "TCLKPREP,D-PHY T_CLK_PREPARE Parameter Setting" line.byte 0x1 "DPHYTIM2_LH,D-PHY Timing Control Register 2" hexmask.byte 0x1 0.--7. 1. "Reserved,These bits are read as 00010000. The write value should be 00010000." line.byte 0x2 "DPHYTIM2_HL,D-PHY Timing Control Register 2" hexmask.byte 0x2 0.--7. 1. "Reserved,These bits are read as 00000010. The write value should be 00000010." group.byte 0x2C++0x1 line.byte 0x0 "DPHYTIM3_LL,D-PHY Timing Control Register 3" hexmask.byte 0x0 0.--7. 1. "THSPREP,D-PHY T_THS_PREPARE Parameter Setting" line.byte 0x1 "DPHYTIM3_LH,D-PHY Timing Control Register 3" hexmask.byte 0x1 0.--7. 1. "Reserved,These bits are read as 00010000. The write value should be 00010000." group.long 0x30++0x3 line.long 0x0 "DPHYTIM4,D-PHY Timing Control Register 4" hexmask.long.byte 0x0 24.--31. 1. "TCLKTRL,D-PHY T_TCLK_TRAIL Parameter Setting" hexmask.long.byte 0x0 16.--23. 1. "TCLKPOST,D-PHY T_TCLK_POST Parameter Setting" newline hexmask.long.byte 0x0 8.--15. 1. "TCLKPRE,D-PHY T_TCLK_PRE Parameter Setting" hexmask.long.byte 0x0 0.--7. 1. "TCLKZERO,D-PHY T_CLK_ZERO Parameter Setting" group.word 0x30++0x1 line.word 0x0 "DPHYTIM4_L,D-PHY Timing Control Register 4" hexmask.word.byte 0x0 8.--15. 1. "TCLKPRE,D-PHY T_TCLK_PRE Parameter Setting" hexmask.word.byte 0x0 0.--7. 1. "TCLKZERO,D-PHY T_CLK_ZERO Parameter Setting" group.byte 0x30++0x1 line.byte 0x0 "DPHYTIM4_LL,D-PHY Timing Control Register 4" hexmask.byte 0x0 0.--7. 1. "TCLKZERO,D-PHY T_CLK_ZERO Parameter Setting" line.byte 0x1 "DPHYTIM4_LH,D-PHY Timing Control Register 4" hexmask.byte 0x1 0.--7. 1. "TCLKPRE,D-PHY T_TCLK_PRE Parameter Setting" group.word 0x32++0x1 line.word 0x0 "DPHYTIM4_H,D-PHY Timing Control Register 4" hexmask.word.byte 0x0 8.--15. 1. "TCLKTRL,D-PHY T_TCLK_TRAIL Parameter Setting" hexmask.word.byte 0x0 0.--7. 1. "TCLKPOST,D-PHY T_TCLK_POST Parameter Setting" group.byte 0x32++0x1 line.byte 0x0 "DPHYTIM4_HL,D-PHY Timing Control Register 4" hexmask.byte 0x0 0.--7. 1. "TCLKPOST,D-PHY T_TCLK_POST Parameter Setting" line.byte 0x1 "DPHYTIM4_HH,D-PHY Timing Control Register 4" hexmask.byte 0x1 0.--7. 1. "TCLKTRL,D-PHY T_TCLK_TRAIL Parameter Setting" group.long 0x34++0x3 line.long 0x0 "DPHYTIM5,D-PHY Timing Control Register 5" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "THSEXIT,D-PHY T_THS_EXIT Parameter Setting" newline hexmask.long.byte 0x0 8.--15. 1. "THSTRL,D-PHY T_THS_TRAIL Parameter Setting" hexmask.long.byte 0x0 0.--7. 1. "THSZERO,D-PHY T_THS_ZERO Parameter Setting" group.word 0x34++0x1 line.word 0x0 "DPHYTIM5_L,D-PHY Timing Control Register 5" hexmask.word.byte 0x0 8.--15. 1. "THSTRL,D-PHY T_THS_TRAIL Parameter Setting" hexmask.word.byte 0x0 0.--7. 1. "THSZERO,D-PHY T_THS_ZERO Parameter Setting" group.byte 0x34++0x1 line.byte 0x0 "DPHYTIM5_LL,D-PHY Timing Control Register 5" hexmask.byte 0x0 0.--7. 1. "THSZERO,D-PHY T_THS_ZERO Parameter Setting" line.byte 0x1 "DPHYTIM5_LH,D-PHY Timing Control Register 5" hexmask.byte 0x1 0.--7. 1. "THSTRL,D-PHY T_THS_TRAIL Parameter Setting" group.word 0x36++0x1 line.word 0x0 "DPHYTIM5_H,D-PHY Timing Control Register 5" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "THSEXIT,D-PHY T_THS_EXIT Parameter Setting" group.byte 0x36++0x0 line.byte 0x0 "DPHYTIM5_HL,D-PHY Timing Control Register 5" hexmask.byte 0x0 0.--7. 1. "THSEXIT,D-PHY T_THS_EXIT Parameter Setting" group.long 0x38++0x3 line.long 0x0 "DPHYTIM6,D-PHY Timing Control Register 6" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TLPX,D-PHY T_TLPX Parameter Setting" group.word 0x38++0x1 line.word 0x0 "DPHYTIM6_L,D-PHY Timing Control Register 6" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "TLPX,D-PHY T_TLPX Parameter Setting" group.byte 0x38++0x0 line.byte 0x0 "DPHYTIM6_LL,D-PHY Timing Control Register 6" hexmask.byte 0x0 0.--7. 1. "TLPX,D-PHY T_TLPX Parameter Setting" tree.end tree.end tree "DRW (2D Drawing Engine)" base ad:0x0 tree "DRW" base ad:0x40344000 wgroup.long 0x0++0x3 line.long 0x0 "CONTROL,Geometry Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,The write value should be 00000000." bitfld.long 0x0 23. "SPANSTORE,Nextline span start is always equal or left to current-line span start" "0: disabled,1: enabled" newline bitfld.long 0x0 22. "SPANABORT,Shape is horizontally convex only a single span per scanline" "0: disabled,1: enabled" bitfld.long 0x0 21. "UNIONCD,Combine outputs C & D as union (output is final)" "0: minimum/intersect,1: maximum/union" newline bitfld.long 0x0 20. "UNIONAB,Combine outputs A & B as union (output is called C)" "0: minimum/intersect,1: maximum/union" bitfld.long 0x0 19. "UNION56,Combine limter 5 & 6 as union (output is called D)" "0: minimum/intersect,1: maximum/union" newline bitfld.long 0x0 18. "UNION34,Combine limter 3 & 4 as union (output is called B)" "0: minimum/intersect,1: maximum/union" bitfld.long 0x0 17. "UNION12,Combine limter 1 & 2 as union (output is called A)" "0: minimum/intersect,1: maximum/union" newline bitfld.long 0x0 16. "BAND2ENABLE,Enable band postprocess for limiter 1 (see L1BAND)" "0: disabled,1: enabled" bitfld.long 0x0 15. "BAND1ENABLE,Enable band postprocess for limiter 1 (see L1BAND)" "0: disabled,1: enabled" newline bitfld.long 0x0 14. "LIM6THRESHOLD,Enable limiter 6 threshold mode" "0: disabled,1: enabled" bitfld.long 0x0 13. "LIM5THRESHOLD,Enable limiter 5 threshold mode" "0: disabled,1: enabled" newline bitfld.long 0x0 12. "LIM4THRESHOLD,Enable limiter 4 threshold mode" "0: disabled,1: enabled" bitfld.long 0x0 11. "LIM3THRESHOLD,Enable limiter 3 threshold mode" "0: disabled,1: enabled" newline bitfld.long 0x0 10. "LIM2THRESHOLD,Enable limiter 2 threshold mode" "0: disabled,1: enabled" bitfld.long 0x0 9. "LIM1THRESHOLD,Enable limiter 1 threshold mode" "0: disabled,1: enabled" newline bitfld.long 0x0 8. "QUAD3ENABLE,Enable quadratic coupling of limiters 5 and 6" "0: disabled,1: enabled" bitfld.long 0x0 7. "QUAD2ENABLE,Enable quadratic coupling of limiters 3 and 4" "0: disabled,1: enabled" newline bitfld.long 0x0 6. "QUAD1ENABLE,Enable quadratic coupling of limiters 1 and 2" "0: disabled,1: enabled" bitfld.long 0x0 5. "LIM6ENABLE,Enable limiter 6" "0: disabled,1: enabled" newline bitfld.long 0x0 4. "LIM5ENABLE,Enable limiter 5" "0: disabled,1: enabled" bitfld.long 0x0 3. "LIM4ENABLE,Enable limiter 4" "0: disabled,1: enabled" newline bitfld.long 0x0 2. "LIM3ENABLE,Enable limiter 3" "0: disabled,1: enabled" bitfld.long 0x0 1. "LIM2ENABLE,Enable limiter 2" "0: disabled,1: enabled" newline bitfld.long 0x0 0. "LIM1ENABLE,Enable limiter 1" "0: disabled,1: enabled" rgroup.long 0x0++0x3 line.long 0x0 "STATUS,Status Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 10. "BUSERRMDL,display list bus error interrupt triggered" "0: no display list bus error occurred or interrupt..,1: display list bus error interrupt triggered" bitfld.long 0x0 9. "BUSERRMTXMRL,texture bus error interrupt triggered" "0: no texture bus error occurred or interrupt..,1: texture bus error interrupt triggered" newline bitfld.long 0x0 8. "BUSERRMFB,framebuffer bus error interrupt triggered" "0: no framebuffer bus error occured or interrupt..,1: framebuffer bus error interrupt triggered" bitfld.long 0x0 7. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 6. "BUSIRQ,bus error interrupt triggered" "0: no bus error occurred or interrupt disabled,1: bus error interrupt triggered" bitfld.long 0x0 5. "DLISTIRQ,display list finished interrupt triggered" "0: display list not finished or interrupt disabled,1: display list finished interrupt triggered" newline bitfld.long 0x0 4. "ENUMIRQ,enumeration finished interrupt triggered" "0: enumeration not finished or interrupt disabled,1: enumeration finished interrupt triggered" bitfld.long 0x0 3. "DLISTACTIVE,Display list reader status" "0: display list reader is idle,1: display list reader busy no direct write access.." newline bitfld.long 0x0 2. "CACHEDIRTY,Framebuffer cache status" "0: framebuffer cache is not dirty,1: framebuffer cache is dirty frame should not be.." bitfld.long 0x0 1. "BUSYWRITE,Framebuffer writeback status" "0: framebuffer writeback finished,1: framebuffer writeback busy framebuffer type can.." newline bitfld.long 0x0 0. "BUSYENUM,Enumeration unit status" "0: enumeration unit idle,1: enumeration unit busy new primitive can not be.." wgroup.long 0x4++0x3 line.long 0x0 "CONTROL2,Surface Control Register" bitfld.long 0x0 30.--31. "RLEPIXELWIDTH,Texel width for RLE unit" "0: 1 byte per texel,1: 2 byte per texel,?,?" bitfld.long 0x0 29. "BDIA,Blend destination factor inverted in alpha channel (USEACB = 1)" "0: use blend factor as specified through BDFA,1: invert blend destination factor (1-x)" newline bitfld.long 0x0 28. "BSIA,Blend source factor inverted in alpha channel (USEACB = 1)" "0: use blend factor as specified through BSFA,1: invert blend source factor (1-x)" bitfld.long 0x0 27. "CLUTFORMAT,Format of the CLUT" "0: aRGB(8888),1: RGB(565)" newline bitfld.long 0x0 26. "COLKEYENABLE,color keying enable" "0: color keying disabled,1: color keying enabled" bitfld.long 0x0 25. "CLUTENABLE,CLUT enable" "0: CLUT disabled,1: CLUT enabled" newline bitfld.long 0x0 24. "RLEENABLE,RLE enable" "0: RLE disabled,1: RLE enabled" bitfld.long 0x0 22.--23. "WRITEALPHA,Writeback alpha source for framebufferSet the 'alpha source' for the framebuffer(USEACB = 0)Blend alpha in color 2 instead of framebuffer alpha((USEACB = 1))In not alpha channel blending mode (USEACB = 0):Set the 'alpha source' for the.." "0: use alpha in color 2 as destination,1: use alpha from framebuffer as destination,?,?" newline bitfld.long 0x0 20.--21. "WRITEFORMAT10,Pixel format of the framebuffer" "0: 8bpp a(8)0,1: 16bpp RGB(565),?,?" bitfld.long 0x0 18.--19. "READFORMAT10,Pixel format of the texture buffer{READFORMAT32 READFORMAT10}0000: 8 bpp a(8)0001: 16 bpp RGB(565)0010: 32 bpp aRGB(8888)0011: 16 bpp aRGB(4444)0100: 16 bpp aRGB(1555)0101: 8 bpp aCLUT(44) 4 bit alpha and 4 bit indexed color1001: 8 bpp.." "0: 8 bpp a(8) (READFORMAT32=00) / 16 bpp aRGB(1555)..,1: 16 bpp RGB(565) (READFORMAT32=00) / 8 bpp..,?,?" newline bitfld.long 0x0 17. "TEXTUREFILTERY,Linear filtering on texture V axis" "0: no filtering on texture V axis,1: linear filtering on texture V axis" bitfld.long 0x0 16. "TEXTUREFILTERX,Linear filtering on texture U axis" "0: no filtering on texture U axis,1: linear filtering on texture U axis" newline bitfld.long 0x0 15. "TEXTURECLAMPY,Calculating V limiter outside use textureThe bit describes what happens if the V limiter (y direction in texture space) calculates a V value outside of the used texture" "0: Texture wrap mode: The integer part of the..,1: Texture clamp mode: The texture color at the.." bitfld.long 0x0 14. "TEXTURECLAMPX,Calculating U limiter outside use textureThe bit describes what happens if the U limiter (x direction in texture space) calculates a U value outside of the used texture" "0: Texture wrap mode: The integer part of the..,1: Texture clamp mode: The texture color at the.." newline bitfld.long 0x0 13. "BC2,Blend color 2 instead of framebuffer pixel" "0: use pixel from framebuffer as destination (DST),1: use color 2 as destination (DST)" bitfld.long 0x0 12. "BDI,Blend destination factor is inverteddst factor will be inverted (meaning 1-a or 1-1 depending on BDF)" "0: use blend factor as specified through BDF,1: a or 1-1 depending on BDF)" newline bitfld.long 0x0 11. "BSI,Blend source factor is invertedsrc factor will be inverted (meaning 1-a or 1-1 depending on BSF)" "0: use blend factor as specified through BSF,1: a or 1-1 depending on BSF)" bitfld.long 0x0 10. "BDF,Blend destination factordst factor is alpha (factor is 1 per default)" "0: use 1.0 as blend destination factor,1: use alpha as blend destination factor" newline bitfld.long 0x0 9. "BSF,Blend source factorsrc factor is alpha (factor is 1 per default)" "0: use 1.0 as blend source factor,1: use alpha as blend source factor" bitfld.long 0x0 8. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 7. "BDFA,Blend destinetion factor for alpha channel in alpha channel blending mode (USEACB = 1)" "0: use 1.0 as blend destination factor for alpha..,1: use alpha as blend destination factor for alpha.." bitfld.long 0x0 6. "BSFA,Blend source factor for alpha channel in alpha channel blending mode (USEACB = 1)" "0: use 1.0 as blend source factor for alpha channel,1: use alpha as blend source factor for alpha channel" newline bitfld.long 0x0 4.--5. "READFORMAT32,Bit 4 and 3 of the texture buffer format.See READFORMAT above for description" "0,1,2,3" bitfld.long 0x0 3. "USEACB,Alpha blend mode" "0: use WRITEALPHA[1:0] mode,1: use full alpha channel blending mode" newline bitfld.long 0x0 2. "PATTERNSOURCEL5,Limiter 5 is used as pattern index instead of the default U limiter.Limiter 5 can be combined with limiter 6 to form a quadratic limiter which can be used to make quadratic pattern functions to draw radial patterns." "0,1" bitfld.long 0x0 1. "TEXTUREENABLE,Pixel source is read from texture and used as an alpha to blend between COLOR1 and COLOR2" "0: disabled texture,1: enabled texture" newline bitfld.long 0x0 0. "PATTERNENABLE,Pixel source is a pattern color (blend of COLOR1 and COLOR2 depending on PATTERN and pattern index)" "0: disabled pattern,1: enabled pattern" rgroup.long 0x4++0x3 line.long 0x0 "HWREVISION,Hardware Version and Feature Set ID Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000." bitfld.long 0x0 27. "ACBLEND,Alpha channel blending feature" "0: Alpha channel blending unavailable,1: Alpha channel blending available" newline bitfld.long 0x0 26. "Reserved,This bit is read as 1." "0,1" bitfld.long 0x0 25. "COLORKEY,Colorkey feature" "0: Colorkey unavailable,1: Colorkey available" newline bitfld.long 0x0 24. "TEXCLUT256,Texture CLUT feature" "0: Texture CLUT unavailable,1: Texture CLUT available" bitfld.long 0x0 23. "RLEUNIT,RLE unit feature" "0: RLE unit unavailable,1: RLE unit available" newline bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 21. "TEXCLU,Texture CLUT with 16 or 256 entries feature" "0: Texture CLUT with 16 or 256 entries unavailable,1: Texture CLUT with 16 or 256 entries available" newline bitfld.long 0x0 20. "PERFCOUNT,Two performance counter feature" "0: Two performance counter unavailable,1: Two performance counter available" bitfld.long 0x0 19. "TXCACHE,Texture cache feature" "0: Texture cache unavailable,1: Texture cache available" newline bitfld.long 0x0 18. "FBCACHE,Framebuffer cache feature" "0: Framebuffer cache unavailable,1: Framebuffer cache available" bitfld.long 0x0 17. "DLR,Display list reader feature" "0: Display list reader unavailable,1: Display list reader available" newline bitfld.long 0x0 16. "Reserved,This bit is read as 0." "0,1" hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000." newline hexmask.long.word 0x0 0.--11. 1. "REV,Revision number" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "L$1START,Limiter %s Start Value Register" hexmask.long 0x0 0.--31. 1. "LSTART,Start value of the n'th limiter(n=1-6)" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x28)++0x3 line.long 0x0 "L$1XADD,Limiter %s X-Axis Increment Register" hexmask.long 0x0 0.--31. 1. "LXADD,X-axis increment" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "L$1YADD,Limiter %s Y-Axis Increment Register" hexmask.long 0x0 0.--31. 1. "LYADD,Y-axis increment" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x58)++0x3 line.long 0x0 "L$1BAND,Limiter %s Band Width Parameter Register" hexmask.long 0x0 0.--31. 1. "LBAND,Limiter m band width parameter" repeat.end wgroup.long 0x64++0x7 line.long 0x0 "COLOR1,Base Color Register" hexmask.long.byte 0x0 24.--31. 1. "COLOR1A,Alpha channel of color 1(0x00: transparent. . . 0xFF: opaque)" hexmask.long.byte 0x0 16.--23. 1. "COLOR1R,Red channel of color 1" newline hexmask.long.byte 0x0 8.--15. 1. "COLOR1G,Green channel of color 1" hexmask.long.byte 0x0 0.--7. 1. "COLOR1B,Blue channel of color 1" line.long 0x4 "COLOR2,Secondary Color Register" hexmask.long.byte 0x4 24.--31. 1. "COLOR2A,Alpha channel of color 2(0x00: transparent. . . 0xFF: opaque)" hexmask.long.byte 0x4 16.--23. 1. "COLOR2R,Red channel of color 2" newline hexmask.long.byte 0x4 8.--15. 1. "COLOR2G,Green channel of color 2" hexmask.long.byte 0x4 0.--7. 1. "COLOR2B,Blue channel of color 2" wgroup.long 0x74++0xF line.long 0x0 "PATTERN,Pattern Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,The write value should be 00000000." newline hexmask.long.byte 0x0 0.--7. 1. "PATTERN,Bitmap of the pattern" line.long 0x4 "SIZE,Bounding Box Dimension Register" hexmask.long.word 0x4 16.--31. 1. "SIZEY,Height of the bounding box in pixelsvalid range: 0 to 1024" hexmask.long.word 0x4 0.--15. 1. "SIZEX,Width of the bounding box in pixelsvalid range: 0 to 1024" line.long 0x8 "PITCH,Framebuffer Pitch And Spanstore Delay Register" hexmask.long.word 0x8 16.--31. 1. "SSD,Spanstore delay" hexmask.long.word 0x8 0.--15. 1. "PITCH,pitch of the framebuffer. A negative width can be used to render bottom-up instead of top-down" line.long 0xC "ORIGIN,Framebuffer Base Address Register" hexmask.long 0xC 0.--31. 1. "ORIGIN,Address of the first pixel in framebuffer" wgroup.long 0x90++0x1F line.long 0x0 "LUSTART,U Limiter Start Value Register" hexmask.long 0x0 0.--31. 1. "LUSTART,U limiter start value" line.long 0x4 "LUXADD,U Limiter X-Axis Increment Register" hexmask.long 0x4 0.--31. 1. "LUXADD,U limiter x-axis increment" line.long 0x8 "LUYADD,U Limiter Y-Axis Increment Register" hexmask.long 0x8 0.--31. 1. "LUYADD,U limiter y-axis increment" line.long 0xC "LVSTARTI,V Limiter Start Value Integer Part Register" hexmask.long 0xC 0.--31. 1. "LVSTARTI,V limiter start value integer part" line.long 0x10 "LVSTARTF,V Limiter Start Value Fractional Part Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x10 0.--15. 1. "LVSTARTF,V limiter start value fractional part" line.long 0x14 "LVXADDI,V Limiter X-Axis Increment Integer Part Register" hexmask.long 0x14 0.--31. 1. "LVXADDI,V limiter x-axis increment integer part" line.long 0x18 "LVYADDI,V Limiter Y-Axis Increment Integer Part Register" hexmask.long 0x18 0.--31. 1. "LVYADDI,V limiter y-axis increment integer part" line.long 0x1C "LVYXADDF,V Limiter Increment Fractional Parts Register" hexmask.long.word 0x1C 16.--31. 1. "LVYADDF,V y limiter increment fractional part" hexmask.long.word 0x1C 0.--15. 1. "LVXADDF,V xlimiter increment fractional part" wgroup.long 0xB4++0x17 line.long 0x0 "TEXPITCH,Texels Per Texture Line Register" hexmask.long 0x0 0.--31. 1. "TEXPITCH,Texels per texture linevalid range: 0 to 2048" line.long 0x4 "TEXMASK,Texture Size or Texture Address Mask Register" hexmask.long.tbyte 0x4 11.--31. 1. "TEXVMASK,V maskSet TEXVMASK[20:0] = TEXPITCH * (texture_height - 1).In texture wrapping mode (CONTROL2.TEXTURECLAMPY = 0): texture_height must be a power of 2In texture clamping mode (CONTROL2.TEXTURECLAMPY = 1):all heights up to 1024 are allowed." hexmask.long.word 0x4 0.--10. 1. "TEXUMASK,U maskSet TEXUMASK[10:0] = texture_width -1In texture wrapping mode (CONTROL2.TEXTURECLAMPX = 0): texture_width must be a power of 2.In texture clamping mode (CONTROL2.TEXTURECLAMPX = 1):all widths up to 2048 are allowed." line.long 0x8 "TEXORIGIN,Texture Base Address Register" hexmask.long 0x8 0.--31. 1. "TEXORIGIN,Texture base address" line.long 0xC "IRQCTL,Interrupt Control Register" hexmask.long.word 0xC 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0xC 6.--15. 1. "Reserved,The write value should be 0000000000." newline bitfld.long 0xC 5. "BUSIRQCLR,Clear bus error interrupt BUSIRQ" "0: no BUSIRQCLR clear,1: clear BUSIRQCLR" bitfld.long 0xC 4. "BUSIRQEN,BUSIRQ interrupt mask enable" "0: disable (mask) BUSIRQ,1: enable (unmask) BUSIRQ" newline bitfld.long 0xC 3. "DLISTIRQCLR,Clear display list interrupt DLISTIRQ" "0: no DLISTRQCLR clear,1: clear DLISTRQCLR" bitfld.long 0xC 2. "ENUMIRQCLR,Clear enumeration interrupt ENUMIRQ" "0: no ENUMIRQCLR clear,1: clear ENUMIRQCLR" newline bitfld.long 0xC 1. "DLISTIRQEN,DLISTIRQ interrupt mask enable" "0: disable (mask) DLISTIRQ,1: enable (unmask) DLISTIRQ" bitfld.long 0xC 0. "ENUMIRQEN,ENUMIRQ interrupt mask enable" "0: disable (mask) ENUMIRQ,1: enable (unmask) ENUMIRQ" line.long 0x10 "CACHECTL,Cache Control Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x10 4.--15. 1. "Reserved,The write value should be 000000000000." newline bitfld.long 0x10 3. "CFLUSHTX,Flush texture cache" "0: do not flush the texture cache,1: flush the texture cache" bitfld.long 0x10 2. "CENABLETX,Texture cache enable" "0: disable the texture cache,1: enable the texture cache" newline bitfld.long 0x10 1. "CFLUSHFX,Flush framebuffer cache" "0: do not flush the framebuffer cache,1: flush the framebuffer cache" bitfld.long 0x10 0. "CENABLEFX,Framebuffer cache enable" "0: disable the framebuffer cache,1: enable the framebuffer cache" line.long 0x14 "DLISTSTART,Display List Start Address Register" hexmask.long 0x14 0.--31. 1. "DLISTSTART,Display list start address" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xCC)++0x3 line.long 0x0 "PERFCOUNT$1,Performance Counter %s" hexmask.long 0x0 0.--31. 1. "PERFCOUNTk,Counter value.The counter is reset by writing PERFCOUNT = 0000 0000H." repeat.end wgroup.long 0xD4++0x3 line.long 0x0 "PERFTRIGGER,Performance Counters Control Register" hexmask.long.word 0x0 16.--31. 1. "PERFTRIGGER2,Selects the internal event that will increment PERFCOUNT2 register" hexmask.long.word 0x0 0.--15. 1. "PERFTRIGGER1,Selects the internal event that will increment PERFCOUNT1 register." wgroup.long 0xDC++0xF line.long 0x0 "TEXCLADDR,CLUT Start Address Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,The write value should be 00000000." newline hexmask.long.byte 0x0 0.--7. 1. "CLADDR,Texture CLUT start address for indexed texture format" line.long 0x4 "TEXCLDATA,CLUT Data Register" hexmask.long 0x4 0.--31. 1. "CLDATA,Texture CLUT data for Indexed texture format" line.long 0x8 "TEXCLOFFSET,CLUT Offset Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x8 8.--15. 1. "Reserved,The write value should be 00000000." newline hexmask.long.byte 0x8 0.--7. 1. "CLOFFSET,Texture CLUT offset for Indexed texture format. CLOFFSET[7:0] is or'ed with the original index" line.long 0xC "COLKEY,Color Key Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,The write value should be 00000000." hexmask.long.byte 0xC 16.--23. 1. "COLKEYR,Red channel of color key" newline hexmask.long.byte 0xC 8.--15. 1. "COLKEYG,Green channel of color key" hexmask.long.byte 0xC 0.--7. 1. "COLKEYB,Blue channel of color key" tree.end tree "DRW_NS" base ad:0x50344000 wgroup.long 0x0++0x3 line.long 0x0 "CONTROL,Geometry Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,The write value should be 00000000." bitfld.long 0x0 23. "SPANSTORE,Nextline span start is always equal or left to current-line span start" "0: disabled,1: enabled" newline bitfld.long 0x0 22. "SPANABORT,Shape is horizontally convex only a single span per scanline" "0: disabled,1: enabled" bitfld.long 0x0 21. "UNIONCD,Combine outputs C & D as union (output is final)" "0: minimum/intersect,1: maximum/union" newline bitfld.long 0x0 20. "UNIONAB,Combine outputs A & B as union (output is called C)" "0: minimum/intersect,1: maximum/union" bitfld.long 0x0 19. "UNION56,Combine limter 5 & 6 as union (output is called D)" "0: minimum/intersect,1: maximum/union" newline bitfld.long 0x0 18. "UNION34,Combine limter 3 & 4 as union (output is called B)" "0: minimum/intersect,1: maximum/union" bitfld.long 0x0 17. "UNION12,Combine limter 1 & 2 as union (output is called A)" "0: minimum/intersect,1: maximum/union" newline bitfld.long 0x0 16. "BAND2ENABLE,Enable band postprocess for limiter 1 (see L1BAND)" "0: disabled,1: enabled" bitfld.long 0x0 15. "BAND1ENABLE,Enable band postprocess for limiter 1 (see L1BAND)" "0: disabled,1: enabled" newline bitfld.long 0x0 14. "LIM6THRESHOLD,Enable limiter 6 threshold mode" "0: disabled,1: enabled" bitfld.long 0x0 13. "LIM5THRESHOLD,Enable limiter 5 threshold mode" "0: disabled,1: enabled" newline bitfld.long 0x0 12. "LIM4THRESHOLD,Enable limiter 4 threshold mode" "0: disabled,1: enabled" bitfld.long 0x0 11. "LIM3THRESHOLD,Enable limiter 3 threshold mode" "0: disabled,1: enabled" newline bitfld.long 0x0 10. "LIM2THRESHOLD,Enable limiter 2 threshold mode" "0: disabled,1: enabled" bitfld.long 0x0 9. "LIM1THRESHOLD,Enable limiter 1 threshold mode" "0: disabled,1: enabled" newline bitfld.long 0x0 8. "QUAD3ENABLE,Enable quadratic coupling of limiters 5 and 6" "0: disabled,1: enabled" bitfld.long 0x0 7. "QUAD2ENABLE,Enable quadratic coupling of limiters 3 and 4" "0: disabled,1: enabled" newline bitfld.long 0x0 6. "QUAD1ENABLE,Enable quadratic coupling of limiters 1 and 2" "0: disabled,1: enabled" bitfld.long 0x0 5. "LIM6ENABLE,Enable limiter 6" "0: disabled,1: enabled" newline bitfld.long 0x0 4. "LIM5ENABLE,Enable limiter 5" "0: disabled,1: enabled" bitfld.long 0x0 3. "LIM4ENABLE,Enable limiter 4" "0: disabled,1: enabled" newline bitfld.long 0x0 2. "LIM3ENABLE,Enable limiter 3" "0: disabled,1: enabled" bitfld.long 0x0 1. "LIM2ENABLE,Enable limiter 2" "0: disabled,1: enabled" newline bitfld.long 0x0 0. "LIM1ENABLE,Enable limiter 1" "0: disabled,1: enabled" rgroup.long 0x0++0x3 line.long 0x0 "STATUS,Status Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 10. "BUSERRMDL,display list bus error interrupt triggered" "0: no display list bus error occurred or interrupt..,1: display list bus error interrupt triggered" bitfld.long 0x0 9. "BUSERRMTXMRL,texture bus error interrupt triggered" "0: no texture bus error occurred or interrupt..,1: texture bus error interrupt triggered" newline bitfld.long 0x0 8. "BUSERRMFB,framebuffer bus error interrupt triggered" "0: no framebuffer bus error occured or interrupt..,1: framebuffer bus error interrupt triggered" bitfld.long 0x0 7. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 6. "BUSIRQ,bus error interrupt triggered" "0: no bus error occurred or interrupt disabled,1: bus error interrupt triggered" bitfld.long 0x0 5. "DLISTIRQ,display list finished interrupt triggered" "0: display list not finished or interrupt disabled,1: display list finished interrupt triggered" newline bitfld.long 0x0 4. "ENUMIRQ,enumeration finished interrupt triggered" "0: enumeration not finished or interrupt disabled,1: enumeration finished interrupt triggered" bitfld.long 0x0 3. "DLISTACTIVE,Display list reader status" "0: display list reader is idle,1: display list reader busy no direct write access.." newline bitfld.long 0x0 2. "CACHEDIRTY,Framebuffer cache status" "0: framebuffer cache is not dirty,1: framebuffer cache is dirty frame should not be.." bitfld.long 0x0 1. "BUSYWRITE,Framebuffer writeback status" "0: framebuffer writeback finished,1: framebuffer writeback busy framebuffer type can.." newline bitfld.long 0x0 0. "BUSYENUM,Enumeration unit status" "0: enumeration unit idle,1: enumeration unit busy new primitive can not be.." wgroup.long 0x4++0x3 line.long 0x0 "CONTROL2,Surface Control Register" bitfld.long 0x0 30.--31. "RLEPIXELWIDTH,Texel width for RLE unit" "0: 1 byte per texel,1: 2 byte per texel,?,?" bitfld.long 0x0 29. "BDIA,Blend destination factor inverted in alpha channel (USEACB = 1)" "0: use blend factor as specified through BDFA,1: invert blend destination factor (1-x)" newline bitfld.long 0x0 28. "BSIA,Blend source factor inverted in alpha channel (USEACB = 1)" "0: use blend factor as specified through BSFA,1: invert blend source factor (1-x)" bitfld.long 0x0 27. "CLUTFORMAT,Format of the CLUT" "0: aRGB(8888),1: RGB(565)" newline bitfld.long 0x0 26. "COLKEYENABLE,color keying enable" "0: color keying disabled,1: color keying enabled" bitfld.long 0x0 25. "CLUTENABLE,CLUT enable" "0: CLUT disabled,1: CLUT enabled" newline bitfld.long 0x0 24. "RLEENABLE,RLE enable" "0: RLE disabled,1: RLE enabled" bitfld.long 0x0 22.--23. "WRITEALPHA,Writeback alpha source for framebufferSet the 'alpha source' for the framebuffer(USEACB = 0)Blend alpha in color 2 instead of framebuffer alpha((USEACB = 1))In not alpha channel blending mode (USEACB = 0):Set the 'alpha source' for the.." "0: use alpha in color 2 as destination,1: use alpha from framebuffer as destination,?,?" newline bitfld.long 0x0 20.--21. "WRITEFORMAT10,Pixel format of the framebuffer" "0: 8bpp a(8)0,1: 16bpp RGB(565),?,?" bitfld.long 0x0 18.--19. "READFORMAT10,Pixel format of the texture buffer{READFORMAT32 READFORMAT10}0000: 8 bpp a(8)0001: 16 bpp RGB(565)0010: 32 bpp aRGB(8888)0011: 16 bpp aRGB(4444)0100: 16 bpp aRGB(1555)0101: 8 bpp aCLUT(44) 4 bit alpha and 4 bit indexed color1001: 8 bpp.." "0: 8 bpp a(8) (READFORMAT32=00) / 16 bpp aRGB(1555)..,1: 16 bpp RGB(565) (READFORMAT32=00) / 8 bpp..,?,?" newline bitfld.long 0x0 17. "TEXTUREFILTERY,Linear filtering on texture V axis" "0: no filtering on texture V axis,1: linear filtering on texture V axis" bitfld.long 0x0 16. "TEXTUREFILTERX,Linear filtering on texture U axis" "0: no filtering on texture U axis,1: linear filtering on texture U axis" newline bitfld.long 0x0 15. "TEXTURECLAMPY,Calculating V limiter outside use textureThe bit describes what happens if the V limiter (y direction in texture space) calculates a V value outside of the used texture" "0: Texture wrap mode: The integer part of the..,1: Texture clamp mode: The texture color at the.." bitfld.long 0x0 14. "TEXTURECLAMPX,Calculating U limiter outside use textureThe bit describes what happens if the U limiter (x direction in texture space) calculates a U value outside of the used texture" "0: Texture wrap mode: The integer part of the..,1: Texture clamp mode: The texture color at the.." newline bitfld.long 0x0 13. "BC2,Blend color 2 instead of framebuffer pixel" "0: use pixel from framebuffer as destination (DST),1: use color 2 as destination (DST)" bitfld.long 0x0 12. "BDI,Blend destination factor is inverteddst factor will be inverted (meaning 1-a or 1-1 depending on BDF)" "0: use blend factor as specified through BDF,1: a or 1-1 depending on BDF)" newline bitfld.long 0x0 11. "BSI,Blend source factor is invertedsrc factor will be inverted (meaning 1-a or 1-1 depending on BSF)" "0: use blend factor as specified through BSF,1: a or 1-1 depending on BSF)" bitfld.long 0x0 10. "BDF,Blend destination factordst factor is alpha (factor is 1 per default)" "0: use 1.0 as blend destination factor,1: use alpha as blend destination factor" newline bitfld.long 0x0 9. "BSF,Blend source factorsrc factor is alpha (factor is 1 per default)" "0: use 1.0 as blend source factor,1: use alpha as blend source factor" bitfld.long 0x0 8. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 7. "BDFA,Blend destinetion factor for alpha channel in alpha channel blending mode (USEACB = 1)" "0: use 1.0 as blend destination factor for alpha..,1: use alpha as blend destination factor for alpha.." bitfld.long 0x0 6. "BSFA,Blend source factor for alpha channel in alpha channel blending mode (USEACB = 1)" "0: use 1.0 as blend source factor for alpha channel,1: use alpha as blend source factor for alpha channel" newline bitfld.long 0x0 4.--5. "READFORMAT32,Bit 4 and 3 of the texture buffer format.See READFORMAT above for description" "0,1,2,3" bitfld.long 0x0 3. "USEACB,Alpha blend mode" "0: use WRITEALPHA[1:0] mode,1: use full alpha channel blending mode" newline bitfld.long 0x0 2. "PATTERNSOURCEL5,Limiter 5 is used as pattern index instead of the default U limiter.Limiter 5 can be combined with limiter 6 to form a quadratic limiter which can be used to make quadratic pattern functions to draw radial patterns." "0,1" bitfld.long 0x0 1. "TEXTUREENABLE,Pixel source is read from texture and used as an alpha to blend between COLOR1 and COLOR2" "0: disabled texture,1: enabled texture" newline bitfld.long 0x0 0. "PATTERNENABLE,Pixel source is a pattern color (blend of COLOR1 and COLOR2 depending on PATTERN and pattern index)" "0: disabled pattern,1: enabled pattern" rgroup.long 0x4++0x3 line.long 0x0 "HWREVISION,Hardware Version and Feature Set ID Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000." bitfld.long 0x0 27. "ACBLEND,Alpha channel blending feature" "0: Alpha channel blending unavailable,1: Alpha channel blending available" newline bitfld.long 0x0 26. "Reserved,This bit is read as 1." "0,1" bitfld.long 0x0 25. "COLORKEY,Colorkey feature" "0: Colorkey unavailable,1: Colorkey available" newline bitfld.long 0x0 24. "TEXCLUT256,Texture CLUT feature" "0: Texture CLUT unavailable,1: Texture CLUT available" bitfld.long 0x0 23. "RLEUNIT,RLE unit feature" "0: RLE unit unavailable,1: RLE unit available" newline bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 21. "TEXCLU,Texture CLUT with 16 or 256 entries feature" "0: Texture CLUT with 16 or 256 entries unavailable,1: Texture CLUT with 16 or 256 entries available" newline bitfld.long 0x0 20. "PERFCOUNT,Two performance counter feature" "0: Two performance counter unavailable,1: Two performance counter available" bitfld.long 0x0 19. "TXCACHE,Texture cache feature" "0: Texture cache unavailable,1: Texture cache available" newline bitfld.long 0x0 18. "FBCACHE,Framebuffer cache feature" "0: Framebuffer cache unavailable,1: Framebuffer cache available" bitfld.long 0x0 17. "DLR,Display list reader feature" "0: Display list reader unavailable,1: Display list reader available" newline bitfld.long 0x0 16. "Reserved,This bit is read as 0." "0,1" hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000." newline hexmask.long.word 0x0 0.--11. 1. "REV,Revision number" repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x10)++0x3 line.long 0x0 "L$1START,Limiter %s Start Value Register" hexmask.long 0x0 0.--31. 1. "LSTART,Start value of the n'th limiter(n=1-6)" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x28)++0x3 line.long 0x0 "L$1XADD,Limiter %s X-Axis Increment Register" hexmask.long 0x0 0.--31. 1. "LXADD,X-axis increment" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x40)++0x3 line.long 0x0 "L$1YADD,Limiter %s Y-Axis Increment Register" hexmask.long 0x0 0.--31. 1. "LYADD,Y-axis increment" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2+0x58)++0x3 line.long 0x0 "L$1BAND,Limiter %s Band Width Parameter Register" hexmask.long 0x0 0.--31. 1. "LBAND,Limiter m band width parameter" repeat.end wgroup.long 0x64++0x7 line.long 0x0 "COLOR1,Base Color Register" hexmask.long.byte 0x0 24.--31. 1. "COLOR1A,Alpha channel of color 1(0x00: transparent. . . 0xFF: opaque)" hexmask.long.byte 0x0 16.--23. 1. "COLOR1R,Red channel of color 1" newline hexmask.long.byte 0x0 8.--15. 1. "COLOR1G,Green channel of color 1" hexmask.long.byte 0x0 0.--7. 1. "COLOR1B,Blue channel of color 1" line.long 0x4 "COLOR2,Secondary Color Register" hexmask.long.byte 0x4 24.--31. 1. "COLOR2A,Alpha channel of color 2(0x00: transparent. . . 0xFF: opaque)" hexmask.long.byte 0x4 16.--23. 1. "COLOR2R,Red channel of color 2" newline hexmask.long.byte 0x4 8.--15. 1. "COLOR2G,Green channel of color 2" hexmask.long.byte 0x4 0.--7. 1. "COLOR2B,Blue channel of color 2" wgroup.long 0x74++0xF line.long 0x0 "PATTERN,Pattern Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,The write value should be 00000000." newline hexmask.long.byte 0x0 0.--7. 1. "PATTERN,Bitmap of the pattern" line.long 0x4 "SIZE,Bounding Box Dimension Register" hexmask.long.word 0x4 16.--31. 1. "SIZEY,Height of the bounding box in pixelsvalid range: 0 to 1024" hexmask.long.word 0x4 0.--15. 1. "SIZEX,Width of the bounding box in pixelsvalid range: 0 to 1024" line.long 0x8 "PITCH,Framebuffer Pitch And Spanstore Delay Register" hexmask.long.word 0x8 16.--31. 1. "SSD,Spanstore delay" hexmask.long.word 0x8 0.--15. 1. "PITCH,pitch of the framebuffer. A negative width can be used to render bottom-up instead of top-down" line.long 0xC "ORIGIN,Framebuffer Base Address Register" hexmask.long 0xC 0.--31. 1. "ORIGIN,Address of the first pixel in framebuffer" wgroup.long 0x90++0x1F line.long 0x0 "LUSTART,U Limiter Start Value Register" hexmask.long 0x0 0.--31. 1. "LUSTART,U limiter start value" line.long 0x4 "LUXADD,U Limiter X-Axis Increment Register" hexmask.long 0x4 0.--31. 1. "LUXADD,U limiter x-axis increment" line.long 0x8 "LUYADD,U Limiter Y-Axis Increment Register" hexmask.long 0x8 0.--31. 1. "LUYADD,U limiter y-axis increment" line.long 0xC "LVSTARTI,V Limiter Start Value Integer Part Register" hexmask.long 0xC 0.--31. 1. "LVSTARTI,V limiter start value integer part" line.long 0x10 "LVSTARTF,V Limiter Start Value Fractional Part Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x10 0.--15. 1. "LVSTARTF,V limiter start value fractional part" line.long 0x14 "LVXADDI,V Limiter X-Axis Increment Integer Part Register" hexmask.long 0x14 0.--31. 1. "LVXADDI,V limiter x-axis increment integer part" line.long 0x18 "LVYADDI,V Limiter Y-Axis Increment Integer Part Register" hexmask.long 0x18 0.--31. 1. "LVYADDI,V limiter y-axis increment integer part" line.long 0x1C "LVYXADDF,V Limiter Increment Fractional Parts Register" hexmask.long.word 0x1C 16.--31. 1. "LVYADDF,V y limiter increment fractional part" hexmask.long.word 0x1C 0.--15. 1. "LVXADDF,V xlimiter increment fractional part" wgroup.long 0xB4++0x17 line.long 0x0 "TEXPITCH,Texels Per Texture Line Register" hexmask.long 0x0 0.--31. 1. "TEXPITCH,Texels per texture linevalid range: 0 to 2048" line.long 0x4 "TEXMASK,Texture Size or Texture Address Mask Register" hexmask.long.tbyte 0x4 11.--31. 1. "TEXVMASK,V maskSet TEXVMASK[20:0] = TEXPITCH * (texture_height - 1).In texture wrapping mode (CONTROL2.TEXTURECLAMPY = 0): texture_height must be a power of 2In texture clamping mode (CONTROL2.TEXTURECLAMPY = 1):all heights up to 1024 are allowed." hexmask.long.word 0x4 0.--10. 1. "TEXUMASK,U maskSet TEXUMASK[10:0] = texture_width -1In texture wrapping mode (CONTROL2.TEXTURECLAMPX = 0): texture_width must be a power of 2.In texture clamping mode (CONTROL2.TEXTURECLAMPX = 1):all widths up to 2048 are allowed." line.long 0x8 "TEXORIGIN,Texture Base Address Register" hexmask.long 0x8 0.--31. 1. "TEXORIGIN,Texture base address" line.long 0xC "IRQCTL,Interrupt Control Register" hexmask.long.word 0xC 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0xC 6.--15. 1. "Reserved,The write value should be 0000000000." newline bitfld.long 0xC 5. "BUSIRQCLR,Clear bus error interrupt BUSIRQ" "0: no BUSIRQCLR clear,1: clear BUSIRQCLR" bitfld.long 0xC 4. "BUSIRQEN,BUSIRQ interrupt mask enable" "0: disable (mask) BUSIRQ,1: enable (unmask) BUSIRQ" newline bitfld.long 0xC 3. "DLISTIRQCLR,Clear display list interrupt DLISTIRQ" "0: no DLISTRQCLR clear,1: clear DLISTRQCLR" bitfld.long 0xC 2. "ENUMIRQCLR,Clear enumeration interrupt ENUMIRQ" "0: no ENUMIRQCLR clear,1: clear ENUMIRQCLR" newline bitfld.long 0xC 1. "DLISTIRQEN,DLISTIRQ interrupt mask enable" "0: disable (mask) DLISTIRQ,1: enable (unmask) DLISTIRQ" bitfld.long 0xC 0. "ENUMIRQEN,ENUMIRQ interrupt mask enable" "0: disable (mask) ENUMIRQ,1: enable (unmask) ENUMIRQ" line.long 0x10 "CACHECTL,Cache Control Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.word 0x10 4.--15. 1. "Reserved,The write value should be 000000000000." newline bitfld.long 0x10 3. "CFLUSHTX,Flush texture cache" "0: do not flush the texture cache,1: flush the texture cache" bitfld.long 0x10 2. "CENABLETX,Texture cache enable" "0: disable the texture cache,1: enable the texture cache" newline bitfld.long 0x10 1. "CFLUSHFX,Flush framebuffer cache" "0: do not flush the framebuffer cache,1: flush the framebuffer cache" bitfld.long 0x10 0. "CENABLEFX,Framebuffer cache enable" "0: disable the framebuffer cache,1: enable the framebuffer cache" line.long 0x14 "DLISTSTART,Display List Start Address Register" hexmask.long 0x14 0.--31. 1. "DLISTSTART,Display list start address" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xCC)++0x3 line.long 0x0 "PERFCOUNT$1,Performance Counter %s" hexmask.long 0x0 0.--31. 1. "PERFCOUNTk,Counter value.The counter is reset by writing PERFCOUNT = 0000 0000H." repeat.end wgroup.long 0xD4++0x3 line.long 0x0 "PERFTRIGGER,Performance Counters Control Register" hexmask.long.word 0x0 16.--31. 1. "PERFTRIGGER2,Selects the internal event that will increment PERFCOUNT2 register" hexmask.long.word 0x0 0.--15. 1. "PERFTRIGGER1,Selects the internal event that will increment PERFCOUNT1 register." wgroup.long 0xDC++0xF line.long 0x0 "TEXCLADDR,CLUT Start Address Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,The write value should be 00000000." newline hexmask.long.byte 0x0 0.--7. 1. "CLADDR,Texture CLUT start address for indexed texture format" line.long 0x4 "TEXCLDATA,CLUT Data Register" hexmask.long 0x4 0.--31. 1. "CLDATA,Texture CLUT data for Indexed texture format" line.long 0x8 "TEXCLOFFSET,CLUT Offset Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x8 8.--15. 1. "Reserved,The write value should be 00000000." newline hexmask.long.byte 0x8 0.--7. 1. "CLOFFSET,Texture CLUT offset for Indexed texture format. CLOFFSET[7:0] is or'ed with the original index" line.long 0xC "COLKEY,Color Key Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,The write value should be 00000000." hexmask.long.byte 0xC 16.--23. 1. "COLKEYR,Red channel of color key" newline hexmask.long.byte 0xC 8.--15. 1. "COLKEYG,Green channel of color key" hexmask.long.byte 0xC 0.--7. 1. "COLKEYB,Blue channel of color key" tree.end tree.end tree "DSILINK (DSI Link)" base ad:0x0 tree "DSILINK" base ad:0x40346000 rgroup.long 0x0++0x3 line.long 0x0 "ISR,Interrupt Status Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "Reserved,This bit is read as 0." "0,1" newline hexmask.long.byte 0x0 21.--27. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 20. "PPI,PPI Interrupt Flag" "0: No interrupt detected,1: PPI interrupt detected" newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "FERR,Fatal Error Interrupt Flag" "0: No interrupt detected,1: Fatal Error interrupt detected" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "RCV,Receive Interrupt Flag" "0: No interrupt detected,1: Receive interrupt detected" newline bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 8. "VM,Video Mode Interrupt Flag" "0: No interrupt detected,1: Video Mode interrupt detected" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "SQ1,Sequence Channel-1 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-1 interrupt detected" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "SQ0,Sequence Channel-0 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-0 interrupt detected" rgroup.word 0x0++0x1 line.word 0x0 "ISR_L,Interrupt Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "RCV,Receive Interrupt Flag" "0: No interrupt detected,1: Receive interrupt detected" newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "VM,Video Mode Interrupt Flag" "0: No interrupt detected,1: Video Mode interrupt detected" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SQ1,Sequence Channel-1 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-1 interrupt detected" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SQ0,Sequence Channel-0 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-0 interrupt detected" rgroup.byte 0x0++0x1 line.byte 0x0 "ISR_LL,Interrupt Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SQ1,Sequence Channel-1 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-1 interrupt detected" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SQ0,Sequence Channel-0 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-0 interrupt detected" line.byte 0x1 "ISR_LH,Interrupt Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "RCV,Receive Interrupt Flag" "0: No interrupt detected,1: Receive interrupt detected" newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "VM,Video Mode Interrupt Flag" "0: No interrupt detected,1: Video Mode interrupt detected" rgroup.word 0x2++0x1 line.word 0x0 "ISR_H,Interrupt Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 5.--11. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 4. "PPI,PPI Interrupt Flag" "0: No interrupt detected,1: PPI interrupt detected" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "FERR,Fatal Error Interrupt Flag" "0: No interrupt detected,1: Fatal Error interrupt detected" rgroup.byte 0x2++0x1 line.byte 0x0 "ISR_HL,Interrupt Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PPI,PPI Interrupt Flag" "0: No interrupt detected,1: PPI interrupt detected" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "FERR,Fatal Error Interrupt Flag" "0: No interrupt detected,1: Fatal Error interrupt detected" line.byte 0x1 "ISR_HH,Interrupt Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "Reserved,This bit is read as 0." "0,1" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000." rgroup.word 0x10++0x1 line.word 0x0 "LINKSR_L,Link Status Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 13. "LPBUSY,LP Operation Busy Flag" "0: LP mode stopped,1: LP mode in operation" newline bitfld.word 0x0 12. "HSBUSY,HS Operation Busy Flag" "0: HS mode stopped,1: HS mode in operation" bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 8. "VRUN,Video Mode Operation Running Flag" "0: Video mode stopped,1: Video mode in operation" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "SQ1RUN,Sequence Channel-1 Running Flag" "0: Sequence Operation Channel-1 stopped,1: Sequence Operation Channel-1 in operation" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "SQ0RUN,Sequence Channel-0 Running Flag" "0: Sequence Operation Channel-0 stopped,1: Sequence Operation Channel-0 in operation" rgroup.byte 0x10++0x1 line.byte 0x0 "LINKSR_LL,Link Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SQ1RUN,Sequence Channel-1 Running Flag" "0: Sequence Operation Channel-1 stopped,1: Sequence Operation Channel-1 in operation" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SQ0RUN,Sequence Channel-0 Running Flag" "0: Sequence Operation Channel-0 stopped,1: Sequence Operation Channel-0 in operation" line.byte 0x1 "LINKSR_LH,Link Status Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 5. "LPBUSY,LP Operation Busy Flag" "0: LP mode stopped,1: LP mode in operation" newline bitfld.byte 0x1 4. "HSBUSY,HS Operation Busy Flag" "0: HS mode stopped,1: HS mode in operation" bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x1 0. "VRUN,Video Mode Operation Running Flag" "0: Video mode stopped,1: Video mode in operation" rgroup.word 0x12++0x1 line.word 0x0 "LINKSR_H,Link Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 0.--4. 1. "Reserved,These bits are read as 00000." rgroup.byte 0x12++0x1 line.byte 0x0 "LINKSR_HL,Link Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "Reserved,These bits are read as 00000." line.byte 0x1 "LINKSR_HH,Link Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000." group.word 0x100++0x1 line.word 0x0 "TXSETR_L,Transmit Set Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "DLEN,Data Lane Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 8. "CLEN,Clock Lane Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "NUMLANE,Number of Lane" "0: 1 Lane (Use of Lane-0),1: 2 Lane (Use of Lane-0 and Lane-1),?,?" group.byte 0x100++0x1 line.byte 0x0 "TXSETR_LL,Transmit Set Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "NUMLANE,Number of Lane" "0: 1 Lane (Use of Lane-0),1: 2 Lane (Use of Lane-0 and Lane-1),?,?" line.byte 0x1 "TXSETR_LH,Transmit Set Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "DLEN,Data Lane Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 0. "CLEN,Clock Lane Enable" "0: Disable,1: Enable" rgroup.word 0x102++0x1 line.word 0x0 "TXSETR_H,Transmit Set Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000." bitfld.word 0x0 0.--1. "Reserved,These bits are read as 01." "0,1,2,3" rgroup.byte 0x102++0x0 line.byte 0x0 "TXSETR_HL,Transmit Set Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 01." "0,1,2,3" group.long 0x104++0x3 line.long 0x0 "HSCLKSETR,HS Clock Set Register" hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "HSCLMD,HS Clock Running Mode" "0: Non-continuous clock mode,1: Continuous clock mode" newline bitfld.long 0x0 0. "HSCLST,HS Clock Start" "0: Stop HS transmission (keep LP state),1: Start HS transmission" group.word 0x104++0x1 line.word 0x0 "HSCLKSETR_L,HS Clock Set Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x0 1. "HSCLMD,HS Clock Running Mode" "0: Non-continuous clock mode,1: Continuous clock mode" newline bitfld.word 0x0 0. "HSCLST,HS Clock Start" "0: Stop HS transmission (keep LP state),1: Start HS transmission" group.byte 0x104++0x0 line.byte 0x0 "HSCLKSETR_LL,HS Clock Set Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "HSCLMD,HS Clock Running Mode" "0: Non-continuous clock mode,1: Continuous clock mode" newline bitfld.byte 0x0 0. "HSCLST,HS Clock Start" "0: Stop HS transmission (keep LP state),1: Start HS transmission" group.long 0x108++0x3 line.long 0x0 "ULPSSETR,ULPS Set Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "WKUP,ULPS Wakeup Period" group.word 0x108++0x1 line.word 0x0 "ULPSSETR_L,ULPS Set Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "WKUP,ULPS Wakeup Period" group.byte 0x108++0x0 line.byte 0x0 "ULPSSETR_LL,ULPS Set Register" hexmask.byte 0x0 0.--7. 1. "WKUP,ULPS Wakeup Period" wgroup.long 0x10C++0x3 line.long 0x0 "ULPSCR,ULPS Control Register" bitfld.long 0x0 30.--31. "Reserved,The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "DLEXIT,DL ULPS Exit" "0: No operation,1: Data Lanes exit from ULPS" newline bitfld.long 0x0 28. "DLENT,DL ULPS Enter" "0: No operation,1: Transition Data Lanes to ULPS" bitfld.long 0x0 26.--27. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 25. "CLEXIT,CL ULPS Exit" "0: No operation,1: Clock Lane exits from ULPS" bitfld.long 0x0 24. "CLENT,CL ULPS Enter" "0: No operation,1: Transition Clock Lane to ULPS" newline hexmask.long.tbyte 0x0 0.--23. 1. "Reserved,The write value should be 000000000000000000000000." wgroup.word 0x10E++0x1 line.word 0x0 "ULPSCR_H,ULPS Control Register" bitfld.word 0x0 14.--15. "Reserved,The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "DLEXIT,DL ULPS Exit" "0: No operation,1: Data Lanes exit from ULPS" newline bitfld.word 0x0 12. "DLENT,DL ULPS Enter" "0: No operation,1: Transition Data Lanes to ULPS" bitfld.word 0x0 10.--11. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "CLEXIT,CL ULPS Exit" "0: No operation,1: Clock Lane exits from ULPS" bitfld.word 0x0 8. "CLENT,CL ULPS Enter" "0: No operation,1: Transition Clock Lane to ULPS" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x10F++0x0 line.byte 0x0 "ULPSCR_HH,ULPS Control Register" bitfld.byte 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DLEXIT,DL ULPS Exit" "0: No operation,1: Data Lanes exit from ULPS" newline bitfld.byte 0x0 4. "DLENT,DL ULPS Enter" "0: No operation,1: Transition Data Lanes to ULPS" bitfld.byte 0x0 2.--3. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CLEXIT,CL ULPS Exit" "0: No operation,1: Clock Lane exits from ULPS" bitfld.byte 0x0 0. "CLENT,CL ULPS Enter" "0: No operation,1: Transition Clock Lane to ULPS" group.long 0x110++0x3 line.long 0x0 "RSTCR,Reset Control Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "FTXSTP,Force Tx Stop Mode" "0: Finish the Force Stop state,1: Force Data Lanes into transmit mode and generate.." newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "SWRST,Software Reset" "0: Complete the Software Reset,1: Request a Software Reset" group.word 0x110++0x1 line.word 0x0 "RSTCR_L,Reset Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "SWRST,Software Reset" "0: Complete the Software Reset,1: Request a Software Reset" group.byte 0x110++0x0 line.byte 0x0 "RSTCR_LL,Reset Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SWRST,Software Reset" "0: Complete the Software Reset,1: Request a Software Reset" group.word 0x112++0x1 line.word 0x0 "RSTCR_H,Reset Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "FTXSTP,Force Tx Stop Mode" "0: Finish the Force Stop state,1: Force Data Lanes into transmit mode and generate.." group.byte 0x112++0x1 line.byte 0x0 "RSTCR_HL,Reset Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "FTXSTP,Force Tx Stop Mode" "0: Finish the Force Stop state,1: Force Data Lanes into transmit mode and generate.." line.byte 0x1 "RSTCR_HH,Reset Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rgroup.long 0x114++0x3 line.long 0x0 "RSTSR,Reset Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." bitfld.long 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: TX mode,1: RX mode" newline hexmask.long.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not Stop state,1: Stop state" newline bitfld.long 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not Stop state,1: Stop state" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "RSTV,Video Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for Video mode" bitfld.long 0x0 3. "RSTAXI,AXI Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for AXI bus" newline bitfld.long 0x0 2. "RSTAPB,APB Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for APB bus" bitfld.long 0x0 1. "RSTLP,LP Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for LP mode" newline bitfld.long 0x0 0. "RSTHS,HS Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for HS mode" rgroup.word 0x114++0x1 line.word 0x0 "RSTSR_L,Reset Status Register" bitfld.word 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: TX mode,1: RX mode" hexmask.word.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." newline bitfld.word 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not Stop state,1: Stop state" bitfld.word 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not Stop state,1: Stop state" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "RSTV,Video Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for Video mode" newline bitfld.word 0x0 3. "RSTAXI,AXI Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for AXI bus" bitfld.word 0x0 2. "RSTAPB,APB Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for APB bus" newline bitfld.word 0x0 1. "RSTLP,LP Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for LP mode" bitfld.word 0x0 0. "RSTHS,HS Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for HS mode" rgroup.byte 0x114++0x1 line.byte 0x0 "RSTSR_LL,Reset Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSTV,Video Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for Video mode" newline bitfld.byte 0x0 3. "RSTAXI,AXI Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for AXI bus" bitfld.byte 0x0 2. "RSTAPB,APB Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for APB bus" newline bitfld.byte 0x0 1. "RSTLP,LP Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for LP mode" bitfld.byte 0x0 0. "RSTHS,HS Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for HS mode" line.byte 0x1 "RSTSR_LH,Reset Status Register" bitfld.byte 0x1 7. "DL0DIR,Data Lane-0 Direction" "0: TX mode,1: RX mode" hexmask.byte 0x1 2.--6. 1. "Reserved,These bits are read as 00000." newline bitfld.byte 0x1 1. "DL1STP,Data Lane-1 Stop Status" "0: Not Stop state,1: Stop state" bitfld.byte 0x1 0. "DL0STP,Data Lane-0 Stop Status" "0: Not Stop state,1: Stop state" group.long 0x120++0x3 line.long 0x0 "DSISETR,DSI Set Register" bitfld.long 0x0 31. "EOTPEN,HS Transfer EoTp Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "EXTEMD,External Tearing Effect Detection Sense Select" "0: Rising edge,1: Falling edge" newline bitfld.long 0x0 29. "SCREN,Data Scramble Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 23. "VC3CRCEN,VC-3 CRC Check Enable" "0: Disable,1: Enable" bitfld.long 0x0 22. "VC2CRCEN,VC-2 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "VC1CRCEN,VC-1 CRC Check Enable" "0: Disable,1: Enable" bitfld.long 0x0 20. "VC0CRCEN,VC-0 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ECCEN,ECC Check Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 0.--15. 1. "MRPSZ,Maximum Return Packet Size" group.word 0x120++0x1 line.word 0x0 "DSISETR_L,DSI Set Register" hexmask.word 0x0 0.--15. 1. "MRPSZ,Maximum Return Packet Size" group.byte 0x120++0x1 line.byte 0x0 "DSISETR_LL,DSI Set Register" hexmask.byte 0x0 0.--7. 1. "MRPSZ,Maximum Return Packet Size" line.byte 0x1 "DSISETR_LH,DSI Set Register" hexmask.byte 0x1 0.--7. 1. "MRPSZ,Maximum Return Packet Size" group.word 0x122++0x1 line.word 0x0 "DSISETR_H,DSI Set Register" bitfld.word 0x0 15. "EOTPEN,HS Transfer EoTp Enable" "0: Disable,1: Enable" bitfld.word 0x0 14. "EXTEMD,External Tearing Effect Detection Sense Select" "0: Rising edge,1: Falling edge" newline bitfld.word 0x0 13. "SCREN,Data Scramble Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 7. "VC3CRCEN,VC-3 CRC Check Enable" "0: Disable,1: Enable" bitfld.word 0x0 6. "VC2CRCEN,VC-2 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 5. "VC1CRCEN,VC-1 CRC Check Enable" "0: Disable,1: Enable" bitfld.word 0x0 4. "VC0CRCEN,VC-0 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ECCEN,ECC Check Enable" "0: Disable,1: Enable" group.byte 0x122++0x1 line.byte 0x0 "DSISETR_HL,DSI Set Register" bitfld.byte 0x0 7. "VC3CRCEN,VC-3 CRC Check Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "VC2CRCEN,VC-2 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 5. "VC1CRCEN,VC-1 CRC Check Enable" "0: Disable,1: Enable" bitfld.byte 0x0 4. "VC0CRCEN,VC-0 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ECCEN,ECC Check Enable" "0: Disable,1: Enable" line.byte 0x1 "DSISETR_HH,DSI Set Register" bitfld.byte 0x1 7. "EOTPEN,HS Transfer EoTp Enable" "0: Disable,1: Enable" bitfld.byte 0x1 6. "EXTEMD,External Tearing Effect Detection Sense Select" "0: Rising edge,1: Falling edge" newline bitfld.byte 0x1 5. "SCREN,Data Scramble Enable" "0: Disable,1: Enable" hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x160++0x3 line.long 0x0 "TXPPD0R,Transmit Packet Payload Data 0 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA3,Payload Data 3" hexmask.long.byte 0x0 16.--23. 1. "DATA2,Payload Data 2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" group.word 0x160++0x1 line.word 0x0 "TXPPD0R_L,Transmit Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" group.byte 0x160++0x1 line.byte 0x0 "TXPPD0R_LL,Transmit Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" line.byte 0x1 "TXPPD0R_LH,Transmit Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA1,Payload Data 1" group.word 0x162++0x1 line.word 0x0 "TXPPD0R_H,Transmit Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA3,Payload Data 3" hexmask.word.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" group.byte 0x162++0x1 line.byte 0x0 "TXPPD0R_HL,Transmit Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" line.byte 0x1 "TXPPD0R_HH,Transmit Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA3,Payload Data 3" group.long 0x164++0x3 line.long 0x0 "TXPPD1R,Transmit Packet Payload Data 1 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA7,Payload Data 7" hexmask.long.byte 0x0 16.--23. 1. "DATA6,Payload Data 6" newline hexmask.long.byte 0x0 8.--15. 1. "DATA5,Payload Data 5" hexmask.long.byte 0x0 0.--7. 1. "DATA4,Payload Data 4" group.word 0x164++0x1 line.word 0x0 "TXPPD1R_L,Transmit Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA5,Payload Data 5" hexmask.word.byte 0x0 0.--7. 1. "DATA4,Payload Data 4" group.byte 0x164++0x1 line.byte 0x0 "TXPPD1R_LL,Transmit Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA4,Payload Data 4" line.byte 0x1 "TXPPD1R_LH,Transmit Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA5,Payload Data 5" group.word 0x166++0x1 line.word 0x0 "TXPPD1R_H,Transmit Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA7,Payload Data 7" hexmask.word.byte 0x0 0.--7. 1. "DATA6,Payload Data 6" group.byte 0x166++0x1 line.byte 0x0 "TXPPD1R_HL,Transmit Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA6,Payload Data 6" line.byte 0x1 "TXPPD1R_HH,Transmit Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA7,Payload Data 7" group.long 0x168++0x3 line.long 0x0 "TXPPD2R,Transmit Packet Payload Data 2 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA11,Payload Data 11" hexmask.long.byte 0x0 16.--23. 1. "DATA10,Payload Data 10" newline hexmask.long.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.long.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" group.word 0x168++0x1 line.word 0x0 "TXPPD2R_L,Transmit Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.word.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" group.byte 0x168++0x1 line.byte 0x0 "TXPPD2R_LL,Transmit Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" line.byte 0x1 "TXPPD2R_LH,Transmit Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA9,Payload Data 9" group.word 0x16A++0x1 line.word 0x0 "TXPPD2R_H,Transmit Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA11,Payload Data 11" hexmask.word.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" group.byte 0x16A++0x1 line.byte 0x0 "TXPPD2R_HL,Transmit Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" line.byte 0x1 "TXPPD2R_HH,Transmit Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA11,Payload Data 11" group.long 0x16C++0x3 line.long 0x0 "TXPPD3R,Transmit Packet Payload Data 3 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA15,Payload Data 15" hexmask.long.byte 0x0 16.--23. 1. "DATA14,Payload Data 14" newline hexmask.long.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.long.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" group.word 0x16C++0x1 line.word 0x0 "TXPPD3R_L,Transmit Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.word.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" group.byte 0x16C++0x1 line.byte 0x0 "TXPPD3R_LL,Transmit Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" line.byte 0x1 "TXPPD3R_LH,Transmit Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA13,Payload Data 13" group.word 0x16E++0x1 line.word 0x0 "TXPPD3R_H,Transmit Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA15,Payload Data 15" hexmask.word.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" group.byte 0x16E++0x1 line.byte 0x0 "TXPPD3R_HL,Transmit Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" line.byte 0x1 "TXPPD3R_HH,Transmit Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA15,Payload Data 15" rgroup.long 0x200++0x3 line.long 0x0 "RXSR,Receive Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 28. "ECCERRS,Single Bit ECC Error Interrupt Flag" "0: No error detected,1: A single-bit ECC error detected" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 26. "RSIZEERR,Return Packet Size Error Interrupt Flag" "0: No error detected,1: Oversize error in a received long packet detected" newline bitfld.long 0x0 25. "NORESERR,No Response Error Interrupt Flag" "0: No error occurred,1: No triggers or packets returned during BTA period" bitfld.long 0x0 24. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag" "0: No error occurred,1: Peripheral response timeout occurred" newline bitfld.long 0x0 23. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag" "0: No error detected,1: A buffer overflow error detected on receiving.." bitfld.long 0x0 22. "IBERR,Internal Bus Error Interrupt Flag" "0: No error detected,1: Internal AXI bus write failed" newline bitfld.long 0x0 21. "CRCERR,CRC Error Interrupt Flag" "0: No error detected,1: CRC error detected" bitfld.long 0x0 20. "WCERR,Word Count Error Interrupt Flag" "0: No error detected,1: The length of the received packet is shorter.." newline bitfld.long 0x0 19. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 18. "UNEXERR,Unexpected Packet Error Interrupt Flag" "0: No error,1: Unexpected packet received" newline bitfld.long 0x0 17. "ECCERRM,Multi Bit ECC Error Interrupt Flag" "0: No error detected,1: A multi-bit ECC error detected" bitfld.long 0x0 16. "MLFERR,Malform Error Interrupt Flag" "0: No error received,1: A packet of less than 4 bytes received" newline bitfld.long 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag" "0: Not detected,1: External Tearing Effect detected" bitfld.long 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag" "0: No trigger received,1: ACK trigger received" newline bitfld.long 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag" "0: No trigger received,1: Tearing Effect Trigger received" bitfld.long 0x0 12. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag" "0: No received,1: EoTp received" newline bitfld.long 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag" "0: No response received,1: Response packet received" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: Not detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: Not detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.long 0x0 0. "BTAREND,BTA Request End Interrupt Flag" "0: Not detected,1: BTA Completion detected" rgroup.word 0x200++0x1 line.word 0x0 "RXSR_L,Receive Status Register" bitfld.word 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag" "0: Not detected,1: External Tearing Effect detected" bitfld.word 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag" "0: No trigger received,1: ACK trigger received" newline bitfld.word 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag" "0: No trigger received,1: Tearing Effect Trigger received" bitfld.word 0x0 12. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag" "0: No received,1: EoTp received" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag" "0: No response received,1: Response packet received" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: Not detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: Not detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.word 0x0 0. "BTAREND,BTA Request End Interrupt Flag" "0: Not detected,1: BTA Completion detected" rgroup.byte 0x200++0x1 line.byte 0x0 "RXSR_LL,Receive Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: Not detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: Not detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.byte 0x0 0. "BTAREND,BTA Request End Interrupt Flag" "0: Not detected,1: BTA Completion detected" line.byte 0x1 "RXSR_LH,Receive Status Register" bitfld.byte 0x1 7. "EXTEDET,External Tearing Effect Detect Interrupt Flag" "0: Not detected,1: External Tearing Effect detected" bitfld.byte 0x1 6. "RXACK,ACK Trigger Receive Interrupt Flag" "0: No trigger received,1: ACK trigger received" newline bitfld.byte 0x1 5. "RXTE,Tearing Effect Trigger Receive Interrupt Flag" "0: No trigger received,1: Tearing Effect Trigger received" bitfld.byte 0x1 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 2. "RXEOTP,EoTp Receive Interrupt Flag" "0: No received,1: EoTp received" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0. "RXRESP,Response Packet Receive Interrupt Flag" "0: No response received,1: Response packet received" rgroup.word 0x202++0x1 line.word 0x0 "RXSR_H,Receive Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 12. "ECCERRS,Single Bit ECC Error Interrupt Flag" "0: No error detected,1: A single-bit ECC error detected" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 10. "RSIZEERR,Return Packet Size Error Interrupt Flag" "0: No error detected,1: Oversize error in a received long packet detected" newline bitfld.word 0x0 9. "NORESERR,No Response Error Interrupt Flag" "0: No error occurred,1: No triggers or packets returned during BTA period" bitfld.word 0x0 8. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag" "0: No error occurred,1: Peripheral response timeout occurred" newline bitfld.word 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag" "0: No error detected,1: A buffer overflow error detected on receiving.." bitfld.word 0x0 6. "IBERR,Internal Bus Error Interrupt Flag" "0: No error detected,1: Internal AXI bus write failed" newline bitfld.word 0x0 5. "CRCERR,CRC Error Interrupt Flag" "0: No error detected,1: CRC error detected" bitfld.word 0x0 4. "WCERR,Word Count Error Interrupt Flag" "0: No error detected,1: The length of the received packet is shorter.." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag" "0: No error,1: Unexpected packet received" newline bitfld.word 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag" "0: No error detected,1: A multi-bit ECC error detected" bitfld.word 0x0 0. "MLFERR,Malform Error Interrupt Flag" "0: No error received,1: A packet of less than 4 bytes received" rgroup.byte 0x202++0x1 line.byte 0x0 "RXSR_HL,Receive Status Register" bitfld.byte 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag" "0: No error detected,1: A buffer overflow error detected on receiving.." bitfld.byte 0x0 6. "IBERR,Internal Bus Error Interrupt Flag" "0: No error detected,1: Internal AXI bus write failed" newline bitfld.byte 0x0 5. "CRCERR,CRC Error Interrupt Flag" "0: No error detected,1: CRC error detected" bitfld.byte 0x0 4. "WCERR,Word Count Error Interrupt Flag" "0: No error detected,1: The length of the received packet is shorter.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag" "0: No error,1: Unexpected packet received" newline bitfld.byte 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag" "0: No error detected,1: A multi-bit ECC error detected" bitfld.byte 0x0 0. "MLFERR,Malform Error Interrupt Flag" "0: No error received,1: A packet of less than 4 bytes received" line.byte 0x1 "RXSR_HH,Receive Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 4. "ECCERRS,Single Bit ECC Error Interrupt Flag" "0: No error detected,1: A single-bit ECC error detected" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 2. "RSIZEERR,Return Packet Size Error Interrupt Flag" "0: No error detected,1: Oversize error in a received long packet detected" newline bitfld.byte 0x1 1. "NORESERR,No Response Error Interrupt Flag" "0: No error occurred,1: No triggers or packets returned during BTA period" bitfld.byte 0x1 0. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag" "0: No error occurred,1: Peripheral response timeout occurred" group.long 0x204++0x3 line.long 0x0 "RXSCR,Receive Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXAKE flag" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 28. "ECCERRS,Single Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRS flag" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 26. "RSIZEERR,Return Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RSIZEERR flag" newline eventfld.long 0x0 25. "NORESERR,No Response Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.NORESERR flag" eventfld.long 0x0 24. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.PRTOERR flag" newline eventfld.long 0x0 23. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXOVFERR flag" eventfld.long 0x0 22. "IBERR,Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.IBERR flag" newline eventfld.long 0x0 21. "CRCERR,CRC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.CRCERR flag" eventfld.long 0x0 20. "WCERR,Word Count Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.WCERR flag" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 18. "UNEXERR,Unexpected Packet Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.UNEXERR flag" newline eventfld.long 0x0 17. "ECCERRM,Multi Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRM flag" eventfld.long 0x0 16. "MLFERR,Malform Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.MLFERR flag" newline eventfld.long 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.EXTEDET flag" eventfld.long 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXACK flag" newline eventfld.long 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXTE flag" bitfld.long 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXEOTP flag" newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXRESP flag" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.TATO flag" newline eventfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.LRXHTO flag" eventfld.long 0x0 0. "BTAREND,BTA Request End Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.BTAREND flag" group.word 0x204++0x1 line.word 0x0 "RXSCR_L,Receive Status Clear Register" eventfld.word 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.EXTEDET flag" eventfld.word 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXACK flag" newline eventfld.word 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXTE flag" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXEOTP flag" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXRESP flag" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.TATO flag" newline eventfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.LRXHTO flag" eventfld.word 0x0 0. "BTAREND,BTA Request End Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.BTAREND flag" group.byte 0x204++0x1 line.byte 0x0 "RXSCR_LL,Receive Status Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.TATO flag" newline eventfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.LRXHTO flag" eventfld.byte 0x0 0. "BTAREND,BTA Request End Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.BTAREND flag" line.byte 0x1 "RXSCR_LH,Receive Status Clear Register" eventfld.byte 0x1 7. "EXTEDET,External Tearing Effect Detect Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.EXTEDET flag" eventfld.byte 0x1 6. "RXACK,ACK Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXACK flag" newline eventfld.byte 0x1 5. "RXTE,Tearing Effect Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXTE flag" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 2. "RXEOTP,EoTp Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXEOTP flag" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 0. "RXRESP,Response Packet Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXRESP flag" group.word 0x206++0x1 line.word 0x0 "RXSCR_H,Receive Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 14. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXAKE flag" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 12. "ECCERRS,Single Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRS flag" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 10. "RSIZEERR,Return Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RSIZEERR flag" newline eventfld.word 0x0 9. "NORESERR,No Response Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.NORESERR flag" eventfld.word 0x0 8. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.PRTOERR flag" newline eventfld.word 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXOVFERR flag" eventfld.word 0x0 6. "IBERR,Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.IBERR flag" newline eventfld.word 0x0 5. "CRCERR,CRC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.CRCERR flag" eventfld.word 0x0 4. "WCERR,Word Count Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.WCERR flag" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.UNEXERR flag" newline eventfld.word 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRM flag" eventfld.word 0x0 0. "MLFERR,Malform Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.MLFERR flag" group.byte 0x206++0x1 line.byte 0x0 "RXSCR_HL,Receive Status Clear Register" eventfld.byte 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXOVFERR flag" eventfld.byte 0x0 6. "IBERR,Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.IBERR flag" newline eventfld.byte 0x0 5. "CRCERR,CRC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.CRCERR flag" eventfld.byte 0x0 4. "WCERR,Word Count Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.WCERR flag" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.UNEXERR flag" newline eventfld.byte 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRM flag" eventfld.byte 0x0 0. "MLFERR,Malform Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.MLFERR flag" line.byte 0x1 "RXSCR_HH,Receive Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 6. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXAKE flag" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 4. "ECCERRS,Single Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRS flag" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 2. "RSIZEERR,Return Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RSIZEERR flag" newline eventfld.byte 0x1 1. "NORESERR,No Response Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.NORESERR flag" eventfld.byte 0x1 0. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.PRTOERR flag" group.long 0x208++0x3 line.long 0x0 "RXIER,Receive Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "RXAKE,Acknowledge and Error Report Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "ECCERRS,Single Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 26. "RSIZEERR,Return Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "NORESERR,No Response Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 24. "PRTOERR,Peripheral Response Timeout Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "RXOVFERR,Receive Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 22. "IBERR,Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "CRCERR,CRC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 20. "WCERR,Word Count Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 18. "UNEXERR,Unexpected Packet Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "ECCERRM,Multi Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "MLFERR,Malform Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "RXACK,ACK Trigger Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 10. "RXEOTP,EoTp Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8. "RXRESP,Response Packet Receive Interrupt Enable" "0: Disable,1: Enable" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "BTAREND,BTA Request End Interrupt Enable" "0: Disable,1: Enable" group.word 0x208++0x1 line.word 0x0 "RXIER_L,Receive Interrupt Enable Register" bitfld.word 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 14. "RXACK,ACK Trigger Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "RXEOTP,EoTp Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "RXRESP,Response Packet Receive Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "BTAREND,BTA Request End Interrupt Enable" "0: Disable,1: Enable" group.byte 0x208++0x1 line.byte 0x0 "RXIER_LL,Receive Interrupt Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "BTAREND,BTA Request End Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "RXIER_LH,Receive Interrupt Enable Register" bitfld.byte 0x1 7. "EXTEDET,External Tearing Effect Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 6. "RXACK,ACK Trigger Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "RXTE,Tearing Effect Trigger Receive Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "RXEOTP,EoTp Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "RXRESP,Response Packet Receive Interrupt Enable" "0: Disable,1: Enable" group.word 0x20A++0x1 line.word 0x0 "RXIER_H,Receive Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "RXAKE,Acknowledge and Error Report Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "ECCERRS,Single Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "RSIZEERR,Return Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "NORESERR,No Response Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 8. "PRTOERR,Peripheral Response Timeout Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 6. "IBERR,Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 5. "CRCERR,CRC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 4. "WCERR,Word Count Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "MLFERR,Malform Error Interrupt Enable" "0: Disable,1: Enable" group.byte 0x20A++0x1 line.byte 0x0 "RXIER_HL,Receive Interrupt Enable Register" bitfld.byte 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "IBERR,Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 5. "CRCERR,CRC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 4. "WCERR,Word Count Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "MLFERR,Malform Error Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "RXIER_HH,Receive Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Acknowledge and Error Report Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "ECCERRS,Single Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "RSIZEERR,Return Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "NORESERR,No Response Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 0. "PRTOERR,Peripheral Response Timeout Error Interrupt Enable" "0: Disable,1: Enable" group.long 0x210++0x7 line.long 0x0 "PRESPTOBTASETR,Peripheral Response Timeout BTA Set Register" hexmask.long 0x0 0.--31. 1. "PRTBTA,Peripheral Response Timeout Count" line.long 0x4 "PRESPTOLPSETR,Peripheral Response Timeout LP Set Register" hexmask.long.word 0x4 16.--31. 1. "LPRTO,LPDT READ Request Timeout" hexmask.long.word 0x4 0.--15. 1. "LPWTO,LPDT WRITE Request Timeout" group.word 0x214++0x3 line.word 0x0 "PRESPTOLPSETR_L,Peripheral Response Timeout LP Set Register" hexmask.word 0x0 0.--15. 1. "LPWTO,LPDT WRITE Request Timeout" line.word 0x2 "PRESPTOLPSETR_H,Peripheral Response Timeout LP Set Register" hexmask.word 0x2 0.--15. 1. "LPRTO,LPDT READ Request Timeout" group.long 0x218++0x3 line.long 0x0 "PRESPTOHSSETR,Peripheral Response Timeout HS Set Register" hexmask.long.word 0x0 16.--31. 1. "HSRTO,HS READ Request Timeout" hexmask.long.word 0x0 0.--15. 1. "HSWTO,HS WRITE Request Timeout" group.word 0x218++0x3 line.word 0x0 "PRESPTOHSSETR_L,Peripheral Response Timeout HS Set Register" hexmask.word 0x0 0.--15. 1. "HSWTO,HS WRITE Request Timeout" line.word 0x2 "PRESPTOHSSETR_H,Peripheral Response Timeout HS Set Register" hexmask.word 0x2 0.--15. 1. "HSRTO,HS READ Request Timeout" rgroup.long 0x220++0x3 line.long 0x0 "AKEPLATIR,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000." hexmask.long.byte 0x0 16.--19. 1. "VC,Virtual Channel ID" newline hexmask.long.word 0x0 0.--15. 1. "EREP,Error Report" rgroup.word 0x220++0x1 line.word 0x0 "AKEPLATIR_L,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.word 0x0 0.--15. 1. "EREP,Error Report" rgroup.byte 0x220++0x1 line.byte 0x0 "AKEPLATIR_LL,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.byte 0x0 0.--7. 1. "EREP,Error Report" line.byte 0x1 "AKEPLATIR_LH,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.byte 0x1 0.--7. 1. "EREP,Error Report" rgroup.word 0x222++0x1 line.word 0x0 "AKEPLATIR_H,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." hexmask.word.byte 0x0 0.--3. 1. "VC,Virtual Channel ID" rgroup.byte 0x222++0x0 line.byte 0x0 "AKEPLATIR_HL,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." hexmask.byte 0x0 0.--3. 1. "VC,Virtual Channel ID" rgroup.long 0x224++0x3 line.long 0x0 "AKEPACMSR,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000." bitfld.long 0x0 19. "AVC3,Virtual Channel-3 Accumulated Information" "0: No Error Report received from VC-3,1: Received an Acknowledge and Error Report from VC-3" newline bitfld.long 0x0 18. "AVC2,Virtual Channel-2 Accumulated Information" "0: No Error Report received from VC-2,1: Received an Acknowledge and Error Report from VC-2" bitfld.long 0x0 17. "AVC1,Virtual Channel-1 Accumulated Information" "0: No Error Report received from VC-1,1: Received an Acknowledge and Error Report from VC-1" newline bitfld.long 0x0 16. "AVC0,Virtual Channel-0 Accumulated Information" "0: No Error Report received from VC-0,1: Received an Acknowledge and Error Report from VC-0" hexmask.long.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report" rgroup.word 0x224++0x1 line.word 0x0 "AKEPACMSR_L,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report" rgroup.byte 0x224++0x1 line.byte 0x0 "AKEPACMSR_LL,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.byte 0x0 0.--7. 1. "AEREP,Accumulated Error Report" line.byte 0x1 "AKEPACMSR_LH,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.byte 0x1 0.--7. 1. "AEREP,Accumulated Error Report" rgroup.word 0x226++0x1 line.word 0x0 "AKEPACMSR_H,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." bitfld.word 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information" "0: No Error Report received from VC-3,1: Received an Acknowledge and Error Report from VC-3" newline bitfld.word 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information" "0: No Error Report received from VC-2,1: Received an Acknowledge and Error Report from VC-2" bitfld.word 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information" "0: No Error Report received from VC-1,1: Received an Acknowledge and Error Report from VC-1" newline bitfld.word 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information" "0: No Error Report received from VC-0,1: Received an Acknowledge and Error Report from VC-0" rgroup.byte 0x226++0x0 line.byte 0x0 "AKEPACMSR_HL,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information" "0: No Error Report received from VC-3,1: Received an Acknowledge and Error Report from VC-3" newline bitfld.byte 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information" "0: No Error Report received from VC-2,1: Received an Acknowledge and Error Report from VC-2" bitfld.byte 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information" "0: No Error Report received from VC-1,1: Received an Acknowledge and Error Report from VC-1" newline bitfld.byte 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information" "0: No Error Report received from VC-0,1: Received an Acknowledge and Error Report from VC-0" group.long 0x228++0x3 line.long 0x0 "AKEPSCR,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.long 0x0 19. "AVC3,Virtual Channel-3 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC3 bit" newline eventfld.long 0x0 18. "AVC2,Virtual Channel-2 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC2 bit" eventfld.long 0x0 17. "AVC1,Virtual Channel-1 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC1 bit" newline eventfld.long 0x0 16. "AVC0,Virtual Channel-0 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC0 bit" hexmask.long.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report Clear" group.word 0x228++0x1 line.word 0x0 "AKEPSCR_L,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report Clear" group.byte 0x228++0x1 line.byte 0x0 "AKEPSCR_LL,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.byte 0x0 0.--7. 1. "AEREP,Accumulated Error Report Clear" line.byte 0x1 "AKEPSCR_LH,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.byte 0x1 0.--7. 1. "AEREP,Accumulated Error Report Clear" group.word 0x22A++0x1 line.word 0x0 "AKEPSCR_H,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.word 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC3 bit" newline eventfld.word 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC2 bit" eventfld.word 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC1 bit" newline eventfld.word 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC0 bit" group.byte 0x22A++0x0 line.byte 0x0 "AKEPSCR_HL,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.byte 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC3 bit" newline eventfld.byte 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC2 bit" eventfld.byte 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC1 bit" newline eventfld.byte 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC0 bit" rgroup.long 0x230++0x3 line.long 0x0 "RXRSSR,Receive Result Saved Status Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000." bitfld.long 0x0 3. "SLT3VLD,Slot-3 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.long 0x0 2. "SLT2VLD,Slot-2 Valid Flag" "0: None received,1: Response packet is received and stored in the.." bitfld.long 0x0 1. "SLT1VLD,Slot-1 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.long 0x0 0. "SLT0VLD,Slot-0 Valid Flag" "0: None received,1: Response packet is received and stored in the.." rgroup.word 0x230++0x1 line.word 0x0 "RXRSSR_L,Receive Result Saved Status Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." bitfld.word 0x0 3. "SLT3VLD,Slot-3 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.word 0x0 2. "SLT2VLD,Slot-2 Valid Flag" "0: None received,1: Response packet is received and stored in the.." bitfld.word 0x0 1. "SLT1VLD,Slot-1 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.word 0x0 0. "SLT0VLD,Slot-0 Valid Flag" "0: None received,1: Response packet is received and stored in the.." rgroup.byte 0x230++0x0 line.byte 0x0 "RXRSSR_LL,Receive Result Saved Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "SLT3VLD,Slot-3 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.byte 0x0 2. "SLT2VLD,Slot-2 Valid Flag" "0: None received,1: Response packet is received and stored in the.." bitfld.byte 0x0 1. "SLT1VLD,Slot-1 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.byte 0x0 0. "SLT0VLD,Slot-0 Valid Flag" "0: None received,1: Response packet is received and stored in the.." rgroup.word 0x232++0x1 line.word 0x0 "RXRSSR_H,Receive Result Saved Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.byte 0x233++0x0 line.byte 0x0 "RXRSSR_HH,Receive Result Saved Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0." "0,1" group.long 0x234++0x3 line.long 0x0 "RXRSSCR,Receive Result Saved Status Clear Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." eventfld.long 0x0 3. "SLT3VLD,Slot-3 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT3VLD flag" newline eventfld.long 0x0 2. "SLT2VLD,Slot-2 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT2VLD flag" eventfld.long 0x0 1. "SLT1VLD,Slot-1 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT1VLD flag" newline eventfld.long 0x0 0. "SLT0VLD,Slot-0 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT0VLD flag" group.word 0x234++0x1 line.word 0x0 "RXRSSCR_L,Receive Result Saved Status Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.word 0x0 3. "SLT3VLD,Slot-3 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT3VLD flag" newline eventfld.word 0x0 2. "SLT2VLD,Slot-2 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT2VLD flag" eventfld.word 0x0 1. "SLT1VLD,Slot-1 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT1VLD flag" newline eventfld.word 0x0 0. "SLT0VLD,Slot-0 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT0VLD flag" rgroup.byte 0x234++0x0 line.byte 0x0 "RXRSSCR_LL,Receive Result Saved Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." eventfld.byte 0x0 3. "SLT3VLD,Slot-3 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT3VLD flag" newline eventfld.byte 0x0 2. "SLT2VLD,Slot-2 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT2VLD flag" eventfld.byte 0x0 1. "SLT1VLD,Slot-1 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT1VLD flag" newline eventfld.byte 0x0 0. "SLT0VLD,Slot-0 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT0VLD flag" group.word 0x236++0x1 line.word 0x0 "RXRSSCR_H,Receive Result Saved Status Clear Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x237++0x0 line.byte 0x0 "RXRSSCR_HH,Receive Result Saved Status Clear Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rgroup.long 0x238++0x3 line.long 0x0 "RXRINFOOWSR,Receive Result Info Overwrite Status Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000." bitfld.long 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag" "0: No overwritten,1: Slot-3 information overwritten" newline bitfld.long 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag" "0: No overwritten,1: Slot-2 information overwritten" bitfld.long 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag" "0: No overwritten,1: Slot-1 information overwritten" newline bitfld.long 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag" "0: No overwritten,1: Slot-0 information overwritten" rgroup.word 0x238++0x1 line.word 0x0 "RXRINFOOWSR_L,Receive Result Info Overwrite Status Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." bitfld.word 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag" "0: No overwritten,1: Slot-3 information overwritten" newline bitfld.word 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag" "0: No overwritten,1: Slot-2 information overwritten" bitfld.word 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag" "0: No overwritten,1: Slot-1 information overwritten" newline bitfld.word 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag" "0: No overwritten,1: Slot-0 information overwritten" rgroup.byte 0x238++0x0 line.byte 0x0 "RXRINFOOWSR_LL,Receive Result Info Overwrite Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag" "0: No overwritten,1: Slot-3 information overwritten" newline bitfld.byte 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag" "0: No overwritten,1: Slot-2 information overwritten" bitfld.byte 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag" "0: No overwritten,1: Slot-1 information overwritten" newline bitfld.byte 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag" "0: No overwritten,1: Slot-0 information overwritten" rgroup.word 0x23A++0x1 line.word 0x0 "RXRINFOOWSR_H,Receive Result Info Overwrite Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.byte 0x23B++0x0 line.byte 0x0 "RXRINFOOWSR_HH,Receive Result Info Overwrite Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0." "0,1" group.long 0x23C++0x3 line.long 0x0 "RXRINFOOWSCR,Receive Result Info Overwrite Status Clear Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." eventfld.long 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL3OW flag" newline eventfld.long 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL2OW flag" eventfld.long 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL1OW flag" newline eventfld.long 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL0OW flag" group.word 0x23C++0x1 line.word 0x0 "RXRINFOOWSCR_L,Receive Result Info Overwrite Status Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.word 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL3OW flag" newline eventfld.word 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL2OW flag" eventfld.word 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL1OW flag" newline eventfld.word 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL0OW flag" group.byte 0x23C++0x0 line.byte 0x0 "RXRINFOOWSCR_LL,Receive Result Info Overwrite Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.byte 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL3OW flag" newline eventfld.byte 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL2OW flag" eventfld.byte 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL1OW flag" newline eventfld.byte 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL0OW flag" group.word 0x23E++0x1 line.word 0x0 "RXRINFOOWSCR_H,Receive Result Info Overwrite Status Clear Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x23F++0x0 line.byte 0x0 "RXRINFOOWSCR_HH,Receive Result Info Overwrite Status Clear Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x240)++0x3 line.long 0x0 "RXRSS$1R,Receive Result Save Slot-%s Register" bitfld.long 0x0 31. "INFOOW,Information Overwrite" "0: No update,1: This register information (RXRSSxR[30:0]) was.." bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.long 0x0 29. "RXCERR,Receive Correctable Error" "0: No error,1: Correctable error detected" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail" "0: No error,1: Payload data not saved correctly" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail" "0: No error,1: Expected receive not done" bitfld.long 0x0 26. "RXFERR,Fatal Error" "0: No fatal error,1: Fatal timeout occurred during BTA" newline bitfld.long 0x0 25. "RXSUC,Receive Success" "0: No received,1: Response packet or ACK trigger received" bitfld.long 0x0 24. "FMT,Packet Format" "0: Short packet,1: Long packet" newline bitfld.long 0x0 22.--23. "VC,Virtual Channel" "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "DT,Data Type" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.word ($2+0x240)++0x1 line.word 0x0 "RXRSS$1R_L,Receive Result Save Slot-%s Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x240)++0x0 line.byte 0x0 "RXRSS$1R_LL,Receive Result Save Slot-%s Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x241)++0x0 line.byte 0x0 "RXRSS$1R_LH,Receive Result Save Slot-%s Register" hexmask.byte 0x0 0.--7. 1. "DATA1,Data 1" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.word ($2+0x242)++0x1 line.word 0x0 "RXRSS$1R_H,Receive Result Save Slot-%s Register" bitfld.word 0x0 15. "INFOOW,Information Overwrite" "0: No update,1: This register information (RXRSSxR[30:0]) was.." bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.word 0x0 13. "RXCERR,Receive Correctable Error" "0: No error,1: Correctable error detected" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail" "0: No error,1: Payload data not saved correctly" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail" "0: No error,1: Expected receive not done" bitfld.word 0x0 10. "RXFERR,Fatal Error" "0: No fatal error,1: Fatal timeout occurred during BTA" newline bitfld.word 0x0 9. "RXSUC,Receive Success" "0: No received,1: Response packet or ACK trigger received" bitfld.word 0x0 8. "FMT,Packet Format" "0: Short packet,1: Long packet" newline bitfld.word 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.word.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x242)++0x0 line.byte 0x0 "RXRSS$1R_HL,Receive Result Save Slot-%s Register" bitfld.byte 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x243)++0x0 line.byte 0x0 "RXRSS$1R_HH,Receive Result Save Slot-%s Register" bitfld.byte 0x0 7. "INFOOW,Information Overwrite" "0: No update,1: This register information (RXRSSxR[30:0]) was.." bitfld.byte 0x0 6. "RXAKE,Receive Acknowledge and Error Report Packet" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.byte 0x0 5. "RXCERR,Receive Correctable Error" "0: No error,1: Correctable error detected" bitfld.byte 0x0 4. "RXPFAIL,Receive Packet Data Fail" "0: No error,1: Payload data not saved correctly" newline bitfld.byte 0x0 3. "RXFAIL,Receive Fail" "0: No error,1: Expected receive not done" bitfld.byte 0x0 2. "RXFERR,Fatal Error" "0: No fatal error,1: Fatal timeout occurred during BTA" newline bitfld.byte 0x0 1. "RXSUC,Receive Success" "0: No received,1: Response packet or ACK trigger received" bitfld.byte 0x0 0. "FMT,Packet Format" "0: Short packet,1: Long packet" repeat.end rgroup.long 0x2C0++0x3 line.long 0x0 "RXPPD0R,Receive Packet Payload Data 0 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA3,Payload Data 3" hexmask.long.byte 0x0 16.--23. 1. "DATA2,Payload Data 2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" rgroup.word 0x2C0++0x1 line.word 0x0 "RXPPD0R_L,Receive Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" rgroup.byte 0x2C0++0x1 line.byte 0x0 "RXPPD0R_LL,Receive Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" line.byte 0x1 "RXPPD0R_LH,Receive Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA1,Payload Data 1" rgroup.word 0x2C2++0x1 line.word 0x0 "RXPPD0R_H,Receive Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA3,Payload Data 3" hexmask.word.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" rgroup.byte 0x2C2++0x1 line.byte 0x0 "RXPPD0R_HL,Receive Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" line.byte 0x1 "RXPPD0R_HH,Receive Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA3,Payload Data 3" rgroup.long 0x2C4++0x3 line.long 0x0 "RXPPD1R,Receive Packet Payload Data 1 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA7,Payload Data 3" hexmask.long.byte 0x0 16.--23. 1. "DATA6,Payload Data 2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA5,Payload Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA4,Payload Data 0" rgroup.word 0x2C4++0x1 line.word 0x0 "RXPPD1R_L,Receive Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA5,Payload Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA4,Payload Data 0" rgroup.byte 0x2C4++0x1 line.byte 0x0 "RXPPD1R_LL,Receive Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA4,Payload Data 0" line.byte 0x1 "RXPPD1R_LH,Receive Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA5,Payload Data 1" rgroup.word 0x2C6++0x1 line.word 0x0 "RXPPD1R_H,Receive Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA7,Payload Data 3" hexmask.word.byte 0x0 0.--7. 1. "DATA6,Payload Data 2" rgroup.byte 0x2C6++0x1 line.byte 0x0 "RXPPD1R_HL,Receive Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA6,Payload Data 2" line.byte 0x1 "RXPPD1R_HH,Receive Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA7,Payload Data 3" rgroup.long 0x2C8++0x3 line.long 0x0 "RXPPD2R,Receive Packet Payload Data 2 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA11,Payload Data 11" hexmask.long.byte 0x0 16.--23. 1. "DATA10,Payload Data 10" newline hexmask.long.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.long.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" rgroup.word 0x2C8++0x1 line.word 0x0 "RXPPD2R_L,Receive Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.word.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" rgroup.byte 0x2C8++0x1 line.byte 0x0 "RXPPD2R_LL,Receive Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" line.byte 0x1 "RXPPD2R_LH,Receive Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA9,Payload Data 9" rgroup.word 0x2CA++0x1 line.word 0x0 "RXPPD2R_H,Receive Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA11,Payload Data 11" hexmask.word.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" rgroup.byte 0x2CA++0x1 line.byte 0x0 "RXPPD2R_HL,Receive Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" line.byte 0x1 "RXPPD2R_HH,Receive Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA11,Payload Data 11" rgroup.long 0x2CC++0x3 line.long 0x0 "RXPPD3R,Receive Packet Payload Data 3 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA15,Payload Data 15" hexmask.long.byte 0x0 16.--23. 1. "DATA14,Payload Data 14" newline hexmask.long.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.long.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" rgroup.word 0x2CC++0x1 line.word 0x0 "RXPPD3R_L,Receive Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.word.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" rgroup.byte 0x2CC++0x1 line.byte 0x0 "RXPPD3R_LL,Receive Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" line.byte 0x1 "RXPPD3R_LH,Receive Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA13,Payload Data 13" rgroup.word 0x2CE++0x1 line.word 0x0 "RXPPD3R_H,Receive Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA15,Payload Data 15" hexmask.word.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" rgroup.byte 0x2CE++0x1 line.byte 0x0 "RXPPD3R_HL,Receive Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" line.byte 0x1 "RXPPD3R_HH,Receive Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA15,Payload Data 15" group.long 0x2E0++0xB line.long 0x0 "HSTXTOSETR,HS TX Timeout Set Register" hexmask.long 0x0 0.--31. 1. "HTXTO,HS TX Timeout Count" line.long 0x4 "LRXHTOSETR,LRX-H Timeout Set Register" hexmask.long 0x4 0.--31. 1. "LRXHTO,LP-RX Host Processor Timeout" line.long 0x8 "TATOSETR,TA Timeout Set Register" hexmask.long 0x8 0.--31. 1. "TATO,Turnaround Acknowledge Timeout" rgroup.long 0x300++0x3 line.long 0x0 "FERRSR,Fatal Error Status Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "CLP1S,LP1 Contention Error Status" "0: Normal state,1: LP1 Contention Error (ErrContentionLP1) state" newline bitfld.long 0x0 27. "CLP0S,LP0 Contention Error Status" "0: Normal state,1: LP0 Contention Error (ErrContentionLP0) state" hexmask.long.byte 0x0 21.--26. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 20. "CLP1,LP1 Contention Error Interrupt Flag" "0: No error detected,1: LP1 Contention Error (ErrContentionLP1) detected" bitfld.long 0x0 19. "CLP0,LP0 Contention Error Interrupt Flag" "0: No error detected,1: LP0 Contention Error (ErrContentionLP0) detected" newline bitfld.long 0x0 18. "CTRL,Control Error Interrupt Flag" "0: No error detected,1: Control Error (ErrControl) detected" bitfld.long 0x0 17. "SYNCESC,LPDT Sync Error Interrupt Flag" "0: No error detected,1: LPDT Synchronization Error (ErrSyncEsc) detected" newline bitfld.long 0x0 16. "ESCENT,Escape mode Entry Error Interrupt Flag" "0: No error detected,1: Escape mode Entry Error (ErrEsc) detected" hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000." newline bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: No detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: No detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" newline bitfld.long 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag" "0: No detected,1: HS TX Timeout (HTX_TO) detected" rgroup.word 0x300++0x1 line.word 0x0 "FERRSR_L,Fatal Error Status Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: No detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: No detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.word 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag" "0: No detected,1: HS TX Timeout (HTX_TO) detected" rgroup.byte 0x300++0x0 line.byte 0x0 "FERRSR_LL,Fatal Error Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: No detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: No detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.byte 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag" "0: No detected,1: HS TX Timeout (HTX_TO) detected" rgroup.word 0x302++0x1 line.word 0x0 "FERRSR_H,Fatal Error Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "CLP1S,LP1 Contention Error Status" "0: Normal state,1: LP1 Contention Error (ErrContentionLP1) state" newline bitfld.word 0x0 11. "CLP0S,LP0 Contention Error Status" "0: Normal state,1: LP0 Contention Error (ErrContentionLP0) state" hexmask.word.byte 0x0 5.--10. 1. "Reserved,These bits are read as 000000." newline bitfld.word 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag" "0: No error detected,1: LP1 Contention Error (ErrContentionLP1) detected" bitfld.word 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag" "0: No error detected,1: LP0 Contention Error (ErrContentionLP0) detected" newline bitfld.word 0x0 2. "CTRL,Control Error Interrupt Flag" "0: No error detected,1: Control Error (ErrControl) detected" bitfld.word 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag" "0: No error detected,1: LPDT Synchronization Error (ErrSyncEsc) detected" newline bitfld.word 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag" "0: No error detected,1: Escape mode Entry Error (ErrEsc) detected" rgroup.byte 0x302++0x1 line.byte 0x0 "FERRSR_HL,Fatal Error Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag" "0: No error detected,1: LP1 Contention Error (ErrContentionLP1) detected" newline bitfld.byte 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag" "0: No error detected,1: LP0 Contention Error (ErrContentionLP0) detected" bitfld.byte 0x0 2. "CTRL,Control Error Interrupt Flag" "0: No error detected,1: Control Error (ErrControl) detected" newline bitfld.byte 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag" "0: No error detected,1: LPDT Synchronization Error (ErrSyncEsc) detected" bitfld.byte 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag" "0: No error detected,1: Escape mode Entry Error (ErrEsc) detected" line.byte 0x1 "FERRSR_HH,Fatal Error Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLP1S,LP1 Contention Error Status" "0: Normal state,1: LP1 Contention Error (ErrContentionLP1) state" newline bitfld.byte 0x1 3. "CLP0S,LP0 Contention Error Status" "0: Normal state,1: LP0 Contention Error (ErrContentionLP0) state" bitfld.byte 0x1 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" group.long 0x304++0x3 line.long 0x0 "FERRSCR,Fatal Error Status Clear Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." eventfld.long 0x0 20. "CLP1,LP1 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP1 flag" newline eventfld.long 0x0 19. "CLP0,LP0 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP0 flag" eventfld.long 0x0 18. "CTRL,Control Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CTRL flag" newline eventfld.long 0x0 17. "SYNCESC,LPDT Sync Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.SYNCESC flag" eventfld.long 0x0 16. "ESCENT,Escape mode Entry Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.ESCENT flag" newline hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." eventfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.TATO flag" newline eventfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.LRXHTO flag" eventfld.long 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.HTXTO flag" group.word 0x304++0x1 line.word 0x0 "FERRSCR_L,Fatal Error Status Clear Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." eventfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.TATO flag" newline eventfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.LRXHTO flag" eventfld.word 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.HTXTO flag" group.byte 0x304++0x0 line.byte 0x0 "FERRSCR_LL,Fatal Error Status Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.TATO flag" newline eventfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.LRXHTO flag" eventfld.byte 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.HTXTO flag" group.word 0x306++0x1 line.word 0x0 "FERRSCR_H,Fatal Error Status Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." eventfld.word 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP1 flag" newline eventfld.word 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP0 flag" eventfld.word 0x0 2. "CTRL,Control Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CTRL flag" newline eventfld.word 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.SYNCESC flag" eventfld.word 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.ESCENT flag" group.byte 0x306++0x0 line.byte 0x0 "FERRSCR_HL,Fatal Error Status Clear Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.byte 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP1 flag" newline eventfld.byte 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP0 flag" eventfld.byte 0x0 2. "CTRL,Control Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CTRL flag" newline eventfld.byte 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.SYNCESC flag" eventfld.byte 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.ESCENT flag" group.long 0x308++0x3 line.long 0x0 "FERRIER,Fatal Error Interrupt Enable Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "CLP1,LP1 Contention Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "CLP0,LP0 Contention Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 18. "CTRL,Control Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "SYNCESC,LPDT Sync Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "ESCENT,Escape mode Entry Error Interrupt Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "HTXTO,HS TX Timeout Interrupt Enable" "0: Disable,1: Enable" group.word 0x308++0x1 line.word 0x0 "FERRIER_L,Fatal Error Interrupt Enable Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "HTXTO,HS TX Timeout Interrupt Enable" "0: Disable,1: Enable" group.byte 0x308++0x0 line.byte 0x0 "FERRIER_LL,Fatal Error Interrupt Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "HTXTO,HS TX Timeout Interrupt Enable" "0: Disable,1: Enable" group.word 0x30A++0x1 line.word 0x0 "FERRIER_H,Fatal Error Interrupt Enable Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "CLP1,LP1 Contention Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 3. "CLP0,LP0 Contention Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 2. "CTRL,Control Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Enable" "0: Disable,1: Enable" group.byte 0x30A++0x0 line.byte 0x0 "FERRIER_HL,Fatal Error Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "CLP1,LP1 Contention Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 3. "CLP0,LP0 Contention Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 2. "CTRL,Control Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Enable" "0: Disable,1: Enable" group.long 0x314++0x3 line.long 0x0 "CLSTPTSETR,Clock Lane Stop Time Set Register" hexmask.long.byte 0x0 24.--31. 1. "CLKKPT,Clock Keep Time" hexmask.long.byte 0x0 16.--23. 1. "CLKBFHT,Clock Beforehand Time" newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x0 2.--11. 1. "CLKSTPT,Clock Stop Time" newline bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.word 0x314++0x1 line.word 0x0 "CLSTPTSETR_L,Clock Lane Stop Time Set Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word 0x0 2.--11. 1. "CLKSTPT,Clock Stop Time" newline bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.byte 0x314++0x1 line.byte 0x0 "CLSTPTSETR_LL,Clock Lane Stop Time Set Register" hexmask.byte 0x0 2.--7. 1. "CLKSTPT,Clock Stop Time" bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x1 "CLSTPTSETR_LH,Clock Lane Stop Time Set Register" hexmask.byte 0x1 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x1 0.--3. 1. "CLKSTPT,Clock Stop Time" group.word 0x316++0x1 line.word 0x0 "CLSTPTSETR_H,Clock Lane Stop Time Set Register" hexmask.word.byte 0x0 8.--15. 1. "CLKKPT,Clock Keep Time" hexmask.word.byte 0x0 0.--7. 1. "CLKBFHT,Clock Beforehand Time" group.byte 0x316++0x1 line.byte 0x0 "CLSTPTSETR_HL,Clock Lane Stop Time Set Register" hexmask.byte 0x0 0.--7. 1. "CLKBFHT,Clock Beforehand Time" line.byte 0x1 "CLSTPTSETR_HH,Clock Lane Stop Time Set Register" hexmask.byte 0x1 0.--7. 1. "CLKKPT,Clock Keep Time" group.long 0x318++0x3 line.long 0x0 "LPTRNSTSETR,LP Transition Time Set Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x0 0.--9. 1. "GOLPBKT,Go LP and Back Time" group.word 0x318++0x1 line.word 0x0 "LPTRNSTSETR_L,LP Transition Time Set Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x0 0.--9. 1. "GOLPBKT,Go LP and Back Time" group.byte 0x318++0x1 line.byte 0x0 "LPTRNSTSETR_LL,LP Transition Time Set Register" hexmask.byte 0x0 0.--7. 1. "GOLPBKT,Go LP and Back Time" line.byte 0x1 "LPTRNSTSETR_LH,LP Transition Time Set Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "GOLPBKT,Go LP and Back Time" "0,1,2,3" rgroup.long 0x320++0x3 line.long 0x0 "PLSR,Physical Lane Status Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 29. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 28. "DLULPENT,Data Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" bitfld.long 0x0 27. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 26. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.long 0x0 25. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 24. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" hexmask.long.byte 0x0 16.--23. 1. "Reserved,These bits are read as 00000000." newline bitfld.long 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: Transmitter,1: Receiver" bitfld.long 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.long 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.long 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 11." "0,1,2,3" newline bitfld.long 0x0 5. "DL1UAN,Data Lane-1 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" bitfld.long 0x0 4. "DL0UAN,Data Lane-0 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" newline bitfld.long 0x0 3. "DL0RUE,Data Lane-0 RxUlpsEsc Status" "0: Not in Escape Ultra-Low Power (Receive) mode,1: In Escape Ultra-Low Power (Receive) mode" bitfld.long 0x0 2. "DL0RLE,Data Lane-0 RxLpdtEsc Status" "0: Not in Escape Low-Power Data Receive mode,1: In Escape Low-Power Data Receive mode" newline bitfld.long 0x0 1. "CLSTP,Clock Lane Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.long 0x0 0. "CLUAN,Clock Lane UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" rgroup.word 0x320++0x1 line.word 0x0 "PLSR_L,Physical Lane Status Register" bitfld.word 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: Transmitter,1: Receiver" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.word 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.word 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 11." "0,1,2,3" newline bitfld.word 0x0 5. "DL1UAN,Data Lane-1 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" bitfld.word 0x0 4. "DL0UAN,Data Lane-0 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" newline bitfld.word 0x0 3. "DL0RUE,Data Lane-0 RxUlpsEsc Status" "0: Not in Escape Ultra-Low Power (Receive) mode,1: In Escape Ultra-Low Power (Receive) mode" bitfld.word 0x0 2. "DL0RLE,Data Lane-0 RxLpdtEsc Status" "0: Not in Escape Low-Power Data Receive mode,1: In Escape Low-Power Data Receive mode" newline bitfld.word 0x0 1. "CLSTP,Clock Lane Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.word 0x0 0. "CLUAN,Clock Lane UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" rgroup.byte 0x320++0x1 line.byte 0x0 "PLSR_LL,Physical Lane Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11." "0,1,2,3" bitfld.byte 0x0 5. "DL1UAN,Data Lane-1 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" newline bitfld.byte 0x0 4. "DL0UAN,Data Lane-0 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" bitfld.byte 0x0 3. "DL0RUE,Data Lane-0 RxUlpsEsc Status" "0: Not in Escape Ultra-Low Power (Receive) mode,1: In Escape Ultra-Low Power (Receive) mode" newline bitfld.byte 0x0 2. "DL0RLE,Data Lane-0 RxLpdtEsc Status" "0: Not in Escape Low-Power Data Receive mode,1: In Escape Low-Power Data Receive mode" bitfld.byte 0x0 1. "CLSTP,Clock Lane Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.byte 0x0 0. "CLUAN,Clock Lane UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" line.byte 0x1 "PLSR_LH,Physical Lane Status Register" bitfld.byte 0x1 7. "DL0DIR,Data Lane-0 Direction" "0: Transmitter,1: Receiver" bitfld.byte 0x1 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 5. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.byte 0x1 4. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 1. "DL1STP,Data Lane-1 Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.byte 0x1 0. "DL0STP,Data Lane-0 Stop Status" "0: Not in Stop state,1: In Stop state" rgroup.word 0x322++0x1 line.word 0x0 "PLSR_H,Physical Lane Status Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 13. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 12. "DLULPENT,Data Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" bitfld.word 0x0 11. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 10. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.word 0x0 9. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 8. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.byte 0x323++0x0 line.byte 0x0 "PLSR_HH,Physical Lane Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x0 4. "DLULPENT,Data Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" bitfld.byte 0x0 3. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x0 2. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.byte 0x0 1. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x0 0. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" group.long 0x324++0x3 line.long 0x0 "PLSCR,Physical Lane Status Clear Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 29. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPEXT flag" newline eventfld.long 0x0 28. "DLULPENT,Data Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPENT flag" eventfld.long 0x0 27. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLHS2LP flag" newline eventfld.long 0x0 26. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLLP2HS flag" eventfld.long 0x0 25. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPEXT flag" newline eventfld.long 0x0 24. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPENT flag" hexmask.long.word 0x0 14.--23. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline eventfld.long 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0TX2RX flag" eventfld.long 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0RX2TX flag" newline hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.word 0x324++0x1 line.word 0x0 "PLSCR_L,Physical Lane Status Clear Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0TX2RX flag" newline eventfld.word 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0RX2TX flag" hexmask.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.byte 0x325++0x0 line.byte 0x0 "PLSCR_LH,Physical Lane Status Clear Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 5. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0TX2RX flag" newline eventfld.byte 0x0 4. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0RX2TX flag" hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x326++0x1 line.word 0x0 "PLSCR_H,Physical Lane Status Clear Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 13. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPEXT flag" newline eventfld.word 0x0 12. "DLULPENT,Data Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPENT flag" eventfld.word 0x0 11. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLHS2LP flag" newline eventfld.word 0x0 10. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLLP2HS flag" eventfld.word 0x0 9. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPEXT flag" newline eventfld.word 0x0 8. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPENT flag" hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x327++0x0 line.byte 0x0 "PLSCR_HH,Physical Lane Status Clear Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 5. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPEXT flag" newline eventfld.byte 0x0 4. "DLULPENT,Data Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPENT flag" eventfld.byte 0x0 3. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLHS2LP flag" newline eventfld.byte 0x0 2. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLLP2HS flag" eventfld.byte 0x0 1. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPEXT flag" newline eventfld.byte 0x0 0. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPENT flag" group.long 0x328++0x3 line.long 0x0 "PLIER,Physical Lane Interrupt Enable Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "DLULPEXT,Data Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 28. "DLULPENT,Data Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 27. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 25. "CLULPEXT,Clock Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "CLULPENT,Clock Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 14.--23. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.word 0x328++0x1 line.word 0x0 "PLIER_L,Physical Lane Interrupt Enable Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Enable" "0: Disable,1: Enable" hexmask.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.byte 0x329++0x0 line.byte 0x0 "PLIER_LH,Physical Lane Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 4. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Enable" "0: Disable,1: Enable" hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x32A++0x1 line.word 0x0 "PLIER_H,Physical Lane Interrupt Enable Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "DLULPEXT,Data Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 12. "DLULPENT,Data Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 11. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 10. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 9. "CLULPEXT,Clock Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 8. "CLULPENT,Clock Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x32B++0x0 line.byte 0x0 "PLIER_HH,Physical Lane Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DLULPEXT,Data Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 4. "DLULPENT,Data Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 3. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 2. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 1. "CLULPEXT,Clock Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 0. "CLULPENT,Clock Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" group.long 0x400++0x3 line.long 0x0 "VMSET0R,Video Mode Set 0 Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." bitfld.long 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 10. "HFPNOLP,HFP period No LP" "0: Not suppressing the transition to LP during HFP..,1: Suppress the transition to LP during HFP period.." bitfld.long 0x0 9. "HBPNOLP,HBP period No LP" "?,1: Suppress the transition to LP during HBP period.." newline bitfld.long 0x0 8. "HSANOLP,HSA period No LP" "0: Not suppressing the transition to LP during HSA..,1: Suppress the transition to LP during HSA period.." hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "VSTOP,Video Mode Operation Stop" "0: No operation,1: Stop Video mode operation" newline bitfld.long 0x0 0. "VSTART,Video Mode Operation Start" "0: No operation,1: Start Video mode operation" group.word 0x400++0x1 line.word 0x0 "VMSET0R_L,Video Mode Set 0 Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "HFPNOLP,HFP period No LP" "0: Not suppressing the transition to LP during HFP..,1: Suppress the transition to LP during HFP period.." bitfld.word 0x0 9. "HBPNOLP,HBP period No LP" "?,1: Suppress the transition to LP during HBP period.." newline bitfld.word 0x0 8. "HSANOLP,HSA period No LP" "0: Not suppressing the transition to LP during HSA..,1: Suppress the transition to LP during HSA period.." hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "VSTOP,Video Mode Operation Stop" "0: No operation,1: Stop Video mode operation" newline bitfld.word 0x0 0. "VSTART,Video Mode Operation Start" "0: No operation,1: Start Video mode operation" group.byte 0x400++0x1 line.byte 0x0 "VMSET0R_LL,Video Mode Set 0 Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "VSTOP,Video Mode Operation Stop" "0: No operation,1: Stop Video mode operation" bitfld.byte 0x0 0. "VSTART,Video Mode Operation Start" "0: No operation,1: Start Video mode operation" line.byte 0x1 "VMSET0R_LH,Video Mode Set 0 Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "HFPNOLP,HFP period No LP" "0: Not suppressing the transition to LP during HFP..,1: Suppress the transition to LP during HFP period.." bitfld.byte 0x1 1. "HBPNOLP,HBP period No LP" "?,1: Suppress the transition to LP during HBP period.." newline bitfld.byte 0x1 0. "HSANOLP,HSA period No LP" "0: Not suppressing the transition to LP during HSA..,1: Suppress the transition to LP during HSA period.." group.word 0x404++0x1 line.word 0x0 "VMSET1R_L,Video Mode Set 1 Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word 0x0 2.--13. 1. "DLY,Delay Value" newline bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rgroup.word 0x406++0x1 line.word 0x0 "VMSET1R_H,Video Mode Set 1 Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 010000." hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0101." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 0.--1. "Reserved,These bits are read as 11." "0,1,2,3" rgroup.long 0x410++0x3 line.long 0x0 "VMSR,Video Mode Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 28. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 24.--25. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 23. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag" "0: Data overflow is not occurred,1: Data overflow is occurred in the video buffer" newline bitfld.long 0x0 22. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag" "0: Data underflow is not occurred,1: Data underflow is occurred in the video buffer" bitfld.long 0x0 21. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 20. "TIMERR,Timing Error Interrupt Flag" "0: Timing error is not occurred,1: Timing error is occurred during the video mode.." hexmask.long.byte 0x0 15.--19. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 14. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag" "0: Video mode operation is not ready,1: Video mode operation is ready" bitfld.long 0x0 2. "RUNNING,Video Mode Operation Running Status" "0: Video mode operation is stopped,1: Video mode operation is running" newline bitfld.long 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag" "0: Video mode operation has not stopped,1: Video mode operation has stopped" bitfld.long 0x0 0. "START,Video Mode Operation Start Interrupt Flag" "0: Video mode operation has not started,1: Video mode operation has started" rgroup.word 0x410++0x1 line.word 0x0 "VMSR_L,Video Mode Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline hexmask.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000." bitfld.word 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag" "0: Video mode operation is not ready,1: Video mode operation is ready" newline bitfld.word 0x0 2. "RUNNING,Video Mode Operation Running Status" "0: Video mode operation is stopped,1: Video mode operation is running" bitfld.word 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag" "0: Video mode operation has not stopped,1: Video mode operation has stopped" newline bitfld.word 0x0 0. "START,Video Mode Operation Start Interrupt Flag" "0: Video mode operation has not started,1: Video mode operation has started" rgroup.byte 0x410++0x1 line.byte 0x0 "VMSR_LL,Video Mode Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag" "0: Video mode operation is not ready,1: Video mode operation is ready" newline bitfld.byte 0x0 2. "RUNNING,Video Mode Operation Running Status" "0: Video mode operation is stopped,1: Video mode operation is running" bitfld.byte 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag" "0: Video mode operation has not stopped,1: Video mode operation has stopped" newline bitfld.byte 0x0 0. "START,Video Mode Operation Start Interrupt Flag" "0: Video mode operation has not started,1: Video mode operation has started" line.byte 0x1 "VMSR_LH,Video Mode Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000." rgroup.word 0x412++0x1 line.word 0x0 "VMSR_H,Video Mode Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 8.--9. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag" "0: Data overflow is not occurred,1: Data overflow is occurred in the video buffer" newline bitfld.word 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag" "0: Data underflow is not occurred,1: Data underflow is occurred in the video buffer" bitfld.word 0x0 5. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 4. "TIMERR,Timing Error Interrupt Flag" "0: Timing error is not occurred,1: Timing error is occurred during the video mode.." hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." rgroup.byte 0x412++0x1 line.byte 0x0 "VMSR_HL,Video Mode Status Register" bitfld.byte 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag" "0: Data overflow is not occurred,1: Data overflow is occurred in the video buffer" bitfld.byte 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag" "0: Data underflow is not occurred,1: Data underflow is occurred in the video buffer" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 4. "TIMERR,Timing Error Interrupt Flag" "0: Timing error is not occurred,1: Timing error is occurred during the video mode.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.byte 0x1 "VMSR_HH,Video Mode Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" group.long 0x414++0x3 line.long 0x0 "VMSCR,Video Mode Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 24.--25. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 23. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFOVF flag" newline eventfld.long 0x0 22. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFUDF flag" bitfld.long 0x0 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline eventfld.long 0x0 20. "TIMERR,Timing Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.TIMERR flag" hexmask.long.byte 0x0 15.--19. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline eventfld.long 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VIRDY flag" bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline eventfld.long 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.STOP flag" eventfld.long 0x0 0. "START,Video Mode Operation Start Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.START flag" group.word 0x414++0x1 line.word 0x0 "VMSCR_L,Video Mode Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." eventfld.word 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VIRDY flag" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.STOP flag" newline eventfld.word 0x0 0. "START,Video Mode Operation Start Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.START flag" group.byte 0x414++0x1 line.byte 0x0 "VMSCR_LL,Video Mode Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.byte 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VIRDY flag" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.STOP flag" newline eventfld.byte 0x0 0. "START,Video Mode Operation Start Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.START flag" line.byte 0x1 "VMSCR_LH,Video Mode Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x416++0x1 line.word 0x0 "VMSCR_H,Video Mode Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFOVF flag" newline eventfld.word 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFUDF flag" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline eventfld.word 0x0 4. "TIMERR,Timing Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.TIMERR flag" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x416++0x1 line.byte 0x0 "VMSCR_HL,Video Mode Status Clear Register" eventfld.byte 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFOVF flag" eventfld.byte 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFUDF flag" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x0 4. "TIMERR,Timing Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.TIMERR flag" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "VMSCR_HH,Video Mode Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x418++0x3 line.long 0x0 "VMIER,Video Mode Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 24.--25. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 23. "VBUFOVF,Video Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "VBUFUDF,Video Buffer Underflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20. "TIMERR,Timing Error Interrupt Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 15.--19. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "STOP,Video Mode Operation Stop Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "START,Video Mode Operation Start Interrupt Enable" "0: Disable,1: Enable" group.word 0x418++0x1 line.word 0x0 "VMIER_L,Video Mode Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.word 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "STOP,Video Mode Operation Stop Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 0. "START,Video Mode Operation Start Interrupt Enable" "0: Disable,1: Enable" group.byte 0x418++0x1 line.byte 0x0 "VMIER_LL,Video Mode Interrupt Enable Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "STOP,Video Mode Operation Stop Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 0. "START,Video Mode Operation Start Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "VMIER_LH,Video Mode Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x41A++0x1 line.word 0x0 "VMIER_H,Video Mode Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "TIMERR,Timing Error Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x41A++0x1 line.byte 0x0 "VMIER_HL,Video Mode Interrupt Enable Register" bitfld.byte 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "TIMERR,Timing Error Interrupt Enable" "0: Disable,1: Enable" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "VMIER_HH,Video Mode Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x420++0x3 line.long 0x0 "VMPPSETR,Video Mode Pixel Packet Set Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "VC,Video Mode Virtual Channel" "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "DT,Video Mode Data Type" bitfld.long 0x0 15. "TXESYNC,Transmit End of Sync Pulse" "0: HSE and VSE are not transmitted,1: HSE and VSE are transmitted" newline hexmask.long.word 0x0 4.--14. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x420++0x1 line.word 0x0 "VMPPSETR_L,Video Mode Pixel Packet Set Register" bitfld.word 0x0 15. "TXESYNC,Transmit End of Sync Pulse" "0: HSE and VSE are not transmitted,1: HSE and VSE are transmitted" hexmask.word 0x0 4.--14. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x420++0x1 line.byte 0x0 "VMPPSETR_LL,Video Mode Pixel Packet Set Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "VMPPSETR_LH,Video Mode Pixel Packet Set Register" bitfld.byte 0x1 7. "TXESYNC,Transmit End of Sync Pulse" "0: HSE and VSE are not transmitted,1: HSE and VSE are transmitted" hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.word 0x422++0x1 line.word 0x0 "VMPPSETR_H,Video Mode Pixel Packet Set Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "VC,Video Mode Virtual Channel" "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "DT,Video Mode Data Type" group.byte 0x422++0x0 line.byte 0x0 "VMPPSETR_HL,Video Mode Pixel Packet Set Register" bitfld.byte 0x0 6.--7. "VC,Video Mode Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Video Mode Data Type" group.long 0x428++0x3 line.long 0x0 "VMVSSETR,Video Mode Vertical Size Set Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 16.--30. 1. "VACT,Vertical Active Lines" newline bitfld.long 0x0 15. "VSPOL,VSYNC Polarity" "0: High Active,1: Low Active" bitfld.long 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--11. 1. "VSA,VSA Lines" group.word 0x428++0x1 line.word 0x0 "VMVSSETR_L,Video Mode Vertical Size Set Register" bitfld.word 0x0 15. "VSPOL,VSYNC Polarity" "0: High Active,1: Low Active" bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word 0x0 0.--11. 1. "VSA,VSA Lines" group.byte 0x428++0x1 line.byte 0x0 "VMVSSETR_LL,Video Mode Vertical Size Set Register" hexmask.byte 0x0 0.--7. 1. "VSA,VSA Lines" line.byte 0x1 "VMVSSETR_LH,Video Mode Vertical Size Set Register" bitfld.byte 0x1 7. "VSPOL,VSYNC Polarity" "0: High Active,1: Low Active" bitfld.byte 0x1 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.byte 0x1 0.--3. 1. "VSA,VSA Lines" group.word 0x42A++0x1 line.word 0x0 "VMVSSETR_H,Video Mode Vertical Size Set Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word 0x0 0.--14. 1. "VACT,Vertical Active Lines" group.byte 0x42A++0x1 line.byte 0x0 "VMVSSETR_HL,Video Mode Vertical Size Set Register" hexmask.byte 0x0 0.--7. 1. "VACT,Vertical Active Lines" line.byte 0x1 "VMVSSETR_HH,Video Mode Vertical Size Set Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 0.--6. 1. "VACT,Vertical Active Lines" group.long 0x42C++0x3 line.long 0x0 "VMVPSETR,Video Mode Vertical Porch Set Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 16.--28. 1. "VFP,VFP Lines" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 0.--12. 1. "VBP,VBP Lines" group.word 0x42C++0x1 line.word 0x0 "VMVPSETR_L,Video Mode Vertical Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "VBP,VBP Lines" group.byte 0x42C++0x1 line.byte 0x0 "VMVPSETR_LL,Video Mode Vertical Porch Set Register" hexmask.byte 0x0 0.--7. 1. "VBP,VBP Lines" line.byte 0x1 "VMVPSETR_LH,Video Mode Vertical Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "VBP,VBP Lines" group.word 0x42E++0x1 line.word 0x0 "VMVPSETR_H,Video Mode Vertical Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "VFP,VFP Lines" group.byte 0x42E++0x1 line.byte 0x0 "VMVPSETR_HL,Video Mode Vertical Porch Set Register" hexmask.byte 0x0 0.--7. 1. "VFP,VFP Lines" line.byte 0x1 "VMVPSETR_HH,Video Mode Vertical Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "VFP,VFP Lines" group.long 0x430++0x3 line.long 0x0 "VMHSSETR,Video Mode Horizontal Size Set Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 16.--30. 1. "HACT,HACT Pixels" newline bitfld.long 0x0 15. "HSPOL,HSYNC Polarity" "0: High Active,1: Low Active" bitfld.long 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--11. 1. "HSA,HSA Pixels" group.word 0x430++0x1 line.word 0x0 "VMHSSETR_L,Video Mode Horizontal Size Set Register" bitfld.word 0x0 15. "HSPOL,HSYNC Polarity" "0: High Active,1: Low Active" bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word 0x0 0.--11. 1. "HSA,HSA Pixels" group.byte 0x430++0x1 line.byte 0x0 "VMHSSETR_LL,Video Mode Horizontal Size Set Register" hexmask.byte 0x0 0.--7. 1. "HSA,HSA Pixels" line.byte 0x1 "VMHSSETR_LH,Video Mode Horizontal Size Set Register" bitfld.byte 0x1 7. "HSPOL,HSYNC Polarity" "0: High Active,1: Low Active" bitfld.byte 0x1 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.byte 0x1 0.--3. 1. "HSA,HSA Pixels" group.word 0x432++0x1 line.word 0x0 "VMHSSETR_H,Video Mode Horizontal Size Set Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word 0x0 0.--14. 1. "HACT,HACT Pixels" group.byte 0x432++0x1 line.byte 0x0 "VMHSSETR_HL,Video Mode Horizontal Size Set Register" hexmask.byte 0x0 0.--7. 1. "HACT,HACT Pixels" line.byte 0x1 "VMHSSETR_HH,Video Mode Horizontal Size Set Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 0.--6. 1. "HACT,HACT Pixels" group.long 0x434++0x3 line.long 0x0 "VMHPSETR,Video Mode Horizontal Porch Set Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 16.--28. 1. "HFP,HFP Pixels" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 0.--12. 1. "HBP,HBP Pixels" group.word 0x434++0x1 line.word 0x0 "VMHPSETR_L,Video Mode Horizontal Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "HBP,HBP Pixels" group.byte 0x434++0x1 line.byte 0x0 "VMHPSETR_LL,Video Mode Horizontal Porch Set Register" hexmask.byte 0x0 0.--7. 1. "HBP,HBP Pixels" line.byte 0x1 "VMHPSETR_LH,Video Mode Horizontal Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "HBP,HBP Pixels" group.word 0x436++0x1 line.word 0x0 "VMHPSETR_H,Video Mode Horizontal Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "HFP,HFP Pixels" group.byte 0x436++0x1 line.byte 0x0 "VMHPSETR_HL,Video Mode Horizontal Porch Set Register" hexmask.byte 0x0 0.--7. 1. "HFP,HFP Pixels" line.byte 0x1 "VMHPSETR_HH,Video Mode Horizontal Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "HFP,HFP Pixels" group.long 0x5C0++0x3 line.long 0x0 "SQCH0SET0R,Sequence Channel 0 Set 0 Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.word 0x0 9.--22. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.word 0x5C0++0x1 line.word 0x0 "SQCH0SET0R_L,Sequence Channel 0 Set 0 Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.byte 0x5C0++0x1 line.byte 0x0 "SQCH0SET0R_LL,Sequence Channel 0 Set 0 Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" line.byte 0x1 "SQCH0SET0R_LH,Sequence Channel 0 Set 0 Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x5C2++0x1 line.word 0x0 "SQCH0SET0R_H,Sequence Channel 0 Set 0 Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.word.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x5C2++0x0 line.byte 0x0 "SQCH0SET0R_HL,Sequence Channel 0 Set 0 Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." wgroup.byte 0x5C3++0x0 line.byte 0x0 "SQCH0SET0R_HH,Sequence Channel 0 Set 0 Register" bitfld.byte 0x0 7. "Reserved,The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,The write value should be 0000000." rgroup.long 0x5D0++0x3 line.long 0x0 "SQCH0SR,Sequence Channel 0 Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.long 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.word 0x5D0++0x1 line.word 0x0 "SQCH0SR_L,Sequence Channel 0 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.word 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.byte 0x5D0++0x1 line.byte 0x0 "SQCH0SR_LL,Sequence Channel 0 Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" line.byte 0x1 "SQCH0SR_LH,Sequence Channel 0 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" rgroup.word 0x5D2++0x1 line.word 0x0 "SQCH0SR_H,Sequence Channel 0 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" rgroup.byte 0x5D2++0x1 line.byte 0x0 "SQCH0SR_HL,Sequence Channel 0 Status Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" line.byte 0x1 "SQCH0SR_HH,Sequence Channel 0 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" group.long 0x5D4++0x3 line.long 0x0 "SQCH0SCR,Sequence Channel 0 Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x5D4++0x1 line.word 0x0 "SQCH0SCR_L,Sequence Channel 0 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x5D4++0x1 line.byte 0x0 "SQCH0SCR_LL,Sequence Channel 0 Status Clear Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH0SCR_LH,Sequence Channel 0 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" group.word 0x5D6++0x1 line.word 0x0 "SQCH0SCR_H,Sequence Channel 0 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" group.byte 0x5D6++0x1 line.byte 0x0 "SQCH0SCR_HL,Sequence Channel 0 Status Clear Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" line.byte 0x1 "SQCH0SCR_HH,Sequence Channel 0 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" group.long 0x5D8++0x3 line.long 0x0 "SQCH0IER,Sequence Channel 0 Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x5D8++0x1 line.word 0x0 "SQCH0IER_L,Sequence Channel 0 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x5D8++0x1 line.byte 0x0 "SQCH0IER_LL,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH0IER_LH,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" group.word 0x5DA++0x1 line.word 0x0 "SQCH0IER_H,Sequence Channel 0 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" group.byte 0x5DA++0x1 line.byte 0x0 "SQCH0IER_HL,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "SQCH0IER_HH,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" group.long 0x600++0x3 line.long 0x0 "SQCH1SET0R,Sequence Channel 1 Set 0 Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.word 0x0 9.--22. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.word 0x600++0x1 line.word 0x0 "SQCH1SET0R_L,Sequence Channel 1 Set 0 Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.byte 0x600++0x1 line.byte 0x0 "SQCH1SET0R_LL,Sequence Channel 1 Set 0 Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" line.byte 0x1 "SQCH1SET0R_LH,Sequence Channel 1 Set 0 Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x602++0x1 line.word 0x0 "SQCH1SET0R_H,Sequence Channel 1 Set 0 Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.word.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x602++0x0 line.byte 0x0 "SQCH1SET0R_HL,Sequence Channel 1 Set 0 Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." wgroup.byte 0x603++0x0 line.byte 0x0 "SQCH1SET0R_HH,Sequence Channel 1 Set 0 Register" bitfld.byte 0x0 7. "Reserved,The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,The write value should be 0000000." rgroup.long 0x610++0x3 line.long 0x0 "SQCH1SR,Sequence Channel 1 Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.long 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.word 0x610++0x1 line.word 0x0 "SQCH1SR_L,Sequence Channel 1 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.word 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.byte 0x610++0x1 line.byte 0x0 "SQCH1SR_LL,Sequence Channel 1 Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" line.byte 0x1 "SQCH1SR_LH,Sequence Channel 1 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" rgroup.word 0x612++0x1 line.word 0x0 "SQCH1SR_H,Sequence Channel 1 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" rgroup.byte 0x612++0x1 line.byte 0x0 "SQCH1SR_HL,Sequence Channel 1 Status Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" line.byte 0x1 "SQCH1SR_HH,Sequence Channel 1 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" group.long 0x614++0x3 line.long 0x0 "SQCH1SCR,Sequence Channel 1 Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x614++0x1 line.word 0x0 "SQCH1SCR_L,Sequence Channel 1 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x614++0x1 line.byte 0x0 "SQCH1SCR_LL,Sequence Channel 1 Status Clear Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH1SCR_LH,Sequence Channel 1 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" group.word 0x616++0x1 line.word 0x0 "SQCH1SCR_H,Sequence Channel 1 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" group.byte 0x616++0x1 line.byte 0x0 "SQCH1SCR_HL,Sequence Channel 1 Status Clear Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" line.byte 0x1 "SQCH1SCR_HH,Sequence Channel 1 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" group.long 0x618++0x3 line.long 0x0 "SQCH1IER,Sequence Channel 1 Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x618++0x1 line.word 0x0 "SQCH1IER_L,Sequence Channel 1 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x618++0x1 line.byte 0x0 "SQCH1IER_LL,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH1IER_LH,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" group.word 0x61A++0x1 line.word 0x0 "SQCH1IER_H,Sequence Channel 1 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" group.byte 0x61A++0x1 line.byte 0x0 "SQCH1IER_HL,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "SQCH1IER_HH,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x780)++0x3 line.long 0x0 "SQCH0DSC$1AR,Sequence Channel 0 Descriptor-%s A Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 28.--29. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.long 0x0 26.--27. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.long 0x0 25. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.long 0x0 24. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.long 0x0 22.--23. "VC,Virtual Channel" "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "DT,Data Type" hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data 1" newline hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x780)++0x1 line.word 0x0 "SQCH0DSC$1AR_L,Sequence Channel 0 Descriptor-%s A Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x780)++0x0 line.byte 0x0 "SQCH0DSC$1AR_LL,Sequence Channel 0 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x781)++0x0 line.byte 0x0 "SQCH0DSC$1AR_LH,Sequence Channel 0 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA1,Data 1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x782)++0x1 line.word 0x0 "SQCH0DSC$1AR_H,Sequence Channel 0 Descriptor-%s A Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.word 0x0 10.--11. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.word 0x0 9. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.word 0x0 8. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.word 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x782)++0x0 line.byte 0x0 "SQCH0DSC$1AR_HL,Sequence Channel 0 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x783)++0x0 line.byte 0x0 "SQCH0DSC$1AR_HH,Sequence Channel 0 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.byte 0x0 2.--3. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.byte 0x0 1. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.byte 0x0 0. "FMT,Format" "0: Short Packet,1: Long Packet" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x784)++0x3 line.long 0x0 "SQCH0DSC$1BR,Sequence Channel 0 Descriptor-%s B Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "DTSEL,Data Select" "0: Use Packet Payload Data Register (TXPPDxR RXPPDxR),1: Use Sequence RAM,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x788)++0x3 line.long 0x0 "SQCH0DSC$1CR,Sequence Channel 0 Descriptor-%s C Register" hexmask.long.byte 0x0 24.--31. 1. "ACTCODE,Action Code" bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.long.tbyte 0x0 3.--21. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x788)++0x1 line.word 0x0 "SQCH0DSC$1CR_L,Sequence Channel 0 Descriptor-%s C Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x788)++0x0 line.byte 0x0 "SQCH0DSC$1CR_LL,Sequence Channel 0 Descriptor-%s C Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x78A)++0x1 line.word 0x0 "SQCH0DSC$1CR_H,Sequence Channel 0 Descriptor-%s C Register" hexmask.word.byte 0x0 8.--15. 1. "ACTCODE,Action Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78A)++0x0 line.byte 0x0 "SQCH0DSC$1CR_HL,Sequence Channel 0 Descriptor-%s C Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78B)++0x0 line.byte 0x0 "SQCH0DSC$1CR_HH,Sequence Channel 0 Descriptor-%s C Register" hexmask.byte 0x0 0.--7. 1. "ACTCODE,Action Code" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x78C)++0x3 line.long 0x0 "SQCH0DSC$1DR,Sequence Channel 0 Descriptor-%s D Register" hexmask.long 0x0 0.--31. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x78C)++0x1 line.word 0x0 "SQCH0DSC$1DR_L,Sequence Channel 0 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78C)++0x0 line.byte 0x0 "SQCH0DSC$1DR_LL,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78D)++0x0 line.byte 0x0 "SQCH0DSC$1DR_LH,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x78E)++0x1 line.word 0x0 "SQCH0DSC$1DR_H,Sequence Channel 0 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78E)++0x0 line.byte 0x0 "SQCH0DSC$1DR_HL,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78F)++0x0 line.byte 0x0 "SQCH0DSC$1DR_HH,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x800)++0x3 line.long 0x0 "SQCH1DSC$1AR,Sequence Channel 1 Descriptor-%s A Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 28.--29. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.long 0x0 26.--27. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.long 0x0 25. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.long 0x0 24. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.long 0x0 22.--23. "VC,Virtual Channel" "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "DT,Data Type" hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data 1" newline hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x800)++0x1 line.word 0x0 "SQCH1DSC$1AR_L,Sequence Channel 1 Descriptor-%s A Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x800)++0x0 line.byte 0x0 "SQCH1DSC$1AR_LL,Sequence Channel 1 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x801)++0x0 line.byte 0x0 "SQCH1DSC$1AR_LH,Sequence Channel 1 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA1,Data 1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x802)++0x1 line.word 0x0 "SQCH1DSC$1AR_H,Sequence Channel 1 Descriptor-%s A Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.word 0x0 10.--11. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.word 0x0 9. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.word 0x0 8. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.word 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x802)++0x0 line.byte 0x0 "SQCH1DSC$1AR_HL,Sequence Channel 1 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x803)++0x0 line.byte 0x0 "SQCH1DSC$1AR_HH,Sequence Channel 1 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.byte 0x0 2.--3. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.byte 0x0 1. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.byte 0x0 0. "FMT,Format" "0: Short Packet,1: Long Packet" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x804)++0x3 line.long 0x0 "SQCH1DSC$1BR,Sequence Channel 1 Descriptor-%s B Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "DTSEL,Data Select" "0: Use Packet Payload Data Register (TXPPDxR RXPPDxR),1: Use Sequence RAM,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x808)++0x3 line.long 0x0 "SQCH1DSC$1CR,Sequence Channel 1 Descriptor-%s C Register" hexmask.long.byte 0x0 24.--31. 1. "ACTCODE,Action Code" bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.long.tbyte 0x0 3.--21. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x808)++0x1 line.word 0x0 "SQCH1DSC$1CR_L,Sequence Channel 1 Descriptor-%s C Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x808)++0x0 line.byte 0x0 "SQCH1DSC$1CR_LL,Sequence Channel 1 Descriptor-%s C Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80A)++0x1 line.word 0x0 "SQCH1DSC$1CR_H,Sequence Channel 1 Descriptor-%s C Register" hexmask.word.byte 0x0 8.--15. 1. "ACTCODE,Action Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80A)++0x0 line.byte 0x0 "SQCH1DSC$1CR_HL,Sequence Channel 1 Descriptor-%s C Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80B)++0x0 line.byte 0x0 "SQCH1DSC$1CR_HH,Sequence Channel 1 Descriptor-%s C Register" hexmask.byte 0x0 0.--7. 1. "ACTCODE,Action Code" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x80C)++0x3 line.long 0x0 "SQCH1DSC$1DR,Sequence Channel 1 Descriptor-%s D Register" hexmask.long 0x0 0.--31. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80C)++0x1 line.word 0x0 "SQCH1DSC$1DR_L,Sequence Channel 1 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80C)++0x0 line.byte 0x0 "SQCH1DSC$1DR_LL,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80D)++0x0 line.byte 0x0 "SQCH1DSC$1DR_LH,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80E)++0x1 line.word 0x0 "SQCH1DSCmDR_H$1,Sequence Channel 1 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80E)++0x0 line.byte 0x0 "SQCH1DSC$1DR_HL,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80F)++0x0 line.byte 0x0 "SQCH1DSC$1DR_HH,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end tree.end tree "DSILINK_NS" base ad:0x50346000 rgroup.long 0x0++0x3 line.long 0x0 "ISR,Interrupt Status Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "Reserved,This bit is read as 0." "0,1" newline hexmask.long.byte 0x0 21.--27. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 20. "PPI,PPI Interrupt Flag" "0: No interrupt detected,1: PPI interrupt detected" newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "FERR,Fatal Error Interrupt Flag" "0: No interrupt detected,1: Fatal Error interrupt detected" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "RCV,Receive Interrupt Flag" "0: No interrupt detected,1: Receive interrupt detected" newline bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 8. "VM,Video Mode Interrupt Flag" "0: No interrupt detected,1: Video Mode interrupt detected" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "SQ1,Sequence Channel-1 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-1 interrupt detected" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "SQ0,Sequence Channel-0 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-0 interrupt detected" rgroup.word 0x0++0x1 line.word 0x0 "ISR_L,Interrupt Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "RCV,Receive Interrupt Flag" "0: No interrupt detected,1: Receive interrupt detected" newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "VM,Video Mode Interrupt Flag" "0: No interrupt detected,1: Video Mode interrupt detected" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SQ1,Sequence Channel-1 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-1 interrupt detected" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SQ0,Sequence Channel-0 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-0 interrupt detected" rgroup.byte 0x0++0x1 line.byte 0x0 "ISR_LL,Interrupt Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SQ1,Sequence Channel-1 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-1 interrupt detected" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SQ0,Sequence Channel-0 Interrupt Flag" "0: No interrupt detected,1: Sequence Operation Channel-0 interrupt detected" line.byte 0x1 "ISR_LH,Interrupt Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "RCV,Receive Interrupt Flag" "0: No interrupt detected,1: Receive interrupt detected" newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "VM,Video Mode Interrupt Flag" "0: No interrupt detected,1: Video Mode interrupt detected" rgroup.word 0x2++0x1 line.word 0x0 "ISR_H,Interrupt Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 5.--11. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 4. "PPI,PPI Interrupt Flag" "0: No interrupt detected,1: PPI interrupt detected" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "FERR,Fatal Error Interrupt Flag" "0: No interrupt detected,1: Fatal Error interrupt detected" rgroup.byte 0x2++0x1 line.byte 0x0 "ISR_HL,Interrupt Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PPI,PPI Interrupt Flag" "0: No interrupt detected,1: PPI interrupt detected" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "FERR,Fatal Error Interrupt Flag" "0: No interrupt detected,1: Fatal Error interrupt detected" line.byte 0x1 "ISR_HH,Interrupt Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "Reserved,This bit is read as 0." "0,1" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000." rgroup.word 0x10++0x1 line.word 0x0 "LINKSR_L,Link Status Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 13. "LPBUSY,LP Operation Busy Flag" "0: LP mode stopped,1: LP mode in operation" newline bitfld.word 0x0 12. "HSBUSY,HS Operation Busy Flag" "0: HS mode stopped,1: HS mode in operation" bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 8. "VRUN,Video Mode Operation Running Flag" "0: Video mode stopped,1: Video mode in operation" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "SQ1RUN,Sequence Channel-1 Running Flag" "0: Sequence Operation Channel-1 stopped,1: Sequence Operation Channel-1 in operation" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "SQ0RUN,Sequence Channel-0 Running Flag" "0: Sequence Operation Channel-0 stopped,1: Sequence Operation Channel-0 in operation" rgroup.byte 0x10++0x1 line.byte 0x0 "LINKSR_LL,Link Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SQ1RUN,Sequence Channel-1 Running Flag" "0: Sequence Operation Channel-1 stopped,1: Sequence Operation Channel-1 in operation" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SQ0RUN,Sequence Channel-0 Running Flag" "0: Sequence Operation Channel-0 stopped,1: Sequence Operation Channel-0 in operation" line.byte 0x1 "LINKSR_LH,Link Status Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 5. "LPBUSY,LP Operation Busy Flag" "0: LP mode stopped,1: LP mode in operation" newline bitfld.byte 0x1 4. "HSBUSY,HS Operation Busy Flag" "0: HS mode stopped,1: HS mode in operation" bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x1 0. "VRUN,Video Mode Operation Running Flag" "0: Video mode stopped,1: Video mode in operation" rgroup.word 0x12++0x1 line.word 0x0 "LINKSR_H,Link Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 0.--4. 1. "Reserved,These bits are read as 00000." rgroup.byte 0x12++0x1 line.byte 0x0 "LINKSR_HL,Link Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "Reserved,These bits are read as 00000." line.byte 0x1 "LINKSR_HH,Link Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000." group.word 0x100++0x1 line.word 0x0 "TXSETR_L,Transmit Set Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "DLEN,Data Lane Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 8. "CLEN,Clock Lane Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "NUMLANE,Number of Lane" "0: 1 Lane (Use of Lane-0),1: 2 Lane (Use of Lane-0 and Lane-1),?,?" group.byte 0x100++0x1 line.byte 0x0 "TXSETR_LL,Transmit Set Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "NUMLANE,Number of Lane" "0: 1 Lane (Use of Lane-0),1: 2 Lane (Use of Lane-0 and Lane-1),?,?" line.byte 0x1 "TXSETR_LH,Transmit Set Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "DLEN,Data Lane Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 0. "CLEN,Clock Lane Enable" "0: Disable,1: Enable" rgroup.word 0x102++0x1 line.word 0x0 "TXSETR_H,Transmit Set Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000." bitfld.word 0x0 0.--1. "Reserved,These bits are read as 01." "0,1,2,3" rgroup.byte 0x102++0x0 line.byte 0x0 "TXSETR_HL,Transmit Set Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 01." "0,1,2,3" group.long 0x104++0x3 line.long 0x0 "HSCLKSETR,HS Clock Set Register" hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "HSCLMD,HS Clock Running Mode" "0: Non-continuous clock mode,1: Continuous clock mode" newline bitfld.long 0x0 0. "HSCLST,HS Clock Start" "0: Stop HS transmission (keep LP state),1: Start HS transmission" group.word 0x104++0x1 line.word 0x0 "HSCLKSETR_L,HS Clock Set Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x0 1. "HSCLMD,HS Clock Running Mode" "0: Non-continuous clock mode,1: Continuous clock mode" newline bitfld.word 0x0 0. "HSCLST,HS Clock Start" "0: Stop HS transmission (keep LP state),1: Start HS transmission" group.byte 0x104++0x0 line.byte 0x0 "HSCLKSETR_LL,HS Clock Set Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "HSCLMD,HS Clock Running Mode" "0: Non-continuous clock mode,1: Continuous clock mode" newline bitfld.byte 0x0 0. "HSCLST,HS Clock Start" "0: Stop HS transmission (keep LP state),1: Start HS transmission" group.long 0x108++0x3 line.long 0x0 "ULPSSETR,ULPS Set Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "WKUP,ULPS Wakeup Period" group.word 0x108++0x1 line.word 0x0 "ULPSSETR_L,ULPS Set Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "WKUP,ULPS Wakeup Period" group.byte 0x108++0x0 line.byte 0x0 "ULPSSETR_LL,ULPS Set Register" hexmask.byte 0x0 0.--7. 1. "WKUP,ULPS Wakeup Period" wgroup.long 0x10C++0x3 line.long 0x0 "ULPSCR,ULPS Control Register" bitfld.long 0x0 30.--31. "Reserved,The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "DLEXIT,DL ULPS Exit" "0: No operation,1: Data Lanes exit from ULPS" newline bitfld.long 0x0 28. "DLENT,DL ULPS Enter" "0: No operation,1: Transition Data Lanes to ULPS" bitfld.long 0x0 26.--27. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 25. "CLEXIT,CL ULPS Exit" "0: No operation,1: Clock Lane exits from ULPS" bitfld.long 0x0 24. "CLENT,CL ULPS Enter" "0: No operation,1: Transition Clock Lane to ULPS" newline hexmask.long.tbyte 0x0 0.--23. 1. "Reserved,The write value should be 000000000000000000000000." wgroup.word 0x10E++0x1 line.word 0x0 "ULPSCR_H,ULPS Control Register" bitfld.word 0x0 14.--15. "Reserved,The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "DLEXIT,DL ULPS Exit" "0: No operation,1: Data Lanes exit from ULPS" newline bitfld.word 0x0 12. "DLENT,DL ULPS Enter" "0: No operation,1: Transition Data Lanes to ULPS" bitfld.word 0x0 10.--11. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "CLEXIT,CL ULPS Exit" "0: No operation,1: Clock Lane exits from ULPS" bitfld.word 0x0 8. "CLENT,CL ULPS Enter" "0: No operation,1: Transition Clock Lane to ULPS" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x10F++0x0 line.byte 0x0 "ULPSCR_HH,ULPS Control Register" bitfld.byte 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DLEXIT,DL ULPS Exit" "0: No operation,1: Data Lanes exit from ULPS" newline bitfld.byte 0x0 4. "DLENT,DL ULPS Enter" "0: No operation,1: Transition Data Lanes to ULPS" bitfld.byte 0x0 2.--3. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CLEXIT,CL ULPS Exit" "0: No operation,1: Clock Lane exits from ULPS" bitfld.byte 0x0 0. "CLENT,CL ULPS Enter" "0: No operation,1: Transition Clock Lane to ULPS" group.long 0x110++0x3 line.long 0x0 "RSTCR,Reset Control Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "FTXSTP,Force Tx Stop Mode" "0: Finish the Force Stop state,1: Force Data Lanes into transmit mode and generate.." newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "SWRST,Software Reset" "0: Complete the Software Reset,1: Request a Software Reset" group.word 0x110++0x1 line.word 0x0 "RSTCR_L,Reset Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "SWRST,Software Reset" "0: Complete the Software Reset,1: Request a Software Reset" group.byte 0x110++0x0 line.byte 0x0 "RSTCR_LL,Reset Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SWRST,Software Reset" "0: Complete the Software Reset,1: Request a Software Reset" group.word 0x112++0x1 line.word 0x0 "RSTCR_H,Reset Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "FTXSTP,Force Tx Stop Mode" "0: Finish the Force Stop state,1: Force Data Lanes into transmit mode and generate.." group.byte 0x112++0x1 line.byte 0x0 "RSTCR_HL,Reset Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "FTXSTP,Force Tx Stop Mode" "0: Finish the Force Stop state,1: Force Data Lanes into transmit mode and generate.." line.byte 0x1 "RSTCR_HH,Reset Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rgroup.long 0x114++0x3 line.long 0x0 "RSTSR,Reset Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." bitfld.long 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: TX mode,1: RX mode" newline hexmask.long.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not Stop state,1: Stop state" newline bitfld.long 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not Stop state,1: Stop state" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "RSTV,Video Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for Video mode" bitfld.long 0x0 3. "RSTAXI,AXI Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for AXI bus" newline bitfld.long 0x0 2. "RSTAPB,APB Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for APB bus" bitfld.long 0x0 1. "RSTLP,LP Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for LP mode" newline bitfld.long 0x0 0. "RSTHS,HS Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for HS mode" rgroup.word 0x114++0x1 line.word 0x0 "RSTSR_L,Reset Status Register" bitfld.word 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: TX mode,1: RX mode" hexmask.word.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000." newline bitfld.word 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not Stop state,1: Stop state" bitfld.word 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not Stop state,1: Stop state" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "RSTV,Video Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for Video mode" newline bitfld.word 0x0 3. "RSTAXI,AXI Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for AXI bus" bitfld.word 0x0 2. "RSTAPB,APB Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for APB bus" newline bitfld.word 0x0 1. "RSTLP,LP Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for LP mode" bitfld.word 0x0 0. "RSTHS,HS Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for HS mode" rgroup.byte 0x114++0x1 line.byte 0x0 "RSTSR_LL,Reset Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSTV,Video Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for Video mode" newline bitfld.byte 0x0 3. "RSTAXI,AXI Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for AXI bus" bitfld.byte 0x0 2. "RSTAPB,APB Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for APB bus" newline bitfld.byte 0x0 1. "RSTLP,LP Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for LP mode" bitfld.byte 0x0 0. "RSTHS,HS Software Reset Status" "0: Not in software reset procedure,1: Running software reset procedure for HS mode" line.byte 0x1 "RSTSR_LH,Reset Status Register" bitfld.byte 0x1 7. "DL0DIR,Data Lane-0 Direction" "0: TX mode,1: RX mode" hexmask.byte 0x1 2.--6. 1. "Reserved,These bits are read as 00000." newline bitfld.byte 0x1 1. "DL1STP,Data Lane-1 Stop Status" "0: Not Stop state,1: Stop state" bitfld.byte 0x1 0. "DL0STP,Data Lane-0 Stop Status" "0: Not Stop state,1: Stop state" group.long 0x120++0x3 line.long 0x0 "DSISETR,DSI Set Register" bitfld.long 0x0 31. "EOTPEN,HS Transfer EoTp Enable" "0: Disable,1: Enable" bitfld.long 0x0 30. "EXTEMD,External Tearing Effect Detection Sense Select" "0: Rising edge,1: Falling edge" newline bitfld.long 0x0 29. "SCREN,Data Scramble Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 23. "VC3CRCEN,VC-3 CRC Check Enable" "0: Disable,1: Enable" bitfld.long 0x0 22. "VC2CRCEN,VC-2 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "VC1CRCEN,VC-1 CRC Check Enable" "0: Disable,1: Enable" bitfld.long 0x0 20. "VC0CRCEN,VC-0 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ECCEN,ECC Check Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 0.--15. 1. "MRPSZ,Maximum Return Packet Size" group.word 0x120++0x1 line.word 0x0 "DSISETR_L,DSI Set Register" hexmask.word 0x0 0.--15. 1. "MRPSZ,Maximum Return Packet Size" group.byte 0x120++0x1 line.byte 0x0 "DSISETR_LL,DSI Set Register" hexmask.byte 0x0 0.--7. 1. "MRPSZ,Maximum Return Packet Size" line.byte 0x1 "DSISETR_LH,DSI Set Register" hexmask.byte 0x1 0.--7. 1. "MRPSZ,Maximum Return Packet Size" group.word 0x122++0x1 line.word 0x0 "DSISETR_H,DSI Set Register" bitfld.word 0x0 15. "EOTPEN,HS Transfer EoTp Enable" "0: Disable,1: Enable" bitfld.word 0x0 14. "EXTEMD,External Tearing Effect Detection Sense Select" "0: Rising edge,1: Falling edge" newline bitfld.word 0x0 13. "SCREN,Data Scramble Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 7. "VC3CRCEN,VC-3 CRC Check Enable" "0: Disable,1: Enable" bitfld.word 0x0 6. "VC2CRCEN,VC-2 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 5. "VC1CRCEN,VC-1 CRC Check Enable" "0: Disable,1: Enable" bitfld.word 0x0 4. "VC0CRCEN,VC-0 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ECCEN,ECC Check Enable" "0: Disable,1: Enable" group.byte 0x122++0x1 line.byte 0x0 "DSISETR_HL,DSI Set Register" bitfld.byte 0x0 7. "VC3CRCEN,VC-3 CRC Check Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "VC2CRCEN,VC-2 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 5. "VC1CRCEN,VC-1 CRC Check Enable" "0: Disable,1: Enable" bitfld.byte 0x0 4. "VC0CRCEN,VC-0 CRC Check Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ECCEN,ECC Check Enable" "0: Disable,1: Enable" line.byte 0x1 "DSISETR_HH,DSI Set Register" bitfld.byte 0x1 7. "EOTPEN,HS Transfer EoTp Enable" "0: Disable,1: Enable" bitfld.byte 0x1 6. "EXTEMD,External Tearing Effect Detection Sense Select" "0: Rising edge,1: Falling edge" newline bitfld.byte 0x1 5. "SCREN,Data Scramble Enable" "0: Disable,1: Enable" hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x160++0x3 line.long 0x0 "TXPPD0R,Transmit Packet Payload Data 0 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA3,Payload Data 3" hexmask.long.byte 0x0 16.--23. 1. "DATA2,Payload Data 2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" group.word 0x160++0x1 line.word 0x0 "TXPPD0R_L,Transmit Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" group.byte 0x160++0x1 line.byte 0x0 "TXPPD0R_LL,Transmit Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" line.byte 0x1 "TXPPD0R_LH,Transmit Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA1,Payload Data 1" group.word 0x162++0x1 line.word 0x0 "TXPPD0R_H,Transmit Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA3,Payload Data 3" hexmask.word.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" group.byte 0x162++0x1 line.byte 0x0 "TXPPD0R_HL,Transmit Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" line.byte 0x1 "TXPPD0R_HH,Transmit Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA3,Payload Data 3" group.long 0x164++0x3 line.long 0x0 "TXPPD1R,Transmit Packet Payload Data 1 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA7,Payload Data 7" hexmask.long.byte 0x0 16.--23. 1. "DATA6,Payload Data 6" newline hexmask.long.byte 0x0 8.--15. 1. "DATA5,Payload Data 5" hexmask.long.byte 0x0 0.--7. 1. "DATA4,Payload Data 4" group.word 0x164++0x1 line.word 0x0 "TXPPD1R_L,Transmit Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA5,Payload Data 5" hexmask.word.byte 0x0 0.--7. 1. "DATA4,Payload Data 4" group.byte 0x164++0x1 line.byte 0x0 "TXPPD1R_LL,Transmit Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA4,Payload Data 4" line.byte 0x1 "TXPPD1R_LH,Transmit Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA5,Payload Data 5" group.word 0x166++0x1 line.word 0x0 "TXPPD1R_H,Transmit Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA7,Payload Data 7" hexmask.word.byte 0x0 0.--7. 1. "DATA6,Payload Data 6" group.byte 0x166++0x1 line.byte 0x0 "TXPPD1R_HL,Transmit Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA6,Payload Data 6" line.byte 0x1 "TXPPD1R_HH,Transmit Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA7,Payload Data 7" group.long 0x168++0x3 line.long 0x0 "TXPPD2R,Transmit Packet Payload Data 2 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA11,Payload Data 11" hexmask.long.byte 0x0 16.--23. 1. "DATA10,Payload Data 10" newline hexmask.long.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.long.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" group.word 0x168++0x1 line.word 0x0 "TXPPD2R_L,Transmit Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.word.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" group.byte 0x168++0x1 line.byte 0x0 "TXPPD2R_LL,Transmit Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" line.byte 0x1 "TXPPD2R_LH,Transmit Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA9,Payload Data 9" group.word 0x16A++0x1 line.word 0x0 "TXPPD2R_H,Transmit Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA11,Payload Data 11" hexmask.word.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" group.byte 0x16A++0x1 line.byte 0x0 "TXPPD2R_HL,Transmit Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" line.byte 0x1 "TXPPD2R_HH,Transmit Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA11,Payload Data 11" group.long 0x16C++0x3 line.long 0x0 "TXPPD3R,Transmit Packet Payload Data 3 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA15,Payload Data 15" hexmask.long.byte 0x0 16.--23. 1. "DATA14,Payload Data 14" newline hexmask.long.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.long.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" group.word 0x16C++0x1 line.word 0x0 "TXPPD3R_L,Transmit Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.word.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" group.byte 0x16C++0x1 line.byte 0x0 "TXPPD3R_LL,Transmit Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" line.byte 0x1 "TXPPD3R_LH,Transmit Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA13,Payload Data 13" group.word 0x16E++0x1 line.word 0x0 "TXPPD3R_H,Transmit Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA15,Payload Data 15" hexmask.word.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" group.byte 0x16E++0x1 line.byte 0x0 "TXPPD3R_HL,Transmit Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" line.byte 0x1 "TXPPD3R_HH,Transmit Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA15,Payload Data 15" rgroup.long 0x200++0x3 line.long 0x0 "RXSR,Receive Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 28. "ECCERRS,Single Bit ECC Error Interrupt Flag" "0: No error detected,1: A single-bit ECC error detected" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 26. "RSIZEERR,Return Packet Size Error Interrupt Flag" "0: No error detected,1: Oversize error in a received long packet detected" newline bitfld.long 0x0 25. "NORESERR,No Response Error Interrupt Flag" "0: No error occurred,1: No triggers or packets returned during BTA period" bitfld.long 0x0 24. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag" "0: No error occurred,1: Peripheral response timeout occurred" newline bitfld.long 0x0 23. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag" "0: No error detected,1: A buffer overflow error detected on receiving.." bitfld.long 0x0 22. "IBERR,Internal Bus Error Interrupt Flag" "0: No error detected,1: Internal AXI bus write failed" newline bitfld.long 0x0 21. "CRCERR,CRC Error Interrupt Flag" "0: No error detected,1: CRC error detected" bitfld.long 0x0 20. "WCERR,Word Count Error Interrupt Flag" "0: No error detected,1: The length of the received packet is shorter.." newline bitfld.long 0x0 19. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 18. "UNEXERR,Unexpected Packet Error Interrupt Flag" "0: No error,1: Unexpected packet received" newline bitfld.long 0x0 17. "ECCERRM,Multi Bit ECC Error Interrupt Flag" "0: No error detected,1: A multi-bit ECC error detected" bitfld.long 0x0 16. "MLFERR,Malform Error Interrupt Flag" "0: No error received,1: A packet of less than 4 bytes received" newline bitfld.long 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag" "0: Not detected,1: External Tearing Effect detected" bitfld.long 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag" "0: No trigger received,1: ACK trigger received" newline bitfld.long 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag" "0: No trigger received,1: Tearing Effect Trigger received" bitfld.long 0x0 12. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag" "0: No received,1: EoTp received" newline bitfld.long 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag" "0: No response received,1: Response packet received" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: Not detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: Not detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.long 0x0 0. "BTAREND,BTA Request End Interrupt Flag" "0: Not detected,1: BTA Completion detected" rgroup.word 0x200++0x1 line.word 0x0 "RXSR_L,Receive Status Register" bitfld.word 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag" "0: Not detected,1: External Tearing Effect detected" bitfld.word 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag" "0: No trigger received,1: ACK trigger received" newline bitfld.word 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag" "0: No trigger received,1: Tearing Effect Trigger received" bitfld.word 0x0 12. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag" "0: No received,1: EoTp received" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag" "0: No response received,1: Response packet received" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: Not detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: Not detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.word 0x0 0. "BTAREND,BTA Request End Interrupt Flag" "0: Not detected,1: BTA Completion detected" rgroup.byte 0x200++0x1 line.byte 0x0 "RXSR_LL,Receive Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: Not detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: Not detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.byte 0x0 0. "BTAREND,BTA Request End Interrupt Flag" "0: Not detected,1: BTA Completion detected" line.byte 0x1 "RXSR_LH,Receive Status Register" bitfld.byte 0x1 7. "EXTEDET,External Tearing Effect Detect Interrupt Flag" "0: Not detected,1: External Tearing Effect detected" bitfld.byte 0x1 6. "RXACK,ACK Trigger Receive Interrupt Flag" "0: No trigger received,1: ACK trigger received" newline bitfld.byte 0x1 5. "RXTE,Tearing Effect Trigger Receive Interrupt Flag" "0: No trigger received,1: Tearing Effect Trigger received" bitfld.byte 0x1 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 2. "RXEOTP,EoTp Receive Interrupt Flag" "0: No received,1: EoTp received" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0. "RXRESP,Response Packet Receive Interrupt Flag" "0: No response received,1: Response packet received" rgroup.word 0x202++0x1 line.word 0x0 "RXSR_H,Receive Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 12. "ECCERRS,Single Bit ECC Error Interrupt Flag" "0: No error detected,1: A single-bit ECC error detected" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 10. "RSIZEERR,Return Packet Size Error Interrupt Flag" "0: No error detected,1: Oversize error in a received long packet detected" newline bitfld.word 0x0 9. "NORESERR,No Response Error Interrupt Flag" "0: No error occurred,1: No triggers or packets returned during BTA period" bitfld.word 0x0 8. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag" "0: No error occurred,1: Peripheral response timeout occurred" newline bitfld.word 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag" "0: No error detected,1: A buffer overflow error detected on receiving.." bitfld.word 0x0 6. "IBERR,Internal Bus Error Interrupt Flag" "0: No error detected,1: Internal AXI bus write failed" newline bitfld.word 0x0 5. "CRCERR,CRC Error Interrupt Flag" "0: No error detected,1: CRC error detected" bitfld.word 0x0 4. "WCERR,Word Count Error Interrupt Flag" "0: No error detected,1: The length of the received packet is shorter.." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag" "0: No error,1: Unexpected packet received" newline bitfld.word 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag" "0: No error detected,1: A multi-bit ECC error detected" bitfld.word 0x0 0. "MLFERR,Malform Error Interrupt Flag" "0: No error received,1: A packet of less than 4 bytes received" rgroup.byte 0x202++0x1 line.byte 0x0 "RXSR_HL,Receive Status Register" bitfld.byte 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag" "0: No error detected,1: A buffer overflow error detected on receiving.." bitfld.byte 0x0 6. "IBERR,Internal Bus Error Interrupt Flag" "0: No error detected,1: Internal AXI bus write failed" newline bitfld.byte 0x0 5. "CRCERR,CRC Error Interrupt Flag" "0: No error detected,1: CRC error detected" bitfld.byte 0x0 4. "WCERR,Word Count Error Interrupt Flag" "0: No error detected,1: The length of the received packet is shorter.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag" "0: No error,1: Unexpected packet received" newline bitfld.byte 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag" "0: No error detected,1: A multi-bit ECC error detected" bitfld.byte 0x0 0. "MLFERR,Malform Error Interrupt Flag" "0: No error received,1: A packet of less than 4 bytes received" line.byte 0x1 "RXSR_HH,Receive Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 4. "ECCERRS,Single Bit ECC Error Interrupt Flag" "0: No error detected,1: A single-bit ECC error detected" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 2. "RSIZEERR,Return Packet Size Error Interrupt Flag" "0: No error detected,1: Oversize error in a received long packet detected" newline bitfld.byte 0x1 1. "NORESERR,No Response Error Interrupt Flag" "0: No error occurred,1: No triggers or packets returned during BTA period" bitfld.byte 0x1 0. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag" "0: No error occurred,1: Peripheral response timeout occurred" group.long 0x204++0x3 line.long 0x0 "RXSCR,Receive Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXAKE flag" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 28. "ECCERRS,Single Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRS flag" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 26. "RSIZEERR,Return Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RSIZEERR flag" newline eventfld.long 0x0 25. "NORESERR,No Response Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.NORESERR flag" eventfld.long 0x0 24. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.PRTOERR flag" newline eventfld.long 0x0 23. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXOVFERR flag" eventfld.long 0x0 22. "IBERR,Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.IBERR flag" newline eventfld.long 0x0 21. "CRCERR,CRC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.CRCERR flag" eventfld.long 0x0 20. "WCERR,Word Count Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.WCERR flag" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 18. "UNEXERR,Unexpected Packet Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.UNEXERR flag" newline eventfld.long 0x0 17. "ECCERRM,Multi Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRM flag" eventfld.long 0x0 16. "MLFERR,Malform Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.MLFERR flag" newline eventfld.long 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.EXTEDET flag" eventfld.long 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXACK flag" newline eventfld.long 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXTE flag" bitfld.long 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXEOTP flag" newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXRESP flag" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.TATO flag" newline eventfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.LRXHTO flag" eventfld.long 0x0 0. "BTAREND,BTA Request End Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.BTAREND flag" group.word 0x204++0x1 line.word 0x0 "RXSCR_L,Receive Status Clear Register" eventfld.word 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.EXTEDET flag" eventfld.word 0x0 14. "RXACK,ACK Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXACK flag" newline eventfld.word 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXTE flag" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 10. "RXEOTP,EoTp Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXEOTP flag" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 8. "RXRESP,Response Packet Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXRESP flag" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.TATO flag" newline eventfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.LRXHTO flag" eventfld.word 0x0 0. "BTAREND,BTA Request End Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.BTAREND flag" group.byte 0x204++0x1 line.byte 0x0 "RXSCR_LL,Receive Status Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.TATO flag" newline eventfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.LRXHTO flag" eventfld.byte 0x0 0. "BTAREND,BTA Request End Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.BTAREND flag" line.byte 0x1 "RXSCR_LH,Receive Status Clear Register" eventfld.byte 0x1 7. "EXTEDET,External Tearing Effect Detect Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.EXTEDET flag" eventfld.byte 0x1 6. "RXACK,ACK Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXACK flag" newline eventfld.byte 0x1 5. "RXTE,Tearing Effect Trigger Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXTE flag" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 2. "RXEOTP,EoTp Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXEOTP flag" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 0. "RXRESP,Response Packet Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXRESP flag" group.word 0x206++0x1 line.word 0x0 "RXSCR_H,Receive Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 14. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXAKE flag" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 12. "ECCERRS,Single Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRS flag" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 10. "RSIZEERR,Return Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RSIZEERR flag" newline eventfld.word 0x0 9. "NORESERR,No Response Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.NORESERR flag" eventfld.word 0x0 8. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.PRTOERR flag" newline eventfld.word 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXOVFERR flag" eventfld.word 0x0 6. "IBERR,Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.IBERR flag" newline eventfld.word 0x0 5. "CRCERR,CRC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.CRCERR flag" eventfld.word 0x0 4. "WCERR,Word Count Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.WCERR flag" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.UNEXERR flag" newline eventfld.word 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRM flag" eventfld.word 0x0 0. "MLFERR,Malform Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.MLFERR flag" group.byte 0x206++0x1 line.byte 0x0 "RXSCR_HL,Receive Status Clear Register" eventfld.byte 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXOVFERR flag" eventfld.byte 0x0 6. "IBERR,Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.IBERR flag" newline eventfld.byte 0x0 5. "CRCERR,CRC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.CRCERR flag" eventfld.byte 0x0 4. "WCERR,Word Count Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.WCERR flag" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.UNEXERR flag" newline eventfld.byte 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRM flag" eventfld.byte 0x0 0. "MLFERR,Malform Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.MLFERR flag" line.byte 0x1 "RXSCR_HH,Receive Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 6. "RXAKE,Acknowledge and Error Report Receive Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RXAKE flag" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 4. "ECCERRS,Single Bit ECC Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.ECCERRS flag" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 2. "RSIZEERR,Return Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.RSIZEERR flag" newline eventfld.byte 0x1 1. "NORESERR,No Response Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.NORESERR flag" eventfld.byte 0x1 0. "PRTOERR,Peripheral Response Timeout Error Interrupt Flag Clear" "0: No operation,1: Clear the RXSR.PRTOERR flag" group.long 0x208++0x3 line.long 0x0 "RXIER,Receive Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "RXAKE,Acknowledge and Error Report Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "ECCERRS,Single Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 26. "RSIZEERR,Return Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "NORESERR,No Response Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 24. "PRTOERR,Peripheral Response Timeout Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "RXOVFERR,Receive Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 22. "IBERR,Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 21. "CRCERR,CRC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 20. "WCERR,Word Count Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 18. "UNEXERR,Unexpected Packet Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "ECCERRM,Multi Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "MLFERR,Malform Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 14. "RXACK,ACK Trigger Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 10. "RXEOTP,EoTp Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 8. "RXRESP,Response Packet Receive Interrupt Enable" "0: Disable,1: Enable" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "BTAREND,BTA Request End Interrupt Enable" "0: Disable,1: Enable" group.word 0x208++0x1 line.word 0x0 "RXIER_L,Receive Interrupt Enable Register" bitfld.word 0x0 15. "EXTEDET,External Tearing Effect Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 14. "RXACK,ACK Trigger Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "RXTE,Tearing Effect Trigger Receive Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "RXEOTP,EoTp Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "RXRESP,Response Packet Receive Interrupt Enable" "0: Disable,1: Enable" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "BTAREND,BTA Request End Interrupt Enable" "0: Disable,1: Enable" group.byte 0x208++0x1 line.byte 0x0 "RXIER_LL,Receive Interrupt Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "BTAREND,BTA Request End Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "RXIER_LH,Receive Interrupt Enable Register" bitfld.byte 0x1 7. "EXTEDET,External Tearing Effect Detect Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 6. "RXACK,ACK Trigger Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "RXTE,Tearing Effect Trigger Receive Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "RXEOTP,EoTp Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "RXRESP,Response Packet Receive Interrupt Enable" "0: Disable,1: Enable" group.word 0x20A++0x1 line.word 0x0 "RXIER_H,Receive Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "RXAKE,Acknowledge and Error Report Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "ECCERRS,Single Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "RSIZEERR,Return Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "NORESERR,No Response Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 8. "PRTOERR,Peripheral Response Timeout Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 6. "IBERR,Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 5. "CRCERR,CRC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 4. "WCERR,Word Count Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "MLFERR,Malform Error Interrupt Enable" "0: Disable,1: Enable" group.byte 0x20A++0x1 line.byte 0x0 "RXIER_HL,Receive Interrupt Enable Register" bitfld.byte 0x0 7. "RXOVFERR,Receive Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "IBERR,Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 5. "CRCERR,CRC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 4. "WCERR,Word Count Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "UNEXERR,Unexpected Packet Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "ECCERRM,Multi Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "MLFERR,Malform Error Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "RXIER_HH,Receive Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Acknowledge and Error Report Receive Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "ECCERRS,Single Bit ECC Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "RSIZEERR,Return Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "NORESERR,No Response Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 0. "PRTOERR,Peripheral Response Timeout Error Interrupt Enable" "0: Disable,1: Enable" group.long 0x210++0x7 line.long 0x0 "PRESPTOBTASETR,Peripheral Response Timeout BTA Set Register" hexmask.long 0x0 0.--31. 1. "PRTBTA,Peripheral Response Timeout Count" line.long 0x4 "PRESPTOLPSETR,Peripheral Response Timeout LP Set Register" hexmask.long.word 0x4 16.--31. 1. "LPRTO,LPDT READ Request Timeout" hexmask.long.word 0x4 0.--15. 1. "LPWTO,LPDT WRITE Request Timeout" group.word 0x214++0x3 line.word 0x0 "PRESPTOLPSETR_L,Peripheral Response Timeout LP Set Register" hexmask.word 0x0 0.--15. 1. "LPWTO,LPDT WRITE Request Timeout" line.word 0x2 "PRESPTOLPSETR_H,Peripheral Response Timeout LP Set Register" hexmask.word 0x2 0.--15. 1. "LPRTO,LPDT READ Request Timeout" group.long 0x218++0x3 line.long 0x0 "PRESPTOHSSETR,Peripheral Response Timeout HS Set Register" hexmask.long.word 0x0 16.--31. 1. "HSRTO,HS READ Request Timeout" hexmask.long.word 0x0 0.--15. 1. "HSWTO,HS WRITE Request Timeout" group.word 0x218++0x3 line.word 0x0 "PRESPTOHSSETR_L,Peripheral Response Timeout HS Set Register" hexmask.word 0x0 0.--15. 1. "HSWTO,HS WRITE Request Timeout" line.word 0x2 "PRESPTOHSSETR_H,Peripheral Response Timeout HS Set Register" hexmask.word 0x2 0.--15. 1. "HSRTO,HS READ Request Timeout" rgroup.long 0x220++0x3 line.long 0x0 "AKEPLATIR,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000." hexmask.long.byte 0x0 16.--19. 1. "VC,Virtual Channel ID" newline hexmask.long.word 0x0 0.--15. 1. "EREP,Error Report" rgroup.word 0x220++0x1 line.word 0x0 "AKEPLATIR_L,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.word 0x0 0.--15. 1. "EREP,Error Report" rgroup.byte 0x220++0x1 line.byte 0x0 "AKEPLATIR_LL,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.byte 0x0 0.--7. 1. "EREP,Error Report" line.byte 0x1 "AKEPLATIR_LH,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.byte 0x1 0.--7. 1. "EREP,Error Report" rgroup.word 0x222++0x1 line.word 0x0 "AKEPLATIR_H,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." hexmask.word.byte 0x0 0.--3. 1. "VC,Virtual Channel ID" rgroup.byte 0x222++0x0 line.byte 0x0 "AKEPLATIR_HL,Acknowledge and Error Report Packet Parameter Latest Info Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." hexmask.byte 0x0 0.--3. 1. "VC,Virtual Channel ID" rgroup.long 0x224++0x3 line.long 0x0 "AKEPACMSR,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000." bitfld.long 0x0 19. "AVC3,Virtual Channel-3 Accumulated Information" "0: No Error Report received from VC-3,1: Received an Acknowledge and Error Report from VC-3" newline bitfld.long 0x0 18. "AVC2,Virtual Channel-2 Accumulated Information" "0: No Error Report received from VC-2,1: Received an Acknowledge and Error Report from VC-2" bitfld.long 0x0 17. "AVC1,Virtual Channel-1 Accumulated Information" "0: No Error Report received from VC-1,1: Received an Acknowledge and Error Report from VC-1" newline bitfld.long 0x0 16. "AVC0,Virtual Channel-0 Accumulated Information" "0: No Error Report received from VC-0,1: Received an Acknowledge and Error Report from VC-0" hexmask.long.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report" rgroup.word 0x224++0x1 line.word 0x0 "AKEPACMSR_L,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report" rgroup.byte 0x224++0x1 line.byte 0x0 "AKEPACMSR_LL,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.byte 0x0 0.--7. 1. "AEREP,Accumulated Error Report" line.byte 0x1 "AKEPACMSR_LH,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.byte 0x1 0.--7. 1. "AEREP,Accumulated Error Report" rgroup.word 0x226++0x1 line.word 0x0 "AKEPACMSR_H,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." bitfld.word 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information" "0: No Error Report received from VC-3,1: Received an Acknowledge and Error Report from VC-3" newline bitfld.word 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information" "0: No Error Report received from VC-2,1: Received an Acknowledge and Error Report from VC-2" bitfld.word 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information" "0: No Error Report received from VC-1,1: Received an Acknowledge and Error Report from VC-1" newline bitfld.word 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information" "0: No Error Report received from VC-0,1: Received an Acknowledge and Error Report from VC-0" rgroup.byte 0x226++0x0 line.byte 0x0 "AKEPACMSR_HL,Acknowledge and Error Report Packet Parameter Accumulate Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information" "0: No Error Report received from VC-3,1: Received an Acknowledge and Error Report from VC-3" newline bitfld.byte 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information" "0: No Error Report received from VC-2,1: Received an Acknowledge and Error Report from VC-2" bitfld.byte 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information" "0: No Error Report received from VC-1,1: Received an Acknowledge and Error Report from VC-1" newline bitfld.byte 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information" "0: No Error Report received from VC-0,1: Received an Acknowledge and Error Report from VC-0" group.long 0x228++0x3 line.long 0x0 "AKEPSCR,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.long 0x0 19. "AVC3,Virtual Channel-3 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC3 bit" newline eventfld.long 0x0 18. "AVC2,Virtual Channel-2 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC2 bit" eventfld.long 0x0 17. "AVC1,Virtual Channel-1 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC1 bit" newline eventfld.long 0x0 16. "AVC0,Virtual Channel-0 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC0 bit" hexmask.long.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report Clear" group.word 0x228++0x1 line.word 0x0 "AKEPSCR_L,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.word 0x0 0.--15. 1. "AEREP,Accumulated Error Report Clear" group.byte 0x228++0x1 line.byte 0x0 "AKEPSCR_LL,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.byte 0x0 0.--7. 1. "AEREP,Accumulated Error Report Clear" line.byte 0x1 "AKEPSCR_LH,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.byte 0x1 0.--7. 1. "AEREP,Accumulated Error Report Clear" group.word 0x22A++0x1 line.word 0x0 "AKEPSCR_H,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.word 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC3 bit" newline eventfld.word 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC2 bit" eventfld.word 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC1 bit" newline eventfld.word 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC0 bit" group.byte 0x22A++0x0 line.byte 0x0 "AKEPSCR_HL,Acknowledge and Error Report Packet Parameter Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.byte 0x0 3. "AVC3,Virtual Channel-3 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC3 bit" newline eventfld.byte 0x0 2. "AVC2,Virtual Channel-2 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC2 bit" eventfld.byte 0x0 1. "AVC1,Virtual Channel-1 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC1 bit" newline eventfld.byte 0x0 0. "AVC0,Virtual Channel-0 Accumulated Information Clear" "0: No operation,1: Clear the AKEPACMSR.AVC0 bit" rgroup.long 0x230++0x3 line.long 0x0 "RXRSSR,Receive Result Saved Status Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000." bitfld.long 0x0 3. "SLT3VLD,Slot-3 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.long 0x0 2. "SLT2VLD,Slot-2 Valid Flag" "0: None received,1: Response packet is received and stored in the.." bitfld.long 0x0 1. "SLT1VLD,Slot-1 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.long 0x0 0. "SLT0VLD,Slot-0 Valid Flag" "0: None received,1: Response packet is received and stored in the.." rgroup.word 0x230++0x1 line.word 0x0 "RXRSSR_L,Receive Result Saved Status Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." bitfld.word 0x0 3. "SLT3VLD,Slot-3 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.word 0x0 2. "SLT2VLD,Slot-2 Valid Flag" "0: None received,1: Response packet is received and stored in the.." bitfld.word 0x0 1. "SLT1VLD,Slot-1 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.word 0x0 0. "SLT0VLD,Slot-0 Valid Flag" "0: None received,1: Response packet is received and stored in the.." rgroup.byte 0x230++0x0 line.byte 0x0 "RXRSSR_LL,Receive Result Saved Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "SLT3VLD,Slot-3 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.byte 0x0 2. "SLT2VLD,Slot-2 Valid Flag" "0: None received,1: Response packet is received and stored in the.." bitfld.byte 0x0 1. "SLT1VLD,Slot-1 Valid Flag" "0: None received,1: Response packet is received and stored in the.." newline bitfld.byte 0x0 0. "SLT0VLD,Slot-0 Valid Flag" "0: None received,1: Response packet is received and stored in the.." rgroup.word 0x232++0x1 line.word 0x0 "RXRSSR_H,Receive Result Saved Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.byte 0x233++0x0 line.byte 0x0 "RXRSSR_HH,Receive Result Saved Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0." "0,1" group.long 0x234++0x3 line.long 0x0 "RXRSSCR,Receive Result Saved Status Clear Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." eventfld.long 0x0 3. "SLT3VLD,Slot-3 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT3VLD flag" newline eventfld.long 0x0 2. "SLT2VLD,Slot-2 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT2VLD flag" eventfld.long 0x0 1. "SLT1VLD,Slot-1 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT1VLD flag" newline eventfld.long 0x0 0. "SLT0VLD,Slot-0 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT0VLD flag" group.word 0x234++0x1 line.word 0x0 "RXRSSCR_L,Receive Result Saved Status Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.word 0x0 3. "SLT3VLD,Slot-3 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT3VLD flag" newline eventfld.word 0x0 2. "SLT2VLD,Slot-2 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT2VLD flag" eventfld.word 0x0 1. "SLT1VLD,Slot-1 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT1VLD flag" newline eventfld.word 0x0 0. "SLT0VLD,Slot-0 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT0VLD flag" rgroup.byte 0x234++0x0 line.byte 0x0 "RXRSSCR_LL,Receive Result Saved Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." eventfld.byte 0x0 3. "SLT3VLD,Slot-3 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT3VLD flag" newline eventfld.byte 0x0 2. "SLT2VLD,Slot-2 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT2VLD flag" eventfld.byte 0x0 1. "SLT1VLD,Slot-1 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT1VLD flag" newline eventfld.byte 0x0 0. "SLT0VLD,Slot-0 Valid Flag Clear" "0: No operation,1: Clear the RXRSSR.SLT0VLD flag" group.word 0x236++0x1 line.word 0x0 "RXRSSCR_H,Receive Result Saved Status Clear Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x237++0x0 line.byte 0x0 "RXRSSCR_HH,Receive Result Saved Status Clear Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rgroup.long 0x238++0x3 line.long 0x0 "RXRINFOOWSR,Receive Result Info Overwrite Status Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000." bitfld.long 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag" "0: No overwritten,1: Slot-3 information overwritten" newline bitfld.long 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag" "0: No overwritten,1: Slot-2 information overwritten" bitfld.long 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag" "0: No overwritten,1: Slot-1 information overwritten" newline bitfld.long 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag" "0: No overwritten,1: Slot-0 information overwritten" rgroup.word 0x238++0x1 line.word 0x0 "RXRINFOOWSR_L,Receive Result Info Overwrite Status Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000." bitfld.word 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag" "0: No overwritten,1: Slot-3 information overwritten" newline bitfld.word 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag" "0: No overwritten,1: Slot-2 information overwritten" bitfld.word 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag" "0: No overwritten,1: Slot-1 information overwritten" newline bitfld.word 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag" "0: No overwritten,1: Slot-0 information overwritten" rgroup.byte 0x238++0x0 line.byte 0x0 "RXRINFOOWSR_LL,Receive Result Info Overwrite Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag" "0: No overwritten,1: Slot-3 information overwritten" newline bitfld.byte 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag" "0: No overwritten,1: Slot-2 information overwritten" bitfld.byte 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag" "0: No overwritten,1: Slot-1 information overwritten" newline bitfld.byte 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag" "0: No overwritten,1: Slot-0 information overwritten" rgroup.word 0x23A++0x1 line.word 0x0 "RXRINFOOWSR_H,Receive Result Info Overwrite Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.byte 0x23B++0x0 line.byte 0x0 "RXRINFOOWSR_HH,Receive Result Info Overwrite Status Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0." "0,1" group.long 0x23C++0x3 line.long 0x0 "RXRINFOOWSCR,Receive Result Info Overwrite Status Clear Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.tbyte 0x0 4.--23. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." eventfld.long 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL3OW flag" newline eventfld.long 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL2OW flag" eventfld.long 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL1OW flag" newline eventfld.long 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL0OW flag" group.word 0x23C++0x1 line.word 0x0 "RXRINFOOWSCR_L,Receive Result Info Overwrite Status Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." eventfld.word 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL3OW flag" newline eventfld.word 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL2OW flag" eventfld.word 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL1OW flag" newline eventfld.word 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL0OW flag" group.byte 0x23C++0x0 line.byte 0x0 "RXRINFOOWSCR_LL,Receive Result Info Overwrite Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.byte 0x0 3. "SL3OW,Slot-3 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL3OW flag" newline eventfld.byte 0x0 2. "SL2OW,Slot-2 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL2OW flag" eventfld.byte 0x0 1. "SL1OW,Slot-1 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL1OW flag" newline eventfld.byte 0x0 0. "SL0OW,Slot-0 Information Overwrite Flag Clear" "0: No operation,1: Clear the RXRINFOOWSR.SL0OW flag" group.word 0x23E++0x1 line.word 0x0 "RXRINFOOWSCR_H,Receive Result Info Overwrite Status Clear Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x23F++0x0 line.byte 0x0 "RXRINFOOWSCR_HH,Receive Result Info Overwrite Status Clear Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x240)++0x3 line.long 0x0 "RXRSS$1R,Receive Result Save Slot-%s Register" bitfld.long 0x0 31. "INFOOW,Information Overwrite" "0: No update,1: This register information (RXRSSxR[30:0]) was.." bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.long 0x0 29. "RXCERR,Receive Correctable Error" "0: No error,1: Correctable error detected" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail" "0: No error,1: Payload data not saved correctly" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail" "0: No error,1: Expected receive not done" bitfld.long 0x0 26. "RXFERR,Fatal Error" "0: No fatal error,1: Fatal timeout occurred during BTA" newline bitfld.long 0x0 25. "RXSUC,Receive Success" "0: No received,1: Response packet or ACK trigger received" bitfld.long 0x0 24. "FMT,Packet Format" "0: Short packet,1: Long packet" newline bitfld.long 0x0 22.--23. "VC,Virtual Channel" "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "DT,Data Type" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.word ($2+0x240)++0x1 line.word 0x0 "RXRSS$1R_L,Receive Result Save Slot-%s Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x240)++0x0 line.byte 0x0 "RXRSS$1R_LL,Receive Result Save Slot-%s Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x241)++0x0 line.byte 0x0 "RXRSS$1R_LH,Receive Result Save Slot-%s Register" hexmask.byte 0x0 0.--7. 1. "DATA1,Data 1" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.word ($2+0x242)++0x1 line.word 0x0 "RXRSS$1R_H,Receive Result Save Slot-%s Register" bitfld.word 0x0 15. "INFOOW,Information Overwrite" "0: No update,1: This register information (RXRSSxR[30:0]) was.." bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.word 0x0 13. "RXCERR,Receive Correctable Error" "0: No error,1: Correctable error detected" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail" "0: No error,1: Payload data not saved correctly" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail" "0: No error,1: Expected receive not done" bitfld.word 0x0 10. "RXFERR,Fatal Error" "0: No fatal error,1: Fatal timeout occurred during BTA" newline bitfld.word 0x0 9. "RXSUC,Receive Success" "0: No received,1: Response packet or ACK trigger received" bitfld.word 0x0 8. "FMT,Packet Format" "0: Short packet,1: Long packet" newline bitfld.word 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.word.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x242)++0x0 line.byte 0x0 "RXRSS$1R_HL,Receive Result Save Slot-%s Register" bitfld.byte 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.byte ($2+0x243)++0x0 line.byte 0x0 "RXRSS$1R_HH,Receive Result Save Slot-%s Register" bitfld.byte 0x0 7. "INFOOW,Information Overwrite" "0: No update,1: This register information (RXRSSxR[30:0]) was.." bitfld.byte 0x0 6. "RXAKE,Receive Acknowledge and Error Report Packet" "0: No received,1: An Acknowledge and Error Report packet received" newline bitfld.byte 0x0 5. "RXCERR,Receive Correctable Error" "0: No error,1: Correctable error detected" bitfld.byte 0x0 4. "RXPFAIL,Receive Packet Data Fail" "0: No error,1: Payload data not saved correctly" newline bitfld.byte 0x0 3. "RXFAIL,Receive Fail" "0: No error,1: Expected receive not done" bitfld.byte 0x0 2. "RXFERR,Fatal Error" "0: No fatal error,1: Fatal timeout occurred during BTA" newline bitfld.byte 0x0 1. "RXSUC,Receive Success" "0: No received,1: Response packet or ACK trigger received" bitfld.byte 0x0 0. "FMT,Packet Format" "0: Short packet,1: Long packet" repeat.end rgroup.long 0x2C0++0x3 line.long 0x0 "RXPPD0R,Receive Packet Payload Data 0 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA3,Payload Data 3" hexmask.long.byte 0x0 16.--23. 1. "DATA2,Payload Data 2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" rgroup.word 0x2C0++0x1 line.word 0x0 "RXPPD0R_L,Receive Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Payload Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" rgroup.byte 0x2C0++0x1 line.byte 0x0 "RXPPD0R_LL,Receive Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Payload Data 0" line.byte 0x1 "RXPPD0R_LH,Receive Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA1,Payload Data 1" rgroup.word 0x2C2++0x1 line.word 0x0 "RXPPD0R_H,Receive Packet Payload Data 0 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA3,Payload Data 3" hexmask.word.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" rgroup.byte 0x2C2++0x1 line.byte 0x0 "RXPPD0R_HL,Receive Packet Payload Data 0 Register" hexmask.byte 0x0 0.--7. 1. "DATA2,Payload Data 2" line.byte 0x1 "RXPPD0R_HH,Receive Packet Payload Data 0 Register" hexmask.byte 0x1 0.--7. 1. "DATA3,Payload Data 3" rgroup.long 0x2C4++0x3 line.long 0x0 "RXPPD1R,Receive Packet Payload Data 1 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA7,Payload Data 3" hexmask.long.byte 0x0 16.--23. 1. "DATA6,Payload Data 2" newline hexmask.long.byte 0x0 8.--15. 1. "DATA5,Payload Data 1" hexmask.long.byte 0x0 0.--7. 1. "DATA4,Payload Data 0" rgroup.word 0x2C4++0x1 line.word 0x0 "RXPPD1R_L,Receive Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA5,Payload Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA4,Payload Data 0" rgroup.byte 0x2C4++0x1 line.byte 0x0 "RXPPD1R_LL,Receive Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA4,Payload Data 0" line.byte 0x1 "RXPPD1R_LH,Receive Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA5,Payload Data 1" rgroup.word 0x2C6++0x1 line.word 0x0 "RXPPD1R_H,Receive Packet Payload Data 1 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA7,Payload Data 3" hexmask.word.byte 0x0 0.--7. 1. "DATA6,Payload Data 2" rgroup.byte 0x2C6++0x1 line.byte 0x0 "RXPPD1R_HL,Receive Packet Payload Data 1 Register" hexmask.byte 0x0 0.--7. 1. "DATA6,Payload Data 2" line.byte 0x1 "RXPPD1R_HH,Receive Packet Payload Data 1 Register" hexmask.byte 0x1 0.--7. 1. "DATA7,Payload Data 3" rgroup.long 0x2C8++0x3 line.long 0x0 "RXPPD2R,Receive Packet Payload Data 2 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA11,Payload Data 11" hexmask.long.byte 0x0 16.--23. 1. "DATA10,Payload Data 10" newline hexmask.long.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.long.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" rgroup.word 0x2C8++0x1 line.word 0x0 "RXPPD2R_L,Receive Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA9,Payload Data 9" hexmask.word.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" rgroup.byte 0x2C8++0x1 line.byte 0x0 "RXPPD2R_LL,Receive Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA8,Payload Data 8" line.byte 0x1 "RXPPD2R_LH,Receive Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA9,Payload Data 9" rgroup.word 0x2CA++0x1 line.word 0x0 "RXPPD2R_H,Receive Packet Payload Data 2 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA11,Payload Data 11" hexmask.word.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" rgroup.byte 0x2CA++0x1 line.byte 0x0 "RXPPD2R_HL,Receive Packet Payload Data 2 Register" hexmask.byte 0x0 0.--7. 1. "DATA10,Payload Data 10" line.byte 0x1 "RXPPD2R_HH,Receive Packet Payload Data 2 Register" hexmask.byte 0x1 0.--7. 1. "DATA11,Payload Data 11" rgroup.long 0x2CC++0x3 line.long 0x0 "RXPPD3R,Receive Packet Payload Data 3 Register" hexmask.long.byte 0x0 24.--31. 1. "DATA15,Payload Data 15" hexmask.long.byte 0x0 16.--23. 1. "DATA14,Payload Data 14" newline hexmask.long.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.long.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" rgroup.word 0x2CC++0x1 line.word 0x0 "RXPPD3R_L,Receive Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA13,Payload Data 13" hexmask.word.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" rgroup.byte 0x2CC++0x1 line.byte 0x0 "RXPPD3R_LL,Receive Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA12,Payload Data 12" line.byte 0x1 "RXPPD3R_LH,Receive Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA13,Payload Data 13" rgroup.word 0x2CE++0x1 line.word 0x0 "RXPPD3R_H,Receive Packet Payload Data 3 Register" hexmask.word.byte 0x0 8.--15. 1. "DATA15,Payload Data 15" hexmask.word.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" rgroup.byte 0x2CE++0x1 line.byte 0x0 "RXPPD3R_HL,Receive Packet Payload Data 3 Register" hexmask.byte 0x0 0.--7. 1. "DATA14,Payload Data 14" line.byte 0x1 "RXPPD3R_HH,Receive Packet Payload Data 3 Register" hexmask.byte 0x1 0.--7. 1. "DATA15,Payload Data 15" group.long 0x2E0++0xB line.long 0x0 "HSTXTOSETR,HS TX Timeout Set Register" hexmask.long 0x0 0.--31. 1. "HTXTO,HS TX Timeout Count" line.long 0x4 "LRXHTOSETR,LRX-H Timeout Set Register" hexmask.long 0x4 0.--31. 1. "LRXHTO,LP-RX Host Processor Timeout" line.long 0x8 "TATOSETR,TA Timeout Set Register" hexmask.long 0x8 0.--31. 1. "TATO,Turnaround Acknowledge Timeout" rgroup.long 0x300++0x3 line.long 0x0 "FERRSR,Fatal Error Status Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "CLP1S,LP1 Contention Error Status" "0: Normal state,1: LP1 Contention Error (ErrContentionLP1) state" newline bitfld.long 0x0 27. "CLP0S,LP0 Contention Error Status" "0: Normal state,1: LP0 Contention Error (ErrContentionLP0) state" hexmask.long.byte 0x0 21.--26. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 20. "CLP1,LP1 Contention Error Interrupt Flag" "0: No error detected,1: LP1 Contention Error (ErrContentionLP1) detected" bitfld.long 0x0 19. "CLP0,LP0 Contention Error Interrupt Flag" "0: No error detected,1: LP0 Contention Error (ErrContentionLP0) detected" newline bitfld.long 0x0 18. "CTRL,Control Error Interrupt Flag" "0: No error detected,1: Control Error (ErrControl) detected" bitfld.long 0x0 17. "SYNCESC,LPDT Sync Error Interrupt Flag" "0: No error detected,1: LPDT Synchronization Error (ErrSyncEsc) detected" newline bitfld.long 0x0 16. "ESCENT,Escape mode Entry Error Interrupt Flag" "0: No error detected,1: Escape mode Entry Error (ErrEsc) detected" hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000." newline bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: No detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: No detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" newline bitfld.long 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag" "0: No detected,1: HS TX Timeout (HTX_TO) detected" rgroup.word 0x300++0x1 line.word 0x0 "FERRSR_L,Fatal Error Status Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: No detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: No detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.word 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag" "0: No detected,1: HS TX Timeout (HTX_TO) detected" rgroup.byte 0x300++0x0 line.byte 0x0 "FERRSR_LL,Fatal Error Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag" "0: No detected,1: Turnaround Acknowledge Timeout (TA_TO) detected" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag" "0: No detected,1: LP-RX Host Processor Timeout (LRX-H_TO) detected" bitfld.byte 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag" "0: No detected,1: HS TX Timeout (HTX_TO) detected" rgroup.word 0x302++0x1 line.word 0x0 "FERRSR_H,Fatal Error Status Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "CLP1S,LP1 Contention Error Status" "0: Normal state,1: LP1 Contention Error (ErrContentionLP1) state" newline bitfld.word 0x0 11. "CLP0S,LP0 Contention Error Status" "0: Normal state,1: LP0 Contention Error (ErrContentionLP0) state" hexmask.word.byte 0x0 5.--10. 1. "Reserved,These bits are read as 000000." newline bitfld.word 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag" "0: No error detected,1: LP1 Contention Error (ErrContentionLP1) detected" bitfld.word 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag" "0: No error detected,1: LP0 Contention Error (ErrContentionLP0) detected" newline bitfld.word 0x0 2. "CTRL,Control Error Interrupt Flag" "0: No error detected,1: Control Error (ErrControl) detected" bitfld.word 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag" "0: No error detected,1: LPDT Synchronization Error (ErrSyncEsc) detected" newline bitfld.word 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag" "0: No error detected,1: Escape mode Entry Error (ErrEsc) detected" rgroup.byte 0x302++0x1 line.byte 0x0 "FERRSR_HL,Fatal Error Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag" "0: No error detected,1: LP1 Contention Error (ErrContentionLP1) detected" newline bitfld.byte 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag" "0: No error detected,1: LP0 Contention Error (ErrContentionLP0) detected" bitfld.byte 0x0 2. "CTRL,Control Error Interrupt Flag" "0: No error detected,1: Control Error (ErrControl) detected" newline bitfld.byte 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag" "0: No error detected,1: LPDT Synchronization Error (ErrSyncEsc) detected" bitfld.byte 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag" "0: No error detected,1: Escape mode Entry Error (ErrEsc) detected" line.byte 0x1 "FERRSR_HH,Fatal Error Status Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "CLP1S,LP1 Contention Error Status" "0: Normal state,1: LP1 Contention Error (ErrContentionLP1) state" newline bitfld.byte 0x1 3. "CLP0S,LP0 Contention Error Status" "0: Normal state,1: LP0 Contention Error (ErrContentionLP0) state" bitfld.byte 0x1 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" group.long 0x304++0x3 line.long 0x0 "FERRSCR,Fatal Error Status Clear Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." eventfld.long 0x0 20. "CLP1,LP1 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP1 flag" newline eventfld.long 0x0 19. "CLP0,LP0 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP0 flag" eventfld.long 0x0 18. "CTRL,Control Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CTRL flag" newline eventfld.long 0x0 17. "SYNCESC,LPDT Sync Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.SYNCESC flag" eventfld.long 0x0 16. "ESCENT,Escape mode Entry Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.ESCENT flag" newline hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." eventfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.TATO flag" newline eventfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.LRXHTO flag" eventfld.long 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.HTXTO flag" group.word 0x304++0x1 line.word 0x0 "FERRSCR_L,Fatal Error Status Clear Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." eventfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.TATO flag" newline eventfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.LRXHTO flag" eventfld.word 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.HTXTO flag" group.byte 0x304++0x0 line.byte 0x0 "FERRSCR_LL,Fatal Error Status Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." eventfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.TATO flag" newline eventfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.LRXHTO flag" eventfld.byte 0x0 0. "HTXTO,HS TX Timeout Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.HTXTO flag" group.word 0x306++0x1 line.word 0x0 "FERRSCR_H,Fatal Error Status Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." eventfld.word 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP1 flag" newline eventfld.word 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP0 flag" eventfld.word 0x0 2. "CTRL,Control Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CTRL flag" newline eventfld.word 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.SYNCESC flag" eventfld.word 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.ESCENT flag" group.byte 0x306++0x0 line.byte 0x0 "FERRSCR_HL,Fatal Error Status Clear Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.byte 0x0 4. "CLP1,LP1 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP1 flag" newline eventfld.byte 0x0 3. "CLP0,LP0 Contention Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CLP0 flag" eventfld.byte 0x0 2. "CTRL,Control Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.CTRL flag" newline eventfld.byte 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.SYNCESC flag" eventfld.byte 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Flag Clear" "0: No operation,1: Clear the FERRSR.ESCENT flag" group.long 0x308++0x3 line.long 0x0 "FERRIER,Fatal Error Interrupt Enable Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "CLP1,LP1 Contention Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 19. "CLP0,LP0 Contention Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 18. "CTRL,Control Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17. "SYNCESC,LPDT Sync Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 16. "ESCENT,Escape mode Entry Error Interrupt Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "HTXTO,HS TX Timeout Interrupt Enable" "0: Disable,1: Enable" group.word 0x308++0x1 line.word 0x0 "FERRIER_L,Fatal Error Interrupt Enable Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "HTXTO,HS TX Timeout Interrupt Enable" "0: Disable,1: Enable" group.byte 0x308++0x0 line.byte 0x0 "FERRIER_LL,Fatal Error Interrupt Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TATO,Turnaround Acknowledge Timeout Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "LRXHTO,LP-RX Host Processor Timeout Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "HTXTO,HS TX Timeout Interrupt Enable" "0: Disable,1: Enable" group.word 0x30A++0x1 line.word 0x0 "FERRIER_H,Fatal Error Interrupt Enable Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "CLP1,LP1 Contention Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 3. "CLP0,LP0 Contention Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 2. "CTRL,Control Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Enable" "0: Disable,1: Enable" group.byte 0x30A++0x0 line.byte 0x0 "FERRIER_HL,Fatal Error Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "CLP1,LP1 Contention Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 3. "CLP0,LP0 Contention Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 2. "CTRL,Control Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "SYNCESC,LPDT Sync Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 0. "ESCENT,Escape mode Entry Error Interrupt Enable" "0: Disable,1: Enable" group.long 0x314++0x3 line.long 0x0 "CLSTPTSETR,Clock Lane Stop Time Set Register" hexmask.long.byte 0x0 24.--31. 1. "CLKKPT,Clock Keep Time" hexmask.long.byte 0x0 16.--23. 1. "CLKBFHT,Clock Beforehand Time" newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x0 2.--11. 1. "CLKSTPT,Clock Stop Time" newline bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.word 0x314++0x1 line.word 0x0 "CLSTPTSETR_L,Clock Lane Stop Time Set Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word 0x0 2.--11. 1. "CLKSTPT,Clock Stop Time" newline bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.byte 0x314++0x1 line.byte 0x0 "CLSTPTSETR_LL,Clock Lane Stop Time Set Register" hexmask.byte 0x0 2.--7. 1. "CLKSTPT,Clock Stop Time" bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x1 "CLSTPTSETR_LH,Clock Lane Stop Time Set Register" hexmask.byte 0x1 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x1 0.--3. 1. "CLKSTPT,Clock Stop Time" group.word 0x316++0x1 line.word 0x0 "CLSTPTSETR_H,Clock Lane Stop Time Set Register" hexmask.word.byte 0x0 8.--15. 1. "CLKKPT,Clock Keep Time" hexmask.word.byte 0x0 0.--7. 1. "CLKBFHT,Clock Beforehand Time" group.byte 0x316++0x1 line.byte 0x0 "CLSTPTSETR_HL,Clock Lane Stop Time Set Register" hexmask.byte 0x0 0.--7. 1. "CLKBFHT,Clock Beforehand Time" line.byte 0x1 "CLSTPTSETR_HH,Clock Lane Stop Time Set Register" hexmask.byte 0x1 0.--7. 1. "CLKKPT,Clock Keep Time" group.long 0x318++0x3 line.long 0x0 "LPTRNSTSETR,LP Transition Time Set Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x0 0.--9. 1. "GOLPBKT,Go LP and Back Time" group.word 0x318++0x1 line.word 0x0 "LPTRNSTSETR_L,LP Transition Time Set Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x0 0.--9. 1. "GOLPBKT,Go LP and Back Time" group.byte 0x318++0x1 line.byte 0x0 "LPTRNSTSETR_LL,LP Transition Time Set Register" hexmask.byte 0x0 0.--7. 1. "GOLPBKT,Go LP and Back Time" line.byte 0x1 "LPTRNSTSETR_LH,LP Transition Time Set Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "GOLPBKT,Go LP and Back Time" "0,1,2,3" rgroup.long 0x320++0x3 line.long 0x0 "PLSR,Physical Lane Status Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 29. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 28. "DLULPENT,Data Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" bitfld.long 0x0 27. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 26. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.long 0x0 25. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 24. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" hexmask.long.byte 0x0 16.--23. 1. "Reserved,These bits are read as 00000000." newline bitfld.long 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: Transmitter,1: Receiver" bitfld.long 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.long 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.long 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 11." "0,1,2,3" newline bitfld.long 0x0 5. "DL1UAN,Data Lane-1 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" bitfld.long 0x0 4. "DL0UAN,Data Lane-0 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" newline bitfld.long 0x0 3. "DL0RUE,Data Lane-0 RxUlpsEsc Status" "0: Not in Escape Ultra-Low Power (Receive) mode,1: In Escape Ultra-Low Power (Receive) mode" bitfld.long 0x0 2. "DL0RLE,Data Lane-0 RxLpdtEsc Status" "0: Not in Escape Low-Power Data Receive mode,1: In Escape Low-Power Data Receive mode" newline bitfld.long 0x0 1. "CLSTP,Clock Lane Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.long 0x0 0. "CLUAN,Clock Lane UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" rgroup.word 0x320++0x1 line.word 0x0 "PLSR_L,Physical Lane Status Register" bitfld.word 0x0 15. "DL0DIR,Data Lane-0 Direction" "0: Transmitter,1: Receiver" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.word 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 9. "DL1STP,Data Lane-1 Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.word 0x0 8. "DL0STP,Data Lane-0 Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 11." "0,1,2,3" newline bitfld.word 0x0 5. "DL1UAN,Data Lane-1 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" bitfld.word 0x0 4. "DL0UAN,Data Lane-0 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" newline bitfld.word 0x0 3. "DL0RUE,Data Lane-0 RxUlpsEsc Status" "0: Not in Escape Ultra-Low Power (Receive) mode,1: In Escape Ultra-Low Power (Receive) mode" bitfld.word 0x0 2. "DL0RLE,Data Lane-0 RxLpdtEsc Status" "0: Not in Escape Low-Power Data Receive mode,1: In Escape Low-Power Data Receive mode" newline bitfld.word 0x0 1. "CLSTP,Clock Lane Stop Status" "0: Not in Stop state,1: In Stop state" bitfld.word 0x0 0. "CLUAN,Clock Lane UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" rgroup.byte 0x320++0x1 line.byte 0x0 "PLSR_LL,Physical Lane Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11." "0,1,2,3" bitfld.byte 0x0 5. "DL1UAN,Data Lane-1 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" newline bitfld.byte 0x0 4. "DL0UAN,Data Lane-0 UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" bitfld.byte 0x0 3. "DL0RUE,Data Lane-0 RxUlpsEsc Status" "0: Not in Escape Ultra-Low Power (Receive) mode,1: In Escape Ultra-Low Power (Receive) mode" newline bitfld.byte 0x0 2. "DL0RLE,Data Lane-0 RxLpdtEsc Status" "0: Not in Escape Low-Power Data Receive mode,1: In Escape Low-Power Data Receive mode" bitfld.byte 0x0 1. "CLSTP,Clock Lane Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.byte 0x0 0. "CLUAN,Clock Lane UlpsActiveNot Status" "0: In ULP state,1: Not in ULP state" line.byte 0x1 "PLSR_LH,Physical Lane Status Register" bitfld.byte 0x1 7. "DL0DIR,Data Lane-0 Direction" "0: Transmitter,1: Receiver" bitfld.byte 0x1 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 5. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.byte 0x1 4. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 1. "DL1STP,Data Lane-1 Stop Status" "0: Not in Stop state,1: In Stop state" newline bitfld.byte 0x1 0. "DL0STP,Data Lane-0 Stop Status" "0: Not in Stop state,1: In Stop state" rgroup.word 0x322++0x1 line.word 0x0 "PLSR_H,Physical Lane Status Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 13. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 12. "DLULPENT,Data Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" bitfld.word 0x0 11. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 10. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.word 0x0 9. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.word 0x0 8. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.byte 0x323++0x0 line.byte 0x0 "PLSR_HH,Physical Lane Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 5. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x0 4. "DLULPENT,Data Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" bitfld.byte 0x0 3. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x0 2. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag" "0: Not detected,1: Detected" bitfld.byte 0x0 1. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag" "0: Not detected,1: Detected" newline bitfld.byte 0x0 0. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag" "0: Not detected,1: Detected" group.long 0x324++0x3 line.long 0x0 "PLSCR,Physical Lane Status Clear Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 29. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPEXT flag" newline eventfld.long 0x0 28. "DLULPENT,Data Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPENT flag" eventfld.long 0x0 27. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLHS2LP flag" newline eventfld.long 0x0 26. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLLP2HS flag" eventfld.long 0x0 25. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPEXT flag" newline eventfld.long 0x0 24. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPENT flag" hexmask.long.word 0x0 14.--23. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline eventfld.long 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0TX2RX flag" eventfld.long 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0RX2TX flag" newline hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.word 0x324++0x1 line.word 0x0 "PLSCR_L,Physical Lane Status Clear Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0TX2RX flag" newline eventfld.word 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0RX2TX flag" hexmask.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.byte 0x325++0x0 line.byte 0x0 "PLSCR_LH,Physical Lane Status Clear Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 5. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0TX2RX flag" newline eventfld.byte 0x0 4. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DL0RX2TX flag" hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x326++0x1 line.word 0x0 "PLSCR_H,Physical Lane Status Clear Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 13. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPEXT flag" newline eventfld.word 0x0 12. "DLULPENT,Data Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPENT flag" eventfld.word 0x0 11. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLHS2LP flag" newline eventfld.word 0x0 10. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLLP2HS flag" eventfld.word 0x0 9. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPEXT flag" newline eventfld.word 0x0 8. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPENT flag" hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x327++0x0 line.byte 0x0 "PLSCR_HH,Physical Lane Status Clear Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 5. "DLULPEXT,Data Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPEXT flag" newline eventfld.byte 0x0 4. "DLULPENT,Data Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.DLULPENT flag" eventfld.byte 0x0 3. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLHS2LP flag" newline eventfld.byte 0x0 2. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLLP2HS flag" eventfld.byte 0x0 1. "CLULPEXT,Clock Lane ULPS Exit Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPEXT flag" newline eventfld.byte 0x0 0. "CLULPENT,Clock Lane ULPS Enter Interrupt Flag Clear" "0: No operation,1: Clear the PLSR.CLULPENT flag" group.long 0x328++0x3 line.long 0x0 "PLIER,Physical Lane Interrupt Enable Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "DLULPEXT,Data Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 28. "DLULPENT,Data Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 27. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 26. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 25. "CLULPEXT,Clock Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 24. "CLULPENT,Clock Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" hexmask.long.word 0x0 14.--23. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Enable" "0: Disable,1: Enable" newline hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.word 0x328++0x1 line.word 0x0 "PLIER_L,Physical Lane Interrupt Enable Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 12. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Enable" "0: Disable,1: Enable" hexmask.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.byte 0x329++0x0 line.byte 0x0 "PLIER_LH,Physical Lane Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DL0TX2RX,Data Lane-0 TX to RX Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 4. "DL0RX2TX,Data Lane-0 RX to TX Transition Interrupt Enable" "0: Disable,1: Enable" hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x32A++0x1 line.word 0x0 "PLIER_H,Physical Lane Interrupt Enable Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "DLULPEXT,Data Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 12. "DLULPENT,Data Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 11. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 10. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 9. "CLULPEXT,Clock Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 8. "CLULPENT,Clock Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x32B++0x0 line.byte 0x0 "PLIER_HH,Physical Lane Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DLULPEXT,Data Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 4. "DLULPENT,Data Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 3. "CLHS2LP,Clock Lane HS to LP Transition Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 2. "CLLP2HS,Clock Lane LP to HS Transition Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 1. "CLULPEXT,Clock Lane ULPS Exit Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 0. "CLULPENT,Clock Lane ULPS Enter Interrupt Enable" "0: Disable,1: Enable" group.long 0x400++0x3 line.long 0x0 "VMSET0R,Video Mode Set 0 Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,These bits are read as 000000000000000000. The write value should be 000000000000000000." bitfld.long 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 10. "HFPNOLP,HFP period No LP" "0: Not suppressing the transition to LP during HFP..,1: Suppress the transition to LP during HFP period.." bitfld.long 0x0 9. "HBPNOLP,HBP period No LP" "?,1: Suppress the transition to LP during HBP period.." newline bitfld.long 0x0 8. "HSANOLP,HSA period No LP" "0: Not suppressing the transition to LP during HSA..,1: Suppress the transition to LP during HSA period.." hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "VSTOP,Video Mode Operation Stop" "0: No operation,1: Stop Video mode operation" newline bitfld.long 0x0 0. "VSTART,Video Mode Operation Start" "0: No operation,1: Start Video mode operation" group.word 0x400++0x1 line.word 0x0 "VMSET0R_L,Video Mode Set 0 Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "HFPNOLP,HFP period No LP" "0: Not suppressing the transition to LP during HFP..,1: Suppress the transition to LP during HFP period.." bitfld.word 0x0 9. "HBPNOLP,HBP period No LP" "?,1: Suppress the transition to LP during HBP period.." newline bitfld.word 0x0 8. "HSANOLP,HSA period No LP" "0: Not suppressing the transition to LP during HSA..,1: Suppress the transition to LP during HSA period.." hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "VSTOP,Video Mode Operation Stop" "0: No operation,1: Stop Video mode operation" newline bitfld.word 0x0 0. "VSTART,Video Mode Operation Start" "0: No operation,1: Start Video mode operation" group.byte 0x400++0x1 line.byte 0x0 "VMSET0R_LL,Video Mode Set 0 Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "VSTOP,Video Mode Operation Stop" "0: No operation,1: Stop Video mode operation" bitfld.byte 0x0 0. "VSTART,Video Mode Operation Start" "0: No operation,1: Start Video mode operation" line.byte 0x1 "VMSET0R_LH,Video Mode Set 0 Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "HFPNOLP,HFP period No LP" "0: Not suppressing the transition to LP during HFP..,1: Suppress the transition to LP during HFP period.." bitfld.byte 0x1 1. "HBPNOLP,HBP period No LP" "?,1: Suppress the transition to LP during HBP period.." newline bitfld.byte 0x1 0. "HSANOLP,HSA period No LP" "0: Not suppressing the transition to LP during HSA..,1: Suppress the transition to LP during HSA period.." group.word 0x404++0x1 line.word 0x0 "VMSET1R_L,Video Mode Set 1 Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word 0x0 2.--13. 1. "DLY,Delay Value" newline bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rgroup.word 0x406++0x1 line.word 0x0 "VMSET1R_H,Video Mode Set 1 Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 010000." hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0101." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 0.--1. "Reserved,These bits are read as 11." "0,1,2,3" rgroup.long 0x410++0x3 line.long 0x0 "VMSR,Video Mode Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 28. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 24.--25. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 23. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag" "0: Data overflow is not occurred,1: Data overflow is occurred in the video buffer" newline bitfld.long 0x0 22. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag" "0: Data underflow is not occurred,1: Data underflow is occurred in the video buffer" bitfld.long 0x0 21. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 20. "TIMERR,Timing Error Interrupt Flag" "0: Timing error is not occurred,1: Timing error is occurred during the video mode.." hexmask.long.byte 0x0 15.--19. 1. "Reserved,These bits are read as 00000." newline bitfld.long 0x0 14. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag" "0: Video mode operation is not ready,1: Video mode operation is ready" bitfld.long 0x0 2. "RUNNING,Video Mode Operation Running Status" "0: Video mode operation is stopped,1: Video mode operation is running" newline bitfld.long 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag" "0: Video mode operation has not stopped,1: Video mode operation has stopped" bitfld.long 0x0 0. "START,Video Mode Operation Start Interrupt Flag" "0: Video mode operation has not started,1: Video mode operation has started" rgroup.word 0x410++0x1 line.word 0x0 "VMSR_L,Video Mode Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline hexmask.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000." bitfld.word 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag" "0: Video mode operation is not ready,1: Video mode operation is ready" newline bitfld.word 0x0 2. "RUNNING,Video Mode Operation Running Status" "0: Video mode operation is stopped,1: Video mode operation is running" bitfld.word 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag" "0: Video mode operation has not stopped,1: Video mode operation has stopped" newline bitfld.word 0x0 0. "START,Video Mode Operation Start Interrupt Flag" "0: Video mode operation has not started,1: Video mode operation has started" rgroup.byte 0x410++0x1 line.byte 0x0 "VMSR_LL,Video Mode Status Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag" "0: Video mode operation is not ready,1: Video mode operation is ready" newline bitfld.byte 0x0 2. "RUNNING,Video Mode Operation Running Status" "0: Video mode operation is stopped,1: Video mode operation is running" bitfld.byte 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag" "0: Video mode operation has not stopped,1: Video mode operation has stopped" newline bitfld.byte 0x0 0. "START,Video Mode Operation Start Interrupt Flag" "0: Video mode operation has not started,1: Video mode operation has started" line.byte 0x1 "VMSR_LH,Video Mode Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000." rgroup.word 0x412++0x1 line.word 0x0 "VMSR_H,Video Mode Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 8.--9. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag" "0: Data overflow is not occurred,1: Data overflow is occurred in the video buffer" newline bitfld.word 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag" "0: Data underflow is not occurred,1: Data underflow is occurred in the video buffer" bitfld.word 0x0 5. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 4. "TIMERR,Timing Error Interrupt Flag" "0: Timing error is not occurred,1: Timing error is occurred during the video mode.." hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." rgroup.byte 0x412++0x1 line.byte 0x0 "VMSR_HL,Video Mode Status Register" bitfld.byte 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag" "0: Data overflow is not occurred,1: Data overflow is occurred in the video buffer" bitfld.byte 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag" "0: Data underflow is not occurred,1: Data underflow is occurred in the video buffer" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 4. "TIMERR,Timing Error Interrupt Flag" "0: Timing error is not occurred,1: Timing error is occurred during the video mode.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.byte 0x1 "VMSR_HH,Video Mode Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" group.long 0x414++0x3 line.long 0x0 "VMSCR,Video Mode Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 24.--25. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 23. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFOVF flag" newline eventfld.long 0x0 22. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFUDF flag" bitfld.long 0x0 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline eventfld.long 0x0 20. "TIMERR,Timing Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.TIMERR flag" hexmask.long.byte 0x0 15.--19. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline eventfld.long 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VIRDY flag" bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline eventfld.long 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.STOP flag" eventfld.long 0x0 0. "START,Video Mode Operation Start Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.START flag" group.word 0x414++0x1 line.word 0x0 "VMSCR_L,Video Mode Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." eventfld.word 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VIRDY flag" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.STOP flag" newline eventfld.word 0x0 0. "START,Video Mode Operation Start Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.START flag" group.byte 0x414++0x1 line.byte 0x0 "VMSCR_LL,Video Mode Status Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.byte 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VIRDY flag" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x0 1. "STOP,Video Mode Operation Stop Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.STOP flag" newline eventfld.byte 0x0 0. "START,Video Mode Operation Start Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.START flag" line.byte 0x1 "VMSCR_LH,Video Mode Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x416++0x1 line.word 0x0 "VMSCR_H,Video Mode Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFOVF flag" newline eventfld.word 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFUDF flag" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline eventfld.word 0x0 4. "TIMERR,Timing Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.TIMERR flag" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x416++0x1 line.byte 0x0 "VMSCR_HL,Video Mode Status Clear Register" eventfld.byte 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFOVF flag" eventfld.byte 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.VBUFUDF flag" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x0 4. "TIMERR,Timing Error Interrupt Flag Clear" "0: No operation,1: Clear the VMSR.TIMERR flag" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "VMSCR_HH,Video Mode Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x418++0x3 line.long 0x0 "VMIER,Video Mode Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 24.--25. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 23. "VBUFOVF,Video Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 22. "VBUFUDF,Video Buffer Underflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20. "TIMERR,Timing Error Interrupt Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 15.--19. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "STOP,Video Mode Operation Stop Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 0. "START,Video Mode Operation Start Interrupt Enable" "0: Disable,1: Enable" group.word 0x418++0x1 line.word 0x0 "VMIER_L,Video Mode Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x0 4.--13. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.word 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "STOP,Video Mode Operation Stop Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 0. "START,Video Mode Operation Start Interrupt Enable" "0: Disable,1: Enable" group.byte 0x418++0x1 line.byte 0x0 "VMIER_LL,Video Mode Interrupt Enable Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "VIRDY,Video Mode Operation Ready Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "STOP,Video Mode Operation Stop Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 0. "START,Video Mode Operation Start Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "VMIER_LH,Video Mode Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x41A++0x1 line.word 0x0 "VMIER_H,Video Mode Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "TIMERR,Timing Error Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x41A++0x1 line.byte 0x0 "VMIER_HL,Video Mode Interrupt Enable Register" bitfld.byte 0x0 7. "VBUFOVF,Video Buffer Overflow Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x0 6. "VBUFUDF,Video Buffer Underflow Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "TIMERR,Timing Error Interrupt Enable" "0: Disable,1: Enable" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "VMIER_HH,Video Mode Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x420++0x3 line.long 0x0 "VMPPSETR,Video Mode Pixel Packet Set Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "VC,Video Mode Virtual Channel" "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "DT,Video Mode Data Type" bitfld.long 0x0 15. "TXESYNC,Transmit End of Sync Pulse" "0: HSE and VSE are not transmitted,1: HSE and VSE are transmitted" newline hexmask.long.word 0x0 4.--14. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x420++0x1 line.word 0x0 "VMPPSETR_L,Video Mode Pixel Packet Set Register" bitfld.word 0x0 15. "TXESYNC,Transmit End of Sync Pulse" "0: HSE and VSE are not transmitted,1: HSE and VSE are transmitted" hexmask.word 0x0 4.--14. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x420++0x1 line.byte 0x0 "VMPPSETR_LL,Video Mode Pixel Packet Set Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "VMPPSETR_LH,Video Mode Pixel Packet Set Register" bitfld.byte 0x1 7. "TXESYNC,Transmit End of Sync Pulse" "0: HSE and VSE are not transmitted,1: HSE and VSE are transmitted" hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.word 0x422++0x1 line.word 0x0 "VMPPSETR_H,Video Mode Pixel Packet Set Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "VC,Video Mode Virtual Channel" "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "DT,Video Mode Data Type" group.byte 0x422++0x0 line.byte 0x0 "VMPPSETR_HL,Video Mode Pixel Packet Set Register" bitfld.byte 0x0 6.--7. "VC,Video Mode Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Video Mode Data Type" group.long 0x428++0x3 line.long 0x0 "VMVSSETR,Video Mode Vertical Size Set Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 16.--30. 1. "VACT,Vertical Active Lines" newline bitfld.long 0x0 15. "VSPOL,VSYNC Polarity" "0: High Active,1: Low Active" bitfld.long 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--11. 1. "VSA,VSA Lines" group.word 0x428++0x1 line.word 0x0 "VMVSSETR_L,Video Mode Vertical Size Set Register" bitfld.word 0x0 15. "VSPOL,VSYNC Polarity" "0: High Active,1: Low Active" bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word 0x0 0.--11. 1. "VSA,VSA Lines" group.byte 0x428++0x1 line.byte 0x0 "VMVSSETR_LL,Video Mode Vertical Size Set Register" hexmask.byte 0x0 0.--7. 1. "VSA,VSA Lines" line.byte 0x1 "VMVSSETR_LH,Video Mode Vertical Size Set Register" bitfld.byte 0x1 7. "VSPOL,VSYNC Polarity" "0: High Active,1: Low Active" bitfld.byte 0x1 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.byte 0x1 0.--3. 1. "VSA,VSA Lines" group.word 0x42A++0x1 line.word 0x0 "VMVSSETR_H,Video Mode Vertical Size Set Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word 0x0 0.--14. 1. "VACT,Vertical Active Lines" group.byte 0x42A++0x1 line.byte 0x0 "VMVSSETR_HL,Video Mode Vertical Size Set Register" hexmask.byte 0x0 0.--7. 1. "VACT,Vertical Active Lines" line.byte 0x1 "VMVSSETR_HH,Video Mode Vertical Size Set Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 0.--6. 1. "VACT,Vertical Active Lines" group.long 0x42C++0x3 line.long 0x0 "VMVPSETR,Video Mode Vertical Porch Set Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 16.--28. 1. "VFP,VFP Lines" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 0.--12. 1. "VBP,VBP Lines" group.word 0x42C++0x1 line.word 0x0 "VMVPSETR_L,Video Mode Vertical Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "VBP,VBP Lines" group.byte 0x42C++0x1 line.byte 0x0 "VMVPSETR_LL,Video Mode Vertical Porch Set Register" hexmask.byte 0x0 0.--7. 1. "VBP,VBP Lines" line.byte 0x1 "VMVPSETR_LH,Video Mode Vertical Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "VBP,VBP Lines" group.word 0x42E++0x1 line.word 0x0 "VMVPSETR_H,Video Mode Vertical Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "VFP,VFP Lines" group.byte 0x42E++0x1 line.byte 0x0 "VMVPSETR_HL,Video Mode Vertical Porch Set Register" hexmask.byte 0x0 0.--7. 1. "VFP,VFP Lines" line.byte 0x1 "VMVPSETR_HH,Video Mode Vertical Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "VFP,VFP Lines" group.long 0x430++0x3 line.long 0x0 "VMHSSETR,Video Mode Horizontal Size Set Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.word 0x0 16.--30. 1. "HACT,HACT Pixels" newline bitfld.long 0x0 15. "HSPOL,HSYNC Polarity" "0: High Active,1: Low Active" bitfld.long 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x0 0.--11. 1. "HSA,HSA Pixels" group.word 0x430++0x1 line.word 0x0 "VMHSSETR_L,Video Mode Horizontal Size Set Register" bitfld.word 0x0 15. "HSPOL,HSYNC Polarity" "0: High Active,1: Low Active" bitfld.word 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word 0x0 0.--11. 1. "HSA,HSA Pixels" group.byte 0x430++0x1 line.byte 0x0 "VMHSSETR_LL,Video Mode Horizontal Size Set Register" hexmask.byte 0x0 0.--7. 1. "HSA,HSA Pixels" line.byte 0x1 "VMHSSETR_LH,Video Mode Horizontal Size Set Register" bitfld.byte 0x1 7. "HSPOL,HSYNC Polarity" "0: High Active,1: Low Active" bitfld.byte 0x1 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.byte 0x1 0.--3. 1. "HSA,HSA Pixels" group.word 0x432++0x1 line.word 0x0 "VMHSSETR_H,Video Mode Horizontal Size Set Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word 0x0 0.--14. 1. "HACT,HACT Pixels" group.byte 0x432++0x1 line.byte 0x0 "VMHSSETR_HL,Video Mode Horizontal Size Set Register" hexmask.byte 0x0 0.--7. 1. "HACT,HACT Pixels" line.byte 0x1 "VMHSSETR_HH,Video Mode Horizontal Size Set Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 0.--6. 1. "HACT,HACT Pixels" group.long 0x434++0x3 line.long 0x0 "VMHPSETR,Video Mode Horizontal Porch Set Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 16.--28. 1. "HFP,HFP Pixels" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.word 0x0 0.--12. 1. "HBP,HBP Pixels" group.word 0x434++0x1 line.word 0x0 "VMHPSETR_L,Video Mode Horizontal Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "HBP,HBP Pixels" group.byte 0x434++0x1 line.byte 0x0 "VMHPSETR_LL,Video Mode Horizontal Porch Set Register" hexmask.byte 0x0 0.--7. 1. "HBP,HBP Pixels" line.byte 0x1 "VMHPSETR_LH,Video Mode Horizontal Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "HBP,HBP Pixels" group.word 0x436++0x1 line.word 0x0 "VMHPSETR_H,Video Mode Horizontal Porch Set Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "HFP,HFP Pixels" group.byte 0x436++0x1 line.byte 0x0 "VMHPSETR_HL,Video Mode Horizontal Porch Set Register" hexmask.byte 0x0 0.--7. 1. "HFP,HFP Pixels" line.byte 0x1 "VMHPSETR_HH,Video Mode Horizontal Porch Set Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "HFP,HFP Pixels" group.long 0x5C0++0x3 line.long 0x0 "SQCH0SET0R,Sequence Channel 0 Set 0 Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.word 0x0 9.--22. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.word 0x5C0++0x1 line.word 0x0 "SQCH0SET0R_L,Sequence Channel 0 Set 0 Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.byte 0x5C0++0x1 line.byte 0x0 "SQCH0SET0R_LL,Sequence Channel 0 Set 0 Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" line.byte 0x1 "SQCH0SET0R_LH,Sequence Channel 0 Set 0 Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x5C2++0x1 line.word 0x0 "SQCH0SET0R_H,Sequence Channel 0 Set 0 Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.word.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x5C2++0x0 line.byte 0x0 "SQCH0SET0R_HL,Sequence Channel 0 Set 0 Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." wgroup.byte 0x5C3++0x0 line.byte 0x0 "SQCH0SET0R_HH,Sequence Channel 0 Set 0 Register" bitfld.byte 0x0 7. "Reserved,The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,The write value should be 0000000." rgroup.long 0x5D0++0x3 line.long 0x0 "SQCH0SR,Sequence Channel 0 Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.long 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.word 0x5D0++0x1 line.word 0x0 "SQCH0SR_L,Sequence Channel 0 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.word 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.byte 0x5D0++0x1 line.byte 0x0 "SQCH0SR_LL,Sequence Channel 0 Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" line.byte 0x1 "SQCH0SR_LH,Sequence Channel 0 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" rgroup.word 0x5D2++0x1 line.word 0x0 "SQCH0SR_H,Sequence Channel 0 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" rgroup.byte 0x5D2++0x1 line.byte 0x0 "SQCH0SR_HL,Sequence Channel 0 Status Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" line.byte 0x1 "SQCH0SR_HH,Sequence Channel 0 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" group.long 0x5D4++0x3 line.long 0x0 "SQCH0SCR,Sequence Channel 0 Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x5D4++0x1 line.word 0x0 "SQCH0SCR_L,Sequence Channel 0 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x5D4++0x1 line.byte 0x0 "SQCH0SCR_LL,Sequence Channel 0 Status Clear Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH0SCR_LH,Sequence Channel 0 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" group.word 0x5D6++0x1 line.word 0x0 "SQCH0SCR_H,Sequence Channel 0 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" group.byte 0x5D6++0x1 line.byte 0x0 "SQCH0SCR_HL,Sequence Channel 0 Status Clear Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" line.byte 0x1 "SQCH0SCR_HH,Sequence Channel 0 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" group.long 0x5D8++0x3 line.long 0x0 "SQCH0IER,Sequence Channel 0 Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x5D8++0x1 line.word 0x0 "SQCH0IER_L,Sequence Channel 0 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x5D8++0x1 line.byte 0x0 "SQCH0IER_LL,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH0IER_LH,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" group.word 0x5DA++0x1 line.word 0x0 "SQCH0IER_H,Sequence Channel 0 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" group.byte 0x5DA++0x1 line.byte 0x0 "SQCH0IER_HL,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "SQCH0IER_HH,Sequence Channel 0 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" group.long 0x600++0x3 line.long 0x0 "SQCH1SET0R,Sequence Channel 1 Set 0 Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.word 0x0 9.--22. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.word 0x600++0x1 line.word 0x0 "SQCH1SET0R_L,Sequence Channel 1 Set 0 Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" group.byte 0x600++0x1 line.byte 0x0 "SQCH1SET0R_LL,Sequence Channel 1 Set 0 Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "START,Sequence Operation Start" "0: No operation,1: Start the sequence operation" line.byte 0x1 "SQCH1SET0R_LH,Sequence Channel 1 Set 0 Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x602++0x1 line.word 0x0 "SQCH1SET0R_H,Sequence Channel 1 Set 0 Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.word.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x602++0x0 line.byte 0x0 "SQCH1SET0R_HL,Sequence Channel 1 Set 0 Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." wgroup.byte 0x603++0x0 line.byte 0x0 "SQCH1SET0R_HH,Sequence Channel 1 Set 0 Register" bitfld.byte 0x0 7. "Reserved,The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "Reserved,The write value should be 0000000." rgroup.long 0x610++0x3 line.long 0x0 "SQCH1SR,Sequence Channel 1 Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.long 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.word 0x610++0x1 line.word 0x0 "SQCH1SR_L,Sequence Channel 1 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" bitfld.word 0x0 3. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" rgroup.byte 0x610++0x1 line.byte 0x0 "SQCH1SR_LL,Sequence Channel 1 Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag" "0: All actions of a descriptor have not finished,1: All actions of a descriptor finished operations" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 2. "RUNNING,Sequence Operation Running Status" "0: Sequence operation is stopped,1: Sequence operation is running" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" line.byte 0x1 "SQCH1SR_LH,Sequence Channel 1 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag" "0: All descriptors have not finished,1: All descriptors finished operations" rgroup.word 0x612++0x1 line.word 0x0 "SQCH1SR_H,Sequence Channel 1 Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" rgroup.byte 0x612++0x1 line.byte 0x0 "SQCH1SR_HL,Sequence Channel 1 Status Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag" "0: No error,1: Sequence packet size is too large" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag" "0: No aborted descriptor,1: A descriptor execution was aborted" line.byte 0x1 "SQCH1SR_HH,Sequence Channel 1 Status Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag" "0: No error,1: Acknowledge and Error Report Packet is received" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag" "0: No error,1: Received packets have correctable error" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag" "0: No error,1: Received packet data is not stored correctly" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag" "0: No error,1: Expected receive did not take place" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag" "0: No error,1: Fatal timeout occurred during BTA" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag" "0: No error,1: Internal AXI bus read error occurred" group.long 0x614++0x3 line.long 0x0 "SQCH1SCR,Sequence Channel 1 Status Clear Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x614++0x1 line.word 0x0 "SQCH1SCR_L,Sequence Channel 1 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline eventfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x614++0x1 line.byte 0x0 "SQCH1SCR_LL,Sequence Channel 1 Status Clear Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.AACTFIN flag" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH1SCR_LH,Sequence Channel 1 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline eventfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.ADESFIN flag" group.word 0x616++0x1 line.word 0x0 "SQCH1SCR_H,Sequence Channel 1 Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" group.byte 0x616++0x1 line.byte 0x0 "SQCH1SCR_HL,Sequence Channel 1 Status Clear Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.SIZEERR flag" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.DABORT flag" line.byte 0x1 "SQCH1SCR_HH,Sequence Channel 1 Status Clear Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXAKE flag" newline eventfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXCORERR flag" eventfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXPFAIL flag" newline eventfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFAIL flag" eventfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.RXFERR flag" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Flag Clear" "0: No operation,1: Clear the SQCHnSR.TXIBERR flag" group.long 0x618++0x3 line.long 0x0 "SQCH1IER,Sequence Channel 1 Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 29. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 28. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 27. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 26. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 17.--18. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 16. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x618++0x1 line.word 0x0 "SQCH1IER_L,Sequence Channel 1 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 9.--14. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 8. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x618++0x1 line.byte 0x0 "SQCH1IER_LL,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "AACTFIN,All Actions Finish Interrupt Enable" "0: Disable,1: Enable" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "SQCH1IER_LH,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x1 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x1 0. "ADESFIN,All-Descriptors Finish Interrupt Enable" "0: Disable,1: Enable" group.word 0x61A++0x1 line.word 0x0 "SQCH1IER_H,Sequence Channel 1 Interrupt Enable Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 13. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 12. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 11. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.word 0x0 10. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" group.byte 0x61A++0x1 line.byte 0x0 "SQCH1IER_HL,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3. "SIZEERR,Packet Size Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0. "DABORT,Descriptor Abort Interrupt Enable" "0: Disable,1: Enable" line.byte 0x1 "SQCH1IER_HH,Sequence Channel 1 Interrupt Enable Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "RXAKE,Receive Acknowledge and Error Report Packet Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 5. "RXCORERR,Receive Correctable Error Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 4. "RXPFAIL,Receive Packet Data Fail Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 3. "RXFAIL,Receive Fail Interrupt Enable" "0: Disable,1: Enable" bitfld.byte 0x1 2. "RXFERR,Receive Fatal Error Interrupt Enable" "0: Disable,1: Enable" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "TXIBERR,Tx Internal Bus Error Interrupt Enable" "0: Disable,1: Enable" repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x780)++0x3 line.long 0x0 "SQCH0DSC$1AR,Sequence Channel 0 Descriptor-%s A Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 28.--29. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.long 0x0 26.--27. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.long 0x0 25. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.long 0x0 24. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.long 0x0 22.--23. "VC,Virtual Channel" "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "DT,Data Type" hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data 1" newline hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x780)++0x1 line.word 0x0 "SQCH0DSC$1AR_L,Sequence Channel 0 Descriptor-%s A Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x780)++0x0 line.byte 0x0 "SQCH0DSC$1AR_LL,Sequence Channel 0 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x781)++0x0 line.byte 0x0 "SQCH0DSC$1AR_LH,Sequence Channel 0 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA1,Data 1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x782)++0x1 line.word 0x0 "SQCH0DSC$1AR_H,Sequence Channel 0 Descriptor-%s A Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.word 0x0 10.--11. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.word 0x0 9. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.word 0x0 8. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.word 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x782)++0x0 line.byte 0x0 "SQCH0DSC$1AR_HL,Sequence Channel 0 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x783)++0x0 line.byte 0x0 "SQCH0DSC$1AR_HH,Sequence Channel 0 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.byte 0x0 2.--3. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.byte 0x0 1. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.byte 0x0 0. "FMT,Format" "0: Short Packet,1: Long Packet" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x784)++0x3 line.long 0x0 "SQCH0DSC$1BR,Sequence Channel 0 Descriptor-%s B Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "DTSEL,Data Select" "0: Use Packet Payload Data Register (TXPPDxR RXPPDxR),1: Use Sequence RAM,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x788)++0x3 line.long 0x0 "SQCH0DSC$1CR,Sequence Channel 0 Descriptor-%s C Register" hexmask.long.byte 0x0 24.--31. 1. "ACTCODE,Action Code" bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.long.tbyte 0x0 3.--21. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x788)++0x1 line.word 0x0 "SQCH0DSC$1CR_L,Sequence Channel 0 Descriptor-%s C Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x788)++0x0 line.byte 0x0 "SQCH0DSC$1CR_LL,Sequence Channel 0 Descriptor-%s C Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x78A)++0x1 line.word 0x0 "SQCH0DSC$1CR_H,Sequence Channel 0 Descriptor-%s C Register" hexmask.word.byte 0x0 8.--15. 1. "ACTCODE,Action Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78A)++0x0 line.byte 0x0 "SQCH0DSC$1CR_HL,Sequence Channel 0 Descriptor-%s C Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78B)++0x0 line.byte 0x0 "SQCH0DSC$1CR_HH,Sequence Channel 0 Descriptor-%s C Register" hexmask.byte 0x0 0.--7. 1. "ACTCODE,Action Code" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x78C)++0x3 line.long 0x0 "SQCH0DSC$1DR,Sequence Channel 0 Descriptor-%s D Register" hexmask.long 0x0 0.--31. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x78C)++0x1 line.word 0x0 "SQCH0DSC$1DR_L,Sequence Channel 0 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78C)++0x0 line.byte 0x0 "SQCH0DSC$1DR_LL,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78D)++0x0 line.byte 0x0 "SQCH0DSC$1DR_LH,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x78E)++0x1 line.word 0x0 "SQCH0DSC$1DR_H,Sequence Channel 0 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78E)++0x0 line.byte 0x0 "SQCH0DSC$1DR_HL,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x78F)++0x0 line.byte 0x0 "SQCH0DSC$1DR_HH,Sequence Channel 0 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x800)++0x3 line.long 0x0 "SQCH1DSC$1AR,Sequence Channel 1 Descriptor-%s A Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 28.--29. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.long 0x0 26.--27. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.long 0x0 25. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.long 0x0 24. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.long 0x0 22.--23. "VC,Virtual Channel" "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "DT,Data Type" hexmask.long.byte 0x0 8.--15. 1. "DATA1,Data 1" newline hexmask.long.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x800)++0x1 line.word 0x0 "SQCH1DSC$1AR_L,Sequence Channel 1 Descriptor-%s A Register" hexmask.word.byte 0x0 8.--15. 1. "DATA1,Data 1" hexmask.word.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x800)++0x0 line.byte 0x0 "SQCH1DSC$1AR_LL,Sequence Channel 1 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA0,Data 0" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x801)++0x0 line.byte 0x0 "SQCH1DSC$1AR_LH,Sequence Channel 1 Descriptor-%s A Register" hexmask.byte 0x0 0.--7. 1. "DATA1,Data 1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x802)++0x1 line.word 0x0 "SQCH1DSC$1AR_H,Sequence Channel 1 Descriptor-%s A Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.word 0x0 10.--11. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.word 0x0 9. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.word 0x0 8. "FMT,Format" "0: Short Packet,1: Long Packet" bitfld.word 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x802)++0x0 line.byte 0x0 "SQCH1DSC$1AR_HL,Sequence Channel 1 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "VC,Virtual Channel" "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "DT,Data Type" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x803)++0x0 line.byte 0x0 "SQCH1DSC$1AR_HH,Sequence Channel 1 Descriptor-%s A Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "NXACT,Next Action" "0: Terminate the sequence operation after this..,1: Start the next descriptor processing after this..,?,?" newline bitfld.byte 0x0 2.--3. "BTA,Bus Turn Around" "0: Not assert BTA or No-operation,1: Assert BTA,?,?" bitfld.byte 0x0 1. "SPD,Speed" "0: High Speed,1: Low Power" newline bitfld.byte 0x0 0. "FMT,Format" "0: Short Packet,1: Long Packet" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x804)++0x3 line.long 0x0 "SQCH1DSC$1BR,Sequence Channel 1 Descriptor-%s B Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "DTSEL,Data Select" "0: Use Packet Payload Data Register (TXPPDxR RXPPDxR),1: Use Sequence RAM,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--19. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x808)++0x3 line.long 0x0 "SQCH1DSC$1CR,Sequence Channel 1 Descriptor-%s C Register" hexmask.long.byte 0x0 24.--31. 1. "ACTCODE,Action Code" bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.long.tbyte 0x0 3.--21. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x808)++0x1 line.word 0x0 "SQCH1DSC$1CR_L,Sequence Channel 1 Descriptor-%s C Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x808)++0x0 line.byte 0x0 "SQCH1DSC$1CR_LL,Sequence Channel 1 Descriptor-%s C Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "FINACT,Finish Action" "0: Disable,1: Enable" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80A)++0x1 line.word 0x0 "SQCH1DSC$1CR_H,Sequence Channel 1 Descriptor-%s C Register" hexmask.word.byte 0x0 8.--15. 1. "ACTCODE,Action Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80A)++0x0 line.byte 0x0 "SQCH1DSC$1CR_HL,Sequence Channel 1 Descriptor-%s C Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AUXOP,Auxiliary Operation" "0: Not use auxiliary operation,1: Execute auxiliary operation" newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80B)++0x0 line.byte 0x0 "SQCH1DSC$1CR_HH,Sequence Channel 1 Descriptor-%s C Register" hexmask.byte 0x0 0.--7. 1. "ACTCODE,Action Code" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x80C)++0x3 line.long 0x0 "SQCH1DSC$1DR,Sequence Channel 1 Descriptor-%s D Register" hexmask.long 0x0 0.--31. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80C)++0x1 line.word 0x0 "SQCH1DSC$1DR_L,Sequence Channel 1 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80C)++0x0 line.byte 0x0 "SQCH1DSC$1DR_LL,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80D)++0x0 line.byte 0x0 "SQCH1DSC$1DR_LH,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x80E)++0x1 line.word 0x0 "SQCH1DSCmDR_H$1,Sequence Channel 1 Descriptor-%s D Register" hexmask.word 0x0 0.--15. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80E)++0x0 line.byte 0x0 "SQCH1DSC$1DR_HL,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.byte ($2+0x80F)++0x0 line.byte 0x0 "SQCH1DSC$1DR_HH,Sequence Channel 1 Descriptor-%s D Register" hexmask.byte 0x0 0.--7. 1. "LADDR,Lower Address" repeat.end tree.end tree.end tree "DTC (Data Transfer Controller)" base ad:0x0 tree "DTC" base ad:0x4000AC00 group.byte 0x0++0x0 line.byte 0x0 "DTCCR,DTC Control Register" group.byte 0x0++0x0 line.byte 0x0 "DTCCR_NS,DTC Control Register for Non Secure Region" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RRS,DTC Transfer Information Read Skip Enable." "0: Do not skip transfer information read,1: Skip transfer information read when vector.." bitfld.byte 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.long 0x4++0x3 line.long 0x0 "DTCVBR,DTC Vector Base Register" group.long 0x4++0x3 line.long 0x0 "DTCVBR_NS,DTC Vector Base Register for Non Secure Region" hexmask.long.tbyte 0x0 10.--31. 1. "DTCVBR,DTC Vector Base Address for non-secure region(Upper 22 bits)" group.byte 0xC++0x0 line.byte 0x0 "DTCST,DTC Module Start Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTCST,DTC Module Start" "0: DTC module stop,1: DTC module start" rgroup.word 0xE++0x1 line.word 0x0 "DTCSTS,DTC Status Register" bitfld.word 0x0 15. "ACT,DTC Active Flag" "0: DTC transfer operation is not in progress.,1: DTC transfer operation is in progress." hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000." hexmask.word.byte 0x0 0.--7. 1. "VECN,DTC-Activating Vector Number MonitoringThese bits indicate the vector number for the activating source when DTC transfer is in progress.The value is only valid if DTC transfer is in progress (the value of the ACT flag is 1)" group.byte 0x10++0x0 line.byte 0x0 "DTCCR_S,DTC Control Register for Secure Region" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RRSS,DTC Transfer Information Read Skip Enable for secure" "0: Transfer information read is not skipped.,1: Transfer information read is skipped when vector.." bitfld.byte 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0x10++0x0 line.byte 0x0 "DTCCR_SEC,DTC Control Register for Secure Region" group.long 0x14++0x3 line.long 0x0 "DTCVBR_S,DTC Vector Base Register for secure Region" hexmask.long.tbyte 0x0 10.--31. 1. "DTCVBRS,DTC Vector Base Address for secure region(Upper 22 bits)" hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.long 0x14++0x3 line.long 0x0 "DTCVBR_SEC,DTC Vector Base Register for secure Region" group.long 0x20++0x3 line.long 0x0 "DTEVR,DTC Error Vector Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "DTESTA,DTC Error Status Flag" "0: Not DTC transfer error occurred,1: DMA transfer error occurred" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline rbitfld.long 0x0 8. "DTEVSAM,DTC Error Vector Number SA Monitor" "0,1" hexmask.long.byte 0x0 0.--7. 1. "DTEV,DTC Error Vector Number" tree.end tree "DTC_NS" base ad:0x5000AC00 group.byte 0x0++0x0 line.byte 0x0 "DTCCR,DTC Control Register" group.byte 0x0++0x0 line.byte 0x0 "DTCCR_NS,DTC Control Register for Non Secure Region" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RRS,DTC Transfer Information Read Skip Enable." "0: Do not skip transfer information read,1: Skip transfer information read when vector.." bitfld.byte 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.long 0x4++0x3 line.long 0x0 "DTCVBR,DTC Vector Base Register" group.long 0x4++0x3 line.long 0x0 "DTCVBR_NS,DTC Vector Base Register for Non Secure Region" hexmask.long.tbyte 0x0 10.--31. 1. "DTCVBR,DTC Vector Base Address for non-secure region(Upper 22 bits)" group.byte 0xC++0x0 line.byte 0x0 "DTCST,DTC Module Start Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DTCST,DTC Module Start" "0: DTC module stop,1: DTC module start" rgroup.word 0xE++0x1 line.word 0x0 "DTCSTS,DTC Status Register" bitfld.word 0x0 15. "ACT,DTC Active Flag" "0: DTC transfer operation is not in progress.,1: DTC transfer operation is in progress." hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000." hexmask.word.byte 0x0 0.--7. 1. "VECN,DTC-Activating Vector Number MonitoringThese bits indicate the vector number for the activating source when DTC transfer is in progress.The value is only valid if DTC transfer is in progress (the value of the ACT flag is 1)" group.byte 0x10++0x0 line.byte 0x0 "DTCCR_S,DTC Control Register for Secure Region" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RRSS,DTC Transfer Information Read Skip Enable for secure" "0: Transfer information read is not skipped.,1: Transfer information read is skipped when vector.." bitfld.byte 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0x10++0x0 line.byte 0x0 "DTCCR_SEC,DTC Control Register for Secure Region" group.long 0x14++0x3 line.long 0x0 "DTCVBR_S,DTC Vector Base Register for secure Region" hexmask.long.tbyte 0x0 10.--31. 1. "DTCVBRS,DTC Vector Base Address for secure region(Upper 22 bits)" hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.long 0x14++0x3 line.long 0x0 "DTCVBR_SEC,DTC Vector Base Register for secure Region" group.long 0x20++0x3 line.long 0x0 "DTEVR,DTC Error Vector Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "DTESTA,DTC Error Status Flag" "0: Not DTC transfer error occurred,1: DMA transfer error occurred" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline rbitfld.long 0x0 8. "DTEVSAM,DTC Error Vector Number SA Monitor" "0,1" hexmask.long.byte 0x0 0.--7. 1. "DTEV,DTC Error Vector Number" tree.end tree.end tree "EDMAC (Ethernet DMA Controller)" base ad:0x0 tree "EDMAC0" base ad:0x40354000 group.long 0x0++0x3 line.long 0x0 "EDMR,EDMAC Mode Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x0 6. "DE,Big Endian Mode/Little Endian ModeNOTE: This setting applies to data for the transmit/receive buffer. It does not apply to transmit/receive descriptors and registers." "0: Big endian mode,1: Little endian mode" bitfld.long 0x0 4.--5. "DL,Transmit/Receive DescriptorLength" "0: 16 bytes,1: 32 bytes,?,?" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "SWR,Software Reset" "0: no effect.,1: the corresponding channels of the EDMAC and.." group.long 0x8++0x3 line.long 0x0 "EDTRR,EDMAC Transmit Request Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "TR,Transmit Request" "0: no effect.,1: When 1 is written the EDMAC reads the.." group.long 0x10++0x3 line.long 0x0 "EDRRR,EDMAC Receive Request Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "RR,Receive Request" "0: Receive function is disabled.,1: Receive descriptor is read and the receive.." group.long 0x18++0x3 line.long 0x0 "TDLAR,Transmit Descriptor List Start Address Register" hexmask.long 0x0 0.--31. 1. "TDLAR,The start address of the transmit descriptor list is set. Set the start address according to the descriptor length selected by the EDMR.DL[1:0] bits.16-byte boundary: Lower 4 bits = 0000b32-byte boundary: Lower 5 bits = 00000b64-byte boundary:.." group.long 0x20++0x3 line.long 0x0 "RDLAR,Receive Descriptor List Start Address Register" hexmask.long 0x0 0.--31. 1. "RDLAR,The start address of the receive descriptor list is set. Set the start address according to the descriptor length selected by the EDMR.DL[1:0] bits.16-byte boundary: Lower 4 bits = 0000b32-byte boundary: Lower 5 bits = 00000b64-byte boundary: Lower.." group.long 0x28++0x3 line.long 0x0 "EESR,ETHERC/EDMAC Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "TWB,Write-Back Complete Flag" "0: Write-back has not been completed or no..,1: Write-back to the transmit descriptor has been.." newline bitfld.long 0x0 27.--29. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.long 0x0 26. "TABT,Transmit Abort Detect Flag" "0: Frame transmission has not been aborted or no..,1: Frame transmission has been aborted." newline eventfld.long 0x0 25. "RABT,Receive Abort Detect Flag" "0: Frame reception has not been aborted or no..,1: Frame reception has been aborted." eventfld.long 0x0 24. "RFCOF,Receive Frame Counter Overflow Flag" "0: Receive frame counter has not overflowed.,1: Receive frame counter has overflowed." newline eventfld.long 0x0 23. "ADE,Address Error Flag" "0: Invalid memory address has not been detected..,1: Invalid memory address has been detected." rbitfld.long 0x0 22. "ECI,ETHERC Status Register Source FlagNOTE: When the source in the ETHERCn.ECSR register is cleared the ECI flag is also cleared." "0: ETHERC status interrupt source has not been..,1: ETHERC status interrupt source has been detected." newline eventfld.long 0x0 21. "TC,Frame Transfer Complete Flag" "0: Transfer have not been completed or no transfer..,1: All frames indicated by the transmit descriptor.." eventfld.long 0x0 20. "TDE,Transmit Descriptor Empty Flag" "0: The EDMAC detects that the transmit descriptor..,1: The EDMAC detects that the transmit descriptor.." newline eventfld.long 0x0 19. "TFUF,Transmit FIFO Underflow Flag" "0: Underflow has not occurred.,1: Underflow has occurred." eventfld.long 0x0 18. "FR,Frame Receive Flag" "0: Frame has not been received.,1: Frame has been received. Update of the receive.." newline eventfld.long 0x0 17. "RDE,Receive Descriptor Empty Flag" "0: The EDMAC detects that the receive descriptor..,1: The EDMAC detects that the receive descriptor.." eventfld.long 0x0 16. "RFOF,Receive FIFO Overflow Flag" "0: Overflow has not occurred.,1: Overflow has occurred." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.long 0x0 11. "CND,Carrier Not Detect Flag" "0: A carrier has been detected when transmission..,1: A carrier has not been detected during preamble.." newline eventfld.long 0x0 10. "DLC,Loss of Carrier Detect Flag" "0: Loss of carrier has not been detected.,1: Loss of carrier has been detected during frame.." eventfld.long 0x0 9. "CD,Late Collision Detect Flag" "0: Late collision has not been detected.,1: Late collision has been detected during frame.." newline eventfld.long 0x0 8. "TRO,Transmit Retry Over Flag" "0: Transmit retry-over condition has not been..,1: Transmit retry-over condition has been detected." eventfld.long 0x0 7. "RMAF,Multicast Address Frame Receive Flag" "0: Multicast address frame has not been received.,1: Multicast address frame has been received." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 4. "RRF,Alignment Error Flag" "0: Alignment error has not been detected.,1: Alignment error has been detected." newline eventfld.long 0x0 3. "RTLF,Frame-Too-Long Error Flag" "0: Frame-too-long error has not been detected.,1: Frame-too-long error has been detected." eventfld.long 0x0 2. "RTSF,Frame-Too-Short Error Flag" "0: Frame-too-short error has not been detected.,1: Frame-too-short error has been detected." newline eventfld.long 0x0 1. "PRE,PHY-LSI Receive Error Flag" "0: PHY-LSI receive error has not been detected.,1: PHY-LSI receive error has been detected." eventfld.long 0x0 0. "CERF,CRC Error Flag" "0: CRC error has not been detected.,1: CRC error has been detected." group.long 0x30++0x3 line.long 0x0 "EESIPR,ETHERC/EDMAC Status Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "TWBIP,Write-Back Complete Interrupt Request Enable" "0: Write-back complete interrupt request is disabled.,1: Write-back complete interrupt request is enabled." newline bitfld.long 0x0 27.--29. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 26. "TABTIP,Transmit Abort Detect Interrupt Request Enable" "0: Transmit abort detect interrupt request is..,1: Transmit abort detect interrupt request is.." newline bitfld.long 0x0 25. "RABTIP,Receive Abort Detect Interrupt Request Enable" "0: Receive abort detect interrupt request is..,1: Receive abort detect interrupt request is enabled." bitfld.long 0x0 24. "RFCOFIP,Receive Frame Counter Overflow Interrupt Request Enable" "0: Receive frame counter overflow interrupt request..,1: Receive frame counter overflow interrupt request.." newline bitfld.long 0x0 23. "ADEIP,Address Error Interrupt Request Enable" "0: Address error interrupt request is disabled.,1: Address error interrupt request is enabled." bitfld.long 0x0 22. "ECIIP,ETHERC Status Register Source Interrupt Request Enable" "0: ETHERC status interrupt request is disabled.,1: ETHERC status interrupt request is enabled." newline bitfld.long 0x0 21. "TCIP,Frame Transfer Complete Interrupt Request Enable" "0: Frame transmission complete interrupt request is..,1: Frame transmission complete interrupt request is.." bitfld.long 0x0 20. "TDEIP,Transmit Descriptor Empty Interrupt Request Enable" "0: Transmit descriptor empty interrupt request is..,1: Transmit descriptor empty interrupt request is.." newline bitfld.long 0x0 19. "TFUFIP,Transmit FIFO Underflow Interrupt Request Enable" "0: Underflow interrupt request is disabled.,1: Underflow interrupt request is enabled." bitfld.long 0x0 18. "FRIP,Frame Receive Interrupt Request Enable" "0: Frame reception interrupt request is disabled.,1: Frame reception interrupt request is enabled." newline bitfld.long 0x0 17. "RDEIP,Receive Descriptor Empty Interrupt Request Enable" "0: Receive descriptor empty interrupt request is..,1: Receive descriptor empty interrupt request is.." bitfld.long 0x0 16. "RFOFIP,Receive FIFO Overflow Interrupt Request Enable" "0: Overflow interrupt request is disabled.,1: Overflow interrupt request is enabled." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 11. "CNDIP,Carrier Not Detect Interrupt Request Enable" "0: Carrier not detect interrupt request is disabled.,1: Carrier not detect interrupt request is enabled." newline bitfld.long 0x0 10. "DLCIP,Loss of Carrier Detect Interrupt Request Enable" "0: Loss of carrier detect interrupt request is..,1: Loss of carrier detect interrupt request is.." bitfld.long 0x0 9. "CDIP,Late Collision Detect Interrupt Request Enable" "0: Late collision detect interrupt request is..,1: Late collision detect interrupt request is.." newline bitfld.long 0x0 8. "TROIP,Transmit Retry Over Interrupt Request Enable" "0: Transmit retry over interrupt request is disabled.,1: Transmit retry over interrupt request is enabled." bitfld.long 0x0 7. "RMAFIP,Multicast Address Frame Receive Interrupt Request Enable" "0: Multicast address frame receive interrupt..,1: Multicast address frame receive interrupt.." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 4. "RRFIP,Alignment Error Interrupt Request Enable" "0: Alignment error interrupt request is disabled.,1: Alignment error interrupt request is enabled." newline bitfld.long 0x0 3. "RTLFIP,Frame-Too-Long Error Interrupt Request Enable" "0: Frame-too-long error interrupt request is..,1: Frame-too-long error interrupt request is enabled." bitfld.long 0x0 2. "RTSFIP,Frame-Too-Short Error Interrupt Request Enable" "0: Frame-too-short error interrupt request is..,1: Frame-too-short error interrupt request is.." newline bitfld.long 0x0 1. "PREIP,PHY-LSI Receive Error Interrupt Request Enable" "0: PHY-LSI receive error interrupt request is..,1: PHY-LSI receive error interrupt request is.." bitfld.long 0x0 0. "CERFIP,CRC Error Interrupt Request Enable" "0: CRC error interrupt request is disabled.,1: CRC error interrupt request is enabled." group.long 0x38++0x3 line.long 0x0 "TRSCER,ETHERC/EDMAC Transmit/Receive Status Copy Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 7. "RMAFCE,RMAF Flag Copy Enable" "0: The EDMACn.EESR.RMAF flag status is reflected in..,1: The EDMACn.EESR.RMAF flag status is not.." bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 4. "RRFCE,RRF Flag Copy Enable" "0: The EDMACn.EESR.RRF flag status is reflected in..,1: The EDMACn.EESR.RRF flag status is not reflected.." hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0x40++0x3 line.long 0x0 "RMFCR,Missed-Frame Counter Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "MFC,Missed-Frame CounterThese bits indicate the number of frames that are discarded and not transferred to the receive buffer during reception." group.long 0x48++0x3 line.long 0x0 "TFTR,Transmit FIFO Threshold Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." hexmask.long.word 0x0 0.--10. 1. "TFT,Transmit FIFO Threshold00Dh to 200h: The threshold is the set value multiplied by 4. Example: 00Dh: 52 bytes 040h: 256 bytes 100h: 1024 bytes 200h: 2048 bytes" group.long 0x50++0x3 line.long 0x0 "FDR,Transmit FIFO Threshold Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." hexmask.long.byte 0x0 8.--12. 1. "TFD,Receive FIFO Depth" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "RFD,Transmit FIFO Depth" group.long 0x58++0x3 line.long 0x0 "RMCR,Receive Method Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "RNR,Receive Request Reset" "0: EDRRR.RR bit (receive request bit) is set to 0..,1: EDRRR.RR bit (receive request bit) is not set to.." group.long 0x64++0xF line.long 0x0 "TFUCR,Transmit FIFO Underflow Counter" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "UNDER,Transmit FIFO Underflow CountThese bits indicate how many times the transmit FIFO has underflowed. The counter stops when the counter value reaches FFFFh." line.long 0x4 "RFOCR,Receive FIFO Overflow Counter" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "OVER,Receive FIFO Overflow CountThese bits indicate how many times the receive FIFO has overflowed. The counter stops when the counter value reaches FFFFh." line.long 0x8 "IOSR,Independent Output Signal Setting Register" hexmask.long 0x8 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x8 0. "ELB,External Loopback Mode" "0: The ETn_EXOUT pin outputs low.,1: The ETn_EXOUT pin outputs high." line.long 0xC "FCFTR,Flow Control Start FIFO Threshold Setting Register" hexmask.long.word 0xC 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0xC 16.--18. "RFFO,Receive FIFO Frame PAUSE Output Threshold(When ((RFFO+1)x2) receive frames have been stored in the receive FIFO.)" "0: When 2 receive frames have been stored in the..,1: When 4 receive frames have been stored in the..,?,?,?,?,?,?" newline hexmask.long.word 0xC 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0xC 0.--2. "RFDO,Receive FIFO Data PAUSE Output Threshold(When (RFDO+1)x256-32 bytes of data is stored in the receive FIFO.)" "0: When 224 ( 256 - 32) bytes of data is stored in..,1: When 480 ( 512 - 32) bytes of data is stored in..,?,?,?,?,?,?" group.long 0x78++0x7 line.long 0x0 "RPADIR,Receive Data Padding Insert Register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x0 16.--17. "PADS,Padding Size" "0: No padding is inserted.,1: 1 byte is inserted.,?,?" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." hexmask.long.byte 0x0 0.--5. 1. "PADR,Padding Slot" line.long 0x4 "TRIMD,Transmit Interrupt Setting Register" hexmask.long 0x4 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." bitfld.long 0x4 4. "TIM,Transmit Interrupt Mode" "0: Transmission complete interrupt mode: An..,1: Write-back complete interrupt mode: An interrupt.." newline bitfld.long 0x4 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "TIS,Transmit Interrupt EnableSet the EESR.TWB flag to 1 in the mode selected by the TIM bit to notify an interrupt." "0: Transmit Interrupt is disabled.,1: Transmit Interrupt is enabled." rgroup.long 0xC8++0x7 line.long 0x0 "RBWAR,Receive Buffer Write Address Register" hexmask.long 0x0 0.--31. 1. "RBWAR,Receive Buffer Write Address RegisterThe RBWAR register indicates the last address that the EDMAC has written data to when writing to the receive buffer.Refer to the address indicated by the RBWAR register to recognize which address in the receive.." line.long 0x4 "RDFAR,Receive Descriptor Fetch Address Register" hexmask.long 0x4 0.--31. 1. "RDFAR,Receive Descriptor Fetch Address RegisterThe RDFAR register indicates the start address of the last fetched receive descriptor when the EDMAC fetches descriptor information from the receive descriptor.Refer to the address indicated by the RDFAR.." rgroup.long 0xD4++0x7 line.long 0x0 "TBRAR,Transmit Buffer Read Address Register" hexmask.long 0x0 0.--31. 1. "TBRAR,Transmit Buffer Read Address RegisterThe TBRAR register indicates the last address that the EDMAC has read data from when reading data from the transmit buffer.Refer to the address indicated by the TBRAR register to recognize which address in the.." line.long 0x4 "TDFAR,Transmit Descriptor Fetch Address Register" hexmask.long 0x4 0.--31. 1. "TDFAR,Transmit Descriptor Fetch Address RegisterThe TDFAR register indicates the start address of the last fetched transmit descriptor when the EDMAC fetches descriptor information from the transmit descriptor.Refer to the address indicated by the TDFAR.." tree.end tree "EDMAC0_NS" base ad:0x50354000 group.long 0x0++0x3 line.long 0x0 "EDMR,EDMAC Mode Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x0 6. "DE,Big Endian Mode/Little Endian ModeNOTE: This setting applies to data for the transmit/receive buffer. It does not apply to transmit/receive descriptors and registers." "0: Big endian mode,1: Little endian mode" bitfld.long 0x0 4.--5. "DL,Transmit/Receive DescriptorLength" "0: 16 bytes,1: 32 bytes,?,?" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "SWR,Software Reset" "0: no effect.,1: the corresponding channels of the EDMAC and.." group.long 0x8++0x3 line.long 0x0 "EDTRR,EDMAC Transmit Request Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "TR,Transmit Request" "0: no effect.,1: When 1 is written the EDMAC reads the.." group.long 0x10++0x3 line.long 0x0 "EDRRR,EDMAC Receive Request Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "RR,Receive Request" "0: Receive function is disabled.,1: Receive descriptor is read and the receive.." group.long 0x18++0x3 line.long 0x0 "TDLAR,Transmit Descriptor List Start Address Register" hexmask.long 0x0 0.--31. 1. "TDLAR,The start address of the transmit descriptor list is set. Set the start address according to the descriptor length selected by the EDMR.DL[1:0] bits.16-byte boundary: Lower 4 bits = 0000b32-byte boundary: Lower 5 bits = 00000b64-byte boundary:.." group.long 0x20++0x3 line.long 0x0 "RDLAR,Receive Descriptor List Start Address Register" hexmask.long 0x0 0.--31. 1. "RDLAR,The start address of the receive descriptor list is set. Set the start address according to the descriptor length selected by the EDMR.DL[1:0] bits.16-byte boundary: Lower 4 bits = 0000b32-byte boundary: Lower 5 bits = 00000b64-byte boundary: Lower.." group.long 0x28++0x3 line.long 0x0 "EESR,ETHERC/EDMAC Status Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 30. "TWB,Write-Back Complete Flag" "0: Write-back has not been completed or no..,1: Write-back to the transmit descriptor has been.." newline bitfld.long 0x0 27.--29. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" eventfld.long 0x0 26. "TABT,Transmit Abort Detect Flag" "0: Frame transmission has not been aborted or no..,1: Frame transmission has been aborted." newline eventfld.long 0x0 25. "RABT,Receive Abort Detect Flag" "0: Frame reception has not been aborted or no..,1: Frame reception has been aborted." eventfld.long 0x0 24. "RFCOF,Receive Frame Counter Overflow Flag" "0: Receive frame counter has not overflowed.,1: Receive frame counter has overflowed." newline eventfld.long 0x0 23. "ADE,Address Error Flag" "0: Invalid memory address has not been detected..,1: Invalid memory address has been detected." rbitfld.long 0x0 22. "ECI,ETHERC Status Register Source FlagNOTE: When the source in the ETHERCn.ECSR register is cleared the ECI flag is also cleared." "0: ETHERC status interrupt source has not been..,1: ETHERC status interrupt source has been detected." newline eventfld.long 0x0 21. "TC,Frame Transfer Complete Flag" "0: Transfer have not been completed or no transfer..,1: All frames indicated by the transmit descriptor.." eventfld.long 0x0 20. "TDE,Transmit Descriptor Empty Flag" "0: The EDMAC detects that the transmit descriptor..,1: The EDMAC detects that the transmit descriptor.." newline eventfld.long 0x0 19. "TFUF,Transmit FIFO Underflow Flag" "0: Underflow has not occurred.,1: Underflow has occurred." eventfld.long 0x0 18. "FR,Frame Receive Flag" "0: Frame has not been received.,1: Frame has been received. Update of the receive.." newline eventfld.long 0x0 17. "RDE,Receive Descriptor Empty Flag" "0: The EDMAC detects that the receive descriptor..,1: The EDMAC detects that the receive descriptor.." eventfld.long 0x0 16. "RFOF,Receive FIFO Overflow Flag" "0: Overflow has not occurred.,1: Overflow has occurred." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." eventfld.long 0x0 11. "CND,Carrier Not Detect Flag" "0: A carrier has been detected when transmission..,1: A carrier has not been detected during preamble.." newline eventfld.long 0x0 10. "DLC,Loss of Carrier Detect Flag" "0: Loss of carrier has not been detected.,1: Loss of carrier has been detected during frame.." eventfld.long 0x0 9. "CD,Late Collision Detect Flag" "0: Late collision has not been detected.,1: Late collision has been detected during frame.." newline eventfld.long 0x0 8. "TRO,Transmit Retry Over Flag" "0: Transmit retry-over condition has not been..,1: Transmit retry-over condition has been detected." eventfld.long 0x0 7. "RMAF,Multicast Address Frame Receive Flag" "0: Multicast address frame has not been received.,1: Multicast address frame has been received." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" eventfld.long 0x0 4. "RRF,Alignment Error Flag" "0: Alignment error has not been detected.,1: Alignment error has been detected." newline eventfld.long 0x0 3. "RTLF,Frame-Too-Long Error Flag" "0: Frame-too-long error has not been detected.,1: Frame-too-long error has been detected." eventfld.long 0x0 2. "RTSF,Frame-Too-Short Error Flag" "0: Frame-too-short error has not been detected.,1: Frame-too-short error has been detected." newline eventfld.long 0x0 1. "PRE,PHY-LSI Receive Error Flag" "0: PHY-LSI receive error has not been detected.,1: PHY-LSI receive error has been detected." eventfld.long 0x0 0. "CERF,CRC Error Flag" "0: CRC error has not been detected.,1: CRC error has been detected." group.long 0x30++0x3 line.long 0x0 "EESIPR,ETHERC/EDMAC Status Interrupt Enable Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "TWBIP,Write-Back Complete Interrupt Request Enable" "0: Write-back complete interrupt request is disabled.,1: Write-back complete interrupt request is enabled." newline bitfld.long 0x0 27.--29. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 26. "TABTIP,Transmit Abort Detect Interrupt Request Enable" "0: Transmit abort detect interrupt request is..,1: Transmit abort detect interrupt request is.." newline bitfld.long 0x0 25. "RABTIP,Receive Abort Detect Interrupt Request Enable" "0: Receive abort detect interrupt request is..,1: Receive abort detect interrupt request is enabled." bitfld.long 0x0 24. "RFCOFIP,Receive Frame Counter Overflow Interrupt Request Enable" "0: Receive frame counter overflow interrupt request..,1: Receive frame counter overflow interrupt request.." newline bitfld.long 0x0 23. "ADEIP,Address Error Interrupt Request Enable" "0: Address error interrupt request is disabled.,1: Address error interrupt request is enabled." bitfld.long 0x0 22. "ECIIP,ETHERC Status Register Source Interrupt Request Enable" "0: ETHERC status interrupt request is disabled.,1: ETHERC status interrupt request is enabled." newline bitfld.long 0x0 21. "TCIP,Frame Transfer Complete Interrupt Request Enable" "0: Frame transmission complete interrupt request is..,1: Frame transmission complete interrupt request is.." bitfld.long 0x0 20. "TDEIP,Transmit Descriptor Empty Interrupt Request Enable" "0: Transmit descriptor empty interrupt request is..,1: Transmit descriptor empty interrupt request is.." newline bitfld.long 0x0 19. "TFUFIP,Transmit FIFO Underflow Interrupt Request Enable" "0: Underflow interrupt request is disabled.,1: Underflow interrupt request is enabled." bitfld.long 0x0 18. "FRIP,Frame Receive Interrupt Request Enable" "0: Frame reception interrupt request is disabled.,1: Frame reception interrupt request is enabled." newline bitfld.long 0x0 17. "RDEIP,Receive Descriptor Empty Interrupt Request Enable" "0: Receive descriptor empty interrupt request is..,1: Receive descriptor empty interrupt request is.." bitfld.long 0x0 16. "RFOFIP,Receive FIFO Overflow Interrupt Request Enable" "0: Overflow interrupt request is disabled.,1: Overflow interrupt request is enabled." newline hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 11. "CNDIP,Carrier Not Detect Interrupt Request Enable" "0: Carrier not detect interrupt request is disabled.,1: Carrier not detect interrupt request is enabled." newline bitfld.long 0x0 10. "DLCIP,Loss of Carrier Detect Interrupt Request Enable" "0: Loss of carrier detect interrupt request is..,1: Loss of carrier detect interrupt request is.." bitfld.long 0x0 9. "CDIP,Late Collision Detect Interrupt Request Enable" "0: Late collision detect interrupt request is..,1: Late collision detect interrupt request is.." newline bitfld.long 0x0 8. "TROIP,Transmit Retry Over Interrupt Request Enable" "0: Transmit retry over interrupt request is disabled.,1: Transmit retry over interrupt request is enabled." bitfld.long 0x0 7. "RMAFIP,Multicast Address Frame Receive Interrupt Request Enable" "0: Multicast address frame receive interrupt..,1: Multicast address frame receive interrupt.." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 4. "RRFIP,Alignment Error Interrupt Request Enable" "0: Alignment error interrupt request is disabled.,1: Alignment error interrupt request is enabled." newline bitfld.long 0x0 3. "RTLFIP,Frame-Too-Long Error Interrupt Request Enable" "0: Frame-too-long error interrupt request is..,1: Frame-too-long error interrupt request is enabled." bitfld.long 0x0 2. "RTSFIP,Frame-Too-Short Error Interrupt Request Enable" "0: Frame-too-short error interrupt request is..,1: Frame-too-short error interrupt request is.." newline bitfld.long 0x0 1. "PREIP,PHY-LSI Receive Error Interrupt Request Enable" "0: PHY-LSI receive error interrupt request is..,1: PHY-LSI receive error interrupt request is.." bitfld.long 0x0 0. "CERFIP,CRC Error Interrupt Request Enable" "0: CRC error interrupt request is disabled.,1: CRC error interrupt request is enabled." group.long 0x38++0x3 line.long 0x0 "TRSCER,ETHERC/EDMAC Transmit/Receive Status Copy Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 7. "RMAFCE,RMAF Flag Copy Enable" "0: The EDMACn.EESR.RMAF flag status is reflected in..,1: The EDMACn.EESR.RMAF flag status is not.." bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 4. "RRFCE,RRF Flag Copy Enable" "0: The EDMACn.EESR.RRF flag status is reflected in..,1: The EDMACn.EESR.RRF flag status is not reflected.." hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0x40++0x3 line.long 0x0 "RMFCR,Missed-Frame Counter Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "MFC,Missed-Frame CounterThese bits indicate the number of frames that are discarded and not transferred to the receive buffer during reception." group.long 0x48++0x3 line.long 0x0 "TFTR,Transmit FIFO Threshold Register" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." hexmask.long.word 0x0 0.--10. 1. "TFT,Transmit FIFO Threshold00Dh to 200h: The threshold is the set value multiplied by 4. Example: 00Dh: 52 bytes 040h: 256 bytes 100h: 1024 bytes 200h: 2048 bytes" group.long 0x50++0x3 line.long 0x0 "FDR,Transmit FIFO Threshold Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." hexmask.long.byte 0x0 8.--12. 1. "TFD,Receive FIFO Depth" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "RFD,Transmit FIFO Depth" group.long 0x58++0x3 line.long 0x0 "RMCR,Receive Method Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "RNR,Receive Request Reset" "0: EDRRR.RR bit (receive request bit) is set to 0..,1: EDRRR.RR bit (receive request bit) is not set to.." group.long 0x64++0xF line.long 0x0 "TFUCR,Transmit FIFO Underflow Counter" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "UNDER,Transmit FIFO Underflow CountThese bits indicate how many times the transmit FIFO has underflowed. The counter stops when the counter value reaches FFFFh." line.long 0x4 "RFOCR,Receive FIFO Overflow Counter" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "OVER,Receive FIFO Overflow CountThese bits indicate how many times the receive FIFO has overflowed. The counter stops when the counter value reaches FFFFh." line.long 0x8 "IOSR,Independent Output Signal Setting Register" hexmask.long 0x8 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x8 0. "ELB,External Loopback Mode" "0: The ETn_EXOUT pin outputs low.,1: The ETn_EXOUT pin outputs high." line.long 0xC "FCFTR,Flow Control Start FIFO Threshold Setting Register" hexmask.long.word 0xC 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0xC 16.--18. "RFFO,Receive FIFO Frame PAUSE Output Threshold(When ((RFFO+1)x2) receive frames have been stored in the receive FIFO.)" "0: When 2 receive frames have been stored in the..,1: When 4 receive frames have been stored in the..,?,?,?,?,?,?" newline hexmask.long.word 0xC 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0xC 0.--2. "RFDO,Receive FIFO Data PAUSE Output Threshold(When (RFDO+1)x256-32 bytes of data is stored in the receive FIFO.)" "0: When 224 ( 256 - 32) bytes of data is stored in..,1: When 480 ( 512 - 32) bytes of data is stored in..,?,?,?,?,?,?" group.long 0x78++0x7 line.long 0x0 "RPADIR,Receive Data Padding Insert Register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x0 16.--17. "PADS,Padding Size" "0: No padding is inserted.,1: 1 byte is inserted.,?,?" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." hexmask.long.byte 0x0 0.--5. 1. "PADR,Padding Slot" line.long 0x4 "TRIMD,Transmit Interrupt Setting Register" hexmask.long 0x4 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." bitfld.long 0x4 4. "TIM,Transmit Interrupt Mode" "0: Transmission complete interrupt mode: An..,1: Write-back complete interrupt mode: An interrupt.." newline bitfld.long 0x4 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 0. "TIS,Transmit Interrupt EnableSet the EESR.TWB flag to 1 in the mode selected by the TIM bit to notify an interrupt." "0: Transmit Interrupt is disabled.,1: Transmit Interrupt is enabled." rgroup.long 0xC8++0x7 line.long 0x0 "RBWAR,Receive Buffer Write Address Register" hexmask.long 0x0 0.--31. 1. "RBWAR,Receive Buffer Write Address RegisterThe RBWAR register indicates the last address that the EDMAC has written data to when writing to the receive buffer.Refer to the address indicated by the RBWAR register to recognize which address in the receive.." line.long 0x4 "RDFAR,Receive Descriptor Fetch Address Register" hexmask.long 0x4 0.--31. 1. "RDFAR,Receive Descriptor Fetch Address RegisterThe RDFAR register indicates the start address of the last fetched receive descriptor when the EDMAC fetches descriptor information from the receive descriptor.Refer to the address indicated by the RDFAR.." rgroup.long 0xD4++0x7 line.long 0x0 "TBRAR,Transmit Buffer Read Address Register" hexmask.long 0x0 0.--31. 1. "TBRAR,Transmit Buffer Read Address RegisterThe TBRAR register indicates the last address that the EDMAC has read data from when reading data from the transmit buffer.Refer to the address indicated by the TBRAR register to recognize which address in the.." line.long 0x4 "TDFAR,Transmit Descriptor Fetch Address Register" hexmask.long 0x4 0.--31. 1. "TDFAR,Transmit Descriptor Fetch Address RegisterThe TDFAR register indicates the start address of the last fetched transmit descriptor when the EDMAC fetches descriptor information from the transmit descriptor.Refer to the address indicated by the TDFAR.." tree.end tree.end tree "ELC (Event Link Controller)" base ad:0x0 tree "ELC" base ad:0x40201000 group.byte 0x0++0x0 line.byte 0x0 "ELCR,Event Link Controller Register" bitfld.byte 0x0 7. "ELCON,All Event Link Enable" "0: Disable ELC function,1: Enable ELC function." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x4)++0x0 line.byte 0x0 "ELSEGR$1,Event Link Software Event Generation Register %s" bitfld.byte 0x0 7. "WI,ELSEGR Register Write Disable" "0: Enable writes to ELSEGR register,1: Disable writes to ELSEGR register." bitfld.byte 0x0 6. "WE,SEG Bit Write Enable" "0: Disable writes to SEG bit,1: Enable writes to SEG bit" hexmask.byte 0x0 1.--5. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 0. "SEG,Software Event Generation" "0: Normal operation,1: Generate a software event" repeat.end repeat 18. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x20)++0x1 line.word 0x0 "ELSR$1,Event Link Setting Register %s" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "ELS,Event Link Select" repeat.end group.word 0x98++0x1 line.word 0x0 "ELSR30,Event Link Setting Register 30" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "ELS,Event Link Select" group.long 0xE0++0x7 line.long 0x0 "ELCSARA,Event Link Controller Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 2. "ELSEGR1,Event Link Software Event Generation Register 1Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x0 1. "ELSEGR0,Event Link Software Event Generation Register 0Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x0 0. "ELCR,Event Link Controller RegisterSecurity Attribution" "0: Secure,1: NonSecure" line.long 0x4 "ELCSARB,Event Link Controller Security Attribution Register B" bitfld.long 0x4 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 30. "ELSR30,Event Link Setting Register 30Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 18. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 17. "ELSR17,Event Link Setting Register 17Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 16. "ELSR16,Event Link Setting Register 16Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 15. "ELSR15,Event Link Setting Register 15Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 14. "ELSR14,Event Link Setting Register 14Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 13. "ELSR13,Event Link Setting Register 13Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 12. "ELSR12,Event Link Setting Register 12Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 11. "ELSR11,Event Link Setting Register 11Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 10. "ELSR10,Event Link Setting Register 10Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 9. "ELSR9,Event Link Setting Register 9Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 8. "ELSR8,Event Link Setting Register 8Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 7. "ELSR7,Event Link Setting Register 7Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 6. "ELSR6,Event Link Setting Register 6Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 5. "ELSR5,Event Link Setting Register 5Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 4. "ELSR4,Event Link Setting Register 4Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 3. "ELSR3,Event Link Setting Register 3Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 2. "ELSR2,Event Link Setting Register 2Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 1. "ELSR1,Event Link Setting Register 1Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 0. "ELSR0,Event Link Setting Register 0Security Attribution" "0: Secure,1: NonSecure" group.long 0xF0++0x7 line.long 0x0 "ELCPARA,Event Link Controller Priviledge Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 1111111111111. The write value should be 1111111111111." bitfld.long 0x0 2. "ELSEGR1,Event Link Software Event Generation Register 1Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x0 1. "ELSEGR0,Event Link Software Event Generation Register 0Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x0 0. "ELCR,Event Link Controller RegisterPriviledge Attribution" "0: Priviledge,1: AnyPriviledge" line.long 0x4 "ELCPARB,Event Link Controller Priviledge Attribution Register B" bitfld.long 0x4 31. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 30. "ELSR30,Event Link Setting Register 30Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 29. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 28. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 27. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 26. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 22. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 20. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 18. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 17. "ELSR17,Event Link Setting Register 17Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 16. "ELSR16,Event Link Setting Register 16Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 15. "ELSR15,Event Link Setting Register 15Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 14. "ELSR14,Event Link Setting Register 14Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 13. "ELSR13,Event Link Setting Register 13Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 12. "ELSR12,Event Link Setting Register 12Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 11. "ELSR11,Event Link Setting Register 11Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 10. "ELSR10,Event Link Setting Register 10Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 9. "ELSR9,Event Link Setting Register 9Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 8. "ELSR8,Event Link Setting Register 8Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 7. "ELSR7,Event Link Setting Register 7Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 6. "ELSR6,Event Link Setting Register 6Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 5. "ELSR5,Event Link Setting Register 5Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 4. "ELSR4,Event Link Setting Register 4Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 3. "ELSR3,Event Link Setting Register 3Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 2. "ELSR2,Event Link Setting Register 2Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 1. "ELSR1,Event Link Setting Register 1Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 0. "ELSR0,Event Link Setting Register 0Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" tree.end tree "ELC_NS" base ad:0x50201000 group.byte 0x0++0x0 line.byte 0x0 "ELCR,Event Link Controller Register" bitfld.byte 0x0 7. "ELCON,All Event Link Enable" "0: Disable ELC function,1: Enable ELC function." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x4)++0x0 line.byte 0x0 "ELSEGR$1,Event Link Software Event Generation Register %s" bitfld.byte 0x0 7. "WI,ELSEGR Register Write Disable" "0: Enable writes to ELSEGR register,1: Disable writes to ELSEGR register." bitfld.byte 0x0 6. "WE,SEG Bit Write Enable" "0: Disable writes to SEG bit,1: Enable writes to SEG bit" hexmask.byte 0x0 1.--5. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 0. "SEG,Software Event Generation" "0: Normal operation,1: Generate a software event" repeat.end repeat 18. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x20)++0x1 line.word 0x0 "ELSR$1,Event Link Setting Register %s" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "ELS,Event Link Select" repeat.end group.word 0x98++0x1 line.word 0x0 "ELSR30,Event Link Setting Register 30" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "ELS,Event Link Select" group.long 0xE0++0x7 line.long 0x0 "ELCSARA,Event Link Controller Security Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 2. "ELSEGR1,Event Link Software Event Generation Register 1Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x0 1. "ELSEGR0,Event Link Software Event Generation Register 0Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x0 0. "ELCR,Event Link Controller RegisterSecurity Attribution" "0: Secure,1: NonSecure" line.long 0x4 "ELCSARB,Event Link Controller Security Attribution Register B" bitfld.long 0x4 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 30. "ELSR30,Event Link Setting Register 30Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 18. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 17. "ELSR17,Event Link Setting Register 17Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 16. "ELSR16,Event Link Setting Register 16Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 15. "ELSR15,Event Link Setting Register 15Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 14. "ELSR14,Event Link Setting Register 14Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 13. "ELSR13,Event Link Setting Register 13Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 12. "ELSR12,Event Link Setting Register 12Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 11. "ELSR11,Event Link Setting Register 11Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 10. "ELSR10,Event Link Setting Register 10Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 9. "ELSR9,Event Link Setting Register 9Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 8. "ELSR8,Event Link Setting Register 8Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 7. "ELSR7,Event Link Setting Register 7Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 6. "ELSR6,Event Link Setting Register 6Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 5. "ELSR5,Event Link Setting Register 5Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 4. "ELSR4,Event Link Setting Register 4Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 3. "ELSR3,Event Link Setting Register 3Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 2. "ELSR2,Event Link Setting Register 2Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x4 1. "ELSR1,Event Link Setting Register 1Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x4 0. "ELSR0,Event Link Setting Register 0Security Attribution" "0: Secure,1: NonSecure" group.long 0xF0++0x7 line.long 0x0 "ELCPARA,Event Link Controller Priviledge Attribution Register A" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." hexmask.long.word 0x0 3.--15. 1. "Reserved,These bits are read as 1111111111111. The write value should be 1111111111111." bitfld.long 0x0 2. "ELSEGR1,Event Link Software Event Generation Register 1Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x0 1. "ELSEGR0,Event Link Software Event Generation Register 0Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x0 0. "ELCR,Event Link Controller RegisterPriviledge Attribution" "0: Priviledge,1: AnyPriviledge" line.long 0x4 "ELCPARB,Event Link Controller Priviledge Attribution Register B" bitfld.long 0x4 31. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 30. "ELSR30,Event Link Setting Register 30Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 29. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 28. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 27. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 26. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 22. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 20. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 18. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 17. "ELSR17,Event Link Setting Register 17Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 16. "ELSR16,Event Link Setting Register 16Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 15. "ELSR15,Event Link Setting Register 15Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 14. "ELSR14,Event Link Setting Register 14Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 13. "ELSR13,Event Link Setting Register 13Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 12. "ELSR12,Event Link Setting Register 12Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 11. "ELSR11,Event Link Setting Register 11Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 10. "ELSR10,Event Link Setting Register 10Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 9. "ELSR9,Event Link Setting Register 9Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 8. "ELSR8,Event Link Setting Register 8Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 7. "ELSR7,Event Link Setting Register 7Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 6. "ELSR6,Event Link Setting Register 6Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 5. "ELSR5,Event Link Setting Register 5Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 4. "ELSR4,Event Link Setting Register 4Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 3. "ELSR3,Event Link Setting Register 3Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 2. "ELSR2,Event Link Setting Register 2Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" newline bitfld.long 0x4 1. "ELSR1,Event Link Setting Register 1Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" bitfld.long 0x4 0. "ELSR0,Event Link Setting Register 0Priviledge Attribution" "0: Priviledge,1: AnyPriviledge" tree.end tree.end tree "ETHERC (Ethernet MAC Controller)" base ad:0x0 tree "ETHERC0" base ad:0x40354100 group.long 0x0++0x3 line.long 0x0 "ECMR,ETHERC Mode Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "TPC,PAUSE Frame Transmit" "0: PAUSE frame is transmitted even during a PAUSE..,1: PAUSE frame is not transmitted during a PAUSE.." newline bitfld.long 0x0 19. "ZPF,0 Time PAUSE Frame Enable" "0: PAUSE frame that contains the pause_time..,1: PAUSE frame that contains the pause_time.." bitfld.long 0x0 18. "PFR,PAUSE Frame Receive Mode" "0: PAUSE frame is not transferred to the EDMAC.,1: PAUSE frame is transferred to the EDMAC." newline bitfld.long 0x0 17. "RXF,Receive Flow Control Operating Mode" "0: PAUSE frame detection is disabled.,1: PAUSE frame detection is enabled." bitfld.long 0x0 16. "TXF,Transmit Flow Control Operating Mode" "0: Automatic PAUSE frame transmission is..,1: Automatic PAUSE frame transmission is.." newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "PRCEF,CRC Error Frame Receive Mode" "0: EDMAC is notified of a CRC error.,1: EDMAC is not notified of a CRC error." newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 9. "MPDE,Magic Packet Detection Enable" "0: Magic Packet detection is disabled.,1: Magic Packet detection is enabled." newline bitfld.long 0x0 7.--8. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 6. "RE,Reception Enable" "0: Receive function is disabled.,1: Receive function is enabled." newline bitfld.long 0x0 5. "TE,Transmission Enable" "0: Transmit function is disabled.,1: Transmit function is enabled." bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 3. "ILB,Internal Loopback Mode" "0: Normal data transmission or reception is..,1: Data is looped back in the ETHERC when.." bitfld.long 0x0 2. "RTM,Bit Rate" "0: 10 Mbps,1: 100 Mbps" newline bitfld.long 0x0 1. "DM,Duplex Mode" "0: Half-duplex mode,1: Full-duplex mode" bitfld.long 0x0 0. "PRM,Promiscuous Mode" "0: Promiscuous mode is disabled.,1: Promiscuous mode is enabled." group.long 0x8++0x3 line.long 0x0 "RFLR,Receive Frame Maximum Length Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.word 0x0 0.--11. 1. "RFL,Receive Frame Maximum LengthThe set value becomes the maximum frame length. The minimum value that can be set is 1 518 bytes and the maximum value that can be set is 2 048 bytes. Values that are less than 1 518 bytes are regarded as 1 518 bytes and.." group.long 0x10++0x3 line.long 0x0 "ECSR,ETHERC Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline eventfld.long 0x0 5. "BFR,Continuous Broadcast Frame Reception Flag" "0: Continuous reception of broadcast frames has not..,1: Continuous reception of broadcast frames has.." eventfld.long 0x0 4. "PSRTO,PAUSE Frame Retransmit Over Flag" "0: PAUSE frame retransmit count has not reached the..,1: PAUSE frame retransmit count has reached the.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 2. "LCHNG,LCHNG Link Signal Change Flag" "0: Change in the ETn_LINKSTA signal has not been..,1: Change in the ETn_LINKSTA signal has been.." newline eventfld.long 0x0 1. "MPD,Magic Packet Detect Flag" "0: Magic Packet has not been detected.,1: Magic Packet has been detected." eventfld.long 0x0 0. "ICD,False Carrier Detect Flag" "0: PHY-LSI has not detected a false carrier on the..,1: PHY-LSI has detected a false carrier on the line." group.long 0x18++0x3 line.long 0x0 "ECSIPR,ETHERC Interrupt Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x0 5. "BFSIPR,Continuous Broadcast Frame Reception Interrupt Enable" "0: Notification of continuous broadcast frame..,1: Notification of continuous broadcast frame.." bitfld.long 0x0 4. "PSRTOIP,PAUSE Frame Retransmit Over Interrupt Enable" "0: Notification of PAUSE frame retransmit over..,1: Notification of PAUSE frame retransmit over.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "LCHNGIP,LINK Signal Change Interrupt Enable" "0: Notification of ETn_LINKSTA signal change..,1: Notification of ETn_LINKSTA signal change.." newline bitfld.long 0x0 1. "MPDIP,Magic Packet Detect Interrupt Enable" "0: Notification of the Magic Packet detect..,1: Notification of the Magic Packet detect.." bitfld.long 0x0 0. "ICDIP,False Carrier Detect Interrupt Enable" "0: Notification of the false carrier detect..,1: Notification of the false carrier detect.." group.long 0x20++0x3 line.long 0x0 "PIR,PHY Interface Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline rbitfld.long 0x0 3. "MDI,MII/RMII Management Data-InThis bit indicates the level of the ETn_MDIO pin. The write value should be 0." "0,1" bitfld.long 0x0 2. "MDO,MII/RMII Management Data-OutThe MDO bit value is output from the ETn_MDIO pin when the MMD bit is 1 (write). The value is not output when the MMD bit is 0 (read)." "0,1" newline bitfld.long 0x0 1. "MMD,MII/RMII Management Mode" "0: Read,1: Write" bitfld.long 0x0 0. "MDC,MII/RMII Management Data ClockThe MDC bit value is output from the ETn_MDC pin to supply the management data clock to the MII or RMII." "0,1" rgroup.long 0x28++0x3 line.long 0x0 "PSR,PHY Status Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000." bitfld.long 0x0 0. "LMON,ETn_LINKSTA Pin Status FlagThe link status can be read by connecting the link signal output from the PHY-LSI to the ETn_LINKSTA pin. For details on the polarity refer to the specifications of the connected PHY-LSI." "0,1" group.long 0x40++0x3 line.long 0x0 "RDMLR,Random Number Generation Counter Upper Limit Setting Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.tbyte 0x0 0.--19. 1. "RMD,Random Number Generation Counter" group.long 0x50++0xB line.long 0x0 "IPGR,IPG Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." hexmask.long.byte 0x0 0.--4. 1. "IPG,Interpacket Gap Range from 16bit time(0x00) to 140bit time(0x1F)" line.long 0x4 "APR,Automatic PAUSE Frame Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "AP,Automatic PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is automatically transmitted. Transmission is not performed until the set value multiplied by 512 bit time has elapsed." line.long 0x8 "MPR,Manual PAUSE Frame Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x8 0.--15. 1. "MP,Manual PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is manually transmitted. Transmission is not performed until the set value multiplied by 512 bit time has elapsed. The read value is undefined." rgroup.long 0x60++0x3 line.long 0x0 "RFCF,Received PAUSE Frame Counter" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RPAUSE,Received PAUSE Frame CountNumber of received PAUSE frames" group.long 0x64++0x3 line.long 0x0 "TPAUSER,PAUSE Frame Retransmit Count Setting Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "TPAUSE,Automatic PAUSE Frame Retransmit Setting" rgroup.long 0x68++0x3 line.long 0x0 "TPAUSECR,PAUSE Frame Retransmit Counter" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TXP,PAUSE Frame Retransmit CountNumber of times a PAUSE frame was retransmitted" group.long 0x6C++0x3 line.long 0x0 "BCFRR,Broadcast Frame Receive Count Setting Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "BCF,Broadcast Frame Continuous Receive Count Setting" group.long 0xC0++0x3 line.long 0x0 "MAHR,MAC Address Upper Bit Register" hexmask.long 0x0 0.--31. 1. "MAHR,MAC Address Upper Bit RegisterThe MAHR register sets the upper 32 bits (b47 to b16) of the 48-bit MAC address." group.long 0xC8++0x3 line.long 0x0 "MALR,MAC Address Lower Bit Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "MALR,MAC Address Lower Bit RegisterThe MALR register sets the lower 16 bits of the 48-bit MAC address." group.long 0xD0++0xF line.long 0x0 "TROCR,Transmit Retry Over Counter Register" hexmask.long 0x0 0.--31. 1. "TROCR,Transmit Retry Over Counter RegisterThe TROCR register is a counter indicating the number of frames that fail to be retransmitted." line.long 0x4 "CDCR,Late Collision Detect Counter Register" hexmask.long 0x4 0.--31. 1. "CDCR,Late Collision Detect Counter RegisterThe CDCR register is a counter indicating the number of late collisions that have been detected after transmission starts." line.long 0x8 "LCCR,Lost Carrier Counter Register" hexmask.long 0x8 0.--31. 1. "LCCR,Lost Carrier Counter RegisterThe LCCR register is a counter indicating the number of times a loss of carrier is detected during frame transmission." line.long 0xC "CNDCR,Carrier Not Detect Counter Register" hexmask.long 0xC 0.--31. 1. "CNDCR,Carrier Not Detect Counter RegisterThe CNDCR register is a counter indicating the number of times a carrier is not detected during preamble transmission." group.long 0xE4++0x17 line.long 0x0 "CEFCR,CRC Error Frame Receive Counter Register" hexmask.long 0x0 0.--31. 1. "CEFCR,CRC Error Frame Receive Counter RegisterThe CEFCR register is a counter indicating the number of received frames where a CRC error has been detected." line.long 0x4 "FRECR,Frame Receive Error Counter Register" hexmask.long 0x4 0.--31. 1. "FRECR,Frame Receive Error Counter RegisterThe FRECR register is a counter indicating the number of times a frame receive error has occurred." line.long 0x8 "TSFRCR,Too-Short Frame Receive Counter Register" hexmask.long 0x8 0.--31. 1. "TSFRCR,Too-Short Frame Receive Counter RegisterThe TSFRCR register is a counter indicating the number of times a short frame that is shorter than 64 bytes has been received." line.long 0xC "TLFRCR,Too-Long Frame Receive Counter Register" hexmask.long 0xC 0.--31. 1. "TLFRCR,Too-Long Frame Receive Counter RegisterThe TLFRCR register is a counter indicating the number of times a long frame that is longer than the RFLR register value has been received." line.long 0x10 "RFCR,Received Alignment Error Frame Counter Register" hexmask.long 0x10 0.--31. 1. "RFCR,Received Alignment Error Frame Counter RegisterThe RFCR register is a counter indicating the number of times a frame has been received with the alignment error (frame is not an integral number of octets)." line.long 0x14 "MAFCR,Multicast Address Frame Receive Counter Register" hexmask.long 0x14 0.--31. 1. "MAFCR,Multicast Address Frame Receive Counter RegisterThe MAFCR register is a counter indicating the number of times a frame where the multicast address is set has been received." tree.end tree "ETHERC0_NS" base ad:0x50354100 group.long 0x0++0x3 line.long 0x0 "ECMR,ETHERC Mode Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "TPC,PAUSE Frame Transmit" "0: PAUSE frame is transmitted even during a PAUSE..,1: PAUSE frame is not transmitted during a PAUSE.." newline bitfld.long 0x0 19. "ZPF,0 Time PAUSE Frame Enable" "0: PAUSE frame that contains the pause_time..,1: PAUSE frame that contains the pause_time.." bitfld.long 0x0 18. "PFR,PAUSE Frame Receive Mode" "0: PAUSE frame is not transferred to the EDMAC.,1: PAUSE frame is transferred to the EDMAC." newline bitfld.long 0x0 17. "RXF,Receive Flow Control Operating Mode" "0: PAUSE frame detection is disabled.,1: PAUSE frame detection is enabled." bitfld.long 0x0 16. "TXF,Transmit Flow Control Operating Mode" "0: Automatic PAUSE frame transmission is..,1: Automatic PAUSE frame transmission is.." newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "PRCEF,CRC Error Frame Receive Mode" "0: EDMAC is notified of a CRC error.,1: EDMAC is not notified of a CRC error." newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 9. "MPDE,Magic Packet Detection Enable" "0: Magic Packet detection is disabled.,1: Magic Packet detection is enabled." newline bitfld.long 0x0 7.--8. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 6. "RE,Reception Enable" "0: Receive function is disabled.,1: Receive function is enabled." newline bitfld.long 0x0 5. "TE,Transmission Enable" "0: Transmit function is disabled.,1: Transmit function is enabled." bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 3. "ILB,Internal Loopback Mode" "0: Normal data transmission or reception is..,1: Data is looped back in the ETHERC when.." bitfld.long 0x0 2. "RTM,Bit Rate" "0: 10 Mbps,1: 100 Mbps" newline bitfld.long 0x0 1. "DM,Duplex Mode" "0: Half-duplex mode,1: Full-duplex mode" bitfld.long 0x0 0. "PRM,Promiscuous Mode" "0: Promiscuous mode is disabled.,1: Promiscuous mode is enabled." group.long 0x8++0x3 line.long 0x0 "RFLR,Receive Frame Maximum Length Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.word 0x0 0.--11. 1. "RFL,Receive Frame Maximum LengthThe set value becomes the maximum frame length. The minimum value that can be set is 1 518 bytes and the maximum value that can be set is 2 048 bytes. Values that are less than 1 518 bytes are regarded as 1 518 bytes and.." group.long 0x10++0x3 line.long 0x0 "ECSR,ETHERC Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline eventfld.long 0x0 5. "BFR,Continuous Broadcast Frame Reception Flag" "0: Continuous reception of broadcast frames has not..,1: Continuous reception of broadcast frames has.." eventfld.long 0x0 4. "PSRTO,PAUSE Frame Retransmit Over Flag" "0: PAUSE frame retransmit count has not reached the..,1: PAUSE frame retransmit count has reached the.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" eventfld.long 0x0 2. "LCHNG,LCHNG Link Signal Change Flag" "0: Change in the ETn_LINKSTA signal has not been..,1: Change in the ETn_LINKSTA signal has been.." newline eventfld.long 0x0 1. "MPD,Magic Packet Detect Flag" "0: Magic Packet has not been detected.,1: Magic Packet has been detected." eventfld.long 0x0 0. "ICD,False Carrier Detect Flag" "0: PHY-LSI has not detected a false carrier on the..,1: PHY-LSI has detected a false carrier on the line." group.long 0x18++0x3 line.long 0x0 "ECSIPR,ETHERC Interrupt Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x0 5. "BFSIPR,Continuous Broadcast Frame Reception Interrupt Enable" "0: Notification of continuous broadcast frame..,1: Notification of continuous broadcast frame.." bitfld.long 0x0 4. "PSRTOIP,PAUSE Frame Retransmit Over Interrupt Enable" "0: Notification of PAUSE frame retransmit over..,1: Notification of PAUSE frame retransmit over.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "LCHNGIP,LINK Signal Change Interrupt Enable" "0: Notification of ETn_LINKSTA signal change..,1: Notification of ETn_LINKSTA signal change.." newline bitfld.long 0x0 1. "MPDIP,Magic Packet Detect Interrupt Enable" "0: Notification of the Magic Packet detect..,1: Notification of the Magic Packet detect.." bitfld.long 0x0 0. "ICDIP,False Carrier Detect Interrupt Enable" "0: Notification of the false carrier detect..,1: Notification of the false carrier detect.." group.long 0x20++0x3 line.long 0x0 "PIR,PHY Interface Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline rbitfld.long 0x0 3. "MDI,MII/RMII Management Data-InThis bit indicates the level of the ETn_MDIO pin. The write value should be 0." "0,1" bitfld.long 0x0 2. "MDO,MII/RMII Management Data-OutThe MDO bit value is output from the ETn_MDIO pin when the MMD bit is 1 (write). The value is not output when the MMD bit is 0 (read)." "0,1" newline bitfld.long 0x0 1. "MMD,MII/RMII Management Mode" "0: Read,1: Write" bitfld.long 0x0 0. "MDC,MII/RMII Management Data ClockThe MDC bit value is output from the ETn_MDC pin to supply the management data clock to the MII or RMII." "0,1" rgroup.long 0x28++0x3 line.long 0x0 "PSR,PHY Status Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000." bitfld.long 0x0 0. "LMON,ETn_LINKSTA Pin Status FlagThe link status can be read by connecting the link signal output from the PHY-LSI to the ETn_LINKSTA pin. For details on the polarity refer to the specifications of the connected PHY-LSI." "0,1" group.long 0x40++0x3 line.long 0x0 "RDMLR,Random Number Generation Counter Upper Limit Setting Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.tbyte 0x0 0.--19. 1. "RMD,Random Number Generation Counter" group.long 0x50++0xB line.long 0x0 "IPGR,IPG Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." hexmask.long.byte 0x0 0.--4. 1. "IPG,Interpacket Gap Range from 16bit time(0x00) to 140bit time(0x1F)" line.long 0x4 "APR,Automatic PAUSE Frame Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "AP,Automatic PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is automatically transmitted. Transmission is not performed until the set value multiplied by 512 bit time has elapsed." line.long 0x8 "MPR,Manual PAUSE Frame Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x8 0.--15. 1. "MP,Manual PAUSE Time SettingThese bits set the value of the pause_time parameter for a PAUSE frame that is manually transmitted. Transmission is not performed until the set value multiplied by 512 bit time has elapsed. The read value is undefined." rgroup.long 0x60++0x3 line.long 0x0 "RFCF,Received PAUSE Frame Counter" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RPAUSE,Received PAUSE Frame CountNumber of received PAUSE frames" group.long 0x64++0x3 line.long 0x0 "TPAUSER,PAUSE Frame Retransmit Count Setting Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "TPAUSE,Automatic PAUSE Frame Retransmit Setting" rgroup.long 0x68++0x3 line.long 0x0 "TPAUSECR,PAUSE Frame Retransmit Counter" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TXP,PAUSE Frame Retransmit CountNumber of times a PAUSE frame was retransmitted" group.long 0x6C++0x3 line.long 0x0 "BCFRR,Broadcast Frame Receive Count Setting Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "BCF,Broadcast Frame Continuous Receive Count Setting" group.long 0xC0++0x3 line.long 0x0 "MAHR,MAC Address Upper Bit Register" hexmask.long 0x0 0.--31. 1. "MAHR,MAC Address Upper Bit RegisterThe MAHR register sets the upper 32 bits (b47 to b16) of the 48-bit MAC address." group.long 0xC8++0x3 line.long 0x0 "MALR,MAC Address Lower Bit Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "MALR,MAC Address Lower Bit RegisterThe MALR register sets the lower 16 bits of the 48-bit MAC address." group.long 0xD0++0xF line.long 0x0 "TROCR,Transmit Retry Over Counter Register" hexmask.long 0x0 0.--31. 1. "TROCR,Transmit Retry Over Counter RegisterThe TROCR register is a counter indicating the number of frames that fail to be retransmitted." line.long 0x4 "CDCR,Late Collision Detect Counter Register" hexmask.long 0x4 0.--31. 1. "CDCR,Late Collision Detect Counter RegisterThe CDCR register is a counter indicating the number of late collisions that have been detected after transmission starts." line.long 0x8 "LCCR,Lost Carrier Counter Register" hexmask.long 0x8 0.--31. 1. "LCCR,Lost Carrier Counter RegisterThe LCCR register is a counter indicating the number of times a loss of carrier is detected during frame transmission." line.long 0xC "CNDCR,Carrier Not Detect Counter Register" hexmask.long 0xC 0.--31. 1. "CNDCR,Carrier Not Detect Counter RegisterThe CNDCR register is a counter indicating the number of times a carrier is not detected during preamble transmission." group.long 0xE4++0x17 line.long 0x0 "CEFCR,CRC Error Frame Receive Counter Register" hexmask.long 0x0 0.--31. 1. "CEFCR,CRC Error Frame Receive Counter RegisterThe CEFCR register is a counter indicating the number of received frames where a CRC error has been detected." line.long 0x4 "FRECR,Frame Receive Error Counter Register" hexmask.long 0x4 0.--31. 1. "FRECR,Frame Receive Error Counter RegisterThe FRECR register is a counter indicating the number of times a frame receive error has occurred." line.long 0x8 "TSFRCR,Too-Short Frame Receive Counter Register" hexmask.long 0x8 0.--31. 1. "TSFRCR,Too-Short Frame Receive Counter RegisterThe TSFRCR register is a counter indicating the number of times a short frame that is shorter than 64 bytes has been received." line.long 0xC "TLFRCR,Too-Long Frame Receive Counter Register" hexmask.long 0xC 0.--31. 1. "TLFRCR,Too-Long Frame Receive Counter RegisterThe TLFRCR register is a counter indicating the number of times a long frame that is longer than the RFLR register value has been received." line.long 0x10 "RFCR,Received Alignment Error Frame Counter Register" hexmask.long 0x10 0.--31. 1. "RFCR,Received Alignment Error Frame Counter RegisterThe RFCR register is a counter indicating the number of times a frame has been received with the alignment error (frame is not an integral number of octets)." line.long 0x14 "MAFCR,Multicast Address Frame Receive Counter Register" hexmask.long 0x14 0.--31. 1. "MAFCR,Multicast Address Frame Receive Counter RegisterThe MAFCR register is a counter indicating the number of times a frame where the multicast address is set has been received." tree.end tree.end tree "FACI (Flash Application Command Interface)" base ad:0x0 tree "FACI" base ad:0x4011E000 group.byte 0x10++0x0 line.byte 0x0 "FASTAT,Flash Access Status Register" bitfld.byte 0x0 7. "CFAE,Code Flash Access Error" "0: No code flash access error has occurred.,1: Code flash access error has occurred." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.byte 0x0 4. "CMDLK,Command Lock" "0: Flash sequencer is not in 'Command Lock' state.,1: Flash sequencer is in 'Command Lock' state." bitfld.byte 0x0 3. "DFAE,Data Flash Access Error" "0: No data flash access error has occurred.,1: Data flash access error has occurred." newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0x14++0x0 line.byte 0x0 "FAEINT,Flash Access Error Interrupt Enable Register" bitfld.byte 0x0 7. "CFAEIE,Code Flash Access Error Interrupt Enable" "0: Does not generate 'intflerr' interrupt request..,1: Generates 'intflerr' interrupt request when CFAE.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 4. "CMDLKIE,Command Lock Interrupt Enable" "0: Does not generate 'intflerr' interrupt request..,1: Generates 'intflerr' interrupt request when.." bitfld.byte 0x0 3. "DFAEIE,Data Flash Access Error Interrupt Enable" "0: Does not generate 'intflerr' interrupt request..,1: Generates 'intflerr' interrupt request when DFAE.." newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0x18++0x0 line.byte 0x0 "FRDYIE,Flash Ready Interrupt Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "FRDYIE,FRDY Interrupt Enable" "0: Does not generate 'intflend' interrupt request..,1: Generates 'intflend' interrupt request when FRDY.." group.long 0x30++0x7 line.long 0x0 "FSADDR,FACI Command Start Address Register" hexmask.long 0x0 0.--31. 1. "FSADDR,Start Address of Flash Sequencer Command Target AreaThese bits can be written when FRDY bit of FSTATR register is '1'. Writing to these bits in FRDY = '0' is ignored." line.long 0x4 "FEADDR,FACI Command End Address Register" hexmask.long 0x4 0.--31. 1. "FEADDR,End Address of Flash Sequencer Command Target AreaSpecifies end address of target area in 'Blank Check' command.These bits can be written when FRDY bit of FSTATR register is '1'. Writing to these bits in FRDY = '0' is ignored." group.word 0x44++0x1 line.word 0x0 "FMEPROT,Flash P/E Mode Entry Protection Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key CodeThese bits enable or disable CEPROT bit modification. The data written to these bits are not stored." hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline rbitfld.word 0x0 1. "CPSTAT,fac_cpstat pin Monitor" "0: Protection by CEPROT bit is enabled.,1: Protection by CEPROT bit is disabled." bitfld.word 0x0 0. "CEPROT,Code Flash P/E Mode Entry Protection" "0: FENTRYC bit is not protected.,1: FENTRYC bit is protected." group.byte 0x48++0x0 line.byte 0x0 "FCNTSELR,Flash Counter Select Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "CNTSEL,Counter Select" "0,1,2,3,4,5,6,7" rgroup.long 0x4C++0x7 line.long 0x0 "FCNTDATAR0,Flash Counter Data Register 0" hexmask.long 0x0 0.--31. 1. "CNTRDAT,Counter Read Data" line.long 0x4 "FCNTDATAR1,Flash Counter Data Register 1" hexmask.long 0x4 0.--31. 1. "CNTRDAT,Counter Read Data" group.word 0x60++0x1 line.word 0x0 "FCTRCNTR,Flash Configuration Update Transfer Control Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 1. "TRSEL,Transfer Information Select" "0,1" bitfld.word 0x0 0. "TRTRG,Transfer Start Trigger" "0,1" group.byte 0x64++0x0 line.byte 0x0 "FCTRLSR,Flash Configuration Update Transfer List Select Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TRLIST,Configuration Update Transfer List" "0,1,2,3,4,5,6,7" group.long 0x68++0x3 line.long 0x0 "FCTRADDR,Flash Configuration Update Transfer Address Register" hexmask.long 0x0 0.--31. 1. "CTRA,Configuration Update Transfer Source Address" rgroup.byte 0x6C++0x0 line.byte 0x0 "FCTRSTATR,Flash Configuration Update Transfer Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "TRMD,Transfer Mode Setting Status" "0,1" newline bitfld.byte 0x0 1. "TRAD,Transfer Address Setting Status" "0,1" bitfld.byte 0x0 0. "TRBUSY,Transfer Busy Status" "0,1" group.word 0x78++0x1 line.word 0x0 "FBPROT0,Flash Block Protection" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key CodeThese bits enable or disable BPCN0 bit modification. The data written to these bits are not stored." hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "BPCN0,Block Protection for non-secure CancelDisables block protect for non-secure function" "0: User area is protected.,1: User area is not protected." group.word 0x7C++0x1 line.word 0x0 "FBPROT1,Flash Block Protection for secure Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key CodeThese bits enable or disable BPCN1 bit modification. The data written to these bits are not stored." hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "BPCN1,Block Protection for secure CancelDisables block protection for secure" "0: User area is protected.,1: User area is not protected." rgroup.long 0x80++0x3 line.long 0x0 "FSTATR,Flash Status Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x0 23. "ILGCOMERR,Illegal Command ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" newline bitfld.long 0x0 22. "FESETERR,FENTRY Setting ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" bitfld.long 0x0 21. "SECERR,Security ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" newline bitfld.long 0x0 20. "OTERR,Other ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" bitfld.long 0x0 19. "TZFERR,TrustZone Filter ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" newline bitfld.long 0x0 16.--18. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "FRDY,Flash Ready" "0: 'Program' 'DMA Program' 'Erase' 'Program' or..,1: None of the above is in progress." newline bitfld.long 0x0 14. "ILGLERR,Illegal Command Error" "0: Flash sequencer has not detected any illegal..,1: Flash sequencer has detected an illegal command.." bitfld.long 0x0 13. "ERSERR,Erasure Error" "0: Erasure processing has been completed successfully,1: An error has occurred during erasure" newline bitfld.long 0x0 12. "PRGERR,Programming Error" "0: Programming has been completed successfully,1: An error has occurred during programming" bitfld.long 0x0 11. "SUSRDY,Suspend Ready" "0: Flash sequencer cannot accept 'Program/Erase..,1: Flash sequencer can accept 'Program/Erase.." newline bitfld.long 0x0 10. "DBFULL,Data Buffer Full" "0: Data Buffer is not full,?" bitfld.long 0x0 9. "ERSSPD,Erasure-Suspended Status" "0: Flash sequencer is in status other than the..,1: Flash sequencer is in erasure suspension process.." newline bitfld.long 0x0 8. "PRGSPD,Programming-Suspended Status" "0: Flash sequencer is in status other than the..,1: Flash sequencer is in programming suspension.." bitfld.long 0x0 7. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 6. "FHVEERR,'fhve' Error" "0: No error has been detected.,1: An error has been detected." hexmask.long.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000." group.word 0x84++0x1 line.word 0x0 "FENTRYR,Flash P/E Mode Entry Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY Code" bitfld.word 0x0 7. "FENTRYD,Data Flash P/E Mode EntryThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'AA is written to.." "0: Data flash is in 'Read Mode',1: Data flash is in 'P/E Mode'" newline hexmask.word.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 0. "FENTRYC,Code Flash P/E Mode EntryThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'AA is written to.." "0: Code flash is in 'Read Mode',1: Code flash is in 'P/E Mode'" group.word 0x8C++0x1 line.word 0x0 "FSUINITR,Flash Sequencer Set-Up Initialization Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "SUINIT,Set-up InitializationThis bit can be written when FRDY bit of FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'2D is written to KEY bits." "0: Set-up registers keep its' value.,1: Set-up registers are initialized." rgroup.word 0xA0++0x1 line.word 0x0 "FCMDR,FACI Command Register" hexmask.word.byte 0x0 8.--15. 1. "CMDR,Command Register" hexmask.word.byte 0x0 0.--7. 1. "PCMDR,Previous Command Register" group.byte 0xD0++0x0 line.byte 0x0 "FBCCNT,Data Flash Blank Check Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BCDIR,Blank Check Direction" "0: Blank check is executed from smaller address to..,1: Blank check is executed from larger address to.." rgroup.byte 0xD4++0x0 line.byte 0x0 "FBCSTAT,Data Flash Blank Check Control Register" bitfld.byte 0x0 7. "FCST,Fill Check Status Bit" "0: The target area is filled with 0s and/or 1s.,1: The target area is blank. (not programmed)" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000." newline bitfld.byte 0x0 0. "BCST,Blank Check Status Bit" "0: The target area is erased (blank).,1: The target area is filled with 0s and/or 1s." rgroup.long 0xD8++0x7 line.long 0x0 "FPSADDR,Data Flash Programming Start Address Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000." hexmask.long.tbyte 0x0 0.--16. 1. "PSADR,Programmed Area Start AddressNOTE: Indicates address of the first programmed data which is found in 'Blank Check' command execution." line.long 0x4 "FSUASMON,Flash Start-Up Area Select Monitor Register" bitfld.long 0x4 31. "BTFLG,Flag of Start-Up area select for Boot Swap" "0: The start-up area is the alternate area (sector 1),1: The start-up area is the default area (sector 0)" hexmask.long.word 0x4 16.--30. 1. "Reserved,These bits are read as 000000000000000." newline bitfld.long 0x4 15. "FSPR,Protection Flag of programing the Access Window Boot Flag and Temporary Boot Swap Control and 'Config Clear' command execution" "0: Protected state,1: Non-protected state" hexmask.long.word 0x4 0.--14. 1. "Reserved,These bits are read as 000000000000000." group.word 0xE0++0x1 line.word 0x0 "FCPSR,Flash Sequencer Processing Switching Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "ESUSPMD,Erasure-Suspended Mode" "0: Suspension-priority mode,1: Erasure-priority mode" group.word 0xE4++0x1 line.word 0x0 "FPCKAR,Flash Sequencer Processing Clock Notification Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY Code" hexmask.word.byte 0x0 0.--7. 1. "PCKA,Flash Sequencer Processing Clock FrequencyThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'1E is.." group.word 0xE8++0x1 line.word 0x0 "FSUACR,Flash Start-Up Area Control Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY CodeThese bits enable or disable SAS bits modification. The data written to these bits are not stored." hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "SAS,Start Up Area SelectThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'66 is written to KEY bits." "0: The start-up area is selected according to the..,?,?,?" tree.end tree "FACI_NS" base ad:0x5011E000 group.byte 0x10++0x0 line.byte 0x0 "FASTAT,Flash Access Status Register" bitfld.byte 0x0 7. "CFAE,Code Flash Access Error" "0: No code flash access error has occurred.,1: Code flash access error has occurred." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.byte 0x0 4. "CMDLK,Command Lock" "0: Flash sequencer is not in 'Command Lock' state.,1: Flash sequencer is in 'Command Lock' state." bitfld.byte 0x0 3. "DFAE,Data Flash Access Error" "0: No data flash access error has occurred.,1: Data flash access error has occurred." newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0x14++0x0 line.byte 0x0 "FAEINT,Flash Access Error Interrupt Enable Register" bitfld.byte 0x0 7. "CFAEIE,Code Flash Access Error Interrupt Enable" "0: Does not generate 'intflerr' interrupt request..,1: Generates 'intflerr' interrupt request when CFAE.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 4. "CMDLKIE,Command Lock Interrupt Enable" "0: Does not generate 'intflerr' interrupt request..,1: Generates 'intflerr' interrupt request when.." bitfld.byte 0x0 3. "DFAEIE,Data Flash Access Error Interrupt Enable" "0: Does not generate 'intflerr' interrupt request..,1: Generates 'intflerr' interrupt request when DFAE.." newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0x18++0x0 line.byte 0x0 "FRDYIE,Flash Ready Interrupt Enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "FRDYIE,FRDY Interrupt Enable" "0: Does not generate 'intflend' interrupt request..,1: Generates 'intflend' interrupt request when FRDY.." group.long 0x30++0x7 line.long 0x0 "FSADDR,FACI Command Start Address Register" hexmask.long 0x0 0.--31. 1. "FSADDR,Start Address of Flash Sequencer Command Target AreaThese bits can be written when FRDY bit of FSTATR register is '1'. Writing to these bits in FRDY = '0' is ignored." line.long 0x4 "FEADDR,FACI Command End Address Register" hexmask.long 0x4 0.--31. 1. "FEADDR,End Address of Flash Sequencer Command Target AreaSpecifies end address of target area in 'Blank Check' command.These bits can be written when FRDY bit of FSTATR register is '1'. Writing to these bits in FRDY = '0' is ignored." group.word 0x44++0x1 line.word 0x0 "FMEPROT,Flash P/E Mode Entry Protection Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key CodeThese bits enable or disable CEPROT bit modification. The data written to these bits are not stored." hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline rbitfld.word 0x0 1. "CPSTAT,fac_cpstat pin Monitor" "0: Protection by CEPROT bit is enabled.,1: Protection by CEPROT bit is disabled." bitfld.word 0x0 0. "CEPROT,Code Flash P/E Mode Entry Protection" "0: FENTRYC bit is not protected.,1: FENTRYC bit is protected." group.byte 0x48++0x0 line.byte 0x0 "FCNTSELR,Flash Counter Select Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "CNTSEL,Counter Select" "0,1,2,3,4,5,6,7" rgroup.long 0x4C++0x7 line.long 0x0 "FCNTDATAR0,Flash Counter Data Register 0" hexmask.long 0x0 0.--31. 1. "CNTRDAT,Counter Read Data" line.long 0x4 "FCNTDATAR1,Flash Counter Data Register 1" hexmask.long 0x4 0.--31. 1. "CNTRDAT,Counter Read Data" group.word 0x60++0x1 line.word 0x0 "FCTRCNTR,Flash Configuration Update Transfer Control Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 1. "TRSEL,Transfer Information Select" "0,1" bitfld.word 0x0 0. "TRTRG,Transfer Start Trigger" "0,1" group.byte 0x64++0x0 line.byte 0x0 "FCTRLSR,Flash Configuration Update Transfer List Select Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TRLIST,Configuration Update Transfer List" "0,1,2,3,4,5,6,7" group.long 0x68++0x3 line.long 0x0 "FCTRADDR,Flash Configuration Update Transfer Address Register" hexmask.long 0x0 0.--31. 1. "CTRA,Configuration Update Transfer Source Address" rgroup.byte 0x6C++0x0 line.byte 0x0 "FCTRSTATR,Flash Configuration Update Transfer Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "TRMD,Transfer Mode Setting Status" "0,1" newline bitfld.byte 0x0 1. "TRAD,Transfer Address Setting Status" "0,1" bitfld.byte 0x0 0. "TRBUSY,Transfer Busy Status" "0,1" group.word 0x78++0x1 line.word 0x0 "FBPROT0,Flash Block Protection" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key CodeThese bits enable or disable BPCN0 bit modification. The data written to these bits are not stored." hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "BPCN0,Block Protection for non-secure CancelDisables block protect for non-secure function" "0: User area is protected.,1: User area is not protected." group.word 0x7C++0x1 line.word 0x0 "FBPROT1,Flash Block Protection for secure Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key CodeThese bits enable or disable BPCN1 bit modification. The data written to these bits are not stored." hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "BPCN1,Block Protection for secure CancelDisables block protection for secure" "0: User area is protected.,1: User area is not protected." rgroup.long 0x80++0x3 line.long 0x0 "FSTATR,Flash Status Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x0 23. "ILGCOMERR,Illegal Command ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" newline bitfld.long 0x0 22. "FESETERR,FENTRY Setting ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" bitfld.long 0x0 21. "SECERR,Security ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" newline bitfld.long 0x0 20. "OTERR,Other ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" bitfld.long 0x0 19. "TZFERR,TrustZone Filter ErrorWhen this bit is '1' flash sequencer enters 'Command Lock' state." "0,1" newline bitfld.long 0x0 16.--18. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 15. "FRDY,Flash Ready" "0: 'Program' 'DMA Program' 'Erase' 'Program' or..,1: None of the above is in progress." newline bitfld.long 0x0 14. "ILGLERR,Illegal Command Error" "0: Flash sequencer has not detected any illegal..,1: Flash sequencer has detected an illegal command.." bitfld.long 0x0 13. "ERSERR,Erasure Error" "0: Erasure processing has been completed successfully,1: An error has occurred during erasure" newline bitfld.long 0x0 12. "PRGERR,Programming Error" "0: Programming has been completed successfully,1: An error has occurred during programming" bitfld.long 0x0 11. "SUSRDY,Suspend Ready" "0: Flash sequencer cannot accept 'Program/Erase..,1: Flash sequencer can accept 'Program/Erase.." newline bitfld.long 0x0 10. "DBFULL,Data Buffer Full" "0: Data Buffer is not full,?" bitfld.long 0x0 9. "ERSSPD,Erasure-Suspended Status" "0: Flash sequencer is in status other than the..,1: Flash sequencer is in erasure suspension process.." newline bitfld.long 0x0 8. "PRGSPD,Programming-Suspended Status" "0: Flash sequencer is in status other than the..,1: Flash sequencer is in programming suspension.." bitfld.long 0x0 7. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 6. "FHVEERR,'fhve' Error" "0: No error has been detected.,1: An error has been detected." hexmask.long.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000." group.word 0x84++0x1 line.word 0x0 "FENTRYR,Flash P/E Mode Entry Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY Code" bitfld.word 0x0 7. "FENTRYD,Data Flash P/E Mode EntryThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'AA is written to.." "0: Data flash is in 'Read Mode',1: Data flash is in 'P/E Mode'" newline hexmask.word.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 0. "FENTRYC,Code Flash P/E Mode EntryThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'AA is written to.." "0: Code flash is in 'Read Mode',1: Code flash is in 'P/E Mode'" group.word 0x8C++0x1 line.word 0x0 "FSUINITR,Flash Sequencer Set-Up Initialization Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "SUINIT,Set-up InitializationThis bit can be written when FRDY bit of FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'2D is written to KEY bits." "0: Set-up registers keep its' value.,1: Set-up registers are initialized." rgroup.word 0xA0++0x1 line.word 0x0 "FCMDR,FACI Command Register" hexmask.word.byte 0x0 8.--15. 1. "CMDR,Command Register" hexmask.word.byte 0x0 0.--7. 1. "PCMDR,Previous Command Register" group.byte 0xD0++0x0 line.byte 0x0 "FBCCNT,Data Flash Blank Check Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BCDIR,Blank Check Direction" "0: Blank check is executed from smaller address to..,1: Blank check is executed from larger address to.." rgroup.byte 0xD4++0x0 line.byte 0x0 "FBCSTAT,Data Flash Blank Check Control Register" bitfld.byte 0x0 7. "FCST,Fill Check Status Bit" "0: The target area is filled with 0s and/or 1s.,1: The target area is blank. (not programmed)" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000." newline bitfld.byte 0x0 0. "BCST,Blank Check Status Bit" "0: The target area is erased (blank).,1: The target area is filled with 0s and/or 1s." rgroup.long 0xD8++0x7 line.long 0x0 "FPSADDR,Data Flash Programming Start Address Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000." hexmask.long.tbyte 0x0 0.--16. 1. "PSADR,Programmed Area Start AddressNOTE: Indicates address of the first programmed data which is found in 'Blank Check' command execution." line.long 0x4 "FSUASMON,Flash Start-Up Area Select Monitor Register" bitfld.long 0x4 31. "BTFLG,Flag of Start-Up area select for Boot Swap" "0: The start-up area is the alternate area (sector 1),1: The start-up area is the default area (sector 0)" hexmask.long.word 0x4 16.--30. 1. "Reserved,These bits are read as 000000000000000." newline bitfld.long 0x4 15. "FSPR,Protection Flag of programing the Access Window Boot Flag and Temporary Boot Swap Control and 'Config Clear' command execution" "0: Protected state,1: Non-protected state" hexmask.long.word 0x4 0.--14. 1. "Reserved,These bits are read as 000000000000000." group.word 0xE0++0x1 line.word 0x0 "FCPSR,Flash Sequencer Processing Switching Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "ESUSPMD,Erasure-Suspended Mode" "0: Suspension-priority mode,1: Erasure-priority mode" group.word 0xE4++0x1 line.word 0x0 "FPCKAR,Flash Sequencer Processing Clock Notification Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY Code" hexmask.word.byte 0x0 0.--7. 1. "PCKA,Flash Sequencer Processing Clock FrequencyThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'1E is.." group.word 0xE8++0x1 line.word 0x0 "FSUACR,Flash Start-Up Area Control Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,KEY CodeThese bits enable or disable SAS bits modification. The data written to these bits are not stored." hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "SAS,Start Up Area SelectThese bits can be written when FRDY bit in FSTATR register is '1'. Writing to this bit in FRDY = '0' is ignored.Writing to these bits is enabled only when this register is accessed in 16-bit size and H'66 is written to KEY bits." "0: The start-up area is selected according to the..,?,?,?" tree.end tree.end tree "FCACHE (Flash Cache)" base ad:0x0 tree "FCACHE" base ad:0x4001C100 group.word 0x0++0x1 line.word 0x0 "FCACHEE,Flash Cache Enable Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "FCACHEEN,Flash Cache Enable" "0: FCACHE is disabled,1: FCACHE is enabled" group.word 0x4++0x1 line.word 0x0 "FCACHEIV,Flash Cache Invalidate Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "FCACHEIV,Flash Cache Invalidate" "0: Read : Do not invalidate. Write: the setting is..,1: FCACHE is invalidated." group.byte 0x1C++0x0 line.byte 0x0 "FLWT,Flash Wait Cycle Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "FLWT,Flash Wait Cycle" "0: Setting prohibited,1: 1 wait (48MHz < ICLK <= 96MHz),?,?,?,?,?,?" group.word 0x40++0x1 line.word 0x0 "FSAR,Flash Security Attribution Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.word 0x0 11. "FACITRSA,FACI transfer Security Attribution" "0: Secure,1: Non-Secure" bitfld.word 0x0 10. "FACICOMRSA,FACI command Registers Security Attribution" "0: Secure,1: Non-Secure" bitfld.word 0x0 9. "FACICOMISA,FACI command Issuing Security Attribution" "0: Secure,1: Non-Secure" newline bitfld.word 0x0 8. "FCKMHZSA,FCKMHZ Security Attribution" "0: Secure,1: Non-Secure" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 111111. The write value should be 111111." bitfld.word 0x0 1. "FCACHEENSA,FCHACHEEN Security Attribution" "0: Secure,1: Non-Secure" bitfld.word 0x0 0. "FLWTSA,FLWT Security Attribution" "0: Secure,1: Non-Secure" tree.end tree "FCACHE_NS" base ad:0x5001C100 group.word 0x0++0x1 line.word 0x0 "FCACHEE,Flash Cache Enable Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "FCACHEEN,Flash Cache Enable" "0: FCACHE is disabled,1: FCACHE is enabled" group.word 0x4++0x1 line.word 0x0 "FCACHEIV,Flash Cache Invalidate Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "FCACHEIV,Flash Cache Invalidate" "0: Read : Do not invalidate. Write: the setting is..,1: FCACHE is invalidated." group.byte 0x1C++0x0 line.byte 0x0 "FLWT,Flash Wait Cycle Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "FLWT,Flash Wait Cycle" "0: Setting prohibited,1: 1 wait (48MHz < ICLK <= 96MHz),?,?,?,?,?,?" group.word 0x40++0x1 line.word 0x0 "FSAR,Flash Security Attribution Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.word 0x0 11. "FACITRSA,FACI transfer Security Attribution" "0: Secure,1: Non-Secure" bitfld.word 0x0 10. "FACICOMRSA,FACI command Registers Security Attribution" "0: Secure,1: Non-Secure" bitfld.word 0x0 9. "FACICOMISA,FACI command Issuing Security Attribution" "0: Secure,1: Non-Secure" newline bitfld.word 0x0 8. "FCKMHZSA,FCKMHZ Security Attribution" "0: Secure,1: Non-Secure" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 111111. The write value should be 111111." bitfld.word 0x0 1. "FCACHEENSA,FCHACHEEN Security Attribution" "0: Secure,1: Non-Secure" bitfld.word 0x0 0. "FLWTSA,FLWT Security Attribution" "0: Secure,1: Non-Secure" tree.end tree.end tree "FLAD (Data Flash)" base ad:0x0 tree "FLAD" base ad:0x4011C000 group.byte 0x40++0x0 line.byte 0x0 "FCKMHZ,Data Flash Reading Access Clock Frequency Register" hexmask.byte 0x0 0.--7. 1. "FCKMHZ,Data Flash Reading Access Clock FrequencyNotifies operating frequency of clkf. Round up operating frequency in MHz unit convert to binary and write it to FCKMHZ bits.example) clkf = 35.9MHz (FCKMHZ = H'24)Round up 35.9Convert 36 to binary" tree.end tree "FLAD_NS" base ad:0x5011C000 group.byte 0x40++0x0 line.byte 0x0 "FCKMHZ,Data Flash Reading Access Clock Frequency Register" hexmask.byte 0x0 0.--7. 1. "FCKMHZ,Data Flash Reading Access Clock FrequencyNotifies operating frequency of clkf. Round up operating frequency in MHz unit convert to binary and write it to FCKMHZ bits.example) clkf = 35.9MHz (FCKMHZ = H'24)Round up 35.9Convert 36 to binary" tree.end tree.end tree "GLCDC (Graphics LCD Controller)" base ad:0x0 tree "GLCDC" base ad:0x40342000 repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "GR1_CLUT0[$1],Color Palette 0 Plane for Graphics 1 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x400)++0x3 line.long 0x0 "GR1_CLUT1[$1],Color Palette 1 Plane for Graphics 1 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "GR2_CLUT0[$1],Color Palette 0 Plane for Graphics 2 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC00)++0x3 line.long 0x0 "GR2_CLUT1[$1],Color Palette 1 Plane for Graphics 2 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end group.long 0x1000++0x17 line.long 0x0 "BG_EN,Background Plane Setting Operation Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "SWRST,Entire module SW reset control" "0: Places the entire module in the SW reset state.,1: Releases the entire module from the SW reset.." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "VEN,Control of LCDC internal register value reflection to internal operations" "0: Disables(Cleared to 0 by an internal source),1: Enables" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "EN,Background plane generation module operation enable" "0: Disables operation.,1: Enables operation." line.long 0x4 "BG_PERI,Background Plane Setting Free-Running Period Register" hexmask.long.byte 0x4 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 16.--26. 1. "FV,Background plane vertical synchronization signal period on the basis of line." newline hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 0.--10. 1. "FH,Background plane horizontal synchronization signal period on the basis of pixel clock (PXCLK)." line.long 0x8 "BG_SYNC,Background Plane Setting Synchronization Position Register" hexmask.long.word 0x8 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x8 16.--19. 1. "VP,Background plane vertical synchronization signal assertion position on the basis of line." newline hexmask.long.word 0x8 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x8 0.--3. 1. "HP,Background plane horizontal synchronization signal assertion position on the basis of pixel clock (PXCLK)." line.long 0xC "BG_VSIZE,Background Plane Setting Full Image Vertical Size Register" hexmask.long.byte 0xC 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0xC 16.--26. 1. "VP,Background plane vertical valid pixel start position on the basis of line" newline hexmask.long.byte 0xC 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0xC 0.--10. 1. "VW,Background plane vertical valid pixel width on the basis of line" line.long 0x10 "BG_HSIZE,Background Plane Setting Full Image Horizontal Size Register" hexmask.long.byte 0x10 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x10 16.--26. 1. "HP,Background plane horizontal valid pixel start position on the basis of pixel clock (PXCLK)." newline hexmask.long.byte 0x10 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x10 0.--10. 1. "HW,Background plane horizontall valid pixel width on the basis of pixel clock (PXCLK)Note: When serial RGB is selected as the output format for the output control block add two to the horizontal enable signal width and set the resulting value to this.." line.long 0x14 "BG_BGC,Background Plane Setting Background Color Register" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x14 16.--23. 1. "R,R value for background plane valid pixel area.Unsigned; 8-bit integer." newline hexmask.long.byte 0x14 8.--15. 1. "G,G value for background plane valid pixel areaUnsigned; 8-bit integer" hexmask.long.byte 0x14 0.--7. 1. "B,B value for background plane valid pixel areaUnsigned; 8-bit integer" rgroup.long 0x1018++0x3 line.long 0x0 "BG_MON,Background Plane Setting Status Monitor Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000." bitfld.long 0x0 16. "SWRST,Entire module SW reset state monitor." "0: The entire module is in the SW reset state.,1: The entire module is released from the SW reset.." newline bitfld.long 0x0 8. "VEN,Entire module internal operation reflection control signal monitor.The signal state for controlling reflection of the register values to the internal operations upon assertion of the vertical synchronization signal." "0: The signal for controlling reflection of the..,1: The signal for controlling reflection of the.." hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 0. "EN,Background plane generation module operation state monitor." "0: Operation is stopped.,1: Operation is in progress." repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1100)++0x3 line.long 0x0 "GR$1_VEN,Graphics %s Register Update Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PVEN,Control of graphics n module register value reflection to internal operations.Reflection of the register values to the internal operation at the assertion of the vertical synchronization signal (VS)." "0: Disables reflection of the register values to..,1: Enables reflection of the register values to the.." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1104)++0x3 line.long 0x0 "GR$1_FLMRD,Graphics %s Frame Buffer Read Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "RENB,Graphics data (frame buffer data) read enable." "0: Disables reading.,1: Enables reading." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1108)++0x3 line.long 0x0 "GR$1_FLM1,Graphics %s Frame Buffer Control Register 1" hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." rbitfld.long 0x0 0.--1. "BSTMD,Burst transfer control for graphics data (frame buffer data)access" "0: Setting prohibited.,?,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x110C)++0x3 line.long 0x0 "GR$1_FLM2,Graphics %s Frame Buffer Control Register 2" hexmask.long 0x0 0.--31. 1. "BASE,Base address for accessing graphics data (frame buffer data)Set the head address in the frame buffer where graphics data is to be stored. GRn_FLM2.BASE[5:0] should be fixed to 0 during 64-byte burst transfer." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1110)++0x3 line.long 0x0 "GR$1_FLM3,Graphics %s Frame Buffer Control Register 3" hexmask.long.word 0x0 16.--31. 1. "LNOFF,Macro line offset address for accessing graphics data(frame buffer data)Signed; 16-bit integer" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1118)++0x3 line.long 0x0 "GR$1_FLM5,Graphics %s Frame Buffer Control Register 5" hexmask.long.word 0x0 16.--26. 1. "LNNUM,Number of lines per frame for accessing graphics data (frame buffer data)." hexmask.long.word 0x0 0.--15. 1. "DATANUM,Number of data transfer times per line for accessing graphics data (frame buffer data) where one transfer is defined as 16-beat burst access (64-byte boundary)" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x111C)++0x3 line.long 0x0 "GR$1_FLM6,Graphics %s Frame Buffer Control Register 6" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28.--30. "FORMAT,Data format for accessing graphics data (frame buffer data)." "0: Setting prohibited.,1: RGB888 (32 bits/pix 8 bits on the MSB side are..,?,?,?,?,?,?" newline hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1120)++0x3 line.long 0x0 "GR$1_AB1,Graphics %s Alpha Blending Control Register 1" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." bitfld.long 0x0 12. "ARCON,Rectangular area alpha blending control." "0: Off,1: On" newline bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 8. "ARCDISPON,Image area border display control for rectangular area alpha blending." "0: Display off,1: Display on" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "GRCDISPON,Graphics image area border display control." "0: Display off,1: Display on" newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 0.--1. "DISPSEL,Graphics display plane control." "0: Background color display (value set by the..,1: Lower-layer graphics display,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1124)++0x3 line.long 0x0 "GR$1_AB2,Graphics %s Alpha Blending Control Register 2" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GRCVS,Vertical start position of graphics image area." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GRCVW,Vertical width of graphics image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1128)++0x3 line.long 0x0 "GR$1_AB3,Graphics %s Alpha Blending Control Register 3" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GRCHS,Horizontal start position of graphics image area." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GRCHW,Horizontal width of graphics image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x112C)++0x3 line.long 0x0 "GR$1_AB4,Graphics %s Alpha Blending Control Register 4" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "ARCVS,Vertical start position of rectangular area alpha blending image area" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "ARCVW,Vertical width of rectangular area alpha blending image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1130)++0x3 line.long 0x0 "GR$1_AB5,Graphics %s Alpha Blending Control Register 5" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "ARCHS,Horizontal start position of rectangular area alpha blending image area." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "ARCHW,Horizontal width of rectangular area alpha blending image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1134)++0x3 line.long 0x0 "GR$1_AB6,Graphics %s Alpha Blending Control Register 6" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.word 0x0 16.--24. 1. "ARCCOEF,Alpha coefficient for alpha blending in rectangular area (-255 to 255).[8]: Sign (0: addition 1: subtraction)[7:0]: Variation (absolute value)" newline hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 0.--7. 1. "ARCRATE,Frame rate for alpha blending in rectangular area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1138)++0x3 line.long 0x0 "GR$1_AB7,Graphics %s Alpha Blending Control Register 7" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "ARCDEF,Initial alpha value for alpha blending in rectangular area." newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "CKON,RGB-index chroma-key processing control." "0: Disables chroma-key processing,1: Enables chroma-key processing" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x113C)++0x3 line.long 0x0 "GR$1_AB8,Graphics %s Alpha Blending Control Register 8" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "CKKG,G signal for RGB-index chroma-key processingUnsigned; 8 bits." newline hexmask.long.byte 0x0 8.--15. 1. "CKKB,B signal for RGB-index chroma-key processingUnsigned; 8 bits." hexmask.long.byte 0x0 0.--7. 1. "CKKR,R signal for RGB-index chroma-key processingUnsigned; 8 bits." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1140)++0x3 line.long 0x0 "GR$1_AB9,Graphics %s Alpha Blending Control Register 9" hexmask.long.byte 0x0 24.--31. 1. "CKA,A value after RGB-index chroma-key processing replacement." hexmask.long.byte 0x0 16.--23. 1. "CKG,G value after RGB-index chroma-key processing replacementUnsigned; 8 bits." newline hexmask.long.byte 0x0 8.--15. 1. "CKB,B value after RGB-index chroma-key processing replacementUnsigned; 8 bits." hexmask.long.byte 0x0 0.--7. 1. "CKR,R value after RGB-index chroma-key processing replacementUnsigned; 8 bits." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x114C)++0x3 line.long 0x0 "GR$1_BASE,Graphics %s Background Color Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "G,Background color G valueUnsigned; 8 bits" newline hexmask.long.byte 0x0 8.--15. 1. "B,Background color B valueUnsigned; 8 bits" hexmask.long.byte 0x0 0.--7. 1. "R,Background color R valueUnsigned; 8 bits" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1150)++0x3 line.long 0x0 "GR$1_CLUTINT,Graphics %s CLUT Table Interrupt Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "SEL,CLUT table control" "0: Setting prohibited,1: Uses CLUT1 plane for internal operations." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "LINE,Number of detection lines" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) rgroup.long ($2+0x1154)++0x3 line.long 0x0 "GR$1_MON,Graphics %s Status Monitor Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000." bitfld.long 0x0 16. "UNDFLST,Status monitor for underflow" "0: No underflow occurs in internal operations.,1: An underflow occurs in internal operations." newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000." bitfld.long 0x0 0. "ARCST,Status monitor for alpha blending in rectangular area" "0: Fade-in/fade-out is not in progress.,1: Fade-in/fade-out is in progress." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1300)++0x3 line.long 0x0 "GAM$1_LATCH,Gamma %s Register Update Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "VEN,Control of gamma correction x module register value reflection to internal operations.The register values to be reflected to the internal operations at the assertion of the vertical synchronization signal (VS)." "0: Disables the register values to be reflected to..,1: Enables the register values to be reflected to.." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1304)++0x3 line.long 0x0 "GAM$1_SW,Gamma Correction Block Function Switch Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "GAMON,Gamma correction on/off control" "0: Turns off gamma correction.,1: Turns on gamma correction." repeat.end group.long 0x1304++0x3 line.long 0x0 "GAM_SW,Gamma Correction Block Function Switch Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "GAMON,Gamma correction on/off control" "0: Turns off gamma correction.,1: Turns on gamma correction." repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1308)++0x3 line.long 0x0 "GAM$1_LUT1,Gamma %s Correction Block Table Setting Register 1" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN00,Gain value of area 0.Unsigned 11-bit fixed point." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN01,Gain value of area 1Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x130C)++0x3 line.long 0x0 "GAM$1_LUT2,Gamma %s Correction Block Table Setting Register 2" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN02,Gain value of area 2Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN03,Gain value of area 3Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1310)++0x3 line.long 0x0 "GAM$1_LUT3,Gamma %s Correction Block Table Setting Register 3" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN04,Gain value of area 4Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN05,Gain value of area 5Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1314)++0x3 line.long 0x0 "GAM$1_LUT4,Gamma %s Correction Block Table Setting Register 4" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN06,Gain value of area 6Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN07,Gain value of area 7Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1318)++0x3 line.long 0x0 "GAM$1_LUT5,Gamma %s Correction Block Table Setting Register 5" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN08,Gain value of area 8Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN09,Gain value of area 9Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x131C)++0x3 line.long 0x0 "GAM$1_LUT6,Gamma %s Correction Block Table Setting Register 6" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN10,Gain value of area 10Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN11,Gain value of area 11Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1320)++0x3 line.long 0x0 "GAM$1_LUT7,Gamma %s Correction Block Table Setting Register 7" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN12,Gain value of area 12Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN13,Gain value of area 13Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1324)++0x3 line.long 0x0 "GAM$1_LUT8,Gamma %s Correction Block Table Setting Register 8" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN14,Gain value of area 14Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN15,Gain value of area 15Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1328)++0x3 line.long 0x0 "GAM$1_AREA1,Gamma %s Correction Block Area Setting Register 1" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH01,Start threshold of area 1Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH02,Start threshold of area 2Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH03,Start threshold of area 3Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x132C)++0x3 line.long 0x0 "GAM$1_AREA2,Gamma %s Correction Block Area Setting Register 2" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH04,Start threshold of area 4Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH05,Start threshold of area 5Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH06,Start threshold of area 6Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1330)++0x3 line.long 0x0 "GAM$1_AREA3,Gamma %s Correction Block Area Setting Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH07,Start threshold of area 7Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH08,Start threshold of area 8Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH09,Start threshold of area 9Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1334)++0x3 line.long 0x0 "GAM$1_AREA4,Gamma %s Correction Block Area Setting Register 4" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH10,Start threshold of area 10Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH11,Start threshold of area 11Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH12,Start threshold of area 12Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1338)++0x3 line.long 0x0 "GAM$1_AREA5,Gamma %s Correction Block Area Setting Register 5" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH13,Start threshold of area 13Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH14,Start threshold of area 14Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH15,Start threshold of area 15Unsigned 10-bit integer" repeat.end group.long 0x13C0++0x17 line.long 0x0 "OUT_VLATCH,Output Control Block Register Update Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "VEN,Control of output control module register value reflection to internal operations.The register values to be reflected to the internal operations at the assertion of the vertical synchronization signal (VS)." "0: Disables the register values to be reflected to..,1: Enables the register values to be reflected to.." line.long 0x4 "OUT_SET,Output Control Block Output Interface Register" bitfld.long 0x4 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 28. "ENDIANON,Bit endian change control" "0: Descending order (little endian),1: Ascending order (big endian)" newline bitfld.long 0x4 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 24. "SWAPON,Pixel order control" "0: In the order of RGB,1: In the order of BGR" newline hexmask.long.byte 0x4 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 12.--13. "FORMAT,Output format select" "0: RGB888; select RGB888 as dither output format.,1: RGB666; select RGB666 as dither output format.,?,?" bitfld.long 0x4 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 8.--9. "FRQSEL,Clock frequency division control" "0: No frequency division parallel RGB,1: Setting prohibited,?,?" bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 4. "DIRSEL,Invalid data position control in serial RGB format" "0: Invalid data is output following valid (RGB) data.,1: Invalid data is output prior to valid (RGB) data." bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 0.--1. "PHASE,Data delay in serial RGB format (based on OUTCLK)" "0: 0 cycle,1: 1 cycle,?,?" line.long 0x8 "OUT_BRIGHT1,Output Control Block Brightness Correction Register 1" hexmask.long.tbyte 0x8 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x8 0.--9. 1. "BRTG,Brightness (DC) adjustment of G signalUnsigned; 10 bits; +512 with offset; integer" line.long 0xC "OUT_BRIGHT2,Output Control Block Brightness Correction Register 2" hexmask.long.byte 0xC 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0xC 16.--25. 1. "BRTB,Brightness (DC) adjustment of B signalUnsigned; 10 bits; +512 with offset; integer" newline hexmask.long.byte 0xC 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0xC 0.--9. 1. "BRTR,Brightness (DC) adjustment of R signalUnsigned; 10 bits; +512 with offset; integer" line.long 0x10 "OUT_CONTRAST,Output Control Block Contrast Correction Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x10 16.--23. 1. "CONTG,Contrast (GAIN) adjustment of G signalUnsigned; 8 bits fixed point." newline hexmask.long.byte 0x10 8.--15. 1. "CONTB,Contrast (GAIN) adjustment of B signalUnsigned; 8 bits fixed point" hexmask.long.byte 0x10 0.--7. 1. "CONTR,Contrast (GAIN) adjustment of R signalUnsigned; 8 bits fixed point" line.long 0x14 "OUT_PDTHA,Output Control Block Panel Dither Correction Register" hexmask.long.word 0x14 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x14 20.--21. "SEL,Operation mode" "0: Truncate,1: Round-off,?,?" newline bitfld.long 0x14 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 16.--17. "FORM,Output format select" "0: RGB888; select RGB888 or serial RGB as output..,1: RGB666; select RGB666 as output interface format.,?,?" newline bitfld.long 0x14 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 12.--13. "PA,Pattern value (A) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" newline bitfld.long 0x14 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 8.--9. "PB,Pattern value (B) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" newline bitfld.long 0x14 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 4.--5. "PC,Pattern value (C) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" newline bitfld.long 0x14 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 0.--1. "PD,Pattern value (D) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" group.long 0x13E4++0x3 line.long 0x0 "OUT_CLKPHASE,Output Control Block Output Phase Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "FRONTGAM,Correction control" "0: Brightness/contrast correction is followed by..,1: Gamma correction is followed by.." bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 8. "LCDEDGE,LCD_DATA Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 6. "TCON0EDGE,LCD_TCON0 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." bitfld.long 0x0 5. "TCON1EDGE,LCD_TCON1 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." newline bitfld.long 0x0 4. "TCON2EDGE,LCD_TCON2 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." bitfld.long 0x0 3. "TCON3EDGE,LCD_TCON3 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." newline bitfld.long 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.long 0x1400++0x7 line.long 0x0 "TCON_VLATCH,TCON VLATCH Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "VEN," "0,1" line.long 0x4 "TCON_TIM,TCON Reference Timing Setting Register" hexmask.long.byte 0x4 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 16.--26. 1. "HALF,Vertical synchronization signal generation change timing Sets the delay from the assertion of the internal horizontal synchronization signal in terms of pixels." newline hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 0.--10. 1. "OFFSET,Horizontal synchronization signal generation reference timingSets the offset from the assertion of the internal horizontal synchronization signal in terms of pixels." repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1408)++0x3 line.long 0x0 "TCON_STV$11,TCON Vertical Timing Setting Register %s1" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "VS,STVx1 first change timing" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "VW,STVx1 second change timingSets the signal assertion width." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x140C)++0x3 line.long 0x0 "TCON_STV$12,TCON Vertical Timing Setting Register %s2" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "INV,STVx signal polarity inversion control" "0: Not inverted,1: Inverted" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "SEL,Output signal select control for VSOUT (controlled by TCON_STVA2 register)/VEOUT (controlled by the TCON_STVB2 register) pin" "0: STVA,1: STVB,?,?,?,?,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1418)++0x3 line.long 0x0 "TCON_STH$11,TCON Horizontal Timing Setting Register STH%s1" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "HS,STHx1 first change timing" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "HW,STHx1 second change timing.Sets the signal assertion width." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x141C)++0x3 line.long 0x0 "TCON_STH$12,TCON Horizontal Timing Setting Register STH%s2" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "HSSEL,STHx signal generation reference timing control." "0: Reference timing is the input horizontal..,1: Reference timing is the offset set with the.." newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "INV,STVx signal polarity inversion control." "0: Not inverted,1: Inverted" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "SEL,Output signal select control for LCD_TCON2 (controlled by TCON_STHA2 register)/LCD_TCON3 (controlled by the TCON_STHB2 register) pin." "0: STVA,1: STVB,?,?,?,?,?,?" repeat.end group.long 0x1428++0x3 line.long 0x0 "TCON_DE,TCON Data Enable Polarity Setting Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "INV,DE signal polarity inversion control." "0: Not inverted,1: Inverted" group.long 0x1440++0xB line.long 0x0 "SYSCNT_DTCTEN,System Control Block State Detection Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "L2UNDFDTC,Graphics 2 underflow detection control" "0: Disables detection.,1: Enables detection." newline bitfld.long 0x0 1. "L1UNDFDTC,Graphics 1 underflow detection control" "0: Disables detection.,1: Enables detection." bitfld.long 0x0 0. "VPOSDTC,Specified line detection control" "0: Disables detection.,1: Enables detection." line.long 0x4 "SYSCNT_INTEN,System Control Block Interrupt Request Enable Control Register" hexmask.long 0x4 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x4 2. "L2UNDFINTEN,Interrupt request signal GLCDC_L2UNDF enable control." "0: Disables GLCDC_L2UNDF output,1: Enables GLCDC_L2UNDF output" newline bitfld.long 0x4 1. "L1UNDFINTEN,Interrupt request signal GLCDC_L1UNDF enable control." "0: Disables GLCDC_L1UNDF output,1: Enables GLCDC_L1UNDF output" bitfld.long 0x4 0. "VPOSINTEN,Interrupt request signal GLCDC_VPOS enable control." "0: Disables GLCDC_VPOS output,1: Enables GLCDC_VPOS output" line.long 0x8 "SYSCNT_STCLR,System Control Block Status Clear Register" hexmask.long 0x8 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x8 2. "L2UNDFCLR,Graphics 2 underflow detection flag clear field" "0: No operation,1: Clears the graphics 2 underflow detection flag." newline bitfld.long 0x8 1. "L1UNDFCLR,Graphics 1 underflow detection flag clear field" "0: No operation,1: Clears the graphics 1 underflow detection flag." bitfld.long 0x8 0. "VPOSCLR,Graphics 2 specified line detection flag clear field" "0: No operation,1: Clears the specified line detection flag." rgroup.long 0x144C++0x3 line.long 0x0 "SYSCNT_STMON,System Control Block Status Monitor Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000." bitfld.long 0x0 2. "L2UNDF,Graphics 2 underflow detection flag" "0: No underflow has been detected in graphics 2.,1: An underflow has been detected in graphics 2." newline bitfld.long 0x0 1. "L1UNDF,Graphics 1 underflow detection flag" "0: No underflow has been detected in graphics 1.,1: An underflow has been detected in graphics 1." bitfld.long 0x0 0. "VPOS,Graphics 2 specified line detection flag" "0: No specified line notification has been detected..,1: A specified line notification has been detected.." group.long 0x1450++0x3 line.long 0x0 "SYSCNT_PANEL_CLK,System Control Block Version and Panel Clock Control Register" hexmask.long.word 0x0 16.--31. 1. "VER,Version informationVersion information of the GLCD" bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "PIXSEL,Pixel clock select control.Must be set to the same value as OUT_SET.FRQSEL[1]." "0: No frequency division parallel RGB,1: Quarter frequency serial RGB" bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 8. "CLKSEL,Panel clock supply source select" "0: External clock select,1: PLL output select" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 6. "CLKEN,Panel clock output enable controlNote: Before changing the PIXSEL CLKSEL or DCDR bit this bit must be set to 0." "0: Disable panel clock output,1: Enable panel clock output" hexmask.long.byte 0x0 0.--5. 1. "DCDR,Clock division ratio setting controlRefer toTable 2.7.1 for details about setting value.Note: Settings that are not listed in table 2.7.1 are prohibited." tree.end tree "GLCDC_NS" base ad:0x50342000 repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2)++0x3 line.long 0x0 "GR1_CLUT0[$1],Color Palette 0 Plane for Graphics 1 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x400)++0x3 line.long 0x0 "GR1_CLUT1[$1],Color Palette 1 Plane for Graphics 1 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x800)++0x3 line.long 0x0 "GR2_CLUT0[$1],Color Palette 0 Plane for Graphics 2 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end repeat 256. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC00)++0x3 line.long 0x0 "GR2_CLUT1[$1],Color Palette 1 Plane for Graphics 2 Plane" hexmask.long.byte 0x0 24.--31. 1. "A,Alpha Blending Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 16.--23. 1. "R,R Value of Color Palette n Plane for Graphics m Plane" newline hexmask.long.byte 0x0 8.--15. 1. "G,G Value of Color Palette n Plane for Graphics m Plane" hexmask.long.byte 0x0 0.--7. 1. "B,B Value of Color Palette n Plane for Graphics m Plane" repeat.end group.long 0x1000++0x17 line.long 0x0 "BG_EN,Background Plane Setting Operation Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "SWRST,Entire module SW reset control" "0: Places the entire module in the SW reset state.,1: Releases the entire module from the SW reset.." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "VEN,Control of LCDC internal register value reflection to internal operations" "0: Disables(Cleared to 0 by an internal source),1: Enables" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "EN,Background plane generation module operation enable" "0: Disables operation.,1: Enables operation." line.long 0x4 "BG_PERI,Background Plane Setting Free-Running Period Register" hexmask.long.byte 0x4 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 16.--26. 1. "FV,Background plane vertical synchronization signal period on the basis of line." newline hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 0.--10. 1. "FH,Background plane horizontal synchronization signal period on the basis of pixel clock (PXCLK)." line.long 0x8 "BG_SYNC,Background Plane Setting Synchronization Position Register" hexmask.long.word 0x8 20.--31. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x8 16.--19. 1. "VP,Background plane vertical synchronization signal assertion position on the basis of line." newline hexmask.long.word 0x8 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.byte 0x8 0.--3. 1. "HP,Background plane horizontal synchronization signal assertion position on the basis of pixel clock (PXCLK)." line.long 0xC "BG_VSIZE,Background Plane Setting Full Image Vertical Size Register" hexmask.long.byte 0xC 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0xC 16.--26. 1. "VP,Background plane vertical valid pixel start position on the basis of line" newline hexmask.long.byte 0xC 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0xC 0.--10. 1. "VW,Background plane vertical valid pixel width on the basis of line" line.long 0x10 "BG_HSIZE,Background Plane Setting Full Image Horizontal Size Register" hexmask.long.byte 0x10 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x10 16.--26. 1. "HP,Background plane horizontal valid pixel start position on the basis of pixel clock (PXCLK)." newline hexmask.long.byte 0x10 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x10 0.--10. 1. "HW,Background plane horizontall valid pixel width on the basis of pixel clock (PXCLK)Note: When serial RGB is selected as the output format for the output control block add two to the horizontal enable signal width and set the resulting value to this.." line.long 0x14 "BG_BGC,Background Plane Setting Background Color Register" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x14 16.--23. 1. "R,R value for background plane valid pixel area.Unsigned; 8-bit integer." newline hexmask.long.byte 0x14 8.--15. 1. "G,G value for background plane valid pixel areaUnsigned; 8-bit integer" hexmask.long.byte 0x14 0.--7. 1. "B,B value for background plane valid pixel areaUnsigned; 8-bit integer" rgroup.long 0x1018++0x3 line.long 0x0 "BG_MON,Background Plane Setting Status Monitor Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000." bitfld.long 0x0 16. "SWRST,Entire module SW reset state monitor." "0: The entire module is in the SW reset state.,1: The entire module is released from the SW reset.." newline bitfld.long 0x0 8. "VEN,Entire module internal operation reflection control signal monitor.The signal state for controlling reflection of the register values to the internal operations upon assertion of the vertical synchronization signal." "0: The signal for controlling reflection of the..,1: The signal for controlling reflection of the.." hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 0. "EN,Background plane generation module operation state monitor." "0: Operation is stopped.,1: Operation is in progress." repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1100)++0x3 line.long 0x0 "GR$1_VEN,Graphics %s Register Update Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PVEN,Control of graphics n module register value reflection to internal operations.Reflection of the register values to the internal operation at the assertion of the vertical synchronization signal (VS)." "0: Disables reflection of the register values to..,1: Enables reflection of the register values to the.." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1104)++0x3 line.long 0x0 "GR$1_FLMRD,Graphics %s Frame Buffer Read Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "RENB,Graphics data (frame buffer data) read enable." "0: Disables reading.,1: Enables reading." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1108)++0x3 line.long 0x0 "GR$1_FLM1,Graphics %s Frame Buffer Control Register 1" hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." rbitfld.long 0x0 0.--1. "BSTMD,Burst transfer control for graphics data (frame buffer data)access" "0: Setting prohibited.,?,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x110C)++0x3 line.long 0x0 "GR$1_FLM2,Graphics %s Frame Buffer Control Register 2" hexmask.long 0x0 0.--31. 1. "BASE,Base address for accessing graphics data (frame buffer data)Set the head address in the frame buffer where graphics data is to be stored. GRn_FLM2.BASE[5:0] should be fixed to 0 during 64-byte burst transfer." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1110)++0x3 line.long 0x0 "GR$1_FLM3,Graphics %s Frame Buffer Control Register 3" hexmask.long.word 0x0 16.--31. 1. "LNOFF,Macro line offset address for accessing graphics data(frame buffer data)Signed; 16-bit integer" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1118)++0x3 line.long 0x0 "GR$1_FLM5,Graphics %s Frame Buffer Control Register 5" hexmask.long.word 0x0 16.--26. 1. "LNNUM,Number of lines per frame for accessing graphics data (frame buffer data)." hexmask.long.word 0x0 0.--15. 1. "DATANUM,Number of data transfer times per line for accessing graphics data (frame buffer data) where one transfer is defined as 16-beat burst access (64-byte boundary)" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x111C)++0x3 line.long 0x0 "GR$1_FLM6,Graphics %s Frame Buffer Control Register 6" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28.--30. "FORMAT,Data format for accessing graphics data (frame buffer data)." "0: Setting prohibited.,1: RGB888 (32 bits/pix 8 bits on the MSB side are..,?,?,?,?,?,?" newline hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1120)++0x3 line.long 0x0 "GR$1_AB1,Graphics %s Alpha Blending Control Register 1" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." bitfld.long 0x0 12. "ARCON,Rectangular area alpha blending control." "0: Off,1: On" newline bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 8. "ARCDISPON,Image area border display control for rectangular area alpha blending." "0: Display off,1: Display on" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "GRCDISPON,Graphics image area border display control." "0: Display off,1: Display on" newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 0.--1. "DISPSEL,Graphics display plane control." "0: Background color display (value set by the..,1: Lower-layer graphics display,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1124)++0x3 line.long 0x0 "GR$1_AB2,Graphics %s Alpha Blending Control Register 2" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GRCVS,Vertical start position of graphics image area." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GRCVW,Vertical width of graphics image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1128)++0x3 line.long 0x0 "GR$1_AB3,Graphics %s Alpha Blending Control Register 3" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GRCHS,Horizontal start position of graphics image area." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GRCHW,Horizontal width of graphics image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x112C)++0x3 line.long 0x0 "GR$1_AB4,Graphics %s Alpha Blending Control Register 4" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "ARCVS,Vertical start position of rectangular area alpha blending image area" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "ARCVW,Vertical width of rectangular area alpha blending image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1130)++0x3 line.long 0x0 "GR$1_AB5,Graphics %s Alpha Blending Control Register 5" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "ARCHS,Horizontal start position of rectangular area alpha blending image area." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "ARCHW,Horizontal width of rectangular area alpha blending image area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1134)++0x3 line.long 0x0 "GR$1_AB6,Graphics %s Alpha Blending Control Register 6" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.word 0x0 16.--24. 1. "ARCCOEF,Alpha coefficient for alpha blending in rectangular area (-255 to 255).[8]: Sign (0: addition 1: subtraction)[7:0]: Variation (absolute value)" newline hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 0.--7. 1. "ARCRATE,Frame rate for alpha blending in rectangular area." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1138)++0x3 line.long 0x0 "GR$1_AB7,Graphics %s Alpha Blending Control Register 7" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "ARCDEF,Initial alpha value for alpha blending in rectangular area." newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "CKON,RGB-index chroma-key processing control." "0: Disables chroma-key processing,1: Enables chroma-key processing" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x113C)++0x3 line.long 0x0 "GR$1_AB8,Graphics %s Alpha Blending Control Register 8" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "CKKG,G signal for RGB-index chroma-key processingUnsigned; 8 bits." newline hexmask.long.byte 0x0 8.--15. 1. "CKKB,B signal for RGB-index chroma-key processingUnsigned; 8 bits." hexmask.long.byte 0x0 0.--7. 1. "CKKR,R signal for RGB-index chroma-key processingUnsigned; 8 bits." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1140)++0x3 line.long 0x0 "GR$1_AB9,Graphics %s Alpha Blending Control Register 9" hexmask.long.byte 0x0 24.--31. 1. "CKA,A value after RGB-index chroma-key processing replacement." hexmask.long.byte 0x0 16.--23. 1. "CKG,G value after RGB-index chroma-key processing replacementUnsigned; 8 bits." newline hexmask.long.byte 0x0 8.--15. 1. "CKB,B value after RGB-index chroma-key processing replacementUnsigned; 8 bits." hexmask.long.byte 0x0 0.--7. 1. "CKR,R value after RGB-index chroma-key processing replacementUnsigned; 8 bits." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x114C)++0x3 line.long 0x0 "GR$1_BASE,Graphics %s Background Color Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "G,Background color G valueUnsigned; 8 bits" newline hexmask.long.byte 0x0 8.--15. 1. "B,Background color B valueUnsigned; 8 bits" hexmask.long.byte 0x0 0.--7. 1. "R,Background color R valueUnsigned; 8 bits" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2+0x1150)++0x3 line.long 0x0 "GR$1_CLUTINT,Graphics %s CLUT Table Interrupt Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "SEL,CLUT table control" "0: Setting prohibited,1: Uses CLUT1 plane for internal operations." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "LINE,Number of detection lines" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x100) rgroup.long ($2+0x1154)++0x3 line.long 0x0 "GR$1_MON,Graphics %s Status Monitor Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000." bitfld.long 0x0 16. "UNDFLST,Status monitor for underflow" "0: No underflow occurs in internal operations.,1: An underflow occurs in internal operations." newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000." bitfld.long 0x0 0. "ARCST,Status monitor for alpha blending in rectangular area" "0: Fade-in/fade-out is not in progress.,1: Fade-in/fade-out is in progress." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1300)++0x3 line.long 0x0 "GAM$1_LATCH,Gamma %s Register Update Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "VEN,Control of gamma correction x module register value reflection to internal operations.The register values to be reflected to the internal operations at the assertion of the vertical synchronization signal (VS)." "0: Disables the register values to be reflected to..,1: Enables the register values to be reflected to.." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1304)++0x3 line.long 0x0 "GAM$1_SW,Gamma Correction Block Function Switch Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "GAMON,Gamma correction on/off control" "0: Turns off gamma correction.,1: Turns on gamma correction." repeat.end group.long 0x1304++0x3 line.long 0x0 "GAM_SW,Gamma Correction Block Function Switch Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "GAMON,Gamma correction on/off control" "0: Turns off gamma correction.,1: Turns on gamma correction." repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1308)++0x3 line.long 0x0 "GAM$1_LUT1,Gamma %s Correction Block Table Setting Register 1" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN00,Gain value of area 0.Unsigned 11-bit fixed point." newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN01,Gain value of area 1Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x130C)++0x3 line.long 0x0 "GAM$1_LUT2,Gamma %s Correction Block Table Setting Register 2" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN02,Gain value of area 2Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN03,Gain value of area 3Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1310)++0x3 line.long 0x0 "GAM$1_LUT3,Gamma %s Correction Block Table Setting Register 3" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN04,Gain value of area 4Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN05,Gain value of area 5Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1314)++0x3 line.long 0x0 "GAM$1_LUT4,Gamma %s Correction Block Table Setting Register 4" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN06,Gain value of area 6Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN07,Gain value of area 7Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1318)++0x3 line.long 0x0 "GAM$1_LUT5,Gamma %s Correction Block Table Setting Register 5" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN08,Gain value of area 8Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN09,Gain value of area 9Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x131C)++0x3 line.long 0x0 "GAM$1_LUT6,Gamma %s Correction Block Table Setting Register 6" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN10,Gain value of area 10Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN11,Gain value of area 11Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1320)++0x3 line.long 0x0 "GAM$1_LUT7,Gamma %s Correction Block Table Setting Register 7" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN12,Gain value of area 12Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN13,Gain value of area 13Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1324)++0x3 line.long 0x0 "GAM$1_LUT8,Gamma %s Correction Block Table Setting Register 8" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "GAIN14,Gain value of area 14Unsigned 11-bit fixed point" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "GAIN15,Gain value of area 15Unsigned 11-bit fixed point" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1328)++0x3 line.long 0x0 "GAM$1_AREA1,Gamma %s Correction Block Area Setting Register 1" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH01,Start threshold of area 1Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH02,Start threshold of area 2Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH03,Start threshold of area 3Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x132C)++0x3 line.long 0x0 "GAM$1_AREA2,Gamma %s Correction Block Area Setting Register 2" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH04,Start threshold of area 4Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH05,Start threshold of area 5Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH06,Start threshold of area 6Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1330)++0x3 line.long 0x0 "GAM$1_AREA3,Gamma %s Correction Block Area Setting Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH07,Start threshold of area 7Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH08,Start threshold of area 8Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH09,Start threshold of area 9Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1334)++0x3 line.long 0x0 "GAM$1_AREA4,Gamma %s Correction Block Area Setting Register 4" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH10,Start threshold of area 10Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH11,Start threshold of area 11Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH12,Start threshold of area 12Unsigned 10-bit integer" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x40) group.long ($2+0x1338)++0x3 line.long 0x0 "GAM$1_AREA5,Gamma %s Correction Block Area Setting Register 5" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.word 0x0 20.--29. 1. "TH13,Start threshold of area 13Unsigned 10-bit integer" newline hexmask.long.word 0x0 10.--19. 1. "TH14,Start threshold of area 14Unsigned 10-bit integer" hexmask.long.word 0x0 0.--9. 1. "TH15,Start threshold of area 15Unsigned 10-bit integer" repeat.end group.long 0x13C0++0x17 line.long 0x0 "OUT_VLATCH,Output Control Block Register Update Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "VEN,Control of output control module register value reflection to internal operations.The register values to be reflected to the internal operations at the assertion of the vertical synchronization signal (VS)." "0: Disables the register values to be reflected to..,1: Enables the register values to be reflected to.." line.long 0x4 "OUT_SET,Output Control Block Output Interface Register" bitfld.long 0x4 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 28. "ENDIANON,Bit endian change control" "0: Descending order (little endian),1: Ascending order (big endian)" newline bitfld.long 0x4 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 24. "SWAPON,Pixel order control" "0: In the order of RGB,1: In the order of BGR" newline hexmask.long.byte 0x4 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 12.--13. "FORMAT,Output format select" "0: RGB888; select RGB888 as dither output format.,1: RGB666; select RGB666 as dither output format.,?,?" bitfld.long 0x4 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 8.--9. "FRQSEL,Clock frequency division control" "0: No frequency division parallel RGB,1: Setting prohibited,?,?" bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 4. "DIRSEL,Invalid data position control in serial RGB format" "0: Invalid data is output following valid (RGB) data.,1: Invalid data is output prior to valid (RGB) data." bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 0.--1. "PHASE,Data delay in serial RGB format (based on OUTCLK)" "0: 0 cycle,1: 1 cycle,?,?" line.long 0x8 "OUT_BRIGHT1,Output Control Block Brightness Correction Register 1" hexmask.long.tbyte 0x8 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x8 0.--9. 1. "BRTG,Brightness (DC) adjustment of G signalUnsigned; 10 bits; +512 with offset; integer" line.long 0xC "OUT_BRIGHT2,Output Control Block Brightness Correction Register 2" hexmask.long.byte 0xC 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0xC 16.--25. 1. "BRTB,Brightness (DC) adjustment of B signalUnsigned; 10 bits; +512 with offset; integer" newline hexmask.long.byte 0xC 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.word 0xC 0.--9. 1. "BRTR,Brightness (DC) adjustment of R signalUnsigned; 10 bits; +512 with offset; integer" line.long 0x10 "OUT_CONTRAST,Output Control Block Contrast Correction Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x10 16.--23. 1. "CONTG,Contrast (GAIN) adjustment of G signalUnsigned; 8 bits fixed point." newline hexmask.long.byte 0x10 8.--15. 1. "CONTB,Contrast (GAIN) adjustment of B signalUnsigned; 8 bits fixed point" hexmask.long.byte 0x10 0.--7. 1. "CONTR,Contrast (GAIN) adjustment of R signalUnsigned; 8 bits fixed point" line.long 0x14 "OUT_PDTHA,Output Control Block Panel Dither Correction Register" hexmask.long.word 0x14 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x14 20.--21. "SEL,Operation mode" "0: Truncate,1: Round-off,?,?" newline bitfld.long 0x14 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 16.--17. "FORM,Output format select" "0: RGB888; select RGB888 or serial RGB as output..,1: RGB666; select RGB666 as output interface format.,?,?" newline bitfld.long 0x14 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 12.--13. "PA,Pattern value (A) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" newline bitfld.long 0x14 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 8.--9. "PB,Pattern value (B) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" newline bitfld.long 0x14 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 4.--5. "PC,Pattern value (C) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" newline bitfld.long 0x14 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x14 0.--1. "PD,Pattern value (D) of 2 x 2 pattern ditherUnsigned 2-bit integer" "?,?,2: bit integer,?" group.long 0x13E4++0x3 line.long 0x0 "OUT_CLKPHASE,Output Control Block Output Phase Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "FRONTGAM,Correction control" "0: Brightness/contrast correction is followed by..,1: Gamma correction is followed by.." bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 8. "LCDEDGE,LCD_DATA Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 6. "TCON0EDGE,LCD_TCON0 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." bitfld.long 0x0 5. "TCON1EDGE,LCD_TCON1 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." newline bitfld.long 0x0 4. "TCON2EDGE,LCD_TCON2 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." bitfld.long 0x0 3. "TCON3EDGE,LCD_TCON3 Output Phase Control" "0: In synchronization with the rising edge of..,1: In synchronization with the falling edge of.." newline bitfld.long 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.long 0x1400++0x7 line.long 0x0 "TCON_VLATCH,TCON VLATCH Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." newline bitfld.long 0x0 0. "VEN," "0,1" line.long 0x4 "TCON_TIM,TCON Reference Timing Setting Register" hexmask.long.byte 0x4 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 16.--26. 1. "HALF,Vertical synchronization signal generation change timing Sets the delay from the assertion of the internal horizontal synchronization signal in terms of pixels." newline hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x4 0.--10. 1. "OFFSET,Horizontal synchronization signal generation reference timingSets the offset from the assertion of the internal horizontal synchronization signal in terms of pixels." repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1408)++0x3 line.long 0x0 "TCON_STV$11,TCON Vertical Timing Setting Register %s1" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "VS,STVx1 first change timing" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "VW,STVx1 second change timingSets the signal assertion width." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x140C)++0x3 line.long 0x0 "TCON_STV$12,TCON Vertical Timing Setting Register %s2" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "INV,STVx signal polarity inversion control" "0: Not inverted,1: Inverted" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "SEL,Output signal select control for VSOUT (controlled by TCON_STVA2 register)/VEOUT (controlled by the TCON_STVB2 register) pin" "0: STVA,1: STVB,?,?,?,?,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x1418)++0x3 line.long 0x0 "TCON_STH$11,TCON Horizontal Timing Setting Register STH%s1" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 16.--26. 1. "HS,STHx1 first change timing" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.word 0x0 0.--10. 1. "HW,STHx1 second change timing.Sets the signal assertion width." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x8) group.long ($2+0x141C)++0x3 line.long 0x0 "TCON_STH$12,TCON Horizontal Timing Setting Register STH%s2" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "HSSEL,STHx signal generation reference timing control." "0: Reference timing is the input horizontal..,1: Reference timing is the offset set with the.." newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "INV,STVx signal polarity inversion control." "0: Not inverted,1: Inverted" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "SEL,Output signal select control for LCD_TCON2 (controlled by TCON_STHA2 register)/LCD_TCON3 (controlled by the TCON_STHB2 register) pin." "0: STVA,1: STVB,?,?,?,?,?,?" repeat.end group.long 0x1428++0x3 line.long 0x0 "TCON_DE,TCON Data Enable Polarity Setting Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "INV,DE signal polarity inversion control." "0: Not inverted,1: Inverted" group.long 0x1440++0xB line.long 0x0 "SYSCNT_DTCTEN,System Control Block State Detection Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "L2UNDFDTC,Graphics 2 underflow detection control" "0: Disables detection.,1: Enables detection." newline bitfld.long 0x0 1. "L1UNDFDTC,Graphics 1 underflow detection control" "0: Disables detection.,1: Enables detection." bitfld.long 0x0 0. "VPOSDTC,Specified line detection control" "0: Disables detection.,1: Enables detection." line.long 0x4 "SYSCNT_INTEN,System Control Block Interrupt Request Enable Control Register" hexmask.long 0x4 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x4 2. "L2UNDFINTEN,Interrupt request signal GLCDC_L2UNDF enable control." "0: Disables GLCDC_L2UNDF output,1: Enables GLCDC_L2UNDF output" newline bitfld.long 0x4 1. "L1UNDFINTEN,Interrupt request signal GLCDC_L1UNDF enable control." "0: Disables GLCDC_L1UNDF output,1: Enables GLCDC_L1UNDF output" bitfld.long 0x4 0. "VPOSINTEN,Interrupt request signal GLCDC_VPOS enable control." "0: Disables GLCDC_VPOS output,1: Enables GLCDC_VPOS output" line.long 0x8 "SYSCNT_STCLR,System Control Block Status Clear Register" hexmask.long 0x8 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x8 2. "L2UNDFCLR,Graphics 2 underflow detection flag clear field" "0: No operation,1: Clears the graphics 2 underflow detection flag." newline bitfld.long 0x8 1. "L1UNDFCLR,Graphics 1 underflow detection flag clear field" "0: No operation,1: Clears the graphics 1 underflow detection flag." bitfld.long 0x8 0. "VPOSCLR,Graphics 2 specified line detection flag clear field" "0: No operation,1: Clears the specified line detection flag." rgroup.long 0x144C++0x3 line.long 0x0 "SYSCNT_STMON,System Control Block Status Monitor Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000." bitfld.long 0x0 2. "L2UNDF,Graphics 2 underflow detection flag" "0: No underflow has been detected in graphics 2.,1: An underflow has been detected in graphics 2." newline bitfld.long 0x0 1. "L1UNDF,Graphics 1 underflow detection flag" "0: No underflow has been detected in graphics 1.,1: An underflow has been detected in graphics 1." bitfld.long 0x0 0. "VPOS,Graphics 2 specified line detection flag" "0: No specified line notification has been detected..,1: A specified line notification has been detected.." group.long 0x1450++0x3 line.long 0x0 "SYSCNT_PANEL_CLK,System Control Block Version and Panel Clock Control Register" hexmask.long.word 0x0 16.--31. 1. "VER,Version informationVersion information of the GLCD" bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "PIXSEL,Pixel clock select control.Must be set to the same value as OUT_SET.FRQSEL[1]." "0: No frequency division parallel RGB,1: Quarter frequency serial RGB" bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 8. "CLKSEL,Panel clock supply source select" "0: External clock select,1: PLL output select" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 6. "CLKEN,Panel clock output enable controlNote: Before changing the PIXSEL CLKSEL or DCDR bit this bit must be set to 0." "0: Disable panel clock output,1: Enable panel clock output" hexmask.long.byte 0x0 0.--5. 1. "DCDR,Clock division ratio setting controlRefer toTable 2.7.1 for details about setting value.Note: Settings that are not listed in table 2.7.1 are prohibited." tree.end tree.end tree "GPT (General PWM Timer)" base ad:0x0 tree "GPT16 (General PWM Timer - 16-bit)" tree "GPT168" base ad:0x40322800 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT168_NS" base ad:0x50322800 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT169" base ad:0x40322900 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT169_NS" base ad:0x50322900 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1610" base ad:0x40322A00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1610_NS" base ad:0x50322A00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1611" base ad:0x40322B00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1611_NS" base ad:0x50322B00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1612" base ad:0x40322C00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1612_NS" base ad:0x50322C00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1613" base ad:0x40322D00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT1613_NS" base ad:0x50322D00 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree.end tree "GPT32 (General PWM Timer - 32-bit)" tree "GPT320" base ad:0x40322000 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT320_NS" base ad:0x50322000 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT321" base ad:0x40322100 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT321_NS" base ad:0x50322100 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT322" base ad:0x40322200 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT322_NS" base ad:0x50322200 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT323" base ad:0x40322300 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT323_NS" base ad:0x50322300 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT324" base ad:0x40322400 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT324_NS" base ad:0x50322400 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT325" base ad:0x40322500 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT325_NS" base ad:0x50322500 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT326" base ad:0x40322600 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT326_NS" base ad:0x50322600 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT327" base ad:0x40322700 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree "GPT327_NS" base ad:0x50322700 group.long 0x0++0xB line.long 0x0 "GTWP,General PWM Timer Write-Protection Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "PRKEY,GTWP Key Code" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "CMNWP,Common Register Write Disabled" "0: Write to the register is enabled,1: Write to the register is disabled" newline bitfld.long 0x0 3. "CLRWP,GTCLR.CCLR Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 2. "STPWP,GTSTP.CSTOP Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" newline bitfld.long 0x0 1. "STRWP,GTSTR.CSTRT Bit Write Disabled" "0: Write to the bit is enabled,1: Write to the bit is disabled" bitfld.long 0x0 0. "WP,Register Write Disable" "0: Enable writes to the register,1: Disable writes to the register" line.long 0x4 "GTSTR,General PWM Timer Software Start Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 13. "CSTRT13,Channel 13 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 12. "CSTRT12,Channel 12 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 11. "CSTRT11,Channel 11 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 10. "CSTRT10,Channel 10 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 9. "CSTRT9,Channel 9 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 8. "CSTRT8,Channel 8 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 7. "CSTRT7,Channel 7 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 6. "CSTRT6,Channel 6 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 5. "CSTRT5,Channel 5 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 4. "CSTRT4,Channel 4 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 3. "CSTRT3,Channel 3 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 2. "CSTRT2,Channel 2 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." newline bitfld.long 0x4 1. "CSTRT1,Channel 1 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." bitfld.long 0x4 0. "CSTRT0,Channel 0 GTCNT Count StartRead data shows each channel's counter status (GTCR.CST bit). 0 means counter stop. 1 means counter running." "0: No effect (write) / counter stop (read),1: GTCNT counter starts (write) / Counter running.." line.long 0x8 "GTSTP,General PWM Timer Software Stop Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x8 13. "CSTOP13,Channel 13 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 12. "CSTOP12,Channel 12 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 11. "CSTOP11,Channel 11 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 10. "CSTOP10,Channel 10 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 9. "CSTOP9,Channel 9 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 8. "CSTOP8,Channel 8 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 7. "CSTOP7,Channel 7 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 6. "CSTOP6,Channel 6 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 5. "CSTOP5,Channel 5 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 4. "CSTOP4,Channel 4 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 3. "CSTOP3,Channel 3 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 2. "CSTOP2,Channel 2 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" newline bitfld.long 0x8 1. "CSTOP1,Channel 1 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" bitfld.long 0x8 0. "CSTOP0,Channel 0 GTCNT Count StopRead data shows each channel's counter status (GTCR.CST bit). 0 means counter runnning. 1 means counter stop." "0: No effect (write) / counter running (read),1: GTCNT counter stops (write) / Counter stop (read)" wgroup.long 0xC++0x3 line.long 0x0 "GTCLR,General PWM Timer Software Clear Register" hexmask.long.tbyte 0x0 14.--31. 1. "Reserved,The write value should be 000000000000000000." bitfld.long 0x0 13. "CCLR13,Channel 13 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 12. "CCLR12,Channel 12 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 11. "CCLR11,Channel 11 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 10. "CCLR10,Channel 10 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 9. "CCLR9,Channel 9 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 8. "CCLR8,Channel 8 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 7. "CCLR7,Channel 7 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 6. "CCLR6,Channel 6 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 5. "CCLR5,Channel 5 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 4. "CCLR4,Channel 4 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 3. "CCLR3,Channel 3 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 2. "CCLR2,Channel 2 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" bitfld.long 0x0 1. "CCLR1,Channel 1 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" newline bitfld.long 0x0 0. "CCLR0,Channel 0 GTCNT Count Clear" "0: No effect,1: GTCNT counter clears" group.long 0x10++0x33 line.long 0x0 "GTSSR,General PWM Timer Start Source Select Register" bitfld.long 0x0 31. "CSTRT,Software Source Counter Start Enable" "0: Disable counter start by the GTSTR register,1: Enable counter start by the GTSTR register" hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 23. "SSELCH,ELC_GPTH Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTH input,1: Enable counter start on ELC_GPTH input." bitfld.long 0x0 22. "SSELCG,ELC_GPTG Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTG input,1: Enable counter start on ELC_GPTG input." newline bitfld.long 0x0 21. "SSELCF,ELC_GPTF Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTF input,1: Enable counter start on ELC_GPTF input" bitfld.long 0x0 20. "SSELCE,ELC_GPTE Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTE input,1: Enable counter start on ELC_GPTE input" newline bitfld.long 0x0 19. "SSELCD,ELC_GPTD Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTD input,1: Enable counter start on ELC_GPTD input." bitfld.long 0x0 18. "SSELCC,ELC_GPTC Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTC input,1: Enable counter start on ELC_GPTC input." newline bitfld.long 0x0 17. "SSELCB,ELC_GPTB Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTB input,1: Enable counter start on ELC_GPTB input." bitfld.long 0x0 16. "SSELCA,ELC_GPTA Event Source Counter Start Enable" "0: Disable counter start on ELC_GPTA input,1: Enable counter start on ELC_GPTA input." newline bitfld.long 0x0 15. "SSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 14. "SSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 13. "SSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 12. "SSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 11. "SSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 10. "SSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." newline bitfld.long 0x0 9. "SSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." bitfld.long 0x0 8. "SSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 7. "SSGTRGDF,GTETRGD Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 6. "SSGTRGDR,GTETRGD Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 5. "SSGTRGCF,GTETRGC Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 4. "SSGTRGCR,GTETRGC Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 3. "SSGTRGBF,GTETRGB Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 2. "SSGTRGBR,GTETRGB Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." newline bitfld.long 0x0 1. "SSGTRGAF,GTETRGA Pin Falling Input Source Counter Start Enable" "0: Disable counter start on the falling edge of..,1: Enable counter start on the falling edge of.." bitfld.long 0x0 0. "SSGTRGAR,GTETRGA Pin Rising Input Source Counter Start Enable" "0: Disable counter start on the rising edge of..,1: Enable counter start on the rising edge of.." line.long 0x4 "GTPSR,General PWM Timer Stop Source Select Register" bitfld.long 0x4 31. "CSTOP,Software Source Counter Stop Enable" "0: Disable counter stop by the GTSTP register,1: Enable counter stop by the GTSTP register" hexmask.long.byte 0x4 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x4 23. "PSELCH,ELC_GPTH Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTH input,1: Enable counter stop on ELC_GPTH input" bitfld.long 0x4 22. "PSELCG,ELC_GPTG Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTG input,1: Enable counter stop on ELC_GPTG input" newline bitfld.long 0x4 21. "PSELCF,ELC_GPTF Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTF input,1: Enable counter stop on ELC_GPTF input" bitfld.long 0x4 20. "PSELCE,ELC_GPTE Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTE input,1: Enable counter stop on ELC_GPTE input" newline bitfld.long 0x4 19. "PSELCD,ELC_GPTD Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTD input,1: Enable counter stop on ELC_GPTD input" bitfld.long 0x4 18. "PSELCC,ELC_GPTC Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTC input,1: Enable counter stop on ELC_GPTC input" newline bitfld.long 0x4 17. "PSELCB,ELC_GPTB Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTB input,1: Enable counter stop on ELC_GPTB input" bitfld.long 0x4 16. "PSELCA,ELC_GPTA Event Source Counter Stop Enable" "0: Disable counter stop on ELC_GPTA input,1: Enable counter stop on ELC_GPTA input" newline bitfld.long 0x4 15. "PSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 14. "PSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 13. "PSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." bitfld.long 0x4 12. "PSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCB.." newline bitfld.long 0x4 11. "PSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 10. "PSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." newline bitfld.long 0x4 9. "PSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." bitfld.long 0x4 8. "PSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of GTIOCA.." newline bitfld.long 0x4 7. "PSGTRGDF,GTETRGD Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 6. "PSGTRGDR,GTETRGD Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 5. "PSGTRGCF,GTETRGC Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 4. "PSGTRGCR,GTETRGC Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 3. "PSGTRGBF,GTETRGB Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 2. "PSGTRGBR,GTETRGB Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." newline bitfld.long 0x4 1. "PSGTRGAF,GTETRGA Pin Falling Input Source Counter Stop Enable" "0: Disable counter stop on the falling edge of..,1: Enable counter stop on the falling edge of.." bitfld.long 0x4 0. "PSGTRGAR,GTETRGA Pin Rising Input Source Counter Stop Enable" "0: Disable counter stop on the rising edge of..,1: Enable counter stop on the rising edge of.." line.long 0x8 "GTCSR,General PWM Timer Clear Source Select Register" bitfld.long 0x8 31. "CCLR,Software Source Counter Clear Enable" "0: Disable counter clear by the GTCLR register,1: Enable counter clear by the GTCLR register" hexmask.long.byte 0x8 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 23. "CSELCH,ELC_GPTH Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTH input,1: Enable counter clear on ELC_GPTH input" bitfld.long 0x8 22. "CSELCG,ELC_GPTG Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTG input,1: Enable counter clear on ELC_GPTG input" newline bitfld.long 0x8 21. "CSELCF,ELC_GPTF Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTF input,1: Enable counter clear on ELC_GPTF input" bitfld.long 0x8 20. "CSELCE,ELC_GPTE Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTE input,1: Enable counter clear on ELC_GPTE input" newline bitfld.long 0x8 19. "CSELCD,ELC_GPTD Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTD input,1: Enable counter clear on ELC_GPTD input" bitfld.long 0x8 18. "CSELCC,ELC_GPTC Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTC input,1: Enable counter clear on ELC_GPTC input" newline bitfld.long 0x8 17. "CSELCB,ELC_GPTB Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTB input,1: Enable counter clear on ELC_GPTB input" bitfld.long 0x8 16. "CSELCA,ELC_GPTA Event Source Counter Clear Enable" "0: Disable counter clear on ELC_GPTA input,1: Enable counter clear on ELC_GPTA input" newline bitfld.long 0x8 15. "CSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 14. "CSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 13. "CSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 12. "CSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 11. "CSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 10. "CSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." newline bitfld.long 0x8 9. "CSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." bitfld.long 0x8 8. "CSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 7. "CSGTRGDF,GTETRGD Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 6. "CSGTRGDR,GTETRGD Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 5. "CSGTRGCF,GTETRGC Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 4. "CSGTRGCR,GTETRGC Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 3. "CSGTRGBF,GTETRGB Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 2. "CSGTRGBR,GTETRGB Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." newline bitfld.long 0x8 1. "CSGTRGAF,GTETRGA Pin Falling Input Source Counter Clear Enable" "0: Disable counter clear on the falling edge of..,1: Enable counter clear on the falling edge of.." bitfld.long 0x8 0. "CSGTRGAR,GTETRGA Pin Rising Input Source Counter Clear Enable" "0: Disable counter clear on the rising edge of..,1: Enable counter clear on the rising edge of.." line.long 0xC "GTUPSR,General PWM Timer Up Count Source Select Register" hexmask.long.byte 0xC 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0xC 23. "USELCH,ELC_GPTH Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTH input,1: Enable counter count up on ELC_GPTH input." newline bitfld.long 0xC 22. "USELCG,ELC_GPTG Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTG input,1: Enable counter count up on ELC_GPTG input." bitfld.long 0xC 21. "USELCF,ELC_GPTF Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTF input,1: Enable counter count up on ELC_GPTF input." newline bitfld.long 0xC 20. "USELCE,ELC_GPTE Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTE input,1: Enable counter count up on ELC_GPTE input.put" bitfld.long 0xC 19. "USELCD,ELC_GPTD Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTD input,1: Enable counter count up on ELC_GPTD input" newline bitfld.long 0xC 18. "USELCC,ELC_GPTC Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTC input,1: Enable counter count up on ELC_GPTC input." bitfld.long 0xC 17. "USELCB,ELC_GPTB Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTB input,1: Enable counter count up on ELC_GPTB input." newline bitfld.long 0xC 16. "USELCA,ELC_GPTA Event Source Counter Count Up Enable" "0: Disable counter count up on ELC_GPTA input,1: Enable counter count up on ELC_GPTA input." bitfld.long 0xC 15. "USCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 14. "USCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 13. "USCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 12. "USCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 11. "USCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 10. "USCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." bitfld.long 0xC 9. "USCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." newline bitfld.long 0xC 8. "USCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 7. "USGTRGDF,GTETRGD Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 6. "USGTRGDR,GTETRGD Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 5. "USGTRGCF,GTETRGC Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 4. "USGTRGCR,GTETRGC Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 3. "USGTRGBF,GTETRGB Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 2. "USGTRGBR,GTETRGB Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." bitfld.long 0xC 1. "USGTRGAF,GTETRGA Pin Falling Input Source Counter Count Up Enable" "0: Disable counter count up on the falling edge of..,1: Enable counter count up on the falling edge of.." newline bitfld.long 0xC 0. "USGTRGAR,GTETRGA Pin Rising Input Source Counter Count Up Enable" "0: Disable counter count up on the rising edge of..,1: Enable counter count up on the rising edge of.." line.long 0x10 "GTDNSR,General PWM Timer Down Count Source Select Register" hexmask.long.byte 0x10 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 23. "DSELCH,ELC_GPTH Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTH input,1: Enable counter count down on ELC_GPTH input." newline bitfld.long 0x10 22. "DSELCG,ELC_GPTG Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTG input,1: Enable counter count down on ELC_GPTG input." bitfld.long 0x10 21. "DSELCF,ELC_GPTF Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTF input,1: Enable counter count down on ELC_GPTF input." newline bitfld.long 0x10 20. "DSELCE,ELC_GPTE Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTE input,1: Enable counter count down on ELC_GPTE input." bitfld.long 0x10 19. "DSELCD,ELC_GPTD Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTD input,1: Enable counter count down on ELC_GPTD input." newline bitfld.long 0x10 18. "DSELCC,ELC_GPTC Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTC input,1: Enable counter count down on ELC_GPTC input." bitfld.long 0x10 17. "DSELCB,ELC_GPTB Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTB input,1: Enable counter count down on ELC_GPTB input." newline bitfld.long 0x10 16. "DSELCA,ELC_GPTA Event Source Counter Count Down Enable" "0: Disable counter count down on ELC_GPTA input,1: Enable counter count down on ELC_GPTA input." bitfld.long 0x10 15. "DSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 14. "DSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 13. "DSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 12. "DSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 11. "DSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 10. "DSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." bitfld.long 0x10 9. "DSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." newline bitfld.long 0x10 8. "DSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 7. "DSGTRGDF,GTETRGD Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 6. "DSGTRGDR,GTETRGD Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 5. "DSGTRGCF,GTETRGC Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 4. "DSGTRGCR,GTETRGC Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 3. "DSGTRGBF,GTETRGB Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 2. "DSGTRGBR,GTETRGB Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." bitfld.long 0x10 1. "DSGTRGAF,GTETRGA Pin Falling Input Source Counter Count Down Enable" "0: Disable counter count down on the falling edge..,1: Enable counter count down on the falling edge of.." newline bitfld.long 0x10 0. "DSGTRGAR,GTETRGA Pin Rising Input Source Counter Count Down Enable" "0: Disable counter count down on the rising edge of..,1: Enable counter count down on the rising edge of.." line.long 0x14 "GTICASR,General PWM Timer Input Capture Source Select Register A" hexmask.long.byte 0x14 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x14 23. "ASELCH,ELC_GPTH Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTH input,1: Enable GTCCRA input capture on ELC_GPTH input" newline bitfld.long 0x14 22. "ASELCG,ELC_GPTG Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTG input,1: Enable GTCCRA input capture on ELC_GPTG input." bitfld.long 0x14 21. "ASELCF,ELC_GPTF Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTF input,1: Enable GTCCRA input capture on ELC_GPTF input." newline bitfld.long 0x14 20. "ASELCE,ELC_GPTE Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTE input,1: Enable GTCCRA input capture on ELC_GPTE input." bitfld.long 0x14 19. "ASELCD,ELC_GPTD Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTD input,1: Enable GTCCRA input capture on ELC_GPTD input." newline bitfld.long 0x14 18. "ASELCC,ELC_GPTC Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTC input,1: Enable GTCCRA input capture on ELC_GPTC input." bitfld.long 0x14 17. "ASELCB,ELC_GPTB Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTB input,1: Enable GTCCRA input capture on ELC_GPTB input" newline bitfld.long 0x14 16. "ASELCA,ELC_GPTA Event Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on ELC_GPTA input,1: Enable GTCCRA input capture on ELC_GPTA input." bitfld.long 0x14 15. "ASCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 14. "ASCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 13. "ASCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 12. "ASCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 11. "ASCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 10. "ASCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." bitfld.long 0x14 9. "ASCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." newline bitfld.long 0x14 8. "ASCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 7. "ASGTRGDF,GTETRGD Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 6. "ASGTRGDR,GTETRGD Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 5. "ASGTRGCF,GTETRGC Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 4. "ASGTRGCR,GTETRGC Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 3. "ASGTRGBF,GTETRGB Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 2. "ASGTRGBR,GTETRGB Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." bitfld.long 0x14 1. "ASGTRGAF,GTETRGA Pin Falling Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the falling edge..,1: Enable GTCCRA input capture on the falling edge.." newline bitfld.long 0x14 0. "ASGTRGAR,GTETRGA Pin Rising Input Source GTCCRA Input Capture Enable" "0: Disable GTCCRA input capture on the rising edge..,1: Enable GTCCRA input capture on the rising edge.." line.long 0x18 "GTICBSR,General PWM Timer Input Capture Source Select Register B" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x18 23. "BSELCH,ELC_GPTH Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTH input,1: Enable GTCCRB input capture on ELC_GPTH input." newline bitfld.long 0x18 22. "BSELCG,ELC_GPTG Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTG input,1: Enable GTCCRB input capture on ELC_GPTG input." bitfld.long 0x18 21. "BSELCF,ELC_GPTF Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTF input,1: Enable GTCCRB input capture on ELC_GPTF input." newline bitfld.long 0x18 20. "BSELCE,ELC_GPTE Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTE input,1: Enable GTCCRB input capture on ELC_GPTE input" bitfld.long 0x18 19. "BSELCD,ELC_GPTD Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTD input,1: Enable GTCCRB input capture on ELC_GPTD input." newline bitfld.long 0x18 18. "BSELCC,ELC_GPTC Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTC input,1: Enable GTCCRB input capture on ELC_GPTC input" bitfld.long 0x18 17. "BSELCB,ELC_GPTB Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTB input,1: Enable GTCCRB input capture on ELC_GPTB input." newline bitfld.long 0x18 16. "BSELCA,ELC_GPTA Event Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on ELC_GPTA input,1: Enable GTCCRB input capture on ELC_GPTA input." bitfld.long 0x18 15. "BSCBFAH,GTIOCB Pin Falling Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 14. "BSCBFAL,GTIOCB Pin Falling Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 13. "BSCBRAH,GTIOCB Pin Rising Input during GTIOCA Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 12. "BSCBRAL,GTIOCB Pin Rising Input during GTIOCA Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 11. "BSCAFBH,GTIOCA Pin Falling Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 10. "BSCAFBL,GTIOCA Pin Falling Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." bitfld.long 0x18 9. "BSCARBH,GTIOCA Pin Rising Input during GTIOCB Value High Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." newline bitfld.long 0x18 8. "BSCARBL,GTIOCA Pin Rising Input during GTIOCB Value Low Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 7. "BSGTRGDF,GTETRGD Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 6. "BSGTRGDR,GTETRGD Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 5. "BSGTRGCF,GTETRGC Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 4. "BSGTRGCR,GTETRGC Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 3. "BSGTRGBF,GTETRGB Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 2. "BSGTRGBR,GTETRGB Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." bitfld.long 0x18 1. "BSGTRGAF,GTETRGA Pin Falling Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the falling edge..,1: Enable GTCCRB input capture on the falling edge.." newline bitfld.long 0x18 0. "BSGTRGAR,GTETRGA Pin Rising Input Source GTCCRB Input Capture Enable" "0: Disable GTCCRB input capture on the rising edge..,1: Enable GTCCRB input capture on the rising edge.." line.long 0x1C "GTCR,General PWM Timer Control Register" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x1C 23.--26. 1. "TPCS,Timer Prescaler Select" newline hexmask.long.byte 0x1C 19.--22. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 16.--18. "MD,Mode Select" "0: Saw-wave PWM mode (single buffer or double..,1: Saw-wave one-shot pulse mode (fixed buffer..,?,?,?,?,?,?" newline bitfld.long 0x1C 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x1C 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 9.--13. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x1C 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x1C 0. "CST,Count Start" "0: Count operation is stopped,1: Count operation is performed" line.long 0x20 "GTUDDTYC,General PWM Timer Count Direction and Duty Setting Register" hexmask.long.byte 0x20 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 27. "OBDTYR,GTIOCB Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 26. "OBDTYF,Forcible GTIOCB Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 24.--25. "OBDTY,GTIOCB Output Duty Setting" "0: GTIOCB pin duty is depend on compare match,1: GTIOCB pin duty is depend on compare match,?,?" newline hexmask.long.byte 0x20 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 19. "OADTYR,GTIOCA Output Value Selecting after Releasing 0 percent/100 percent Duty Setting" "0: Apply output value set in 0 percent/100 percent..,1: Apply masked compare match output value to.." newline bitfld.long 0x20 18. "OADTYF,Forcible GTIOCA Output Duty Setting" "0: Do not force setting,1: Force setting" bitfld.long 0x20 16.--17. "OADTY,GTIOCA Output Duty Setting" "0: GTIOCA pin duty is depend on compare match,1: GTIOCA pin duty is depend on compare match,?,?" newline hexmask.long.word 0x20 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x20 1. "UDF,Forcible Count Direction Setting" "0: Do not force setting,1: Force setting" newline bitfld.long 0x20 0. "UD,Count Direction Setting" "0: Count down on GTCNT,1: Counts up on GTCNT" line.long 0x24 "GTIOR,General PWM Timer I/O Control Register" bitfld.long 0x24 30.--31. "NFCSB,Noise Filter B Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" bitfld.long 0x24 29. "NFBEN,Noise Filter B Enable" "0: Disable noise filter for GTIOCB pin,1: Enable noise filter for GTIOCB pin" newline bitfld.long 0x24 27.--28. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x24 25.--26. "OBDF,GTIOCB Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCB pin to Hi-Z on output disable,?,?" newline bitfld.long 0x24 24. "OBE,GTIOCB Pin Output Enable" "0: Disable output,1: Enable output" bitfld.long 0x24 23. "OBHLD,GTIOCB Pin Output Setting at the Start/Stop Count" "0: Set GTIOCB pin output level on counting start..,1: Retain GTIOCB pin output level on counting start.." newline bitfld.long 0x24 22. "OBDFLT,GTIOCB Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCB pin when counting stops,1: Output high on GTIOCB pin when counting stops" bitfld.long 0x24 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x24 16.--20. 1. "GTIOB,GTIOCB Pin Function Select" bitfld.long 0x24 14.--15. "NFCSA,Noise Filter A Sampling Clock Select" "0: PCLKGPTn/1,1: PCLKGPTn/4,?,?" newline bitfld.long 0x24 13. "NFAEN,Noise Filter A Enable" "0: Disable noise filter for GTIOCA pin,1: Enable noise filter for GTIOCA pin." bitfld.long 0x24 11.--12. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x24 9.--10. "OADF,GTIOCA Pin Disable Value Setting" "0: Prohibit output disable,1: Set GTIOCA pin to Hi-Z on output disable,?,?" bitfld.long 0x24 8. "OAE,GTIOCA Pin Output Enable" "0: Disable output,1: Enable output." newline bitfld.long 0x24 7. "OAHLD,GTIOCA Pin Output Setting at the Start/Stop Count" "0: Set GTIOCA pin output level on counting start..,1: Retain GTIOCA pin output level on counting start.." bitfld.long 0x24 6. "OADFLT,GTIOCA Pin Output Value Setting at the Count Stop" "0: Output low on GTIOCA pin when counting stops,1: Output high on GTIOCA pin when counting stops." newline bitfld.long 0x24 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x24 0.--4. 1. "GTIOA,GTIOCA Pin Function Select" line.long 0x28 "GTINTAD,General PWM Timer Interrupt Output Setting Register" bitfld.long 0x28 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x28 30. "GRPABL,Same Time Output Level Low Disable Request Enable" "0: Disable same time output level low disable request,1: Enable same time output level low disable request" newline bitfld.long 0x28 29. "GRPABH,Same Time Output Level High Disable Request Enable" "0: Disable same time output level high disable..,1: Enable same time output level high disable request" bitfld.long 0x28 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x28 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x28 24.--25. "GRP,Output Disable Source Select" "0: Select Group A output disable request,1: Select Group B output disable request,?,?" newline hexmask.long.byte 0x28 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 19. "ADTRBDEN,GTADTRB Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 18. "ADTRBUEN,GTADTRB Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." bitfld.long 0x28 17. "ADTRADEN,GTADTRA Compare Match (Down-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." newline bitfld.long 0x28 16. "ADTRAUEN,GTADTRA Compare Match (Up-Counting) A/D Converter Start Request Interrupt Enable" "0: Disable A/D converter start request,1: Enable A/D converter start request." hexmask.long.word 0x28 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x2C "GTST,General PWM Timer Status Register" bitfld.long 0x2C 31. "PCF,Period Count Function Finish Flag" "0: No period count function finish has occurred.,1: A period count function finish has occurred." rbitfld.long 0x2C 30. "OABLF,Same Time Output Level Low Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 0 at the..,1: GTIOCA pin and GTIOCB pin output 0 at the same.." newline rbitfld.long 0x2C 29. "OABHF,Same Time Output Level High Disable Request Enable" "0: GTIOCA pin and GTIOCB pin don't output 1 at the..,1: GTIOCA pin and GTIOCB pin output 1 at the same.." bitfld.long 0x2C 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x2C 25.--27. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x2C 24. "ODF,Output Disable Flag" "0: No output disable request is generated.,1: An output disable request is generated." newline hexmask.long.byte 0x2C 20.--23. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 19. "ADTRBDF,GTADTRB Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." newline bitfld.long 0x2C 18. "ADTRBUF,GTADTRB Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRB register compare match has occurred..,1: A GTADTRB register compare match has occurred in.." bitfld.long 0x2C 17. "ADTRADF,GTADTRA Register Compare Match(Down-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." newline bitfld.long 0x2C 16. "ADTRAUF,GTADTRA Register Compare Match(Up-Counting) A/D Converter Start Request Flag" "0: No GTADTRA register compare match has occurred..,1: A GTADTRA register compare match has occurred in.." rbitfld.long 0x2C 15. "TUCF,Count Direction Flag" "0: GTCNT counter is counting down,1: GTCNT counter is counting up." newline hexmask.long.byte 0x2C 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 8.--10. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "TCFPU,Underflow Flag" "0: No underflow (trough) has occurred.,1: An underflow (trough) has occurred." bitfld.long 0x2C 6. "TCFPO,Overflow Flag" "0: No overflow (crest) has occurred.,1: An overflow (crest) has occurred." newline bitfld.long 0x2C 5. "TCFF,Input Compare Match Flag F" "0: No compare match of GTCCRF is generated.,1: A compare match of GTCCRF is generated." bitfld.long 0x2C 4. "TCFE,Input Compare Match Flag E" "0: No compare match of GTCCRE is generated.,1: A compare match of GTCCRE is generated." newline bitfld.long 0x2C 3. "TCFD,Input Compare Match Flag D" "0: No compare match of GTCCRD is generated.,1: A compare match of GTCCRD is generated." bitfld.long 0x2C 2. "TCFC,Input Compare Match Flag C" "0: No compare match of GTCCRC is generated.,1: A compare match of GTCCRC is generated." newline bitfld.long 0x2C 1. "TCFB,Input Capture/Compare Match Flag B" "0: No input capture/compare match of GTCCRB is..,1: An input capture/compare match of GTCCRB is.." bitfld.long 0x2C 0. "TCFA,Input Capture/Compare Match Flag A" "0: No input capture/compare match of GTCCRA is..,1: An input capture/compare match of GTCCRA is.." line.long 0x30 "GTBER,General PWM Timer Buffer Enable Register" bitfld.long 0x30 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 30. "ADTDB,GTADTRB Double Buffer Operation" "0: Single buffer operation (GTADTBRB --> GTADTRB),1: Double buffer operation (GTADTDBRB --> GTADTBRB.." newline bitfld.long 0x30 28.--29. "ADTTB,GTADTRB Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" bitfld.long 0x30 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x30 26. "ADTDA,GTADTRA Double Buffer Operation" "0: Single buffer operation (GTADTBRA --> GTADTRA),1: Double buffer operation (GTADTDBRA --> GTADTBRA.." bitfld.long 0x30 24.--25. "ADTTA,GTADTRA Buffer Transfer Timing Select in the Triangle wavesNOTE: In the Saw waves values other than 0 0: Transfer at an underflow (in down-counting) or overflow (in up-counting) is performed." "0: Transfer at an underflow,1: Transfer at crest,?,?" newline bitfld.long 0x30 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x30 22. "CCRSWT,GTCCRA and GTCCRB Forcible Buffer OperationThis bit is read as 0." "0: no effect,1: Forcibly performs buffer transfer of GTCCRA and.." newline bitfld.long 0x30 20.--21. "PR,GTPR Buffer Operation" "0: Setting prohibited,1: Buffer operation (GTPBR register to GTPR register),?,?" bitfld.long 0x30 18.--19. "CCRB,GTCCRB Buffer Operation" "0: Double buffer operation (GTCCRB register to..,1: Single buffer operation (GTCCRB register to..,?,?" newline bitfld.long 0x30 16.--17. "CCRA,GTCCRA Buffer Operation" "0: Double buffer operation (GTCCRA register to..,1: Single buffer operation (GTCCRA register to..,?,?" hexmask.long.word 0x30 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." newline bitfld.long 0x30 0.--2. "BD,BD[2]: GTADTR Buffer Operation DisableBD[1]: GTPR Buffer Operation DisableBD[0]: GTCCR Buffer Operation Disable" "0: Enable buffer operation,1: Disable buffer operation,?,?,?,?,?,?" group.long 0x48++0x23 line.long 0x0 "GTCNT,General PWM Timer Counter" hexmask.long 0x0 0.--31. 1. "GTCNT,Counter" line.long 0x4 "GTCCRA,General PWM Timer Compare Capture Register A" hexmask.long 0x4 0.--31. 1. "GTCCRA,Compare Capture Register A" line.long 0x8 "GTCCRB,General PWM Timer Compare Capture Register B" hexmask.long 0x8 0.--31. 1. "GTCCRB,Compare Capture Register B" line.long 0xC "GTCCRC,General PWM Timer Compare Capture Register C" hexmask.long 0xC 0.--31. 1. "GTCCRC,Compare Capture Register C" line.long 0x10 "GTCCRE,General PWM Timer Compare Capture Register E" hexmask.long 0x10 0.--31. 1. "GTCCRE,Compare Capture Register E" line.long 0x14 "GTCCRD,General PWM Timer Compare Capture Register D" hexmask.long 0x14 0.--31. 1. "GTCCRD,Compare Capture Register D" line.long 0x18 "GTCCRF,General PWM Timer Compare Capture Register F" hexmask.long 0x18 0.--31. 1. "GTCCRF,Compare Capture Register F" line.long 0x1C "GTPR,General PWM Timer Cycle Setting Register" hexmask.long 0x1C 0.--31. 1. "GTPR,Cycle Setting Register" line.long 0x20 "GTPBR,General PWM Timer Cycle Setting Buffer Register" hexmask.long 0x20 0.--31. 1. "GTPBR,Cycle Setting Buffer Register" group.long 0x70++0x1F line.long 0x0 "GTADTRA,A/D Converter Start Request Timing Register A" hexmask.long 0x0 0.--31. 1. "GTADTRA,A/D Converter Start Request Timing Register A" line.long 0x4 "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" hexmask.long 0x4 0.--31. 1. "GTADTBRA,A/D Converter Start Request Timing Buffer Register A" line.long 0x8 "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" hexmask.long 0x8 0.--31. 1. "GTADTDBRA,A/D Converter Start Request Timing Double-Buffer Register A" line.long 0xC "GTADTRB,A/D Converter Start Request Timing Register B" hexmask.long 0xC 0.--31. 1. "GTADTRB,A/D Converter Start Request Timing Register B" line.long 0x10 "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" hexmask.long 0x10 0.--31. 1. "GTADTBRB,A/D Converter Start Request Timing Buffer Register B" line.long 0x14 "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" hexmask.long 0x14 0.--31. 1. "GTADTDBRB,A/D Converter Start Request Timing Double-Buffer Register B" line.long 0x18 "GTDTCR,General PWM Timer Dead Time Control Register" hexmask.long.tbyte 0x18 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x18 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x18 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x18 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x18 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 0. "TDE,Negative-Phase Waveform Setting" "0: Set GTCCRB without using GTDVU and GTDVD.,1: Use GTDVU and GTDVD to set the compare match.." line.long 0x1C "GTDVU,General PWM Timer Dead Time Value Register U" hexmask.long 0x1C 0.--31. 1. "GTDVU,Dead Time Value Register U" group.long 0xA4++0x3 line.long 0x0 "GTADSMR,General PWM Timer A/D Conversion Start Request Signal Monitoring Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "ADSMEN1,A/D Conversion Start Request Signal Monitor 1 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 16.--17. "ADSMS1,A/D Conversion Start Request Signal Monitor 1 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "ADSMEN0,A/D Conversion Start Request Signal Monitor 0 Output Enabling" "0: Output of A/D conversion start request signal..,1: Output of A/D conversion start request signal.." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "ADSMS0,A/D Conversion Start Request Signal Monitor 0 Selection" "0: A/D conversion start request signal generated by..,1: A/D conversion start request signal generated by..,?,?" group.long 0xB8++0x7 line.long 0x0 "GTICLF,General PWM Timer Inter Channel Logical Operation Function Setting Register" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 20.--25. 1. "ICLFSELD,Inter Channel Signal D Select" newline bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16.--18. "ICLFB,GTIOCnB Output Logical Operation Function Select" "0: B (no delay),1: NOT B (no delay),?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.long.byte 0x0 4.--9. 1. "ICLFSELC,Inter Channel Signal C Select" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "ICLFA,GTIOCnA Output Logical Operation Function Select" "0: A (no delay),1: NOT A (no delay),?,?,?,?,?,?" line.long 0x4 "GTPC,General PWM Timer Period Count Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.word 0x4 16.--27. 1. "PCNT,Period Counter" newline hexmask.long.byte 0x4 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 8. "ASTP,Automatic Stop Function Enable" "0: Automatic stop function is disabled.,1: Automatic stop function is enabled." newline bitfld.long 0x4 0. "PCEN,Period Count Function Enable" "0: Period count function is disabled.,1: Period count function is enabled." group.long 0xD0++0x7 line.long 0x0 "GTSECSR,General PWM Timer Operation Enable Bit Simultaneous Control Channel Select Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "SECSEL13,Channel 13 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 12. "SECSEL12,Channel 12 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 11. "SECSEL11,Channel 11 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 10. "SECSEL10,Channel 10 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 9. "SECSEL9,Channel 9 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 8. "SECSEL8,Channel 8 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 7. "SECSEL7,Channel 7 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 6. "SECSEL6,Channel 6 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 5. "SECSEL5,Channel 5 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 4. "SECSEL4,Channel 4 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 3. "SECSEL3,Channel 3 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 2. "SECSEL2,Channel 2 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." newline bitfld.long 0x0 1. "SECSEL1,Channel 1 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." bitfld.long 0x0 0. "SECSEL0,Channel 0 Operation Enable BitSimultaneous Control Channel Select" "0: Disable simultaneous control.,1: Enable simultaneous control." line.long 0x4 "GTSECR,General PWM Timer Operation Enable Bit Simultaneous Control Register" hexmask.long.byte 0x4 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 24. "SPCD,Period Count Function Simultaneous Disable" "0: Disable simultaneous disabling period count..,1: Disable period count function simultaneously" hexmask.long.byte 0x4 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "SPCE,Period Count Function Simultaneous Enable" "0: Disable simultaneous enabling period count..,1: Enable period count function simultaneously" newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 10. "SBDAD,GTADTR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTADTR buffer..,1: Disable GTADTR register buffer operations.." bitfld.long 0x4 9. "SBDPD,GTPR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTPR buffer..,1: Disable GTPR register buffer operations.." newline bitfld.long 0x4 8. "SBDCD,GTCCR Register Buffer Operation Simultaneous Disable" "0: Disable simultaneous disabling GTCCR buffer..,1: Disable GTCCR register buffer operations.." hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 2. "SBDAE,GTADTR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTADTR buffer..,1: Enable GTADTR register buffer operations.." newline bitfld.long 0x4 1. "SBDPE,GTPR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTPR buffer..,1: Enable GTPR register buffer operations.." bitfld.long 0x4 0. "SBDCE,GTCCR Register Buffer Operation Simultaneous Enable" "0: Disable simultaneous enabling GTCCR buffer..,1: Enable GTCCR register buffer operations.." tree.end tree.end tree "GPT_OPS (Output Phase Switching Controller)" tree "GPT_OPS" base ad:0x40323F00 group.long 0x0++0x3 line.long 0x0 "OPSCR,Output Phase Switching Control Register" bitfld.long 0x0 30.--31. "NFCS,External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input." "0: PCLKGPT0/1,1: PCLKGPT0/4,?,?" bitfld.long 0x0 29. "NFEN,External Input Noise Filter Enable" "0: Do not use a noise filter to the external input.,1: Use a noise filter to the external input." newline bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "GODF,Group output disable function" "0: This bit function is ignored.,1: Group disable will clear OPSCR.EN Bit." bitfld.long 0x0 24.--25. "GRP,Output disabled source selection" "0: Select Group A output disable source,1: Select Group B output disable source,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "ALIGN,Input phase alignment" "0: Input phase is aligned to PCLK.,1: Input phase is aligned PWM." newline bitfld.long 0x0 20. "RV,Output phase rotation direction reversal" "0,1" bitfld.long 0x0 19. "INV,Invert-Phase Output Control" "0: Positive Logic (Active High)output,1: Negative Logic (Active Low)output" newline bitfld.long 0x0 18. "N,Negative-Phase Output (N) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)" bitfld.long 0x0 17. "P,Positive-Phase Output (P) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)" newline bitfld.long 0x0 16. "FB,External Feedback Signal EnableThis bit selects the input phase from the software settings and external input." "0: Select the external input.,1: Select the soft setting(OPSCR.UF VF WF)." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "EN,Enable-Phase Output Control" "0: Not Output(Hi-Z external terminals).,1: Output" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.long 0x0 6. "W,Input W-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKGPT0OPSCR.FB=1:Software settings (UF/VF/WF)" "0: External input monitoring by PCLKGPT0OPSCR,1: Software settings" rbitfld.long 0x0 5. "V,Input V-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKGPT0OPSCR.FB=1:Software settings (UF/VF/WF)" "0: External input monitoring by PCLKGPT0OPSCR,1: Software settings" newline rbitfld.long 0x0 4. "U,Input U-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKGPT0OPSCR.FB=1:Software settings (UF/VF/WF)" "0: External input monitoring by PCLKGPT0OPSCR,1: Software settings" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "WF,Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1." "0,1" bitfld.long 0x0 1. "VF,Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1." "0,1" newline bitfld.long 0x0 0. "UF,Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1." "0,1" tree.end tree "GPT_OPS_NS" base ad:0x50323F00 group.long 0x0++0x3 line.long 0x0 "OPSCR,Output Phase Switching Control Register" bitfld.long 0x0 30.--31. "NFCS,External Input Noise Filter Clock selectionNoise filter sampling clock setting of the external input." "0: PCLKGPT0/1,1: PCLKGPT0/4,?,?" bitfld.long 0x0 29. "NFEN,External Input Noise Filter Enable" "0: Do not use a noise filter to the external input.,1: Use a noise filter to the external input." newline bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "GODF,Group output disable function" "0: This bit function is ignored.,1: Group disable will clear OPSCR.EN Bit." bitfld.long 0x0 24.--25. "GRP,Output disabled source selection" "0: Select Group A output disable source,1: Select Group B output disable source,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "ALIGN,Input phase alignment" "0: Input phase is aligned to PCLK.,1: Input phase is aligned PWM." newline bitfld.long 0x0 20. "RV,Output phase rotation direction reversal" "0,1" bitfld.long 0x0 19. "INV,Invert-Phase Output Control" "0: Positive Logic (Active High)output,1: Negative Logic (Active Low)output" newline bitfld.long 0x0 18. "N,Negative-Phase Output (N) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)" bitfld.long 0x0 17. "P,Positive-Phase Output (P) Control" "0: Level signal output,1: PWM signal output (PWM of GPT0)" newline bitfld.long 0x0 16. "FB,External Feedback Signal EnableThis bit selects the input phase from the software settings and external input." "0: Select the external input.,1: Select the soft setting(OPSCR.UF VF WF)." hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 8. "EN,Enable-Phase Output Control" "0: Not Output(Hi-Z external terminals).,1: Output" bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.long 0x0 6. "W,Input W-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKGPT0OPSCR.FB=1:Software settings (UF/VF/WF)" "0: External input monitoring by PCLKGPT0OPSCR,1: Software settings" rbitfld.long 0x0 5. "V,Input V-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKGPT0OPSCR.FB=1:Software settings (UF/VF/WF)" "0: External input monitoring by PCLKGPT0OPSCR,1: Software settings" newline rbitfld.long 0x0 4. "U,Input U-Phase MonitorThis bit monitors the state of the input phase.OPSCR.FB=0:External input monitoring by PCLKGPT0OPSCR.FB=1:Software settings (UF/VF/WF)" "0: External input monitoring by PCLKGPT0OPSCR,1: Software settings" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "WF,Input Phase Soft Setting WFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1." "0,1" bitfld.long 0x0 1. "VF,Input Phase Soft Setting VFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1." "0,1" newline bitfld.long 0x0 0. "UF,Input Phase Soft Setting UFThis bit sets the input phase by the software settings.This bit setting is valid when the OPSCR.FB bit = 1." "0,1" tree.end tree.end tree.end tree "I3C (I3C Bus Interface)" base ad:0x0 tree "I3C" base ad:0x4035F000 group.long 0x0++0x3 line.long 0x0 "PRTS,Protocol Selection Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PRTMD,Protocol Mode." "0: I3C Protocol mode.,1: I2C Protocol mode." group.word 0x0++0x1 line.word 0x0 "PRTS_HA_L,Protocol Selection Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "PRTMD,Protocol Mode." "0: I3C Protocol mode.,1: I2C Protocol mode." group.byte 0x0++0x0 line.byte 0x0 "PRTS_BY_LL,Protocol Selection Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PRTMD,Protocol Mode." "0: I3C Protocol mode.,1: I2C Protocol mode." group.long 0x14++0x3 line.long 0x0 "BCTL,Bus Control Register" bitfld.long 0x0 31. "BUSE,Bus Enable" "0: This IP bus operation is Disabled,1: This IP bus operation is Enabled" eventfld.long 0x0 30. "RSM,Resume Values when read:" "0: This IP is Running,1: This IP is Suspended (RW1C)" newline bitfld.long 0x0 29. "ABT,Abort" "0: This IP is Running,1: This IP has Aborted a transfer" hexmask.long.tbyte 0x0 9.--28. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." newline bitfld.long 0x0 8. "HJACKCTL,Hot-Join Acknowledge Control" "0: ACK the Hot-Join request,1: NACK and send broadcast CCC to disable Hot-Join" bitfld.long 0x0 7. "BMDS,Bus Mode Selection" "0: Legacy inclusive Bus mode disabled,1: Legacy inclusive (mix) Bus mode enabled" newline hexmask.long.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0. "INCBA,Include I3C Broadcast Address" "0: Do not include I3C Broadcast Address for Private..,1: Include I3C Broadcast Address for Private.." group.word 0x14++0x1 line.word 0x0 "BCTL_HA_L,Bus Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "HJACKCTL,Hot-Join Acknowledge Control" "0: ACK the Hot-Join request,1: NACK and send broadcast CCC to disable Hot-Join" newline bitfld.word 0x0 7. "BMDS,Bus Mode Selection" "0: Legacy inclusive Bus mode disabled,1: Legacy inclusive (mix) Bus mode enabled" hexmask.word.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0. "INCBA,Include I3C Broadcast Address" "0: Do not include I3C Broadcast Address for Private..,1: Include I3C Broadcast Address for Private.." group.byte 0x14++0x1 line.byte 0x0 "BCTL_BY_LL,Bus Control Register" bitfld.byte 0x0 7. "BMDS,Bus Mode Selection" "0: Legacy inclusive Bus mode disabled,1: Legacy inclusive (mix) Bus mode enabled" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "INCBA,Include I3C Broadcast Address" "0: Do not include I3C Broadcast Address for Private..,1: Include I3C Broadcast Address for Private.." line.byte 0x1 "BCTL_BY_LH,Bus Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "HJACKCTL,Hot-Join Acknowledge Control" "0: ACK the Hot-Join request,1: NACK and send broadcast CCC to disable Hot-Join" group.word 0x16++0x1 line.word 0x0 "BCTL_HA_H,Bus Control Register" bitfld.word 0x0 15. "BUSE,Bus Enable" "0: This IP bus operation is Disabled,1: This IP bus operation is Enabled" eventfld.word 0x0 14. "RSM,Resume Values when read:" "0: This IP is Running,1: This IP is Suspended (RW1C)" newline bitfld.word 0x0 13. "ABT,Abort" "0: This IP is Running,1: This IP has Aborted a transfer" hexmask.word 0x0 0.--12. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." group.byte 0x17++0x0 line.byte 0x0 "BCTL_BY_HH,Bus Control Register" bitfld.byte 0x0 7. "BUSE,Bus Enable" "0: This IP bus operation is Disabled,1: This IP bus operation is Enabled" eventfld.byte 0x0 6. "RSM,Resume Values when read:" "0: This IP is Running,1: This IP is Suspended (RW1C)" newline bitfld.byte 0x0 5. "ABT,Abort" "0: This IP is Running,1: This IP has Aborted a transfer" hexmask.byte 0x0 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x18++0x3 line.long 0x0 "MSDVAD,Master Device Address Register" bitfld.long 0x0 31. "MDYADV,Master Dynamic Address Valid" "0: The Master Dynamic Address field is not valid,1: The Master Dynamic Address Field is valid" hexmask.long.byte 0x0 23.--30. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.long.byte 0x0 16.--22. 1. "MDYAD,Master Dynamic Address" hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." group.word 0x1A++0x1 line.word 0x0 "MSDVAD_HA_H,Master Device Address Register" bitfld.word 0x0 15. "MDYADV,Master Dynamic Address Valid" "0: The Master Dynamic Address field is not valid,1: The Master Dynamic Address Field is valid" hexmask.word.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.word.byte 0x0 0.--6. 1. "MDYAD,Master Dynamic Address" group.byte 0x1A++0x1 line.byte 0x0 "MSDVAD_BY_HL,Master Device Address Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "MDYAD,Master Dynamic Address" line.byte 0x1 "MSDVAD_BY_HH,Master Device Address Register" bitfld.byte 0x1 7. "MDYADV,Master Dynamic Address Valid" "0: The Master Dynamic Address field is not valid,1: The Master Dynamic Address Field is valid" hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.long 0x20++0x3 line.long 0x0 "RSTCTL,Reset Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "INTLRST,Internal Software Reset" "0: Releases of some registers and internal state.,1: Resets of some registers and internal state." newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "HRDBRST,High Priority Rx DATA Buffer Software Reset" "0: The High Priority Receive Queues in this IP do..,1: The High Priority Receive Queues in this IP flush." newline bitfld.long 0x0 11. "HTDBRST,High Priority Tx DATA Buffer Software Reset" "0: The High Priority Transmit Queues in this IP do..,1: The High Priority Transmit Queues in this IP.." bitfld.long 0x0 10. "HRSPQRST,High Priority Response Queue Software Reset" "0: The High Priority Response Queues in this IP do..,1: The High Priority Response Queues in this IP.." newline bitfld.long 0x0 9. "HCMDQRST,High Priority Command Queue Software Reset" "0: The High Priority Command Queues in this IP do..,1: The High Priority Command Queues in this IP flush." bitfld.long 0x0 7.--8. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 6. "RSQRST,Receive Status Queue Software Reset" "0: The Receive Status Queue in this IP do not flush.,1: The Receive Status Queue in this IP flush" bitfld.long 0x0 5. "IBIQRST,IBI Queue Software Reset" "0: The IBI Queues in this IP do not flush.,1: The IBI Queues in this IP flush." newline bitfld.long 0x0 4. "RDBRST,Rx DATA Buffer Software Reset" "0: The Receive Queues in this IP do not flush.,1: The Receive Queues in this IP flush." bitfld.long 0x0 3. "TDBRST,Tx DATA Buffer Software Reset" "0: The Transmit Queues in this IP do not flush.,1: The Transmit Queues in this IP flush." newline bitfld.long 0x0 2. "RSPQRST,Response Queue Software Reset" "0: The Response Queues in this IP do not flush.,1: The Response Queues in this IP flush." bitfld.long 0x0 1. "CMDQRST,Command Queue Software Reset" "0: The Command Queues in this IP do not flush.,1: The Command Queues in this IP flush." newline bitfld.long 0x0 0. "RI3CRST,R-I3C Software Reset" "0: Releases of All registers and Internal State.,1: Reset of All registers and Internal State." group.word 0x20++0x1 line.word 0x0 "RSTCTL_HA_L,Reset Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "HRDBRST,High Priority Rx DATA Buffer Software Reset" "0: The High Priority Receive Queues in this IP do..,1: The High Priority Receive Queues in this IP flush." newline bitfld.word 0x0 11. "HTDBRST,High Priority Tx DATA Buffer Software Reset" "0: The High Priority Transmit Queues in this IP do..,1: The High Priority Transmit Queues in this IP.." bitfld.word 0x0 10. "HRSPQRST,High Priority Response Queue Software Reset" "0: The High Priority Response Queues in this IP do..,1: The High Priority Response Queues in this IP.." newline bitfld.word 0x0 9. "HCMDQRST,High Priority Command Queue Software Reset" "0: The High Priority Command Queues in this IP do..,1: The High Priority Command Queues in this IP flush." bitfld.word 0x0 7.--8. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 6. "RSQRST,Receive Status Queue Software Reset" "0: The Receive Status Queue in this IP do not flush.,1: The Receive Status Queue in this IP flush" bitfld.word 0x0 5. "IBIQRST,IBI Queue Software Reset" "0: The IBI Queues in this IP do not flush.,1: The IBI Queues in this IP flush." newline bitfld.word 0x0 4. "RDBRST,Rx DATA Buffer Software Reset" "0: The Receive Queues in this IP do not flush.,1: The Receive Queues in this IP flush." bitfld.word 0x0 3. "TDBRST,Tx DATA Buffer Software Reset" "0: The Transmit Queues in this IP do not flush.,1: The Transmit Queues in this IP flush." newline bitfld.word 0x0 2. "RSPQRST,Response Queue Software Reset" "0: The Response Queues in this IP do not flush.,1: The Response Queues in this IP flush." bitfld.word 0x0 1. "CMDQRST,Command Queue Software Reset" "0: The Command Queues in this IP do not flush.,1: The Command Queues in this IP flush." newline bitfld.word 0x0 0. "RI3CRST,R-I3C Software Reset" "0: Releases of All registers and Internal State.,1: Reset of All registers and Internal State." group.byte 0x20++0x1 line.byte 0x0 "RSTCTL_BY_LL,Reset Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "RSQRST,Receive Status Queue Software Reset" "0: The Receive Status Queue in this IP do not flush.,1: The Receive Status Queue in this IP flush" newline bitfld.byte 0x0 5. "IBIQRST,IBI Queue Software Reset" "0: The IBI Queues in this IP do not flush.,1: The IBI Queues in this IP flush." bitfld.byte 0x0 4. "RDBRST,Rx DATA Buffer Software Reset" "0: The Receive Queues in this IP do not flush.,1: The Receive Queues in this IP flush." newline bitfld.byte 0x0 3. "TDBRST,Tx DATA Buffer Software Reset" "0: The Transmit Queues in this IP do not flush.,1: The Transmit Queues in this IP flush." bitfld.byte 0x0 2. "RSPQRST,Response Queue Software Reset" "0: The Response Queues in this IP do not flush.,1: The Response Queues in this IP flush." newline bitfld.byte 0x0 1. "CMDQRST,Command Queue Software Reset" "0: The Command Queues in this IP do not flush.,1: The Command Queues in this IP flush." bitfld.byte 0x0 0. "RI3CRST,R-I3C Software Reset" "0: Releases of All registers and Internal State.,1: Reset of All registers and Internal State." line.byte 0x1 "RSTCTL_BY_LH,Reset Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "HRDBRST,High Priority Rx DATA Buffer Software Reset" "0: The High Priority Receive Queues in this IP do..,1: The High Priority Receive Queues in this IP flush." newline bitfld.byte 0x1 3. "HTDBRST,High Priority Tx DATA Buffer Software Reset" "0: The High Priority Transmit Queues in this IP do..,1: The High Priority Transmit Queues in this IP.." bitfld.byte 0x1 2. "HRSPQRST,High Priority Response Queue Software Reset" "0: The High Priority Response Queues in this IP do..,1: The High Priority Response Queues in this IP.." newline bitfld.byte 0x1 1. "HCMDQRST,High Priority Command Queue Software Reset" "0: The High Priority Command Queues in this IP do..,1: The High Priority Command Queues in this IP flush." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x22++0x1 line.word 0x0 "RSTCTL_HA_H,Reset Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "INTLRST,Internal Software Reset" "0: Releases of some registers and internal state.,1: Resets of some registers and internal state." group.byte 0x22++0x0 line.byte 0x0 "RSTCTL_BY_HL,Reset Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "INTLRST,Internal Software Reset" "0: Releases of some registers and internal state.,1: Resets of some registers and internal state." group.long 0x24++0x3 line.long 0x0 "PRSST,Present State Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 7. "PRSSTWP,Present State Write Protect" "0: Bit CRMS is protected.,1: Bit CRMS can be written (When writing.." bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 4. "TRMD,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "CRMS,Current Master" "0: The Master is not the Current Master and must..,1: The Master is the Current Master and as a result.." bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.word 0x24++0x1 line.word 0x0 "PRSST_HA_L,Present State Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 7. "PRSSTWP,Present State Write Protect" "0: Bit CRMS is protected.,1: Bit CRMS can be written (When writing.." newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.word 0x0 4. "TRMD,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "CRMS,Current Master" "0: The Master is not the Current Master and must..,1: The Master is the Current Master and as a result.." newline bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.byte 0x24++0x0 line.byte 0x0 "PRSST_BY_LL,Present State Register" bitfld.byte 0x0 7. "PRSSTWP,Present State Write Protect" "0: Bit CRMS is protected.,1: Bit CRMS can be written (When writing.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.byte 0x0 4. "TRMD,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 2. "CRMS,Current Master" "0: The Master is not the Current Master and must..,1: The Master is the Current Master and as a result.." bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x30++0x3 line.long 0x0 "INST,Internal Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "INEF,Internal Error Flag" "0: This IP Internal Error has not detected,1: This IP Internal Error has detected" hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.word 0x30++0x1 line.word 0x0 "INST_HA_L,Internal Status Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "INEF,Internal Error Flag" "0: This IP Internal Error has not detected,1: This IP Internal Error has detected" newline hexmask.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.byte 0x31++0x0 line.byte 0x0 "INST_BY_LH,Internal Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "INEF,Internal Error Flag" "0: This IP Internal Error has not detected,1: This IP Internal Error has detected" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x34++0x3 line.long 0x0 "INSTE,Internal Status Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "INEE,Internal Error Enable" "0: Disable INST.INEF,1: Enable INST.INEF" hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.word 0x34++0x1 line.word 0x0 "INSTE_HA_L,Internal Status Enable Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "INEE,Internal Error Enable" "0: Disable INST.INEF,1: Enable INST.INEF" newline hexmask.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.byte 0x35++0x0 line.byte 0x0 "INSTE_BY_LH,Internal Status Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "INEE,Internal Error Enable" "0: Disable INST.INEF,1: Enable INST.INEF" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x38++0x3 line.long 0x0 "INIE,Internal Interrupt Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "INEIE,Internal Error Interrupt Enable" "0: Disables Non-recoverable Internal Error..,1: Enables Non-recoverable Internal Error Interrupt.." hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.word 0x38++0x1 line.word 0x0 "INIE_HA_L,Internal Interrupt Enable Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "INEIE,Internal Error Interrupt Enable" "0: Disables Non-recoverable Internal Error..,1: Enables Non-recoverable Internal Error Interrupt.." newline hexmask.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.byte 0x39++0x0 line.byte 0x0 "INIE_BY_LH,Internal Interrupt Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "INEIE,Internal Error Interrupt Enable" "0: Disables Non-recoverable Internal Error..,1: Enables Non-recoverable Internal Error Interrupt.." newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" wgroup.long 0x3C++0x3 line.long 0x0 "INSTFC,Internal Status Force Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,The write value should be 00000." newline bitfld.long 0x0 10. "INEFC,Internal Error Force" "0: not force a specific interrupt,1: force a specific interrupt" hexmask.long.word 0x0 0.--9. 1. "Reserved,The write value should be 0000000000." wgroup.word 0x3C++0x1 line.word 0x0 "INSTFC_HA_L,Internal Status Force Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 10. "INEFC,Internal Error Force" "0: not force a specific interrupt,1: force a specific interrupt" newline hexmask.word 0x0 0.--9. 1. "Reserved,The write value should be 0000000000." wgroup.byte 0x3D++0x0 line.byte 0x0 "INSTFC_BY_LH,Internal Status Force Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "INEFC,Internal Error Force" "0: not force a specific interrupt,1: force a specific interrupt" newline bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" rgroup.long 0x44++0x3 line.long 0x0 "DVCT,Device Characteristic Table Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.byte 0x0 19.--23. 1. "IDX,DCT Table Index" newline hexmask.long.tbyte 0x0 0.--18. 1. "Reserved,These bits are read as 0000000000000000000." rgroup.word 0x46++0x1 line.word 0x0 "DVCT_HA_H,Device Characteristic Table Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 3.--7. 1. "IDX,DCT Table Index" newline bitfld.word 0x0 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" rgroup.byte 0x46++0x0 line.byte 0x0 "DVCT_BY_HL,Device Characteristic Table Register" hexmask.byte 0x0 3.--7. 1. "IDX,DCT Table Index" bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" group.long 0x58++0x3 line.long 0x0 "IBINCTL,IBI Notify Control Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "NRSIRCTL,Notify Rejected Slave Interrupt Request Control" "0: Do not pass rejected IBI Status to the IBI..,1: Pass rejected IBI Status to the IBI Queue/Rings.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "NRMRCTL,Notify Rejected Master Request Control" "0: Do not pass rejected IBI Status to IBI..,1: Pass rejected IBI Status to the IBI Queue if the.." newline bitfld.long 0x0 0. "NRHJCTL,Notify Rejected Hot-Join Control" "0: Do not pass rejected IBI Status to IBI Queue if..,1: Pass rejected IBI Status to the IBI Queue if the.." group.word 0x58++0x1 line.word 0x0 "IBINCTL_HA_L,IBI Notify Control Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "NRSIRCTL,Notify Rejected Slave Interrupt Request Control" "0: Do not pass rejected IBI Status to the IBI..,1: Pass rejected IBI Status to the IBI Queue/Rings.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "NRMRCTL,Notify Rejected Master Request Control" "0: Do not pass rejected IBI Status to IBI..,1: Pass rejected IBI Status to the IBI Queue if the.." newline bitfld.word 0x0 0. "NRHJCTL,Notify Rejected Hot-Join Control" "0: Do not pass rejected IBI Status to IBI Queue if..,1: Pass rejected IBI Status to the IBI Queue if the.." group.byte 0x58++0x0 line.byte 0x0 "IBINCTL_BY_LL,IBI Notify Control Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "NRSIRCTL,Notify Rejected Slave Interrupt Request Control" "0: Do not pass rejected IBI Status to the IBI..,1: Pass rejected IBI Status to the IBI Queue/Rings.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "NRMRCTL,Notify Rejected Master Request Control" "0: Do not pass rejected IBI Status to IBI..,1: Pass rejected IBI Status to the IBI Queue if the.." newline bitfld.byte 0x0 0. "NRHJCTL,Notify Rejected Hot-Join Control" "0: Do not pass rejected IBI Status to IBI Queue if..,1: Pass rejected IBI Status to the IBI Queue if the.." group.long 0x60++0x3 line.long 0x0 "BFCTL,Bus Function Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 15. "HSME,High Speed Mode Enable" "0: Disable High Speed Mode.,1: Enable High Speed Mode." newline bitfld.long 0x0 14. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit uses for the SCLn..,1: An Fm+ slope control circuit uses for the SCLn.." bitfld.long 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 12. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus select.,1: The SMBus select." bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 8. "SCSYNE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit uses.,1: An SCL synchronous circuit uses." hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection disables.,1: Slave arbitration-lost detection enables." bitfld.long 0x0 1. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." newline bitfld.long 0x0 0. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection disables.,1: Master arbitration-lost detection enables." group.word 0x60++0x1 line.word 0x0 "BFCTL_HA_L,Bus Function Control Register" bitfld.word 0x0 15. "HSME,High Speed Mode Enable" "0: Disable High Speed Mode.,1: Enable High Speed Mode." bitfld.word 0x0 14. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit uses for the SCLn..,1: An Fm+ slope control circuit uses for the SCLn.." newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus select.,1: The SMBus select." newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "SCSYNE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit uses.,1: An SCL synchronous circuit uses." newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 2. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection disables.,1: Slave arbitration-lost detection enables." newline bitfld.word 0x0 1. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." bitfld.word 0x0 0. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection disables.,1: Master arbitration-lost detection enables." group.byte 0x60++0x1 line.byte 0x0 "BFCTL_BY_LL,Bus Function Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection disables.,1: Slave arbitration-lost detection enables." newline bitfld.byte 0x0 1. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." bitfld.byte 0x0 0. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection disables.,1: Master arbitration-lost detection enables." line.byte 0x1 "BFCTL_BY_LH,Bus Function Control Register" bitfld.byte 0x1 7. "HSME,High Speed Mode Enable" "0: Disable High Speed Mode.,1: Enable High Speed Mode." bitfld.byte 0x1 6. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit uses for the SCLn..,1: An Fm+ slope control circuit uses for the SCLn.." newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus select.,1: The SMBus select." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SCSYNE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit uses.,1: An SCL synchronous circuit uses." group.long 0x64++0x3 line.long 0x0 "SVCTL,Slave Control Register" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 16.--18. "SVAE,Slave Address Enable x (x=2 to 0)" "0: Slave x disables.,1: Slave x enables.,?,?,?,?,?,?" newline bitfld.long 0x0 15. "HOAE,Host Address Enable" "0: Host address detection disables.,1: Host address detection enables." hexmask.long.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6. "DVIDE,Device-ID Address Enable" "0: Device-ID address detection disables.,1: Device-ID address detection enables." bitfld.long 0x0 5. "HSMCE,Hs-mode Master Code Enable" "0: Hs-mode Master Code Detection disables.,1: Hs-mode Master Code Detection enables." newline hexmask.long.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 0. "GCAE,General Call Address Enable" "0: General call address detection disables.,1: General call address detection enables." group.word 0x64++0x1 line.word 0x0 "SVCTL_HA_L,Slave Control Register" bitfld.word 0x0 15. "HOAE,Host Address Enable" "0: Host address detection disables.,1: Host address detection enables." hexmask.word.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.word 0x0 6. "DVIDE,Device-ID Address Enable" "0: Device-ID address detection disables.,1: Device-ID address detection enables." bitfld.word 0x0 5. "HSMCE,Hs-mode Master Code Enable" "0: Hs-mode Master Code Detection disables.,1: Hs-mode Master Code Detection enables." newline hexmask.word.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 0. "GCAE,General Call Address Enable" "0: General call address detection disables.,1: General call address detection enables." group.byte 0x64++0x1 line.byte 0x0 "SVCTL_BY_LL,Slave Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "DVIDE,Device-ID Address Enable" "0: Device-ID address detection disables.,1: Device-ID address detection enables." newline bitfld.byte 0x0 5. "HSMCE,Hs-mode Master Code Enable" "0: Hs-mode Master Code Detection disables.,1: Hs-mode Master Code Detection enables." hexmask.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0. "GCAE,General Call Address Enable" "0: General call address detection disables.,1: General call address detection enables." line.byte 0x1 "SVCTL_BY_LH,Slave Control Register" bitfld.byte 0x1 7. "HOAE,Host Address Enable" "0: Host address detection disables.,1: Host address detection enables." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.word 0x66++0x1 line.word 0x0 "SVCTL_HA_H,Slave Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "SVAE,Slave Address Enable x (x=2 to 0)" "0: Slave x disables.,1: Slave x enables.,?,?,?,?,?,?" group.byte 0x66++0x0 line.byte 0x0 "SVCTL_BY_HL,Slave Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "SVAE,Slave Address Enable x (x=2 to 0)" "0: Slave x disables.,1: Slave x enables.,?,?,?,?,?,?" group.long 0x70++0x3 line.long 0x0 "REFCKCTL,Reference Clock Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 0.--2. "IREFCKS,Internal Reference Clock SelectionSelects the internal reference clock source (I3C) for this IP." "0: TCLK/1 clock,1: TCLK/2 clock,?,?,?,?,?,?" group.word 0x70++0x1 line.word 0x0 "REFCKCTL_HA_L,Reference Clock Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "IREFCKS,Internal Reference Clock SelectionSelects the internal reference clock source (I3C) for this IP." "0: TCLK/1 clock,1: TCLK/2 clock,?,?,?,?,?,?" group.byte 0x70++0x0 line.byte 0x0 "REFCKCTL_BY_LL,Reference Clock Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "IREFCKS,Internal Reference Clock SelectionSelects the internal reference clock source (I3C) for this IP." "0: TCLK/1 clock,1: TCLK/2 clock,?,?,?,?,?,?" group.long 0x74++0x3 line.long 0x0 "STDBR,Standard Bit Rate Register" bitfld.long 0x0 31. "DSBRPO,Double the Standard Bit Rate Period for Open-Drain" "0: Normal,?" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x0 24.--29. 1. "SBRHP,Standard Bit Rate High-Level Period Push-Pull" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "SBRLP,Standard Bit Rate Low-Level Period Push-Pull" hexmask.long.byte 0x0 8.--15. 1. "SBRHO,Standard Bit Rate High-Level Period Open-Drain" newline hexmask.long.byte 0x0 0.--7. 1. "SBRLO,Standard Bit Rate Low-Level Period Open-Drain" group.word 0x74++0x1 line.word 0x0 "STDBR_HA_L,Standard Bit Rate Register" hexmask.word.byte 0x0 8.--15. 1. "SBRHO,Standard Bit Rate High-Level Period Open-Drain" hexmask.word.byte 0x0 0.--7. 1. "SBRLO,Standard Bit Rate Low-Level Period Open-Drain" group.byte 0x74++0x1 line.byte 0x0 "STDBR_BY_LL,Standard Bit Rate Register" hexmask.byte 0x0 0.--7. 1. "SBRLO,Standard Bit Rate Low-Level Period Open-Drain" line.byte 0x1 "STDBR_BY_LH,Standard Bit Rate Register" hexmask.byte 0x1 0.--7. 1. "SBRHO,Standard Bit Rate High-Level Period Open-Drain" group.word 0x76++0x1 line.word 0x0 "STDBR_HA_H,Standard Bit Rate Register" bitfld.word 0x0 15. "DSBRPO,Double the Standard Bit Rate Period for Open-Drain" "0: Normal,?" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "SBRHP,Standard Bit Rate High-Level Period Push-Pull" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "SBRLP,Standard Bit Rate Low-Level Period Push-Pull" group.byte 0x76++0x1 line.byte 0x0 "STDBR_BY_HL,Standard Bit Rate Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "SBRLP,Standard Bit Rate Low-Level Period Push-Pull" line.byte 0x1 "STDBR_BY_HH,Standard Bit Rate Register" bitfld.byte 0x1 7. "DSBRPO,Double the Standard Bit Rate Period for Open-Drain" "0: Normal,?" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "SBRHP,Standard Bit Rate High-Level Period Push-Pull" group.long 0x78++0x3 line.long 0x0 "EXTBR,Extended Bit Rate Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 24.--29. 1. "EBRHP,Extended Bit Rate Low-Level Period Push-Pull" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "EBRLP,Extended Bit Rate Low-Level Period Push-Pull" newline hexmask.long.byte 0x0 8.--15. 1. "EBRHO,Extended Bit Rate Low-Level Period Open-Drain" hexmask.long.byte 0x0 0.--7. 1. "EBRLO,Extended Bit Rate Low-Level Period Open-Drain" group.word 0x78++0x1 line.word 0x0 "EXTBR_HA_L,Extended Bit Rate Register" hexmask.word.byte 0x0 8.--15. 1. "EBRHO,Extended Bit Rate Low-Level Period Open-Drain" hexmask.word.byte 0x0 0.--7. 1. "EBRLO,Extended Bit Rate Low-Level Period Open-Drain" group.byte 0x78++0x1 line.byte 0x0 "EXTBR_BY_LL,Extended Bit Rate Register" hexmask.byte 0x0 0.--7. 1. "EBRLO,Extended Bit Rate Low-Level Period Open-Drain" line.byte 0x1 "EXTBR_BY_LH,Extended Bit Rate Register" hexmask.byte 0x1 0.--7. 1. "EBRHO,Extended Bit Rate Low-Level Period Open-Drain" group.word 0x7A++0x1 line.word 0x0 "EXTBR_HA_H,Extended Bit Rate Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.word.byte 0x0 8.--13. 1. "EBRHP,Extended Bit Rate Low-Level Period Push-Pull" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.word.byte 0x0 0.--5. 1. "EBRLP,Extended Bit Rate Low-Level Period Push-Pull" group.byte 0x7A++0x1 line.byte 0x0 "EXTBR_BY_HL,Extended Bit Rate Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "EBRLP,Extended Bit Rate Low-Level Period Push-Pull" line.byte 0x1 "EXTBR_BY_HH,Extended Bit Rate Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.byte 0x1 0.--5. 1. "EBRHP,Extended Bit Rate Low-Level Period Push-Pull" group.long 0x7C++0x3 line.long 0x0 "BFRECDT,Bus Free Condition Detection Time Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." hexmask.long.word 0x0 0.--8. 1. "FRECYC,Bus Free Condition Detection Cycle" group.word 0x7C++0x1 line.word 0x0 "BFRECDT_HA_L,Bus Free Condition Detection Time Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "FRECYC,Bus Free Condition Detection Cycle" group.byte 0x7C++0x1 line.byte 0x0 "BFRECDT_BY_LL,Bus Free Condition Detection Time Register" hexmask.byte 0x0 0.--7. 1. "FRECYC,Bus Free Condition Detection Cycle" line.byte 0x1 "BFRECDT_BY_LH,Bus Free Condition Detection Time Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "FRECYC,Bus Free Condition Detection Cycle" "0,1" group.long 0x80++0x3 line.long 0x0 "BAVLCDT,Bus Available Condition Detection Time Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." hexmask.long.word 0x0 0.--8. 1. "AVLCYC,Bus Available Condition Detection Cycle" group.word 0x80++0x1 line.word 0x0 "BAVLCDT_HA_L,Bus Available Condition Detection Time Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "AVLCYC,Bus Available Condition Detection Cycle" group.byte 0x80++0x1 line.byte 0x0 "BAVLCDT_BY_LL,Bus Available Condition Detection Time Register" hexmask.byte 0x0 0.--7. 1. "AVLCYC,Bus Available Condition Detection Cycle" line.byte 0x1 "BAVLCDT_BY_LH,Bus Available Condition Detection Time Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "AVLCYC,Bus Available Condition Detection Cycle" "0,1" group.long 0x84++0x3 line.long 0x0 "BIDLCDT,Bus Idle Condition Detection Time Register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." hexmask.long.tbyte 0x0 0.--17. 1. "IDLCYC,Bus Idle Condition Detection Cycle" group.word 0x84++0x1 line.word 0x0 "BIDLCDT_HA_L,Bus Idle Condition Detection Time Register" hexmask.word 0x0 0.--15. 1. "IDLCYC,Bus Idle Condition Detection Cycle" group.byte 0x84++0x1 line.byte 0x0 "BIDLCDT_BY_LL,Bus Idle Condition Detection Time Register" hexmask.byte 0x0 0.--7. 1. "IDLCYC,Bus Idle Condition Detection Cycle" line.byte 0x1 "BIDLCDT_BY_LH,Bus Idle Condition Detection Time Register" hexmask.byte 0x1 0.--7. 1. "IDLCYC,Bus Idle Condition Detection Cycle" group.word 0x86++0x1 line.word 0x0 "BIDLCDT_HA_H,Bus Idle Condition Detection Time Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x0 0.--1. "IDLCYC,Bus Idle Condition Detection Cycle" "0,1,2,3" group.byte 0x86++0x0 line.byte 0x0 "BIDLCDT_BY_HL,Bus Idle Condition Detection Time Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "IDLCYC,Bus Idle Condition Detection Cycle" "0,1,2,3" group.long 0x88++0x3 line.long 0x0 "OUTCTL,Output Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 15. "SDODCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (I3C) is selected..,1: The internal reference clock divided by 2.." newline hexmask.long.byte 0x0 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 8.--10. "SDOD,SDA Output Delay" "0: No output delay,1: 1 or 2 I3C cycles,?,?,?,?,?,?" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "EXCYC,Extra SCL Clock Cycle Output" "0: (The EXCYC bit is cleared automatically after..,1: Outputs an extra SCL clock cycle." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "SOCWP,SCL/SDA Output Control Write Protect" "0: Bits SCOC and SDOC are protected.,1: Bits SCOC and SDOC can be written (When writing.." newline bitfld.long 0x0 1. "SCOC,SCL Output Control" "0: This IP drives the SCLn pin low.,1: This IP releases the SCLn pin." bitfld.long 0x0 0. "SDOC,SDA Output Control" "0: This IP drives the SDAn pin low.,1: This IP releases the SDAn pin." group.word 0x88++0x1 line.word 0x0 "OUTCTL_HA_L,Output Control Register" bitfld.word 0x0 15. "SDODCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (I3C) is selected..,1: The internal reference clock divided by 2.." hexmask.word.byte 0x0 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.word 0x0 8.--10. "SDOD,SDA Output Delay" "0: No output delay,1: 1 or 2 I3C cycles,?,?,?,?,?,?" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "EXCYC,Extra SCL Clock Cycle Output" "0: (The EXCYC bit is cleared automatically after..,1: Outputs an extra SCL clock cycle." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "SOCWP,SCL/SDA Output Control Write Protect" "0: Bits SCOC and SDOC are protected.,1: Bits SCOC and SDOC can be written (When writing.." bitfld.word 0x0 1. "SCOC,SCL Output Control" "0: This IP drives the SCLn pin low.,1: This IP releases the SCLn pin." newline bitfld.word 0x0 0. "SDOC,SDA Output Control" "0: This IP drives the SDAn pin low.,1: This IP releases the SDAn pin." group.byte 0x88++0x1 line.byte 0x0 "OUTCTL_BY_LL,Output Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "EXCYC,Extra SCL Clock Cycle Output" "0: (The EXCYC bit is cleared automatically after..,1: Outputs an extra SCL clock cycle." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "SOCWP,SCL/SDA Output Control Write Protect" "0: Bits SCOC and SDOC are protected.,1: Bits SCOC and SDOC can be written (When writing.." newline bitfld.byte 0x0 1. "SCOC,SCL Output Control" "0: This IP drives the SCLn pin low.,1: This IP releases the SCLn pin." bitfld.byte 0x0 0. "SDOC,SDA Output Control" "0: This IP drives the SDAn pin low.,1: This IP releases the SDAn pin." line.byte 0x1 "OUTCTL_BY_LH,Output Control Register" bitfld.byte 0x1 7. "SDODCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (I3C) is selected..,1: The internal reference clock divided by 2.." hexmask.byte 0x1 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x1 0.--2. "SDOD,SDA Output Delay" "0: No output delay,1: 1 or 2 I3C cycles,?,?,?,?,?,?" group.long 0x8C++0x3 line.long 0x0 "INCTL,Input Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "DNFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." hexmask.long.byte 0x0 0.--3. 1. "DNFS,Digital Noise Filter Stage Selection" group.word 0x8C++0x1 line.word 0x0 "INCTL_HA_L,Input Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "DNFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." newline hexmask.word.byte 0x0 0.--3. 1. "DNFS,Digital Noise Filter Stage Selection" group.byte 0x8C++0x0 line.byte 0x0 "INCTL_BY_LL,Input Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4. "DNFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." hexmask.byte 0x0 0.--3. 1. "DNFS,Digital Noise Filter Stage Selection" group.long 0x90++0x3 line.long 0x0 "TMOCTL,Timeout Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "TOMDS,Timeout Operation Mode Selection" "0: Timeout is detected during the following..,1: Timeout is detected while the bus is busy,?,?" bitfld.long 0x0 5. "TOHCTL,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.long 0x0 4. "TOLCTL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 0.--1. "TODTS,Timeout Detection Time Selection" "0: 16bit-timeout,1: 14bit-timeout,?,?" group.word 0x90++0x1 line.word 0x0 "TMOCTL_HA_L,Timeout Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "TOMDS,Timeout Operation Mode Selection" "0: Timeout is detected during the following..,1: Timeout is detected while the bus is busy,?,?" newline bitfld.word 0x0 5. "TOHCTL,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." bitfld.word 0x0 4. "TOLCTL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0.--1. "TODTS,Timeout Detection Time Selection" "0: 16bit-timeout,1: 14bit-timeout,?,?" group.byte 0x90++0x0 line.byte 0x0 "TMOCTL_BY_LL,Timeout Control Register" bitfld.byte 0x0 6.--7. "TOMDS,Timeout Operation Mode Selection" "0: Timeout is detected during the following..,1: Timeout is detected while the bus is busy,?,?" bitfld.byte 0x0 5. "TOHCTL,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x0 4. "TOLCTL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 0.--1. "TODTS,Timeout Detection Time Selection" "0: 16bit-timeout,1: 14bit-timeout,?,?" group.long 0x98++0x3 line.long 0x0 "WUCTL,Wake Up Unit Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "WUFE,Wake Up function Enable" "0: Wake-up function disables,1: Wake-up function enables." newline bitfld.long 0x0 6. "WUFSYNE,Wake-Up function Synchronous Enable" "0: This IP asynchronous circuit enable,1: This IP synchronous circuit enable" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "WUANFS,Wake-Up Analog Noise Filter Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "WUACKS,Wake-Up Acknowledge Selection" "0,1" group.word 0x98++0x1 line.word 0x0 "WUCTL_HA_L,Wake Up Unit Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 7. "WUFE,Wake Up function Enable" "0: Wake-up function disables,1: Wake-up function enables." newline bitfld.word 0x0 6. "WUFSYNE,Wake-Up function Synchronous Enable" "0: This IP asynchronous circuit enable,1: This IP synchronous circuit enable" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "WUANFS,Wake-Up Analog Noise Filter Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "WUACKS,Wake-Up Acknowledge Selection" "0,1" group.byte 0x98++0x0 line.byte 0x0 "WUCTL_BY_LL,Wake Up Unit Control Register" bitfld.byte 0x0 7. "WUFE,Wake Up function Enable" "0: Wake-up function disables,1: Wake-up function enables." bitfld.byte 0x0 6. "WUFSYNE,Wake-Up function Synchronous Enable" "0: This IP asynchronous circuit enable,1: This IP synchronous circuit enable" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "WUANFS,Wake-Up Analog Noise Filter Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "WUACKS,Wake-Up Acknowledge Selection" "0,1" group.long 0xA0++0x3 line.long 0x0 "ACKCTL,Acknowledge Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "ACKTWP,ACKT Write Protect" "0: The ACKT bit are protected.,1: The ACKT bit can be written (When writing.." newline bitfld.long 0x0 1. "ACKT,Acknowledge Transmission" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.long 0x0 0. "ACKR,Acknowledge Reception" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." group.word 0xA0++0x1 line.word 0x0 "ACKCTL_HA_L,Acknowledge Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "ACKTWP,ACKT Write Protect" "0: The ACKT bit are protected.,1: The ACKT bit can be written (When writing.." newline bitfld.word 0x0 1. "ACKT,Acknowledge Transmission" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.word 0x0 0. "ACKR,Acknowledge Reception" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." group.byte 0xA0++0x0 line.byte 0x0 "ACKCTL_BY_LL,Acknowledge Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "ACKTWP,ACKT Write Protect" "0: The ACKT bit are protected.,1: The ACKT bit can be written (When writing.." newline bitfld.byte 0x0 1. "ACKT,Acknowledge Transmission" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x0 0. "ACKR,Acknowledge Reception" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." group.long 0xA4++0x3 line.long 0x0 "SCSTRCTL,SCL Stretch Control Register" hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "RWE,Receive Wait Enable" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.long 0x0 0. "ACKTWE,Acknowledge Transmission Wait Enabl (*1)" "0: NTST.RDBFF0 is set at the rising edge of the..,1: NTST.RDBFF0 is set at the rising edge of the.." group.word 0xA4++0x1 line.word 0x0 "SCSTRCTL_HA_L,SCL Stretch Control Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x0 1. "RWE,Receive Wait Enable" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.word 0x0 0. "ACKTWE,Acknowledge Transmission Wait Enabl (*1)" "0: NTST.RDBFF0 is set at the rising edge of the..,1: NTST.RDBFF0 is set at the rising edge of the.." group.byte 0xA4++0x0 line.byte 0x0 "SCSTRCTL_BY_LL,SCL Stretch Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "RWE,Receive Wait Enable" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.byte 0x0 0. "ACKTWE,Acknowledge Transmission Wait Enabl (*1)" "0: NTST.RDBFF0 is set at the rising edge of the..,1: NTST.RDBFF0 is set at the rising edge of the.." group.long 0xB0++0x3 line.long 0x0 "SCSTLCTL,SCL Stalling Control Register" bitfld.long 0x0 31. "ACKPE,ACK phase EnableStall enable bit during ACK/NACK phase" "0: Does not stall the SCL clock during the ACK/NACK..,1: Stall the SCL clock during the ACK/NACK phase." bitfld.long 0x0 30. "PARPE,Parity Phase EnableStall enable bit in parity bit period" "0: Does not stall the SCL clock during the parity..,1: Stall the SCL clock during the parity bit period." newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "AAPE,Assigend Address Phase EnableEnable bit that allows stall by the first bit at address assignment" "0: Does not stall the SCL clock during the address..,1: Stall the SCL clock during the parity bit period.." newline hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.word 0x0 0.--15. 1. "STLCYC,Stalling Cycle" group.word 0xB0++0x1 line.word 0x0 "SCSTLCTL_HA_L,SCL Stalling Control Register" hexmask.word 0x0 0.--15. 1. "STLCYC,Stalling Cycle" group.byte 0xB0++0x1 line.byte 0x0 "SCSTLCTL_BY_LL,SCL Stalling Control Register" hexmask.byte 0x0 0.--7. 1. "STLCYC,Stalling Cycle" line.byte 0x1 "SCSTLCTL_BY_LH,SCL Stalling Control Register" hexmask.byte 0x1 0.--7. 1. "STLCYC,Stalling Cycle" group.word 0xB2++0x1 line.word 0x0 "SCSTLCTL_HA_H,SCL Stalling Control Register" bitfld.word 0x0 15. "ACKPE,ACK phase EnableStall enable bit during ACK/NACK phase" "0: Does not stall the SCL clock during the ACK/NACK..,1: Stall the SCL clock during the ACK/NACK phase." bitfld.word 0x0 14. "PARPE,Parity Phase EnableStall enable bit in parity bit period" "0: Does not stall the SCL clock during the parity..,1: Stall the SCL clock during the parity bit period." newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "AAPE,Assigend Address Phase EnableEnable bit that allows stall by the first bit at address assignment" "0: Does not stall the SCL clock during the address..,1: Stall the SCL clock during the parity bit period.." newline hexmask.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.byte 0xB3++0x0 line.byte 0x0 "SCSTLCTL_BY_HH,SCL Stalling Control Register" bitfld.byte 0x0 7. "ACKPE,ACK phase EnableStall enable bit during ACK/NACK phase" "0: Does not stall the SCL clock during the ACK/NACK..,1: Stall the SCL clock during the ACK/NACK phase." bitfld.byte 0x0 6. "PARPE,Parity Phase EnableStall enable bit in parity bit period" "0: Does not stall the SCL clock during the parity..,1: Stall the SCL clock during the parity bit period." newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "AAPE,Assigend Address Phase EnableEnable bit that allows stall by the first bit at address assignment" "0: Does not stall the SCL clock during the address..,1: Stall the SCL clock during the parity bit period.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0xC0++0x3 line.long 0x0 "SVTDLG0,Slave Transfer Data Length Register 0" hexmask.long.word 0x0 16.--31. 1. "STDLG,Slave Transfer Data Length" hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." group.word 0xC2++0x1 line.word 0x0 "SVTDLG0_HA_H,Slave Transfer Data Length Register 0" hexmask.word 0x0 0.--15. 1. "STDLG,Slave Transfer Data Length" group.byte 0xC2++0x1 line.byte 0x0 "SVTDLG0_BY_HL,Slave Transfer Data Length Register 0" hexmask.byte 0x0 0.--7. 1. "STDLG,Slave Transfer Data Length" line.byte 0x1 "SVTDLG0_BY_HH,Slave Transfer Data Length Register 0" hexmask.byte 0x1 0.--7. 1. "STDLG,Slave Transfer Data Length" group.long 0x120++0x3 line.long 0x0 "STCTL,Synchronous Timiming Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "STOE,Synchronous Timing output Enable" "0: Disable,1: Enable" group.word 0x120++0x1 line.word 0x0 "STCTL_HA_L,Synchronous Timiming Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "STOE,Synchronous Timing output Enable" "0: Disable,1: Enable" group.byte 0x120++0x0 line.byte 0x0 "STCTL_BY_LL,Synchronous Timiming Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "STOE,Synchronous Timing output Enable" "0: Disable,1: Enable" group.long 0x124++0x3 line.long 0x0 "ATCTL,Asynchronous Timimg Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "CDIV,TCLK Counter Divide Setting" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 2. "AMEOE,Additional Master-initiated bus Event Output Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "MREFOE,MREF Output Enable (Capture Event / Counter Overflow)" "0: Disable,1: Enable" bitfld.long 0x0 0. "ATTRGS,Asynchronous Timing Trigger Select" "0: Software Trigger,1: Hardware Trigger" group.word 0x124++0x1 line.word 0x0 "ATCTL_HA_L,Asynchronous Timimg Control Register" hexmask.word.byte 0x0 8.--15. 1. "CDIV,TCLK Counter Divide Setting" hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 2. "AMEOE,Additional Master-initiated bus Event Output Enable" "0: Disable,1: Enable" bitfld.word 0x0 1. "MREFOE,MREF Output Enable (Capture Event / Counter Overflow)" "0: Disable,1: Enable" newline bitfld.word 0x0 0. "ATTRGS,Asynchronous Timing Trigger Select" "0: Software Trigger,1: Hardware Trigger" group.byte 0x124++0x1 line.byte 0x0 "ATCTL_BY_LL,Asynchronous Timimg Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "AMEOE,Additional Master-initiated bus Event Output Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "MREFOE,MREF Output Enable (Capture Event / Counter Overflow)" "0: Disable,1: Enable" bitfld.byte 0x0 0. "ATTRGS,Asynchronous Timing Trigger Select" "0: Software Trigger,1: Hardware Trigger" line.byte 0x1 "ATCTL_BY_LH,Asynchronous Timimg Control Register" hexmask.byte 0x1 0.--7. 1. "CDIV,TCLK Counter Divide Setting" wgroup.long 0x128++0x3 line.long 0x0 "ATTRG,Asynchronous Timiming Trigger Register" hexmask.long 0x0 1.--31. 1. "Reserved,The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "ATSTRG,Asynchronous Timing Software Trigger" "0: Write : do nothing,1: Write : Software trigger (one-shot pulse) output" wgroup.word 0x128++0x1 line.word 0x0 "ATTRG_HA_L,Asynchronous Timiming Trigger Register" hexmask.word 0x0 1.--15. 1. "Reserved,The write value should be 000000000000000." bitfld.word 0x0 0. "ATSTRG,Asynchronous Timing Software Trigger" "0: Write : do nothing,1: Write : Software trigger (one-shot pulse) output" wgroup.byte 0x128++0x0 line.byte 0x0 "ATTRG_BY_LL,Asynchronous Timiming Trigger Register" hexmask.byte 0x0 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x0 0. "ATSTRG,Asynchronous Timing Software Trigger" "0: Write : do nothing,1: Write : Software trigger (one-shot pulse) output" group.long 0x12C++0x3 line.long 0x0 "ATCCNTE,Asynchronous Timing Contorol Counter enable Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "ATCE,Asynchronous Timing Counter Enable for MREF MC2 SC1 SC2." "0: Disable,1: Enable" group.word 0x12C++0x1 line.word 0x0 "ATCCNTE_HA_L,Asynchronous Timing Contorol Counter enable Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "ATCE,Asynchronous Timing Counter Enable for MREF MC2 SC1 SC2." "0: Disable,1: Enable" group.byte 0x12C++0x0 line.byte 0x0 "ATCCNTE_BY_LL,Asynchronous Timing Contorol Counter enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "ATCE,Asynchronous Timing Counter Enable for MREF MC2 SC1 SC2." "0: Disable,1: Enable" group.long 0x140++0x3 line.long 0x0 "CNDCTL,Condition Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "SPCND,STOP (P) Condition Issuance" "0: Does not request to issue a STOP condition.,1: Requests to issue a STOP condition." newline bitfld.long 0x0 1. "SRCND,Repeated START (Sr) Condition Issuance" "0: Does not request to issue a Repeated START..,1: Requests to issue a Repeated START condition." bitfld.long 0x0 0. "STCND,START (S) Condition Issuance" "0: Does not request to issue a START condition.,1: Requests to issue a START condition." group.word 0x140++0x1 line.word 0x0 "CNDCTL_HA_L,Condition Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "SPCND,STOP (P) Condition Issuance" "0: Does not request to issue a STOP condition.,1: Requests to issue a STOP condition." newline bitfld.word 0x0 1. "SRCND,Repeated START (Sr) Condition Issuance" "0: Does not request to issue a Repeated START..,1: Requests to issue a Repeated START condition." bitfld.word 0x0 0. "STCND,START (S) Condition Issuance" "0: Does not request to issue a START condition.,1: Requests to issue a START condition." group.byte 0x140++0x0 line.byte 0x0 "CNDCTL_BY_LL,Condition Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SPCND,STOP (P) Condition Issuance" "0: Does not request to issue a STOP condition.,1: Requests to issue a STOP condition." newline bitfld.byte 0x0 1. "SRCND,Repeated START (Sr) Condition Issuance" "0: Does not request to issue a Repeated START..,1: Requests to issue a Repeated START condition." bitfld.byte 0x0 0. "STCND,START (S) Condition Issuance" "0: Does not request to issue a START condition.,1: Requests to issue a START condition." wgroup.long 0x150++0x3 line.long 0x0 "NCMDQP,Normal Command Queue Port Register" hexmask.long 0x0 0.--31. 1. "NCMDQP,Normal Command Queue Port" rgroup.long 0x154++0x3 line.long 0x0 "NRSPQP,Normal Response Queue Port Register" hexmask.long 0x0 0.--31. 1. "NRSPQP,Normal Response Queue Port" group.long 0x158++0x3 line.long 0x0 "NTDTBP0,Normal Transfer Data Buffer Port Register 0" hexmask.long 0x0 0.--31. 1. "NTDTBP0,Normal Transfer Data Buffer Port" group.byte 0x158++0x0 line.byte 0x0 "NTDTBP0_BY_LL,Normal Transfer Data Buffer Port Register 0" hexmask.byte 0x0 0.--7. 1. "NTDTBP0,Normal Transfer Data Buffer Port" group.long 0x17C++0x3 line.long 0x0 "NIBIQP,Normal IBI Queue Port Register" hexmask.long 0x0 0.--31. 1. "NIBIQP,Normal IBI Queue Port" rgroup.long 0x180++0x3 line.long 0x0 "NRSQP,Normal Receive Status Queue Port Register" hexmask.long 0x0 0.--31. 1. "NRSQP,Normal Receive Status Queue Port" wgroup.long 0x184++0x3 line.long 0x0 "HCMDQP,High Priority Command Queue Port Register" hexmask.long 0x0 0.--31. 1. "HCMDQP,High Priority Command Queue Port" rgroup.long 0x188++0x3 line.long 0x0 "HRSPQP,High Priority Response Queue Port Register" hexmask.long 0x0 0.--31. 1. "HRSPQP,High Priority Response Queue Port" group.long 0x18C++0x7 line.long 0x0 "HTDTBP,High Priority Transfer Data Buffer Port Register" hexmask.long 0x0 0.--31. 1. "HTDTBP,High Priority Transfer Data Buffer Port" line.long 0x4 "NQTHCTL,Normal Queue Threshold Control Register" hexmask.long.byte 0x4 24.--31. 1. "IBIQTH,Normal IBI Queue Threshold" hexmask.long.byte 0x4 16.--23. 1. "IBIDSSZ,Normal IBI Data Segment Size" newline hexmask.long.byte 0x4 8.--15. 1. "RSPQTH,Normal Response Queue Threshold" hexmask.long.byte 0x4 0.--7. 1. "CMDQTH,Normal Command Queue Threshold" group.word 0x190++0x1 line.word 0x0 "NQTHCTL_HA_L,Normal Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQTH,Normal Response Queue Threshold" hexmask.word.byte 0x0 0.--7. 1. "CMDQTH,Normal Command Queue Threshold" group.byte 0x190++0x1 line.byte 0x0 "NQTHCTL_BY_LL,Normal Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "CMDQTH,Normal Command Queue Threshold" line.byte 0x1 "NQTHCTL_BY_LH,Normal Queue Threshold Control Register" hexmask.byte 0x1 0.--7. 1. "RSPQTH,Normal Response Queue Threshold" group.word 0x192++0x1 line.word 0x0 "NQTHCTL_HA_H,Normal Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "IBIQTH,Normal IBI Queue Threshold" hexmask.word.byte 0x0 0.--7. 1. "IBIDSSZ,Normal IBI Data Segment Size" group.byte 0x192++0x1 line.byte 0x0 "NQTHCTL_BY_HL,Normal Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "IBIDSSZ,Normal IBI Data Segment Size" line.byte 0x1 "NQTHCTL_BY_HH,Normal Queue Threshold Control Register" hexmask.byte 0x1 0.--7. 1. "IBIQTH,Normal IBI Queue Threshold" group.long 0x194++0x3 line.long 0x0 "NTBTHCTL0,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 24.--26. "RXSTTH,Normal Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 16.--18. "TXSTTH,Normal Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 8.--10. "RXDBTH,Normal Rx Data Buffer Threshold" "0: Interrupt triggers at 2 Rx Buffer entries DWORDs,1: Interrupt triggers at 4 Rx Buffer entries DWORDs,2: Interrupt triggers at 8 Rx Buffer entries DWORDs,3: Interrupt triggers at 16 Rx Buffer entries DWORDs,4: Interrupt triggers at 32 Rx Buffer entries DWORDs,5: Interrupt triggers at 64 Rx Buffer entries DWORDs,6: Interrupt triggers at 128 Rx Buffer entries..,7: Interrupt triggers at 256 Rx Buffer entries DWORDs" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "TXDBTH,Normal Tx Data Buffer Threshold" "0: Interrupt triggers at 2 Tx Buffer entries DWORDs,1: Interrupt triggers at 4 Tx Buffer entries DWORDs,2: Interrupt triggers at 8 Tx Buffer entries DWORDs,3: Interrupt triggers at 16 Tx Buffer entries DWORDs,4: Interrupt triggers at 32 Tx Buffer entries DWORDs,5: Interrupt triggers at 64 Tx Buffer entries DWORDs,6: Interrupt triggers at 128 Tx Buffer entries..,7: Interrupt triggers at 256 Tx Buffer entries DWORDs" group.word 0x194++0x1 line.word 0x0 "NTBTHCTL0_HA_L,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXDBTH,Normal Rx Data Buffer Threshold" "0: Interrupt triggers at 2 Rx Buffer entries DWORDs,1: Interrupt triggers at 4 Rx Buffer entries DWORDs,2: Interrupt triggers at 8 Rx Buffer entries DWORDs,3: Interrupt triggers at 16 Rx Buffer entries DWORDs,4: Interrupt triggers at 32 Rx Buffer entries DWORDs,5: Interrupt triggers at 64 Rx Buffer entries DWORDs,6: Interrupt triggers at 128 Rx Buffer entries..,7: Interrupt triggers at 256 Rx Buffer entries DWORDs" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXDBTH,Normal Tx Data Buffer Threshold" "0: Interrupt triggers at 2 Tx Buffer entries DWORDs,1: Interrupt triggers at 4 Tx Buffer entries DWORDs,2: Interrupt triggers at 8 Tx Buffer entries DWORDs,3: Interrupt triggers at 16 Tx Buffer entries DWORDs,4: Interrupt triggers at 32 Tx Buffer entries DWORDs,5: Interrupt triggers at 64 Tx Buffer entries DWORDs,6: Interrupt triggers at 128 Tx Buffer entries..,7: Interrupt triggers at 256 Tx Buffer entries DWORDs" group.byte 0x194++0x1 line.byte 0x0 "NTBTHCTL0_BY_LL,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXDBTH,Normal Tx Data Buffer Threshold" "0: Interrupt triggers at 2 Tx Buffer entries DWORDs,1: Interrupt triggers at 4 Tx Buffer entries DWORDs,2: Interrupt triggers at 8 Tx Buffer entries DWORDs,3: Interrupt triggers at 16 Tx Buffer entries DWORDs,4: Interrupt triggers at 32 Tx Buffer entries DWORDs,5: Interrupt triggers at 64 Tx Buffer entries DWORDs,6: Interrupt triggers at 128 Tx Buffer entries..,7: Interrupt triggers at 256 Tx Buffer entries DWORDs" line.byte 0x1 "NTBTHCTL0_BY_LH,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXDBTH,Normal Rx Data Buffer Threshold" "0: Interrupt triggers at 2 Rx Buffer entries DWORDs,1: Interrupt triggers at 4 Rx Buffer entries DWORDs,2: Interrupt triggers at 8 Rx Buffer entries DWORDs,3: Interrupt triggers at 16 Rx Buffer entries DWORDs,4: Interrupt triggers at 32 Rx Buffer entries DWORDs,5: Interrupt triggers at 64 Rx Buffer entries DWORDs,6: Interrupt triggers at 128 Rx Buffer entries..,7: Interrupt triggers at 256 Rx Buffer entries DWORDs" group.word 0x196++0x1 line.word 0x0 "NTBTHCTL0_HA_H,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXSTTH,Normal Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXSTTH,Normal Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" group.byte 0x196++0x1 line.byte 0x0 "NTBTHCTL0_BY_HL,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXSTTH,Normal Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" line.byte 0x1 "NTBTHCTL0_BY_HH,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXSTTH,Normal Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" group.long 0x1C0++0x3 line.long 0x0 "NRQTHCTL,Normal Receive Status Queue Threshold Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RSQTH,Normal Receive Status Queue Threshold" group.word 0x1C0++0x1 line.word 0x0 "NRQTHCTL_HA_L,Normal Receive Status Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "RSQTH,Normal Receive Status Queue Threshold" group.byte 0x1C0++0x0 line.byte 0x0 "NRQTHCTL_BY_LL,Normal Receive Status Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "RSQTH,Normal Receive Status Queue Threshold" group.long 0x1C4++0x3 line.long 0x0 "HQTHCTL,High Priority Queue Threshold Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RSPQTH,High Priority Response Queue Threshold" newline hexmask.long.byte 0x0 0.--7. 1. "CMDQTH,High Priority Command Queue Threshold" group.word 0x1C4++0x1 line.word 0x0 "HQTHCTL_HA_L,High Priority Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQTH,High Priority Response Queue Threshold" hexmask.word.byte 0x0 0.--7. 1. "CMDQTH,High Priority Command Queue Threshold" group.byte 0x1C4++0x1 line.byte 0x0 "HQTHCTL_BY_LL,High Priority Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "CMDQTH,High Priority Command Queue Threshold" line.byte 0x1 "HQTHCTL_BY_LH,High Priority Queue Threshold Control Register" hexmask.byte 0x1 0.--7. 1. "RSPQTH,High Priority Response Queue Threshold" group.long 0x1C8++0x3 line.long 0x0 "HTBTHCTL,High Priority Transfer Data Buffer Threshold Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 24.--26. "RXSTTH,High Priority Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 16.--18. "TXSTTH,High Priority Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 8.--10. "RXDBTH,High Priority Rx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Rx Buffer..,1: Interrupt triggers at 4 High Priority Rx Buffer..,2: Interrupt triggers at 8 High Priority Rx Buffer..,3: Interrupt triggers at 16 High Priority Rx Buffer..,4: Interrupt triggers at 32 High Priority Rx Buffer..,5: Interrupt triggers at 64 High Priority Rx Buffer..,6: Interrupt triggers at 128 High Priority Rx..,7: Interrupt triggers at 256 High Priority Rx.." newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "TXDBTH,High Priority Tx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Tx Buffer..,1: Interrupt triggers at 4 High Priority Tx Buffer..,2: Interrupt triggers at 8 High Priority Tx Buffer..,3: Interrupt triggers at 16 High Priority Tx Buffer..,4: Interrupt triggers at 32 High Priority Tx Buffer..,5: Interrupt triggers at 64 High Priority Tx Buffer..,6: Interrupt triggers at 128 High Priority Tx..,7: Interrupt triggers at 256 High Priority Tx.." group.word 0x1C8++0x1 line.word 0x0 "HTBTHCTL_HA_L,High Priority Transfer Data Buffer Threshold Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXDBTH,High Priority Rx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Rx Buffer..,1: Interrupt triggers at 4 High Priority Rx Buffer..,2: Interrupt triggers at 8 High Priority Rx Buffer..,3: Interrupt triggers at 16 High Priority Rx Buffer..,4: Interrupt triggers at 32 High Priority Rx Buffer..,5: Interrupt triggers at 64 High Priority Rx Buffer..,6: Interrupt triggers at 128 High Priority Rx..,7: Interrupt triggers at 256 High Priority Rx.." newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXDBTH,High Priority Tx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Tx Buffer..,1: Interrupt triggers at 4 High Priority Tx Buffer..,2: Interrupt triggers at 8 High Priority Tx Buffer..,3: Interrupt triggers at 16 High Priority Tx Buffer..,4: Interrupt triggers at 32 High Priority Tx Buffer..,5: Interrupt triggers at 64 High Priority Tx Buffer..,6: Interrupt triggers at 128 High Priority Tx..,7: Interrupt triggers at 256 High Priority Tx.." group.byte 0x1C8++0x1 line.byte 0x0 "HTBTHCTL_BY_LL,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXDBTH,High Priority Tx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Tx Buffer..,1: Interrupt triggers at 4 High Priority Tx Buffer..,2: Interrupt triggers at 8 High Priority Tx Buffer..,3: Interrupt triggers at 16 High Priority Tx Buffer..,4: Interrupt triggers at 32 High Priority Tx Buffer..,5: Interrupt triggers at 64 High Priority Tx Buffer..,6: Interrupt triggers at 128 High Priority Tx..,7: Interrupt triggers at 256 High Priority Tx.." line.byte 0x1 "HTBTHCTL_BY_LH,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXDBTH,High Priority Rx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Rx Buffer..,1: Interrupt triggers at 4 High Priority Rx Buffer..,2: Interrupt triggers at 8 High Priority Rx Buffer..,3: Interrupt triggers at 16 High Priority Rx Buffer..,4: Interrupt triggers at 32 High Priority Rx Buffer..,5: Interrupt triggers at 64 High Priority Rx Buffer..,6: Interrupt triggers at 128 High Priority Rx..,7: Interrupt triggers at 256 High Priority Rx.." group.word 0x1CA++0x1 line.word 0x0 "HTBTHCTL_HA_H,High Priority Transfer Data Buffer Threshold Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXSTTH,High Priority Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXSTTH,High Priority Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" group.byte 0x1CA++0x1 line.byte 0x0 "HTBTHCTL_BY_HL,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXSTTH,High Priority Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" line.byte 0x1 "HTBTHCTL_BY_HH,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXSTTH,High Priority Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" group.long 0x1D0++0x3 line.long 0x0 "BST,Bus Status Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDF,Wake-Up Condition Detection Flag" "0: Wake-Up Condition is not detected,1: Wake-Up Condition is detected" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALF,Arbitration Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "TENDF,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDF,HDR Exit Pattern Detection Flag" "0: HDR Exit Pattern is not detected,1: HDR Exit Pattern is detected" newline bitfld.long 0x0 1. "SPCNDDF,STOP Condition Detection Flag" "0: STOP condition is not detected,1: STOP condition is detected" bitfld.long 0x0 0. "STCNDDF,START Condition Detection Flag" "0: START condition is not detected,1: START condition is detected" group.word 0x1D0++0x1 line.word 0x0 "BST_HA_L,Bus Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "TENDF,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDF,HDR Exit Pattern Detection Flag" "0: HDR Exit Pattern is not detected,1: HDR Exit Pattern is detected" newline bitfld.word 0x0 1. "SPCNDDF,STOP Condition Detection Flag" "0: STOP condition is not detected,1: STOP condition is detected" bitfld.word 0x0 0. "STCNDDF,START Condition Detection Flag" "0: START condition is not detected,1: START condition is detected" group.byte 0x1D0++0x1 line.byte 0x0 "BST_BY_LL,Bus Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDF,HDR Exit Pattern Detection Flag" "0: HDR Exit Pattern is not detected,1: HDR Exit Pattern is detected" newline bitfld.byte 0x0 1. "SPCNDDF,STOP Condition Detection Flag" "0: STOP condition is not detected,1: STOP condition is detected" bitfld.byte 0x0 0. "STCNDDF,START Condition Detection Flag" "0: START condition is not detected,1: START condition is detected" line.byte 0x1 "BST_BY_LH,Bus Status Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "TENDF,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" group.word 0x1D2++0x1 line.word 0x0 "BST_HA_H,Bus Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDF,Wake-Up Condition Detection Flag" "0: Wake-Up Condition is not detected,1: Wake-Up Condition is detected" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALF,Arbitration Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" group.byte 0x1D2++0x1 line.byte 0x0 "BST_BY_HL,Bus Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALF,Arbitration Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" line.byte 0x1 "BST_BY_HH,Bus Status Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDF,Wake-Up Condition Detection Flag" "0: Wake-Up Condition is not detected,1: Wake-Up Condition is detected" group.long 0x1D4++0x3 line.long 0x0 "BSTE,Bus Status Enable Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDE,Wake-up Condition Detection Enable" "0: Disables Wake-up Condition Detection Status..,1: Enables Wake-up Condition Detection Status logging" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODE,Timeout Detection Enable" "0: Disables Timeout Detection Interrupt Status..,1: Enables Timeout Detection Interrupt Status.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALE,Arbitration Lost Enable" "0: Disables Arbitration Lost Interrupt Status..,1: Enables Arbitration Lost Interrupt Status logging." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "TENDE,Transmit End Enable" "0: Disables Transmit End Interrupt Status logging,1: Enables Transmit End Interrupt Status logging" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDE,NACK Detection Enable" "0: Disables NACK Detection Interrupt Status logging.,1: Enables NACK Detection Interrupt Status logging." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDE,HDR Exit Pattern Detection Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.long 0x0 1. "SPCNDDE,STOP Condition Detection Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt.." bitfld.long 0x0 0. "STCNDDE,START Condition Detection Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.word 0x1D4++0x1 line.word 0x0 "BSTE_HA_L,Bus Status Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "TENDE,Transmit End Enable" "0: Disables Transmit End Interrupt Status logging,1: Enables Transmit End Interrupt Status logging" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDE,NACK Detection Enable" "0: Disables NACK Detection Interrupt Status logging.,1: Enables NACK Detection Interrupt Status logging." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDE,HDR Exit Pattern Detection Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.word 0x0 1. "SPCNDDE,STOP Condition Detection Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt.." bitfld.word 0x0 0. "STCNDDE,START Condition Detection Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.byte 0x1D4++0x1 line.byte 0x0 "BSTE_BY_LL,Bus Status Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDE,NACK Detection Enable" "0: Disables NACK Detection Interrupt Status logging.,1: Enables NACK Detection Interrupt Status logging." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDE,HDR Exit Pattern Detection Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.byte 0x0 1. "SPCNDDE,STOP Condition Detection Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt.." bitfld.byte 0x0 0. "STCNDDE,START Condition Detection Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." line.byte 0x1 "BSTE_BY_LH,Bus Status Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "TENDE,Transmit End Enable" "0: Disables Transmit End Interrupt Status logging,1: Enables Transmit End Interrupt Status logging" group.word 0x1D6++0x1 line.word 0x0 "BSTE_HA_H,Bus Status Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDE,Wake-up Condition Detection Enable" "0: Disables Wake-up Condition Detection Status..,1: Enables Wake-up Condition Detection Status logging" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODE,Timeout Detection Enable" "0: Disables Timeout Detection Interrupt Status..,1: Enables Timeout Detection Interrupt Status.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALE,Arbitration Lost Enable" "0: Disables Arbitration Lost Interrupt Status..,1: Enables Arbitration Lost Interrupt Status logging." group.byte 0x1D6++0x1 line.byte 0x0 "BSTE_BY_HL,Bus Status Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODE,Timeout Detection Enable" "0: Disables Timeout Detection Interrupt Status..,1: Enables Timeout Detection Interrupt Status.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALE,Arbitration Lost Enable" "0: Disables Arbitration Lost Interrupt Status..,1: Enables Arbitration Lost Interrupt Status logging." line.byte 0x1 "BSTE_BY_HH,Bus Status Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDE,Wake-up Condition Detection Enable" "0: Disables Wake-up Condition Detection Status..,1: Enables Wake-up Condition Detection Status logging" group.long 0x1D8++0x3 line.long 0x0 "BIE,Bus Interrupt Enable Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDIE,Wake-Up Condition Detection Interrupt Enable" "0: Disables Wake-Up Condition Detection Interrupt..,1: Enables Wake-Up Condition Detection Interrupt.." newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODIE,Timeout Detection Interrupt Enable" "0: Disables Timeout Detection Interrupt Signal.,1: Enables Timeout Detection Interrupt Signal." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALIE,Arbitration Lost Interrupt Enable" "0: Disables Arbitration Lost Interrupt Signal.,1: Enables Arbitration Lost Interrupt Signal." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "TENDIE,Transmit End Interrupt Enable" "0: Disables Transmit End Interrupt Signal.,1: Enables Transmit End Interrupt Signal." newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDIE,NACK Detection Interrupt Enable" "0: Disables NACK Detection Interrupt Signal.,1: Enables NACK Detection Interrupt Signal." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDIE,HDR Exit Pattern Detection Interrupt Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.long 0x0 1. "SPCNDDIE,STOP Condition Detection Interrupt Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt Signal." bitfld.long 0x0 0. "STCNDDIE,START Condition Detection Interrupt Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.word 0x1D8++0x1 line.word 0x0 "BIE_HA_L,Bus Interrupt Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "TENDIE,Transmit End Interrupt Enable" "0: Disables Transmit End Interrupt Signal.,1: Enables Transmit End Interrupt Signal." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDIE,NACK Detection Interrupt Enable" "0: Disables NACK Detection Interrupt Signal.,1: Enables NACK Detection Interrupt Signal." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDIE,HDR Exit Pattern Detection Interrupt Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.word 0x0 1. "SPCNDDIE,STOP Condition Detection Interrupt Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt Signal." bitfld.word 0x0 0. "STCNDDIE,START Condition Detection Interrupt Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.byte 0x1D8++0x1 line.byte 0x0 "BIE_BY_LL,Bus Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDIE,NACK Detection Interrupt Enable" "0: Disables NACK Detection Interrupt Signal.,1: Enables NACK Detection Interrupt Signal." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDIE,HDR Exit Pattern Detection Interrupt Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.byte 0x0 1. "SPCNDDIE,STOP Condition Detection Interrupt Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt Signal." bitfld.byte 0x0 0. "STCNDDIE,START Condition Detection Interrupt Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." line.byte 0x1 "BIE_BY_LH,Bus Interrupt Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "TENDIE,Transmit End Interrupt Enable" "0: Disables Transmit End Interrupt Signal.,1: Enables Transmit End Interrupt Signal." group.word 0x1DA++0x1 line.word 0x0 "BIE_HA_H,Bus Interrupt Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDIE,Wake-Up Condition Detection Interrupt Enable" "0: Disables Wake-Up Condition Detection Interrupt..,1: Enables Wake-Up Condition Detection Interrupt.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODIE,Timeout Detection Interrupt Enable" "0: Disables Timeout Detection Interrupt Signal.,1: Enables Timeout Detection Interrupt Signal." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALIE,Arbitration Lost Interrupt Enable" "0: Disables Arbitration Lost Interrupt Signal.,1: Enables Arbitration Lost Interrupt Signal." group.byte 0x1DA++0x1 line.byte 0x0 "BIE_BY_HL,Bus Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODIE,Timeout Detection Interrupt Enable" "0: Disables Timeout Detection Interrupt Signal.,1: Enables Timeout Detection Interrupt Signal." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALIE,Arbitration Lost Interrupt Enable" "0: Disables Arbitration Lost Interrupt Signal.,1: Enables Arbitration Lost Interrupt Signal." line.byte 0x1 "BIE_BY_HH,Bus Interrupt Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDIE,Wake-Up Condition Detection Interrupt Enable" "0: Disables Wake-Up Condition Detection Interrupt..,1: Enables Wake-Up Condition Detection Interrupt.." wgroup.long 0x1DC++0x3 line.long 0x0 "BSTFC,Bus Status Force Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDFC,Wake-Up Condition Detection Force" "0: not Force Wake-Up Condition Detection Interrupt..,1: Force Wake-Up Condition Detection Interrupt for.." newline bitfld.long 0x0 21.--23. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODFC,Timeout Detection Force" "0: not Force Timeout Detection Interrupt for..,1: Force Timeout Detection Interrupt for software.." newline bitfld.long 0x0 17.--19. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALFC,Arbitration Lost Force" "0: not Force Arbitration Lost Interrupt for..,1: Force Arbitration Lost Interrupt for software.." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,The write value should be 0000000." bitfld.long 0x0 8. "TENDFC,Transmit End Force" "0: not Force Transmit End Interrupt for software..,1: Force Transmit End Interrupt for software testing." newline bitfld.long 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDFC,NACK Detection Force" "0: not Force NACK Detection Interrupt for software..,1: Force NACK Detection Interrupt for software.." newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDFC,HDR Exit Pattern Detection Force" "0: not Force HDR Exit Pattern Detection Interrupt..,1: Force HDR Exit Pattern Detection Interrupt for.." newline bitfld.long 0x0 1. "SPCNDDFC,STOP Condition Detection Force" "0: not Force STOP Condition Detection Interrupt for..,1: Force STOP Condition Detection Interrupt for.." bitfld.long 0x0 0. "STCNDDFC,START Condition Detection Force" "0: not Force START Condition Detection Interrupt..,1: Force START Condition Detection Interrupt for.." wgroup.word 0x1DC++0x1 line.word 0x0 "BSTFC_HA_L,Bus Status Force Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,The write value should be 0000000." bitfld.word 0x0 8. "TENDFC,Transmit End Force" "0: not Force Transmit End Interrupt for software..,1: Force Transmit End Interrupt for software testing." newline bitfld.word 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDFC,NACK Detection Force" "0: not Force NACK Detection Interrupt for software..,1: Force NACK Detection Interrupt for software.." newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDFC,HDR Exit Pattern Detection Force" "0: not Force HDR Exit Pattern Detection Interrupt..,1: Force HDR Exit Pattern Detection Interrupt for.." newline bitfld.word 0x0 1. "SPCNDDFC,STOP Condition Detection Force" "0: not Force STOP Condition Detection Interrupt for..,1: Force STOP Condition Detection Interrupt for.." bitfld.word 0x0 0. "STCNDDFC,START Condition Detection Force" "0: not Force START Condition Detection Interrupt..,1: Force START Condition Detection Interrupt for.." wgroup.byte 0x1DC++0x1 line.byte 0x0 "BSTFC_BY_LL,Bus Status Force Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDFC,NACK Detection Force" "0: not Force NACK Detection Interrupt for software..,1: Force NACK Detection Interrupt for software.." newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDFC,HDR Exit Pattern Detection Force" "0: not Force HDR Exit Pattern Detection Interrupt..,1: Force HDR Exit Pattern Detection Interrupt for.." newline bitfld.byte 0x0 1. "SPCNDDFC,STOP Condition Detection Force" "0: not Force STOP Condition Detection Interrupt for..,1: Force STOP Condition Detection Interrupt for.." bitfld.byte 0x0 0. "STCNDDFC,START Condition Detection Force" "0: not Force START Condition Detection Interrupt..,1: Force START Condition Detection Interrupt for.." line.byte 0x1 "BSTFC_BY_LH,Bus Status Force Register" hexmask.byte 0x1 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x1 0. "TENDFC,Transmit End Force" "0: not Force Transmit End Interrupt for software..,1: Force Transmit End Interrupt for software testing." wgroup.word 0x1DE++0x1 line.word 0x0 "BSTFC_HA_H,Bus Status Force Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDFC,Wake-Up Condition Detection Force" "0: not Force Wake-Up Condition Detection Interrupt..,1: Force Wake-Up Condition Detection Interrupt for.." newline bitfld.word 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODFC,Timeout Detection Force" "0: not Force Timeout Detection Interrupt for..,1: Force Timeout Detection Interrupt for software.." newline bitfld.word 0x0 1.--3. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALFC,Arbitration Lost Force" "0: not Force Arbitration Lost Interrupt for..,1: Force Arbitration Lost Interrupt for software.." wgroup.byte 0x1DE++0x1 line.byte 0x0 "BSTFC_BY_HL,Bus Status Force Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODFC,Timeout Detection Force" "0: not Force Timeout Detection Interrupt for..,1: Force Timeout Detection Interrupt for software.." newline bitfld.byte 0x0 1.--3. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALFC,Arbitration Lost Force" "0: not Force Arbitration Lost Interrupt for..,1: Force Arbitration Lost Interrupt for software.." line.byte 0x1 "BSTFC_BY_HH,Bus Status Force Register" hexmask.byte 0x1 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDFC,Wake-Up Condition Detection Force" "0: not Force Wake-Up Condition Detection Interrupt..,1: Force Wake-Up Condition Detection Interrupt for.." group.long 0x1E0++0x3 line.long 0x0 "NTST,Normal Transfer Status Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "RSQFF,Normal Receive Status Queue Full Flag" "0: The number of Receive Status Queue entries is <=..,1: The number of Receive Status Queue entries is >.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 9. "TEF,Normal Transfer Error Flag" "0: Transfer Error does not occur.,1: Transfer Error occurs." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTF,Normal Transfer Abort Flag" "0: Transfer Abort does not occur.,1: Transfer Abort occur." newline bitfld.long 0x0 4. "RSPQFF,Normal Response Queue Full Flag" "0: The number of Response Queue entries is <= the..,1: The number of Response Queue entries is > the.." bitfld.long 0x0 3. "CMDQEF,Normal Command Queue Empty Flag" "0: The number of Command Queue empties is < the..,1: The number of Command Queue empties is >= the.." newline bitfld.long 0x0 2. "IBIQEFF,Normal IBI Queue Empty/Full Flag" "0: The number of IBI Data Buffer empties is < the..,1: The number of IBI Data Buffer empties is >= the.." bitfld.long 0x0 1. "RDBFF0,Normal Rx Data Buffer Full Flag 0" "0: The number of entries in the Normal Rx Data..,1: The number of entries in the Normal Rx Data.." newline bitfld.long 0x0 0. "TDBEF0,Normal Tx Data Buffer Empty Flag 0" "0: The number of empties in the Normal Tx Data..,1: The number of empties in the Normal Tx Data.." group.word 0x1E0++0x1 line.word 0x0 "NTST_HA_L,Normal Transfer Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEF,Normal Transfer Error Flag" "0: Transfer Error does not occur.,1: Transfer Error occurs." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTF,Normal Transfer Abort Flag" "0: Transfer Abort does not occur.,1: Transfer Abort occur." newline bitfld.word 0x0 4. "RSPQFF,Normal Response Queue Full Flag" "0: The number of Response Queue entries is <= the..,1: The number of Response Queue entries is > the.." bitfld.word 0x0 3. "CMDQEF,Normal Command Queue Empty Flag" "0: The number of Command Queue empties is < the..,1: The number of Command Queue empties is >= the.." newline bitfld.word 0x0 2. "IBIQEFF,Normal IBI Queue Empty/Full Flag" "0: The number of IBI Data Buffer empties is < the..,1: The number of IBI Data Buffer empties is >= the.." bitfld.word 0x0 1. "RDBFF0,Normal Rx Data Buffer Full Flag 0" "0: The number of entries in the Normal Rx Data..,1: The number of entries in the Normal Rx Data.." newline bitfld.word 0x0 0. "TDBEF0,Normal Tx Data Buffer Empty Flag 0" "0: The number of empties in the Normal Tx Data..,1: The number of empties in the Normal Tx Data.." group.byte 0x1E0++0x1 line.byte 0x0 "NTST_BY_LL,Normal Transfer Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTF,Normal Transfer Abort Flag" "0: Transfer Abort does not occur.,1: Transfer Abort occur." newline bitfld.byte 0x0 4. "RSPQFF,Normal Response Queue Full Flag" "0: The number of Response Queue entries is <= the..,1: The number of Response Queue entries is > the.." bitfld.byte 0x0 3. "CMDQEF,Normal Command Queue Empty Flag" "0: The number of Command Queue empties is < the..,1: The number of Command Queue empties is >= the.." newline bitfld.byte 0x0 2. "IBIQEFF,Normal IBI Queue Empty/Full Flag" "0: The number of IBI Data Buffer empties is < the..,1: The number of IBI Data Buffer empties is >= the.." bitfld.byte 0x0 1. "RDBFF0,Normal Rx Data Buffer Full Flag 0" "0: The number of entries in the Normal Rx Data..,1: The number of entries in the Normal Rx Data.." newline bitfld.byte 0x0 0. "TDBEF0,Normal Tx Data Buffer Empty Flag 0" "0: The number of empties in the Normal Tx Data..,1: The number of empties in the Normal Tx Data.." line.byte 0x1 "NTST_BY_LH,Normal Transfer Status Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEF,Normal Transfer Error Flag" "0: Transfer Error does not occur.,1: Transfer Error occurs." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x1E2++0x1 line.word 0x0 "NTST_HA_H,Normal Transfer Status Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "RSQFF,Normal Receive Status Queue Full Flag" "0: The number of Receive Status Queue entries is <=..,1: The number of Receive Status Queue entries is >.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x1E2++0x0 line.byte 0x0 "NTST_BY_HL,Normal Transfer Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFF,Normal Receive Status Queue Full Flag" "0: The number of Receive Status Queue entries is <=..,1: The number of Receive Status Queue entries is >.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0x1E4++0x3 line.long 0x0 "NTSTE,Normal Transfer Status Enable Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "RSQFE,Normal Receive Status Queue Full Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 9. "TEE,Normal Transfer Error Enable" "0: Disables Transfer Error Interrupt Status logging.,1: Enables Transfer Error Interrupt Status logging." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTE,Normal Transfer Abort Enable" "0: Disables Transfer Abort Interrupt Status logging.,1: Enables Transfer Abort Interrupt Status logging." newline bitfld.long 0x0 4. "RSPQFE,Normal Response Queue Full Enable" "0: Disables Response Buffer Full Interrupt Status..,1: Enables Response Buffer Full Interrupt Status.." bitfld.long 0x0 3. "CMDQEE,Normal Command Queue Empty Enable" "0: Disables Command Buffer Empty Interrupt Status..,1: Enables Command Buffer Empty Interrupt Status.." newline bitfld.long 0x0 2. "IBIQEFE,Normal IBI Queue Empty/Full Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.long 0x0 1. "RDBFE0,Normal Rx Data Buffer Full Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Status..,1: Enables Rx0 Data Buffer Full Interrupt Status.." newline bitfld.long 0x0 0. "TDBEE0,Normal Tx Data Buffer Empty Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Status..,1: Enables Tx0 Data Buffer Empty Interrupt Status.." group.word 0x1E4++0x1 line.word 0x0 "NTSTE_HA_L,Normal Transfer Status Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEE,Normal Transfer Error Enable" "0: Disables Transfer Error Interrupt Status logging.,1: Enables Transfer Error Interrupt Status logging." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTE,Normal Transfer Abort Enable" "0: Disables Transfer Abort Interrupt Status logging.,1: Enables Transfer Abort Interrupt Status logging." newline bitfld.word 0x0 4. "RSPQFE,Normal Response Queue Full Enable" "0: Disables Response Buffer Full Interrupt Status..,1: Enables Response Buffer Full Interrupt Status.." bitfld.word 0x0 3. "CMDQEE,Normal Command Queue Empty Enable" "0: Disables Command Buffer Empty Interrupt Status..,1: Enables Command Buffer Empty Interrupt Status.." newline bitfld.word 0x0 2. "IBIQEFE,Normal IBI Queue Empty/Full Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.word 0x0 1. "RDBFE0,Normal Rx Data Buffer Full Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Status..,1: Enables Rx0 Data Buffer Full Interrupt Status.." newline bitfld.word 0x0 0. "TDBEE0,Normal Tx Data Buffer Empty Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Status..,1: Enables Tx0 Data Buffer Empty Interrupt Status.." group.byte 0x1E4++0x1 line.byte 0x0 "NTSTE_BY_LL,Normal Transfer Status Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTE,Normal Transfer Abort Enable" "0: Disables Transfer Abort Interrupt Status logging.,1: Enables Transfer Abort Interrupt Status logging." newline bitfld.byte 0x0 4. "RSPQFE,Normal Response Queue Full Enable" "0: Disables Response Buffer Full Interrupt Status..,1: Enables Response Buffer Full Interrupt Status.." bitfld.byte 0x0 3. "CMDQEE,Normal Command Queue Empty Enable" "0: Disables Command Buffer Empty Interrupt Status..,1: Enables Command Buffer Empty Interrupt Status.." newline bitfld.byte 0x0 2. "IBIQEFE,Normal IBI Queue Empty/Full Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.byte 0x0 1. "RDBFE0,Normal Rx Data Buffer Full Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Status..,1: Enables Rx0 Data Buffer Full Interrupt Status.." newline bitfld.byte 0x0 0. "TDBEE0,Normal Tx Data Buffer Empty Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Status..,1: Enables Tx0 Data Buffer Empty Interrupt Status.." line.byte 0x1 "NTSTE_BY_LH,Normal Transfer Status Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEE,Normal Transfer Error Enable" "0: Disables Transfer Error Interrupt Status logging.,1: Enables Transfer Error Interrupt Status logging." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x1E6++0x1 line.word 0x0 "NTSTE_HA_H,Normal Transfer Status Enable Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "RSQFE,Normal Receive Status Queue Full Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x1E6++0x0 line.byte 0x0 "NTSTE_BY_HL,Normal Transfer Status Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFE,Normal Receive Status Queue Full Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0x1E8++0x3 line.long 0x0 "NTIE,Normal Transfer Interrupt Enable Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "RSQFIE,Normal Receive Status Queue Full Interrupt Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 9. "TEIE,Normal Transfer Error Interrupt Enable" "0: Disables Transfer Error Interrupt Signal.,1: Enables Transfer Error Interrupt Signal." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTIE,Normal Transfer Abort Interrupt Enable" "0: Disables Transfer Abort Interrupt Signal.,1: Enables Transfer Abort Interrupt Signal." newline bitfld.long 0x0 4. "RSPQFIE,Normal Response Queue Full Interrupt Enable" "0: Disables Response Buffer Full Interrupt Signal.,1: Enables Response Buffer Full Interrupt Signal." bitfld.long 0x0 3. "CMDQEIE,Normal Command Queue Empty Interrupt Enable" "0: Disables Command Buffer Empty Interrupt Signal.,1: Enables Command Buffer Empty Interrupt Signal." newline bitfld.long 0x0 2. "IBIQEFIE,Normal IBI Queue Empty/Full Interrupt Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.long 0x0 1. "RDBFIE0,Normal Rx Data Buffer Full Interrupt Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Signal.,1: Enables Rx0 Data Buffer Full Interrupt Signal." newline bitfld.long 0x0 0. "TDBEIE0,Normal Tx Data Buffer Empty Interrupt Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Signal.,1: Enables Tx0 Data Buffer Empty Interrupt Signal." group.word 0x1E8++0x1 line.word 0x0 "NTIE_HA_L,Normal Transfer Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEIE,Normal Transfer Error Interrupt Enable" "0: Disables Transfer Error Interrupt Signal.,1: Enables Transfer Error Interrupt Signal." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTIE,Normal Transfer Abort Interrupt Enable" "0: Disables Transfer Abort Interrupt Signal.,1: Enables Transfer Abort Interrupt Signal." newline bitfld.word 0x0 4. "RSPQFIE,Normal Response Queue Full Interrupt Enable" "0: Disables Response Buffer Full Interrupt Signal.,1: Enables Response Buffer Full Interrupt Signal." bitfld.word 0x0 3. "CMDQEIE,Normal Command Queue Empty Interrupt Enable" "0: Disables Command Buffer Empty Interrupt Signal.,1: Enables Command Buffer Empty Interrupt Signal." newline bitfld.word 0x0 2. "IBIQEFIE,Normal IBI Queue Empty/Full Interrupt Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.word 0x0 1. "RDBFIE0,Normal Rx Data Buffer Full Interrupt Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Signal.,1: Enables Rx0 Data Buffer Full Interrupt Signal." newline bitfld.word 0x0 0. "TDBEIE0,Normal Tx Data Buffer Empty Interrupt Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Signal.,1: Enables Tx0 Data Buffer Empty Interrupt Signal." group.byte 0x1E8++0x1 line.byte 0x0 "NTIE_BY_LL,Normal Transfer Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTIE,Normal Transfer Abort Interrupt Enable" "0: Disables Transfer Abort Interrupt Signal.,1: Enables Transfer Abort Interrupt Signal." newline bitfld.byte 0x0 4. "RSPQFIE,Normal Response Queue Full Interrupt Enable" "0: Disables Response Buffer Full Interrupt Signal.,1: Enables Response Buffer Full Interrupt Signal." bitfld.byte 0x0 3. "CMDQEIE,Normal Command Queue Empty Interrupt Enable" "0: Disables Command Buffer Empty Interrupt Signal.,1: Enables Command Buffer Empty Interrupt Signal." newline bitfld.byte 0x0 2. "IBIQEFIE,Normal IBI Queue Empty/Full Interrupt Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.byte 0x0 1. "RDBFIE0,Normal Rx Data Buffer Full Interrupt Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Signal.,1: Enables Rx0 Data Buffer Full Interrupt Signal." newline bitfld.byte 0x0 0. "TDBEIE0,Normal Tx Data Buffer Empty Interrupt Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Signal.,1: Enables Tx0 Data Buffer Empty Interrupt Signal." line.byte 0x1 "NTIE_BY_LH,Normal Transfer Interrupt Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEIE,Normal Transfer Error Interrupt Enable" "0: Disables Transfer Error Interrupt Signal.,1: Enables Transfer Error Interrupt Signal." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x1EA++0x1 line.word 0x0 "NTIE_HA_H,Normal Transfer Interrupt Enable Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "RSQFIE,Normal Receive Status Queue Full Interrupt Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x1EA++0x0 line.byte 0x0 "NTIE_BY_HL,Normal Transfer Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFIE,Normal Receive Status Queue Full Interrupt Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." wgroup.long 0x1EC++0x3 line.long 0x0 "NTSTFC,Normal Transfer Status Force Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 20. "RSQFFC,Normal Receive Status Queue Full Force" "0: not Force Receive Status Buffer Full Interrupt..,1: Force Receive Status Buffer Full Interrupt for.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,The write value should be 0000000000." bitfld.long 0x0 9. "TEFC,Normal Transfer Error Force" "0: not Force Transfer Error Interrupt for software..,1: Force Transfer Error Interrupt for software.." newline bitfld.long 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTFC,Normal Transfer Abort Force" "0: not Force Transfer Abort Interrupt for software..,1: Force Transfer Abort Interrupt for software.." newline bitfld.long 0x0 4. "RSPQFFC,Normal Response Queue Full Force" "0: not Force Response Buffer Full Interrupt for..,1: Force Response Buffer Full Interrupt for.." bitfld.long 0x0 3. "CMDQEFC,Normal Command Queue Empty Force" "0: not Force Command Buffer Empty Interrupt for..,1: Force Command Buffer Empty Interrupt for.." newline bitfld.long 0x0 2. "IBIQEFFC,Normal IBI Queue Empty/Full Force" "0: not Force IBI Status Buffer Empty/Full Interrupt..,1: Force IBI Status Buffer Empty/Full Interrupt for.." bitfld.long 0x0 1. "RDBFFC0,Normal Rx Data Buffer Full Force 0" "0: not Force Rx0 Data Buffer Full Interrupt for..,1: Force Rx0 Data Buffer Full Interrupt for.." newline bitfld.long 0x0 0. "TDBEFC0,Normal Tx Data Buffer Empty Force 0" "0: not Force Tx0 Data Buffer Empty Interrupt for..,1: Force Tx0 Data Buffer Empty Interrupt for.." wgroup.word 0x1EC++0x1 line.word 0x0 "NTSTFC_HA_L,Normal Transfer Status Force Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,The write value should be 000000." bitfld.word 0x0 9. "TEFC,Normal Transfer Error Force" "0: not Force Transfer Error Interrupt for software..,1: Force Transfer Error Interrupt for software.." newline bitfld.word 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTFC,Normal Transfer Abort Force" "0: not Force Transfer Abort Interrupt for software..,1: Force Transfer Abort Interrupt for software.." newline bitfld.word 0x0 4. "RSPQFFC,Normal Response Queue Full Force" "0: not Force Response Buffer Full Interrupt for..,1: Force Response Buffer Full Interrupt for.." bitfld.word 0x0 3. "CMDQEFC,Normal Command Queue Empty Force" "0: not Force Command Buffer Empty Interrupt for..,1: Force Command Buffer Empty Interrupt for.." newline bitfld.word 0x0 2. "IBIQEFFC,Normal IBI Queue Empty/Full Force" "0: not Force IBI Status Buffer Empty/Full Interrupt..,1: Force IBI Status Buffer Empty/Full Interrupt for.." bitfld.word 0x0 1. "RDBFFC0,Normal Rx Data Buffer Full Force 0" "0: not Force Rx0 Data Buffer Full Interrupt for..,1: Force Rx0 Data Buffer Full Interrupt for.." newline bitfld.word 0x0 0. "TDBEFC0,Normal Tx Data Buffer Empty Force 0" "0: not Force Tx0 Data Buffer Empty Interrupt for..,1: Force Tx0 Data Buffer Empty Interrupt for.." wgroup.byte 0x1EC++0x1 line.byte 0x0 "NTSTFC_BY_LL,Normal Transfer Status Force Register" bitfld.byte 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTFC,Normal Transfer Abort Force" "0: not Force Transfer Abort Interrupt for software..,1: Force Transfer Abort Interrupt for software.." newline bitfld.byte 0x0 4. "RSPQFFC,Normal Response Queue Full Force" "0: not Force Response Buffer Full Interrupt for..,1: Force Response Buffer Full Interrupt for.." bitfld.byte 0x0 3. "CMDQEFC,Normal Command Queue Empty Force" "0: not Force Command Buffer Empty Interrupt for..,1: Force Command Buffer Empty Interrupt for.." newline bitfld.byte 0x0 2. "IBIQEFFC,Normal IBI Queue Empty/Full Force" "0: not Force IBI Status Buffer Empty/Full Interrupt..,1: Force IBI Status Buffer Empty/Full Interrupt for.." bitfld.byte 0x0 1. "RDBFFC0,Normal Rx Data Buffer Full Force 0" "0: not Force Rx0 Data Buffer Full Interrupt for..,1: Force Rx0 Data Buffer Full Interrupt for.." newline bitfld.byte 0x0 0. "TDBEFC0,Normal Tx Data Buffer Empty Force 0" "0: not Force Tx0 Data Buffer Empty Interrupt for..,1: Force Tx0 Data Buffer Empty Interrupt for.." line.byte 0x1 "NTSTFC_BY_LH,Normal Transfer Status Force Register" hexmask.byte 0x1 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x1 1. "TEFC,Normal Transfer Error Force" "0: not Force Transfer Error Interrupt for software..,1: Force Transfer Error Interrupt for software.." newline bitfld.byte 0x1 0. "Reserved,The write value should be 0." "0,1" wgroup.word 0x1EE++0x1 line.word 0x0 "NTSTFC_HA_H,Normal Transfer Status Force Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "RSQFFC,Normal Receive Status Queue Full Force" "0: not Force Receive Status Buffer Full Interrupt..,1: Force Receive Status Buffer Full Interrupt for.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x1EE++0x0 line.byte 0x0 "NTSTFC_BY_HL,Normal Transfer Status Force Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFFC,Normal Receive Status Queue Full Force" "0: not Force Receive Status Buffer Full Interrupt..,1: Force Receive Status Buffer Full Interrupt for.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." group.long 0x200++0x3 line.long 0x0 "HTST,High Priority Transfer Status Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEF,High Priority Transfer Error Flag" "0: High Priority Transfer Error does not occur.,1: High Priority Transfer Error occurs." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTF,High Priority Transfer Abort Flag" "0: High Priority Transfer Abort does not occur.,1: High Priority Transfer Abort occurs." newline bitfld.long 0x0 4. "RSPQFF,High Priority Response Queue Full Flag" "0: The number of High Priority Response Queue..,1: The number of High Priority Response Queue.." bitfld.long 0x0 3. "CMDQEF,High Priority Command Queue Empty Flag" "0: The number of High Priority Command Queue..,1: The number of High Priority Command Queue.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFF,High Priority Rx Data Buffer Full Flag" "0: The number of entries in the High Priority Rx..,1: The number of entries in the High Priority Rx.." newline bitfld.long 0x0 0. "TDBEF,High Priority Tx Data Buffer Empty Flag" "0: The number of empties in the High Priority Tx..,1: The number of empties in the High Priority Tx.." group.word 0x200++0x1 line.word 0x0 "HTST_HA_L,High Priority Transfer Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEF,High Priority Transfer Error Flag" "0: High Priority Transfer Error does not occur.,1: High Priority Transfer Error occurs." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTF,High Priority Transfer Abort Flag" "0: High Priority Transfer Abort does not occur.,1: High Priority Transfer Abort occurs." newline bitfld.word 0x0 4. "RSPQFF,High Priority Response Queue Full Flag" "0: The number of High Priority Response Queue..,1: The number of High Priority Response Queue.." bitfld.word 0x0 3. "CMDQEF,High Priority Command Queue Empty Flag" "0: The number of High Priority Command Queue..,1: The number of High Priority Command Queue.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFF,High Priority Rx Data Buffer Full Flag" "0: The number of entries in the High Priority Rx..,1: The number of entries in the High Priority Rx.." newline bitfld.word 0x0 0. "TDBEF,High Priority Tx Data Buffer Empty Flag" "0: The number of empties in the High Priority Tx..,1: The number of empties in the High Priority Tx.." group.byte 0x200++0x1 line.byte 0x0 "HTST_BY_LL,High Priority Transfer Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTF,High Priority Transfer Abort Flag" "0: High Priority Transfer Abort does not occur.,1: High Priority Transfer Abort occurs." newline bitfld.byte 0x0 4. "RSPQFF,High Priority Response Queue Full Flag" "0: The number of High Priority Response Queue..,1: The number of High Priority Response Queue.." bitfld.byte 0x0 3. "CMDQEF,High Priority Command Queue Empty Flag" "0: The number of High Priority Command Queue..,1: The number of High Priority Command Queue.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFF,High Priority Rx Data Buffer Full Flag" "0: The number of entries in the High Priority Rx..,1: The number of entries in the High Priority Rx.." newline bitfld.byte 0x0 0. "TDBEF,High Priority Tx Data Buffer Empty Flag" "0: The number of empties in the High Priority Tx..,1: The number of empties in the High Priority Tx.." line.byte 0x1 "HTST_BY_LH,High Priority Transfer Status Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEF,High Priority Transfer Error Flag" "0: High Priority Transfer Error does not occur.,1: High Priority Transfer Error occurs." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x204++0x3 line.long 0x0 "HTSTE,High Priority Transfer Status Enable Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEE,High Priority Transfer Error Enable" "0: Disables High Priority Transfer Error interrupt..,1: Enables High Priority Transfer Error interrupt.." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTE,High Priority Transfer Abort Enable" "0: Disables High PriorityTransfer Abort Interrupt..,1: Enables High Priority Transfer Abort Interrupt.." newline bitfld.long 0x0 4. "RSPQFE,High Priority Response Queue Full Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.long 0x0 3. "CMDQEE,High Priority Command Queue Empty Enable." "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFE,High Priority Rx Data Buffer Full Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.long 0x0 0. "TDBEE,High Priority Tx Data Buffer Empty Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.word 0x204++0x1 line.word 0x0 "HTSTE_HA_L,High Priority Transfer Status Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEE,High Priority Transfer Error Enable" "0: Disables High Priority Transfer Error interrupt..,1: Enables High Priority Transfer Error interrupt.." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTE,High Priority Transfer Abort Enable" "0: Disables High PriorityTransfer Abort Interrupt..,1: Enables High Priority Transfer Abort Interrupt.." newline bitfld.word 0x0 4. "RSPQFE,High Priority Response Queue Full Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.word 0x0 3. "CMDQEE,High Priority Command Queue Empty Enable." "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFE,High Priority Rx Data Buffer Full Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.word 0x0 0. "TDBEE,High Priority Tx Data Buffer Empty Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.byte 0x204++0x1 line.byte 0x0 "HTSTE_BY_LL,High Priority Transfer Status Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTE,High Priority Transfer Abort Enable" "0: Disables High PriorityTransfer Abort Interrupt..,1: Enables High Priority Transfer Abort Interrupt.." newline bitfld.byte 0x0 4. "RSPQFE,High Priority Response Queue Full Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.byte 0x0 3. "CMDQEE,High Priority Command Queue Empty Enable." "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFE,High Priority Rx Data Buffer Full Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.byte 0x0 0. "TDBEE,High Priority Tx Data Buffer Empty Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." line.byte 0x1 "HTSTE_BY_LH,High Priority Transfer Status Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEE,High Priority Transfer Error Enable" "0: Disables High Priority Transfer Error interrupt..,1: Enables High Priority Transfer Error interrupt.." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x208++0x3 line.long 0x0 "HTIE,High Priority Transfer Interrupt Enable Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEIE,High Priority Transfer Error Interrupt Enable" "0: Disables High Priority Transfer Error Interrupt..,1: Enables High Priority Transfer Error Interrupt.." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTIE,High Priority Transfer Abort Interrupt Enable" "0: Disables High Priority Transfer Abort interrupt..,1: Enables High Priority Transfer Abort interrupt.." newline bitfld.long 0x0 4. "RSPQFIE,High Priority Response Queue Full Interrupt Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.long 0x0 3. "CMDQEIE,High Priority Command Queue Empty Interrupt Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFIE,High Priority Rx Data Buffer Full Interrupt Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.long 0x0 0. "TDBEIE,High Priority Tx Data Buffer Empty Interrupt Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.word 0x208++0x1 line.word 0x0 "HTIE_HA_L,High Priority Transfer Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEIE,High Priority Transfer Error Interrupt Enable" "0: Disables High Priority Transfer Error Interrupt..,1: Enables High Priority Transfer Error Interrupt.." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTIE,High Priority Transfer Abort Interrupt Enable" "0: Disables High Priority Transfer Abort interrupt..,1: Enables High Priority Transfer Abort interrupt.." newline bitfld.word 0x0 4. "RSPQFIE,High Priority Response Queue Full Interrupt Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.word 0x0 3. "CMDQEIE,High Priority Command Queue Empty Interrupt Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFIE,High Priority Rx Data Buffer Full Interrupt Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.word 0x0 0. "TDBEIE,High Priority Tx Data Buffer Empty Interrupt Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.byte 0x208++0x1 line.byte 0x0 "HTIE_BY_LL,High Priority Transfer Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTIE,High Priority Transfer Abort Interrupt Enable" "0: Disables High Priority Transfer Abort interrupt..,1: Enables High Priority Transfer Abort interrupt.." newline bitfld.byte 0x0 4. "RSPQFIE,High Priority Response Queue Full Interrupt Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.byte 0x0 3. "CMDQEIE,High Priority Command Queue Empty Interrupt Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFIE,High Priority Rx Data Buffer Full Interrupt Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.byte 0x0 0. "TDBEIE,High Priority Tx Data Buffer Empty Interrupt Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." line.byte 0x1 "HTIE_BY_LH,High Priority Transfer Interrupt Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEIE,High Priority Transfer Error Interrupt Enable" "0: Disables High Priority Transfer Error Interrupt..,1: Enables High Priority Transfer Error Interrupt.." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" wgroup.long 0x20C++0x3 line.long 0x0 "HTSTFC,High Priority Transfer Status Force Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEFC,High Priority Transfer Error Force" "0: not Force High Priority Transfer Error Interrupt..,1: Force High Priority Transfer Error Interrupt for.." newline bitfld.long 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTFC,High Priority Transfer Abort Force" "0: not Force High Priority Transfer Abort Interrupt..,1: Force High Priority Transfer Abort Interrupt for.." newline bitfld.long 0x0 4. "RSPQFFC,High Priority Response Queue Full Force" "0: not Force High Priority Response Buffer Full..,1: Force High Priority Response Buffer Full.." bitfld.long 0x0 3. "CMDQEFC,High Priority Command Queue Empty Force" "0: not Force High Priority Command Buffer Empty..,1: Force High Priority Command Buffer Empty.." newline bitfld.long 0x0 2. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFFC,High Priority Rx Data Buffer Full Force" "0: not Force High Priority Rx Data Buffer Full..,1: Force High Priority Rx Data Buffer Full.." newline bitfld.long 0x0 0. "TDBEFC,High Priority Tx Data Buffer Empty Force" "0: not Force High Priority Tx Data Buffer Empty..,1: Force High Priority Tx Data Buffer Empty.." wgroup.word 0x20C++0x1 line.word 0x0 "HTSTFC_HA_L,High Priority Transfer Status Force Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,The write value should be 000000." bitfld.word 0x0 9. "TEFC,High Priority Transfer Error Force" "0: not Force High Priority Transfer Error Interrupt..,1: Force High Priority Transfer Error Interrupt for.." newline bitfld.word 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTFC,High Priority Transfer Abort Force" "0: not Force High Priority Transfer Abort Interrupt..,1: Force High Priority Transfer Abort Interrupt for.." newline bitfld.word 0x0 4. "RSPQFFC,High Priority Response Queue Full Force" "0: not Force High Priority Response Buffer Full..,1: Force High Priority Response Buffer Full.." bitfld.word 0x0 3. "CMDQEFC,High Priority Command Queue Empty Force" "0: not Force High Priority Command Buffer Empty..,1: Force High Priority Command Buffer Empty.." newline bitfld.word 0x0 2. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFFC,High Priority Rx Data Buffer Full Force" "0: not Force High Priority Rx Data Buffer Full..,1: Force High Priority Rx Data Buffer Full.." newline bitfld.word 0x0 0. "TDBEFC,High Priority Tx Data Buffer Empty Force" "0: not Force High Priority Tx Data Buffer Empty..,1: Force High Priority Tx Data Buffer Empty.." wgroup.byte 0x20C++0x1 line.byte 0x0 "HTSTFC_BY_LL,High Priority Transfer Status Force Register" bitfld.byte 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTFC,High Priority Transfer Abort Force" "0: not Force High Priority Transfer Abort Interrupt..,1: Force High Priority Transfer Abort Interrupt for.." newline bitfld.byte 0x0 4. "RSPQFFC,High Priority Response Queue Full Force" "0: not Force High Priority Response Buffer Full..,1: Force High Priority Response Buffer Full.." bitfld.byte 0x0 3. "CMDQEFC,High Priority Command Queue Empty Force" "0: not Force High Priority Command Buffer Empty..,1: Force High Priority Command Buffer Empty.." newline bitfld.byte 0x0 2. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFFC,High Priority Rx Data Buffer Full Force" "0: not Force High Priority Rx Data Buffer Full..,1: Force High Priority Rx Data Buffer Full.." newline bitfld.byte 0x0 0. "TDBEFC,High Priority Tx Data Buffer Empty Force" "0: not Force High Priority Tx Data Buffer Empty..,1: Force High Priority Tx Data Buffer Empty.." line.byte 0x1 "HTSTFC_BY_LH,High Priority Transfer Status Force Register" hexmask.byte 0x1 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x1 1. "TEFC,High Priority Transfer Error Force" "0: not Force High Priority Transfer Error Interrupt..,1: Force High Priority Transfer Error Interrupt for.." newline bitfld.byte 0x1 0. "Reserved,The write value should be 0." "0,1" rgroup.long 0x210++0x3 line.long 0x0 "BCST,Bus Condition Status Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000." bitfld.long 0x0 2. "BIDLF,Bus Idle Detection Flag" "0: Have not Detected Bus Idle,1: Have Detected Bus Idle" newline bitfld.long 0x0 1. "BAVLF,Bus Available Detection Flag" "0: Have not Detected Bus Available,1: Have Detected Bus Available" bitfld.long 0x0 0. "BFREF,Bus Free Detection Flag" "0: Have not Detected Bus Free,1: Have Detected Bus Free" rgroup.word 0x210++0x1 line.word 0x0 "BCST_HA_L,Bus Condition Status Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000." bitfld.word 0x0 2. "BIDLF,Bus Idle Detection Flag" "0: Have not Detected Bus Idle,1: Have Detected Bus Idle" newline bitfld.word 0x0 1. "BAVLF,Bus Available Detection Flag" "0: Have not Detected Bus Available,1: Have Detected Bus Available" bitfld.word 0x0 0. "BFREF,Bus Free Detection Flag" "0: Have not Detected Bus Free,1: Have Detected Bus Free" rgroup.byte 0x210++0x0 line.byte 0x0 "BCST_BY_LL,Bus Condition Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "BIDLF,Bus Idle Detection Flag" "0: Have not Detected Bus Idle,1: Have Detected Bus Idle" newline bitfld.byte 0x0 1. "BAVLF,Bus Available Detection Flag" "0: Have not Detected Bus Available,1: Have Detected Bus Available" bitfld.byte 0x0 0. "BFREF,Bus Free Detection Flag" "0: Have not Detected Bus Free,1: Have Detected Bus Free" group.long 0x214++0x3 line.long 0x0 "SVST,Slave Status Register" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 16.--18. "SVAF,Slave Address Detection Flag x (x=2 to 0)" "0: Slave{x} does not detect,1: Slave{x} detect,?,?,?,?,?,?" newline bitfld.long 0x0 15. "HOAF,Host Address Detection Flag" "0: Host address does not detect.,1: Host address detects." hexmask.long.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6. "DVIDF,Device-ID Address Detection Flag" "0: Device-ID command does not detect.,1: Device-ID command detects." bitfld.long 0x0 5. "HSMCF,Hs-mode Master Code Detection Flag" "0: Hs-mode Master Code does not detect.,1: Hs-mode Master Code detects." newline hexmask.long.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 0. "GCAF,General Call Address Detection Flag" "0: General call address does not detect.,1: General call address detects." group.word 0x214++0x1 line.word 0x0 "SVST_HA_L,Slave Status Register" bitfld.word 0x0 15. "HOAF,Host Address Detection Flag" "0: Host address does not detect.,1: Host address detects." hexmask.word.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.word 0x0 6. "DVIDF,Device-ID Address Detection Flag" "0: Device-ID command does not detect.,1: Device-ID command detects." bitfld.word 0x0 5. "HSMCF,Hs-mode Master Code Detection Flag" "0: Hs-mode Master Code does not detect.,1: Hs-mode Master Code detects." newline hexmask.word.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 0. "GCAF,General Call Address Detection Flag" "0: General call address does not detect.,1: General call address detects." group.byte 0x214++0x1 line.byte 0x0 "SVST_BY_LL,Slave Status Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "DVIDF,Device-ID Address Detection Flag" "0: Device-ID command does not detect.,1: Device-ID command detects." newline bitfld.byte 0x0 5. "HSMCF,Hs-mode Master Code Detection Flag" "0: Hs-mode Master Code does not detect.,1: Hs-mode Master Code detects." hexmask.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0. "GCAF,General Call Address Detection Flag" "0: General call address does not detect.,1: General call address detects." line.byte 0x1 "SVST_BY_LH,Slave Status Register" bitfld.byte 0x1 7. "HOAF,Host Address Detection Flag" "0: Host address does not detect.,1: Host address detects." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.word 0x216++0x1 line.word 0x0 "SVST_HA_H,Slave Status Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "SVAF,Slave Address Detection Flag x (x=2 to 0)" "0: Slave{x} does not detect,1: Slave{x} detect,?,?,?,?,?,?" group.byte 0x216++0x0 line.byte 0x0 "SVST_BY_HL,Slave Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "SVAF,Slave Address Detection Flag x (x=2 to 0)" "0: Slave{x} does not detect,1: Slave{x} detect,?,?,?,?,?,?" rgroup.long 0x218++0x3 line.long 0x0 "WUST,Wake Up Unit Operating Status Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." bitfld.long 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "WUASYNF,Wake-Up function Asynchronous operation status Flag" "0: This IP synchronous circuit enable condition,1: This IP asynchronous circuit enable condition" rgroup.word 0x218++0x1 line.word 0x0 "WUST_HA_L,Wake Up Unit Operating Status Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." bitfld.word 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "WUASYNF,Wake-Up function Asynchronous operation status Flag" "0: This IP synchronous circuit enable condition,1: This IP asynchronous circuit enable condition" rgroup.byte 0x218++0x0 line.byte 0x0 "WUST_BY_LL,Wake Up Unit Operating Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "WUASYNF,Wake-Up function Asynchronous operation status Flag" "0: This IP synchronous circuit enable condition,1: This IP asynchronous circuit enable condition" rgroup.long 0x21C++0x3 line.long 0x0 "MRCCPT,MsyncCNT Counter Capture Register" hexmask.long 0x0 0.--31. 1. "MRCCPT,MSyncCNT Counter Capture" group.long 0x224++0x3 line.long 0x0 "DATBAS0,Device Address Table Basic Register 0" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x224++0x1 line.word 0x0 "DATBAS0_HA_L,Device Address Table Basic Register 0" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x224++0x1 line.byte 0x0 "DATBAS0_BY_LL,Device Address Table Basic Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS0_BY_LH,Device Address Table Basic Register 0" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x226++0x1 line.word 0x0 "DATBAS0_HA_H,Device Address Table Basic Register 0" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x226++0x1 line.byte 0x0 "DATBAS0_BY_HL,Device Address Table Basic Register 0" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS0_BY_HH,Device Address Table Basic Register 0" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x22C++0x3 line.long 0x0 "DATBAS1,Device Address Table Basic Register 1" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x22C++0x1 line.word 0x0 "DATBAS1_HA_L,Device Address Table Basic Register 1" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x22C++0x1 line.byte 0x0 "DATBAS1_BY_LL,Device Address Table Basic Register 1" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS1_BY_LH,Device Address Table Basic Register 1" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x22E++0x1 line.word 0x0 "DATBAS1_HA_H,Device Address Table Basic Register 1" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x22E++0x1 line.byte 0x0 "DATBAS1_BY_HL,Device Address Table Basic Register 1" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS1_BY_HH,Device Address Table Basic Register 1" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x234++0x3 line.long 0x0 "DATBAS2,Device Address Table Basic Register 2" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x234++0x1 line.word 0x0 "DATBAS2_HA_L,Device Address Table Basic Register 2" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x234++0x1 line.byte 0x0 "DATBAS2_BY_LL,Device Address Table Basic Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS2_BY_LH,Device Address Table Basic Register 2" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x236++0x1 line.word 0x0 "DATBAS2_HA_H,Device Address Table Basic Register 2" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x236++0x1 line.byte 0x0 "DATBAS2_BY_HL,Device Address Table Basic Register 2" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS2_BY_HH,Device Address Table Basic Register 2" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x23C++0x3 line.long 0x0 "DATBAS3,Device Address Table Basic Register 3" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x23C++0x1 line.word 0x0 "DATBAS3_HA_L,Device Address Table Basic Register 3" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x23C++0x1 line.byte 0x0 "DATBAS3_BY_LL,Device Address Table Basic Register 3" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS3_BY_LH,Device Address Table Basic Register 3" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x23E++0x1 line.word 0x0 "DATBAS3_HA_H,Device Address Table Basic Register 3" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x23E++0x1 line.byte 0x0 "DATBAS3_BY_HL,Device Address Table Basic Register 3" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS3_BY_HH,Device Address Table Basic Register 3" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x244++0x3 line.long 0x0 "DATBAS4,Device Address Table Basic Register 4" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x244++0x1 line.word 0x0 "DATBAS4_HA_L,Device Address Table Basic Register 4" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x244++0x1 line.byte 0x0 "DATBAS4_BY_LL,Device Address Table Basic Register 4" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS4_BY_LH,Device Address Table Basic Register 4" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x246++0x1 line.word 0x0 "DATBAS4_HA_H,Device Address Table Basic Register 4" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x246++0x1 line.byte 0x0 "DATBAS4_BY_HL,Device Address Table Basic Register 4" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS4_BY_HH,Device Address Table Basic Register 4" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x24C++0x3 line.long 0x0 "DATBAS5,Device Address Table Basic Register 5" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x24C++0x1 line.word 0x0 "DATBAS5_HA_L,Device Address Table Basic Register 5" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x24C++0x1 line.byte 0x0 "DATBAS5_BY_LL,Device Address Table Basic Register 5" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS5_BY_LH,Device Address Table Basic Register 5" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x24E++0x1 line.word 0x0 "DATBAS5_HA_H,Device Address Table Basic Register 5" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x24E++0x1 line.byte 0x0 "DATBAS5_BY_HL,Device Address Table Basic Register 5" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS5_BY_HH,Device Address Table Basic Register 5" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x254++0x3 line.long 0x0 "DATBAS6,Device Address Table Basic Register 6" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x254++0x1 line.word 0x0 "DATBAS6_HA_L,Device Address Table Basic Register 6" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x254++0x1 line.byte 0x0 "DATBAS6_BY_LL,Device Address Table Basic Register 6" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS6_BY_LH,Device Address Table Basic Register 6" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x256++0x1 line.word 0x0 "DATBAS6_HA_H,Device Address Table Basic Register 6" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x256++0x1 line.byte 0x0 "DATBAS6_BY_HL,Device Address Table Basic Register 6" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS6_BY_HH,Device Address Table Basic Register 6" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x25C++0x3 line.long 0x0 "DATBAS7,Device Address Table Basic Register 7" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x25C++0x1 line.word 0x0 "DATBAS7_HA_L,Device Address Table Basic Register 7" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x25C++0x1 line.byte 0x0 "DATBAS7_BY_LL,Device Address Table Basic Register 7" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS7_BY_LH,Device Address Table Basic Register 7" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x25E++0x1 line.word 0x0 "DATBAS7_HA_H,Device Address Table Basic Register 7" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x25E++0x1 line.byte 0x0 "DATBAS7_BY_HL,Device Address Table Basic Register 7" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS7_BY_HH,Device Address Table Basic Register 7" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x2A0++0x3 line.long 0x0 "EXDATBAS,Extended Device Address Table Basic Register" bitfld.long 0x0 31. "EDTYP,Extended Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "EDNACK,Extended Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "EDDYAD,Extended Device I3C Dynamic Address" newline hexmask.long.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 0.--6. 1. "EDSTAD,Extended Device Static Address" group.word 0x2A0++0x1 line.word 0x0 "EXDATBAS_HA_L,Extended Device Address Table Basic Register" hexmask.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.word.byte 0x0 0.--6. 1. "EDSTAD,Extended Device Static Address" group.byte 0x2A0++0x1 line.byte 0x0 "EXDATBAS_BY_LL,Extended Device Address Table Basic Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "EDSTAD,Extended Device Static Address" line.byte 0x1 "EXDATBAS_BY_LH,Extended Device Address Table Basic Register" hexmask.byte 0x1 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2A2++0x1 line.word 0x0 "EXDATBAS_HA_H,Extended Device Address Table Basic Register" bitfld.word 0x0 15. "EDTYP,Extended Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "EDNACK,Extended Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "EDDYAD,Extended Device I3C Dynamic Address" group.byte 0x2A2++0x1 line.byte 0x0 "EXDATBAS_BY_HL,Extended Device Address Table Basic Register" hexmask.byte 0x0 0.--7. 1. "EDDYAD,Extended Device I3C Dynamic Address" line.byte 0x1 "EXDATBAS_BY_HH,Extended Device Address Table Basic Register" bitfld.byte 0x1 7. "EDTYP,Extended Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "EDNACK,Extended Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x2B0++0x3 line.long 0x0 "SDATBAS0,Slave Device Address Table Basic Register 0" hexmask.long.word 0x0 23.--31. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 16.--22. 1. "SDDYAD,Slave Device I3C Dynamic Address" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x0 12. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.word 0x2B0++0x1 line.word 0x0 "SDATBAS0_HA_L,Slave Device Address Table Basic Register 0" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.word 0x0 12. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.byte 0x2B0++0x1 line.byte 0x0 "SDATBAS0_BY_LL,Slave Device Address Table Basic Register 0" hexmask.byte 0x0 0.--7. 1. "SDSTAD,Slave Device Static Address" line.byte 0x1 "SDATBAS0_BY_LH,Slave Device Address Table Basic Register 0" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x1 4. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline bitfld.byte 0x1 0.--1. "SDSTAD,Slave Device Static Address" "0,1,2,3" group.word 0x2B2++0x1 line.word 0x0 "SDATBAS0_HA_H,Slave Device Address Table Basic Register 0" hexmask.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.word.byte 0x0 0.--6. 1. "SDDYAD,Slave Device I3C Dynamic Address" group.byte 0x2B2++0x0 line.byte 0x0 "SDATBAS0_BY_HL,Slave Device Address Table Basic Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "SDDYAD,Slave Device I3C Dynamic Address" group.long 0x2B4++0x3 line.long 0x0 "SDATBAS1,Slave Device Address Table Basic Register 1" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.word 0x2B4++0x1 line.word 0x0 "SDATBAS1_HA_L,Slave Device Address Table Basic Register 1" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.byte 0x2B4++0x1 line.byte 0x0 "SDATBAS1_BY_LL,Slave Device Address Table Basic Register 1" hexmask.byte 0x0 0.--7. 1. "SDSTAD,Slave Device Static Address" line.byte 0x1 "SDATBAS1_BY_LH,Slave Device Address Table Basic Register 1" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline bitfld.byte 0x1 0.--1. "SDSTAD,Slave Device Static Address" "0,1,2,3" group.long 0x2B8++0x3 line.long 0x0 "SDATBAS2,Slave Device Address Table Basic Register 2" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.word 0x2B8++0x1 line.word 0x0 "SDATBAS2_HA_L,Slave Device Address Table Basic Register 2" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.byte 0x2B8++0x1 line.byte 0x0 "SDATBAS2_BY_LL,Slave Device Address Table Basic Register 2" hexmask.byte 0x0 0.--7. 1. "SDSTAD,Slave Device Static Address" line.byte 0x1 "SDATBAS2_BY_LH,Slave Device Address Table Basic Register 2" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline bitfld.byte 0x1 0.--1. "SDSTAD,Slave Device Static Address" "0,1,2,3" group.long 0x2D0++0x3 line.long 0x0 "MSDCT0,Master Device Characteristic Table Register 0" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2D0++0x1 line.word 0x0 "MSDCT0_HA_L,Master Device Characteristic Table Register 0" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2D1++0x0 line.byte 0x0 "MSDCT0_BY_LH,Master Device Characteristic Table Register 0" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2D4++0x3 line.long 0x0 "MSDCT1,Master Device Characteristic Table Register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2D4++0x1 line.word 0x0 "MSDCT1_HA_L,Master Device Characteristic Table Register 1" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2D5++0x0 line.byte 0x0 "MSDCT1_BY_LH,Master Device Characteristic Table Register 1" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2D8++0x3 line.long 0x0 "MSDCT2,Master Device Characteristic Table Register 2" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2D8++0x1 line.word 0x0 "MSDCT2_HA_L,Master Device Characteristic Table Register 2" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2D9++0x0 line.byte 0x0 "MSDCT2_BY_LH,Master Device Characteristic Table Register 2" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2DC++0x3 line.long 0x0 "MSDCT3,Master Device Characteristic Table Register 3" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2DC++0x1 line.word 0x0 "MSDCT3_HA_L,Master Device Characteristic Table Register 3" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2DD++0x0 line.byte 0x0 "MSDCT3_BY_LH,Master Device Characteristic Table Register 3" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2E0++0x3 line.long 0x0 "MSDCT4,Master Device Characteristic Table Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2E0++0x1 line.word 0x0 "MSDCT4_HA_L,Master Device Characteristic Table Register 4" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2E1++0x0 line.byte 0x0 "MSDCT4_BY_LH,Master Device Characteristic Table Register 4" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2E4++0x3 line.long 0x0 "MSDCT5,Master Device Characteristic Table Register 5" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2E4++0x1 line.word 0x0 "MSDCT5_HA_L,Master Device Characteristic Table Register 5" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2E5++0x0 line.byte 0x0 "MSDCT5_BY_LH,Master Device Characteristic Table Register 5" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2E8++0x3 line.long 0x0 "MSDCT6,Master Device Characteristic Table Register 6" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2E8++0x1 line.word 0x0 "MSDCT6_HA_L,Master Device Characteristic Table Register 6" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2E9++0x0 line.byte 0x0 "MSDCT6_BY_LH,Master Device Characteristic Table Register 6" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2EC++0x3 line.long 0x0 "MSDCT7,Master Device Characteristic Table Register 7" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2EC++0x1 line.word 0x0 "MSDCT7_HA_L,Master Device Characteristic Table Register 7" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2ED++0x0 line.byte 0x0 "MSDCT7_BY_LH,Master Device Characteristic Table Register 7" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x320++0x3 line.long 0x0 "SVDCT,Slave Device Characteristic Table Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "TBCR,Transfar Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "TDCR,Transfar Device Characteristic Register" group.word 0x320++0x1 line.word 0x0 "SVDCT_HA_L,Slave Device Characteristic Table Register" hexmask.word.byte 0x0 8.--15. 1. "TBCR,Transfar Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "TDCR,Transfar Device Characteristic Register" group.byte 0x320++0x1 line.byte 0x0 "SVDCT_BY_LL,Slave Device Characteristic Table Register" hexmask.byte 0x0 0.--7. 1. "TDCR,Transfar Device Characteristic Register" line.byte 0x1 "SVDCT_BY_LH,Slave Device Characteristic Table Register" hexmask.byte 0x1 0.--7. 1. "TBCR,Transfar Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x324++0x3 line.long 0x0 "SDCTPIDL,Slave Device Characteristic Table Provisional ID Low Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "SDCTPIDL,Transfar Device Provisional ID Low" group.word 0x324++0x1 line.word 0x0 "SDCTPIDL_HA_L,Slave Device Characteristic Table Provisional ID Low Register" hexmask.word 0x0 0.--15. 1. "SDCTPIDL,Transfar Device Provisional ID Low" group.byte 0x324++0x1 line.byte 0x0 "SDCTPIDL_BY_LL,Slave Device Characteristic Table Provisional ID Low Register" hexmask.byte 0x0 0.--7. 1. "SDCTPIDL,Transfar Device Provisional ID Low" line.byte 0x1 "SDCTPIDL_BY_LH,Slave Device Characteristic Table Provisional ID Low Register" hexmask.byte 0x1 0.--7. 1. "SDCTPIDL,Transfar Device Provisional ID Low" group.long 0x328++0x3 line.long 0x0 "SDCTPIDH,Slave Device Characteristic Table Provisional ID High Register" hexmask.long 0x0 0.--31. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.word 0x328++0x1 line.word 0x0 "SDCTPIDH_HA_L,Slave Device Characteristic Table Provisional ID High Register" hexmask.word 0x0 0.--15. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.byte 0x328++0x1 line.byte 0x0 "SDCTPIDH_BY_LL,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x0 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" line.byte 0x1 "SDCTPIDH_BY_LH,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x1 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.word 0x32A++0x1 line.word 0x0 "SDCTPIDH_HA_H,Slave Device Characteristic Table Provisional ID High Register" hexmask.word 0x0 0.--15. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.byte 0x32A++0x1 line.byte 0x0 "SDCTPIDH_BY_HL,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x0 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" line.byte 0x1 "SDCTPIDH_BY_HH,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x1 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" rgroup.long 0x330++0x3 line.long 0x0 "SVDVAD0,Slave Device Address Register 0" bitfld.long 0x0 31. "SDYADV,Slave Dynamic Address Valid" "0: Dynamic Address is disabled.,1: Dynamic Address is enabled." bitfld.long 0x0 30. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.long 0x0 28.--29. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 27. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 16.--25. 1. "SVAD,Slave Address" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000." rgroup.word 0x332++0x1 line.word 0x0 "SVDVAD0_HA_H,Slave Device Address Register 0" bitfld.word 0x0 15. "SDYADV,Slave Dynamic Address Valid" "0: Dynamic Address is disabled.,1: Dynamic Address is enabled." bitfld.word 0x0 14. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 11. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" hexmask.word 0x0 0.--9. 1. "SVAD,Slave Address" rgroup.byte 0x332++0x1 line.byte 0x0 "SVDVAD0_BY_HL,Slave Device Address Register 0" hexmask.byte 0x0 0.--7. 1. "SVAD,Slave Address" line.byte 0x1 "SVDVAD0_BY_HH,Slave Device Address Register 0" bitfld.byte 0x1 7. "SDYADV,Slave Dynamic Address Valid" "0: Dynamic Address is disabled.,1: Dynamic Address is enabled." bitfld.byte 0x1 6. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 3. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0.--1. "SVAD,Slave Address" "0,1,2,3" rgroup.long 0x334++0x3 line.long 0x0 "SVDVAD1,Slave Device Address Register 1" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.long 0x0 28.--29. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 27. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 16.--25. 1. "SVAD,Slave Address" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000." rgroup.word 0x336++0x1 line.word 0x0 "SVDVAD1_HA_H,Slave Device Address Register 1" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 11. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" hexmask.word 0x0 0.--9. 1. "SVAD,Slave Address" rgroup.byte 0x336++0x1 line.byte 0x0 "SVDVAD1_BY_HL,Slave Device Address Register 1" hexmask.byte 0x0 0.--7. 1. "SVAD,Slave Address" line.byte 0x1 "SVDVAD1_BY_HH,Slave Device Address Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 3. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0.--1. "SVAD,Slave Address" "0,1,2,3" rgroup.long 0x338++0x3 line.long 0x0 "SVDVAD2,Slave Device Address Register 2" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.long 0x0 28.--29. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 27. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 16.--25. 1. "SVAD,Slave Address" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000." rgroup.word 0x33A++0x1 line.word 0x0 "SVDVAD2_HA_H,Slave Device Address Register 2" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 11. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" hexmask.word 0x0 0.--9. 1. "SVAD,Slave Address" rgroup.byte 0x33A++0x1 line.byte 0x0 "SVDVAD2_BY_HL,Slave Device Address Register 2" hexmask.byte 0x0 0.--7. 1. "SVAD,Slave Address" line.byte 0x1 "SVDVAD2_BY_HH,Slave Device Address Register 2" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 3. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0.--1. "SVAD,Slave Address" "0,1,2,3" group.long 0x350++0x3 line.long 0x0 "CSECMD,CCC Slave Events Command Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "HJEVE,Hot-Join Event Enable" "0: DISABLED: Slave-initiated Hot-Join is Disabled..,1: ENABLED: Slave-initiated Hot-Join is Enabled by.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "MSRQE,Mastership Requests Enable" "0: DISABLED: Mastership requests from Secondary..,1: ENABLED: Mastership requests from Secondary.." newline bitfld.long 0x0 0. "SVIRQE,Slave Interrupt Requests Enable" "0: DISABLED: Slave-initiated Interrupts is Disabled..,1: ENABLED: Slave-initiated Interrupts is Enabled.." group.word 0x350++0x1 line.word 0x0 "CSECMD_HA_L,CCC Slave Events Command Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "HJEVE,Hot-Join Event Enable" "0: DISABLED: Slave-initiated Hot-Join is Disabled..,1: ENABLED: Slave-initiated Hot-Join is Enabled by.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "MSRQE,Mastership Requests Enable" "0: DISABLED: Mastership requests from Secondary..,1: ENABLED: Mastership requests from Secondary.." newline bitfld.word 0x0 0. "SVIRQE,Slave Interrupt Requests Enable" "0: DISABLED: Slave-initiated Interrupts is Disabled..,1: ENABLED: Slave-initiated Interrupts is Enabled.." group.byte 0x350++0x0 line.byte 0x0 "CSECMD_BY_LL,CCC Slave Events Command Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "HJEVE,Hot-Join Event Enable" "0: DISABLED: Slave-initiated Hot-Join is Disabled..,1: ENABLED: Slave-initiated Hot-Join is Enabled by.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "MSRQE,Mastership Requests Enable" "0: DISABLED: Mastership requests from Secondary..,1: ENABLED: Mastership requests from Secondary.." newline bitfld.byte 0x0 0. "SVIRQE,Slave Interrupt Requests Enable" "0: DISABLED: Slave-initiated Interrupts is Disabled..,1: ENABLED: Slave-initiated Interrupts is Enabled.." group.long 0x354++0x3 line.long 0x0 "CEACTST,CCC Enter Activity State Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "ACTST,Activity State" group.word 0x354++0x1 line.word 0x0 "CEACTST_HA_L,CCC Enter Activity State Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "ACTST,Activity State" group.byte 0x354++0x0 line.byte 0x0 "CEACTST_BY_LL,CCC Enter Activity State Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "ACTST,Activity State" group.long 0x358++0x3 line.long 0x0 "CMWLG,CCC Max Write Length Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "MWLG,Max Write Length" group.word 0x358++0x1 line.word 0x0 "CMWLG_HA_L,CCC Max Write Length Register" hexmask.word 0x0 0.--15. 1. "MWLG,Max Write Length" group.byte 0x358++0x1 line.byte 0x0 "CMWLG_BY_LL,CCC Max Write Length Register" hexmask.byte 0x0 0.--7. 1. "MWLG,Max Write Length" line.byte 0x1 "CMWLG_BY_LH,CCC Max Write Length Register" hexmask.byte 0x1 0.--7. 1. "MWLG,Max Write Length" group.long 0x35C++0x3 line.long 0x0 "CMRLG,CCC Max Read Length Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "IBIPSZ,IBI Payload Size" newline hexmask.long.word 0x0 0.--15. 1. "MRLG,Max Read Length." group.word 0x35C++0x1 line.word 0x0 "CMRLG_HA_L,CCC Max Read Length Register" hexmask.word 0x0 0.--15. 1. "MRLG,Max Read Length." group.byte 0x35C++0x1 line.byte 0x0 "CMRLG_BY_LL,CCC Max Read Length Register" hexmask.byte 0x0 0.--7. 1. "MRLG,Max Read Length." line.byte 0x1 "CMRLG_BY_LH,CCC Max Read Length Register" hexmask.byte 0x1 0.--7. 1. "MRLG,Max Read Length." group.word 0x35E++0x1 line.word 0x0 "CMRLG_HA_H,CCC Max Read Length Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "IBIPSZ,IBI Payload Size" group.byte 0x35E++0x0 line.byte 0x0 "CMRLG_BY_HL,CCC Max Read Length Register" hexmask.byte 0x0 0.--7. 1. "IBIPSZ,IBI Payload Size" rgroup.long 0x360++0x3 line.long 0x0 "CETSTMD,CCC Enter Test Mode Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TSTMD,Test Mode" rgroup.word 0x360++0x1 line.word 0x0 "CETSTMD_HA_L,CCC Enter Test Mode Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 0.--7. 1. "TSTMD,Test Mode" rgroup.byte 0x360++0x0 line.byte 0x0 "CETSTMD_BY_LL,CCC Enter Test Mode Register" hexmask.byte 0x0 0.--7. 1. "TSTMD,Test Mode" group.long 0x364++0x3 line.long 0x0 "CGDVST,CCC Get Device Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "VDRSV,Vendor Reserved" newline bitfld.long 0x0 6.--7. "ACTMD,Slave Device's current Activity Mode" "0: Activity Mode 0,1: Activity Mode 1,?,?" rbitfld.long 0x0 5. "PRTE,Protocol Error" "0: The Slave has not detected a protocol error..,1: The Slave has detected a protocol error since.." newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 0.--3. 1. "PNDINT,Pending Interrupt" group.word 0x364++0x1 line.word 0x0 "CGDVST_HA_L,CCC Get Device Status Register" hexmask.word.byte 0x0 8.--15. 1. "VDRSV,Vendor Reserved" bitfld.word 0x0 6.--7. "ACTMD,Slave Device's current Activity Mode" "0: Activity Mode 0,1: Activity Mode 1,?,?" newline rbitfld.word 0x0 5. "PRTE,Protocol Error" "0: The Slave has not detected a protocol error..,1: The Slave has detected a protocol error since.." bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "PNDINT,Pending Interrupt" group.byte 0x364++0x1 line.byte 0x0 "CGDVST_BY_LL,CCC Get Device Status Register" bitfld.byte 0x0 6.--7. "ACTMD,Slave Device's current Activity Mode" "0: Activity Mode 0,1: Activity Mode 1,?,?" rbitfld.byte 0x0 5. "PRTE,Protocol Error" "0: The Slave has not detected a protocol error..,1: The Slave has detected a protocol error since.." newline bitfld.byte 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--3. 1. "PNDINT,Pending Interrupt" line.byte 0x1 "CGDVST_BY_LH,CCC Get Device Status Register" hexmask.byte 0x1 0.--7. 1. "VDRSV,Vendor Reserved" group.long 0x368++0x3 line.long 0x0 "CMDSPW,CCC Max Data Speed W(Write) Registe" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 0.--2. "MSWDR,Maximum Sustained Write Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.word 0x368++0x1 line.word 0x0 "CMDSPW_HA_L,CCC Max Data Speed W(Write) Registe" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "MSWDR,Maximum Sustained Write Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.byte 0x368++0x0 line.byte 0x0 "CMDSPW_BY_LL,CCC Max Data Speed W(Write) Registe" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "MSWDR,Maximum Sustained Write Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.long 0x36C++0x3 line.long 0x0 "CMDSPR,CCC Max Data Speed R(Read) Registe" hexmask.long 0x0 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000. The write value should be 00000000000000000000000000." bitfld.long 0x0 3.--5. "CDTTIM,Clock to Data Turnaround Time (TSCO)" "0: <= 8ns(default value),1: <= 9ns,?,?,?,?,?,?" newline bitfld.long 0x0 0.--2. "MSRDR,Maximum Sustained Read Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.word 0x36C++0x1 line.word 0x0 "CMDSPR_HA_L,CCC Max Data Speed R(Read) Registe" hexmask.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.word 0x0 3.--5. "CDTTIM,Clock to Data Turnaround Time (TSCO)" "0: <= 8ns(default value),1: <= 9ns,?,?,?,?,?,?" newline bitfld.word 0x0 0.--2. "MSRDR,Maximum Sustained Read Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.byte 0x36C++0x0 line.byte 0x0 "CMDSPR_BY_LL,CCC Max Data Speed R(Read) Registe" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3.--5. "CDTTIM,Clock to Data Turnaround Time (TSCO)" "0: <= 8ns(default value),1: <= 9ns,?,?,?,?,?,?" newline bitfld.byte 0x0 0.--2. "MSRDR,Maximum Sustained Read Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.long 0x370++0x3 line.long 0x0 "CMDSPT,CCC Max Data Speed T(Turnaround) Registe" bitfld.long 0x0 31. "MRTE,Maximum Read Turnaround Time Enable" "0: (GETMXDS Format 2: With Turnaround),1: Enables transmission of the Maximum Read.." hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.tbyte 0x0 0.--23. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.word 0x370++0x1 line.word 0x0 "CMDSPT_HA_L,CCC Max Data Speed T(Turnaround) Register" hexmask.word 0x0 0.--15. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.byte 0x370++0x1 line.byte 0x0 "CMDSPT_BY_LL,CCC Max Data Speed T(Turnaround) Register" hexmask.byte 0x0 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." line.byte 0x1 "CMDSPT_BY_LH,CCC Max Data Speed T(Turnaround) Register" hexmask.byte 0x1 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.word 0x372++0x1 line.word 0x0 "CMDSPT_HA_H,CCC Max Data Speed T(Turnaround) Register" bitfld.word 0x0 15. "MRTE,Maximum Read Turnaround Time Enable" "0: (GETMXDS Format 2: With Turnaround),1: Enables transmission of the Maximum Read.." hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.word.byte 0x0 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.byte 0x372++0x1 line.byte 0x0 "CMDSPT_BY_HL,CCC Max Data Speed T(Turnaround) Register" hexmask.byte 0x0 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." line.byte 0x1 "CMDSPT_BY_HH,CCC Max Data Speed T(Turnaround) Register" bitfld.byte 0x1 7. "MRTE,Maximum Read Turnaround Time Enable" "0: (GETMXDS Format 2: With Turnaround),1: Enables transmission of the Maximum Read.." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.long 0x374++0x3 line.long 0x0 "CETSM,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "INAC,Inaccuracy ByteThis byte represents the maximum variation of the Slave's internal oscillator in 1/10th percent (0.1%) increments up to 25.5%." newline hexmask.long.byte 0x0 8.--15. 1. "FREQ,Frequency ByteThis byte represents the Slave's internal oscillator frequency in increments of 0.5 MHz (500 kHz) up to 127.5 MHz." hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "SPTASYN1,Supports Async Mode 1" "0: Async Mode 1 is not supported.,1: Async Mode 1 is supported." bitfld.long 0x0 1. "SPTASYN0,Supports Async Mode 0" "0: Async Mode 0 is not supported.,1: Async Mode 0 is supported." newline bitfld.long 0x0 0. "SPTSYN,Supports Sync Mode" "0: Disable Supports Sync Mode.,1: Enable Supports Sync Mode." group.word 0x374++0x1 line.word 0x0 "CETSM_HA_L,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.word.byte 0x0 8.--15. 1. "FREQ,Frequency ByteThis byte represents the Slave's internal oscillator frequency in increments of 0.5 MHz (500 kHz) up to 127.5 MHz." hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 2. "SPTASYN1,Supports Async Mode 1" "0: Async Mode 1 is not supported.,1: Async Mode 1 is supported." bitfld.word 0x0 1. "SPTASYN0,Supports Async Mode 0" "0: Async Mode 0 is not supported.,1: Async Mode 0 is supported." newline bitfld.word 0x0 0. "SPTSYN,Supports Sync Mode" "0: Disable Supports Sync Mode.,1: Enable Supports Sync Mode." group.byte 0x374++0x1 line.byte 0x0 "CETSM_BY_LL,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SPTASYN1,Supports Async Mode 1" "0: Async Mode 1 is not supported.,1: Async Mode 1 is supported." newline bitfld.byte 0x0 1. "SPTASYN0,Supports Async Mode 0" "0: Async Mode 0 is not supported.,1: Async Mode 0 is supported." bitfld.byte 0x0 0. "SPTSYN,Supports Sync Mode" "0: Disable Supports Sync Mode.,1: Enable Supports Sync Mode." line.byte 0x1 "CETSM_BY_LH,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.byte 0x1 0.--7. 1. "FREQ,Frequency ByteThis byte represents the Slave's internal oscillator frequency in increments of 0.5 MHz (500 kHz) up to 127.5 MHz." group.word 0x376++0x1 line.word 0x0 "CETSM_HA_H,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "INAC,Inaccuracy ByteThis byte represents the maximum variation of the Slave's internal oscillator in 1/10th percent (0.1%) increments up to 25.5%." group.byte 0x376++0x0 line.byte 0x0 "CETSM_BY_HL,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.byte 0x0 0.--7. 1. "INAC,Inaccuracy ByteThis byte represents the maximum variation of the Slave's internal oscillator in 1/10th percent (0.1%) increments up to 25.5%." group.long 0x378++0x3 line.long 0x0 "CETSS,CCC Exchange Timing Support Information S(State^2 ) Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "ICOVF,Internal Counter Overflow" "0: Slave has not experienced a counter overflow..,1: Slave experienced a counter overflow since the.." newline hexmask.long.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 1.--2. "ASYNE,Async Mode Enabled" "0: All Mode Disable,1: Async Mode 0 Enabled.,?,?" newline bitfld.long 0x0 0. "SYNE,Sync Mode Enabled" "0: Sync Mode Disabled.,1: Sync Mode Enabled." group.word 0x378++0x1 line.word 0x0 "CETSS_HA_L,CCC Exchange Timing Support Information S(State^2 ) Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 7. "ICOVF,Internal Counter Overflow" "0: Slave has not experienced a counter overflow..,1: Slave experienced a counter overflow since the.." newline hexmask.word.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 1.--2. "ASYNE,Async Mode Enabled" "0: All Mode Disable,1: Async Mode 0 Enabled.,?,?" newline bitfld.word 0x0 0. "SYNE,Sync Mode Enabled" "0: Sync Mode Disabled.,1: Sync Mode Enabled." group.byte 0x378++0x0 line.byte 0x0 "CETSS_BY_LL,CCC Exchange Timing Support Information S(State^2 ) Register" bitfld.byte 0x0 7. "ICOVF,Internal Counter Overflow" "0: Slave has not experienced a counter overflow..,1: Slave experienced a counter overflow since the.." hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 1.--2. "ASYNE,Async Mode Enabled" "0: All Mode Disable,1: Async Mode 0 Enabled.,?,?" bitfld.byte 0x0 0. "SYNE,Sync Mode Enabled" "0: Sync Mode Disabled.,1: Sync Mode Enabled." group.long 0x37C++0x3 line.long 0x0 "CGHDRCAP,CCC Get HDR capability Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "TSLEN,HDR-TSL Operation Enable" "0: HDR-TSL Operation is Disabled.,1: HDR-TSL Operation is Enabled." newline bitfld.long 0x0 1. "TSPEN,HDR-TSP Operation Enable" "0: HDR-TSP Operation is Disabled.,1: HDR-TSP Operation is Enabled." bitfld.long 0x0 0. "DDREN,HDR-DDR Operation Enable" "0: HDR-DDR Operation is Disabled.,1: HDR-DDR Operation is Enabled." group.word 0x37C++0x1 line.word 0x0 "CGHDRCAP_HA_L,CCC Get HDR capability Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "TSLEN,HDR-TSL Operation Enable" "0: HDR-TSL Operation is Disabled.,1: HDR-TSL Operation is Enabled." newline bitfld.word 0x0 1. "TSPEN,HDR-TSP Operation Enable" "0: HDR-TSP Operation is Disabled.,1: HDR-TSP Operation is Enabled." bitfld.word 0x0 0. "DDREN,HDR-DDR Operation Enable" "0: HDR-DDR Operation is Disabled.,1: HDR-DDR Operation is Enabled." group.byte 0x37C++0x0 line.byte 0x0 "CGHDRCAP_BY_LL,CCC Get HDR capability Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TSLEN,HDR-TSL Operation Enable" "0: HDR-TSL Operation is Disabled.,1: HDR-TSL Operation is Enabled." newline bitfld.byte 0x0 1. "TSPEN,HDR-TSP Operation Enable" "0: HDR-TSP Operation is Disabled.,1: HDR-TSP Operation is Enabled." bitfld.byte 0x0 0. "DDREN,HDR-DDR Operation Enable" "0: HDR-DDR Operation is Disabled.,1: HDR-DDR Operation is Enabled." rgroup.long 0x380++0x3 line.long 0x0 "BITCNT,Bit Count Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." hexmask.long.byte 0x0 0.--4. 1. "BCNT,Bit Counter" rgroup.word 0x380++0x1 line.word 0x0 "BITCNT_HA_L,Bit Count Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." hexmask.word.byte 0x0 0.--4. 1. "BCNT,Bit Counter" rgroup.byte 0x380++0x0 line.byte 0x0 "BITCNT_BY_LL,Bit Count Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "BCNT,Bit Counter" rgroup.long 0x394++0x3 line.long 0x0 "NQSTLV,Normal Queue Status Level Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "IBISCNT,Normal IBI Status CountNumber of IBI Status entries currently in the IBI Queue." newline hexmask.long.byte 0x0 16.--23. 1. "IBIQLV,Normal IBI Queue Level Number of buffer entries currently in the IBI Queue." hexmask.long.byte 0x0 8.--15. 1. "RSPQLV,Normal Response Queue LevelNumber of buffer entries currently in the Response Queue." newline hexmask.long.byte 0x0 0.--7. 1. "CMDQFLV,Normal Command Queue Free LevelNumber of free buffer entries currently in the Command Queue. Reset value is the depth of the Command Queue." rgroup.word 0x394++0x1 line.word 0x0 "NQSTLV_HA_L,Normal Queue Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQLV,Normal Response Queue LevelNumber of buffer entries currently in the Response Queue." hexmask.word.byte 0x0 0.--7. 1. "CMDQFLV,Normal Command Queue Free LevelNumber of free buffer entries currently in the Command Queue. Reset value is the depth of the Command Queue." rgroup.byte 0x394++0x1 line.byte 0x0 "NQSTLV_BY_LL,Normal Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "CMDQFLV,Normal Command Queue Free LevelNumber of free buffer entries currently in the Command Queue. Reset value is the depth of the Command Queue." line.byte 0x1 "NQSTLV_BY_LH,Normal Queue Status Level Register" hexmask.byte 0x1 0.--7. 1. "RSPQLV,Normal Response Queue LevelNumber of buffer entries currently in the Response Queue." rgroup.word 0x396++0x1 line.word 0x0 "NQSTLV_HA_H,Normal Queue Status Level Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "IBISCNT,Normal IBI Status CountNumber of IBI Status entries currently in the IBI Queue." newline hexmask.word.byte 0x0 0.--7. 1. "IBIQLV,Normal IBI Queue Level Number of buffer entries currently in the IBI Queue." rgroup.byte 0x396++0x1 line.byte 0x0 "NQSTLV_BY_HL,Normal Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "IBIQLV,Normal IBI Queue Level Number of buffer entries currently in the IBI Queue." line.byte 0x1 "NQSTLV_BY_HH,Normal Queue Status Level Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "IBISCNT,Normal IBI Status CountNumber of IBI Status entries currently in the IBI Queue." rgroup.long 0x398++0x3 line.long 0x0 "NDBSTLV0,Normal Data Buffer Status Level Register 0" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RDBLV,Normal Rx Data Buffer LevelIndicates the number of Rx Data Buffer entries in the Rx Data Queue." newline hexmask.long.byte 0x0 0.--7. 1. "TDBFLV,Normal Tx Data Buffer Free LevelIndicates the number of free Tx Data Buffer entries in the Tx Data Queue.Reset value is the depth of the Tx Data Queue." rgroup.word 0x398++0x1 line.word 0x0 "NDBSTLV0_HA_L,Normal Data Buffer Status Level Register 0" hexmask.word.byte 0x0 8.--15. 1. "RDBLV,Normal Rx Data Buffer LevelIndicates the number of Rx Data Buffer entries in the Rx Data Queue." hexmask.word.byte 0x0 0.--7. 1. "TDBFLV,Normal Tx Data Buffer Free LevelIndicates the number of free Tx Data Buffer entries in the Tx Data Queue.Reset value is the depth of the Tx Data Queue." rgroup.byte 0x398++0x1 line.byte 0x0 "NDBSTLV0_BY_LL,Normal Data Buffer Status Level Register 0" hexmask.byte 0x0 0.--7. 1. "TDBFLV,Normal Tx Data Buffer Free LevelIndicates the number of free Tx Data Buffer entries in the Tx Data Queue.Reset value is the depth of the Tx Data Queue." line.byte 0x1 "NDBSTLV0_BY_LH,Normal Data Buffer Status Level Register 0" hexmask.byte 0x1 0.--7. 1. "RDBLV,Normal Rx Data Buffer LevelIndicates the number of Rx Data Buffer entries in the Rx Data Queue." rgroup.long 0x3C0++0x3 line.long 0x0 "NRSQSTLV,Normal Receive Status Queue Status Level Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RSQLV,Normal Receive Status Queue Level" rgroup.word 0x3C0++0x1 line.word 0x0 "NRSQSTLV_HA_L,Normal Receive Status Queue Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 0.--7. 1. "RSQLV,Normal Receive Status Queue Level" rgroup.byte 0x3C0++0x0 line.byte 0x0 "NRSQSTLV_BY_LL,Normal Receive Status Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "RSQLV,Normal Receive Status Queue Level" rgroup.long 0x3C4++0x3 line.long 0x0 "HQSTLV,High Priority Queue Status Level Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RSPQLV,High Priority Response Queue LevelNumber of buffer entries currently in the High Priority Response Queue. Data Queue." newline hexmask.long.byte 0x0 0.--7. 1. "CMDQLV,High Priority Command Queue LevelNumber of free buffer entries currently in the High Priority Command Queue. Reset value is the depth of the High Priority Command Queue" rgroup.word 0x3C4++0x1 line.word 0x0 "HQSTLV_HA_L,High Priority Queue Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQLV,High Priority Response Queue LevelNumber of buffer entries currently in the High Priority Response Queue. Data Queue." hexmask.word.byte 0x0 0.--7. 1. "CMDQLV,High Priority Command Queue LevelNumber of free buffer entries currently in the High Priority Command Queue. Reset value is the depth of the High Priority Command Queue" rgroup.byte 0x3C4++0x1 line.byte 0x0 "HQSTLV_BY_LL,High Priority Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "CMDQLV,High Priority Command Queue LevelNumber of free buffer entries currently in the High Priority Command Queue. Reset value is the depth of the High Priority Command Queue" line.byte 0x1 "HQSTLV_BY_LH,High Priority Queue Status Level Register" hexmask.byte 0x1 0.--7. 1. "RSPQLV,High Priority Response Queue LevelNumber of buffer entries currently in the High Priority Response Queue. Data Queue." rgroup.long 0x3C8++0x3 line.long 0x0 "HDBSTLV,High Priority Data Buffer Status Level Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RDBLV,High Priority Rx Data Buffer Level Indicates the number of High Priority Rx Data Buffer entries in the High Priority Rx Data Queue." newline hexmask.long.byte 0x0 0.--7. 1. "TDBFLV,High Priority Tx Data Buffer Free LevelIndicates the number of free High Priority Tx Data Buffer entries in the High Priority Tx Data Queue.Reset value is the depth of the High Priority Tx Data Queue." rgroup.word 0x3C8++0x1 line.word 0x0 "HDBSTLV_HA_L,High Priority Data Buffer Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "RDBLV,High Priority Rx Data Buffer Level Indicates the number of High Priority Rx Data Buffer entries in the High Priority Rx Data Queue." hexmask.word.byte 0x0 0.--7. 1. "TDBFLV,High Priority Tx Data Buffer Free LevelIndicates the number of free High Priority Tx Data Buffer entries in the High Priority Tx Data Queue.Reset value is the depth of the High Priority Tx Data Queue." rgroup.byte 0x3C8++0x1 line.byte 0x0 "HDBSTLV_BY_LL,High Priority Data Buffer Status Level Register" hexmask.byte 0x0 0.--7. 1. "TDBFLV,High Priority Tx Data Buffer Free LevelIndicates the number of free High Priority Tx Data Buffer entries in the High Priority Tx Data Queue.Reset value is the depth of the High Priority Tx Data Queue." line.byte 0x1 "HDBSTLV_BY_LH,High Priority Data Buffer Status Level Register" hexmask.byte 0x1 0.--7. 1. "RDBLV,High Priority Rx Data Buffer Level Indicates the number of High Priority Rx Data Buffer entries in the High Priority Rx Data Queue." rgroup.long 0x3CC++0x3 line.long 0x0 "PRSTDBG,Present State Debug Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000." hexmask.long.byte 0x0 24.--27. 1. "Reserved,These bits are read as 0000." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000." newline hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.long 0x0 3. "SDOLV,SDA Output Level" "0: This IP has driven the SDA pin low.,1: This IP has released the SDA pin." newline bitfld.long 0x0 2. "SCOLV,SCL Output Level" "0: This IP has driven the SCL pin low.,1: This IP has released the SCL pin." bitfld.long 0x0 1. "SDILV,SDA Line Signal LevelThis bit is used to check the SDA Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_sdai_a signal." "0,1" newline bitfld.long 0x0 0. "SCILV,SCL Line Signal LevelThis bit is used to check the SCL Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_scli_a signal." "0,1" rgroup.word 0x3CC++0x1 line.word 0x0 "PRSTDBG_HA_L,Present State Debug Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000." newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.word 0x0 3. "SDOLV,SDA Output Level" "0: This IP has driven the SDA pin low.,1: This IP has released the SDA pin." newline bitfld.word 0x0 2. "SCOLV,SCL Output Level" "0: This IP has driven the SCL pin low.,1: This IP has released the SCL pin." bitfld.word 0x0 1. "SDILV,SDA Line Signal LevelThis bit is used to check the SDA Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_sdai_a signal." "0,1" newline bitfld.word 0x0 0. "SCILV,SCL Line Signal LevelThis bit is used to check the SCL Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_scli_a signal." "0,1" rgroup.byte 0x3CC++0x1 line.byte 0x0 "PRSTDBG_BY_LL,Present State Debug Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "SDOLV,SDA Output Level" "0: This IP has driven the SDA pin low.,1: This IP has released the SDA pin." newline bitfld.byte 0x0 2. "SCOLV,SCL Output Level" "0: This IP has driven the SCL pin low.,1: This IP has released the SCL pin." bitfld.byte 0x0 1. "SDILV,SDA Line Signal LevelThis bit is used to check the SDA Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_sdai_a signal." "0,1" newline bitfld.byte 0x0 0. "SCILV,SCL Line Signal LevelThis bit is used to check the SCL Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_scli_a signal." "0,1" line.byte 0x1 "PRSTDBG_BY_LH,Present State Debug Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000." rgroup.word 0x3CE++0x1 line.word 0x0 "PRSTDBG_HA_H,Present State Debug Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000." hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000." rgroup.byte 0x3CE++0x1 line.byte 0x0 "PRSTDBG_BY_HL,Present State Debug Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000." line.byte 0x1 "PRSTDBG_BY_HH,Present State Debug Register" hexmask.byte 0x1 4.--7. 1. "Reserved,These bits are read as 0000." hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000." rgroup.long 0x3D0++0x3 line.long 0x0 "MSERRCNT,Master Error Counters Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" hexmask.long.tbyte 0x0 8.--30. 1. "Reserved,These bits are read as 00000000000000000000000." newline hexmask.long.byte 0x0 0.--7. 1. "M2ECNT,M2 Error CounterCounts I3C Type M2 errors on the I3C Bus.Cleared upon Read out." rgroup.word 0x3D0++0x1 line.word 0x0 "MSERRCNT_HA_L,Master Error Counters Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 0.--7. 1. "M2ECNT,M2 Error CounterCounts I3C Type M2 errors on the I3C Bus.Cleared upon Read out." rgroup.byte 0x3D0++0x0 line.byte 0x0 "MSERRCNT_BY_LL,Master Error Counters Register" hexmask.byte 0x0 0.--7. 1. "M2ECNT,M2 Error CounterCounts I3C Type M2 errors on the I3C Bus.Cleared upon Read out." rgroup.long 0x3E0++0x3 line.long 0x0 "SC1CPT,SC1 Capture monitor Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "SC1C,SC1 Capture" rgroup.word 0x3E0++0x1 line.word 0x0 "SC1CPT_HA_L,SC1 Capture monitor Register" hexmask.word 0x0 0.--15. 1. "SC1C,SC1 Capture" rgroup.byte 0x3E0++0x1 line.byte 0x0 "SC1CPT_BY_LL,SC1 Capture monitor Register" hexmask.byte 0x0 0.--7. 1. "SC1C,SC1 Capture" line.byte 0x1 "SC1CPT_BY_LH,SC1 Capture monitor Register" hexmask.byte 0x1 0.--7. 1. "SC1C,SC1 Capture" rgroup.long 0x3E4++0x3 line.long 0x0 "SC2CPT,SC2 Capture monitor Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "SC2C,SC2 Capture" rgroup.word 0x3E4++0x1 line.word 0x0 "SC2CPT_HA_L,SC2 Capture monitor Register" hexmask.word 0x0 0.--15. 1. "SC2C,SC2 Capture" rgroup.byte 0x3E4++0x1 line.byte 0x0 "SC2CPT_BY_LL,SC2 Capture monitor Register" hexmask.byte 0x0 0.--7. 1. "SC2C,SC2 Capture" line.byte 0x1 "SC2CPT_BY_LH,SC2 Capture monitor Register" hexmask.byte 0x1 0.--7. 1. "SC2C,SC2 Capture" tree.end tree "I3C_NS" base ad:0x5035F000 group.long 0x0++0x3 line.long 0x0 "PRTS,Protocol Selection Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "PRTMD,Protocol Mode." "0: I3C Protocol mode.,1: I2C Protocol mode." group.word 0x0++0x1 line.word 0x0 "PRTS_HA_L,Protocol Selection Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "PRTMD,Protocol Mode." "0: I3C Protocol mode.,1: I2C Protocol mode." group.byte 0x0++0x0 line.byte 0x0 "PRTS_BY_LL,Protocol Selection Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PRTMD,Protocol Mode." "0: I3C Protocol mode.,1: I2C Protocol mode." group.long 0x14++0x3 line.long 0x0 "BCTL,Bus Control Register" bitfld.long 0x0 31. "BUSE,Bus Enable" "0: This IP bus operation is Disabled,1: This IP bus operation is Enabled" eventfld.long 0x0 30. "RSM,Resume Values when read:" "0: This IP is Running,1: This IP is Suspended (RW1C)" newline bitfld.long 0x0 29. "ABT,Abort" "0: This IP is Running,1: This IP has Aborted a transfer" hexmask.long.tbyte 0x0 9.--28. 1. "Reserved,These bits are read as 00000000000000000000. The write value should be 00000000000000000000." newline bitfld.long 0x0 8. "HJACKCTL,Hot-Join Acknowledge Control" "0: ACK the Hot-Join request,1: NACK and send broadcast CCC to disable Hot-Join" bitfld.long 0x0 7. "BMDS,Bus Mode Selection" "0: Legacy inclusive Bus mode disabled,1: Legacy inclusive (mix) Bus mode enabled" newline hexmask.long.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0. "INCBA,Include I3C Broadcast Address" "0: Do not include I3C Broadcast Address for Private..,1: Include I3C Broadcast Address for Private.." group.word 0x14++0x1 line.word 0x0 "BCTL_HA_L,Bus Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "HJACKCTL,Hot-Join Acknowledge Control" "0: ACK the Hot-Join request,1: NACK and send broadcast CCC to disable Hot-Join" newline bitfld.word 0x0 7. "BMDS,Bus Mode Selection" "0: Legacy inclusive Bus mode disabled,1: Legacy inclusive (mix) Bus mode enabled" hexmask.word.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0. "INCBA,Include I3C Broadcast Address" "0: Do not include I3C Broadcast Address for Private..,1: Include I3C Broadcast Address for Private.." group.byte 0x14++0x1 line.byte 0x0 "BCTL_BY_LL,Bus Control Register" bitfld.byte 0x0 7. "BMDS,Bus Mode Selection" "0: Legacy inclusive Bus mode disabled,1: Legacy inclusive (mix) Bus mode enabled" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "INCBA,Include I3C Broadcast Address" "0: Do not include I3C Broadcast Address for Private..,1: Include I3C Broadcast Address for Private.." line.byte 0x1 "BCTL_BY_LH,Bus Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "HJACKCTL,Hot-Join Acknowledge Control" "0: ACK the Hot-Join request,1: NACK and send broadcast CCC to disable Hot-Join" group.word 0x16++0x1 line.word 0x0 "BCTL_HA_H,Bus Control Register" bitfld.word 0x0 15. "BUSE,Bus Enable" "0: This IP bus operation is Disabled,1: This IP bus operation is Enabled" eventfld.word 0x0 14. "RSM,Resume Values when read:" "0: This IP is Running,1: This IP is Suspended (RW1C)" newline bitfld.word 0x0 13. "ABT,Abort" "0: This IP is Running,1: This IP has Aborted a transfer" hexmask.word 0x0 0.--12. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." group.byte 0x17++0x0 line.byte 0x0 "BCTL_BY_HH,Bus Control Register" bitfld.byte 0x0 7. "BUSE,Bus Enable" "0: This IP bus operation is Disabled,1: This IP bus operation is Enabled" eventfld.byte 0x0 6. "RSM,Resume Values when read:" "0: This IP is Running,1: This IP is Suspended (RW1C)" newline bitfld.byte 0x0 5. "ABT,Abort" "0: This IP is Running,1: This IP has Aborted a transfer" hexmask.byte 0x0 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x18++0x3 line.long 0x0 "MSDVAD,Master Device Address Register" bitfld.long 0x0 31. "MDYADV,Master Dynamic Address Valid" "0: The Master Dynamic Address field is not valid,1: The Master Dynamic Address Field is valid" hexmask.long.byte 0x0 23.--30. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.long.byte 0x0 16.--22. 1. "MDYAD,Master Dynamic Address" hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." group.word 0x1A++0x1 line.word 0x0 "MSDVAD_HA_H,Master Device Address Register" bitfld.word 0x0 15. "MDYADV,Master Dynamic Address Valid" "0: The Master Dynamic Address field is not valid,1: The Master Dynamic Address Field is valid" hexmask.word.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.word.byte 0x0 0.--6. 1. "MDYAD,Master Dynamic Address" group.byte 0x1A++0x1 line.byte 0x0 "MSDVAD_BY_HL,Master Device Address Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "MDYAD,Master Dynamic Address" line.byte 0x1 "MSDVAD_BY_HH,Master Device Address Register" bitfld.byte 0x1 7. "MDYADV,Master Dynamic Address Valid" "0: The Master Dynamic Address field is not valid,1: The Master Dynamic Address Field is valid" hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.long 0x20++0x3 line.long 0x0 "RSTCTL,Reset Control Register" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "INTLRST,Internal Software Reset" "0: Releases of some registers and internal state.,1: Resets of some registers and internal state." newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 12. "HRDBRST,High Priority Rx DATA Buffer Software Reset" "0: The High Priority Receive Queues in this IP do..,1: The High Priority Receive Queues in this IP flush." newline bitfld.long 0x0 11. "HTDBRST,High Priority Tx DATA Buffer Software Reset" "0: The High Priority Transmit Queues in this IP do..,1: The High Priority Transmit Queues in this IP.." bitfld.long 0x0 10. "HRSPQRST,High Priority Response Queue Software Reset" "0: The High Priority Response Queues in this IP do..,1: The High Priority Response Queues in this IP.." newline bitfld.long 0x0 9. "HCMDQRST,High Priority Command Queue Software Reset" "0: The High Priority Command Queues in this IP do..,1: The High Priority Command Queues in this IP flush." bitfld.long 0x0 7.--8. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 6. "RSQRST,Receive Status Queue Software Reset" "0: The Receive Status Queue in this IP do not flush.,1: The Receive Status Queue in this IP flush" bitfld.long 0x0 5. "IBIQRST,IBI Queue Software Reset" "0: The IBI Queues in this IP do not flush.,1: The IBI Queues in this IP flush." newline bitfld.long 0x0 4. "RDBRST,Rx DATA Buffer Software Reset" "0: The Receive Queues in this IP do not flush.,1: The Receive Queues in this IP flush." bitfld.long 0x0 3. "TDBRST,Tx DATA Buffer Software Reset" "0: The Transmit Queues in this IP do not flush.,1: The Transmit Queues in this IP flush." newline bitfld.long 0x0 2. "RSPQRST,Response Queue Software Reset" "0: The Response Queues in this IP do not flush.,1: The Response Queues in this IP flush." bitfld.long 0x0 1. "CMDQRST,Command Queue Software Reset" "0: The Command Queues in this IP do not flush.,1: The Command Queues in this IP flush." newline bitfld.long 0x0 0. "RI3CRST,R-I3C Software Reset" "0: Releases of All registers and Internal State.,1: Reset of All registers and Internal State." group.word 0x20++0x1 line.word 0x0 "RSTCTL_HA_L,Reset Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "HRDBRST,High Priority Rx DATA Buffer Software Reset" "0: The High Priority Receive Queues in this IP do..,1: The High Priority Receive Queues in this IP flush." newline bitfld.word 0x0 11. "HTDBRST,High Priority Tx DATA Buffer Software Reset" "0: The High Priority Transmit Queues in this IP do..,1: The High Priority Transmit Queues in this IP.." bitfld.word 0x0 10. "HRSPQRST,High Priority Response Queue Software Reset" "0: The High Priority Response Queues in this IP do..,1: The High Priority Response Queues in this IP.." newline bitfld.word 0x0 9. "HCMDQRST,High Priority Command Queue Software Reset" "0: The High Priority Command Queues in this IP do..,1: The High Priority Command Queues in this IP flush." bitfld.word 0x0 7.--8. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 6. "RSQRST,Receive Status Queue Software Reset" "0: The Receive Status Queue in this IP do not flush.,1: The Receive Status Queue in this IP flush" bitfld.word 0x0 5. "IBIQRST,IBI Queue Software Reset" "0: The IBI Queues in this IP do not flush.,1: The IBI Queues in this IP flush." newline bitfld.word 0x0 4. "RDBRST,Rx DATA Buffer Software Reset" "0: The Receive Queues in this IP do not flush.,1: The Receive Queues in this IP flush." bitfld.word 0x0 3. "TDBRST,Tx DATA Buffer Software Reset" "0: The Transmit Queues in this IP do not flush.,1: The Transmit Queues in this IP flush." newline bitfld.word 0x0 2. "RSPQRST,Response Queue Software Reset" "0: The Response Queues in this IP do not flush.,1: The Response Queues in this IP flush." bitfld.word 0x0 1. "CMDQRST,Command Queue Software Reset" "0: The Command Queues in this IP do not flush.,1: The Command Queues in this IP flush." newline bitfld.word 0x0 0. "RI3CRST,R-I3C Software Reset" "0: Releases of All registers and Internal State.,1: Reset of All registers and Internal State." group.byte 0x20++0x1 line.byte 0x0 "RSTCTL_BY_LL,Reset Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "RSQRST,Receive Status Queue Software Reset" "0: The Receive Status Queue in this IP do not flush.,1: The Receive Status Queue in this IP flush" newline bitfld.byte 0x0 5. "IBIQRST,IBI Queue Software Reset" "0: The IBI Queues in this IP do not flush.,1: The IBI Queues in this IP flush." bitfld.byte 0x0 4. "RDBRST,Rx DATA Buffer Software Reset" "0: The Receive Queues in this IP do not flush.,1: The Receive Queues in this IP flush." newline bitfld.byte 0x0 3. "TDBRST,Tx DATA Buffer Software Reset" "0: The Transmit Queues in this IP do not flush.,1: The Transmit Queues in this IP flush." bitfld.byte 0x0 2. "RSPQRST,Response Queue Software Reset" "0: The Response Queues in this IP do not flush.,1: The Response Queues in this IP flush." newline bitfld.byte 0x0 1. "CMDQRST,Command Queue Software Reset" "0: The Command Queues in this IP do not flush.,1: The Command Queues in this IP flush." bitfld.byte 0x0 0. "RI3CRST,R-I3C Software Reset" "0: Releases of All registers and Internal State.,1: Reset of All registers and Internal State." line.byte 0x1 "RSTCTL_BY_LH,Reset Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "HRDBRST,High Priority Rx DATA Buffer Software Reset" "0: The High Priority Receive Queues in this IP do..,1: The High Priority Receive Queues in this IP flush." newline bitfld.byte 0x1 3. "HTDBRST,High Priority Tx DATA Buffer Software Reset" "0: The High Priority Transmit Queues in this IP do..,1: The High Priority Transmit Queues in this IP.." bitfld.byte 0x1 2. "HRSPQRST,High Priority Response Queue Software Reset" "0: The High Priority Response Queues in this IP do..,1: The High Priority Response Queues in this IP.." newline bitfld.byte 0x1 1. "HCMDQRST,High Priority Command Queue Software Reset" "0: The High Priority Command Queues in this IP do..,1: The High Priority Command Queues in this IP flush." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x22++0x1 line.word 0x0 "RSTCTL_HA_H,Reset Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "INTLRST,Internal Software Reset" "0: Releases of some registers and internal state.,1: Resets of some registers and internal state." group.byte 0x22++0x0 line.byte 0x0 "RSTCTL_BY_HL,Reset Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "INTLRST,Internal Software Reset" "0: Releases of some registers and internal state.,1: Resets of some registers and internal state." group.long 0x24++0x3 line.long 0x0 "PRSST,Present State Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 7. "PRSSTWP,Present State Write Protect" "0: Bit CRMS is protected.,1: Bit CRMS can be written (When writing.." bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 4. "TRMD,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "CRMS,Current Master" "0: The Master is not the Current Master and must..,1: The Master is the Current Master and as a result.." bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.word 0x24++0x1 line.word 0x0 "PRSST_HA_L,Present State Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 7. "PRSSTWP,Present State Write Protect" "0: Bit CRMS is protected.,1: Bit CRMS can be written (When writing.." newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.word 0x0 4. "TRMD,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "CRMS,Current Master" "0: The Master is not the Current Master and must..,1: The Master is the Current Master and as a result.." newline bitfld.word 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.byte 0x24++0x0 line.byte 0x0 "PRSST_BY_LL,Present State Register" bitfld.byte 0x0 7. "PRSSTWP,Present State Write Protect" "0: Bit CRMS is protected.,1: Bit CRMS can be written (When writing.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.byte 0x0 4. "TRMD,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 2. "CRMS,Current Master" "0: The Master is not the Current Master and must..,1: The Master is the Current Master and as a result.." bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x30++0x3 line.long 0x0 "INST,Internal Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "INEF,Internal Error Flag" "0: This IP Internal Error has not detected,1: This IP Internal Error has detected" hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.word 0x30++0x1 line.word 0x0 "INST_HA_L,Internal Status Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "INEF,Internal Error Flag" "0: This IP Internal Error has not detected,1: This IP Internal Error has detected" newline hexmask.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.byte 0x31++0x0 line.byte 0x0 "INST_BY_LH,Internal Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "INEF,Internal Error Flag" "0: This IP Internal Error has not detected,1: This IP Internal Error has detected" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x34++0x3 line.long 0x0 "INSTE,Internal Status Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "INEE,Internal Error Enable" "0: Disable INST.INEF,1: Enable INST.INEF" hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.word 0x34++0x1 line.word 0x0 "INSTE_HA_L,Internal Status Enable Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "INEE,Internal Error Enable" "0: Disable INST.INEF,1: Enable INST.INEF" newline hexmask.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.byte 0x35++0x0 line.byte 0x0 "INSTE_BY_LH,Internal Status Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "INEE,Internal Error Enable" "0: Disable INST.INEF,1: Enable INST.INEF" newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.long 0x38++0x3 line.long 0x0 "INIE,Internal Interrupt Enable Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "INEIE,Internal Error Interrupt Enable" "0: Disables Non-recoverable Internal Error..,1: Enables Non-recoverable Internal Error Interrupt.." hexmask.long.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.word 0x38++0x1 line.word 0x0 "INIE_HA_L,Internal Interrupt Enable Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "INEIE,Internal Error Interrupt Enable" "0: Disables Non-recoverable Internal Error..,1: Enables Non-recoverable Internal Error Interrupt.." newline hexmask.word 0x0 0.--9. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." group.byte 0x39++0x0 line.byte 0x0 "INIE_BY_LH,Internal Interrupt Enable Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "INEIE,Internal Error Interrupt Enable" "0: Disables Non-recoverable Internal Error..,1: Enables Non-recoverable Internal Error Interrupt.." newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" wgroup.long 0x3C++0x3 line.long 0x0 "INSTFC,Internal Status Force Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,The write value should be 00000." newline bitfld.long 0x0 10. "INEFC,Internal Error Force" "0: not force a specific interrupt,1: force a specific interrupt" hexmask.long.word 0x0 0.--9. 1. "Reserved,The write value should be 0000000000." wgroup.word 0x3C++0x1 line.word 0x0 "INSTFC_HA_L,Internal Status Force Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 10. "INEFC,Internal Error Force" "0: not force a specific interrupt,1: force a specific interrupt" newline hexmask.word 0x0 0.--9. 1. "Reserved,The write value should be 0000000000." wgroup.byte 0x3D++0x0 line.byte 0x0 "INSTFC_BY_LH,Internal Status Force Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "INEFC,Internal Error Force" "0: not force a specific interrupt,1: force a specific interrupt" newline bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" rgroup.long 0x44++0x3 line.long 0x0 "DVCT,Device Characteristic Table Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.byte 0x0 19.--23. 1. "IDX,DCT Table Index" newline hexmask.long.tbyte 0x0 0.--18. 1. "Reserved,These bits are read as 0000000000000000000." rgroup.word 0x46++0x1 line.word 0x0 "DVCT_HA_H,Device Characteristic Table Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 3.--7. 1. "IDX,DCT Table Index" newline bitfld.word 0x0 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" rgroup.byte 0x46++0x0 line.byte 0x0 "DVCT_BY_HL,Device Characteristic Table Register" hexmask.byte 0x0 3.--7. 1. "IDX,DCT Table Index" bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" group.long 0x58++0x3 line.long 0x0 "IBINCTL,IBI Notify Control Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "NRSIRCTL,Notify Rejected Slave Interrupt Request Control" "0: Do not pass rejected IBI Status to the IBI..,1: Pass rejected IBI Status to the IBI Queue/Rings.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "NRMRCTL,Notify Rejected Master Request Control" "0: Do not pass rejected IBI Status to IBI..,1: Pass rejected IBI Status to the IBI Queue if the.." newline bitfld.long 0x0 0. "NRHJCTL,Notify Rejected Hot-Join Control" "0: Do not pass rejected IBI Status to IBI Queue if..,1: Pass rejected IBI Status to the IBI Queue if the.." group.word 0x58++0x1 line.word 0x0 "IBINCTL_HA_L,IBI Notify Control Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "NRSIRCTL,Notify Rejected Slave Interrupt Request Control" "0: Do not pass rejected IBI Status to the IBI..,1: Pass rejected IBI Status to the IBI Queue/Rings.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "NRMRCTL,Notify Rejected Master Request Control" "0: Do not pass rejected IBI Status to IBI..,1: Pass rejected IBI Status to the IBI Queue if the.." newline bitfld.word 0x0 0. "NRHJCTL,Notify Rejected Hot-Join Control" "0: Do not pass rejected IBI Status to IBI Queue if..,1: Pass rejected IBI Status to the IBI Queue if the.." group.byte 0x58++0x0 line.byte 0x0 "IBINCTL_BY_LL,IBI Notify Control Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "NRSIRCTL,Notify Rejected Slave Interrupt Request Control" "0: Do not pass rejected IBI Status to the IBI..,1: Pass rejected IBI Status to the IBI Queue/Rings.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "NRMRCTL,Notify Rejected Master Request Control" "0: Do not pass rejected IBI Status to IBI..,1: Pass rejected IBI Status to the IBI Queue if the.." newline bitfld.byte 0x0 0. "NRHJCTL,Notify Rejected Hot-Join Control" "0: Do not pass rejected IBI Status to IBI Queue if..,1: Pass rejected IBI Status to the IBI Queue if the.." group.long 0x60++0x3 line.long 0x0 "BFCTL,Bus Function Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 15. "HSME,High Speed Mode Enable" "0: Disable High Speed Mode.,1: Enable High Speed Mode." newline bitfld.long 0x0 14. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit uses for the SCLn..,1: An Fm+ slope control circuit uses for the SCLn.." bitfld.long 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 12. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus select.,1: The SMBus select." bitfld.long 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 8. "SCSYNE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit uses.,1: An SCL synchronous circuit uses." hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection disables.,1: Slave arbitration-lost detection enables." bitfld.long 0x0 1. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." newline bitfld.long 0x0 0. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection disables.,1: Master arbitration-lost detection enables." group.word 0x60++0x1 line.word 0x0 "BFCTL_HA_L,Bus Function Control Register" bitfld.word 0x0 15. "HSME,High Speed Mode Enable" "0: Disable High Speed Mode.,1: Enable High Speed Mode." bitfld.word 0x0 14. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit uses for the SCLn..,1: An Fm+ slope control circuit uses for the SCLn.." newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus select.,1: The SMBus select." newline bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 8. "SCSYNE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit uses.,1: An SCL synchronous circuit uses." newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 2. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection disables.,1: Slave arbitration-lost detection enables." newline bitfld.word 0x0 1. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." bitfld.word 0x0 0. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection disables.,1: Master arbitration-lost detection enables." group.byte 0x60++0x1 line.byte 0x0 "BFCTL_BY_LL,Bus Function Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection disables.,1: Slave arbitration-lost detection enables." newline bitfld.byte 0x0 1. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection..,1: NACK transmission arbitration-lost detection.." bitfld.byte 0x0 0. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection disables.,1: Master arbitration-lost detection enables." line.byte 0x1 "BFCTL_BY_LH,Bus Function Control Register" bitfld.byte 0x1 7. "HSME,High Speed Mode Enable" "0: Disable High Speed Mode.,1: Enable High Speed Mode." bitfld.byte 0x1 6. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit uses for the SCLn..,1: An Fm+ slope control circuit uses for the SCLn.." newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus select.,1: The SMBus select." newline bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 0. "SCSYNE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit uses.,1: An SCL synchronous circuit uses." group.long 0x64++0x3 line.long 0x0 "SVCTL,Slave Control Register" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 16.--18. "SVAE,Slave Address Enable x (x=2 to 0)" "0: Slave x disables.,1: Slave x enables.,?,?,?,?,?,?" newline bitfld.long 0x0 15. "HOAE,Host Address Enable" "0: Host address detection disables.,1: Host address detection enables." hexmask.long.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6. "DVIDE,Device-ID Address Enable" "0: Device-ID address detection disables.,1: Device-ID address detection enables." bitfld.long 0x0 5. "HSMCE,Hs-mode Master Code Enable" "0: Hs-mode Master Code Detection disables.,1: Hs-mode Master Code Detection enables." newline hexmask.long.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 0. "GCAE,General Call Address Enable" "0: General call address detection disables.,1: General call address detection enables." group.word 0x64++0x1 line.word 0x0 "SVCTL_HA_L,Slave Control Register" bitfld.word 0x0 15. "HOAE,Host Address Enable" "0: Host address detection disables.,1: Host address detection enables." hexmask.word.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.word 0x0 6. "DVIDE,Device-ID Address Enable" "0: Device-ID address detection disables.,1: Device-ID address detection enables." bitfld.word 0x0 5. "HSMCE,Hs-mode Master Code Enable" "0: Hs-mode Master Code Detection disables.,1: Hs-mode Master Code Detection enables." newline hexmask.word.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 0. "GCAE,General Call Address Enable" "0: General call address detection disables.,1: General call address detection enables." group.byte 0x64++0x1 line.byte 0x0 "SVCTL_BY_LL,Slave Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "DVIDE,Device-ID Address Enable" "0: Device-ID address detection disables.,1: Device-ID address detection enables." newline bitfld.byte 0x0 5. "HSMCE,Hs-mode Master Code Enable" "0: Hs-mode Master Code Detection disables.,1: Hs-mode Master Code Detection enables." hexmask.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0. "GCAE,General Call Address Enable" "0: General call address detection disables.,1: General call address detection enables." line.byte 0x1 "SVCTL_BY_LH,Slave Control Register" bitfld.byte 0x1 7. "HOAE,Host Address Enable" "0: Host address detection disables.,1: Host address detection enables." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.word 0x66++0x1 line.word 0x0 "SVCTL_HA_H,Slave Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "SVAE,Slave Address Enable x (x=2 to 0)" "0: Slave x disables.,1: Slave x enables.,?,?,?,?,?,?" group.byte 0x66++0x0 line.byte 0x0 "SVCTL_BY_HL,Slave Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "SVAE,Slave Address Enable x (x=2 to 0)" "0: Slave x disables.,1: Slave x enables.,?,?,?,?,?,?" group.long 0x70++0x3 line.long 0x0 "REFCKCTL,Reference Clock Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 0.--2. "IREFCKS,Internal Reference Clock SelectionSelects the internal reference clock source (I3C) for this IP." "0: TCLK/1 clock,1: TCLK/2 clock,?,?,?,?,?,?" group.word 0x70++0x1 line.word 0x0 "REFCKCTL_HA_L,Reference Clock Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "IREFCKS,Internal Reference Clock SelectionSelects the internal reference clock source (I3C) for this IP." "0: TCLK/1 clock,1: TCLK/2 clock,?,?,?,?,?,?" group.byte 0x70++0x0 line.byte 0x0 "REFCKCTL_BY_LL,Reference Clock Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "IREFCKS,Internal Reference Clock SelectionSelects the internal reference clock source (I3C) for this IP." "0: TCLK/1 clock,1: TCLK/2 clock,?,?,?,?,?,?" group.long 0x74++0x3 line.long 0x0 "STDBR,Standard Bit Rate Register" bitfld.long 0x0 31. "DSBRPO,Double the Standard Bit Rate Period for Open-Drain" "0: Normal,?" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.long.byte 0x0 24.--29. 1. "SBRHP,Standard Bit Rate High-Level Period Push-Pull" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--21. 1. "SBRLP,Standard Bit Rate Low-Level Period Push-Pull" hexmask.long.byte 0x0 8.--15. 1. "SBRHO,Standard Bit Rate High-Level Period Open-Drain" newline hexmask.long.byte 0x0 0.--7. 1. "SBRLO,Standard Bit Rate Low-Level Period Open-Drain" group.word 0x74++0x1 line.word 0x0 "STDBR_HA_L,Standard Bit Rate Register" hexmask.word.byte 0x0 8.--15. 1. "SBRHO,Standard Bit Rate High-Level Period Open-Drain" hexmask.word.byte 0x0 0.--7. 1. "SBRLO,Standard Bit Rate Low-Level Period Open-Drain" group.byte 0x74++0x1 line.byte 0x0 "STDBR_BY_LL,Standard Bit Rate Register" hexmask.byte 0x0 0.--7. 1. "SBRLO,Standard Bit Rate Low-Level Period Open-Drain" line.byte 0x1 "STDBR_BY_LH,Standard Bit Rate Register" hexmask.byte 0x1 0.--7. 1. "SBRHO,Standard Bit Rate High-Level Period Open-Drain" group.word 0x76++0x1 line.word 0x0 "STDBR_HA_H,Standard Bit Rate Register" bitfld.word 0x0 15. "DSBRPO,Double the Standard Bit Rate Period for Open-Drain" "0: Normal,?" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 8.--13. 1. "SBRHP,Standard Bit Rate High-Level Period Push-Pull" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--5. 1. "SBRLP,Standard Bit Rate Low-Level Period Push-Pull" group.byte 0x76++0x1 line.byte 0x0 "STDBR_BY_HL,Standard Bit Rate Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "SBRLP,Standard Bit Rate Low-Level Period Push-Pull" line.byte 0x1 "STDBR_BY_HH,Standard Bit Rate Register" bitfld.byte 0x1 7. "DSBRPO,Double the Standard Bit Rate Period for Open-Drain" "0: Normal,?" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.byte 0x1 0.--5. 1. "SBRHP,Standard Bit Rate High-Level Period Push-Pull" group.long 0x78++0x3 line.long 0x0 "EXTBR,Extended Bit Rate Register" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 24.--29. 1. "EBRHP,Extended Bit Rate Low-Level Period Push-Pull" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "EBRLP,Extended Bit Rate Low-Level Period Push-Pull" newline hexmask.long.byte 0x0 8.--15. 1. "EBRHO,Extended Bit Rate Low-Level Period Open-Drain" hexmask.long.byte 0x0 0.--7. 1. "EBRLO,Extended Bit Rate Low-Level Period Open-Drain" group.word 0x78++0x1 line.word 0x0 "EXTBR_HA_L,Extended Bit Rate Register" hexmask.word.byte 0x0 8.--15. 1. "EBRHO,Extended Bit Rate Low-Level Period Open-Drain" hexmask.word.byte 0x0 0.--7. 1. "EBRLO,Extended Bit Rate Low-Level Period Open-Drain" group.byte 0x78++0x1 line.byte 0x0 "EXTBR_BY_LL,Extended Bit Rate Register" hexmask.byte 0x0 0.--7. 1. "EBRLO,Extended Bit Rate Low-Level Period Open-Drain" line.byte 0x1 "EXTBR_BY_LH,Extended Bit Rate Register" hexmask.byte 0x1 0.--7. 1. "EBRHO,Extended Bit Rate Low-Level Period Open-Drain" group.word 0x7A++0x1 line.word 0x0 "EXTBR_HA_H,Extended Bit Rate Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.word.byte 0x0 8.--13. 1. "EBRHP,Extended Bit Rate Low-Level Period Push-Pull" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.word.byte 0x0 0.--5. 1. "EBRLP,Extended Bit Rate Low-Level Period Push-Pull" group.byte 0x7A++0x1 line.byte 0x0 "EXTBR_BY_HL,Extended Bit Rate Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "EBRLP,Extended Bit Rate Low-Level Period Push-Pull" line.byte 0x1 "EXTBR_BY_HH,Extended Bit Rate Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" hexmask.byte 0x1 0.--5. 1. "EBRHP,Extended Bit Rate Low-Level Period Push-Pull" group.long 0x7C++0x3 line.long 0x0 "BFRECDT,Bus Free Condition Detection Time Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." hexmask.long.word 0x0 0.--8. 1. "FRECYC,Bus Free Condition Detection Cycle" group.word 0x7C++0x1 line.word 0x0 "BFRECDT_HA_L,Bus Free Condition Detection Time Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "FRECYC,Bus Free Condition Detection Cycle" group.byte 0x7C++0x1 line.byte 0x0 "BFRECDT_BY_LL,Bus Free Condition Detection Time Register" hexmask.byte 0x0 0.--7. 1. "FRECYC,Bus Free Condition Detection Cycle" line.byte 0x1 "BFRECDT_BY_LH,Bus Free Condition Detection Time Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "FRECYC,Bus Free Condition Detection Cycle" "0,1" group.long 0x80++0x3 line.long 0x0 "BAVLCDT,Bus Available Condition Detection Time Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." hexmask.long.word 0x0 0.--8. 1. "AVLCYC,Bus Available Condition Detection Cycle" group.word 0x80++0x1 line.word 0x0 "BAVLCDT_HA_L,Bus Available Condition Detection Time Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "AVLCYC,Bus Available Condition Detection Cycle" group.byte 0x80++0x1 line.byte 0x0 "BAVLCDT_BY_LL,Bus Available Condition Detection Time Register" hexmask.byte 0x0 0.--7. 1. "AVLCYC,Bus Available Condition Detection Cycle" line.byte 0x1 "BAVLCDT_BY_LH,Bus Available Condition Detection Time Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "AVLCYC,Bus Available Condition Detection Cycle" "0,1" group.long 0x84++0x3 line.long 0x0 "BIDLCDT,Bus Idle Condition Detection Time Register" hexmask.long.word 0x0 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." hexmask.long.tbyte 0x0 0.--17. 1. "IDLCYC,Bus Idle Condition Detection Cycle" group.word 0x84++0x1 line.word 0x0 "BIDLCDT_HA_L,Bus Idle Condition Detection Time Register" hexmask.word 0x0 0.--15. 1. "IDLCYC,Bus Idle Condition Detection Cycle" group.byte 0x84++0x1 line.byte 0x0 "BIDLCDT_BY_LL,Bus Idle Condition Detection Time Register" hexmask.byte 0x0 0.--7. 1. "IDLCYC,Bus Idle Condition Detection Cycle" line.byte 0x1 "BIDLCDT_BY_LH,Bus Idle Condition Detection Time Register" hexmask.byte 0x1 0.--7. 1. "IDLCYC,Bus Idle Condition Detection Cycle" group.word 0x86++0x1 line.word 0x0 "BIDLCDT_HA_H,Bus Idle Condition Detection Time Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x0 0.--1. "IDLCYC,Bus Idle Condition Detection Cycle" "0,1,2,3" group.byte 0x86++0x0 line.byte 0x0 "BIDLCDT_BY_HL,Bus Idle Condition Detection Time Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "IDLCYC,Bus Idle Condition Detection Cycle" "0,1,2,3" group.long 0x88++0x3 line.long 0x0 "OUTCTL,Output Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 15. "SDODCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (I3C) is selected..,1: The internal reference clock divided by 2.." newline hexmask.long.byte 0x0 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 8.--10. "SDOD,SDA Output Delay" "0: No output delay,1: 1 or 2 I3C cycles,?,?,?,?,?,?" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "EXCYC,Extra SCL Clock Cycle Output" "0: (The EXCYC bit is cleared automatically after..,1: Outputs an extra SCL clock cycle." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "SOCWP,SCL/SDA Output Control Write Protect" "0: Bits SCOC and SDOC are protected.,1: Bits SCOC and SDOC can be written (When writing.." newline bitfld.long 0x0 1. "SCOC,SCL Output Control" "0: This IP drives the SCLn pin low.,1: This IP releases the SCLn pin." bitfld.long 0x0 0. "SDOC,SDA Output Control" "0: This IP drives the SDAn pin low.,1: This IP releases the SDAn pin." group.word 0x88++0x1 line.word 0x0 "OUTCTL_HA_L,Output Control Register" bitfld.word 0x0 15. "SDODCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (I3C) is selected..,1: The internal reference clock divided by 2.." hexmask.word.byte 0x0 11.--14. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.word 0x0 8.--10. "SDOD,SDA Output Delay" "0: No output delay,1: 1 or 2 I3C cycles,?,?,?,?,?,?" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 4. "EXCYC,Extra SCL Clock Cycle Output" "0: (The EXCYC bit is cleared automatically after..,1: Outputs an extra SCL clock cycle." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "SOCWP,SCL/SDA Output Control Write Protect" "0: Bits SCOC and SDOC are protected.,1: Bits SCOC and SDOC can be written (When writing.." bitfld.word 0x0 1. "SCOC,SCL Output Control" "0: This IP drives the SCLn pin low.,1: This IP releases the SCLn pin." newline bitfld.word 0x0 0. "SDOC,SDA Output Control" "0: This IP drives the SDAn pin low.,1: This IP releases the SDAn pin." group.byte 0x88++0x1 line.byte 0x0 "OUTCTL_BY_LL,Output Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "EXCYC,Extra SCL Clock Cycle Output" "0: (The EXCYC bit is cleared automatically after..,1: Outputs an extra SCL clock cycle." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "SOCWP,SCL/SDA Output Control Write Protect" "0: Bits SCOC and SDOC are protected.,1: Bits SCOC and SDOC can be written (When writing.." newline bitfld.byte 0x0 1. "SCOC,SCL Output Control" "0: This IP drives the SCLn pin low.,1: This IP releases the SCLn pin." bitfld.byte 0x0 0. "SDOC,SDA Output Control" "0: This IP drives the SDAn pin low.,1: This IP releases the SDAn pin." line.byte 0x1 "OUTCTL_BY_LH,Output Control Register" bitfld.byte 0x1 7. "SDODCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (I3C) is selected..,1: The internal reference clock divided by 2.." hexmask.byte 0x1 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x1 0.--2. "SDOD,SDA Output Delay" "0: No output delay,1: 1 or 2 I3C cycles,?,?,?,?,?,?" group.long 0x8C++0x3 line.long 0x0 "INCTL,Input Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "DNFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." hexmask.long.byte 0x0 0.--3. 1. "DNFS,Digital Noise Filter Stage Selection" group.word 0x8C++0x1 line.word 0x0 "INCTL_HA_L,Input Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "DNFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." newline hexmask.word.byte 0x0 0.--3. 1. "DNFS,Digital Noise Filter Stage Selection" group.byte 0x8C++0x0 line.byte 0x0 "INCTL_BY_LL,Input Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4. "DNFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." hexmask.byte 0x0 0.--3. 1. "DNFS,Digital Noise Filter Stage Selection" group.long 0x90++0x3 line.long 0x0 "TMOCTL,Timeout Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "TOMDS,Timeout Operation Mode Selection" "0: Timeout is detected during the following..,1: Timeout is detected while the bus is busy,?,?" bitfld.long 0x0 5. "TOHCTL,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.long 0x0 4. "TOLCTL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 0.--1. "TODTS,Timeout Detection Time Selection" "0: 16bit-timeout,1: 14bit-timeout,?,?" group.word 0x90++0x1 line.word 0x0 "TMOCTL_HA_L,Timeout Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "TOMDS,Timeout Operation Mode Selection" "0: Timeout is detected during the following..,1: Timeout is detected while the bus is busy,?,?" newline bitfld.word 0x0 5. "TOHCTL,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." bitfld.word 0x0 4. "TOLCTL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0.--1. "TODTS,Timeout Detection Time Selection" "0: 16bit-timeout,1: 14bit-timeout,?,?" group.byte 0x90++0x0 line.byte 0x0 "TMOCTL_BY_LL,Timeout Control Register" bitfld.byte 0x0 6.--7. "TOMDS,Timeout Operation Mode Selection" "0: Timeout is detected during the following..,1: Timeout is detected while the bus is busy,?,?" bitfld.byte 0x0 5. "TOHCTL,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x0 4. "TOLCTL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 0.--1. "TODTS,Timeout Detection Time Selection" "0: 16bit-timeout,1: 14bit-timeout,?,?" group.long 0x98++0x3 line.long 0x0 "WUCTL,Wake Up Unit Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "WUFE,Wake Up function Enable" "0: Wake-up function disables,1: Wake-up function enables." newline bitfld.long 0x0 6. "WUFSYNE,Wake-Up function Synchronous Enable" "0: This IP asynchronous circuit enable,1: This IP synchronous circuit enable" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "WUANFS,Wake-Up Analog Noise Filter Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "WUACKS,Wake-Up Acknowledge Selection" "0,1" group.word 0x98++0x1 line.word 0x0 "WUCTL_HA_L,Wake Up Unit Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 7. "WUFE,Wake Up function Enable" "0: Wake-up function disables,1: Wake-up function enables." newline bitfld.word 0x0 6. "WUFSYNE,Wake-Up function Synchronous Enable" "0: This IP asynchronous circuit enable,1: This IP synchronous circuit enable" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "WUANFS,Wake-Up Analog Noise Filter Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "WUACKS,Wake-Up Acknowledge Selection" "0,1" group.byte 0x98++0x0 line.byte 0x0 "WUCTL_BY_LL,Wake Up Unit Control Register" bitfld.byte 0x0 7. "WUFE,Wake Up function Enable" "0: Wake-up function disables,1: Wake-up function enables." bitfld.byte 0x0 6. "WUFSYNE,Wake-Up function Synchronous Enable" "0: This IP asynchronous circuit enable,1: This IP synchronous circuit enable" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "WUANFS,Wake-Up Analog Noise Filter Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "WUACKS,Wake-Up Acknowledge Selection" "0,1" group.long 0xA0++0x3 line.long 0x0 "ACKCTL,Acknowledge Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "ACKTWP,ACKT Write Protect" "0: The ACKT bit are protected.,1: The ACKT bit can be written (When writing.." newline bitfld.long 0x0 1. "ACKT,Acknowledge Transmission" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.long 0x0 0. "ACKR,Acknowledge Reception" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." group.word 0xA0++0x1 line.word 0x0 "ACKCTL_HA_L,Acknowledge Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "ACKTWP,ACKT Write Protect" "0: The ACKT bit are protected.,1: The ACKT bit can be written (When writing.." newline bitfld.word 0x0 1. "ACKT,Acknowledge Transmission" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.word 0x0 0. "ACKR,Acknowledge Reception" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." group.byte 0xA0++0x0 line.byte 0x0 "ACKCTL_BY_LL,Acknowledge Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "ACKTWP,ACKT Write Protect" "0: The ACKT bit are protected.,1: The ACKT bit can be written (When writing.." newline bitfld.byte 0x0 1. "ACKT,Acknowledge Transmission" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x0 0. "ACKR,Acknowledge Reception" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." group.long 0xA4++0x3 line.long 0x0 "SCSTRCTL,SCL Stretch Control Register" hexmask.long 0x0 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "RWE,Receive Wait Enable" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.long 0x0 0. "ACKTWE,Acknowledge Transmission Wait Enabl (*1)" "0: NTST.RDBFF0 is set at the rising edge of the..,1: NTST.RDBFF0 is set at the rising edge of the.." group.word 0xA4++0x1 line.word 0x0 "SCSTRCTL_HA_L,SCL Stretch Control Register" hexmask.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x0 1. "RWE,Receive Wait Enable" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.word 0x0 0. "ACKTWE,Acknowledge Transmission Wait Enabl (*1)" "0: NTST.RDBFF0 is set at the rising edge of the..,1: NTST.RDBFF0 is set at the rising edge of the.." group.byte 0xA4++0x0 line.byte 0x0 "SCSTRCTL_BY_LL,SCL Stretch Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "RWE,Receive Wait Enable" "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.byte 0x0 0. "ACKTWE,Acknowledge Transmission Wait Enabl (*1)" "0: NTST.RDBFF0 is set at the rising edge of the..,1: NTST.RDBFF0 is set at the rising edge of the.." group.long 0xB0++0x3 line.long 0x0 "SCSTLCTL,SCL Stalling Control Register" bitfld.long 0x0 31. "ACKPE,ACK phase EnableStall enable bit during ACK/NACK phase" "0: Does not stall the SCL clock during the ACK/NACK..,1: Stall the SCL clock during the ACK/NACK phase." bitfld.long 0x0 30. "PARPE,Parity Phase EnableStall enable bit in parity bit period" "0: Does not stall the SCL clock during the parity..,1: Stall the SCL clock during the parity bit period." newline bitfld.long 0x0 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 28. "AAPE,Assigend Address Phase EnableEnable bit that allows stall by the first bit at address assignment" "0: Does not stall the SCL clock during the address..,1: Stall the SCL clock during the parity bit period.." newline hexmask.long.word 0x0 16.--27. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.long.word 0x0 0.--15. 1. "STLCYC,Stalling Cycle" group.word 0xB0++0x1 line.word 0x0 "SCSTLCTL_HA_L,SCL Stalling Control Register" hexmask.word 0x0 0.--15. 1. "STLCYC,Stalling Cycle" group.byte 0xB0++0x1 line.byte 0x0 "SCSTLCTL_BY_LL,SCL Stalling Control Register" hexmask.byte 0x0 0.--7. 1. "STLCYC,Stalling Cycle" line.byte 0x1 "SCSTLCTL_BY_LH,SCL Stalling Control Register" hexmask.byte 0x1 0.--7. 1. "STLCYC,Stalling Cycle" group.word 0xB2++0x1 line.word 0x0 "SCSTLCTL_HA_H,SCL Stalling Control Register" bitfld.word 0x0 15. "ACKPE,ACK phase EnableStall enable bit during ACK/NACK phase" "0: Does not stall the SCL clock during the ACK/NACK..,1: Stall the SCL clock during the ACK/NACK phase." bitfld.word 0x0 14. "PARPE,Parity Phase EnableStall enable bit in parity bit period" "0: Does not stall the SCL clock during the parity..,1: Stall the SCL clock during the parity bit period." newline bitfld.word 0x0 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 12. "AAPE,Assigend Address Phase EnableEnable bit that allows stall by the first bit at address assignment" "0: Does not stall the SCL clock during the address..,1: Stall the SCL clock during the parity bit period.." newline hexmask.word 0x0 0.--11. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." group.byte 0xB3++0x0 line.byte 0x0 "SCSTLCTL_BY_HH,SCL Stalling Control Register" bitfld.byte 0x0 7. "ACKPE,ACK phase EnableStall enable bit during ACK/NACK phase" "0: Does not stall the SCL clock during the ACK/NACK..,1: Stall the SCL clock during the ACK/NACK phase." bitfld.byte 0x0 6. "PARPE,Parity Phase EnableStall enable bit in parity bit period" "0: Does not stall the SCL clock during the parity..,1: Stall the SCL clock during the parity bit period." newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "AAPE,Assigend Address Phase EnableEnable bit that allows stall by the first bit at address assignment" "0: Does not stall the SCL clock during the address..,1: Stall the SCL clock during the parity bit period.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0xC0++0x3 line.long 0x0 "SVTDLG0,Slave Transfer Data Length Register 0" hexmask.long.word 0x0 16.--31. 1. "STDLG,Slave Transfer Data Length" hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." group.word 0xC2++0x1 line.word 0x0 "SVTDLG0_HA_H,Slave Transfer Data Length Register 0" hexmask.word 0x0 0.--15. 1. "STDLG,Slave Transfer Data Length" group.byte 0xC2++0x1 line.byte 0x0 "SVTDLG0_BY_HL,Slave Transfer Data Length Register 0" hexmask.byte 0x0 0.--7. 1. "STDLG,Slave Transfer Data Length" line.byte 0x1 "SVTDLG0_BY_HH,Slave Transfer Data Length Register 0" hexmask.byte 0x1 0.--7. 1. "STDLG,Slave Transfer Data Length" group.long 0x120++0x3 line.long 0x0 "STCTL,Synchronous Timiming Control Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "STOE,Synchronous Timing output Enable" "0: Disable,1: Enable" group.word 0x120++0x1 line.word 0x0 "STCTL_HA_L,Synchronous Timiming Control Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "STOE,Synchronous Timing output Enable" "0: Disable,1: Enable" group.byte 0x120++0x0 line.byte 0x0 "STCTL_BY_LL,Synchronous Timiming Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "STOE,Synchronous Timing output Enable" "0: Disable,1: Enable" group.long 0x124++0x3 line.long 0x0 "ATCTL,Asynchronous Timimg Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "CDIV,TCLK Counter Divide Setting" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 2. "AMEOE,Additional Master-initiated bus Event Output Enable" "0: Disable,1: Enable" newline bitfld.long 0x0 1. "MREFOE,MREF Output Enable (Capture Event / Counter Overflow)" "0: Disable,1: Enable" bitfld.long 0x0 0. "ATTRGS,Asynchronous Timing Trigger Select" "0: Software Trigger,1: Hardware Trigger" group.word 0x124++0x1 line.word 0x0 "ATCTL_HA_L,Asynchronous Timimg Control Register" hexmask.word.byte 0x0 8.--15. 1. "CDIV,TCLK Counter Divide Setting" hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 2. "AMEOE,Additional Master-initiated bus Event Output Enable" "0: Disable,1: Enable" bitfld.word 0x0 1. "MREFOE,MREF Output Enable (Capture Event / Counter Overflow)" "0: Disable,1: Enable" newline bitfld.word 0x0 0. "ATTRGS,Asynchronous Timing Trigger Select" "0: Software Trigger,1: Hardware Trigger" group.byte 0x124++0x1 line.byte 0x0 "ATCTL_BY_LL,Asynchronous Timimg Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "AMEOE,Additional Master-initiated bus Event Output Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1. "MREFOE,MREF Output Enable (Capture Event / Counter Overflow)" "0: Disable,1: Enable" bitfld.byte 0x0 0. "ATTRGS,Asynchronous Timing Trigger Select" "0: Software Trigger,1: Hardware Trigger" line.byte 0x1 "ATCTL_BY_LH,Asynchronous Timimg Control Register" hexmask.byte 0x1 0.--7. 1. "CDIV,TCLK Counter Divide Setting" wgroup.long 0x128++0x3 line.long 0x0 "ATTRG,Asynchronous Timiming Trigger Register" hexmask.long 0x0 1.--31. 1. "Reserved,The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "ATSTRG,Asynchronous Timing Software Trigger" "0: Write : do nothing,1: Write : Software trigger (one-shot pulse) output" wgroup.word 0x128++0x1 line.word 0x0 "ATTRG_HA_L,Asynchronous Timiming Trigger Register" hexmask.word 0x0 1.--15. 1. "Reserved,The write value should be 000000000000000." bitfld.word 0x0 0. "ATSTRG,Asynchronous Timing Software Trigger" "0: Write : do nothing,1: Write : Software trigger (one-shot pulse) output" wgroup.byte 0x128++0x0 line.byte 0x0 "ATTRG_BY_LL,Asynchronous Timiming Trigger Register" hexmask.byte 0x0 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x0 0. "ATSTRG,Asynchronous Timing Software Trigger" "0: Write : do nothing,1: Write : Software trigger (one-shot pulse) output" group.long 0x12C++0x3 line.long 0x0 "ATCCNTE,Asynchronous Timing Contorol Counter enable Register" hexmask.long 0x0 1.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000000. The write value should be 0000000000000000000000000000000." bitfld.long 0x0 0. "ATCE,Asynchronous Timing Counter Enable for MREF MC2 SC1 SC2." "0: Disable,1: Enable" group.word 0x12C++0x1 line.word 0x0 "ATCCNTE_HA_L,Asynchronous Timing Contorol Counter enable Register" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "ATCE,Asynchronous Timing Counter Enable for MREF MC2 SC1 SC2." "0: Disable,1: Enable" group.byte 0x12C++0x0 line.byte 0x0 "ATCCNTE_BY_LL,Asynchronous Timing Contorol Counter enable Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "ATCE,Asynchronous Timing Counter Enable for MREF MC2 SC1 SC2." "0: Disable,1: Enable" group.long 0x140++0x3 line.long 0x0 "CNDCTL,Condition Control Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "SPCND,STOP (P) Condition Issuance" "0: Does not request to issue a STOP condition.,1: Requests to issue a STOP condition." newline bitfld.long 0x0 1. "SRCND,Repeated START (Sr) Condition Issuance" "0: Does not request to issue a Repeated START..,1: Requests to issue a Repeated START condition." bitfld.long 0x0 0. "STCND,START (S) Condition Issuance" "0: Does not request to issue a START condition.,1: Requests to issue a START condition." group.word 0x140++0x1 line.word 0x0 "CNDCTL_HA_L,Condition Control Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "SPCND,STOP (P) Condition Issuance" "0: Does not request to issue a STOP condition.,1: Requests to issue a STOP condition." newline bitfld.word 0x0 1. "SRCND,Repeated START (Sr) Condition Issuance" "0: Does not request to issue a Repeated START..,1: Requests to issue a Repeated START condition." bitfld.word 0x0 0. "STCND,START (S) Condition Issuance" "0: Does not request to issue a START condition.,1: Requests to issue a START condition." group.byte 0x140++0x0 line.byte 0x0 "CNDCTL_BY_LL,Condition Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SPCND,STOP (P) Condition Issuance" "0: Does not request to issue a STOP condition.,1: Requests to issue a STOP condition." newline bitfld.byte 0x0 1. "SRCND,Repeated START (Sr) Condition Issuance" "0: Does not request to issue a Repeated START..,1: Requests to issue a Repeated START condition." bitfld.byte 0x0 0. "STCND,START (S) Condition Issuance" "0: Does not request to issue a START condition.,1: Requests to issue a START condition." wgroup.long 0x150++0x3 line.long 0x0 "NCMDQP,Normal Command Queue Port Register" hexmask.long 0x0 0.--31. 1. "NCMDQP,Normal Command Queue Port" rgroup.long 0x154++0x3 line.long 0x0 "NRSPQP,Normal Response Queue Port Register" hexmask.long 0x0 0.--31. 1. "NRSPQP,Normal Response Queue Port" group.long 0x158++0x3 line.long 0x0 "NTDTBP0,Normal Transfer Data Buffer Port Register 0" hexmask.long 0x0 0.--31. 1. "NTDTBP0,Normal Transfer Data Buffer Port" group.byte 0x158++0x0 line.byte 0x0 "NTDTBP0_BY_LL,Normal Transfer Data Buffer Port Register 0" hexmask.byte 0x0 0.--7. 1. "NTDTBP0,Normal Transfer Data Buffer Port" group.long 0x17C++0x3 line.long 0x0 "NIBIQP,Normal IBI Queue Port Register" hexmask.long 0x0 0.--31. 1. "NIBIQP,Normal IBI Queue Port" rgroup.long 0x180++0x3 line.long 0x0 "NRSQP,Normal Receive Status Queue Port Register" hexmask.long 0x0 0.--31. 1. "NRSQP,Normal Receive Status Queue Port" wgroup.long 0x184++0x3 line.long 0x0 "HCMDQP,High Priority Command Queue Port Register" hexmask.long 0x0 0.--31. 1. "HCMDQP,High Priority Command Queue Port" rgroup.long 0x188++0x3 line.long 0x0 "HRSPQP,High Priority Response Queue Port Register" hexmask.long 0x0 0.--31. 1. "HRSPQP,High Priority Response Queue Port" group.long 0x18C++0x7 line.long 0x0 "HTDTBP,High Priority Transfer Data Buffer Port Register" hexmask.long 0x0 0.--31. 1. "HTDTBP,High Priority Transfer Data Buffer Port" line.long 0x4 "NQTHCTL,Normal Queue Threshold Control Register" hexmask.long.byte 0x4 24.--31. 1. "IBIQTH,Normal IBI Queue Threshold" hexmask.long.byte 0x4 16.--23. 1. "IBIDSSZ,Normal IBI Data Segment Size" newline hexmask.long.byte 0x4 8.--15. 1. "RSPQTH,Normal Response Queue Threshold" hexmask.long.byte 0x4 0.--7. 1. "CMDQTH,Normal Command Queue Threshold" group.word 0x190++0x1 line.word 0x0 "NQTHCTL_HA_L,Normal Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQTH,Normal Response Queue Threshold" hexmask.word.byte 0x0 0.--7. 1. "CMDQTH,Normal Command Queue Threshold" group.byte 0x190++0x1 line.byte 0x0 "NQTHCTL_BY_LL,Normal Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "CMDQTH,Normal Command Queue Threshold" line.byte 0x1 "NQTHCTL_BY_LH,Normal Queue Threshold Control Register" hexmask.byte 0x1 0.--7. 1. "RSPQTH,Normal Response Queue Threshold" group.word 0x192++0x1 line.word 0x0 "NQTHCTL_HA_H,Normal Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "IBIQTH,Normal IBI Queue Threshold" hexmask.word.byte 0x0 0.--7. 1. "IBIDSSZ,Normal IBI Data Segment Size" group.byte 0x192++0x1 line.byte 0x0 "NQTHCTL_BY_HL,Normal Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "IBIDSSZ,Normal IBI Data Segment Size" line.byte 0x1 "NQTHCTL_BY_HH,Normal Queue Threshold Control Register" hexmask.byte 0x1 0.--7. 1. "IBIQTH,Normal IBI Queue Threshold" group.long 0x194++0x3 line.long 0x0 "NTBTHCTL0,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 24.--26. "RXSTTH,Normal Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 16.--18. "TXSTTH,Normal Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 8.--10. "RXDBTH,Normal Rx Data Buffer Threshold" "0: Interrupt triggers at 2 Rx Buffer entries DWORDs,1: Interrupt triggers at 4 Rx Buffer entries DWORDs,2: Interrupt triggers at 8 Rx Buffer entries DWORDs,3: Interrupt triggers at 16 Rx Buffer entries DWORDs,4: Interrupt triggers at 32 Rx Buffer entries DWORDs,5: Interrupt triggers at 64 Rx Buffer entries DWORDs,6: Interrupt triggers at 128 Rx Buffer entries..,7: Interrupt triggers at 256 Rx Buffer entries DWORDs" newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "TXDBTH,Normal Tx Data Buffer Threshold" "0: Interrupt triggers at 2 Tx Buffer entries DWORDs,1: Interrupt triggers at 4 Tx Buffer entries DWORDs,2: Interrupt triggers at 8 Tx Buffer entries DWORDs,3: Interrupt triggers at 16 Tx Buffer entries DWORDs,4: Interrupt triggers at 32 Tx Buffer entries DWORDs,5: Interrupt triggers at 64 Tx Buffer entries DWORDs,6: Interrupt triggers at 128 Tx Buffer entries..,7: Interrupt triggers at 256 Tx Buffer entries DWORDs" group.word 0x194++0x1 line.word 0x0 "NTBTHCTL0_HA_L,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXDBTH,Normal Rx Data Buffer Threshold" "0: Interrupt triggers at 2 Rx Buffer entries DWORDs,1: Interrupt triggers at 4 Rx Buffer entries DWORDs,2: Interrupt triggers at 8 Rx Buffer entries DWORDs,3: Interrupt triggers at 16 Rx Buffer entries DWORDs,4: Interrupt triggers at 32 Rx Buffer entries DWORDs,5: Interrupt triggers at 64 Rx Buffer entries DWORDs,6: Interrupt triggers at 128 Rx Buffer entries..,7: Interrupt triggers at 256 Rx Buffer entries DWORDs" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXDBTH,Normal Tx Data Buffer Threshold" "0: Interrupt triggers at 2 Tx Buffer entries DWORDs,1: Interrupt triggers at 4 Tx Buffer entries DWORDs,2: Interrupt triggers at 8 Tx Buffer entries DWORDs,3: Interrupt triggers at 16 Tx Buffer entries DWORDs,4: Interrupt triggers at 32 Tx Buffer entries DWORDs,5: Interrupt triggers at 64 Tx Buffer entries DWORDs,6: Interrupt triggers at 128 Tx Buffer entries..,7: Interrupt triggers at 256 Tx Buffer entries DWORDs" group.byte 0x194++0x1 line.byte 0x0 "NTBTHCTL0_BY_LL,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXDBTH,Normal Tx Data Buffer Threshold" "0: Interrupt triggers at 2 Tx Buffer entries DWORDs,1: Interrupt triggers at 4 Tx Buffer entries DWORDs,2: Interrupt triggers at 8 Tx Buffer entries DWORDs,3: Interrupt triggers at 16 Tx Buffer entries DWORDs,4: Interrupt triggers at 32 Tx Buffer entries DWORDs,5: Interrupt triggers at 64 Tx Buffer entries DWORDs,6: Interrupt triggers at 128 Tx Buffer entries..,7: Interrupt triggers at 256 Tx Buffer entries DWORDs" line.byte 0x1 "NTBTHCTL0_BY_LH,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXDBTH,Normal Rx Data Buffer Threshold" "0: Interrupt triggers at 2 Rx Buffer entries DWORDs,1: Interrupt triggers at 4 Rx Buffer entries DWORDs,2: Interrupt triggers at 8 Rx Buffer entries DWORDs,3: Interrupt triggers at 16 Rx Buffer entries DWORDs,4: Interrupt triggers at 32 Rx Buffer entries DWORDs,5: Interrupt triggers at 64 Rx Buffer entries DWORDs,6: Interrupt triggers at 128 Rx Buffer entries..,7: Interrupt triggers at 256 Rx Buffer entries DWORDs" group.word 0x196++0x1 line.word 0x0 "NTBTHCTL0_HA_H,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXSTTH,Normal Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXSTTH,Normal Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" group.byte 0x196++0x1 line.byte 0x0 "NTBTHCTL0_BY_HL,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXSTTH,Normal Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" line.byte 0x1 "NTBTHCTL0_BY_HH,Normal Transfer Data Buffer Threshold Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXSTTH,Normal Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" group.long 0x1C0++0x3 line.long 0x0 "NRQTHCTL,Normal Receive Status Queue Threshold Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RSQTH,Normal Receive Status Queue Threshold" group.word 0x1C0++0x1 line.word 0x0 "NRQTHCTL_HA_L,Normal Receive Status Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "RSQTH,Normal Receive Status Queue Threshold" group.byte 0x1C0++0x0 line.byte 0x0 "NRQTHCTL_BY_LL,Normal Receive Status Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "RSQTH,Normal Receive Status Queue Threshold" group.long 0x1C4++0x3 line.long 0x0 "HQTHCTL,High Priority Queue Threshold Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RSPQTH,High Priority Response Queue Threshold" newline hexmask.long.byte 0x0 0.--7. 1. "CMDQTH,High Priority Command Queue Threshold" group.word 0x1C4++0x1 line.word 0x0 "HQTHCTL_HA_L,High Priority Queue Threshold Control Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQTH,High Priority Response Queue Threshold" hexmask.word.byte 0x0 0.--7. 1. "CMDQTH,High Priority Command Queue Threshold" group.byte 0x1C4++0x1 line.byte 0x0 "HQTHCTL_BY_LL,High Priority Queue Threshold Control Register" hexmask.byte 0x0 0.--7. 1. "CMDQTH,High Priority Command Queue Threshold" line.byte 0x1 "HQTHCTL_BY_LH,High Priority Queue Threshold Control Register" hexmask.byte 0x1 0.--7. 1. "RSPQTH,High Priority Response Queue Threshold" group.long 0x1C8++0x3 line.long 0x0 "HTBTHCTL,High Priority Transfer Data Buffer Threshold Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 24.--26. "RXSTTH,High Priority Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 16.--18. "TXSTTH,High Priority Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" newline hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 8.--10. "RXDBTH,High Priority Rx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Rx Buffer..,1: Interrupt triggers at 4 High Priority Rx Buffer..,2: Interrupt triggers at 8 High Priority Rx Buffer..,3: Interrupt triggers at 16 High Priority Rx Buffer..,4: Interrupt triggers at 32 High Priority Rx Buffer..,5: Interrupt triggers at 64 High Priority Rx Buffer..,6: Interrupt triggers at 128 High Priority Rx..,7: Interrupt triggers at 256 High Priority Rx.." newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 0.--2. "TXDBTH,High Priority Tx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Tx Buffer..,1: Interrupt triggers at 4 High Priority Tx Buffer..,2: Interrupt triggers at 8 High Priority Tx Buffer..,3: Interrupt triggers at 16 High Priority Tx Buffer..,4: Interrupt triggers at 32 High Priority Tx Buffer..,5: Interrupt triggers at 64 High Priority Tx Buffer..,6: Interrupt triggers at 128 High Priority Tx..,7: Interrupt triggers at 256 High Priority Tx.." group.word 0x1C8++0x1 line.word 0x0 "HTBTHCTL_HA_L,High Priority Transfer Data Buffer Threshold Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXDBTH,High Priority Rx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Rx Buffer..,1: Interrupt triggers at 4 High Priority Rx Buffer..,2: Interrupt triggers at 8 High Priority Rx Buffer..,3: Interrupt triggers at 16 High Priority Rx Buffer..,4: Interrupt triggers at 32 High Priority Rx Buffer..,5: Interrupt triggers at 64 High Priority Rx Buffer..,6: Interrupt triggers at 128 High Priority Rx..,7: Interrupt triggers at 256 High Priority Rx.." newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXDBTH,High Priority Tx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Tx Buffer..,1: Interrupt triggers at 4 High Priority Tx Buffer..,2: Interrupt triggers at 8 High Priority Tx Buffer..,3: Interrupt triggers at 16 High Priority Tx Buffer..,4: Interrupt triggers at 32 High Priority Tx Buffer..,5: Interrupt triggers at 64 High Priority Tx Buffer..,6: Interrupt triggers at 128 High Priority Tx..,7: Interrupt triggers at 256 High Priority Tx.." group.byte 0x1C8++0x1 line.byte 0x0 "HTBTHCTL_BY_LL,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXDBTH,High Priority Tx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Tx Buffer..,1: Interrupt triggers at 4 High Priority Tx Buffer..,2: Interrupt triggers at 8 High Priority Tx Buffer..,3: Interrupt triggers at 16 High Priority Tx Buffer..,4: Interrupt triggers at 32 High Priority Tx Buffer..,5: Interrupt triggers at 64 High Priority Tx Buffer..,6: Interrupt triggers at 128 High Priority Tx..,7: Interrupt triggers at 256 High Priority Tx.." line.byte 0x1 "HTBTHCTL_BY_LH,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXDBTH,High Priority Rx Data Buffer Threshold" "0: Interrupt triggers at 2 High Priority Rx Buffer..,1: Interrupt triggers at 4 High Priority Rx Buffer..,2: Interrupt triggers at 8 High Priority Rx Buffer..,3: Interrupt triggers at 16 High Priority Rx Buffer..,4: Interrupt triggers at 32 High Priority Rx Buffer..,5: Interrupt triggers at 64 High Priority Rx Buffer..,6: Interrupt triggers at 128 High Priority Rx..,7: Interrupt triggers at 256 High Priority Rx.." group.word 0x1CA++0x1 line.word 0x0 "HTBTHCTL_HA_H,High Priority Transfer Data Buffer Threshold Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 8.--10. "RXSTTH,High Priority Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 0.--2. "TXSTTH,High Priority Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" group.byte 0x1CA++0x1 line.byte 0x0 "HTBTHCTL_BY_HL,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "TXSTTH,High Priority Tx Start Threshold" "0: Wait for 2 entry DWORDs,1: Wait for 4 entry DWORDs,2: Wait for 8 entry DWORDs,3: Wait for 16 entry DWORDs,4: Wait for 32 entry DWORDs,5: Wait for 64 entry DWORDs,6: Wait for 128 entry DWORDs,7: Wait for 256 entry DWORDs" line.byte 0x1 "HTBTHCTL_BY_HH,High Priority Transfer Data Buffer Threshold Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "RXSTTH,High Priority Rx Start Threshold" "0: Wait for 2 empty DWORDs,1: Wait for 4 empty DWORDs,2: Wait for 8 empty DWORDs,3: Wait for 16 empty DWORDs,4: Wait for 32 empty DWORDs,5: Wait for 64 empty DWORDs,6: Wait for 128 empty DWORDs,7: Wait for 256 empty DWORDs" group.long 0x1D0++0x3 line.long 0x0 "BST,Bus Status Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDF,Wake-Up Condition Detection Flag" "0: Wake-Up Condition is not detected,1: Wake-Up Condition is detected" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALF,Arbitration Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "TENDF,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDF,HDR Exit Pattern Detection Flag" "0: HDR Exit Pattern is not detected,1: HDR Exit Pattern is detected" newline bitfld.long 0x0 1. "SPCNDDF,STOP Condition Detection Flag" "0: STOP condition is not detected,1: STOP condition is detected" bitfld.long 0x0 0. "STCNDDF,START Condition Detection Flag" "0: START condition is not detected,1: START condition is detected" group.word 0x1D0++0x1 line.word 0x0 "BST_HA_L,Bus Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "TENDF,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDF,HDR Exit Pattern Detection Flag" "0: HDR Exit Pattern is not detected,1: HDR Exit Pattern is detected" newline bitfld.word 0x0 1. "SPCNDDF,STOP Condition Detection Flag" "0: STOP condition is not detected,1: STOP condition is detected" bitfld.word 0x0 0. "STCNDDF,START Condition Detection Flag" "0: START condition is not detected,1: START condition is detected" group.byte 0x1D0++0x1 line.byte 0x0 "BST_BY_LL,Bus Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDF,NACK Detection Flag" "0: NACK is not detected,1: NACK is detected" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDF,HDR Exit Pattern Detection Flag" "0: HDR Exit Pattern is not detected,1: HDR Exit Pattern is detected" newline bitfld.byte 0x0 1. "SPCNDDF,STOP Condition Detection Flag" "0: STOP condition is not detected,1: STOP condition is detected" bitfld.byte 0x0 0. "STCNDDF,START Condition Detection Flag" "0: START condition is not detected,1: START condition is detected" line.byte 0x1 "BST_BY_LH,Bus Status Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "TENDF,Transmit End Flag" "0: Data is being transmitted,1: Data has been transmitted" group.word 0x1D2++0x1 line.word 0x0 "BST_HA_H,Bus Status Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDF,Wake-Up Condition Detection Flag" "0: Wake-Up Condition is not detected,1: Wake-Up Condition is detected" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALF,Arbitration Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" group.byte 0x1D2++0x1 line.byte 0x0 "BST_BY_HL,Bus Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODF,Timeout Detection Flag" "0: Timeout is not detected,1: Timeout is detected" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALF,Arbitration Lost Flag" "0: Arbitration is not lost,1: Arbitration is lost" line.byte 0x1 "BST_BY_HH,Bus Status Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDF,Wake-Up Condition Detection Flag" "0: Wake-Up Condition is not detected,1: Wake-Up Condition is detected" group.long 0x1D4++0x3 line.long 0x0 "BSTE,Bus Status Enable Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDE,Wake-up Condition Detection Enable" "0: Disables Wake-up Condition Detection Status..,1: Enables Wake-up Condition Detection Status logging" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODE,Timeout Detection Enable" "0: Disables Timeout Detection Interrupt Status..,1: Enables Timeout Detection Interrupt Status.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALE,Arbitration Lost Enable" "0: Disables Arbitration Lost Interrupt Status..,1: Enables Arbitration Lost Interrupt Status logging." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "TENDE,Transmit End Enable" "0: Disables Transmit End Interrupt Status logging,1: Enables Transmit End Interrupt Status logging" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDE,NACK Detection Enable" "0: Disables NACK Detection Interrupt Status logging.,1: Enables NACK Detection Interrupt Status logging." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDE,HDR Exit Pattern Detection Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.long 0x0 1. "SPCNDDE,STOP Condition Detection Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt.." bitfld.long 0x0 0. "STCNDDE,START Condition Detection Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.word 0x1D4++0x1 line.word 0x0 "BSTE_HA_L,Bus Status Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "TENDE,Transmit End Enable" "0: Disables Transmit End Interrupt Status logging,1: Enables Transmit End Interrupt Status logging" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDE,NACK Detection Enable" "0: Disables NACK Detection Interrupt Status logging.,1: Enables NACK Detection Interrupt Status logging." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDE,HDR Exit Pattern Detection Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.word 0x0 1. "SPCNDDE,STOP Condition Detection Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt.." bitfld.word 0x0 0. "STCNDDE,START Condition Detection Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.byte 0x1D4++0x1 line.byte 0x0 "BSTE_BY_LL,Bus Status Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDE,NACK Detection Enable" "0: Disables NACK Detection Interrupt Status logging.,1: Enables NACK Detection Interrupt Status logging." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDE,HDR Exit Pattern Detection Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.byte 0x0 1. "SPCNDDE,STOP Condition Detection Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt.." bitfld.byte 0x0 0. "STCNDDE,START Condition Detection Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." line.byte 0x1 "BSTE_BY_LH,Bus Status Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "TENDE,Transmit End Enable" "0: Disables Transmit End Interrupt Status logging,1: Enables Transmit End Interrupt Status logging" group.word 0x1D6++0x1 line.word 0x0 "BSTE_HA_H,Bus Status Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDE,Wake-up Condition Detection Enable" "0: Disables Wake-up Condition Detection Status..,1: Enables Wake-up Condition Detection Status logging" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODE,Timeout Detection Enable" "0: Disables Timeout Detection Interrupt Status..,1: Enables Timeout Detection Interrupt Status.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALE,Arbitration Lost Enable" "0: Disables Arbitration Lost Interrupt Status..,1: Enables Arbitration Lost Interrupt Status logging." group.byte 0x1D6++0x1 line.byte 0x0 "BSTE_BY_HL,Bus Status Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODE,Timeout Detection Enable" "0: Disables Timeout Detection Interrupt Status..,1: Enables Timeout Detection Interrupt Status.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALE,Arbitration Lost Enable" "0: Disables Arbitration Lost Interrupt Status..,1: Enables Arbitration Lost Interrupt Status logging." line.byte 0x1 "BSTE_BY_HH,Bus Status Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDE,Wake-up Condition Detection Enable" "0: Disables Wake-up Condition Detection Status..,1: Enables Wake-up Condition Detection Status logging" group.long 0x1D8++0x3 line.long 0x0 "BIE,Bus Interrupt Enable Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDIE,Wake-Up Condition Detection Interrupt Enable" "0: Disables Wake-Up Condition Detection Interrupt..,1: Enables Wake-Up Condition Detection Interrupt.." newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODIE,Timeout Detection Interrupt Enable" "0: Disables Timeout Detection Interrupt Signal.,1: Enables Timeout Detection Interrupt Signal." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALIE,Arbitration Lost Interrupt Enable" "0: Disables Arbitration Lost Interrupt Signal.,1: Enables Arbitration Lost Interrupt Signal." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 8. "TENDIE,Transmit End Interrupt Enable" "0: Disables Transmit End Interrupt Signal.,1: Enables Transmit End Interrupt Signal." newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDIE,NACK Detection Interrupt Enable" "0: Disables NACK Detection Interrupt Signal.,1: Enables NACK Detection Interrupt Signal." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDIE,HDR Exit Pattern Detection Interrupt Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.long 0x0 1. "SPCNDDIE,STOP Condition Detection Interrupt Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt Signal." bitfld.long 0x0 0. "STCNDDIE,START Condition Detection Interrupt Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.word 0x1D8++0x1 line.word 0x0 "BIE_HA_L,Bus Interrupt Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "TENDIE,Transmit End Interrupt Enable" "0: Disables Transmit End Interrupt Signal.,1: Enables Transmit End Interrupt Signal." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDIE,NACK Detection Interrupt Enable" "0: Disables NACK Detection Interrupt Signal.,1: Enables NACK Detection Interrupt Signal." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDIE,HDR Exit Pattern Detection Interrupt Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.word 0x0 1. "SPCNDDIE,STOP Condition Detection Interrupt Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt Signal." bitfld.word 0x0 0. "STCNDDIE,START Condition Detection Interrupt Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." group.byte 0x1D8++0x1 line.byte 0x0 "BIE_BY_LL,Bus Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDIE,NACK Detection Interrupt Enable" "0: Disables NACK Detection Interrupt Signal.,1: Enables NACK Detection Interrupt Signal." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDIE,HDR Exit Pattern Detection Interrupt Enable" "0: Disables HDR Exit Pattern Detection Interrupt..,1: Enables HDR Exit Pattern Detection Interrupt.." newline bitfld.byte 0x0 1. "SPCNDDIE,STOP Condition Detection Interrupt Enable" "0: Disables STOP Condition Detection Interrupt..,1: Enables STOP Condition Detection Interrupt Signal." bitfld.byte 0x0 0. "STCNDDIE,START Condition Detection Interrupt Enable" "0: Disables START Condition Detection Interrupt..,1: Enables START Condition Detection Interrupt.." line.byte 0x1 "BIE_BY_LH,Bus Interrupt Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "TENDIE,Transmit End Interrupt Enable" "0: Disables Transmit End Interrupt Signal.,1: Enables Transmit End Interrupt Signal." group.word 0x1DA++0x1 line.word 0x0 "BIE_HA_H,Bus Interrupt Enable Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDIE,Wake-Up Condition Detection Interrupt Enable" "0: Disables Wake-Up Condition Detection Interrupt..,1: Enables Wake-Up Condition Detection Interrupt.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODIE,Timeout Detection Interrupt Enable" "0: Disables Timeout Detection Interrupt Signal.,1: Enables Timeout Detection Interrupt Signal." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALIE,Arbitration Lost Interrupt Enable" "0: Disables Arbitration Lost Interrupt Signal.,1: Enables Arbitration Lost Interrupt Signal." group.byte 0x1DA++0x1 line.byte 0x0 "BIE_BY_HL,Bus Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODIE,Timeout Detection Interrupt Enable" "0: Disables Timeout Detection Interrupt Signal.,1: Enables Timeout Detection Interrupt Signal." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALIE,Arbitration Lost Interrupt Enable" "0: Disables Arbitration Lost Interrupt Signal.,1: Enables Arbitration Lost Interrupt Signal." line.byte 0x1 "BIE_BY_HH,Bus Interrupt Enable Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDIE,Wake-Up Condition Detection Interrupt Enable" "0: Disables Wake-Up Condition Detection Interrupt..,1: Enables Wake-Up Condition Detection Interrupt.." wgroup.long 0x1DC++0x3 line.long 0x0 "BSTFC,Bus Status Force Register" hexmask.long.byte 0x0 25.--31. 1. "Reserved,The write value should be 0000000." bitfld.long 0x0 24. "WUCNDDFC,Wake-Up Condition Detection Force" "0: not Force Wake-Up Condition Detection Interrupt..,1: Force Wake-Up Condition Detection Interrupt for.." newline bitfld.long 0x0 21.--23. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "TODFC,Timeout Detection Force" "0: not Force Timeout Detection Interrupt for..,1: Force Timeout Detection Interrupt for software.." newline bitfld.long 0x0 17.--19. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "ALFC,Arbitration Lost Force" "0: not Force Arbitration Lost Interrupt for..,1: Force Arbitration Lost Interrupt for software.." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,The write value should be 0000000." bitfld.long 0x0 8. "TENDFC,Transmit End Force" "0: not Force Transmit End Interrupt for software..,1: Force Transmit End Interrupt for software testing." newline bitfld.long 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "NACKDFC,NACK Detection Force" "0: not Force NACK Detection Interrupt for software..,1: Force NACK Detection Interrupt for software.." newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "HDREXDFC,HDR Exit Pattern Detection Force" "0: not Force HDR Exit Pattern Detection Interrupt..,1: Force HDR Exit Pattern Detection Interrupt for.." newline bitfld.long 0x0 1. "SPCNDDFC,STOP Condition Detection Force" "0: not Force STOP Condition Detection Interrupt for..,1: Force STOP Condition Detection Interrupt for.." bitfld.long 0x0 0. "STCNDDFC,START Condition Detection Force" "0: not Force START Condition Detection Interrupt..,1: Force START Condition Detection Interrupt for.." wgroup.word 0x1DC++0x1 line.word 0x0 "BSTFC_HA_L,Bus Status Force Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,The write value should be 0000000." bitfld.word 0x0 8. "TENDFC,Transmit End Force" "0: not Force Transmit End Interrupt for software..,1: Force Transmit End Interrupt for software testing." newline bitfld.word 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "NACKDFC,NACK Detection Force" "0: not Force NACK Detection Interrupt for software..,1: Force NACK Detection Interrupt for software.." newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "HDREXDFC,HDR Exit Pattern Detection Force" "0: not Force HDR Exit Pattern Detection Interrupt..,1: Force HDR Exit Pattern Detection Interrupt for.." newline bitfld.word 0x0 1. "SPCNDDFC,STOP Condition Detection Force" "0: not Force STOP Condition Detection Interrupt for..,1: Force STOP Condition Detection Interrupt for.." bitfld.word 0x0 0. "STCNDDFC,START Condition Detection Force" "0: not Force START Condition Detection Interrupt..,1: Force START Condition Detection Interrupt for.." wgroup.byte 0x1DC++0x1 line.byte 0x0 "BSTFC_BY_LL,Bus Status Force Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "NACKDFC,NACK Detection Force" "0: not Force NACK Detection Interrupt for software..,1: Force NACK Detection Interrupt for software.." newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "HDREXDFC,HDR Exit Pattern Detection Force" "0: not Force HDR Exit Pattern Detection Interrupt..,1: Force HDR Exit Pattern Detection Interrupt for.." newline bitfld.byte 0x0 1. "SPCNDDFC,STOP Condition Detection Force" "0: not Force STOP Condition Detection Interrupt for..,1: Force STOP Condition Detection Interrupt for.." bitfld.byte 0x0 0. "STCNDDFC,START Condition Detection Force" "0: not Force START Condition Detection Interrupt..,1: Force START Condition Detection Interrupt for.." line.byte 0x1 "BSTFC_BY_LH,Bus Status Force Register" hexmask.byte 0x1 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x1 0. "TENDFC,Transmit End Force" "0: not Force Transmit End Interrupt for software..,1: Force Transmit End Interrupt for software testing." wgroup.word 0x1DE++0x1 line.word 0x0 "BSTFC_HA_H,Bus Status Force Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,The write value should be 0000000." bitfld.word 0x0 8. "WUCNDDFC,Wake-Up Condition Detection Force" "0: not Force Wake-Up Condition Detection Interrupt..,1: Force Wake-Up Condition Detection Interrupt for.." newline bitfld.word 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TODFC,Timeout Detection Force" "0: not Force Timeout Detection Interrupt for..,1: Force Timeout Detection Interrupt for software.." newline bitfld.word 0x0 1.--3. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "ALFC,Arbitration Lost Force" "0: not Force Arbitration Lost Interrupt for..,1: Force Arbitration Lost Interrupt for software.." wgroup.byte 0x1DE++0x1 line.byte 0x0 "BSTFC_BY_HL,Bus Status Force Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TODFC,Timeout Detection Force" "0: not Force Timeout Detection Interrupt for..,1: Force Timeout Detection Interrupt for software.." newline bitfld.byte 0x0 1.--3. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "ALFC,Arbitration Lost Force" "0: not Force Arbitration Lost Interrupt for..,1: Force Arbitration Lost Interrupt for software.." line.byte 0x1 "BSTFC_BY_HH,Bus Status Force Register" hexmask.byte 0x1 1.--7. 1. "Reserved,The write value should be 0000000." bitfld.byte 0x1 0. "WUCNDDFC,Wake-Up Condition Detection Force" "0: not Force Wake-Up Condition Detection Interrupt..,1: Force Wake-Up Condition Detection Interrupt for.." group.long 0x1E0++0x3 line.long 0x0 "NTST,Normal Transfer Status Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "RSQFF,Normal Receive Status Queue Full Flag" "0: The number of Receive Status Queue entries is <=..,1: The number of Receive Status Queue entries is >.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 9. "TEF,Normal Transfer Error Flag" "0: Transfer Error does not occur.,1: Transfer Error occurs." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTF,Normal Transfer Abort Flag" "0: Transfer Abort does not occur.,1: Transfer Abort occur." newline bitfld.long 0x0 4. "RSPQFF,Normal Response Queue Full Flag" "0: The number of Response Queue entries is <= the..,1: The number of Response Queue entries is > the.." bitfld.long 0x0 3. "CMDQEF,Normal Command Queue Empty Flag" "0: The number of Command Queue empties is < the..,1: The number of Command Queue empties is >= the.." newline bitfld.long 0x0 2. "IBIQEFF,Normal IBI Queue Empty/Full Flag" "0: The number of IBI Data Buffer empties is < the..,1: The number of IBI Data Buffer empties is >= the.." bitfld.long 0x0 1. "RDBFF0,Normal Rx Data Buffer Full Flag 0" "0: The number of entries in the Normal Rx Data..,1: The number of entries in the Normal Rx Data.." newline bitfld.long 0x0 0. "TDBEF0,Normal Tx Data Buffer Empty Flag 0" "0: The number of empties in the Normal Tx Data..,1: The number of empties in the Normal Tx Data.." group.word 0x1E0++0x1 line.word 0x0 "NTST_HA_L,Normal Transfer Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEF,Normal Transfer Error Flag" "0: Transfer Error does not occur.,1: Transfer Error occurs." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTF,Normal Transfer Abort Flag" "0: Transfer Abort does not occur.,1: Transfer Abort occur." newline bitfld.word 0x0 4. "RSPQFF,Normal Response Queue Full Flag" "0: The number of Response Queue entries is <= the..,1: The number of Response Queue entries is > the.." bitfld.word 0x0 3. "CMDQEF,Normal Command Queue Empty Flag" "0: The number of Command Queue empties is < the..,1: The number of Command Queue empties is >= the.." newline bitfld.word 0x0 2. "IBIQEFF,Normal IBI Queue Empty/Full Flag" "0: The number of IBI Data Buffer empties is < the..,1: The number of IBI Data Buffer empties is >= the.." bitfld.word 0x0 1. "RDBFF0,Normal Rx Data Buffer Full Flag 0" "0: The number of entries in the Normal Rx Data..,1: The number of entries in the Normal Rx Data.." newline bitfld.word 0x0 0. "TDBEF0,Normal Tx Data Buffer Empty Flag 0" "0: The number of empties in the Normal Tx Data..,1: The number of empties in the Normal Tx Data.." group.byte 0x1E0++0x1 line.byte 0x0 "NTST_BY_LL,Normal Transfer Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTF,Normal Transfer Abort Flag" "0: Transfer Abort does not occur.,1: Transfer Abort occur." newline bitfld.byte 0x0 4. "RSPQFF,Normal Response Queue Full Flag" "0: The number of Response Queue entries is <= the..,1: The number of Response Queue entries is > the.." bitfld.byte 0x0 3. "CMDQEF,Normal Command Queue Empty Flag" "0: The number of Command Queue empties is < the..,1: The number of Command Queue empties is >= the.." newline bitfld.byte 0x0 2. "IBIQEFF,Normal IBI Queue Empty/Full Flag" "0: The number of IBI Data Buffer empties is < the..,1: The number of IBI Data Buffer empties is >= the.." bitfld.byte 0x0 1. "RDBFF0,Normal Rx Data Buffer Full Flag 0" "0: The number of entries in the Normal Rx Data..,1: The number of entries in the Normal Rx Data.." newline bitfld.byte 0x0 0. "TDBEF0,Normal Tx Data Buffer Empty Flag 0" "0: The number of empties in the Normal Tx Data..,1: The number of empties in the Normal Tx Data.." line.byte 0x1 "NTST_BY_LH,Normal Transfer Status Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEF,Normal Transfer Error Flag" "0: Transfer Error does not occur.,1: Transfer Error occurs." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x1E2++0x1 line.word 0x0 "NTST_HA_H,Normal Transfer Status Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "RSQFF,Normal Receive Status Queue Full Flag" "0: The number of Receive Status Queue entries is <=..,1: The number of Receive Status Queue entries is >.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x1E2++0x0 line.byte 0x0 "NTST_BY_HL,Normal Transfer Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFF,Normal Receive Status Queue Full Flag" "0: The number of Receive Status Queue entries is <=..,1: The number of Receive Status Queue entries is >.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0x1E4++0x3 line.long 0x0 "NTSTE,Normal Transfer Status Enable Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "RSQFE,Normal Receive Status Queue Full Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 9. "TEE,Normal Transfer Error Enable" "0: Disables Transfer Error Interrupt Status logging.,1: Enables Transfer Error Interrupt Status logging." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTE,Normal Transfer Abort Enable" "0: Disables Transfer Abort Interrupt Status logging.,1: Enables Transfer Abort Interrupt Status logging." newline bitfld.long 0x0 4. "RSPQFE,Normal Response Queue Full Enable" "0: Disables Response Buffer Full Interrupt Status..,1: Enables Response Buffer Full Interrupt Status.." bitfld.long 0x0 3. "CMDQEE,Normal Command Queue Empty Enable" "0: Disables Command Buffer Empty Interrupt Status..,1: Enables Command Buffer Empty Interrupt Status.." newline bitfld.long 0x0 2. "IBIQEFE,Normal IBI Queue Empty/Full Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.long 0x0 1. "RDBFE0,Normal Rx Data Buffer Full Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Status..,1: Enables Rx0 Data Buffer Full Interrupt Status.." newline bitfld.long 0x0 0. "TDBEE0,Normal Tx Data Buffer Empty Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Status..,1: Enables Tx0 Data Buffer Empty Interrupt Status.." group.word 0x1E4++0x1 line.word 0x0 "NTSTE_HA_L,Normal Transfer Status Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEE,Normal Transfer Error Enable" "0: Disables Transfer Error Interrupt Status logging.,1: Enables Transfer Error Interrupt Status logging." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTE,Normal Transfer Abort Enable" "0: Disables Transfer Abort Interrupt Status logging.,1: Enables Transfer Abort Interrupt Status logging." newline bitfld.word 0x0 4. "RSPQFE,Normal Response Queue Full Enable" "0: Disables Response Buffer Full Interrupt Status..,1: Enables Response Buffer Full Interrupt Status.." bitfld.word 0x0 3. "CMDQEE,Normal Command Queue Empty Enable" "0: Disables Command Buffer Empty Interrupt Status..,1: Enables Command Buffer Empty Interrupt Status.." newline bitfld.word 0x0 2. "IBIQEFE,Normal IBI Queue Empty/Full Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.word 0x0 1. "RDBFE0,Normal Rx Data Buffer Full Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Status..,1: Enables Rx0 Data Buffer Full Interrupt Status.." newline bitfld.word 0x0 0. "TDBEE0,Normal Tx Data Buffer Empty Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Status..,1: Enables Tx0 Data Buffer Empty Interrupt Status.." group.byte 0x1E4++0x1 line.byte 0x0 "NTSTE_BY_LL,Normal Transfer Status Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTE,Normal Transfer Abort Enable" "0: Disables Transfer Abort Interrupt Status logging.,1: Enables Transfer Abort Interrupt Status logging." newline bitfld.byte 0x0 4. "RSPQFE,Normal Response Queue Full Enable" "0: Disables Response Buffer Full Interrupt Status..,1: Enables Response Buffer Full Interrupt Status.." bitfld.byte 0x0 3. "CMDQEE,Normal Command Queue Empty Enable" "0: Disables Command Buffer Empty Interrupt Status..,1: Enables Command Buffer Empty Interrupt Status.." newline bitfld.byte 0x0 2. "IBIQEFE,Normal IBI Queue Empty/Full Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.byte 0x0 1. "RDBFE0,Normal Rx Data Buffer Full Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Status..,1: Enables Rx0 Data Buffer Full Interrupt Status.." newline bitfld.byte 0x0 0. "TDBEE0,Normal Tx Data Buffer Empty Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Status..,1: Enables Tx0 Data Buffer Empty Interrupt Status.." line.byte 0x1 "NTSTE_BY_LH,Normal Transfer Status Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEE,Normal Transfer Error Enable" "0: Disables Transfer Error Interrupt Status logging.,1: Enables Transfer Error Interrupt Status logging." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x1E6++0x1 line.word 0x0 "NTSTE_HA_H,Normal Transfer Status Enable Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "RSQFE,Normal Receive Status Queue Full Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x1E6++0x0 line.byte 0x0 "NTSTE_BY_HL,Normal Transfer Status Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFE,Normal Receive Status Queue Full Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.long 0x1E8++0x3 line.long 0x0 "NTIE,Normal Transfer Interrupt Enable Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 20. "RSQFIE,Normal Receive Status Queue Full Interrupt Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 9. "TEIE,Normal Transfer Error Interrupt Enable" "0: Disables Transfer Error Interrupt Signal.,1: Enables Transfer Error Interrupt Signal." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTIE,Normal Transfer Abort Interrupt Enable" "0: Disables Transfer Abort Interrupt Signal.,1: Enables Transfer Abort Interrupt Signal." newline bitfld.long 0x0 4. "RSPQFIE,Normal Response Queue Full Interrupt Enable" "0: Disables Response Buffer Full Interrupt Signal.,1: Enables Response Buffer Full Interrupt Signal." bitfld.long 0x0 3. "CMDQEIE,Normal Command Queue Empty Interrupt Enable" "0: Disables Command Buffer Empty Interrupt Signal.,1: Enables Command Buffer Empty Interrupt Signal." newline bitfld.long 0x0 2. "IBIQEFIE,Normal IBI Queue Empty/Full Interrupt Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.long 0x0 1. "RDBFIE0,Normal Rx Data Buffer Full Interrupt Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Signal.,1: Enables Rx0 Data Buffer Full Interrupt Signal." newline bitfld.long 0x0 0. "TDBEIE0,Normal Tx Data Buffer Empty Interrupt Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Signal.,1: Enables Tx0 Data Buffer Empty Interrupt Signal." group.word 0x1E8++0x1 line.word 0x0 "NTIE_HA_L,Normal Transfer Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEIE,Normal Transfer Error Interrupt Enable" "0: Disables Transfer Error Interrupt Signal.,1: Enables Transfer Error Interrupt Signal." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTIE,Normal Transfer Abort Interrupt Enable" "0: Disables Transfer Abort Interrupt Signal.,1: Enables Transfer Abort Interrupt Signal." newline bitfld.word 0x0 4. "RSPQFIE,Normal Response Queue Full Interrupt Enable" "0: Disables Response Buffer Full Interrupt Signal.,1: Enables Response Buffer Full Interrupt Signal." bitfld.word 0x0 3. "CMDQEIE,Normal Command Queue Empty Interrupt Enable" "0: Disables Command Buffer Empty Interrupt Signal.,1: Enables Command Buffer Empty Interrupt Signal." newline bitfld.word 0x0 2. "IBIQEFIE,Normal IBI Queue Empty/Full Interrupt Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.word 0x0 1. "RDBFIE0,Normal Rx Data Buffer Full Interrupt Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Signal.,1: Enables Rx0 Data Buffer Full Interrupt Signal." newline bitfld.word 0x0 0. "TDBEIE0,Normal Tx Data Buffer Empty Interrupt Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Signal.,1: Enables Tx0 Data Buffer Empty Interrupt Signal." group.byte 0x1E8++0x1 line.byte 0x0 "NTIE_BY_LL,Normal Transfer Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTIE,Normal Transfer Abort Interrupt Enable" "0: Disables Transfer Abort Interrupt Signal.,1: Enables Transfer Abort Interrupt Signal." newline bitfld.byte 0x0 4. "RSPQFIE,Normal Response Queue Full Interrupt Enable" "0: Disables Response Buffer Full Interrupt Signal.,1: Enables Response Buffer Full Interrupt Signal." bitfld.byte 0x0 3. "CMDQEIE,Normal Command Queue Empty Interrupt Enable" "0: Disables Command Buffer Empty Interrupt Signal.,1: Enables Command Buffer Empty Interrupt Signal." newline bitfld.byte 0x0 2. "IBIQEFIE,Normal IBI Queue Empty/Full Interrupt Enable" "0: Disables IBI Status Buffer Empty/Full Interrupt..,1: Enables IBI Status Buffer Empty/Full Interrupt.." bitfld.byte 0x0 1. "RDBFIE0,Normal Rx Data Buffer Full Interrupt Enable 0" "0: Disables Rx0 Data Buffer Full Interrupt Signal.,1: Enables Rx0 Data Buffer Full Interrupt Signal." newline bitfld.byte 0x0 0. "TDBEIE0,Normal Tx Data Buffer Empty Interrupt Enable 0" "0: Disables Tx0 Data Buffer Empty Interrupt Signal.,1: Enables Tx0 Data Buffer Empty Interrupt Signal." line.byte 0x1 "NTIE_BY_LH,Normal Transfer Interrupt Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEIE,Normal Transfer Error Interrupt Enable" "0: Disables Transfer Error Interrupt Signal.,1: Enables Transfer Error Interrupt Signal." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.word 0x1EA++0x1 line.word 0x0 "NTIE_HA_H,Normal Transfer Interrupt Enable Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 4. "RSQFIE,Normal Receive Status Queue Full Interrupt Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x1EA++0x0 line.byte 0x0 "NTIE_BY_HL,Normal Transfer Interrupt Enable Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFIE,Normal Receive Status Queue Full Interrupt Enable" "0: Disables Receive Status Buffer Full Interrupt..,1: Enables Receive Status Buffer Full Interrupt.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." wgroup.long 0x1EC++0x3 line.long 0x0 "NTSTFC,Normal Transfer Status Force Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 20. "RSQFFC,Normal Receive Status Queue Full Force" "0: not Force Receive Status Buffer Full Interrupt..,1: Force Receive Status Buffer Full Interrupt for.." newline hexmask.long.word 0x0 10.--19. 1. "Reserved,The write value should be 0000000000." bitfld.long 0x0 9. "TEFC,Normal Transfer Error Force" "0: not Force Transfer Error Interrupt for software..,1: Force Transfer Error Interrupt for software.." newline bitfld.long 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTFC,Normal Transfer Abort Force" "0: not Force Transfer Abort Interrupt for software..,1: Force Transfer Abort Interrupt for software.." newline bitfld.long 0x0 4. "RSPQFFC,Normal Response Queue Full Force" "0: not Force Response Buffer Full Interrupt for..,1: Force Response Buffer Full Interrupt for.." bitfld.long 0x0 3. "CMDQEFC,Normal Command Queue Empty Force" "0: not Force Command Buffer Empty Interrupt for..,1: Force Command Buffer Empty Interrupt for.." newline bitfld.long 0x0 2. "IBIQEFFC,Normal IBI Queue Empty/Full Force" "0: not Force IBI Status Buffer Empty/Full Interrupt..,1: Force IBI Status Buffer Empty/Full Interrupt for.." bitfld.long 0x0 1. "RDBFFC0,Normal Rx Data Buffer Full Force 0" "0: not Force Rx0 Data Buffer Full Interrupt for..,1: Force Rx0 Data Buffer Full Interrupt for.." newline bitfld.long 0x0 0. "TDBEFC0,Normal Tx Data Buffer Empty Force 0" "0: not Force Tx0 Data Buffer Empty Interrupt for..,1: Force Tx0 Data Buffer Empty Interrupt for.." wgroup.word 0x1EC++0x1 line.word 0x0 "NTSTFC_HA_L,Normal Transfer Status Force Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,The write value should be 000000." bitfld.word 0x0 9. "TEFC,Normal Transfer Error Force" "0: not Force Transfer Error Interrupt for software..,1: Force Transfer Error Interrupt for software.." newline bitfld.word 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTFC,Normal Transfer Abort Force" "0: not Force Transfer Abort Interrupt for software..,1: Force Transfer Abort Interrupt for software.." newline bitfld.word 0x0 4. "RSPQFFC,Normal Response Queue Full Force" "0: not Force Response Buffer Full Interrupt for..,1: Force Response Buffer Full Interrupt for.." bitfld.word 0x0 3. "CMDQEFC,Normal Command Queue Empty Force" "0: not Force Command Buffer Empty Interrupt for..,1: Force Command Buffer Empty Interrupt for.." newline bitfld.word 0x0 2. "IBIQEFFC,Normal IBI Queue Empty/Full Force" "0: not Force IBI Status Buffer Empty/Full Interrupt..,1: Force IBI Status Buffer Empty/Full Interrupt for.." bitfld.word 0x0 1. "RDBFFC0,Normal Rx Data Buffer Full Force 0" "0: not Force Rx0 Data Buffer Full Interrupt for..,1: Force Rx0 Data Buffer Full Interrupt for.." newline bitfld.word 0x0 0. "TDBEFC0,Normal Tx Data Buffer Empty Force 0" "0: not Force Tx0 Data Buffer Empty Interrupt for..,1: Force Tx0 Data Buffer Empty Interrupt for.." wgroup.byte 0x1EC++0x1 line.byte 0x0 "NTSTFC_BY_LL,Normal Transfer Status Force Register" bitfld.byte 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTFC,Normal Transfer Abort Force" "0: not Force Transfer Abort Interrupt for software..,1: Force Transfer Abort Interrupt for software.." newline bitfld.byte 0x0 4. "RSPQFFC,Normal Response Queue Full Force" "0: not Force Response Buffer Full Interrupt for..,1: Force Response Buffer Full Interrupt for.." bitfld.byte 0x0 3. "CMDQEFC,Normal Command Queue Empty Force" "0: not Force Command Buffer Empty Interrupt for..,1: Force Command Buffer Empty Interrupt for.." newline bitfld.byte 0x0 2. "IBIQEFFC,Normal IBI Queue Empty/Full Force" "0: not Force IBI Status Buffer Empty/Full Interrupt..,1: Force IBI Status Buffer Empty/Full Interrupt for.." bitfld.byte 0x0 1. "RDBFFC0,Normal Rx Data Buffer Full Force 0" "0: not Force Rx0 Data Buffer Full Interrupt for..,1: Force Rx0 Data Buffer Full Interrupt for.." newline bitfld.byte 0x0 0. "TDBEFC0,Normal Tx Data Buffer Empty Force 0" "0: not Force Tx0 Data Buffer Empty Interrupt for..,1: Force Tx0 Data Buffer Empty Interrupt for.." line.byte 0x1 "NTSTFC_BY_LH,Normal Transfer Status Force Register" hexmask.byte 0x1 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x1 1. "TEFC,Normal Transfer Error Force" "0: not Force Transfer Error Interrupt for software..,1: Force Transfer Error Interrupt for software.." newline bitfld.byte 0x1 0. "Reserved,The write value should be 0." "0,1" wgroup.word 0x1EE++0x1 line.word 0x0 "NTSTFC_HA_H,Normal Transfer Status Force Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "RSQFFC,Normal Receive Status Queue Full Force" "0: not Force Receive Status Buffer Full Interrupt..,1: Force Receive Status Buffer Full Interrupt for.." newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x1EE++0x0 line.byte 0x0 "NTSTFC_BY_HL,Normal Transfer Status Force Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "RSQFFC,Normal Receive Status Queue Full Force" "0: not Force Receive Status Buffer Full Interrupt..,1: Force Receive Status Buffer Full Interrupt for.." newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." group.long 0x200++0x3 line.long 0x0 "HTST,High Priority Transfer Status Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEF,High Priority Transfer Error Flag" "0: High Priority Transfer Error does not occur.,1: High Priority Transfer Error occurs." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTF,High Priority Transfer Abort Flag" "0: High Priority Transfer Abort does not occur.,1: High Priority Transfer Abort occurs." newline bitfld.long 0x0 4. "RSPQFF,High Priority Response Queue Full Flag" "0: The number of High Priority Response Queue..,1: The number of High Priority Response Queue.." bitfld.long 0x0 3. "CMDQEF,High Priority Command Queue Empty Flag" "0: The number of High Priority Command Queue..,1: The number of High Priority Command Queue.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFF,High Priority Rx Data Buffer Full Flag" "0: The number of entries in the High Priority Rx..,1: The number of entries in the High Priority Rx.." newline bitfld.long 0x0 0. "TDBEF,High Priority Tx Data Buffer Empty Flag" "0: The number of empties in the High Priority Tx..,1: The number of empties in the High Priority Tx.." group.word 0x200++0x1 line.word 0x0 "HTST_HA_L,High Priority Transfer Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEF,High Priority Transfer Error Flag" "0: High Priority Transfer Error does not occur.,1: High Priority Transfer Error occurs." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTF,High Priority Transfer Abort Flag" "0: High Priority Transfer Abort does not occur.,1: High Priority Transfer Abort occurs." newline bitfld.word 0x0 4. "RSPQFF,High Priority Response Queue Full Flag" "0: The number of High Priority Response Queue..,1: The number of High Priority Response Queue.." bitfld.word 0x0 3. "CMDQEF,High Priority Command Queue Empty Flag" "0: The number of High Priority Command Queue..,1: The number of High Priority Command Queue.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFF,High Priority Rx Data Buffer Full Flag" "0: The number of entries in the High Priority Rx..,1: The number of entries in the High Priority Rx.." newline bitfld.word 0x0 0. "TDBEF,High Priority Tx Data Buffer Empty Flag" "0: The number of empties in the High Priority Tx..,1: The number of empties in the High Priority Tx.." group.byte 0x200++0x1 line.byte 0x0 "HTST_BY_LL,High Priority Transfer Status Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTF,High Priority Transfer Abort Flag" "0: High Priority Transfer Abort does not occur.,1: High Priority Transfer Abort occurs." newline bitfld.byte 0x0 4. "RSPQFF,High Priority Response Queue Full Flag" "0: The number of High Priority Response Queue..,1: The number of High Priority Response Queue.." bitfld.byte 0x0 3. "CMDQEF,High Priority Command Queue Empty Flag" "0: The number of High Priority Command Queue..,1: The number of High Priority Command Queue.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFF,High Priority Rx Data Buffer Full Flag" "0: The number of entries in the High Priority Rx..,1: The number of entries in the High Priority Rx.." newline bitfld.byte 0x0 0. "TDBEF,High Priority Tx Data Buffer Empty Flag" "0: The number of empties in the High Priority Tx..,1: The number of empties in the High Priority Tx.." line.byte 0x1 "HTST_BY_LH,High Priority Transfer Status Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEF,High Priority Transfer Error Flag" "0: High Priority Transfer Error does not occur.,1: High Priority Transfer Error occurs." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x204++0x3 line.long 0x0 "HTSTE,High Priority Transfer Status Enable Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEE,High Priority Transfer Error Enable" "0: Disables High Priority Transfer Error interrupt..,1: Enables High Priority Transfer Error interrupt.." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTE,High Priority Transfer Abort Enable" "0: Disables High PriorityTransfer Abort Interrupt..,1: Enables High Priority Transfer Abort Interrupt.." newline bitfld.long 0x0 4. "RSPQFE,High Priority Response Queue Full Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.long 0x0 3. "CMDQEE,High Priority Command Queue Empty Enable." "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFE,High Priority Rx Data Buffer Full Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.long 0x0 0. "TDBEE,High Priority Tx Data Buffer Empty Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.word 0x204++0x1 line.word 0x0 "HTSTE_HA_L,High Priority Transfer Status Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEE,High Priority Transfer Error Enable" "0: Disables High Priority Transfer Error interrupt..,1: Enables High Priority Transfer Error interrupt.." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTE,High Priority Transfer Abort Enable" "0: Disables High PriorityTransfer Abort Interrupt..,1: Enables High Priority Transfer Abort Interrupt.." newline bitfld.word 0x0 4. "RSPQFE,High Priority Response Queue Full Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.word 0x0 3. "CMDQEE,High Priority Command Queue Empty Enable." "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFE,High Priority Rx Data Buffer Full Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.word 0x0 0. "TDBEE,High Priority Tx Data Buffer Empty Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.byte 0x204++0x1 line.byte 0x0 "HTSTE_BY_LL,High Priority Transfer Status Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTE,High Priority Transfer Abort Enable" "0: Disables High PriorityTransfer Abort Interrupt..,1: Enables High Priority Transfer Abort Interrupt.." newline bitfld.byte 0x0 4. "RSPQFE,High Priority Response Queue Full Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.byte 0x0 3. "CMDQEE,High Priority Command Queue Empty Enable." "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFE,High Priority Rx Data Buffer Full Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.byte 0x0 0. "TDBEE,High Priority Tx Data Buffer Empty Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." line.byte 0x1 "HTSTE_BY_LH,High Priority Transfer Status Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEE,High Priority Transfer Error Enable" "0: Disables High Priority Transfer Error interrupt..,1: Enables High Priority Transfer Error interrupt.." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x208++0x3 line.long 0x0 "HTIE,High Priority Transfer Interrupt Enable Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEIE,High Priority Transfer Error Interrupt Enable" "0: Disables High Priority Transfer Error Interrupt..,1: Enables High Priority Transfer Error Interrupt.." newline bitfld.long 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTIE,High Priority Transfer Abort Interrupt Enable" "0: Disables High Priority Transfer Abort interrupt..,1: Enables High Priority Transfer Abort interrupt.." newline bitfld.long 0x0 4. "RSPQFIE,High Priority Response Queue Full Interrupt Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.long 0x0 3. "CMDQEIE,High Priority Command Queue Empty Interrupt Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFIE,High Priority Rx Data Buffer Full Interrupt Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.long 0x0 0. "TDBEIE,High Priority Tx Data Buffer Empty Interrupt Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.word 0x208++0x1 line.word 0x0 "HTIE_HA_L,High Priority Transfer Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TEIE,High Priority Transfer Error Interrupt Enable" "0: Disables High Priority Transfer Error Interrupt..,1: Enables High Priority Transfer Error Interrupt.." newline bitfld.word 0x0 6.--8. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTIE,High Priority Transfer Abort Interrupt Enable" "0: Disables High Priority Transfer Abort interrupt..,1: Enables High Priority Transfer Abort interrupt.." newline bitfld.word 0x0 4. "RSPQFIE,High Priority Response Queue Full Interrupt Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.word 0x0 3. "CMDQEIE,High Priority Command Queue Empty Interrupt Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFIE,High Priority Rx Data Buffer Full Interrupt Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.word 0x0 0. "TDBEIE,High Priority Tx Data Buffer Empty Interrupt Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." group.byte 0x208++0x1 line.byte 0x0 "HTIE_BY_LL,High Priority Transfer Interrupt Enable Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTIE,High Priority Transfer Abort Interrupt Enable" "0: Disables High Priority Transfer Abort interrupt..,1: Enables High Priority Transfer Abort interrupt.." newline bitfld.byte 0x0 4. "RSPQFIE,High Priority Response Queue Full Interrupt Enable" "0: Disables High Priority Response Buffer Full..,1: Enables High Priority Response Buffer Full.." bitfld.byte 0x0 3. "CMDQEIE,High Priority Command Queue Empty Interrupt Enable" "0: Disables High Priority Command Buffer Empty..,1: Enables High Priority Command Buffer Empty.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFIE,High Priority Rx Data Buffer Full Interrupt Enable" "0: Disables High Priority Rx Data Buffer Full..,1: Enables High Priority Rx Data Buffer Full.." newline bitfld.byte 0x0 0. "TDBEIE,High Priority Tx Data Buffer Empty Interrupt Enable" "0: Disables High Priority Tx Data Buffer Empty..,1: Enables High Priority Tx Data Buffer Empty.." line.byte 0x1 "HTIE_BY_LH,High Priority Transfer Interrupt Enable Register" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 1. "TEIE,High Priority Transfer Error Interrupt Enable" "0: Disables High Priority Transfer Error Interrupt..,1: Enables High Priority Transfer Error Interrupt.." newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" wgroup.long 0x20C++0x3 line.long 0x0 "HTSTFC,High Priority Transfer Status Force Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,The write value should be 0000000000000000000000." bitfld.long 0x0 9. "TEFC,High Priority Transfer Error Force" "0: not Force High Priority Transfer Error Interrupt..,1: Force High Priority Transfer Error Interrupt for.." newline bitfld.long 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "TABTFC,High Priority Transfer Abort Force" "0: not Force High Priority Transfer Abort Interrupt..,1: Force High Priority Transfer Abort Interrupt for.." newline bitfld.long 0x0 4. "RSPQFFC,High Priority Response Queue Full Force" "0: not Force High Priority Response Buffer Full..,1: Force High Priority Response Buffer Full.." bitfld.long 0x0 3. "CMDQEFC,High Priority Command Queue Empty Force" "0: not Force High Priority Command Buffer Empty..,1: Force High Priority Command Buffer Empty.." newline bitfld.long 0x0 2. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 1. "RDBFFC,High Priority Rx Data Buffer Full Force" "0: not Force High Priority Rx Data Buffer Full..,1: Force High Priority Rx Data Buffer Full.." newline bitfld.long 0x0 0. "TDBEFC,High Priority Tx Data Buffer Empty Force" "0: not Force High Priority Tx Data Buffer Empty..,1: Force High Priority Tx Data Buffer Empty.." wgroup.word 0x20C++0x1 line.word 0x0 "HTSTFC_HA_L,High Priority Transfer Status Force Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,The write value should be 000000." bitfld.word 0x0 9. "TEFC,High Priority Transfer Error Force" "0: not Force High Priority Transfer Error Interrupt..,1: Force High Priority Transfer Error Interrupt for.." newline bitfld.word 0x0 6.--8. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 5. "TABTFC,High Priority Transfer Abort Force" "0: not Force High Priority Transfer Abort Interrupt..,1: Force High Priority Transfer Abort Interrupt for.." newline bitfld.word 0x0 4. "RSPQFFC,High Priority Response Queue Full Force" "0: not Force High Priority Response Buffer Full..,1: Force High Priority Response Buffer Full.." bitfld.word 0x0 3. "CMDQEFC,High Priority Command Queue Empty Force" "0: not Force High Priority Command Buffer Empty..,1: Force High Priority Command Buffer Empty.." newline bitfld.word 0x0 2. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 1. "RDBFFC,High Priority Rx Data Buffer Full Force" "0: not Force High Priority Rx Data Buffer Full..,1: Force High Priority Rx Data Buffer Full.." newline bitfld.word 0x0 0. "TDBEFC,High Priority Tx Data Buffer Empty Force" "0: not Force High Priority Tx Data Buffer Empty..,1: Force High Priority Tx Data Buffer Empty.." wgroup.byte 0x20C++0x1 line.byte 0x0 "HTSTFC_BY_LL,High Priority Transfer Status Force Register" bitfld.byte 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TABTFC,High Priority Transfer Abort Force" "0: not Force High Priority Transfer Abort Interrupt..,1: Force High Priority Transfer Abort Interrupt for.." newline bitfld.byte 0x0 4. "RSPQFFC,High Priority Response Queue Full Force" "0: not Force High Priority Response Buffer Full..,1: Force High Priority Response Buffer Full.." bitfld.byte 0x0 3. "CMDQEFC,High Priority Command Queue Empty Force" "0: not Force High Priority Command Buffer Empty..,1: Force High Priority Command Buffer Empty.." newline bitfld.byte 0x0 2. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 1. "RDBFFC,High Priority Rx Data Buffer Full Force" "0: not Force High Priority Rx Data Buffer Full..,1: Force High Priority Rx Data Buffer Full.." newline bitfld.byte 0x0 0. "TDBEFC,High Priority Tx Data Buffer Empty Force" "0: not Force High Priority Tx Data Buffer Empty..,1: Force High Priority Tx Data Buffer Empty.." line.byte 0x1 "HTSTFC_BY_LH,High Priority Transfer Status Force Register" hexmask.byte 0x1 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x1 1. "TEFC,High Priority Transfer Error Force" "0: not Force High Priority Transfer Error Interrupt..,1: Force High Priority Transfer Error Interrupt for.." newline bitfld.byte 0x1 0. "Reserved,The write value should be 0." "0,1" rgroup.long 0x210++0x3 line.long 0x0 "BCST,Bus Condition Status Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000." bitfld.long 0x0 2. "BIDLF,Bus Idle Detection Flag" "0: Have not Detected Bus Idle,1: Have Detected Bus Idle" newline bitfld.long 0x0 1. "BAVLF,Bus Available Detection Flag" "0: Have not Detected Bus Available,1: Have Detected Bus Available" bitfld.long 0x0 0. "BFREF,Bus Free Detection Flag" "0: Have not Detected Bus Free,1: Have Detected Bus Free" rgroup.word 0x210++0x1 line.word 0x0 "BCST_HA_L,Bus Condition Status Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000." bitfld.word 0x0 2. "BIDLF,Bus Idle Detection Flag" "0: Have not Detected Bus Idle,1: Have Detected Bus Idle" newline bitfld.word 0x0 1. "BAVLF,Bus Available Detection Flag" "0: Have not Detected Bus Available,1: Have Detected Bus Available" bitfld.word 0x0 0. "BFREF,Bus Free Detection Flag" "0: Have not Detected Bus Free,1: Have Detected Bus Free" rgroup.byte 0x210++0x0 line.byte 0x0 "BCST_BY_LL,Bus Condition Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "BIDLF,Bus Idle Detection Flag" "0: Have not Detected Bus Idle,1: Have Detected Bus Idle" newline bitfld.byte 0x0 1. "BAVLF,Bus Available Detection Flag" "0: Have not Detected Bus Available,1: Have Detected Bus Available" bitfld.byte 0x0 0. "BFREF,Bus Free Detection Flag" "0: Have not Detected Bus Free,1: Have Detected Bus Free" group.long 0x214++0x3 line.long 0x0 "SVST,Slave Status Register" hexmask.long.word 0x0 19.--31. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.long 0x0 16.--18. "SVAF,Slave Address Detection Flag x (x=2 to 0)" "0: Slave{x} does not detect,1: Slave{x} detect,?,?,?,?,?,?" newline bitfld.long 0x0 15. "HOAF,Host Address Detection Flag" "0: Host address does not detect.,1: Host address detects." hexmask.long.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6. "DVIDF,Device-ID Address Detection Flag" "0: Device-ID command does not detect.,1: Device-ID command detects." bitfld.long 0x0 5. "HSMCF,Hs-mode Master Code Detection Flag" "0: Hs-mode Master Code does not detect.,1: Hs-mode Master Code detects." newline hexmask.long.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 0. "GCAF,General Call Address Detection Flag" "0: General call address does not detect.,1: General call address detects." group.word 0x214++0x1 line.word 0x0 "SVST_HA_L,Slave Status Register" bitfld.word 0x0 15. "HOAF,Host Address Detection Flag" "0: Host address does not detect.,1: Host address detects." hexmask.word.byte 0x0 7.--14. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.word 0x0 6. "DVIDF,Device-ID Address Detection Flag" "0: Device-ID command does not detect.,1: Device-ID command detects." bitfld.word 0x0 5. "HSMCF,Hs-mode Master Code Detection Flag" "0: Hs-mode Master Code does not detect.,1: Hs-mode Master Code detects." newline hexmask.word.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 0. "GCAF,General Call Address Detection Flag" "0: General call address does not detect.,1: General call address detects." group.byte 0x214++0x1 line.byte 0x0 "SVST_BY_LL,Slave Status Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "DVIDF,Device-ID Address Detection Flag" "0: Device-ID command does not detect.,1: Device-ID command detects." newline bitfld.byte 0x0 5. "HSMCF,Hs-mode Master Code Detection Flag" "0: Hs-mode Master Code does not detect.,1: Hs-mode Master Code detects." hexmask.byte 0x0 1.--4. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0. "GCAF,General Call Address Detection Flag" "0: General call address does not detect.,1: General call address detects." line.byte 0x1 "SVST_BY_LH,Slave Status Register" bitfld.byte 0x1 7. "HOAF,Host Address Detection Flag" "0: Host address does not detect.,1: Host address detects." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.word 0x216++0x1 line.word 0x0 "SVST_HA_H,Slave Status Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "SVAF,Slave Address Detection Flag x (x=2 to 0)" "0: Slave{x} does not detect,1: Slave{x} detect,?,?,?,?,?,?" group.byte 0x216++0x0 line.byte 0x0 "SVST_BY_HL,Slave Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "SVAF,Slave Address Detection Flag x (x=2 to 0)" "0: Slave{x} does not detect,1: Slave{x} detect,?,?,?,?,?,?" rgroup.long 0x218++0x3 line.long 0x0 "WUST,Wake Up Unit Operating Status Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." bitfld.long 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "WUASYNF,Wake-Up function Asynchronous operation status Flag" "0: This IP synchronous circuit enable condition,1: This IP asynchronous circuit enable condition" rgroup.word 0x218++0x1 line.word 0x0 "WUST_HA_L,Wake Up Unit Operating Status Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." bitfld.word 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "WUASYNF,Wake-Up function Asynchronous operation status Flag" "0: This IP synchronous circuit enable condition,1: This IP asynchronous circuit enable condition" rgroup.byte 0x218++0x0 line.byte 0x0 "WUST_BY_LL,Wake Up Unit Operating Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "WUASYNF,Wake-Up function Asynchronous operation status Flag" "0: This IP synchronous circuit enable condition,1: This IP asynchronous circuit enable condition" rgroup.long 0x21C++0x3 line.long 0x0 "MRCCPT,MsyncCNT Counter Capture Register" hexmask.long 0x0 0.--31. 1. "MRCCPT,MSyncCNT Counter Capture" group.long 0x224++0x3 line.long 0x0 "DATBAS0,Device Address Table Basic Register 0" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x224++0x1 line.word 0x0 "DATBAS0_HA_L,Device Address Table Basic Register 0" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x224++0x1 line.byte 0x0 "DATBAS0_BY_LL,Device Address Table Basic Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS0_BY_LH,Device Address Table Basic Register 0" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x226++0x1 line.word 0x0 "DATBAS0_HA_H,Device Address Table Basic Register 0" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x226++0x1 line.byte 0x0 "DATBAS0_BY_HL,Device Address Table Basic Register 0" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS0_BY_HH,Device Address Table Basic Register 0" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x22C++0x3 line.long 0x0 "DATBAS1,Device Address Table Basic Register 1" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x22C++0x1 line.word 0x0 "DATBAS1_HA_L,Device Address Table Basic Register 1" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x22C++0x1 line.byte 0x0 "DATBAS1_BY_LL,Device Address Table Basic Register 1" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS1_BY_LH,Device Address Table Basic Register 1" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x22E++0x1 line.word 0x0 "DATBAS1_HA_H,Device Address Table Basic Register 1" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x22E++0x1 line.byte 0x0 "DATBAS1_BY_HL,Device Address Table Basic Register 1" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS1_BY_HH,Device Address Table Basic Register 1" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x234++0x3 line.long 0x0 "DATBAS2,Device Address Table Basic Register 2" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x234++0x1 line.word 0x0 "DATBAS2_HA_L,Device Address Table Basic Register 2" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x234++0x1 line.byte 0x0 "DATBAS2_BY_LL,Device Address Table Basic Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS2_BY_LH,Device Address Table Basic Register 2" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x236++0x1 line.word 0x0 "DATBAS2_HA_H,Device Address Table Basic Register 2" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x236++0x1 line.byte 0x0 "DATBAS2_BY_HL,Device Address Table Basic Register 2" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS2_BY_HH,Device Address Table Basic Register 2" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x23C++0x3 line.long 0x0 "DATBAS3,Device Address Table Basic Register 3" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x23C++0x1 line.word 0x0 "DATBAS3_HA_L,Device Address Table Basic Register 3" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x23C++0x1 line.byte 0x0 "DATBAS3_BY_LL,Device Address Table Basic Register 3" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS3_BY_LH,Device Address Table Basic Register 3" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x23E++0x1 line.word 0x0 "DATBAS3_HA_H,Device Address Table Basic Register 3" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x23E++0x1 line.byte 0x0 "DATBAS3_BY_HL,Device Address Table Basic Register 3" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS3_BY_HH,Device Address Table Basic Register 3" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x244++0x3 line.long 0x0 "DATBAS4,Device Address Table Basic Register 4" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x244++0x1 line.word 0x0 "DATBAS4_HA_L,Device Address Table Basic Register 4" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x244++0x1 line.byte 0x0 "DATBAS4_BY_LL,Device Address Table Basic Register 4" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS4_BY_LH,Device Address Table Basic Register 4" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x246++0x1 line.word 0x0 "DATBAS4_HA_H,Device Address Table Basic Register 4" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x246++0x1 line.byte 0x0 "DATBAS4_BY_HL,Device Address Table Basic Register 4" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS4_BY_HH,Device Address Table Basic Register 4" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x24C++0x3 line.long 0x0 "DATBAS5,Device Address Table Basic Register 5" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x24C++0x1 line.word 0x0 "DATBAS5_HA_L,Device Address Table Basic Register 5" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x24C++0x1 line.byte 0x0 "DATBAS5_BY_LL,Device Address Table Basic Register 5" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS5_BY_LH,Device Address Table Basic Register 5" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x24E++0x1 line.word 0x0 "DATBAS5_HA_H,Device Address Table Basic Register 5" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x24E++0x1 line.byte 0x0 "DATBAS5_BY_HL,Device Address Table Basic Register 5" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS5_BY_HH,Device Address Table Basic Register 5" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x254++0x3 line.long 0x0 "DATBAS6,Device Address Table Basic Register 6" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x254++0x1 line.word 0x0 "DATBAS6_HA_L,Device Address Table Basic Register 6" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x254++0x1 line.byte 0x0 "DATBAS6_BY_LL,Device Address Table Basic Register 6" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS6_BY_LH,Device Address Table Basic Register 6" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x256++0x1 line.word 0x0 "DATBAS6_HA_H,Device Address Table Basic Register 6" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x256++0x1 line.byte 0x0 "DATBAS6_BY_HL,Device Address Table Basic Register 6" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS6_BY_HH,Device Address Table Basic Register 6" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x25C++0x3 line.long 0x0 "DATBAS7,Device Address Table Basic Register 7" bitfld.long 0x0 31. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "DVDYAD,Device I3C Dynamic Address" newline bitfld.long 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.long 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.long 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.long 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.long.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.word 0x25C++0x1 line.word 0x0 "DATBAS7_HA_L,Device Address Table Basic Register 7" bitfld.word 0x0 15. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.word 0x0 14. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.word 0x0 13. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.word 0x0 12. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.word.byte 0x0 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" group.byte 0x25C++0x1 line.byte 0x0 "DATBAS7_BY_LL,Device Address Table Basic Register 7" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "DVSTAD,Device Static Address" line.byte 0x1 "DATBAS7_BY_LH,Device Address Table Basic Register 7" bitfld.byte 0x1 7. "DVIBITS,Device IBI Time-stamp" "0: The Master shall not time-stamp IBIs from this..,1: The Master shall time-stamp IBIs for this Device.." bitfld.byte 0x1 6. "DVMRRJ,Device In-Band Master Request Reject" "0: This Device shall ACK Master Requests,1: This Device shall NACK Master Requests and send.." newline bitfld.byte 0x1 5. "DVSIRRJ,Device In-Band Slave Interrupt Request Reject" "0: This Device shall ACK the SIR,1: This Device shall NACK the SIR and send the.." rbitfld.byte 0x1 4. "DVIBIPL,Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x25E++0x1 line.word 0x0 "DATBAS7_HA_H,Device Address Table Basic Register 7" bitfld.word 0x0 15. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" group.byte 0x25E++0x1 line.byte 0x0 "DATBAS7_BY_HL,Device Address Table Basic Register 7" hexmask.byte 0x0 0.--7. 1. "DVDYAD,Device I3C Dynamic Address" line.byte 0x1 "DATBAS7_BY_HH,Device Address Table Basic Register 7" bitfld.byte 0x1 7. "DVTYP,Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "DVNACK,Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x2A0++0x3 line.long 0x0 "EXDATBAS,Extended Device Address Table Basic Register" bitfld.long 0x0 31. "EDTYP,Extended Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.long 0x0 29.--30. "EDNACK,Extended Device NACK Retry Count" "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.long.byte 0x0 16.--23. 1. "EDDYAD,Extended Device I3C Dynamic Address" newline hexmask.long.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 0.--6. 1. "EDSTAD,Extended Device Static Address" group.word 0x2A0++0x1 line.word 0x0 "EXDATBAS_HA_L,Extended Device Address Table Basic Register" hexmask.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.word.byte 0x0 0.--6. 1. "EDSTAD,Extended Device Static Address" group.byte 0x2A0++0x1 line.byte 0x0 "EXDATBAS_BY_LL,Extended Device Address Table Basic Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "EDSTAD,Extended Device Static Address" line.byte 0x1 "EXDATBAS_BY_LH,Extended Device Address Table Basic Register" hexmask.byte 0x1 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2A2++0x1 line.word 0x0 "EXDATBAS_HA_H,Extended Device Address Table Basic Register" bitfld.word 0x0 15. "EDTYP,Extended Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.word 0x0 13.--14. "EDNACK,Extended Device NACK Retry Count" "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word.byte 0x0 0.--7. 1. "EDDYAD,Extended Device I3C Dynamic Address" group.byte 0x2A2++0x1 line.byte 0x0 "EXDATBAS_BY_HL,Extended Device Address Table Basic Register" hexmask.byte 0x0 0.--7. 1. "EDDYAD,Extended Device I3C Dynamic Address" line.byte 0x1 "EXDATBAS_BY_HH,Extended Device Address Table Basic Register" bitfld.byte 0x1 7. "EDTYP,Extended Device Type" "0: I3C: I3C Device,1: I2C: I2C Device" bitfld.byte 0x1 5.--6. "EDNACK,Extended Device NACK Retry Count" "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "Reserved,These bits are read as 00000. The write value should be 00000." group.long 0x2B0++0x3 line.long 0x0 "SDATBAS0,Slave Device Address Table Basic Register 0" hexmask.long.word 0x0 23.--31. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.byte 0x0 16.--22. 1. "SDDYAD,Slave Device I3C Dynamic Address" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x0 12. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.word 0x2B0++0x1 line.word 0x0 "SDATBAS0_HA_L,Slave Device Address Table Basic Register 0" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.word 0x0 12. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.byte 0x2B0++0x1 line.byte 0x0 "SDATBAS0_BY_LL,Slave Device Address Table Basic Register 0" hexmask.byte 0x0 0.--7. 1. "SDSTAD,Slave Device Static Address" line.byte 0x1 "SDATBAS0_BY_LH,Slave Device Address Table Basic Register 0" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x1 4. "SDIBIPL,Slave Device IBI Payload" "0: IBIs from this Device do not carry a Data Payload,1: IBIs from this Device do carry a Data Payload" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline bitfld.byte 0x1 0.--1. "SDSTAD,Slave Device Static Address" "0,1,2,3" group.word 0x2B2++0x1 line.word 0x0 "SDATBAS0_HA_H,Slave Device Address Table Basic Register 0" hexmask.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.word.byte 0x0 0.--6. 1. "SDDYAD,Slave Device I3C Dynamic Address" group.byte 0x2B2++0x0 line.byte 0x0 "SDATBAS0_BY_HL,Slave Device Address Table Basic Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--6. 1. "SDDYAD,Slave Device I3C Dynamic Address" group.long 0x2B4++0x3 line.long 0x0 "SDATBAS1,Slave Device Address Table Basic Register 1" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.word 0x2B4++0x1 line.word 0x0 "SDATBAS1_HA_L,Slave Device Address Table Basic Register 1" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.byte 0x2B4++0x1 line.byte 0x0 "SDATBAS1_BY_LL,Slave Device Address Table Basic Register 1" hexmask.byte 0x0 0.--7. 1. "SDSTAD,Slave Device Static Address" line.byte 0x1 "SDATBAS1_BY_LH,Slave Device Address Table Basic Register 1" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline bitfld.byte 0x1 0.--1. "SDSTAD,Slave Device Static Address" "0,1,2,3" group.long 0x2B8++0x3 line.long 0x0 "SDATBAS2,Slave Device Address Table Basic Register 2" hexmask.long.tbyte 0x0 11.--31. 1. "Reserved,These bits are read as 000000000000000000000. The write value should be 000000000000000000000." bitfld.long 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.long.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.word 0x2B8++0x1 line.word 0x0 "SDATBAS2_HA_L,Slave Device Address Table Basic Register 2" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline hexmask.word 0x0 0.--9. 1. "SDSTAD,Slave Device Static Address" group.byte 0x2B8++0x1 line.byte 0x0 "SDATBAS2_BY_LL,Slave Device Address Table Basic Register 2" hexmask.byte 0x0 0.--7. 1. "SDSTAD,Slave Device Static Address" line.byte 0x1 "SDATBAS2_BY_LH,Slave Device Address Table Basic Register 2" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SDADLS,Slave Device Address Length Selection" "0: Slave Device address length 7 bits selected,1: Slave Device address length 10 bits selected." newline bitfld.byte 0x1 0.--1. "SDSTAD,Slave Device Static Address" "0,1,2,3" group.long 0x2D0++0x3 line.long 0x0 "MSDCT0,Master Device Characteristic Table Register 0" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2D0++0x1 line.word 0x0 "MSDCT0_HA_L,Master Device Characteristic Table Register 0" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2D1++0x0 line.byte 0x0 "MSDCT0_BY_LH,Master Device Characteristic Table Register 0" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2D4++0x3 line.long 0x0 "MSDCT1,Master Device Characteristic Table Register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2D4++0x1 line.word 0x0 "MSDCT1_HA_L,Master Device Characteristic Table Register 1" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2D5++0x0 line.byte 0x0 "MSDCT1_BY_LH,Master Device Characteristic Table Register 1" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2D8++0x3 line.long 0x0 "MSDCT2,Master Device Characteristic Table Register 2" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2D8++0x1 line.word 0x0 "MSDCT2_HA_L,Master Device Characteristic Table Register 2" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2D9++0x0 line.byte 0x0 "MSDCT2_BY_LH,Master Device Characteristic Table Register 2" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2DC++0x3 line.long 0x0 "MSDCT3,Master Device Characteristic Table Register 3" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2DC++0x1 line.word 0x0 "MSDCT3_HA_L,Master Device Characteristic Table Register 3" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2DD++0x0 line.byte 0x0 "MSDCT3_BY_LH,Master Device Characteristic Table Register 3" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2E0++0x3 line.long 0x0 "MSDCT4,Master Device Characteristic Table Register 4" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2E0++0x1 line.word 0x0 "MSDCT4_HA_L,Master Device Characteristic Table Register 4" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2E1++0x0 line.byte 0x0 "MSDCT4_BY_LH,Master Device Characteristic Table Register 4" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2E4++0x3 line.long 0x0 "MSDCT5,Master Device Characteristic Table Register 5" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2E4++0x1 line.word 0x0 "MSDCT5_HA_L,Master Device Characteristic Table Register 5" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2E5++0x0 line.byte 0x0 "MSDCT5_BY_LH,Master Device Characteristic Table Register 5" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2E8++0x3 line.long 0x0 "MSDCT6,Master Device Characteristic Table Register 6" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2E8++0x1 line.word 0x0 "MSDCT6_HA_L,Master Device Characteristic Table Register 6" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2E9++0x0 line.byte 0x0 "MSDCT6_BY_LH,Master Device Characteristic Table Register 6" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x2EC++0x3 line.long 0x0 "MSDCT7,Master Device Characteristic Table Register 7" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.word 0x2EC++0x1 line.word 0x0 "MSDCT7_HA_L,Master Device Characteristic Table Register 7" hexmask.word.byte 0x0 8.--15. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." group.byte 0x2ED++0x0 line.byte 0x0 "MSDCT7_BY_LH,Master Device Characteristic Table Register 7" hexmask.byte 0x0 0.--7. 1. "RBCR,Received Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x320++0x3 line.long 0x0 "SVDCT,Slave Device Characteristic Table Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "TBCR,Transfar Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." newline hexmask.long.byte 0x0 0.--7. 1. "TDCR,Transfar Device Characteristic Register" group.word 0x320++0x1 line.word 0x0 "SVDCT_HA_L,Slave Device Characteristic Table Register" hexmask.word.byte 0x0 8.--15. 1. "TBCR,Transfar Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." hexmask.word.byte 0x0 0.--7. 1. "TDCR,Transfar Device Characteristic Register" group.byte 0x320++0x1 line.byte 0x0 "SVDCT_BY_LL,Slave Device Characteristic Table Register" hexmask.byte 0x0 0.--7. 1. "TDCR,Transfar Device Characteristic Register" line.byte 0x1 "SVDCT_BY_LH,Slave Device Characteristic Table Register" hexmask.byte 0x1 0.--7. 1. "TBCR,Transfar Bus Characteristic RegisterValue of Device's I3C Bus Characteristics Register." group.long 0x324++0x3 line.long 0x0 "SDCTPIDL,Slave Device Characteristic Table Provisional ID Low Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "SDCTPIDL,Transfar Device Provisional ID Low" group.word 0x324++0x1 line.word 0x0 "SDCTPIDL_HA_L,Slave Device Characteristic Table Provisional ID Low Register" hexmask.word 0x0 0.--15. 1. "SDCTPIDL,Transfar Device Provisional ID Low" group.byte 0x324++0x1 line.byte 0x0 "SDCTPIDL_BY_LL,Slave Device Characteristic Table Provisional ID Low Register" hexmask.byte 0x0 0.--7. 1. "SDCTPIDL,Transfar Device Provisional ID Low" line.byte 0x1 "SDCTPIDL_BY_LH,Slave Device Characteristic Table Provisional ID Low Register" hexmask.byte 0x1 0.--7. 1. "SDCTPIDL,Transfar Device Provisional ID Low" group.long 0x328++0x3 line.long 0x0 "SDCTPIDH,Slave Device Characteristic Table Provisional ID High Register" hexmask.long 0x0 0.--31. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.word 0x328++0x1 line.word 0x0 "SDCTPIDH_HA_L,Slave Device Characteristic Table Provisional ID High Register" hexmask.word 0x0 0.--15. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.byte 0x328++0x1 line.byte 0x0 "SDCTPIDH_BY_LL,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x0 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" line.byte 0x1 "SDCTPIDH_BY_LH,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x1 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.word 0x32A++0x1 line.word 0x0 "SDCTPIDH_HA_H,Slave Device Characteristic Table Provisional ID High Register" hexmask.word 0x0 0.--15. 1. "SDCTPIDH,Transfar Device Provisional ID High" group.byte 0x32A++0x1 line.byte 0x0 "SDCTPIDH_BY_HL,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x0 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" line.byte 0x1 "SDCTPIDH_BY_HH,Slave Device Characteristic Table Provisional ID High Register" hexmask.byte 0x1 0.--7. 1. "SDCTPIDH,Transfar Device Provisional ID High" rgroup.long 0x330++0x3 line.long 0x0 "SVDVAD0,Slave Device Address Register 0" bitfld.long 0x0 31. "SDYADV,Slave Dynamic Address Valid" "0: Dynamic Address is disabled.,1: Dynamic Address is enabled." bitfld.long 0x0 30. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.long 0x0 28.--29. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 27. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 16.--25. 1. "SVAD,Slave Address" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000." rgroup.word 0x332++0x1 line.word 0x0 "SVDVAD0_HA_H,Slave Device Address Register 0" bitfld.word 0x0 15. "SDYADV,Slave Dynamic Address Valid" "0: Dynamic Address is disabled.,1: Dynamic Address is enabled." bitfld.word 0x0 14. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 11. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" hexmask.word 0x0 0.--9. 1. "SVAD,Slave Address" rgroup.byte 0x332++0x1 line.byte 0x0 "SVDVAD0_BY_HL,Slave Device Address Register 0" hexmask.byte 0x0 0.--7. 1. "SVAD,Slave Address" line.byte 0x1 "SVDVAD0_BY_HH,Slave Device Address Register 0" bitfld.byte 0x1 7. "SDYADV,Slave Dynamic Address Valid" "0: Dynamic Address is disabled.,1: Dynamic Address is enabled." bitfld.byte 0x1 6. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 3. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0.--1. "SVAD,Slave Address" "0,1,2,3" rgroup.long 0x334++0x3 line.long 0x0 "SVDVAD1,Slave Device Address Register 1" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.long 0x0 28.--29. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 27. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 16.--25. 1. "SVAD,Slave Address" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000." rgroup.word 0x336++0x1 line.word 0x0 "SVDVAD1_HA_H,Slave Device Address Register 1" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 11. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" hexmask.word 0x0 0.--9. 1. "SVAD,Slave Address" rgroup.byte 0x336++0x1 line.byte 0x0 "SVDVAD1_BY_HL,Slave Device Address Register 1" hexmask.byte 0x0 0.--7. 1. "SVAD,Slave Address" line.byte 0x1 "SVDVAD1_BY_HH,Slave Device Address Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 3. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0.--1. "SVAD,Slave Address" "0,1,2,3" rgroup.long 0x338++0x3 line.long 0x0 "SVDVAD2,Slave Device Address Register 2" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 30. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.long 0x0 28.--29. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 27. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.long 0x0 26. "Reserved,This bit is read as 0." "0,1" hexmask.long.word 0x0 16.--25. 1. "SVAD,Slave Address" newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000." rgroup.word 0x33A++0x1 line.word 0x0 "SVDVAD2_HA_H,Slave Device Address Register 2" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 11. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.word 0x0 10. "Reserved,This bit is read as 0." "0,1" hexmask.word 0x0 0.--9. 1. "SVAD,Slave Address" rgroup.byte 0x33A++0x1 line.byte 0x0 "SVDVAD2_BY_HL,Slave Device Address Register 2" hexmask.byte 0x0 0.--7. 1. "SVAD,Slave Address" line.byte 0x1 "SVDVAD2_BY_HH,Slave Device Address Register 2" bitfld.byte 0x1 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 6. "SSTADV,Slave Static Address Valid" "0: Slave address is disabled.,1: Slave address is enabled." newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x1 3. "SADLG,Slave Address Length" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x1 0.--1. "SVAD,Slave Address" "0,1,2,3" group.long 0x350++0x3 line.long 0x0 "CSECMD,CCC Slave Events Command Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "HJEVE,Hot-Join Event Enable" "0: DISABLED: Slave-initiated Hot-Join is Disabled..,1: ENABLED: Slave-initiated Hot-Join is Enabled by.." newline bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 1. "MSRQE,Mastership Requests Enable" "0: DISABLED: Mastership requests from Secondary..,1: ENABLED: Mastership requests from Secondary.." newline bitfld.long 0x0 0. "SVIRQE,Slave Interrupt Requests Enable" "0: DISABLED: Slave-initiated Interrupts is Disabled..,1: ENABLED: Slave-initiated Interrupts is Enabled.." group.word 0x350++0x1 line.word 0x0 "CSECMD_HA_L,CCC Slave Events Command Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "HJEVE,Hot-Join Event Enable" "0: DISABLED: Slave-initiated Hot-Join is Disabled..,1: ENABLED: Slave-initiated Hot-Join is Enabled by.." newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "MSRQE,Mastership Requests Enable" "0: DISABLED: Mastership requests from Secondary..,1: ENABLED: Mastership requests from Secondary.." newline bitfld.word 0x0 0. "SVIRQE,Slave Interrupt Requests Enable" "0: DISABLED: Slave-initiated Interrupts is Disabled..,1: ENABLED: Slave-initiated Interrupts is Enabled.." group.byte 0x350++0x0 line.byte 0x0 "CSECMD_BY_LL,CCC Slave Events Command Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "HJEVE,Hot-Join Event Enable" "0: DISABLED: Slave-initiated Hot-Join is Disabled..,1: ENABLED: Slave-initiated Hot-Join is Enabled by.." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "MSRQE,Mastership Requests Enable" "0: DISABLED: Mastership requests from Secondary..,1: ENABLED: Mastership requests from Secondary.." newline bitfld.byte 0x0 0. "SVIRQE,Slave Interrupt Requests Enable" "0: DISABLED: Slave-initiated Interrupts is Disabled..,1: ENABLED: Slave-initiated Interrupts is Enabled.." group.long 0x354++0x3 line.long 0x0 "CEACTST,CCC Enter Activity State Register" hexmask.long 0x0 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." hexmask.long.byte 0x0 0.--3. 1. "ACTST,Activity State" group.word 0x354++0x1 line.word 0x0 "CEACTST_HA_L,CCC Enter Activity State Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "ACTST,Activity State" group.byte 0x354++0x0 line.byte 0x0 "CEACTST_BY_LL,CCC Enter Activity State Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "ACTST,Activity State" group.long 0x358++0x3 line.long 0x0 "CMWLG,CCC Max Write Length Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "MWLG,Max Write Length" group.word 0x358++0x1 line.word 0x0 "CMWLG_HA_L,CCC Max Write Length Register" hexmask.word 0x0 0.--15. 1. "MWLG,Max Write Length" group.byte 0x358++0x1 line.byte 0x0 "CMWLG_BY_LL,CCC Max Write Length Register" hexmask.byte 0x0 0.--7. 1. "MWLG,Max Write Length" line.byte 0x1 "CMWLG_BY_LH,CCC Max Write Length Register" hexmask.byte 0x1 0.--7. 1. "MWLG,Max Write Length" group.long 0x35C++0x3 line.long 0x0 "CMRLG,CCC Max Read Length Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "IBIPSZ,IBI Payload Size" newline hexmask.long.word 0x0 0.--15. 1. "MRLG,Max Read Length." group.word 0x35C++0x1 line.word 0x0 "CMRLG_HA_L,CCC Max Read Length Register" hexmask.word 0x0 0.--15. 1. "MRLG,Max Read Length." group.byte 0x35C++0x1 line.byte 0x0 "CMRLG_BY_LL,CCC Max Read Length Register" hexmask.byte 0x0 0.--7. 1. "MRLG,Max Read Length." line.byte 0x1 "CMRLG_BY_LH,CCC Max Read Length Register" hexmask.byte 0x1 0.--7. 1. "MRLG,Max Read Length." group.word 0x35E++0x1 line.word 0x0 "CMRLG_HA_H,CCC Max Read Length Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "IBIPSZ,IBI Payload Size" group.byte 0x35E++0x0 line.byte 0x0 "CMRLG_BY_HL,CCC Max Read Length Register" hexmask.byte 0x0 0.--7. 1. "IBIPSZ,IBI Payload Size" rgroup.long 0x360++0x3 line.long 0x0 "CETSTMD,CCC Enter Test Mode Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "TSTMD,Test Mode" rgroup.word 0x360++0x1 line.word 0x0 "CETSTMD_HA_L,CCC Enter Test Mode Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 0.--7. 1. "TSTMD,Test Mode" rgroup.byte 0x360++0x0 line.byte 0x0 "CETSTMD_BY_LL,CCC Enter Test Mode Register" hexmask.byte 0x0 0.--7. 1. "TSTMD,Test Mode" group.long 0x364++0x3 line.long 0x0 "CGDVST,CCC Get Device Status Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "VDRSV,Vendor Reserved" newline bitfld.long 0x0 6.--7. "ACTMD,Slave Device's current Activity Mode" "0: Activity Mode 0,1: Activity Mode 1,?,?" rbitfld.long 0x0 5. "PRTE,Protocol Error" "0: The Slave has not detected a protocol error..,1: The Slave has detected a protocol error since.." newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 0.--3. 1. "PNDINT,Pending Interrupt" group.word 0x364++0x1 line.word 0x0 "CGDVST_HA_L,CCC Get Device Status Register" hexmask.word.byte 0x0 8.--15. 1. "VDRSV,Vendor Reserved" bitfld.word 0x0 6.--7. "ACTMD,Slave Device's current Activity Mode" "0: Activity Mode 0,1: Activity Mode 1,?,?" newline rbitfld.word 0x0 5. "PRTE,Protocol Error" "0: The Slave has not detected a protocol error..,1: The Slave has detected a protocol error since.." bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "PNDINT,Pending Interrupt" group.byte 0x364++0x1 line.byte 0x0 "CGDVST_BY_LL,CCC Get Device Status Register" bitfld.byte 0x0 6.--7. "ACTMD,Slave Device's current Activity Mode" "0: Activity Mode 0,1: Activity Mode 1,?,?" rbitfld.byte 0x0 5. "PRTE,Protocol Error" "0: The Slave has not detected a protocol error..,1: The Slave has detected a protocol error since.." newline bitfld.byte 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 0.--3. 1. "PNDINT,Pending Interrupt" line.byte 0x1 "CGDVST_BY_LH,CCC Get Device Status Register" hexmask.byte 0x1 0.--7. 1. "VDRSV,Vendor Reserved" group.long 0x368++0x3 line.long 0x0 "CMDSPW,CCC Max Data Speed W(Write) Registe" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 0.--2. "MSWDR,Maximum Sustained Write Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.word 0x368++0x1 line.word 0x0 "CMDSPW_HA_L,CCC Max Data Speed W(Write) Registe" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 0.--2. "MSWDR,Maximum Sustained Write Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.byte 0x368++0x0 line.byte 0x0 "CMDSPW_BY_LL,CCC Max Data Speed W(Write) Registe" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "MSWDR,Maximum Sustained Write Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.long 0x36C++0x3 line.long 0x0 "CMDSPR,CCC Max Data Speed R(Read) Registe" hexmask.long 0x0 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000. The write value should be 00000000000000000000000000." bitfld.long 0x0 3.--5. "CDTTIM,Clock to Data Turnaround Time (TSCO)" "0: <= 8ns(default value),1: <= 9ns,?,?,?,?,?,?" newline bitfld.long 0x0 0.--2. "MSRDR,Maximum Sustained Read Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.word 0x36C++0x1 line.word 0x0 "CMDSPR_HA_L,CCC Max Data Speed R(Read) Registe" hexmask.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.word 0x0 3.--5. "CDTTIM,Clock to Data Turnaround Time (TSCO)" "0: <= 8ns(default value),1: <= 9ns,?,?,?,?,?,?" newline bitfld.word 0x0 0.--2. "MSRDR,Maximum Sustained Read Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.byte 0x36C++0x0 line.byte 0x0 "CMDSPR_BY_LL,CCC Max Data Speed R(Read) Registe" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 3.--5. "CDTTIM,Clock to Data Turnaround Time (TSCO)" "0: <= 8ns(default value),1: <= 9ns,?,?,?,?,?,?" newline bitfld.byte 0x0 0.--2. "MSRDR,Maximum Sustained Read Data Rate" "0: fscl Max (default value),1: 8MHz,?,?,?,?,?,?" group.long 0x370++0x3 line.long 0x0 "CMDSPT,CCC Max Data Speed T(Turnaround) Registe" bitfld.long 0x0 31. "MRTE,Maximum Read Turnaround Time Enable" "0: (GETMXDS Format 2: With Turnaround),1: Enables transmission of the Maximum Read.." hexmask.long.byte 0x0 24.--30. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.tbyte 0x0 0.--23. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.word 0x370++0x1 line.word 0x0 "CMDSPT_HA_L,CCC Max Data Speed T(Turnaround) Register" hexmask.word 0x0 0.--15. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.byte 0x370++0x1 line.byte 0x0 "CMDSPT_BY_LL,CCC Max Data Speed T(Turnaround) Register" hexmask.byte 0x0 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." line.byte 0x1 "CMDSPT_BY_LH,CCC Max Data Speed T(Turnaround) Register" hexmask.byte 0x1 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.word 0x372++0x1 line.word 0x0 "CMDSPT_HA_H,CCC Max Data Speed T(Turnaround) Register" bitfld.word 0x0 15. "MRTE,Maximum Read Turnaround Time Enable" "0: (GETMXDS Format 2: With Turnaround),1: Enables transmission of the Maximum Read.." hexmask.word.byte 0x0 8.--14. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.word.byte 0x0 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." group.byte 0x372++0x1 line.byte 0x0 "CMDSPT_BY_HL,CCC Max Data Speed T(Turnaround) Register" hexmask.byte 0x0 0.--7. 1. "MRTTIM,Maximum Read Turnaround Time24-bit field can encode turnaround times from 0.0 seconds to 16 seconds." line.byte 0x1 "CMDSPT_BY_HH,CCC Max Data Speed T(Turnaround) Register" bitfld.byte 0x1 7. "MRTE,Maximum Read Turnaround Time Enable" "0: (GETMXDS Format 2: With Turnaround),1: Enables transmission of the Maximum Read.." hexmask.byte 0x1 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.long 0x374++0x3 line.long 0x0 "CETSM,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "INAC,Inaccuracy ByteThis byte represents the maximum variation of the Slave's internal oscillator in 1/10th percent (0.1%) increments up to 25.5%." newline hexmask.long.byte 0x0 8.--15. 1. "FREQ,Frequency ByteThis byte represents the Slave's internal oscillator frequency in increments of 0.5 MHz (500 kHz) up to 127.5 MHz." hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "SPTASYN1,Supports Async Mode 1" "0: Async Mode 1 is not supported.,1: Async Mode 1 is supported." bitfld.long 0x0 1. "SPTASYN0,Supports Async Mode 0" "0: Async Mode 0 is not supported.,1: Async Mode 0 is supported." newline bitfld.long 0x0 0. "SPTSYN,Supports Sync Mode" "0: Disable Supports Sync Mode.,1: Enable Supports Sync Mode." group.word 0x374++0x1 line.word 0x0 "CETSM_HA_L,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.word.byte 0x0 8.--15. 1. "FREQ,Frequency ByteThis byte represents the Slave's internal oscillator frequency in increments of 0.5 MHz (500 kHz) up to 127.5 MHz." hexmask.word.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 2. "SPTASYN1,Supports Async Mode 1" "0: Async Mode 1 is not supported.,1: Async Mode 1 is supported." bitfld.word 0x0 1. "SPTASYN0,Supports Async Mode 0" "0: Async Mode 0 is not supported.,1: Async Mode 0 is supported." newline bitfld.word 0x0 0. "SPTSYN,Supports Sync Mode" "0: Disable Supports Sync Mode.,1: Enable Supports Sync Mode." group.byte 0x374++0x1 line.byte 0x0 "CETSM_BY_LL,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SPTASYN1,Supports Async Mode 1" "0: Async Mode 1 is not supported.,1: Async Mode 1 is supported." newline bitfld.byte 0x0 1. "SPTASYN0,Supports Async Mode 0" "0: Async Mode 0 is not supported.,1: Async Mode 0 is supported." bitfld.byte 0x0 0. "SPTSYN,Supports Sync Mode" "0: Disable Supports Sync Mode.,1: Enable Supports Sync Mode." line.byte 0x1 "CETSM_BY_LH,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.byte 0x1 0.--7. 1. "FREQ,Frequency ByteThis byte represents the Slave's internal oscillator frequency in increments of 0.5 MHz (500 kHz) up to 127.5 MHz." group.word 0x376++0x1 line.word 0x0 "CETSM_HA_H,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "INAC,Inaccuracy ByteThis byte represents the maximum variation of the Slave's internal oscillator in 1/10th percent (0.1%) increments up to 25.5%." group.byte 0x376++0x0 line.byte 0x0 "CETSM_BY_HL,CCC Exchange Timing Support Information M(Mode^2 ) Register" hexmask.byte 0x0 0.--7. 1. "INAC,Inaccuracy ByteThis byte represents the maximum variation of the Slave's internal oscillator in 1/10th percent (0.1%) increments up to 25.5%." group.long 0x378++0x3 line.long 0x0 "CETSS,CCC Exchange Timing Support Information S(State^2 ) Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "ICOVF,Internal Counter Overflow" "0: Slave has not experienced a counter overflow..,1: Slave experienced a counter overflow since the.." newline hexmask.long.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 1.--2. "ASYNE,Async Mode Enabled" "0: All Mode Disable,1: Async Mode 0 Enabled.,?,?" newline bitfld.long 0x0 0. "SYNE,Sync Mode Enabled" "0: Sync Mode Disabled.,1: Sync Mode Enabled." group.word 0x378++0x1 line.word 0x0 "CETSS_HA_L,CCC Exchange Timing Support Information S(State^2 ) Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 7. "ICOVF,Internal Counter Overflow" "0: Slave has not experienced a counter overflow..,1: Slave experienced a counter overflow since the.." newline hexmask.word.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 1.--2. "ASYNE,Async Mode Enabled" "0: All Mode Disable,1: Async Mode 0 Enabled.,?,?" newline bitfld.word 0x0 0. "SYNE,Sync Mode Enabled" "0: Sync Mode Disabled.,1: Sync Mode Enabled." group.byte 0x378++0x0 line.byte 0x0 "CETSS_BY_LL,CCC Exchange Timing Support Information S(State^2 ) Register" bitfld.byte 0x0 7. "ICOVF,Internal Counter Overflow" "0: Slave has not experienced a counter overflow..,1: Slave experienced a counter overflow since the.." hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 1.--2. "ASYNE,Async Mode Enabled" "0: All Mode Disable,1: Async Mode 0 Enabled.,?,?" bitfld.byte 0x0 0. "SYNE,Sync Mode Enabled" "0: Sync Mode Disabled.,1: Sync Mode Enabled." group.long 0x37C++0x3 line.long 0x0 "CGHDRCAP,CCC Get HDR capability Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 2. "TSLEN,HDR-TSL Operation Enable" "0: HDR-TSL Operation is Disabled.,1: HDR-TSL Operation is Enabled." newline bitfld.long 0x0 1. "TSPEN,HDR-TSP Operation Enable" "0: HDR-TSP Operation is Disabled.,1: HDR-TSP Operation is Enabled." bitfld.long 0x0 0. "DDREN,HDR-DDR Operation Enable" "0: HDR-DDR Operation is Disabled.,1: HDR-DDR Operation is Enabled." group.word 0x37C++0x1 line.word 0x0 "CGHDRCAP_HA_L,CCC Get HDR capability Register" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "TSLEN,HDR-TSL Operation Enable" "0: HDR-TSL Operation is Disabled.,1: HDR-TSL Operation is Enabled." newline bitfld.word 0x0 1. "TSPEN,HDR-TSP Operation Enable" "0: HDR-TSP Operation is Disabled.,1: HDR-TSP Operation is Enabled." bitfld.word 0x0 0. "DDREN,HDR-DDR Operation Enable" "0: HDR-DDR Operation is Disabled.,1: HDR-DDR Operation is Enabled." group.byte 0x37C++0x0 line.byte 0x0 "CGHDRCAP_BY_LL,CCC Get HDR capability Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "TSLEN,HDR-TSL Operation Enable" "0: HDR-TSL Operation is Disabled.,1: HDR-TSL Operation is Enabled." newline bitfld.byte 0x0 1. "TSPEN,HDR-TSP Operation Enable" "0: HDR-TSP Operation is Disabled.,1: HDR-TSP Operation is Enabled." bitfld.byte 0x0 0. "DDREN,HDR-DDR Operation Enable" "0: HDR-DDR Operation is Disabled.,1: HDR-DDR Operation is Enabled." rgroup.long 0x380++0x3 line.long 0x0 "BITCNT,Bit Count Register" hexmask.long 0x0 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000." hexmask.long.byte 0x0 0.--4. 1. "BCNT,Bit Counter" rgroup.word 0x380++0x1 line.word 0x0 "BITCNT_HA_L,Bit Count Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000." hexmask.word.byte 0x0 0.--4. 1. "BCNT,Bit Counter" rgroup.byte 0x380++0x0 line.byte 0x0 "BITCNT_BY_LL,Bit Count Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "BCNT,Bit Counter" rgroup.long 0x394++0x3 line.long 0x0 "NQSTLV,Normal Queue Status Level Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "IBISCNT,Normal IBI Status CountNumber of IBI Status entries currently in the IBI Queue." newline hexmask.long.byte 0x0 16.--23. 1. "IBIQLV,Normal IBI Queue Level Number of buffer entries currently in the IBI Queue." hexmask.long.byte 0x0 8.--15. 1. "RSPQLV,Normal Response Queue LevelNumber of buffer entries currently in the Response Queue." newline hexmask.long.byte 0x0 0.--7. 1. "CMDQFLV,Normal Command Queue Free LevelNumber of free buffer entries currently in the Command Queue. Reset value is the depth of the Command Queue." rgroup.word 0x394++0x1 line.word 0x0 "NQSTLV_HA_L,Normal Queue Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQLV,Normal Response Queue LevelNumber of buffer entries currently in the Response Queue." hexmask.word.byte 0x0 0.--7. 1. "CMDQFLV,Normal Command Queue Free LevelNumber of free buffer entries currently in the Command Queue. Reset value is the depth of the Command Queue." rgroup.byte 0x394++0x1 line.byte 0x0 "NQSTLV_BY_LL,Normal Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "CMDQFLV,Normal Command Queue Free LevelNumber of free buffer entries currently in the Command Queue. Reset value is the depth of the Command Queue." line.byte 0x1 "NQSTLV_BY_LH,Normal Queue Status Level Register" hexmask.byte 0x1 0.--7. 1. "RSPQLV,Normal Response Queue LevelNumber of buffer entries currently in the Response Queue." rgroup.word 0x396++0x1 line.word 0x0 "NQSTLV_HA_H,Normal Queue Status Level Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "IBISCNT,Normal IBI Status CountNumber of IBI Status entries currently in the IBI Queue." newline hexmask.word.byte 0x0 0.--7. 1. "IBIQLV,Normal IBI Queue Level Number of buffer entries currently in the IBI Queue." rgroup.byte 0x396++0x1 line.byte 0x0 "NQSTLV_BY_HL,Normal Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "IBIQLV,Normal IBI Queue Level Number of buffer entries currently in the IBI Queue." line.byte 0x1 "NQSTLV_BY_HH,Normal Queue Status Level Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "IBISCNT,Normal IBI Status CountNumber of IBI Status entries currently in the IBI Queue." rgroup.long 0x398++0x3 line.long 0x0 "NDBSTLV0,Normal Data Buffer Status Level Register 0" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RDBLV,Normal Rx Data Buffer LevelIndicates the number of Rx Data Buffer entries in the Rx Data Queue." newline hexmask.long.byte 0x0 0.--7. 1. "TDBFLV,Normal Tx Data Buffer Free LevelIndicates the number of free Tx Data Buffer entries in the Tx Data Queue.Reset value is the depth of the Tx Data Queue." rgroup.word 0x398++0x1 line.word 0x0 "NDBSTLV0_HA_L,Normal Data Buffer Status Level Register 0" hexmask.word.byte 0x0 8.--15. 1. "RDBLV,Normal Rx Data Buffer LevelIndicates the number of Rx Data Buffer entries in the Rx Data Queue." hexmask.word.byte 0x0 0.--7. 1. "TDBFLV,Normal Tx Data Buffer Free LevelIndicates the number of free Tx Data Buffer entries in the Tx Data Queue.Reset value is the depth of the Tx Data Queue." rgroup.byte 0x398++0x1 line.byte 0x0 "NDBSTLV0_BY_LL,Normal Data Buffer Status Level Register 0" hexmask.byte 0x0 0.--7. 1. "TDBFLV,Normal Tx Data Buffer Free LevelIndicates the number of free Tx Data Buffer entries in the Tx Data Queue.Reset value is the depth of the Tx Data Queue." line.byte 0x1 "NDBSTLV0_BY_LH,Normal Data Buffer Status Level Register 0" hexmask.byte 0x1 0.--7. 1. "RDBLV,Normal Rx Data Buffer LevelIndicates the number of Rx Data Buffer entries in the Rx Data Queue." rgroup.long 0x3C0++0x3 line.long 0x0 "NRSQSTLV,Normal Receive Status Queue Status Level Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x0 0.--7. 1. "RSQLV,Normal Receive Status Queue Level" rgroup.word 0x3C0++0x1 line.word 0x0 "NRSQSTLV_HA_L,Normal Receive Status Queue Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 0.--7. 1. "RSQLV,Normal Receive Status Queue Level" rgroup.byte 0x3C0++0x0 line.byte 0x0 "NRSQSTLV_BY_LL,Normal Receive Status Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "RSQLV,Normal Receive Status Queue Level" rgroup.long 0x3C4++0x3 line.long 0x0 "HQSTLV,High Priority Queue Status Level Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RSPQLV,High Priority Response Queue LevelNumber of buffer entries currently in the High Priority Response Queue. Data Queue." newline hexmask.long.byte 0x0 0.--7. 1. "CMDQLV,High Priority Command Queue LevelNumber of free buffer entries currently in the High Priority Command Queue. Reset value is the depth of the High Priority Command Queue" rgroup.word 0x3C4++0x1 line.word 0x0 "HQSTLV_HA_L,High Priority Queue Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "RSPQLV,High Priority Response Queue LevelNumber of buffer entries currently in the High Priority Response Queue. Data Queue." hexmask.word.byte 0x0 0.--7. 1. "CMDQLV,High Priority Command Queue LevelNumber of free buffer entries currently in the High Priority Command Queue. Reset value is the depth of the High Priority Command Queue" rgroup.byte 0x3C4++0x1 line.byte 0x0 "HQSTLV_BY_LL,High Priority Queue Status Level Register" hexmask.byte 0x0 0.--7. 1. "CMDQLV,High Priority Command Queue LevelNumber of free buffer entries currently in the High Priority Command Queue. Reset value is the depth of the High Priority Command Queue" line.byte 0x1 "HQSTLV_BY_LH,High Priority Queue Status Level Register" hexmask.byte 0x1 0.--7. 1. "RSPQLV,High Priority Response Queue LevelNumber of buffer entries currently in the High Priority Response Queue. Data Queue." rgroup.long 0x3C8++0x3 line.long 0x0 "HDBSTLV,High Priority Data Buffer Status Level Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "RDBLV,High Priority Rx Data Buffer Level Indicates the number of High Priority Rx Data Buffer entries in the High Priority Rx Data Queue." newline hexmask.long.byte 0x0 0.--7. 1. "TDBFLV,High Priority Tx Data Buffer Free LevelIndicates the number of free High Priority Tx Data Buffer entries in the High Priority Tx Data Queue.Reset value is the depth of the High Priority Tx Data Queue." rgroup.word 0x3C8++0x1 line.word 0x0 "HDBSTLV_HA_L,High Priority Data Buffer Status Level Register" hexmask.word.byte 0x0 8.--15. 1. "RDBLV,High Priority Rx Data Buffer Level Indicates the number of High Priority Rx Data Buffer entries in the High Priority Rx Data Queue." hexmask.word.byte 0x0 0.--7. 1. "TDBFLV,High Priority Tx Data Buffer Free LevelIndicates the number of free High Priority Tx Data Buffer entries in the High Priority Tx Data Queue.Reset value is the depth of the High Priority Tx Data Queue." rgroup.byte 0x3C8++0x1 line.byte 0x0 "HDBSTLV_BY_LL,High Priority Data Buffer Status Level Register" hexmask.byte 0x0 0.--7. 1. "TDBFLV,High Priority Tx Data Buffer Free LevelIndicates the number of free High Priority Tx Data Buffer entries in the High Priority Tx Data Queue.Reset value is the depth of the High Priority Tx Data Queue." line.byte 0x1 "HDBSTLV_BY_LH,High Priority Data Buffer Status Level Register" hexmask.byte 0x1 0.--7. 1. "RDBLV,High Priority Rx Data Buffer Level Indicates the number of High Priority Rx Data Buffer entries in the High Priority Rx Data Queue." rgroup.long 0x3CC++0x3 line.long 0x0 "PRSTDBG,Present State Debug Register" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000." hexmask.long.byte 0x0 24.--27. 1. "Reserved,These bits are read as 0000." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x0 16.--21. 1. "Reserved,These bits are read as 000000." newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000." newline hexmask.long.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.long 0x0 3. "SDOLV,SDA Output Level" "0: This IP has driven the SDA pin low.,1: This IP has released the SDA pin." newline bitfld.long 0x0 2. "SCOLV,SCL Output Level" "0: This IP has driven the SCL pin low.,1: This IP has released the SCL pin." bitfld.long 0x0 1. "SDILV,SDA Line Signal LevelThis bit is used to check the SDA Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_sdai_a signal." "0,1" newline bitfld.long 0x0 0. "SCILV,SCL Line Signal LevelThis bit is used to check the SCL Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_scli_a signal." "0,1" rgroup.word 0x3CC++0x1 line.word 0x0 "PRSTDBG_HA_L,Present State Debug Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.word.byte 0x0 8.--13. 1. "Reserved,These bits are read as 000000." newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.word 0x0 3. "SDOLV,SDA Output Level" "0: This IP has driven the SDA pin low.,1: This IP has released the SDA pin." newline bitfld.word 0x0 2. "SCOLV,SCL Output Level" "0: This IP has driven the SCL pin low.,1: This IP has released the SCL pin." bitfld.word 0x0 1. "SDILV,SDA Line Signal LevelThis bit is used to check the SDA Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_sdai_a signal." "0,1" newline bitfld.word 0x0 0. "SCILV,SCL Line Signal LevelThis bit is used to check the SCL Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_scli_a signal." "0,1" rgroup.byte 0x3CC++0x1 line.byte 0x0 "PRSTDBG_BY_LL,Present State Debug Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000." bitfld.byte 0x0 3. "SDOLV,SDA Output Level" "0: This IP has driven the SDA pin low.,1: This IP has released the SDA pin." newline bitfld.byte 0x0 2. "SCOLV,SCL Output Level" "0: This IP has driven the SCL pin low.,1: This IP has released the SCL pin." bitfld.byte 0x0 1. "SDILV,SDA Line Signal LevelThis bit is used to check the SDA Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_sdai_a signal." "0,1" newline bitfld.byte 0x0 0. "SCILV,SCL Line Signal LevelThis bit is used to check the SCL Line level in order to recover from errors and for debugging. This bit reflects the value of synchronized pt_scli_a signal." "0,1" line.byte 0x1 "PRSTDBG_BY_LH,Present State Debug Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.byte 0x1 0.--5. 1. "Reserved,These bits are read as 000000." rgroup.word 0x3CE++0x1 line.word 0x0 "PRSTDBG_HA_H,Present State Debug Register" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000." hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000." rgroup.byte 0x3CE++0x1 line.byte 0x0 "PRSTDBG_BY_HL,Present State Debug Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000." line.byte 0x1 "PRSTDBG_BY_HH,Present State Debug Register" hexmask.byte 0x1 4.--7. 1. "Reserved,These bits are read as 0000." hexmask.byte 0x1 0.--3. 1. "Reserved,These bits are read as 0000." rgroup.long 0x3D0++0x3 line.long 0x0 "MSERRCNT,Master Error Counters Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0." "0,1" hexmask.long.tbyte 0x0 8.--30. 1. "Reserved,These bits are read as 00000000000000000000000." newline hexmask.long.byte 0x0 0.--7. 1. "M2ECNT,M2 Error CounterCounts I3C Type M2 errors on the I3C Bus.Cleared upon Read out." rgroup.word 0x3D0++0x1 line.word 0x0 "MSERRCNT_HA_L,Master Error Counters Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." hexmask.word.byte 0x0 0.--7. 1. "M2ECNT,M2 Error CounterCounts I3C Type M2 errors on the I3C Bus.Cleared upon Read out." rgroup.byte 0x3D0++0x0 line.byte 0x0 "MSERRCNT_BY_LL,Master Error Counters Register" hexmask.byte 0x0 0.--7. 1. "M2ECNT,M2 Error CounterCounts I3C Type M2 errors on the I3C Bus.Cleared upon Read out." rgroup.long 0x3E0++0x3 line.long 0x0 "SC1CPT,SC1 Capture monitor Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "SC1C,SC1 Capture" rgroup.word 0x3E0++0x1 line.word 0x0 "SC1CPT_HA_L,SC1 Capture monitor Register" hexmask.word 0x0 0.--15. 1. "SC1C,SC1 Capture" rgroup.byte 0x3E0++0x1 line.byte 0x0 "SC1CPT_BY_LL,SC1 Capture monitor Register" hexmask.byte 0x0 0.--7. 1. "SC1C,SC1 Capture" line.byte 0x1 "SC1CPT_BY_LH,SC1 Capture monitor Register" hexmask.byte 0x1 0.--7. 1. "SC1C,SC1 Capture" rgroup.long 0x3E4++0x3 line.long 0x0 "SC2CPT,SC2 Capture monitor Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x0 0.--15. 1. "SC2C,SC2 Capture" rgroup.word 0x3E4++0x1 line.word 0x0 "SC2CPT_HA_L,SC2 Capture monitor Register" hexmask.word 0x0 0.--15. 1. "SC2C,SC2 Capture" rgroup.byte 0x3E4++0x1 line.byte 0x0 "SC2CPT_BY_LL,SC2 Capture monitor Register" hexmask.byte 0x0 0.--7. 1. "SC2C,SC2 Capture" line.byte 0x1 "SC2CPT_BY_LH,SC2 Capture monitor Register" hexmask.byte 0x1 0.--7. 1. "SC2C,SC2 Capture" tree.end tree.end tree "ICU (Interrupt Controller)" base ad:0x0 tree "ICU" base ad:0x4000C000 group.byte 0x10++0x0 line.byte 0x0 "SWIRQ_S,Software Interrupt Request Register for Secure Interrupt" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SWIRQS,Generates an interrupt for the other CPU subsystem." "0: (the value of the internal register..,?" group.byte 0x20++0x0 line.byte 0x0 "SWIRQ_NS,Software Interrupt Request Register for Non-secure Interrupt" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SWIRQNS,Generates an interrupt for the other CPU subsystem." "0: (the value of the internal register..,?" group.word 0x60++0x1 line.word 0x0 "IENMIER,Integrated Error NMI Interrupt Enable Registe for CPU" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "BUSEN,Integrated BUS error nmi Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1. "LMEN,Integrated Local Memory error nmi Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 0. "CMEN,Integrated Common Memory error nmi Enable" "0: Disabled,1: Enabled" group.word 0x100++0x1 line.word 0x0 "NMIER,Non-Maskable Interrupt Enable Register" bitfld.word 0x0 15. "LUEN,LockUp Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "CMEN,Common Memory error Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 12. "BUSEN,BUS error Interrupt Enable" "0: Disabled,1: Enabled" newline hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 7. "NMIEN,NMI Pin Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 6. "OSTEN,Oscillation Stop Detection Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 3. "PVD2EN,Voltage-Monitoring 2 Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 2. "PVD1EN,Voltage-Monitoring 1 Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1. "WDTEN,WDT Underflow/Refresh Error Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 0. "IWDTEN,IWDT Underflow/Refresh Error Interrupt Enable" "0: Disabled,1: Enabled" group.word 0x110++0x1 line.word 0x0 "NMICLR,Non-Maskable Interrupt Status Clear Register" bitfld.word 0x0 15. "LUCLR,LU Clear" "0: No effect.,1: Clear the NMISR.LUST flag." bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "CMCLR,CM Clear" "0: No effect.,1: Clear the NMISR.CMST flag." bitfld.word 0x0 12. "BUSCLR,Bus Clear" "0: No effect.,1: Clear the NMISR.BUSST flag." newline hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 7. "NMICLR,NMI Clear" "0: No effect.,1: Clear the NMISR.NMIST flag." newline bitfld.word 0x0 6. "OSTCLR,OST Clear" "0: No effect.,1: Clear the NMISR.OSTST flag." bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 3. "PVD2CLR,PVD2 Clear" "0: No effect.,1: Clear the NMISR.PVD2ST flag." bitfld.word 0x0 2. "PVD1CLR,PVD1 Clear" "0: No effect.,1: Clear the NMISR.PVD1ST flag." newline bitfld.word 0x0 1. "WDTCLR,WDT Clear" "0: No effect.,1: Clear the NMISR.WDTST flag." bitfld.word 0x0 0. "IWDTCLR,IWDT Clear" "0: No effect.,1: Clear the NMISR.IWDTST flag." rgroup.word 0x120++0x1 line.word 0x0 "NMISR,Non-Maskable Interrupt Status Register" bitfld.word 0x0 15. "LUST,LockUp Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 13. "CMST,Common Memory error Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 12. "BUSST,BUS error Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." newline hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000." bitfld.word 0x0 7. "NMIST,NMI Status Flag" "0: interrupt not requested.,1: interrupt requested." newline bitfld.word 0x0 6. "OSTST,Oscillation Stop Detection Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.word 0x0 3. "PVD2ST,Voltage-Monitoring 2 Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 2. "PVD1ST,Voltage-Monitoring 1 Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." newline bitfld.word 0x0 1. "WDTST,WDT Underflow/Refresh Error Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 0. "IWDTST,IWDT Underflow/Refresh Error Status Flag" "0: interrupt not requested.,1: interrupt requested." group.long 0x1A0++0x7 line.long 0x0 "WUPEN0,Wake Up Interrupt Enable Register 0" bitfld.long 0x0 31. "RIIC0WUPEN,RIIC0 Address Match Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by RIIC0..,1: Deep Sleep/Software Standby returns by RIIC0.." bitfld.long 0x0 30. "AGT1CBWUPEN,AGT1 Compare Match B Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by AGT1..,1: Deep Sleep/Software Standby returns by AGT1.." newline bitfld.long 0x0 29. "AGT1CAWUPEN,AGT1 Compare Match A Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by AGT1..,1: Deep Sleep/Software Standby returns by AGT1.." bitfld.long 0x0 28. "AGT1UDWUPEN,AGT1 Underflow Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by AGT1..,1: Deep Sleep/Software Standby returns by AGT1.." newline bitfld.long 0x0 27. "USBFSWUPEN,USBFS0 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by USBFS0..,1: Deep Sleep/Software Standby returns by USBFS0.." bitfld.long 0x0 26. "USBHSWUPEN,USBHS Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by USBHS..,1: Deep Sleep/Software Standby returns by USBHS.." newline bitfld.long 0x0 25. "RTCPRDWUPEN,RCT Period Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by RTC..,1: Deep Sleep/Software Standby returns by RTC.." bitfld.long 0x0 24. "RTCALMWUPEN,RTC Alarm Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by RTC alarm..,1: Deep Sleep/Software Standby returns by RTC alarm.." newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "VBATTWUPEN,VBATT Monitor Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by VBATT..,1: Deep Sleep/Software Standby returns by VBATT.." newline bitfld.long 0x0 19. "PVD2WUPEN,PVD2 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by PVD2..,1: Deep Sleep/Software Standby returns by PVD2.." bitfld.long 0x0 18. "PVD1WUPEN,PVD1 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by PVD1..,1: Deep Sleep/Software Standby returns by PVD1.." newline bitfld.long 0x0 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16. "IWDTWUPEN,IWDT Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IWDT..,1: Deep Sleep/Software Standby returns by IWDT.." newline bitfld.long 0x0 15. "IRQWUPEN15,IRQ15 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ15..,1: Deep Sleep/Software Standby returns by IRQ15.." bitfld.long 0x0 14. "IRQWUPEN14,IRQ14 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ14..,1: Deep Sleep/Software Standby returns by IRQ14.." newline bitfld.long 0x0 13. "IRQWUPEN13,IRQ13 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ13..,1: Deep Sleep/Software Standby returns by IRQ13.." bitfld.long 0x0 12. "IRQWUPEN12,IRQ12 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ12..,1: Deep Sleep/Software Standby returns by IRQ12.." newline bitfld.long 0x0 11. "IRQWUPEN11,IRQ11 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ11..,1: Deep Sleep/Software Standby returns by IRQ11.." bitfld.long 0x0 10. "IRQWUPEN10,IRQ10 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ10..,1: Deep Sleep/Software Standby returns by IRQ10.." newline bitfld.long 0x0 9. "IRQWUPEN9,IRQ9 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ9..,1: Deep Sleep/Software Standby returns by IRQ9.." bitfld.long 0x0 8. "IRQWUPEN8,IRQ8 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ8..,1: Deep Sleep/Software Standby returns by IRQ8.." newline bitfld.long 0x0 7. "IRQWUPEN7,IRQ7 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ7..,1: Deep Sleep/Software Standby returns by IRQ7.." bitfld.long 0x0 6. "IRQWUPEN6,IRQ6 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ6..,1: Deep Sleep/Software Standby returns by IRQ6.." newline bitfld.long 0x0 5. "IRQWUPEN5,IRQ5 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ5..,1: Deep Sleep/Software Standby returns by IRQ5.." bitfld.long 0x0 4. "IRQWUPEN4,IRQ4 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ4..,1: Deep Sleep/Software Standby returns by IRQ4.." newline bitfld.long 0x0 3. "IRQWUPEN3,IRQ3 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ3..,1: Deep Sleep/Software Standby returns by IRQ3.." bitfld.long 0x0 2. "IRQWUPEN2,IRQ2 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ2..,1: Deep Sleep/Software Standby returns by IRQ2.." newline bitfld.long 0x0 1. "IRQWUPEN1,IRQ1 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ1..,1: Deep Sleep/Software Standby returns by IRQ1.." bitfld.long 0x0 0. "IRQWUPEN0,IRQ0 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ0..,1: Deep Sleep/Software Standby returns by IRQ0.." line.long 0x4 "WUPEN1,Wake Up Interrupt Enable Register 1" bitfld.long 0x4 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 18. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 14. "ULP1BWUPEN,ULPT1 Compare Match B Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT1..,1: Deep Sleep/Software Standby returns by ULPT1.." newline bitfld.long 0x4 13. "ULP1AWUPEN,ULPT1 Compare Match A Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT1..,1: Deep Sleep/Software Standby returns by ULPT1.." bitfld.long 0x4 12. "ULP1UWUPEN,ULPT1 Underflow Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT1..,1: Deep Sleep/Software Standby returns by ULPT1.." newline bitfld.long 0x4 11. "I3CWUPEN,I3C Wakeup Condition Detection Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by I3C wake..,1: Deep Sleep/Software Standby returns by I3C wake.." bitfld.long 0x4 10. "ULP0BWUPEN,ULPT0 Compare Match B Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT0..,1: Deep Sleep/Software Standby returns by ULPT0.." newline bitfld.long 0x4 9. "ULP0AWUPEN,ULPT0 Compare Match A Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT0..,1: Deep Sleep/Software Standby returns by ULPT0.." bitfld.long 0x4 8. "ULP0UWUPEN,ULPT0 Underflow Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT0..,1: Deep Sleep/Software Standby returns by ULPT0.." newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "COMPHS0WUPEN,Comparator-HS0 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by..,1: Deep Sleep/Software Standby returns by.." newline bitfld.long 0x4 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.word 0x200++0x1 line.word 0x0 "SELSR0,SYS Event Link Setting Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "SELS,SYS Event Link Select" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x300)++0x3 line.long 0x0 "IELSR$1,ICU Event Link Setting Register %s" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( '1' write to.." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.word 0x0 0.--8. 1. "IELS,Event selection to NVIC" repeat.end tree.end tree "ICU_COMMON" base ad:0x40006000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2)++0x0 line.byte 0x0 "IRQCR$1,IRQ Control Register %s" bitfld.byte 0x0 7. "FLTEN,IRQ Digital Filter Enable" "0: Digital filter is disabled,1: Digital filter is enabled" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4.--5. "FCLKSEL,IRQ Digital Filter Sampling Clock Select" "0: PCLKB,1: PCLKB/8,?,?" bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0.--1. "IRQMD,IRQ Detection Sense Select" "0: Falling edge,1: Rising edge,?,?" repeat.end group.byte 0x10++0x0 line.byte 0x0 "NMICR,NMI Pin Interrupt Control Register" bitfld.byte 0x0 7. "NFLTEN,NMI Digital Filter Enable" "0: Digital filter is disabled.,1: Digital filter is enabled." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4.--5. "NFCLKSEL,NMI Digital Filter Sampling Clock" "0: PCLKB,1: PCLKB/8,?,?" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "NMIMD,NMI Detection Set" "0: Falling edge,1: Rising edge" tree.end tree "ICU_COMMON_NS" base ad:0x50006000 repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2)++0x0 line.byte 0x0 "IRQCR$1,IRQ Control Register %s" bitfld.byte 0x0 7. "FLTEN,IRQ Digital Filter Enable" "0: Digital filter is disabled,1: Digital filter is enabled" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4.--5. "FCLKSEL,IRQ Digital Filter Sampling Clock Select" "0: PCLKB,1: PCLKB/8,?,?" bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0.--1. "IRQMD,IRQ Detection Sense Select" "0: Falling edge,1: Rising edge,?,?" repeat.end group.byte 0x10++0x0 line.byte 0x0 "NMICR,NMI Pin Interrupt Control Register" bitfld.byte 0x0 7. "NFLTEN,NMI Digital Filter Enable" "0: Digital filter is disabled.,1: Digital filter is enabled." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4.--5. "NFCLKSEL,NMI Digital Filter Sampling Clock" "0: PCLKB,1: PCLKB/8,?,?" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "NMIMD,NMI Detection Set" "0: Falling edge,1: Rising edge" tree.end tree "ICU_NS" base ad:0x5000C000 group.byte 0x10++0x0 line.byte 0x0 "SWIRQ_S,Software Interrupt Request Register for Secure Interrupt" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SWIRQS,Generates an interrupt for the other CPU subsystem." "0: (the value of the internal register..,?" group.byte 0x20++0x0 line.byte 0x0 "SWIRQ_NS,Software Interrupt Request Register for Non-secure Interrupt" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SWIRQNS,Generates an interrupt for the other CPU subsystem." "0: (the value of the internal register..,?" group.word 0x60++0x1 line.word 0x0 "IENMIER,Integrated Error NMI Interrupt Enable Registe for CPU" hexmask.word 0x0 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x0 2. "BUSEN,Integrated BUS error nmi Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1. "LMEN,Integrated Local Memory error nmi Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 0. "CMEN,Integrated Common Memory error nmi Enable" "0: Disabled,1: Enabled" group.word 0x100++0x1 line.word 0x0 "NMIER,Non-Maskable Interrupt Enable Register" bitfld.word 0x0 15. "LUEN,LockUp Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "CMEN,Common Memory error Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 12. "BUSEN,BUS error Interrupt Enable" "0: Disabled,1: Enabled" newline hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 7. "NMIEN,NMI Pin Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 6. "OSTEN,Oscillation Stop Detection Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 3. "PVD2EN,Voltage-Monitoring 2 Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 2. "PVD1EN,Voltage-Monitoring 1 Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 1. "WDTEN,WDT Underflow/Refresh Error Interrupt Enable" "0: Disabled,1: Enabled" bitfld.word 0x0 0. "IWDTEN,IWDT Underflow/Refresh Error Interrupt Enable" "0: Disabled,1: Enabled" group.word 0x110++0x1 line.word 0x0 "NMICLR,Non-Maskable Interrupt Status Clear Register" bitfld.word 0x0 15. "LUCLR,LU Clear" "0: No effect.,1: Clear the NMISR.LUST flag." bitfld.word 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 13. "CMCLR,CM Clear" "0: No effect.,1: Clear the NMISR.CMST flag." bitfld.word 0x0 12. "BUSCLR,Bus Clear" "0: No effect.,1: Clear the NMISR.BUSST flag." newline hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 7. "NMICLR,NMI Clear" "0: No effect.,1: Clear the NMISR.NMIST flag." newline bitfld.word 0x0 6. "OSTCLR,OST Clear" "0: No effect.,1: Clear the NMISR.OSTST flag." bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 3. "PVD2CLR,PVD2 Clear" "0: No effect.,1: Clear the NMISR.PVD2ST flag." bitfld.word 0x0 2. "PVD1CLR,PVD1 Clear" "0: No effect.,1: Clear the NMISR.PVD1ST flag." newline bitfld.word 0x0 1. "WDTCLR,WDT Clear" "0: No effect.,1: Clear the NMISR.WDTST flag." bitfld.word 0x0 0. "IWDTCLR,IWDT Clear" "0: No effect.,1: Clear the NMISR.IWDTST flag." rgroup.word 0x120++0x1 line.word 0x0 "NMISR,Non-Maskable Interrupt Status Register" bitfld.word 0x0 15. "LUST,LockUp Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 14. "Reserved,This bit is read as 0." "0,1" newline bitfld.word 0x0 13. "CMST,Common Memory error Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 12. "BUSST,BUS error Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." newline hexmask.word.byte 0x0 8.--11. 1. "Reserved,These bits are read as 0000." bitfld.word 0x0 7. "NMIST,NMI Status Flag" "0: interrupt not requested.,1: interrupt requested." newline bitfld.word 0x0 6. "OSTST,Oscillation Stop Detection Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 4.--5. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.word 0x0 3. "PVD2ST,Voltage-Monitoring 2 Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 2. "PVD1ST,Voltage-Monitoring 1 Interrupt Status Flag" "0: interrupt not requested.,1: interrupt requested." newline bitfld.word 0x0 1. "WDTST,WDT Underflow/Refresh Error Status Flag" "0: interrupt not requested.,1: interrupt requested." bitfld.word 0x0 0. "IWDTST,IWDT Underflow/Refresh Error Status Flag" "0: interrupt not requested.,1: interrupt requested." group.long 0x1A0++0x7 line.long 0x0 "WUPEN0,Wake Up Interrupt Enable Register 0" bitfld.long 0x0 31. "RIIC0WUPEN,RIIC0 Address Match Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by RIIC0..,1: Deep Sleep/Software Standby returns by RIIC0.." bitfld.long 0x0 30. "AGT1CBWUPEN,AGT1 Compare Match B Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by AGT1..,1: Deep Sleep/Software Standby returns by AGT1.." newline bitfld.long 0x0 29. "AGT1CAWUPEN,AGT1 Compare Match A Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by AGT1..,1: Deep Sleep/Software Standby returns by AGT1.." bitfld.long 0x0 28. "AGT1UDWUPEN,AGT1 Underflow Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by AGT1..,1: Deep Sleep/Software Standby returns by AGT1.." newline bitfld.long 0x0 27. "USBFSWUPEN,USBFS0 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by USBFS0..,1: Deep Sleep/Software Standby returns by USBFS0.." bitfld.long 0x0 26. "USBHSWUPEN,USBHS Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by USBHS..,1: Deep Sleep/Software Standby returns by USBHS.." newline bitfld.long 0x0 25. "RTCPRDWUPEN,RCT Period Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by RTC..,1: Deep Sleep/Software Standby returns by RTC.." bitfld.long 0x0 24. "RTCALMWUPEN,RTC Alarm Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by RTC alarm..,1: Deep Sleep/Software Standby returns by RTC alarm.." newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "VBATTWUPEN,VBATT Monitor Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by VBATT..,1: Deep Sleep/Software Standby returns by VBATT.." newline bitfld.long 0x0 19. "PVD2WUPEN,PVD2 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by PVD2..,1: Deep Sleep/Software Standby returns by PVD2.." bitfld.long 0x0 18. "PVD1WUPEN,PVD1 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by PVD1..,1: Deep Sleep/Software Standby returns by PVD1.." newline bitfld.long 0x0 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16. "IWDTWUPEN,IWDT Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IWDT..,1: Deep Sleep/Software Standby returns by IWDT.." newline bitfld.long 0x0 15. "IRQWUPEN15,IRQ15 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ15..,1: Deep Sleep/Software Standby returns by IRQ15.." bitfld.long 0x0 14. "IRQWUPEN14,IRQ14 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ14..,1: Deep Sleep/Software Standby returns by IRQ14.." newline bitfld.long 0x0 13. "IRQWUPEN13,IRQ13 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ13..,1: Deep Sleep/Software Standby returns by IRQ13.." bitfld.long 0x0 12. "IRQWUPEN12,IRQ12 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ12..,1: Deep Sleep/Software Standby returns by IRQ12.." newline bitfld.long 0x0 11. "IRQWUPEN11,IRQ11 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ11..,1: Deep Sleep/Software Standby returns by IRQ11.." bitfld.long 0x0 10. "IRQWUPEN10,IRQ10 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ10..,1: Deep Sleep/Software Standby returns by IRQ10.." newline bitfld.long 0x0 9. "IRQWUPEN9,IRQ9 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ9..,1: Deep Sleep/Software Standby returns by IRQ9.." bitfld.long 0x0 8. "IRQWUPEN8,IRQ8 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ8..,1: Deep Sleep/Software Standby returns by IRQ8.." newline bitfld.long 0x0 7. "IRQWUPEN7,IRQ7 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ7..,1: Deep Sleep/Software Standby returns by IRQ7.." bitfld.long 0x0 6. "IRQWUPEN6,IRQ6 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ6..,1: Deep Sleep/Software Standby returns by IRQ6.." newline bitfld.long 0x0 5. "IRQWUPEN5,IRQ5 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ5..,1: Deep Sleep/Software Standby returns by IRQ5.." bitfld.long 0x0 4. "IRQWUPEN4,IRQ4 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ4..,1: Deep Sleep/Software Standby returns by IRQ4.." newline bitfld.long 0x0 3. "IRQWUPEN3,IRQ3 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ3..,1: Deep Sleep/Software Standby returns by IRQ3.." bitfld.long 0x0 2. "IRQWUPEN2,IRQ2 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ2..,1: Deep Sleep/Software Standby returns by IRQ2.." newline bitfld.long 0x0 1. "IRQWUPEN1,IRQ1 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ1..,1: Deep Sleep/Software Standby returns by IRQ1.." bitfld.long 0x0 0. "IRQWUPEN0,IRQ0 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by IRQ0..,1: Deep Sleep/Software Standby returns by IRQ0.." line.long 0x4 "WUPEN1,Wake Up Interrupt Enable Register 1" bitfld.long 0x4 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 29. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 26. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 18. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 16. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 14. "ULP1BWUPEN,ULPT1 Compare Match B Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT1..,1: Deep Sleep/Software Standby returns by ULPT1.." newline bitfld.long 0x4 13. "ULP1AWUPEN,ULPT1 Compare Match A Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT1..,1: Deep Sleep/Software Standby returns by ULPT1.." bitfld.long 0x4 12. "ULP1UWUPEN,ULPT1 Underflow Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT1..,1: Deep Sleep/Software Standby returns by ULPT1.." newline bitfld.long 0x4 11. "I3CWUPEN,I3C Wakeup Condition Detection Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by I3C wake..,1: Deep Sleep/Software Standby returns by I3C wake.." bitfld.long 0x4 10. "ULP0BWUPEN,ULPT0 Compare Match B Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT0..,1: Deep Sleep/Software Standby returns by ULPT0.." newline bitfld.long 0x4 9. "ULP0AWUPEN,ULPT0 Compare Match A Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT0..,1: Deep Sleep/Software Standby returns by ULPT0.." bitfld.long 0x4 8. "ULP0UWUPEN,ULPT0 Underflow Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by ULPT0..,1: Deep Sleep/Software Standby returns by ULPT0.." newline hexmask.long.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x4 3. "COMPHS0WUPEN,Comparator-HS0 Interrupt Deep Sleep/Software Standby Returns Enable bit" "0: Deep Sleep/Software Standby returns by..,1: Deep Sleep/Software Standby returns by.." newline bitfld.long 0x4 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.word 0x200++0x1 line.word 0x0 "SELSR0,SYS Event Link Setting Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "SELS,SYS Event Link Select" repeat 96. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x300)++0x3 line.long 0x0 "IELSR$1,ICU Event Link Setting Register %s" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "DTCE,DTC Activation Enable" "0: DTC activation is disabled,1: DTC activation is enabled" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "IR,Interrupt Status Flag" "0: No interrupt request is generated,1: An interrupt request is generated ( '1' write to.." newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.word 0x0 0.--8. 1. "IELS,Event selection to NVIC" repeat.end tree.end tree.end tree "IIC (I2C Bus Interface)" base ad:0x0 tree "IIC0" base ad:0x4025E000 group.byte 0x0++0x9 line.byte 0x0 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x0 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)" bitfld.byte 0x0 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset.,1: Initiates the RIIC reset or internal reset." newline bitfld.byte 0x0 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle.,1: Outputs an extra SCL clock cycle." bitfld.byte 0x0 4. "SOWP,SCLO/SDAO Write Protect" "0: Enables a value to be written in SCLO bit and..,1: Disables a value to be written in SCLO bit and.." newline bitfld.byte 0x0 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low. /..,1: (Read)The RIIC has released the SCLn pin. /.." bitfld.byte 0x0 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low. /..,1: (Read)The RIIC has released the SDAn pin./.." newline rbitfld.byte 0x0 1. "SCLI,SCL Line Monitor" "0: SCLn line is low.,1: SCLn line is high." rbitfld.byte 0x0 0. "SDAI,SDA Line Monitor" "0: SDAn line is low.,1: SDAn line is high." line.byte 0x1 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x1 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state).,1: The I2C bus is occupied (bus busy state)." bitfld.byte 0x1 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode" newline bitfld.byte 0x1 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued." "0: Does not request to issue a stop condition.,1: Requests to issue a stop condition." bitfld.byte 0x1 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition." "0: Does not request to issue a restart condition.,1: Requests to issue a restart condition." newline bitfld.byte 0x1 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)." "0: Does not request to issue a start condition.,1: Requests to issue a start condition." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x2 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in ICCR2.,1: Enables writing to the MST and TRS bits in ICCR2." bitfld.byte 0x2 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,?,?,?,?,?,?" newline bitfld.byte 0x2 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0] bits.,1: Disables a value to be written in the BC[2:0].." bitfld.byte 0x2 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,?,?,?,?,?,?" line.byte 0x3 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x3 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is selected..,1: The internal reference clock divided by 2.." bitfld.byte 0x3 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC cycles..,?,?,?,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x3 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.byte 0x3 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected.,1: Short mode is selected." line.byte 0x4 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x4 7. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus is selected.,1: The SMBus is selected." bitfld.byte 0x4 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand." "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.byte 0x4 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of the..,1: The RDRF flag is set at the rising edge of the.." bitfld.byte 0x4 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled.,1: Modification of the ACKBT bit is enabled." newline bitfld.byte 0x4 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x4 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." newline bitfld.byte 0x4 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one fIIC cycle is filtered out..,1: Noise of up to two fIIC cycles is filtered out..,?,?" line.byte 0x5 "ICFER,I2C Bus Function Enable Register" bitfld.byte 0x5 7. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit is used for the..,1: An Fm+ slope control circuit is used for the.." bitfld.byte 0x5 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used.,1: An SCL synchronous circuit is used." newline bitfld.byte 0x5 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." bitfld.byte 0x5 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during NACK..,1: Transfer operation is suspended during NACK.." newline bitfld.byte 0x5 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled.,1: Slave arbitration-lost detection is enabled." bitfld.byte 0x5 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection is..,1: NACK transmission arbitration-lost detection is.." newline bitfld.byte 0x5 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled.,1: Master arbitration-lost detection is enabled." bitfld.byte 0x5 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled.,1: The timeout function is enabled." line.byte 0x6 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x6 7. "HOAE,Host Address Enable" "0: Host address detection is disabled.,1: Host address detection is enabled." bitfld.byte 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled.,1: Device-ID address detection is enabled." bitfld.byte 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled.,1: General call address detection is enabled." bitfld.byte 0x6 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled.,1: Slave address in SARL2 and SARU2 is enabled" newline bitfld.byte 0x6 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled.,1: Slave address in SARL1 and SARU1 is enabled." bitfld.byte 0x6 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled.,1: Slave address in SARL0 and SARU0 is enabled." line.byte 0x7 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x7 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request (TXI) is..,1: Transmit data empty interrupt request (TXI) is.." bitfld.byte 0x7 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (TEI) is disabled.,1: Transmit end interrupt request (TEI) is enabled." newline bitfld.byte 0x7 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request (RXI) is..,1: Receive data full interrupt request (RXI) is.." bitfld.byte 0x7 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.." newline bitfld.byte 0x7 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request (SPI)..,1: Stop condition detection interrupt request (SPI).." bitfld.byte 0x7 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.." newline bitfld.byte 0x7 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.." bitfld.byte 0x7 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled.,1: Timeout interrupt request (TMOI) is enabled." line.byte 0x8 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x8 7. "HOA,Host Address Detection Flag" "0: Host address is not detected.,1: Host address is detected." bitfld.byte 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected.,1: Device-ID command is detected." bitfld.byte 0x8 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected.,1: General call address is detected." bitfld.byte 0x8 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected.,1: Slave address 2 is detected" newline bitfld.byte 0x8 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected.,1: Slave address 1 is detected." bitfld.byte 0x8 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected.,1: Slave address 0 is detected." line.byte 0x9 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x9 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data.,1: ICDRT contains no transmit data." bitfld.byte 0x9 6. "TEND,Transmit End Flag" "0: Data is being transmitted.,1: Data has been transmitted." newline bitfld.byte 0x9 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data.,1: ICDRR contains receive data." bitfld.byte 0x9 4. "NACKF,NACK Detection Flag" "0: NACK is not detected.,1: NACK is detected." newline bitfld.byte 0x9 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected.,1: Stop condition is detected." bitfld.byte 0x9 2. "START,Start Condition Detection Flag" "0: Start condition is not detected.,1: Start condition is detected." newline bitfld.byte 0x9 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost.,1: Arbitration is lost." bitfld.byte 0x9 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected.,1: Timeout is detected." repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xA)++0x0 line.byte 0x0 "SARL$1,Slave Address Register L%s" hexmask.byte 0x0 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xB)++0x0 line.byte 0x0 "SARU$1,Slave Address Register U%s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SVA9,10-Bit Address(bit9)" "0,1" newline bitfld.byte 0x0 1. "SVA8,10-Bit Address(bit8)" "0,1" bitfld.byte 0x0 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected." repeat.end group.byte 0x10++0x2 line.byte 0x0 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x0 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.byte 0x0 0.--4. 1. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" line.byte 0x1 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" line.byte 0x2 "ICDRT,I2C Bus Transmit Data Register" hexmask.byte 0x2 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data." rgroup.byte 0x13++0x0 line.byte 0x0 "ICDRR,I2C Bus Receive Data Register" hexmask.byte 0x0 0.--7. 1. "ICDRR,8-bit register that stores the received data" tree.end tree "IIC0_NS" base ad:0x5025E000 group.byte 0x0++0x9 line.byte 0x0 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x0 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)" bitfld.byte 0x0 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset.,1: Initiates the RIIC reset or internal reset." newline bitfld.byte 0x0 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle.,1: Outputs an extra SCL clock cycle." bitfld.byte 0x0 4. "SOWP,SCLO/SDAO Write Protect" "0: Enables a value to be written in SCLO bit and..,1: Disables a value to be written in SCLO bit and.." newline bitfld.byte 0x0 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low. /..,1: (Read)The RIIC has released the SCLn pin. /.." bitfld.byte 0x0 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low. /..,1: (Read)The RIIC has released the SDAn pin./.." newline rbitfld.byte 0x0 1. "SCLI,SCL Line Monitor" "0: SCLn line is low.,1: SCLn line is high." rbitfld.byte 0x0 0. "SDAI,SDA Line Monitor" "0: SDAn line is low.,1: SDAn line is high." line.byte 0x1 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x1 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state).,1: The I2C bus is occupied (bus busy state)." bitfld.byte 0x1 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode" newline bitfld.byte 0x1 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued." "0: Does not request to issue a stop condition.,1: Requests to issue a stop condition." bitfld.byte 0x1 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition." "0: Does not request to issue a restart condition.,1: Requests to issue a restart condition." newline bitfld.byte 0x1 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)." "0: Does not request to issue a start condition.,1: Requests to issue a start condition." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x2 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in ICCR2.,1: Enables writing to the MST and TRS bits in ICCR2." bitfld.byte 0x2 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,?,?,?,?,?,?" newline bitfld.byte 0x2 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0] bits.,1: Disables a value to be written in the BC[2:0].." bitfld.byte 0x2 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,?,?,?,?,?,?" line.byte 0x3 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x3 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is selected..,1: The internal reference clock divided by 2.." bitfld.byte 0x3 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC cycles..,?,?,?,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x3 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.byte 0x3 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected.,1: Short mode is selected." line.byte 0x4 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x4 7. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus is selected.,1: The SMBus is selected." bitfld.byte 0x4 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand." "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.byte 0x4 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of the..,1: The RDRF flag is set at the rising edge of the.." bitfld.byte 0x4 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled.,1: Modification of the ACKBT bit is enabled." newline bitfld.byte 0x4 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x4 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." newline bitfld.byte 0x4 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one fIIC cycle is filtered out..,1: Noise of up to two fIIC cycles is filtered out..,?,?" line.byte 0x5 "ICFER,I2C Bus Function Enable Register" bitfld.byte 0x5 7. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit is used for the..,1: An Fm+ slope control circuit is used for the.." bitfld.byte 0x5 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used.,1: An SCL synchronous circuit is used." newline bitfld.byte 0x5 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." bitfld.byte 0x5 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during NACK..,1: Transfer operation is suspended during NACK.." newline bitfld.byte 0x5 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled.,1: Slave arbitration-lost detection is enabled." bitfld.byte 0x5 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection is..,1: NACK transmission arbitration-lost detection is.." newline bitfld.byte 0x5 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled.,1: Master arbitration-lost detection is enabled." bitfld.byte 0x5 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled.,1: The timeout function is enabled." line.byte 0x6 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x6 7. "HOAE,Host Address Enable" "0: Host address detection is disabled.,1: Host address detection is enabled." bitfld.byte 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled.,1: Device-ID address detection is enabled." bitfld.byte 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled.,1: General call address detection is enabled." bitfld.byte 0x6 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled.,1: Slave address in SARL2 and SARU2 is enabled" newline bitfld.byte 0x6 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled.,1: Slave address in SARL1 and SARU1 is enabled." bitfld.byte 0x6 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled.,1: Slave address in SARL0 and SARU0 is enabled." line.byte 0x7 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x7 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request (TXI) is..,1: Transmit data empty interrupt request (TXI) is.." bitfld.byte 0x7 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (TEI) is disabled.,1: Transmit end interrupt request (TEI) is enabled." newline bitfld.byte 0x7 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request (RXI) is..,1: Receive data full interrupt request (RXI) is.." bitfld.byte 0x7 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.." newline bitfld.byte 0x7 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request (SPI)..,1: Stop condition detection interrupt request (SPI).." bitfld.byte 0x7 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.." newline bitfld.byte 0x7 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.." bitfld.byte 0x7 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled.,1: Timeout interrupt request (TMOI) is enabled." line.byte 0x8 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x8 7. "HOA,Host Address Detection Flag" "0: Host address is not detected.,1: Host address is detected." bitfld.byte 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected.,1: Device-ID command is detected." bitfld.byte 0x8 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected.,1: General call address is detected." bitfld.byte 0x8 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected.,1: Slave address 2 is detected" newline bitfld.byte 0x8 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected.,1: Slave address 1 is detected." bitfld.byte 0x8 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected.,1: Slave address 0 is detected." line.byte 0x9 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x9 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data.,1: ICDRT contains no transmit data." bitfld.byte 0x9 6. "TEND,Transmit End Flag" "0: Data is being transmitted.,1: Data has been transmitted." newline bitfld.byte 0x9 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data.,1: ICDRR contains receive data." bitfld.byte 0x9 4. "NACKF,NACK Detection Flag" "0: NACK is not detected.,1: NACK is detected." newline bitfld.byte 0x9 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected.,1: Stop condition is detected." bitfld.byte 0x9 2. "START,Start Condition Detection Flag" "0: Start condition is not detected.,1: Start condition is detected." newline bitfld.byte 0x9 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost.,1: Arbitration is lost." bitfld.byte 0x9 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected.,1: Timeout is detected." repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xA)++0x0 line.byte 0x0 "SARL$1,Slave Address Register L%s" hexmask.byte 0x0 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xB)++0x0 line.byte 0x0 "SARU$1,Slave Address Register U%s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SVA9,10-Bit Address(bit9)" "0,1" newline bitfld.byte 0x0 1. "SVA8,10-Bit Address(bit8)" "0,1" bitfld.byte 0x0 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected." repeat.end group.byte 0x10++0x2 line.byte 0x0 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x0 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.byte 0x0 0.--4. 1. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" line.byte 0x1 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" line.byte 0x2 "ICDRT,I2C Bus Transmit Data Register" hexmask.byte 0x2 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data." rgroup.byte 0x13++0x0 line.byte 0x0 "ICDRR,I2C Bus Receive Data Register" hexmask.byte 0x0 0.--7. 1. "ICDRR,8-bit register that stores the received data" tree.end tree "IIC0WU" base ad:0x4025E014 group.byte 0x2++0x1 line.byte 0x0 "ICWUR,I2C Bus Wake Up Unit Register" bitfld.byte 0x0 7. "WUE,Wake Up function Enable" "0: Wake-up function is disabled,1: Wake-up function is enabled." bitfld.byte 0x0 6. "WUIE,Wake Up Interrupt Request Enable" "0: Wake Up Interrupt Request (WUI) is disabled.,1: Wake Up Interrupt Request (WUI) is enabled." newline bitfld.byte 0x0 5. "WUF,Wake-Up Event Occurrence Flag" "0: Slave address match during Wake-Up function.,1: Slave address not match during Wake-Up function." bitfld.byte 0x0 4. "WUACK,Asynchronous/Synchronous Operation State Flag" "0: State of synchronous operation,1: State of asynchronous operation" newline rbitfld.byte 0x0 3. "WUBFR,Bus Free During Wake-Up Mode" "0: IIC bus is busy during Wake-Up mode,1: IIC bus is free during Wake-Up mode" bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "WUAFA,Wake-Up Analog Filter Additional Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." line.byte 0x1 "ICWUR2,I2C Bus Wake Up Unit Register 2" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." rbitfld.byte 0x1 2. "WUSYF,Wake-Up function synchronous operation status flag" "0: IIC asynchronous circuit enable condition,1: IIC synchronous circuit enable condition" newline rbitfld.byte 0x1 1. "WUASYF,Wake-Up function asynchronous operation status flag" "0: IIC synchronous circuit enable condition,1: IIC asynchronous circuit enable condition" bitfld.byte 0x1 0. "WUSEN,Wake-Up function synchronous enable" "0: IIC asynchronous circuit enable,1: IIC synchronous circuit enable" tree.end tree "IIC0WU_NS" base ad:0x5025E014 group.byte 0x2++0x1 line.byte 0x0 "ICWUR,I2C Bus Wake Up Unit Register" bitfld.byte 0x0 7. "WUE,Wake Up function Enable" "0: Wake-up function is disabled,1: Wake-up function is enabled." bitfld.byte 0x0 6. "WUIE,Wake Up Interrupt Request Enable" "0: Wake Up Interrupt Request (WUI) is disabled.,1: Wake Up Interrupt Request (WUI) is enabled." newline bitfld.byte 0x0 5. "WUF,Wake-Up Event Occurrence Flag" "0: Slave address match during Wake-Up function.,1: Slave address not match during Wake-Up function." bitfld.byte 0x0 4. "WUACK,Asynchronous/Synchronous Operation State Flag" "0: State of synchronous operation,1: State of asynchronous operation" newline rbitfld.byte 0x0 3. "WUBFR,Bus Free During Wake-Up Mode" "0: IIC bus is busy during Wake-Up mode,1: IIC bus is free during Wake-Up mode" bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "WUAFA,Wake-Up Analog Filter Additional Selection" "0: Do not add the Wake Up analog filter.,1: Add the Wake Up analog filter." line.byte 0x1 "ICWUR2,I2C Bus Wake Up Unit Register 2" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." rbitfld.byte 0x1 2. "WUSYF,Wake-Up function synchronous operation status flag" "0: IIC asynchronous circuit enable condition,1: IIC synchronous circuit enable condition" newline rbitfld.byte 0x1 1. "WUASYF,Wake-Up function asynchronous operation status flag" "0: IIC synchronous circuit enable condition,1: IIC asynchronous circuit enable condition" bitfld.byte 0x1 0. "WUSEN,Wake-Up function synchronous enable" "0: IIC asynchronous circuit enable,1: IIC synchronous circuit enable" tree.end tree "IIC1" base ad:0x4025E100 group.byte 0x0++0x9 line.byte 0x0 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x0 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)" bitfld.byte 0x0 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset.,1: Initiates the RIIC reset or internal reset." newline bitfld.byte 0x0 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle.,1: Outputs an extra SCL clock cycle." bitfld.byte 0x0 4. "SOWP,SCLO/SDAO Write Protect" "0: Enables a value to be written in SCLO bit and..,1: Disables a value to be written in SCLO bit and.." newline bitfld.byte 0x0 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low. /..,1: (Read)The RIIC has released the SCLn pin. /.." bitfld.byte 0x0 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low. /..,1: (Read)The RIIC has released the SDAn pin./.." newline rbitfld.byte 0x0 1. "SCLI,SCL Line Monitor" "0: SCLn line is low.,1: SCLn line is high." rbitfld.byte 0x0 0. "SDAI,SDA Line Monitor" "0: SDAn line is low.,1: SDAn line is high." line.byte 0x1 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x1 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state).,1: The I2C bus is occupied (bus busy state)." bitfld.byte 0x1 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode" newline bitfld.byte 0x1 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued." "0: Does not request to issue a stop condition.,1: Requests to issue a stop condition." bitfld.byte 0x1 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition." "0: Does not request to issue a restart condition.,1: Requests to issue a restart condition." newline bitfld.byte 0x1 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)." "0: Does not request to issue a start condition.,1: Requests to issue a start condition." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x2 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in ICCR2.,1: Enables writing to the MST and TRS bits in ICCR2." bitfld.byte 0x2 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,?,?,?,?,?,?" newline bitfld.byte 0x2 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0] bits.,1: Disables a value to be written in the BC[2:0].." bitfld.byte 0x2 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,?,?,?,?,?,?" line.byte 0x3 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x3 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is selected..,1: The internal reference clock divided by 2.." bitfld.byte 0x3 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC cycles..,?,?,?,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x3 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.byte 0x3 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected.,1: Short mode is selected." line.byte 0x4 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x4 7. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus is selected.,1: The SMBus is selected." bitfld.byte 0x4 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand." "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.byte 0x4 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of the..,1: The RDRF flag is set at the rising edge of the.." bitfld.byte 0x4 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled.,1: Modification of the ACKBT bit is enabled." newline bitfld.byte 0x4 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x4 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." newline bitfld.byte 0x4 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one fIIC cycle is filtered out..,1: Noise of up to two fIIC cycles is filtered out..,?,?" line.byte 0x5 "ICFER,I2C Bus Function Enable Register" bitfld.byte 0x5 7. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit is used for the..,1: An Fm+ slope control circuit is used for the.." bitfld.byte 0x5 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used.,1: An SCL synchronous circuit is used." newline bitfld.byte 0x5 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." bitfld.byte 0x5 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during NACK..,1: Transfer operation is suspended during NACK.." newline bitfld.byte 0x5 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled.,1: Slave arbitration-lost detection is enabled." bitfld.byte 0x5 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection is..,1: NACK transmission arbitration-lost detection is.." newline bitfld.byte 0x5 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled.,1: Master arbitration-lost detection is enabled." bitfld.byte 0x5 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled.,1: The timeout function is enabled." line.byte 0x6 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x6 7. "HOAE,Host Address Enable" "0: Host address detection is disabled.,1: Host address detection is enabled." bitfld.byte 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled.,1: Device-ID address detection is enabled." bitfld.byte 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled.,1: General call address detection is enabled." bitfld.byte 0x6 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled.,1: Slave address in SARL2 and SARU2 is enabled" newline bitfld.byte 0x6 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled.,1: Slave address in SARL1 and SARU1 is enabled." bitfld.byte 0x6 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled.,1: Slave address in SARL0 and SARU0 is enabled." line.byte 0x7 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x7 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request (TXI) is..,1: Transmit data empty interrupt request (TXI) is.." bitfld.byte 0x7 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (TEI) is disabled.,1: Transmit end interrupt request (TEI) is enabled." newline bitfld.byte 0x7 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request (RXI) is..,1: Receive data full interrupt request (RXI) is.." bitfld.byte 0x7 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.." newline bitfld.byte 0x7 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request (SPI)..,1: Stop condition detection interrupt request (SPI).." bitfld.byte 0x7 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.." newline bitfld.byte 0x7 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.." bitfld.byte 0x7 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled.,1: Timeout interrupt request (TMOI) is enabled." line.byte 0x8 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x8 7. "HOA,Host Address Detection Flag" "0: Host address is not detected.,1: Host address is detected." bitfld.byte 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected.,1: Device-ID command is detected." bitfld.byte 0x8 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected.,1: General call address is detected." bitfld.byte 0x8 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected.,1: Slave address 2 is detected" newline bitfld.byte 0x8 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected.,1: Slave address 1 is detected." bitfld.byte 0x8 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected.,1: Slave address 0 is detected." line.byte 0x9 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x9 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data.,1: ICDRT contains no transmit data." bitfld.byte 0x9 6. "TEND,Transmit End Flag" "0: Data is being transmitted.,1: Data has been transmitted." newline bitfld.byte 0x9 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data.,1: ICDRR contains receive data." bitfld.byte 0x9 4. "NACKF,NACK Detection Flag" "0: NACK is not detected.,1: NACK is detected." newline bitfld.byte 0x9 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected.,1: Stop condition is detected." bitfld.byte 0x9 2. "START,Start Condition Detection Flag" "0: Start condition is not detected.,1: Start condition is detected." newline bitfld.byte 0x9 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost.,1: Arbitration is lost." bitfld.byte 0x9 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected.,1: Timeout is detected." repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xA)++0x0 line.byte 0x0 "SARL$1,Slave Address Register L%s" hexmask.byte 0x0 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xB)++0x0 line.byte 0x0 "SARU$1,Slave Address Register U%s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SVA9,10-Bit Address(bit9)" "0,1" newline bitfld.byte 0x0 1. "SVA8,10-Bit Address(bit8)" "0,1" bitfld.byte 0x0 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected." repeat.end group.byte 0x10++0x2 line.byte 0x0 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x0 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.byte 0x0 0.--4. 1. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" line.byte 0x1 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" line.byte 0x2 "ICDRT,I2C Bus Transmit Data Register" hexmask.byte 0x2 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data." rgroup.byte 0x13++0x0 line.byte 0x0 "ICDRR,I2C Bus Receive Data Register" hexmask.byte 0x0 0.--7. 1. "ICDRR,8-bit register that stores the received data" tree.end tree "IIC1_NS" base ad:0x5025E100 group.byte 0x0++0x9 line.byte 0x0 "ICCR1,I2C Bus Control Register 1" bitfld.byte 0x0 7. "ICE,I2C Bus Interface Enable" "0: Disable (SCLn and SDAn pins in inactive state),1: Enable (SCLn and SDAn pins in active state)" bitfld.byte 0x0 6. "IICRST,I2C Bus Interface Internal ResetNote:If an internal reset is initiated using the IICRST bit for a bus hang-up occurred during communication with the master device in slave mode the states may become different between the slave device and the.." "0: Releases the RIIC reset or internal reset.,1: Initiates the RIIC reset or internal reset." newline bitfld.byte 0x0 5. "CLO,Extra SCL Clock Cycle Output" "0: Does not output an extra SCL clock cycle.,1: Outputs an extra SCL clock cycle." bitfld.byte 0x0 4. "SOWP,SCLO/SDAO Write Protect" "0: Enables a value to be written in SCLO bit and..,1: Disables a value to be written in SCLO bit and.." newline bitfld.byte 0x0 3. "SCLO,SCL Output Control/Monitor" "0: (Read)The RIIC has driven the SCLn pin low. /..,1: (Read)The RIIC has released the SCLn pin. /.." bitfld.byte 0x0 2. "SDAO,SDA Output Control/Monitor" "0: (Read)The RIIC has driven the SDAn pin low. /..,1: (Read)The RIIC has released the SDAn pin./.." newline rbitfld.byte 0x0 1. "SCLI,SCL Line Monitor" "0: SCLn line is low.,1: SCLn line is high." rbitfld.byte 0x0 0. "SDAI,SDA Line Monitor" "0: SDAn line is low.,1: SDAn line is high." line.byte 0x1 "ICCR2,I2C Bus Control Register 2" rbitfld.byte 0x1 7. "BBSY,Bus Busy Detection Flag" "0: The I2C bus is released (bus free state).,1: The I2C bus is occupied (bus busy state)." bitfld.byte 0x1 6. "MST,Master/Slave Mode" "0: Slave mode,1: Master mode" newline bitfld.byte 0x1 5. "TRS,Transmit/Receive Mode" "0: Receive mode,1: Transmit mode" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "SP,Stop Condition Issuance RequestNote: Writing to the SP bit is not possible while the setting of the BBSY flag is 0 (bus free state).Note: Do not set the SP bit to 1 while a restart condition is being issued." "0: Does not request to issue a stop condition.,1: Requests to issue a stop condition." bitfld.byte 0x1 2. "RS,Restart Condition Issuance RequestNote: Do not set the RS bit to 1 while issuing a stop condition." "0: Does not request to issue a restart condition.,1: Requests to issue a restart condition." newline bitfld.byte 0x1 1. "ST,Start Condition Issuance RequestSet the ST bit to 1 (start condition issuance request) when the BBSY flag is set to 0 (bus free state)." "0: Does not request to issue a start condition.,1: Requests to issue a start condition." bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ICMR1,I2C Bus Mode Register 1" bitfld.byte 0x2 7. "MTWP,MST/TRS Write Protect" "0: Disables writing to the MST and TRS bits in ICCR2.,1: Enables writing to the MST and TRS bits in ICCR2." bitfld.byte 0x2 4.--6. "CKS,Internal Reference Clock (fIIC) Selection ( fIIC = PCLKB / 2^CKS )" "0: PCLKB/1 clock,1: PCLKB/2 clock,?,?,?,?,?,?" newline bitfld.byte 0x2 3. "BCWP,BC Write Protect(This bit is read as 1.)" "0: Enables a value to be written in the BC[2:0] bits.,1: Disables a value to be written in the BC[2:0].." bitfld.byte 0x2 0.--2. "BC,Bit Counter" "0: 9 bits,1: 2 bits,?,?,?,?,?,?" line.byte 0x3 "ICMR2,I2C Bus Mode Register 2" bitfld.byte 0x3 7. "DLCS,SDA Output Delay Clock Source Selection" "0: The internal reference clock (fIIC) is selected..,1: The internal reference clock divided by 2.." bitfld.byte 0x3 4.--6. "SDDL,SDA Output Delay Counter" "0: No output delay,1: 1 fIIC cycle (ICMR2.DLCS=0) / 1 or 2 fIIC cycles..,?,?,?,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TMOH,Timeout H Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a.." newline bitfld.byte 0x3 1. "TMOL,Timeout L Count Control" "0: Count is disabled while the SCLn line is at a..,1: Count is enabled while the SCLn line is at a low.." bitfld.byte 0x3 0. "TMOS,Timeout Detection Time Selection" "0: Long mode is selected.,1: Short mode is selected." line.byte 0x4 "ICMR3,I2C Bus Mode Register 3" bitfld.byte 0x4 7. "SMBS,SMBus/I2C Bus Selection" "0: The I2C bus is selected.,1: The SMBus is selected." bitfld.byte 0x4 6. "WAIT,WAITNote: When the value of the WAIT bit is to be read be sure to read the ICDRR beforehand." "0: No WAIT (The period between ninth clock cycle..,1: WAIT (The period between ninth clock cycle and.." newline bitfld.byte 0x4 5. "RDRFS,RDRF Flag Set Timing Selection" "0: The RDRF flag is set at the rising edge of the..,1: The RDRF flag is set at the rising edge of the.." bitfld.byte 0x4 4. "ACKWP,ACKBT Write Protect" "0: Modification of the ACKBT bit is disabled.,1: Modification of the ACKBT bit is enabled." newline bitfld.byte 0x4 3. "ACKBT,Transmit Acknowledge" "0: A 0 is sent as the acknowledge bit (ACK..,1: A 1 is sent as the acknowledge bit (NACK.." rbitfld.byte 0x4 2. "ACKBR,Receive Acknowledge" "0: A 0 is received as the acknowledge bit (ACK..,1: A 1 is received as the acknowledge bit (NACK.." newline bitfld.byte 0x4 0.--1. "NF,Noise Filter Stage Selection" "0: Noise of up to one fIIC cycle is filtered out..,1: Noise of up to two fIIC cycles is filtered out..,?,?" line.byte 0x5 "ICFER,I2C Bus Function Enable Register" bitfld.byte 0x5 7. "FMPE,Fast-mode Plus Enable" "0: No Fm+ slope control circuit is used for the..,1: An Fm+ slope control circuit is used for the.." bitfld.byte 0x5 6. "SCLE,SCL Synchronous Circuit Enable" "0: No SCL synchronous circuit is used.,1: An SCL synchronous circuit is used." newline bitfld.byte 0x5 5. "NFE,Digital Noise Filter Circuit Enable" "0: No digital noise filter circuit is used.,1: A digital noise filter circuit is used." bitfld.byte 0x5 4. "NACKE,NACK Reception Transfer Suspension Enable" "0: Transfer operation is not suspended during NACK..,1: Transfer operation is suspended during NACK.." newline bitfld.byte 0x5 3. "SALE,Slave Arbitration-Lost Detection Enable" "0: Slave arbitration-lost detection is disabled.,1: Slave arbitration-lost detection is enabled." bitfld.byte 0x5 2. "NALE,NACK Transmission Arbitration-Lost Detection Enable" "0: NACK transmission arbitration-lost detection is..,1: NACK transmission arbitration-lost detection is.." newline bitfld.byte 0x5 1. "MALE,Master Arbitration-Lost Detection Enable" "0: Master arbitration-lost detection is disabled.,1: Master arbitration-lost detection is enabled." bitfld.byte 0x5 0. "TMOE,Timeout Function Enable" "0: The timeout function is disabled.,1: The timeout function is enabled." line.byte 0x6 "ICSER,I2C Bus Status Enable Register" bitfld.byte 0x6 7. "HOAE,Host Address Enable" "0: Host address detection is disabled.,1: Host address detection is enabled." bitfld.byte 0x6 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 5. "DIDE,Device-ID Address Detection Enable" "0: Device-ID address detection is disabled.,1: Device-ID address detection is enabled." bitfld.byte 0x6 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x6 3. "GCAE,General Call Address Enable" "0: General call address detection is disabled.,1: General call address detection is enabled." bitfld.byte 0x6 2. "SAR2E,Slave Address Register 2 Enable" "0: Slave address in SARL2 and SARU2 is disabled.,1: Slave address in SARL2 and SARU2 is enabled" newline bitfld.byte 0x6 1. "SAR1E,Slave Address Register 1 Enable" "0: Slave address in SARL1 and SARU1 is disabled.,1: Slave address in SARL1 and SARU1 is enabled." bitfld.byte 0x6 0. "SAR0E,Slave Address Register 0 Enable" "0: Slave address in SARL0 and SARU0 is disabled.,1: Slave address in SARL0 and SARU0 is enabled." line.byte 0x7 "ICIER,I2C Bus Interrupt Enable Register" bitfld.byte 0x7 7. "TIE,Transmit Data Empty Interrupt Request Enable" "0: Transmit data empty interrupt request (TXI) is..,1: Transmit data empty interrupt request (TXI) is.." bitfld.byte 0x7 6. "TEIE,Transmit End Interrupt Request Enable" "0: Transmit end interrupt request (TEI) is disabled.,1: Transmit end interrupt request (TEI) is enabled." newline bitfld.byte 0x7 5. "RIE,Receive Data Full Interrupt Request Enable" "0: Receive data full interrupt request (RXI) is..,1: Receive data full interrupt request (RXI) is.." bitfld.byte 0x7 4. "NAKIE,NACK Reception Interrupt Request Enable" "0: NACK reception interrupt request (NAKI) is..,1: NACK reception interrupt request (NAKI) is.." newline bitfld.byte 0x7 3. "SPIE,Stop Condition Detection Interrupt Request Enable" "0: Stop condition detection interrupt request (SPI)..,1: Stop condition detection interrupt request (SPI).." bitfld.byte 0x7 2. "STIE,Start Condition Detection Interrupt Request Enable" "0: Start condition detection interrupt request..,1: Start condition detection interrupt request.." newline bitfld.byte 0x7 1. "ALIE,Arbitration-Lost Interrupt Request Enable" "0: Arbitration-lost interrupt request (ALI) is..,1: Arbitration-lost interrupt request (ALI) is.." bitfld.byte 0x7 0. "TMOIE,Timeout Interrupt Request Enable" "0: Timeout interrupt request (TMOI) is disabled.,1: Timeout interrupt request (TMOI) is enabled." line.byte 0x8 "ICSR1,I2C Bus Status Register 1" bitfld.byte 0x8 7. "HOA,Host Address Detection Flag" "0: Host address is not detected.,1: Host address is detected." bitfld.byte 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 5. "DID,Device-ID Address Detection Flag" "0: Device-ID command is not detected.,1: Device-ID command is detected." bitfld.byte 0x8 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x8 3. "GCA,General Call Address Detection Flag" "0: General call address is not detected.,1: General call address is detected." bitfld.byte 0x8 2. "AAS2,Slave Address 2 Detection Flag" "0: Slave address 2 is not detected.,1: Slave address 2 is detected" newline bitfld.byte 0x8 1. "AAS1,Slave Address 1 Detection Flag" "0: Slave address 1 is not detected.,1: Slave address 1 is detected." bitfld.byte 0x8 0. "AAS0,Slave Address 0 Detection Flag" "0: Slave address 0 is not detected.,1: Slave address 0 is detected." line.byte 0x9 "ICSR2,I2C Bus Status Register 2" rbitfld.byte 0x9 7. "TDRE,Transmit Data Empty Flag" "0: ICDRT contains transmit data.,1: ICDRT contains no transmit data." bitfld.byte 0x9 6. "TEND,Transmit End Flag" "0: Data is being transmitted.,1: Data has been transmitted." newline bitfld.byte 0x9 5. "RDRF,Receive Data Full Flag" "0: ICDRR contains no receive data.,1: ICDRR contains receive data." bitfld.byte 0x9 4. "NACKF,NACK Detection Flag" "0: NACK is not detected.,1: NACK is detected." newline bitfld.byte 0x9 3. "STOP,Stop Condition Detection Flag" "0: Stop condition is not detected.,1: Stop condition is detected." bitfld.byte 0x9 2. "START,Start Condition Detection Flag" "0: Start condition is not detected.,1: Start condition is detected." newline bitfld.byte 0x9 1. "AL,Arbitration-Lost Flag" "0: Arbitration is not lost.,1: Arbitration is lost." bitfld.byte 0x9 0. "TMOF,Timeout Detection Flag" "0: Timeout is not detected.,1: Timeout is detected." repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xA)++0x0 line.byte 0x0 "SARL$1,Slave Address Register L%s" hexmask.byte 0x0 0.--7. 1. "SVA,A slave address is set.7-Bit Address = SVA[7:1] 10-Bit Address = { SVA9 SVA8 SVA[7:0] }" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xB)++0x0 line.byte 0x0 "SARU$1,Slave Address Register U%s" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "SVA9,10-Bit Address(bit9)" "0,1" newline bitfld.byte 0x0 1. "SVA8,10-Bit Address(bit8)" "0,1" bitfld.byte 0x0 0. "FS,7-Bit/10-Bit Address Format Selection" "0: The 7-bit address format is selected.,1: The 10-bit address format is selected." repeat.end group.byte 0x10++0x2 line.byte 0x0 "ICBRL,I2C Bus Bit Rate Low-Level Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x0 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.byte 0x0 0.--4. 1. "BRL,Bit Rate Low-Level Period(Low-level period of SCL clock)" line.byte 0x1 "ICBRH,I2C Bus Bit Rate High-Level Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "BRH,Bit Rate High-Level Period(High-level period of SCL clock)" line.byte 0x2 "ICDRT,I2C Bus Transmit Data Register" hexmask.byte 0x2 0.--7. 1. "ICDRT,8-bit read-write register that stores transmit data." rgroup.byte 0x13++0x0 line.byte 0x0 "ICDRR,I2C Bus Receive Data Register" hexmask.byte 0x0 0.--7. 1. "ICDRR,8-bit register that stores the received data" tree.end tree.end tree "IWDT (Independent Watchdog Timer)" base ad:0x0 tree "IWDT" base ad:0x40202200 group.byte 0x0++0x0 line.byte 0x0 "IWDTRR,IWDT Refresh Register" hexmask.byte 0x0 0.--7. 1. "IWDTRR,The down-counter is refreshed by writing 00h and then writing FFh to this register." group.word 0x2++0x1 line.word 0x0 "IWDTCR,IWDT Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "RPSS,Window Start Position Select" "0: 25%,1: 50%,?,?" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "RPES,Window End Position Select" "0: 75%,1: 50%,?,?" newline hexmask.word.byte 0x0 4.--7. 1. "CKS,Clock Division Ratio Select" bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 0.--1. "TOPS,Timeout Period Select" "0: 128 cycles (007Fh),1: 512 cycles (01FFh),?,?" group.byte 0x6++0x0 line.byte 0x0 "IWDTRCR,IWDT Reset Control Register" bitfld.byte 0x0 7. "RSTIRQS,Reset Interrupt Request Select" "0: Non-maskable interrupt request or interrupt..,1: Reset output is enabled." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x8++0x0 line.byte 0x0 "IWDTCSTPR,IWDT Count Stop Control Register" bitfld.byte 0x0 7. "SLCSTP,Sleep-Mode Count Stop Control" "0: Count stop is disabled,1: Count is stopped when transition to Sleep mode" bitfld.byte 0x0 6. "CPU0SEL,Counter Interlocking CPU Select" "0: Select CPU # 1 as the CPU interlocked with the..,1: Select CPU # 0 as the CPU interlocked with the.." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." tree.end tree "IWDT_NS" base ad:0x50202200 group.byte 0x0++0x0 line.byte 0x0 "IWDTRR,IWDT Refresh Register" hexmask.byte 0x0 0.--7. 1. "IWDTRR,The down-counter is refreshed by writing 00h and then writing FFh to this register." group.word 0x2++0x1 line.word 0x0 "IWDTCR,IWDT Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "RPSS,Window Start Position Select" "0: 25%,1: 50%,?,?" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "RPES,Window End Position Select" "0: 75%,1: 50%,?,?" newline hexmask.word.byte 0x0 4.--7. 1. "CKS,Clock Division Ratio Select" bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 0.--1. "TOPS,Timeout Period Select" "0: 128 cycles (007Fh),1: 512 cycles (01FFh),?,?" group.byte 0x6++0x0 line.byte 0x0 "IWDTRCR,IWDT Reset Control Register" bitfld.byte 0x0 7. "RSTIRQS,Reset Interrupt Request Select" "0: Non-maskable interrupt request or interrupt..,1: Reset output is enabled." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x8++0x0 line.byte 0x0 "IWDTCSTPR,IWDT Count Stop Control Register" bitfld.byte 0x0 7. "SLCSTP,Sleep-Mode Count Stop Control" "0: Count stop is disabled,1: Count is stopped when transition to Sleep mode" bitfld.byte 0x0 6. "CPU0SEL,Counter Interlocking CPU Select" "0: Select CPU # 1 as the CPU interlocked with the..,1: Select CPU # 0 as the CPU interlocked with the.." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." tree.end tree.end tree "MSTP (Module Stop Control)" base ad:0x0 tree "MSTP" base ad:0x40203000 group.long 0x0++0x13 line.long 0x0 "MSTPCRA,Module Stop Control Register A" hexmask.long.word 0x0 23.--31. 1. "Reserved,These bits are read as 111111111. The write value should be 111111111." bitfld.long 0x0 22. "MSTPA22,DMA Controller/Data Transfer Controller unit0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" hexmask.long.byte 0x0 16.--21. 1. "Reserved,These bits are read as 111111. The write value should be 111111." newline bitfld.long 0x0 15. "MSTPA15,Standby SRAM Module Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x0 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 13. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 12. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 11. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.byte 0x0 6.--10. 1. "Reserved,These bits are read as 11111. The write value should be 11111." newline bitfld.long 0x0 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 1. "MSTPA1,SRAM1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x0 0. "MSTPA0,SRAM0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" line.long 0x4 "MSTPCRB,Module Stop Control Register B" bitfld.long 0x4 31. "MSTPB31,Serial Communication Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 30. "MSTPB30,Serial Communication Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 29. "MSTPB29,Serial Communication Interface 2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x4 28. "MSTPB28,Serial Communication Interface 3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 27. "MSTPB27,Serial Communication Interface 4 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 26. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 22. "MSTPB22,Serial Communication Interface 9 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 20.--21. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x4 19. "MSTPB19,Serial Peripheral Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x4 18. "MSTPB18,Serial Peripheral Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 17. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 16. "MSTPB16,Octa Memory Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state." newline bitfld.long 0x4 15. "MSTPB15,ETHERC0 and EDMAC0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 13. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 12. "MSTPB12,Universal Serial Bus 2.0 HS Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 11. "MSTPB11,Universal Serial Bus 2.0 FS0 Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 10. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 9. "MSTPB9,I2C Bus Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 8. "MSTPB8,I2C Bus Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 6. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 4. "MSTPB4,I3C Bus Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x4 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 1. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" line.long 0x8 "MSTPCRC,Module Stop Control Register C" bitfld.long 0x8 31. "MSTPC31,SHIP Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 28.--30. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x8 27. "MSTPC27,Controller Area Network with Flexible Data-Rate 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x8 26. "MSTPC26,Controller Area Network with Flexible Data-Rate 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" hexmask.long.byte 0x8 22.--25. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.long 0x8 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 20. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 19. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 18. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 17. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 16. "MSTPC16,CEU Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 15. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 14. "MSTPC14,Event Link Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 13. "MSTPC13,Data Operation Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 12. "MSTPC12,Secure Digital Host IF 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x8 11. "MSTPC11,Secure Digital Host IF 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 10. "MSTPC10,MIPI Display Serial Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 9. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 8. "MSTPC8,Serial Sound Interface0 Enhanced Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 7. "MSTPC7,Serial Sound Interface1 Enhanced Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 6. "MSTPC6,2D Drawing Engine Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x8 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 4. "MSTPC4,Graphics LCD Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 1. "MSTPC1,Cyclic Redundancy Check Calculator Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 0. "MSTPC0,Clock Frequency Accuracy Measurement Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" line.long 0xC "MSTPCRD,Module Stop Control Register D" bitfld.long 0xC 29.--31. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0xC 28. "MSTPD28,High-Speed Analog Com-parator 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 27. "MSTPD27,High-Speed Analog Com-parator 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 26. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 25. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 24. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 22. "MSTPD22,Temperature Sensor Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 20. "MSTPD20,12-Bit D/A Converter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 17.--19. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "MSTPD16,12-bit A/D Converter 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 15. "MSTPD15,12-bit A/D Converter 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 14. "MSTPD14,Port Output Enable for GPT0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 13. "MSTPD13,Port Output Enable for GPT1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 12. "MSTPD12,Port Output Enable for GPT2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 11. "MSTPD11,Port Output Enable for GPT3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 8.--10. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 6. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 5. "MSTPD5,Asynchronous General Purpose Timer 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 4. "MSTPD4,Asynchronous General Purpose Timer 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 1. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" line.long 0x10 "MSTPCRE,Module Stop Control Register E" bitfld.long 0x10 31. "MSTPE31,General PWM Timer 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 30. "MSTPE30,General PWM Timer 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 29. "MSTPE29,General PWM Timer 2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 28. "MSTPE28,General PWM Timer 3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 27. "MSTPE27,General PWM Timer 4 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 26. "MSTPE26,General PWM Timer 5 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 25. "MSTPE25,General PWM Timer 6 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 24. "MSTPE24,General PWM Timer 7 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 23. "MSTPE23,General PWM Timer 8 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 22. "MSTPE22,General PWM Timer 9 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 21. "MSTPE21,General PWM Timer 10 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 20. "MSTPE20,General PWM Timer 11 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 19. "MSTPE19,General PWM Timer 12 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 18. "MSTPE18,General PWM Timer 13 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 16.--17. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x10 15. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.byte 0x10 10.--13. 1. "Reserved,These bits are read as 1111. The write value should be 1111." newline bitfld.long 0x10 9. "MSTPE9,Ultra-Low Power Timer 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 8. "MSTPE8,Ultra-Low Power Timer 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x10 6. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x10 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 1. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x10 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" tree.end tree "MSTP_NS" base ad:0x50203000 group.long 0x0++0x13 line.long 0x0 "MSTPCRA,Module Stop Control Register A" hexmask.long.word 0x0 23.--31. 1. "Reserved,These bits are read as 111111111. The write value should be 111111111." bitfld.long 0x0 22. "MSTPA22,DMA Controller/Data Transfer Controller unit0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" hexmask.long.byte 0x0 16.--21. 1. "Reserved,These bits are read as 111111. The write value should be 111111." newline bitfld.long 0x0 15. "MSTPA15,Standby SRAM Module Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x0 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 13. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 12. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 11. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.byte 0x0 6.--10. 1. "Reserved,These bits are read as 11111. The write value should be 11111." newline bitfld.long 0x0 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 1. "MSTPA1,SRAM1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x0 0. "MSTPA0,SRAM0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" line.long 0x4 "MSTPCRB,Module Stop Control Register B" bitfld.long 0x4 31. "MSTPB31,Serial Communication Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 30. "MSTPB30,Serial Communication Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 29. "MSTPB29,Serial Communication Interface 2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x4 28. "MSTPB28,Serial Communication Interface 3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 27. "MSTPB27,Serial Communication Interface 4 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 26. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 25. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 24. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 22. "MSTPB22,Serial Communication Interface 9 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 20.--21. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x4 19. "MSTPB19,Serial Peripheral Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x4 18. "MSTPB18,Serial Peripheral Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 17. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 16. "MSTPB16,Octa Memory Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state." newline bitfld.long 0x4 15. "MSTPB15,ETHERC0 and EDMAC0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 13. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 12. "MSTPB12,Universal Serial Bus 2.0 HS Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 11. "MSTPB11,Universal Serial Bus 2.0 FS0 Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 10. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 9. "MSTPB9,I2C Bus Interface 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 8. "MSTPB8,I2C Bus Interface 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x4 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 6. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 4. "MSTPB4,I3C Bus Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x4 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 1. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x4 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" line.long 0x8 "MSTPCRC,Module Stop Control Register C" bitfld.long 0x8 31. "MSTPC31,SHIP Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 28.--30. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x8 27. "MSTPC27,Controller Area Network with Flexible Data-Rate 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x8 26. "MSTPC26,Controller Area Network with Flexible Data-Rate 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" hexmask.long.byte 0x8 22.--25. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.long 0x8 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 20. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 19. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 18. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 17. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 16. "MSTPC16,CEU Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 15. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 14. "MSTPC14,Event Link Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 13. "MSTPC13,Data Operation Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 12. "MSTPC12,Secure Digital Host IF 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x8 11. "MSTPC11,Secure Digital Host IF 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 10. "MSTPC10,MIPI Display Serial Interface Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 9. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 8. "MSTPC8,Serial Sound Interface0 Enhanced Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 7. "MSTPC7,Serial Sound Interface1 Enhanced Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 6. "MSTPC6,2D Drawing Engine Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x8 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 4. "MSTPC4,Graphics LCD Controller Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x8 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 1. "MSTPC1,Cyclic Redundancy Check Calculator Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x8 0. "MSTPC0,Clock Frequency Accuracy Measurement Circuit Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" line.long 0xC "MSTPCRD,Module Stop Control Register D" bitfld.long 0xC 29.--31. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0xC 28. "MSTPD28,High-Speed Analog Com-parator 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 27. "MSTPD27,High-Speed Analog Com-parator 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 26. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 25. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 24. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 23. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 22. "MSTPD22,Temperature Sensor Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 20. "MSTPD20,12-Bit D/A Converter Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 17.--19. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0xC 16. "MSTPD16,12-bit A/D Converter 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 15. "MSTPD15,12-bit A/D Converter 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 14. "MSTPD14,Port Output Enable for GPT0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 13. "MSTPD13,Port Output Enable for GPT1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 12. "MSTPD12,Port Output Enable for GPT2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 11. "MSTPD11,Port Output Enable for GPT3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 8.--10. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 6. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 5. "MSTPD5,Asynchronous General Purpose Timer 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0xC 4. "MSTPD4,Asynchronous General Purpose Timer 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0xC 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 1. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0xC 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" line.long 0x10 "MSTPCRE,Module Stop Control Register E" bitfld.long 0x10 31. "MSTPE31,General PWM Timer 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 30. "MSTPE30,General PWM Timer 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 29. "MSTPE29,General PWM Timer 2 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 28. "MSTPE28,General PWM Timer 3 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 27. "MSTPE27,General PWM Timer 4 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 26. "MSTPE26,General PWM Timer 5 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 25. "MSTPE25,General PWM Timer 6 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 24. "MSTPE24,General PWM Timer 7 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 23. "MSTPE23,General PWM Timer 8 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 22. "MSTPE22,General PWM Timer 9 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 21. "MSTPE21,General PWM Timer 10 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 20. "MSTPE20,General PWM Timer 11 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" newline bitfld.long 0x10 19. "MSTPE19,General PWM Timer 12 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 18. "MSTPE18,General PWM Timer 13 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 16.--17. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x10 15. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.byte 0x10 10.--13. 1. "Reserved,These bits are read as 1111. The write value should be 1111." newline bitfld.long 0x10 9. "MSTPE9,Ultra-Low Power Timer 0 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 8. "MSTPE8,Ultra-Low Power Timer 1 Module Stop" "0: Cancel the module-stop state,1: Enter the module-stop state" bitfld.long 0x10 7. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x10 6. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 5. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x10 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 2. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x10 1. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x10 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" tree.end tree.end tree "PFS (Pin Function Select)" base ad:0x0 tree "PFS" base ad:0x40400800 group.long 0x0++0x3 line.long 0x0 "P000PFS,P000 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x0++0x1 line.word 0x0 "P000PFS_HA,P000 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x0++0x0 line.byte 0x0 "P000PFS_BY,P000 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "P00$1PFS,P00%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x4)++0x1 line.word 0x0 "P00$1PFS_HA,P00%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x4)++0x0 line.byte 0x0 "P00$1PFS_BY,P00%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "P00$1PFS,P00%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x20)++0x1 line.word 0x0 "P00$1PFS_HA,P00%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x20)++0x0 line.byte 0x0 "P00$1PFS_BY,P00%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x28)++0x3 line.long 0x0 "P0$1PFS,P0%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x28)++0x1 line.word 0x0 "P0$1PFS_HA,P0%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x28)++0x0 line.byte 0x0 "P0$1PFS_BY,P0%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0x40++0x3 line.long 0x0 "P100PFS,P100 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x40++0x1 line.word 0x0 "P100PFS_HA,P100 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x40++0x0 line.byte 0x0 "P100PFS_BY,P100 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "P10$1PFS,P10%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x44)++0x1 line.word 0x0 "P10$1PFS_HA,P10%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x44)++0x0 line.byte 0x0 "P10$1PFS_BY,P10%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0x60++0x3 line.long 0x0 "P108PFS,P108 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x60++0x1 line.word 0x0 "P108PFS_HA,P108 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x60++0x0 line.byte 0x0 "P108PFS_BY,P108 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x64++0x3 line.long 0x0 "P109PFS,P109 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x64++0x1 line.word 0x0 "P109PFS_HA,P109 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x64++0x0 line.byte 0x0 "P109PFS_BY,P109 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x68++0x3 line.long 0x0 "P110PFS,P110 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x68++0x1 line.word 0x0 "P110PFS_HA,P110 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x68++0x0 line.byte 0x0 "P110PFS_BY,P110 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6C)++0x3 line.long 0x0 "P1$1PFS,P1%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x6C)++0x1 line.word 0x0 "P1$1PFS_HA,P1%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x6C)++0x0 line.byte 0x0 "P1$1PFS_BY,P1%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0x80++0x3 line.long 0x0 "P200PFS,P200 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x80++0x1 line.word 0x0 "P200PFS_HA,P200 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x80++0x0 line.byte 0x0 "P200PFS_BY,P200 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x84++0x3 line.long 0x0 "P201PFS,P201 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x84++0x1 line.word 0x0 "P201PFS_HA,P201 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x84++0x0 line.byte 0x0 "P201PFS_BY,P201 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "P20$1PFS,P20%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x88)++0x1 line.word 0x0 "P20$1PFS_HA,P20%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x88)++0x0 line.byte 0x0 "P20$1PFS_BY,P20%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xA8)++0x3 line.long 0x0 "P2$1PFS,P2%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0xA8)++0x1 line.word 0x0 "P2$1PFS_HA,P2%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xA8)++0x0 line.byte 0x0 "P2$1PFS_BY,P2%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0xC0++0x3 line.long 0x0 "P300PFS,P300 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0xC0++0x1 line.word 0x0 "P300PFS_HA,P300 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0xC0++0x0 line.byte 0x0 "P300PFS_BY,P300 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC4)++0x3 line.long 0x0 "P30$1PFS,P30%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0xC4)++0x1 line.word 0x0 "P30$1PFS_HA,P30%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xC4)++0x0 line.byte 0x0 "P30$1PFS_BY,P30%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE8)++0x3 line.long 0x0 "P3$1PFS,P3%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0xE8)++0x1 line.word 0x0 "P3$1PFS_HA,P30%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xE8)++0x0 line.byte 0x0 "P3$1PFS_BY,P30%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "P40$1PFS,P40%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x100)++0x1 line.word 0x0 "P40$1PFS_HA,P40%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x100)++0x0 line.byte 0x0 "P40$1PFS_BY,P40%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x128)++0x3 line.long 0x0 "P4$1PFS,P4%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x128)++0x1 line.word 0x0 "P4$1PFS_HA,P4%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x128)++0x0 line.byte 0x0 "P4$1PFS_BY,P4%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "P50$1PFS,P50%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x140)++0x1 line.word 0x0 "P50$1PFS_HA,P50%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x140)++0x0 line.byte 0x0 "P50$1PFS_BY,P50%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x160)++0x3 line.long 0x0 "P50$1PFS,P50%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x160)++0x1 line.word 0x0 "P50$1PFS_HA,P50%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x160)++0x0 line.byte 0x0 "P50$1PFS_BY,P50%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x168)++0x3 line.long 0x0 "P5$1PFS,P5%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x168)++0x1 line.word 0x0 "P5$1PFS_HA,P5%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x168)++0x0 line.byte 0x0 "P5$1PFS_BY,P5%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "P60$1PFS,P60%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x180)++0x1 line.word 0x0 "P60$1PFS_HA,P60%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x180)++0x0 line.byte 0x0 "P60$1PFS_BY,P60%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1A0)++0x3 line.long 0x0 "P60$1PFS,P60%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1A0)++0x1 line.word 0x0 "P60$1PFS_HA,P60%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1A0)++0x0 line.byte 0x0 "P60$1PFS_BY,P60%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1A8)++0x3 line.long 0x0 "P6$1PFS,P6%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1A8)++0x1 line.word 0x0 "P6$1PFS_HA,P6%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1A8)++0x0 line.byte 0x0 "P6$1PFS_BY,P6%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "P70$1PFS,P70%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1C0)++0x1 line.word 0x0 "P70$1PFS_HA,P70%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1C0)++0x0 line.byte 0x0 "P70$1PFS_BY,P70%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1E8)++0x3 line.long 0x0 "P7$1PFS,P7%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1E8)++0x1 line.word 0x0 "P7$1PFS_HA,P7%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1E8)++0x0 line.byte 0x0 "P7$1PFS_BY,P7%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "P80$1PFS,P80%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x200)++0x1 line.word 0x0 "P80$1PFS_HA,P80%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x200)++0x0 line.byte 0x0 "P80$1PFS_BY,P80%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x228)++0x3 line.long 0x0 "P8$1PFS,P8%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x228)++0x1 line.word 0x0 "P8$1PFS_HA,P8%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x228)++0x0 line.byte 0x0 "P8$1PFS_BY,P8%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x240)++0x3 line.long 0x0 "P90$1PFS,P90%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x240)++0x1 line.word 0x0 "P90$1PFS_HA,P90%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x240)++0x0 line.byte 0x0 "P90$1PFS_BY,P90%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x268)++0x3 line.long 0x0 "P9$1PFS,P9%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x268)++0x1 line.word 0x0 "P9$1PFS_HA,P9%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x268)++0x0 line.byte 0x0 "P9$1PFS_BY,P9%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "PA0$1PFS,PA0%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x280)++0x1 line.word 0x0 "PA0$1PFS_HA,PA0%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x280)++0x0 line.byte 0x0 "PA0$1PFS_BY,PA0%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x2A8)++0x3 line.long 0x0 "PA$1PFS,PA%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x2A8)++0x1 line.word 0x0 "PA$1PFS_HA,PA%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x2A8)++0x0 line.byte 0x0 "PA$1PFS_BY,PA%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x2C0)++0x3 line.long 0x0 "PB0$1PFS,PB0%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x2C0)++0x1 line.word 0x0 "PB0$1PFS_HA,PB0%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x2C0)++0x0 line.byte 0x0 "PB0$1PFS_BY,PB0%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x2E8)++0x3 line.long 0x0 "PB$1PFS,PB%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x2E8)++0x1 line.word 0x0 "PB$1PFS_HA,PB%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x2E8)++0x0 line.byte 0x0 "PB$1PFS_BY,PB%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.byte 0x500++0x0 line.byte 0x0 "PFENET,Ethernet Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PHYMODE0,Ethernet Mode Setting ch0" "0: RMII mode (ETHERC channel 0),1: MII mode (ETHERC channel 0)" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x50C++0x0 line.byte 0x0 "PWPR_NS,NonSecure Write-Protect Register" bitfld.byte 0x0 7. "B0WI,PFSWE Bit Write Disable" "0: Writing to the PFSWE bit is enabled,1: Writing to the PFSWE bit is disabled" bitfld.byte 0x0 6. "PFSWE,PFS Register Write Enable" "0: Writing to the PFS register is disabled,1: Writing to the PFS register is enabled" newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x514++0x0 line.byte 0x0 "PWPR_S,Secure Write Protect Register" bitfld.byte 0x0 7. "B0WI,PFSWE Bit Write Disable" "0: Enable writes the PFSWE bit,1: Disable writes to the PFSWE bit." bitfld.byte 0x0 6. "PFSWE,PmnPFS Register Write Enable" "0: Disable writes to the PmnPFS register,1: Enable writes to the PmnPFS register." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x520++0x0 line.byte 0x0 "PFI3C,I3C Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "I3CSLOPE0,RI3C I3C Mode slope control setting bit" "0: I3C mode slope control disable,1: I3C mode slope control enable" group.word 0x530++0x1 line.word 0x0 "P0SAR,Port Security Attribute register 0" bitfld.word 0x0 15. "P015SA,P015 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P014SA,P014 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P013SA,P013 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P012SA,P012 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P011SA,P011 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P010SA,P010 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P009SA,P009 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P008SA,P008 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P007SA,P007 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P006SA,P006 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P005SA,P005 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P004SA,P004 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P003SA,P003 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P002SA,P002 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P001SA,P001 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P000SA,P000 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x534++0x1 line.word 0x0 "P1SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P115SA,P115 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P114SA,P114 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P113SA,P113 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P112SA,P112 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P111SA,P111 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P110SA,P110 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P109SA,P109 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P108SA,P108 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P107SA,P107 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P106SA,P106 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P105SA,P105 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P104SA,P104 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P103SA,P103 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P102SA,P102 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P101SA,P101 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P100SA,P100 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x538++0x1 line.word 0x0 "P2SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P215SA,P215 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P214SA,P214 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P213SA,P213 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P212SA,P212 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P211SA,P211 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P210SA,P210 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P209SA,P209 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P208SA,P208 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P207SA,P207 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P206SA,P206 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P205SA,P205 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P204SA,P204 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P203SA,P203 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P202SA,P202 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P201SA,P201 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P200SA,P200 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x53C++0x1 line.word 0x0 "P3SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P315SA,P315 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P314SA,P314 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P313SA,P313 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P312SA,P312 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P311SA,P311 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P310SA,P310 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P309SA,P309 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P308SA,P308 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P307SA,P307 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P306SA,P306 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P305SA,P305 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P304SA,P304 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P303SA,P303 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P302SA,P302 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P301SA,P301 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P300SA,P300 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x540++0x1 line.word 0x0 "P4SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P415SA,P415 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P414SA,P414 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P413SA,P413 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P412SA,P412 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P411SA,P411 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P410SA,P410 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P409SA,P409 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P408SA,P408 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P407SA,P407 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P406SA,P406 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P405SA,P405 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P404SA,P404 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P403SA,P403 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P402SA,P402 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P401SA,P401 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P400SA,P400 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x544++0x1 line.word 0x0 "P5SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P515SA,P515 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P514SA,P514 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P513SA,P513 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P512SA,P512 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P511SA,P511 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P510SA,P510 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P509SA,P509 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P508SA,P508 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P507SA,P507 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P506SA,P506 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P505SA,P505 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P504SA,P504 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P503SA,P503 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P502SA,P502 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P501SA,P501 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P500SA,P500 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x548++0x1 line.word 0x0 "P6SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P615SA,P615 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P614SA,P614 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P613SA,P613 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P612SA,P612 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P611SA,P611 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P610SA,P610 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P609SA,P609 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P608SA,P608 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P607SA,P607 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P606SA,P606 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P605SA,P605 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P604SA,P604 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P603SA,P603 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P602SA,P602 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P601SA,P601 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P600SA,P600 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x54C++0x1 line.word 0x0 "P7SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P715SA,P715 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P714SA,P714 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P713SA,P713 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P712SA,P712 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P711SA,P711 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P710SA,P710 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P709SA,P709 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P708SA,P708 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P707SA,P707 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P706SA,P706 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P705SA,P705 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P704SA,P704 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P703SA,P703 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P702SA,P702 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P701SA,P701 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P700SA,P700 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x550++0x1 line.word 0x0 "P8SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P815SA,P815 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P814SA,P814 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P813SA,P813 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P812SA,P812 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P811SA,P811 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P810SA,P810 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P809SA,P809 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P808SA,P808 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P807SA,P807 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P806SA,P806 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P805SA,P805 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P804SA,P804 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P803SA,P803 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P802SA,P802 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P801SA,P801 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P800SA,P800 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x554++0x1 line.word 0x0 "P9SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P915SA,P915 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P914SA,P914 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P913SA,P913 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P912SA,P912 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P911SA,P911 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P910SA,P910 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P909SA,P909 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P908SA,P908 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P907SA,P907 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P906SA,P906 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P905SA,P905 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P904SA,P904 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P903SA,P903 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P902SA,P902 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P901SA,P901 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P900SA,P900 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x558++0x1 line.word 0x0 "PASAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PA15SA,PA15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PA14SA,PA14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PA13SA,PA13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PA12SA,PA12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PA11SA,PA11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PA10SA,PA10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PA09SA,PA09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PA08SA,PA08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PA07SA,PA07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PA06SA,PA06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PA05SA,PA05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PA04SA,PA04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PA03SA,PA03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PA02SA,PA02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PA01SA,PA01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PA00SA,PA00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x55C++0x1 line.word 0x0 "PBSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PB15SA,PB15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PB14SA,PB14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PB13SA,PB13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PB12SA,PB12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PB11SA,PB11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PB10SA,PB10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PB09SA,PB09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PB08SA,PB08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PB07SA,PB07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PB06SA,PB06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PB05SA,PB05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PB04SA,PB04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PB03SA,PB03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PB02SA,PB02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PB01SA,PB01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PB00SA,PB00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x560++0x1 line.word 0x0 "PCSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PB15SA,PB15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PB14SA,PB14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PB13SA,PB13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PB12SA,PB12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PB11SA,PB11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PB10SA,PB10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PB09SA,PB09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PB08SA,PB08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PB07SA,PB07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PB06SA,PB06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PB05SA,PB05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PB04SA,PB04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PB03SA,PB03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PB02SA,PB02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PB01SA,PB01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PB00SA,PB00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x564++0x1 line.word 0x0 "PDSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PC15SA,PC15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PC14SA,PC14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PC13SA,PC13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PC12SA,PC12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PC11SA,PC11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PC10SA,PC10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PC09SA,PC09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PC08SA,PC08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PC07SA,PC07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PC06SA,PC06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PC05SA,PC05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PC04SA,PC04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PC03SA,PC03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PC02SA,PC02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PC01SA,PC01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PC00SA,PC00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x568++0x1 line.word 0x0 "PESAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PD15SA,PD15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PD14SA,PD14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PD13SA,PD13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PD12SA,PD12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PD11SA,PD11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PD10SA,PD10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PD09SA,PD09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PD08SA,PD08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PD07SA,PD07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PD06SA,PD06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PD05SA,PD05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PD04SA,PD04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PD03SA,PD03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PD02SA,PD02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PD01SA,PD01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PD00SA,PD00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x56C++0x1 line.word 0x0 "PFSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PE15SA,PE15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PE14SA,PE14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PE13SA,PE13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PE12SA,PE12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PE11SA,PE11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PE10SA,PE10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PE09SA,PE09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PE08SA,PE08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PE07SA,PE07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PE06SA,PE06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PE05SA,PE05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PE04SA,PE04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PE03SA,PE03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PE02SA,PE02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PE01SA,PE01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PE00SA,PE00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x570++0x1 line.word 0x0 "PGSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PG15SA,PG15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PG14SA,PG14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PG13SA,PG13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PG12SA,PG12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PG11SA,PG11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PG10SA,PG10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PG09SA,PG09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PG08SA,PG08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PG07SA,PG07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PG06SA,PG06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PG05SA,PG05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PG04SA,PG04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PG03SA,PG03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PG02SA,PG02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PG01SA,PG01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PG00SA,PG00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." tree.end tree "PFS_NS" base ad:0x50400800 group.long 0x0++0x3 line.long 0x0 "P000PFS,P000 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x0++0x1 line.word 0x0 "P000PFS_HA,P000 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x0++0x0 line.byte 0x0 "P000PFS_BY,P000 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4)++0x3 line.long 0x0 "P00$1PFS,P00%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x4)++0x1 line.word 0x0 "P00$1PFS_HA,P00%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x4)++0x0 line.byte 0x0 "P00$1PFS_BY,P00%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "P00$1PFS,P00%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x20)++0x1 line.word 0x0 "P00$1PFS_HA,P00%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x20)++0x0 line.byte 0x0 "P00$1PFS_BY,P00%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x28)++0x3 line.long 0x0 "P0$1PFS,P0%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x28)++0x1 line.word 0x0 "P0$1PFS_HA,P0%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x28)++0x0 line.byte 0x0 "P0$1PFS_BY,P0%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0x40++0x3 line.long 0x0 "P100PFS,P100 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x40++0x1 line.word 0x0 "P100PFS_HA,P100 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x40++0x0 line.byte 0x0 "P100PFS_BY,P100 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "P10$1PFS,P10%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x44)++0x1 line.word 0x0 "P10$1PFS_HA,P10%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x44)++0x0 line.byte 0x0 "P10$1PFS_BY,P10%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0x60++0x3 line.long 0x0 "P108PFS,P108 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x60++0x1 line.word 0x0 "P108PFS_HA,P108 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x60++0x0 line.byte 0x0 "P108PFS_BY,P108 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x64++0x3 line.long 0x0 "P109PFS,P109 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x64++0x1 line.word 0x0 "P109PFS_HA,P109 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x64++0x0 line.byte 0x0 "P109PFS_BY,P109 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x68++0x3 line.long 0x0 "P110PFS,P110 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x68++0x1 line.word 0x0 "P110PFS_HA,P110 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x68++0x0 line.byte 0x0 "P110PFS_BY,P110 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x6C)++0x3 line.long 0x0 "P1$1PFS,P1%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x6C)++0x1 line.word 0x0 "P1$1PFS_HA,P1%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x6C)++0x0 line.byte 0x0 "P1$1PFS_BY,P1%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0x80++0x3 line.long 0x0 "P200PFS,P200 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x80++0x1 line.word 0x0 "P200PFS_HA,P200 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x80++0x0 line.byte 0x0 "P200PFS_BY,P200 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.long 0x84++0x3 line.long 0x0 "P201PFS,P201 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0x84++0x1 line.word 0x0 "P201PFS_HA,P201 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0x84++0x0 line.byte 0x0 "P201PFS_BY,P201 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x88)++0x3 line.long 0x0 "P20$1PFS,P20%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x88)++0x1 line.word 0x0 "P20$1PFS_HA,P20%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x88)++0x0 line.byte 0x0 "P20$1PFS_BY,P20%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xA8)++0x3 line.long 0x0 "P2$1PFS,P2%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0xA8)++0x1 line.word 0x0 "P2$1PFS_HA,P2%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xA8)++0x0 line.byte 0x0 "P2$1PFS_BY,P2%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.long 0xC0++0x3 line.long 0x0 "P300PFS,P300 Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.word 0xC0++0x1 line.word 0x0 "P300PFS_HA,P300 Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" group.byte 0xC0++0x0 line.byte 0x0 "P300PFS_BY,P300 Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC4)++0x3 line.long 0x0 "P30$1PFS,P30%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0xC4)++0x1 line.word 0x0 "P30$1PFS_HA,P30%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xC4)++0x0 line.byte 0x0 "P30$1PFS_BY,P30%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xE8)++0x3 line.long 0x0 "P3$1PFS,P3%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0xE8)++0x1 line.word 0x0 "P3$1PFS_HA,P30%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xE8)++0x0 line.byte 0x0 "P3$1PFS_BY,P30%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "P40$1PFS,P40%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x100)++0x1 line.word 0x0 "P40$1PFS_HA,P40%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x100)++0x0 line.byte 0x0 "P40$1PFS_BY,P40%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x128)++0x3 line.long 0x0 "P4$1PFS,P4%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x128)++0x1 line.word 0x0 "P4$1PFS_HA,P4%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "EOFR,Event on Falling/Event on Rising" "0: No need to care,1: Detect rising edge,?,?" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x128)++0x0 line.byte 0x0 "P4$1PFS_BY,P4%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x140)++0x3 line.long 0x0 "P50$1PFS,P50%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x140)++0x1 line.word 0x0 "P50$1PFS_HA,P50%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x140)++0x0 line.byte 0x0 "P50$1PFS_BY,P50%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x160)++0x3 line.long 0x0 "P50$1PFS,P50%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x160)++0x1 line.word 0x0 "P50$1PFS_HA,P50%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x160)++0x0 line.byte 0x0 "P50$1PFS_BY,P50%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x168)++0x3 line.long 0x0 "P5$1PFS,P5%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x168)++0x1 line.word 0x0 "P5$1PFS_HA,P5%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x168)++0x0 line.byte 0x0 "P5$1PFS_BY,P5%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "P60$1PFS,P60%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x180)++0x1 line.word 0x0 "P60$1PFS_HA,P60%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x180)++0x0 line.byte 0x0 "P60$1PFS_BY,P60%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1A0)++0x3 line.long 0x0 "P60$1PFS,P60%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1A0)++0x1 line.word 0x0 "P60$1PFS_HA,P60%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1A0)++0x0 line.byte 0x0 "P60$1PFS_BY,P60%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1A8)++0x3 line.long 0x0 "P6$1PFS,P6%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1A8)++0x1 line.word 0x0 "P6$1PFS_HA,P6%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1A8)++0x0 line.byte 0x0 "P6$1PFS_BY,P6%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1C0)++0x3 line.long 0x0 "P70$1PFS,P70%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1C0)++0x1 line.word 0x0 "P70$1PFS_HA,P70%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1C0)++0x0 line.byte 0x0 "P70$1PFS_BY,P70%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1E8)++0x3 line.long 0x0 "P7$1PFS,P7%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x1E8)++0x1 line.word 0x0 "P7$1PFS_HA,P7%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x1E8)++0x0 line.byte 0x0 "P7$1PFS_BY,P7%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "P80$1PFS,P80%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x200)++0x1 line.word 0x0 "P80$1PFS_HA,P80%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x200)++0x0 line.byte 0x0 "P80$1PFS_BY,P80%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x228)++0x3 line.long 0x0 "P8$1PFS,P8%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x228)++0x1 line.word 0x0 "P8$1PFS_HA,P8%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x228)++0x0 line.byte 0x0 "P8$1PFS_BY,P8%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x240)++0x3 line.long 0x0 "P90$1PFS,P90%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x240)++0x1 line.word 0x0 "P90$1PFS_HA,P90%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x240)++0x0 line.byte 0x0 "P90$1PFS_BY,P90%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x268)++0x3 line.long 0x0 "P9$1PFS,P9%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x268)++0x1 line.word 0x0 "P9$1PFS_HA,P9%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x268)++0x0 line.byte 0x0 "P9$1PFS_BY,P9%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "PA0$1PFS,PA0%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x280)++0x1 line.word 0x0 "PA0$1PFS_HA,PA0%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x280)++0x0 line.byte 0x0 "PA0$1PFS_BY,PA0%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x2A8)++0x3 line.long 0x0 "PA$1PFS,PA%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x2A8)++0x1 line.word 0x0 "PA$1PFS_HA,PA%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x2A8)++0x0 line.byte 0x0 "PA$1PFS_BY,PA%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x2C0)++0x3 line.long 0x0 "PB0$1PFS,PB0%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x2C0)++0x1 line.word 0x0 "PB0$1PFS_HA,PB0%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x2C0)++0x0 line.byte 0x0 "PB0$1PFS_BY,PB0%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x2E8)++0x3 line.long 0x0 "PB$1PFS,PB%s Pin Function Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "PSEL,Port Function SelectThese bits select the peripheral function. For individual pin functions see the MPC table" newline hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 16. "PMR,Port Mode Control" "0: Uses the pin as a general I/O pin.,1: Uses the pin as an I/O port for peripheral.." newline bitfld.long 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.long 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.long 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.long 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.long 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.long 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x2E8)++0x1 line.word 0x0 "PB$1PFS_HA,PB%s Pin Function Control Register" bitfld.word 0x0 15. "ASEL,Analog Input enable" "0: Used other than as analog pin,1: Used as analog pin" bitfld.word 0x0 14. "ISEL,IRQ input enable" "0: Not used as IRQn input pin,1: Used as IRQn input pin" newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "DSCR,Drive Strength Control Register" "0: Normal drive output,1: Middle drive output,?,?" newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.word 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.word 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end repeat 6. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0x2E8)++0x0 line.byte 0x0 "PB$1PFS_BY,PB%s Pin Function Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "NCODR,N-Channel Open Drain Control" "0: CMOS output,1: NMOS open-drain output" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "PCR,Pull-up Control" "0: Disables an input pull-up.,1: Enables an input pull-up." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "PDR,Port Direction" "0: Input (Functions as an input pin.),1: Output (Functions as an output pin.)" newline rbitfld.byte 0x0 1. "PIDR,Port Input Data" "0: Low input,1: High input" bitfld.byte 0x0 0. "PODR,Port Output Data" "0: Low output,1: High output" repeat.end group.byte 0x500++0x0 line.byte 0x0 "PFENET,Ethernet Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PHYMODE0,Ethernet Mode Setting ch0" "0: RMII mode (ETHERC channel 0),1: MII mode (ETHERC channel 0)" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.byte 0x50C++0x0 line.byte 0x0 "PWPR_NS,NonSecure Write-Protect Register" bitfld.byte 0x0 7. "B0WI,PFSWE Bit Write Disable" "0: Writing to the PFSWE bit is enabled,1: Writing to the PFSWE bit is disabled" bitfld.byte 0x0 6. "PFSWE,PFS Register Write Enable" "0: Writing to the PFS register is disabled,1: Writing to the PFS register is enabled" newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x514++0x0 line.byte 0x0 "PWPR_S,Secure Write Protect Register" bitfld.byte 0x0 7. "B0WI,PFSWE Bit Write Disable" "0: Enable writes the PFSWE bit,1: Disable writes to the PFSWE bit." bitfld.byte 0x0 6. "PFSWE,PmnPFS Register Write Enable" "0: Disable writes to the PmnPFS register,1: Enable writes to the PmnPFS register." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0x520++0x0 line.byte 0x0 "PFI3C,I3C Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "I3CSLOPE0,RI3C I3C Mode slope control setting bit" "0: I3C mode slope control disable,1: I3C mode slope control enable" group.word 0x530++0x1 line.word 0x0 "P0SAR,Port Security Attribute register 0" bitfld.word 0x0 15. "P015SA,P015 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P014SA,P014 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P013SA,P013 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P012SA,P012 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P011SA,P011 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P010SA,P010 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P009SA,P009 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P008SA,P008 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P007SA,P007 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P006SA,P006 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P005SA,P005 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P004SA,P004 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P003SA,P003 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P002SA,P002 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P001SA,P001 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P000SA,P000 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x534++0x1 line.word 0x0 "P1SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P115SA,P115 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P114SA,P114 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P113SA,P113 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P112SA,P112 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P111SA,P111 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P110SA,P110 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P109SA,P109 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P108SA,P108 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P107SA,P107 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P106SA,P106 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P105SA,P105 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P104SA,P104 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P103SA,P103 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P102SA,P102 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P101SA,P101 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P100SA,P100 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x538++0x1 line.word 0x0 "P2SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P215SA,P215 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P214SA,P214 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P213SA,P213 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P212SA,P212 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P211SA,P211 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P210SA,P210 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P209SA,P209 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P208SA,P208 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P207SA,P207 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P206SA,P206 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P205SA,P205 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P204SA,P204 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P203SA,P203 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P202SA,P202 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P201SA,P201 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P200SA,P200 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x53C++0x1 line.word 0x0 "P3SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P315SA,P315 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P314SA,P314 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P313SA,P313 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P312SA,P312 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P311SA,P311 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P310SA,P310 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P309SA,P309 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P308SA,P308 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P307SA,P307 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P306SA,P306 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P305SA,P305 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P304SA,P304 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P303SA,P303 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P302SA,P302 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P301SA,P301 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P300SA,P300 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x540++0x1 line.word 0x0 "P4SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P415SA,P415 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P414SA,P414 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P413SA,P413 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P412SA,P412 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P411SA,P411 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P410SA,P410 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P409SA,P409 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P408SA,P408 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P407SA,P407 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P406SA,P406 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P405SA,P405 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P404SA,P404 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P403SA,P403 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P402SA,P402 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P401SA,P401 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P400SA,P400 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x544++0x1 line.word 0x0 "P5SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P515SA,P515 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P514SA,P514 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P513SA,P513 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P512SA,P512 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P511SA,P511 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P510SA,P510 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P509SA,P509 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P508SA,P508 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P507SA,P507 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P506SA,P506 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P505SA,P505 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P504SA,P504 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P503SA,P503 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P502SA,P502 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P501SA,P501 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P500SA,P500 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x548++0x1 line.word 0x0 "P6SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P615SA,P615 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P614SA,P614 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P613SA,P613 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P612SA,P612 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P611SA,P611 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P610SA,P610 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P609SA,P609 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P608SA,P608 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P607SA,P607 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P606SA,P606 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P605SA,P605 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P604SA,P604 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P603SA,P603 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P602SA,P602 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P601SA,P601 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P600SA,P600 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x54C++0x1 line.word 0x0 "P7SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P715SA,P715 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P714SA,P714 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P713SA,P713 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P712SA,P712 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P711SA,P711 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P710SA,P710 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P709SA,P709 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P708SA,P708 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P707SA,P707 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P706SA,P706 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P705SA,P705 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P704SA,P704 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P703SA,P703 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P702SA,P702 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P701SA,P701 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P700SA,P700 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x550++0x1 line.word 0x0 "P8SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P815SA,P815 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P814SA,P814 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P813SA,P813 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P812SA,P812 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P811SA,P811 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P810SA,P810 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P809SA,P809 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P808SA,P808 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P807SA,P807 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P806SA,P806 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P805SA,P805 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P804SA,P804 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P803SA,P803 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P802SA,P802 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P801SA,P801 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P800SA,P800 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x554++0x1 line.word 0x0 "P9SAR,Port Security Attribute register 1" bitfld.word 0x0 15. "P915SA,P915 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "P914SA,P914 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "P913SA,P913 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "P912SA,P912 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "P911SA,P911 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "P910SA,P910 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "P909SA,P909 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "P908SA,P908 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "P907SA,P907 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "P906SA,P906 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "P905SA,P905 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "P904SA,P904 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "P903SA,P903 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "P902SA,P902 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "P901SA,P901 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "P900SA,P900 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x558++0x1 line.word 0x0 "PASAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PA15SA,PA15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PA14SA,PA14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PA13SA,PA13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PA12SA,PA12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PA11SA,PA11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PA10SA,PA10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PA09SA,PA09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PA08SA,PA08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PA07SA,PA07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PA06SA,PA06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PA05SA,PA05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PA04SA,PA04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PA03SA,PA03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PA02SA,PA02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PA01SA,PA01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PA00SA,PA00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x55C++0x1 line.word 0x0 "PBSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PB15SA,PB15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PB14SA,PB14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PB13SA,PB13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PB12SA,PB12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PB11SA,PB11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PB10SA,PB10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PB09SA,PB09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PB08SA,PB08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PB07SA,PB07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PB06SA,PB06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PB05SA,PB05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PB04SA,PB04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PB03SA,PB03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PB02SA,PB02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PB01SA,PB01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PB00SA,PB00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x560++0x1 line.word 0x0 "PCSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PB15SA,PB15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PB14SA,PB14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PB13SA,PB13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PB12SA,PB12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PB11SA,PB11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PB10SA,PB10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PB09SA,PB09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PB08SA,PB08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PB07SA,PB07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PB06SA,PB06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PB05SA,PB05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PB04SA,PB04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PB03SA,PB03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PB02SA,PB02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PB01SA,PB01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PB00SA,PB00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x564++0x1 line.word 0x0 "PDSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PC15SA,PC15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PC14SA,PC14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PC13SA,PC13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PC12SA,PC12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PC11SA,PC11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PC10SA,PC10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PC09SA,PC09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PC08SA,PC08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PC07SA,PC07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PC06SA,PC06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PC05SA,PC05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PC04SA,PC04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PC03SA,PC03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PC02SA,PC02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PC01SA,PC01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PC00SA,PC00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x568++0x1 line.word 0x0 "PESAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PD15SA,PD15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PD14SA,PD14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PD13SA,PD13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PD12SA,PD12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PD11SA,PD11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PD10SA,PD10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PD09SA,PD09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PD08SA,PD08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PD07SA,PD07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PD06SA,PD06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PD05SA,PD05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PD04SA,PD04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PD03SA,PD03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PD02SA,PD02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PD01SA,PD01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PD00SA,PD00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x56C++0x1 line.word 0x0 "PFSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PE15SA,PE15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PE14SA,PE14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PE13SA,PE13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PE12SA,PE12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PE11SA,PE11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PE10SA,PE10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PE09SA,PE09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PE08SA,PE08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PE07SA,PE07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PE06SA,PE06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PE05SA,PE05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PE04SA,PE04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PE03SA,PE03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PE02SA,PE02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PE01SA,PE01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PE00SA,PE00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." group.word 0x570++0x1 line.word 0x0 "PGSAR,Port Security Attribute register 1" bitfld.word 0x0 15. "PG15SA,PG15 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 14. "PG14SA,PG14 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 13. "PG13SA,PG13 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 12. "PG12SA,PG12 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 11. "PG11SA,PG11 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 10. "PG10SA,PG10 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 9. "PG09SA,PG09 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 8. "PG08SA,PG08 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 7. "PG07SA,PG07 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 6. "PG06SA,PG06 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 5. "PG05SA,PG05 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 4. "PG04SA,PG04 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 3. "PG03SA,PG03 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 2. "PG02SA,PG02 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." newline bitfld.word 0x0 1. "PG01SA,PG01 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." bitfld.word 0x0 0. "PG00SA,PG00 Security Attribute" "0: Security Attribution is 0.,1: Security Attribution is 1." tree.end tree.end tree "POEG (Port Output Enable Module for GPT)" base ad:0x0 tree "POEG" base ad:0x40212000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2)++0x3 line.long 0x0 "POEGG$1,POEG Group %s Setting Register" bitfld.long 0x0 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three times..,1: Sampling GTETRG pin input level for three times..,?,?" bitfld.long 0x0 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled" newline bitfld.long 0x0 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed." hexmask.long.byte 0x0 24.--27. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 23. "COOPD,POEG group D Cooperation Enable" "0: Disable cooperation with POEG group D,1: Enable cooperation with POEG group D." bitfld.long 0x0 22. "COOPC,POEG group C Cooperation Enable" "0: Disable cooperation with POEG group C,1: Enable cooperation with POEG group C." newline bitfld.long 0x0 21. "COOPB,POEG group B Cooperation Enable" "0: Disable cooperation with POEG group B,1: Enable cooperation with POEG group B." bitfld.long 0x0 20. "COOPA,POEG group A Cooperation Enable" "0: Disable cooperation with POEG group A,1: Enable cooperation with POEG group A." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0.,1: GTETRG input after filtering is 1." newline bitfld.long 0x0 13. "CDRE5,Comparator Disable Request Enable 5Note: Can be modified only once after a reset." "0: A disable request of comparator 5 disabled.,1: A disable request of comparator 5 enabled." bitfld.long 0x0 12. "CDRE4,Comparator Disable Request Enable 4Note: Can be modified only once after a reset." "0: A disable request of comparator 4 disabled.,1: A disable request of comparator 4 enabled." newline bitfld.long 0x0 11. "CDRE3,Comparator Disable Request Enable 3Note: Can be modified only once after a reset." "0: A disable request of comparator 3 disabled.,1: A disable request of comparator 3 enabled." bitfld.long 0x0 10. "CDRE2,Comparator Disable Request Enable 2Note: Can be modified only once after a reset." "0: A disable request of comparator 2 disabled.,1: A disable request of comparator 2 enabled." newline bitfld.long 0x0 9. "CDRE1,Comparator Disable Request Enable 1Note: Can be modified only once after a reset." "0: A disable request of comparator 1 disabled.,1: A disable request of comparator 1 enabled." bitfld.long 0x0 8. "CDRE0,Comparator Disable Request Enable 0Note: Can be modified only once after a reset." "0: A disable request of comparator 0 disabled.,1: A disable request of comparator 0 enabled." newline bitfld.long 0x0 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset." "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x0 5. "IOCE,Enable for GPT Output-Disable RequestNote: Can be modified only once after a reset." "0: Disable output-disable requests from GPT disable..,1: Enable output-disable requests from GPT disable.." newline bitfld.long 0x0 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset." "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.." bitfld.long 0x0 3. "SSF,Software Stop Flag" "0: A output-disable request from software has not..,1: A output-disable request from software has been.." newline bitfld.long 0x0 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x0 1. "IOCF,Real Time Overcurrent Detection Flag" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.." newline bitfld.long 0x0 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin has..,1: A output-disable request from the GTETRG pin has.." repeat.end tree.end tree "POEG_NS" base ad:0x50212000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x100) group.long ($2)++0x3 line.long 0x0 "POEGG$1,POEG Group %s Setting Register" bitfld.long 0x0 30.--31. "NFCS,Noise Filter Clock Select" "0: Sampling GTETRG pin input level for three times..,1: Sampling GTETRG pin input level for three times..,?,?" bitfld.long 0x0 29. "NFEN,Noise Filter Enable" "0: Filtering noise disabled,1: Filtering noise enabled" newline bitfld.long 0x0 28. "INV,GTETRG Input Reverse" "0: GTETRG Input,1: GTETRG Input Reversed." hexmask.long.byte 0x0 24.--27. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 23. "COOPD,POEG group D Cooperation Enable" "0: Disable cooperation with POEG group D,1: Enable cooperation with POEG group D." bitfld.long 0x0 22. "COOPC,POEG group C Cooperation Enable" "0: Disable cooperation with POEG group C,1: Enable cooperation with POEG group C." newline bitfld.long 0x0 21. "COOPB,POEG group B Cooperation Enable" "0: Disable cooperation with POEG group B,1: Enable cooperation with POEG group B." bitfld.long 0x0 20. "COOPA,POEG group A Cooperation Enable" "0: Disable cooperation with POEG group A,1: Enable cooperation with POEG group A." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.long 0x0 16. "ST,GTETRG Input Status Flag" "0: GTETRG input after filtering is 0.,1: GTETRG input after filtering is 1." newline bitfld.long 0x0 13. "CDRE5,Comparator Disable Request Enable 5Note: Can be modified only once after a reset." "0: A disable request of comparator 5 disabled.,1: A disable request of comparator 5 enabled." bitfld.long 0x0 12. "CDRE4,Comparator Disable Request Enable 4Note: Can be modified only once after a reset." "0: A disable request of comparator 4 disabled.,1: A disable request of comparator 4 enabled." newline bitfld.long 0x0 11. "CDRE3,Comparator Disable Request Enable 3Note: Can be modified only once after a reset." "0: A disable request of comparator 3 disabled.,1: A disable request of comparator 3 enabled." bitfld.long 0x0 10. "CDRE2,Comparator Disable Request Enable 2Note: Can be modified only once after a reset." "0: A disable request of comparator 2 disabled.,1: A disable request of comparator 2 enabled." newline bitfld.long 0x0 9. "CDRE1,Comparator Disable Request Enable 1Note: Can be modified only once after a reset." "0: A disable request of comparator 1 disabled.,1: A disable request of comparator 1 enabled." bitfld.long 0x0 8. "CDRE0,Comparator Disable Request Enable 0Note: Can be modified only once after a reset." "0: A disable request of comparator 0 disabled.,1: A disable request of comparator 0 enabled." newline bitfld.long 0x0 6. "OSTPE,Oscillation Stop Detection EnableNote: Can be modified only once after a reset." "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x0 5. "IOCE,Enable for GPT Output-Disable RequestNote: Can be modified only once after a reset." "0: Disable output-disable requests from GPT disable..,1: Enable output-disable requests from GPT disable.." newline bitfld.long 0x0 4. "PIDE,Port Input Detection EnableNote: Can be modified only once after a reset." "0: A output-disable request from the GTETRG pins..,1: A output-disable request from the GTETRG pins.." bitfld.long 0x0 3. "SSF,Software Stop Flag" "0: A output-disable request from software has not..,1: A output-disable request from software has been.." newline bitfld.long 0x0 2. "OSTPF,Oscillation Stop Detection Flag" "0: A output-disable request from the oscillation..,1: A output-disable request from the oscillation.." bitfld.long 0x0 1. "IOCF,Real Time Overcurrent Detection Flag" "0: A output-disable request from GPT disable..,1: A output-disable request from GPT disable.." newline bitfld.long 0x0 0. "PIDF,Port Input Detection Flag" "0: A output-disable request from the GTETRG pin has..,1: A output-disable request from the GTETRG pin has.." repeat.end tree.end tree.end tree "PORT (I/O Ports)" base ad:0x0 tree "PORT0" base ad:0x40400000 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT0_NS" base ad:0x50400000 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT1" base ad:0x40400020 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT1_NS" base ad:0x50400020 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT2" base ad:0x40400040 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT2_NS" base ad:0x50400040 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT3" base ad:0x40400060 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT3_NS" base ad:0x50400060 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT4" base ad:0x40400080 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT4_NS" base ad:0x50400080 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Event input data register" hexmask.word 0x2 0.--15. 1. "EIDR,Pmn Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output reset register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output set register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" group.long 0xC++0x3 line.long 0x0 "PCNTR4,Port Control Register 4" hexmask.long.word 0x0 16.--31. 1. "EORR,Pmn Event Output Reset" hexmask.long.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" group.word 0xC++0x3 line.word 0x0 "EOSR,Event output reset register" hexmask.word 0x0 0.--15. 1. "EOSR,Pmn Event Output Set" line.word 0x2 "EORR,Event output set register" hexmask.word 0x2 0.--15. 1. "EORR,Pmn Event Output Reset" tree.end tree "PORT5" base ad:0x404000A0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT5_NS" base ad:0x504000A0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT6" base ad:0x404000C0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT6_NS" base ad:0x504000C0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT7" base ad:0x404000E0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT7_NS" base ad:0x504000E0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT8" base ad:0x40400100 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT8_NS" base ad:0x50400100 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT9" base ad:0x40400120 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORT9_NS" base ad:0x50400120 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTA" base ad:0x40400140 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTA_NS" base ad:0x50400140 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTB" base ad:0x40400160 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTB_NS" base ad:0x50400160 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTC" base ad:0x40400180 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTC_NS" base ad:0x50400180 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTD" base ad:0x404001A0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTD_NS" base ad:0x504001A0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTE" base ad:0x404001C0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTE_NS" base ad:0x504001C0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTF" base ad:0x404001E0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTF_NS" base ad:0x504001E0 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTG" base ad:0x40400200 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree "PORTG_NS" base ad:0x50400200 group.long 0x0++0x3 line.long 0x0 "PCNTR1,Port Control Register 1" hexmask.long.word 0x0 16.--31. 1. "PODR,Pmn Output Data" hexmask.long.word 0x0 0.--15. 1. "PDR,Pmn Direction" group.word 0x0++0x3 line.word 0x0 "PDR,Data direction register" hexmask.word 0x0 0.--15. 1. "PDR,Pmn Direction" line.word 0x2 "PODR,Output data register" hexmask.word 0x2 0.--15. 1. "PODR,Pmn Output Data" rgroup.long 0x4++0x3 line.long 0x0 "PCNTR2,Port Control Register 2" hexmask.long.word 0x0 16.--31. 1. "EIDR,Pmn Event Input Data" hexmask.long.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" rgroup.word 0x4++0x3 line.word 0x0 "PIDR,Input data register" hexmask.word 0x0 0.--15. 1. "PIDR,Pmn Input Data" line.word 0x2 "EIDR,Port Event Input Data register" hexmask.word 0x2 0.--15. 1. "EIDR,Port Event Input Data" wgroup.long 0x8++0x3 line.long 0x0 "PCNTR3,Port Control Register 3" hexmask.long.word 0x0 16.--31. 1. "PORR,Pmn Output Reset" hexmask.long.word 0x0 0.--15. 1. "POSR,Pmn Output Set" wgroup.word 0x8++0x3 line.word 0x0 "POSR,Output set register" hexmask.word 0x0 0.--15. 1. "POSR,Pmn Output Set" line.word 0x2 "PORR,Output reset register" hexmask.word 0x2 0.--15. 1. "PORR,Pmn Output Reset" tree.end tree.end tree "PSCU (Peripheral Security Control Unit)" base ad:0x0 tree "PSCU" base ad:0x40204000 group.long 0x4++0x13 line.long 0x0 "PSARB,Peripheral Security Attribution Register B" bitfld.long 0x0 31. "PSARB31,Serial Communication Interface 0 Security Attribution" "0,1" bitfld.long 0x0 30. "PSARB30,Serial Communication Interface 1 Security Attribution" "0,1" bitfld.long 0x0 29. "PSARB29,Serial Communication Interface 2 Security Attribution" "0,1" bitfld.long 0x0 28. "PSARB28,Serial Communication Interface 3 Security Attribution" "0,1" bitfld.long 0x0 27. "PSARB27,Serial Communication Interface 4 Security Attribution" "0,1" newline hexmask.long.byte 0x0 23.--26. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 22. "PSARB22,Serial Communication Interface 9 Security Attribution" "0,1" bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "PSARB19,Serial Peripheral Interface 0 Security Attribution" "0,1" bitfld.long 0x0 18. "PSARB18,Serial Peripheral Interface 1 Security Attribution" "0,1" newline bitfld.long 0x0 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16. "PSARB16,Octa Memory Controller Security Attribution" "0,1" bitfld.long 0x0 15. "PSARB15,ETHER0/EDMAC0 Controller Security Attribution" "0,1" bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 12. "PSARB12,Universal Serial Bus 2.0 HS Interface 0 Security Attribution" "0,1" newline bitfld.long 0x0 11. "PSARB11,Universal Serial Bus 2.0 FS Interface 0 Security Attribution" "0,1" bitfld.long 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 9. "PSARB9,I2C Bus Interface 0 Security Attribution" "0,1" bitfld.long 0x0 8. "PSARB8,I2C Bus Interface 1 Security Attribution" "0,1" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "PSARB4,I3C Bus Interface 2 Security Attribution" "0,1" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.long 0x4 "PSARC,Peripheral Security Attribution Register C" bitfld.long 0x4 31. "PSARC31,SHIP Security Attribution" "0,1" bitfld.long 0x4 28.--30. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 27. "PSARC27,Controller Area Network with Flexible Data-Rate 0 Security Attribution" "0,1" bitfld.long 0x4 26. "PSARC26,Controller Area Network with Flexible Data-Rate 1 Security Attribution" "0,1" hexmask.long.word 0x4 17.--25. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x4 16. "PSARC16,CEU Security Attribution" "0,1" bitfld.long 0x4 15. "PSARC15,Graph-ic(GLCDC MIPI DRW JPEG) Security Attribution" "0,1" bitfld.long 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 13. "PSARC13,Data Operation Circuit Security Attribution" "0,1" bitfld.long 0x4 12. "PSARC12,Secure Digital Host IF 0 Security Attribution" "0,1" newline bitfld.long 0x4 11. "PSARC11,Secure Digital Host IF 1 Security Attribution" "0,1" bitfld.long 0x4 9.--10. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 8. "PSARC8,Serial Sound Interface Enhanced (channel 0) Security Attribution" "0,1" bitfld.long 0x4 7. "PSARC7,Serial Sound Interface Enhanced (channel 1) Security Attribution" "0,1" hexmask.long.byte 0x4 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 1. "PSARC1,Cyclic Redundancy Check Calculator Security Attribution" "0,1" bitfld.long 0x4 0. "PSARC0,Clock Frequency Accuracy Measurement Circuit Security Attribution" "0,1" line.long 0x8 "PSARD,Peripheral Security Attribution Register D" bitfld.long 0x8 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 28. "PSARD28,High speed analog Comparator 0 Security Attribution" "0,1" bitfld.long 0x8 27. "PSARD27,High speed analog Comparator 1 Security Attribution" "0,1" hexmask.long.byte 0x8 23.--26. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x8 22. "PSARD22,Temperature Sensor Security Attribution" "0,1" newline bitfld.long 0x8 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 20. "PSARD20,12-Bit D/A Converter Security Attribution" "0,1" bitfld.long 0x8 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 16. "PSARD16,12-Bit A/D 0 Converter Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x8 15. "PSARD15,12-Bit A/D 1 Converter Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x8 14. "PSARD14,Port Output Enable for GPT Group 0 Security Attribution" "0,1" bitfld.long 0x8 13. "PSARD13,Port Output Enable for GPT Group 1 Security Attribution" "0,1" bitfld.long 0x8 12. "PSARD12,Port Output Enable for GPT Group 2 Security Attribution" "0,1" bitfld.long 0x8 11. "PSARD11,Port Output Enable for GPT Group 3 Security Attribution" "0,1" hexmask.long.byte 0x8 6.--10. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 5. "PSARD5,Asynchronous General Purpose Timer 0 Security Attribution" "0,1" bitfld.long 0x8 4. "PSARD4,Asynchronous General Purpose Timer 1 Security Attribution" "0,1" hexmask.long.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.long 0xC "PSARE,Peripheral Security Attribution Register E" bitfld.long 0xC 31. "PSARE31,General PWM Timer channel0 Security Attribution" "0,1" bitfld.long 0xC 30. "PSARE30,General PWM Timer channel1 Security Attribution" "0,1" bitfld.long 0xC 29. "PSARE29,General PWM Timer channel2 Security Attribution" "0,1" bitfld.long 0xC 28. "PSARE28,General PWM Timer channel3 Security Attribution" "0,1" bitfld.long 0xC 27. "PSARE27,General PWM Timer channel4 Security Attribution" "0,1" newline bitfld.long 0xC 26. "PSARE26,General PWM Timer channel5 Security Attribution" "0,1" bitfld.long 0xC 25. "PSARE25,General PWM Timer channel6 Security Attribution" "0,1" bitfld.long 0xC 24. "PSARE24,General PWM Timer channel7 Security Attribution" "0,1" bitfld.long 0xC 23. "PSARE23,General PWM Timer channel8 Security Attribution" "0,1" bitfld.long 0xC 22. "PSARE22,General PWM Timer channel9 Security Attribution" "0,1" newline bitfld.long 0xC 21. "PSARE21,General PWM Timer channel10 Security Attribution" "0,1" bitfld.long 0xC 20. "PSARE20,General PWM Timer channel11 Security Attribution" "0,1" bitfld.long 0xC 19. "PSARE19,General PWM Timer channel12 Security Attribution" "0,1" bitfld.long 0xC 18. "PSARE18,General PWM Timer channel13 Security Attribution" "0,1" bitfld.long 0xC 16.--17. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0xC 10.--14. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0xC 9. "PSARE9,ULPT0 Security Attribution" "0,1" bitfld.long 0xC 8. "PSARE8,ULPT1 Security Attribution" "0,1" hexmask.long.byte 0xC 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0xC 3. "PSARE3,Real Time Clock Security Attribution" "0,1" bitfld.long 0xC 2. "PSARE2,Independent Watchdog Timer Security Attribution" "0,1" bitfld.long 0xC 1. "PSARE1,WDT0 Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0xC 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.long 0x10 "MSSAR,Module Stop Security Attribution Register" bitfld.long 0x10 31. "MSSAR31,ELC clock stop Security Attribution" "0: Secure.,1: Non-Secure" hexmask.long.byte 0x10 23.--30. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 22. "MSSAR22,DMAC0/DTC0 Clock Stop Security Attribution" "0,1" hexmask.long.byte 0x10 16.--21. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x10 15. "MSSAR15,Standby RAM Clock Stop Security Attribution" "0: Secure.,1: Non-Secure" newline bitfld.long 0x10 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 13. "MSSAR13,STCM0 Security Attribution" "0: Secure.,1: Non-Secure" bitfld.long 0x10 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 11. "MSSAR11,CTCM0 Security Attribution" "0: Secure.,1: Non-Secure" hexmask.long.word 0x10 2.--10. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x10 1. "MSSAR1,SRAM1 Clock Stop Security Attribution" "0: Secure.,1: Non-Secure" bitfld.long 0x10 0. "MSSAR0,SRAM0 Clock Stop Security Attribution" "0: Secure.,1: Non-Secure" group.long 0x1C++0x13 line.long 0x0 "PPARB,Peripheral Privilege Attribution Register B" bitfld.long 0x0 31. "PPARB31,Serial Communication Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 30. "PPARB30,Serial Communication Interface 1 Privilege Attribution" "0,1" bitfld.long 0x0 29. "PPARB29,Serial Communication Interface 2 Privilege Attribution" "0,1" bitfld.long 0x0 28. "PPARB28,Serial Communication Interface 3 Privilege Attribution" "0,1" bitfld.long 0x0 27. "PPARB27,Serial Communication Interface 4 Privilege Attribution" "0,1" newline hexmask.long.byte 0x0 23.--26. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.long 0x0 22. "PPARB22,Serial Communication Interface 9 Privilege Attribution" "0,1" bitfld.long 0x0 20.--21. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x0 19. "PPARB19,Serial Peripheral Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 18. "PPARB18,Serial Peripheral Interface 1 Privilege Attribution" "0,1" newline bitfld.long 0x0 17. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 16. "PPARB16,Octa Memory Controller Privilege Attribution" "0,1" bitfld.long 0x0 15. "PPARB15,ETHER0/EDMAC0 Controller Privilege Attribution" "0,1" bitfld.long 0x0 13.--14. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x0 12. "PPARB12,Universal Serial Bus 2.0 HS Interface 0 Privilege Attribution" "0,1" newline bitfld.long 0x0 11. "PPARB11,Universal Serial Bus 2.0 FS Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 10. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 9. "PPARB9,I2C Bus Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 8. "PPARB8,I2C Bus Interface 1 Privilege Attribution" "0,1" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "PPARB4,I3C Bus Interface 2 Privilege Attribution" "0,1" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 1111. The write value should be 1111." line.long 0x4 "PPARC,Peripheral Privilege Attribution Register C" bitfld.long 0x4 31. "PPARC31,SHIP Privilege Attribution" "0,1" bitfld.long 0x4 28.--30. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x4 27. "PPARC27,Controller Area Network with Flexible Data-Rate 0 Privilege Attribution" "0,1" bitfld.long 0x4 26. "PPARC26,Controller Area Network with Flexible Data-Rate 1 Privilege Attribution" "0,1" hexmask.long.word 0x4 17.--25. 1. "Reserved,These bits are read as 111111111. The write value should be 111111111." newline bitfld.long 0x4 16. "PPARC16,CEU Privilege Attribution" "0,1" bitfld.long 0x4 15. "PPARC15,Graph-ic(GLCDC MIPI DRW JPEG) Privilege Attribution" "0,1" bitfld.long 0x4 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 13. "PPARC13,Data Operation Circuit Privilege Attribution" "0,1" bitfld.long 0x4 12. "PPARC12,Privilege Digital Host IF 0 Privilege Attribution" "0,1" newline bitfld.long 0x4 11. "PPARC11,Privilege Digital Host IF 1 Privilege Attribution" "0,1" bitfld.long 0x4 9.--10. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x4 8. "PPARC8,Serial Sound Interface Enhanced (channel 0) Privilege Attribution" "0,1" bitfld.long 0x4 7. "PPARC7,Serial Sound Interface Enhanced (channel 1) Privilege Attribution" "0,1" hexmask.long.byte 0x4 2.--6. 1. "Reserved,These bits are read as 11111. The write value should be 11111." newline bitfld.long 0x4 1. "PPARC1,Cyclic Redundancy Check Calculator Privilege Attribution" "0,1" bitfld.long 0x4 0. "PPARC0,Clock Frequency Accuracy Measurement Circuit Privilege Attribution" "0,1" line.long 0x8 "PPARD,Peripheral Privilege Attribution Register D" bitfld.long 0x8 29.--31. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x8 28. "PPARD28,High speed analog Comparator 0 Privilege Attribution" "0,1" bitfld.long 0x8 27. "PPARD27,High speed analog Comparator 1 Privilege Attribution" "0,1" hexmask.long.byte 0x8 23.--26. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.long 0x8 22. "PPARD22,Temperature Sensor Privilege Attribution" "0,1" newline bitfld.long 0x8 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 20. "PPARD20,12-Bit D/A Converter Privilege Attribution" "0,1" bitfld.long 0x8 17.--19. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x8 16. "PPARD16,12-Bit A/D 0 Converter Privilege Attribution" "0: Privilege,1: Any Privilege" bitfld.long 0x8 15. "PPARD15,12-Bit A/D 1 Converter Privilege Attribution" "0: Privilege,1: Any Privilege" newline bitfld.long 0x8 14. "PPARD14,Port Output Enable for GPT Group 0 Privilege Attribution" "0,1" bitfld.long 0x8 13. "PPARD13,Port Output Enable for GPT Group 1 Privilege Attribution" "0,1" bitfld.long 0x8 12. "PPARD12,Port Output Enable for GPT Group 2 Privilege Attribution" "0,1" bitfld.long 0x8 11. "PPARD11,Port Output Enable for GPT Group 3 Privilege Attribution" "0,1" hexmask.long.byte 0x8 6.--10. 1. "Reserved,These bits are read as 11111. The write value should be 11111." newline bitfld.long 0x8 5. "PPARD5,Asynchronous General Purpose Timer 0 Privilege Attribution" "0,1" bitfld.long 0x8 4. "PPARD4,Asynchronous General Purpose Timer 1 Privilege Attribution" "0,1" hexmask.long.byte 0x8 0.--3. 1. "Reserved,These bits are read as 1111. The write value should be 1111." line.long 0xC "PPARE,Peripheral Privilege Attribution Register E" bitfld.long 0xC 31. "PPARE31,General PWM Timer channel0 Privilege Attribution" "0,1" bitfld.long 0xC 30. "PPARE30,General PWM Timer channel1 Privilege Attribution" "0,1" bitfld.long 0xC 29. "PPARE29,General PWM Timer channel2 Privilege Attribution" "0,1" bitfld.long 0xC 28. "PPARE28,General PWM Timer channel3 Privilege Attribution" "0,1" bitfld.long 0xC 27. "PPARE27,General PWM Timer channel4 Privilege Attribution" "0,1" newline bitfld.long 0xC 26. "PPARE26,General PWM Timer channel5 Privilege Attribution" "0,1" bitfld.long 0xC 25. "PPARE25,General PWM Timer channel6 Privilege Attribution" "0,1" bitfld.long 0xC 24. "PPARE24,General PWM Timer channel7 Privilege Attribution" "0,1" bitfld.long 0xC 23. "PPARE23,General PWM Timer channel8 Privilege Attribution" "0,1" bitfld.long 0xC 22. "PPARE22,General PWM Timer channel9 Privilege Attribution" "0,1" newline bitfld.long 0xC 21. "PPARE21,General PWM Timer channel10 Privilege Attribution" "0,1" bitfld.long 0xC 20. "PPARE20,General PWM Timer channel11 Privilege Attribution" "0,1" bitfld.long 0xC 19. "PPARE19,General PWM Timer channel12 Privilege Attribution" "0,1" bitfld.long 0xC 18. "PPARE18,General PWM Timer channel13 Privilege Attribution" "0,1" bitfld.long 0xC 16.--17. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0xC 15. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.byte 0xC 10.--14. 1. "Reserved,These bits are read as 11111. The write value should be 11111." bitfld.long 0xC 9. "PPARE9,ULPT0 Privilege Attribution" "0,1" bitfld.long 0xC 8. "PPARE8,ULPT1 Privilege Attribution" "0,1" hexmask.long.byte 0xC 4.--7. 1. "Reserved,These bits are read as 1111. The write value should be 1111." newline bitfld.long 0xC 3. "PPARE3,Real Time Clock Privilege Attribution" "0,1" bitfld.long 0xC 2. "PPARE2,Independent Watchdog Timer Privilege Attribution" "0,1" bitfld.long 0xC 1. "PPARE1,Watchdog Timer0 Privilege Attribution" "0,1" bitfld.long 0xC 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" line.long 0x10 "MSPAR,Module Stop Privilege Attribution Register" bitfld.long 0x10 31. "MSPAR31,ELC clock stop Privilege Attribution" "0: Privilege.,1: Non-Privilege" hexmask.long.word 0x10 16.--30. 1. "Reserved,These bits are read as 111111111111111. The write value should be 111111111111111." hexmask.long.word 0x10 0.--15. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." rgroup.long 0x30++0xB line.long 0x0 "CFSAMONA,Code Flash Security Attribution Monitor Register A" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.word 0x0 15.--23. 1. "CFS2,Code Flash Secure area" hexmask.long.word 0x0 0.--14. 1. "Reserved,These bits are read as 000000000000000." line.long 0x4 "DFSAMON,Data Flash Security Attribution Monitor Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x4 10.--15. 1. "DFS,Data flash Secure area" hexmask.long.word 0x4 0.--9. 1. "Reserved,These bits are read as 0000000000." line.long 0x8 "DLMMON,Device Lifecycle Management State Monitor Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111." hexmask.long.word 0x8 4.--15. 1. "Reserved,These bits are read as 111111111111." hexmask.long.byte 0x8 0.--3. 1. "DLMMON,Device Lifecycle Management State Monitor" tree.end tree "PSCU_NS" base ad:0x50204000 group.long 0x4++0x13 line.long 0x0 "PSARB,Peripheral Security Attribution Register B" bitfld.long 0x0 31. "PSARB31,Serial Communication Interface 0 Security Attribution" "0,1" bitfld.long 0x0 30. "PSARB30,Serial Communication Interface 1 Security Attribution" "0,1" bitfld.long 0x0 29. "PSARB29,Serial Communication Interface 2 Security Attribution" "0,1" bitfld.long 0x0 28. "PSARB28,Serial Communication Interface 3 Security Attribution" "0,1" bitfld.long 0x0 27. "PSARB27,Serial Communication Interface 4 Security Attribution" "0,1" newline hexmask.long.byte 0x0 23.--26. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x0 22. "PSARB22,Serial Communication Interface 9 Security Attribution" "0,1" bitfld.long 0x0 20.--21. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 19. "PSARB19,Serial Peripheral Interface 0 Security Attribution" "0,1" bitfld.long 0x0 18. "PSARB18,Serial Peripheral Interface 1 Security Attribution" "0,1" newline bitfld.long 0x0 17. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 16. "PSARB16,Octa Memory Controller Security Attribution" "0,1" bitfld.long 0x0 15. "PSARB15,ETHER0/EDMAC0 Controller Security Attribution" "0,1" bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 12. "PSARB12,Universal Serial Bus 2.0 HS Interface 0 Security Attribution" "0,1" newline bitfld.long 0x0 11. "PSARB11,Universal Serial Bus 2.0 FS Interface 0 Security Attribution" "0,1" bitfld.long 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 9. "PSARB9,I2C Bus Interface 0 Security Attribution" "0,1" bitfld.long 0x0 8. "PSARB8,I2C Bus Interface 1 Security Attribution" "0,1" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "PSARB4,I3C Bus Interface 2 Security Attribution" "0,1" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.long 0x4 "PSARC,Peripheral Security Attribution Register C" bitfld.long 0x4 31. "PSARC31,SHIP Security Attribution" "0,1" bitfld.long 0x4 28.--30. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 27. "PSARC27,Controller Area Network with Flexible Data-Rate 0 Security Attribution" "0,1" bitfld.long 0x4 26. "PSARC26,Controller Area Network with Flexible Data-Rate 1 Security Attribution" "0,1" hexmask.long.word 0x4 17.--25. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x4 16. "PSARC16,CEU Security Attribution" "0,1" bitfld.long 0x4 15. "PSARC15,Graph-ic(GLCDC MIPI DRW JPEG) Security Attribution" "0,1" bitfld.long 0x4 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 13. "PSARC13,Data Operation Circuit Security Attribution" "0,1" bitfld.long 0x4 12. "PSARC12,Secure Digital Host IF 0 Security Attribution" "0,1" newline bitfld.long 0x4 11. "PSARC11,Secure Digital Host IF 1 Security Attribution" "0,1" bitfld.long 0x4 9.--10. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 8. "PSARC8,Serial Sound Interface Enhanced (channel 0) Security Attribution" "0,1" bitfld.long 0x4 7. "PSARC7,Serial Sound Interface Enhanced (channel 1) Security Attribution" "0,1" hexmask.long.byte 0x4 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 1. "PSARC1,Cyclic Redundancy Check Calculator Security Attribution" "0,1" bitfld.long 0x4 0. "PSARC0,Clock Frequency Accuracy Measurement Circuit Security Attribution" "0,1" line.long 0x8 "PSARD,Peripheral Security Attribution Register D" bitfld.long 0x8 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 28. "PSARD28,High speed analog Comparator 0 Security Attribution" "0,1" bitfld.long 0x8 27. "PSARD27,High speed analog Comparator 1 Security Attribution" "0,1" hexmask.long.byte 0x8 23.--26. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x8 22. "PSARD22,Temperature Sensor Security Attribution" "0,1" newline bitfld.long 0x8 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 20. "PSARD20,12-Bit D/A Converter Security Attribution" "0,1" bitfld.long 0x8 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 16. "PSARD16,12-Bit A/D 0 Converter Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0x8 15. "PSARD15,12-Bit A/D 1 Converter Security Attribution" "0: Secure,1: NonSecure" newline bitfld.long 0x8 14. "PSARD14,Port Output Enable for GPT Group 0 Security Attribution" "0,1" bitfld.long 0x8 13. "PSARD13,Port Output Enable for GPT Group 1 Security Attribution" "0,1" bitfld.long 0x8 12. "PSARD12,Port Output Enable for GPT Group 2 Security Attribution" "0,1" bitfld.long 0x8 11. "PSARD11,Port Output Enable for GPT Group 3 Security Attribution" "0,1" hexmask.long.byte 0x8 6.--10. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x8 5. "PSARD5,Asynchronous General Purpose Timer 0 Security Attribution" "0,1" bitfld.long 0x8 4. "PSARD4,Asynchronous General Purpose Timer 1 Security Attribution" "0,1" hexmask.long.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.long 0xC "PSARE,Peripheral Security Attribution Register E" bitfld.long 0xC 31. "PSARE31,General PWM Timer channel0 Security Attribution" "0,1" bitfld.long 0xC 30. "PSARE30,General PWM Timer channel1 Security Attribution" "0,1" bitfld.long 0xC 29. "PSARE29,General PWM Timer channel2 Security Attribution" "0,1" bitfld.long 0xC 28. "PSARE28,General PWM Timer channel3 Security Attribution" "0,1" bitfld.long 0xC 27. "PSARE27,General PWM Timer channel4 Security Attribution" "0,1" newline bitfld.long 0xC 26. "PSARE26,General PWM Timer channel5 Security Attribution" "0,1" bitfld.long 0xC 25. "PSARE25,General PWM Timer channel6 Security Attribution" "0,1" bitfld.long 0xC 24. "PSARE24,General PWM Timer channel7 Security Attribution" "0,1" bitfld.long 0xC 23. "PSARE23,General PWM Timer channel8 Security Attribution" "0,1" bitfld.long 0xC 22. "PSARE22,General PWM Timer channel9 Security Attribution" "0,1" newline bitfld.long 0xC 21. "PSARE21,General PWM Timer channel10 Security Attribution" "0,1" bitfld.long 0xC 20. "PSARE20,General PWM Timer channel11 Security Attribution" "0,1" bitfld.long 0xC 19. "PSARE19,General PWM Timer channel12 Security Attribution" "0,1" bitfld.long 0xC 18. "PSARE18,General PWM Timer channel13 Security Attribution" "0,1" bitfld.long 0xC 16.--17. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0xC 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0xC 10.--14. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0xC 9. "PSARE9,ULPT0 Security Attribution" "0,1" bitfld.long 0xC 8. "PSARE8,ULPT1 Security Attribution" "0,1" hexmask.long.byte 0xC 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0xC 3. "PSARE3,Real Time Clock Security Attribution" "0,1" bitfld.long 0xC 2. "PSARE2,Independent Watchdog Timer Security Attribution" "0,1" bitfld.long 0xC 1. "PSARE1,WDT0 Security Attribution" "0: Secure,1: NonSecure" bitfld.long 0xC 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.long 0x10 "MSSAR,Module Stop Security Attribution Register" bitfld.long 0x10 31. "MSSAR31,ELC clock stop Security Attribution" "0: Secure.,1: Non-Secure" hexmask.long.byte 0x10 23.--30. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x10 22. "MSSAR22,DMAC0/DTC0 Clock Stop Security Attribution" "0,1" hexmask.long.byte 0x10 16.--21. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x10 15. "MSSAR15,Standby RAM Clock Stop Security Attribution" "0: Secure.,1: Non-Secure" newline bitfld.long 0x10 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 13. "MSSAR13,STCM0 Security Attribution" "0: Secure.,1: Non-Secure" bitfld.long 0x10 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 11. "MSSAR11,CTCM0 Security Attribution" "0: Secure.,1: Non-Secure" hexmask.long.word 0x10 2.--10. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x10 1. "MSSAR1,SRAM1 Clock Stop Security Attribution" "0: Secure.,1: Non-Secure" bitfld.long 0x10 0. "MSSAR0,SRAM0 Clock Stop Security Attribution" "0: Secure.,1: Non-Secure" group.long 0x1C++0x13 line.long 0x0 "PPARB,Peripheral Privilege Attribution Register B" bitfld.long 0x0 31. "PPARB31,Serial Communication Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 30. "PPARB30,Serial Communication Interface 1 Privilege Attribution" "0,1" bitfld.long 0x0 29. "PPARB29,Serial Communication Interface 2 Privilege Attribution" "0,1" bitfld.long 0x0 28. "PPARB28,Serial Communication Interface 3 Privilege Attribution" "0,1" bitfld.long 0x0 27. "PPARB27,Serial Communication Interface 4 Privilege Attribution" "0,1" newline hexmask.long.byte 0x0 23.--26. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.long 0x0 22. "PPARB22,Serial Communication Interface 9 Privilege Attribution" "0,1" bitfld.long 0x0 20.--21. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x0 19. "PPARB19,Serial Peripheral Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 18. "PPARB18,Serial Peripheral Interface 1 Privilege Attribution" "0,1" newline bitfld.long 0x0 17. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 16. "PPARB16,Octa Memory Controller Privilege Attribution" "0,1" bitfld.long 0x0 15. "PPARB15,ETHER0/EDMAC0 Controller Privilege Attribution" "0,1" bitfld.long 0x0 13.--14. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x0 12. "PPARB12,Universal Serial Bus 2.0 HS Interface 0 Privilege Attribution" "0,1" newline bitfld.long 0x0 11. "PPARB11,Universal Serial Bus 2.0 FS Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 10. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x0 9. "PPARB9,I2C Bus Interface 0 Privilege Attribution" "0,1" bitfld.long 0x0 8. "PPARB8,I2C Bus Interface 1 Privilege Attribution" "0,1" bitfld.long 0x0 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "PPARB4,I3C Bus Interface 2 Privilege Attribution" "0,1" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 1111. The write value should be 1111." line.long 0x4 "PPARC,Peripheral Privilege Attribution Register C" bitfld.long 0x4 31. "PPARC31,SHIP Privilege Attribution" "0,1" bitfld.long 0x4 28.--30. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x4 27. "PPARC27,Controller Area Network with Flexible Data-Rate 0 Privilege Attribution" "0,1" bitfld.long 0x4 26. "PPARC26,Controller Area Network with Flexible Data-Rate 1 Privilege Attribution" "0,1" hexmask.long.word 0x4 17.--25. 1. "Reserved,These bits are read as 111111111. The write value should be 111111111." newline bitfld.long 0x4 16. "PPARC16,CEU Privilege Attribution" "0,1" bitfld.long 0x4 15. "PPARC15,Graph-ic(GLCDC MIPI DRW JPEG) Privilege Attribution" "0,1" bitfld.long 0x4 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x4 13. "PPARC13,Data Operation Circuit Privilege Attribution" "0,1" bitfld.long 0x4 12. "PPARC12,Privilege Digital Host IF 0 Privilege Attribution" "0,1" newline bitfld.long 0x4 11. "PPARC11,Privilege Digital Host IF 1 Privilege Attribution" "0,1" bitfld.long 0x4 9.--10. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x4 8. "PPARC8,Serial Sound Interface Enhanced (channel 0) Privilege Attribution" "0,1" bitfld.long 0x4 7. "PPARC7,Serial Sound Interface Enhanced (channel 1) Privilege Attribution" "0,1" hexmask.long.byte 0x4 2.--6. 1. "Reserved,These bits are read as 11111. The write value should be 11111." newline bitfld.long 0x4 1. "PPARC1,Cyclic Redundancy Check Calculator Privilege Attribution" "0,1" bitfld.long 0x4 0. "PPARC0,Clock Frequency Accuracy Measurement Circuit Privilege Attribution" "0,1" line.long 0x8 "PPARD,Peripheral Privilege Attribution Register D" bitfld.long 0x8 29.--31. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x8 28. "PPARD28,High speed analog Comparator 0 Privilege Attribution" "0,1" bitfld.long 0x8 27. "PPARD27,High speed analog Comparator 1 Privilege Attribution" "0,1" hexmask.long.byte 0x8 23.--26. 1. "Reserved,These bits are read as 1111. The write value should be 1111." bitfld.long 0x8 22. "PPARD22,Temperature Sensor Privilege Attribution" "0,1" newline bitfld.long 0x8 21. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x8 20. "PPARD20,12-Bit D/A Converter Privilege Attribution" "0,1" bitfld.long 0x8 17.--19. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.long 0x8 16. "PPARD16,12-Bit A/D 0 Converter Privilege Attribution" "0: Privilege,1: Any Privilege" bitfld.long 0x8 15. "PPARD15,12-Bit A/D 1 Converter Privilege Attribution" "0: Privilege,1: Any Privilege" newline bitfld.long 0x8 14. "PPARD14,Port Output Enable for GPT Group 0 Privilege Attribution" "0,1" bitfld.long 0x8 13. "PPARD13,Port Output Enable for GPT Group 1 Privilege Attribution" "0,1" bitfld.long 0x8 12. "PPARD12,Port Output Enable for GPT Group 2 Privilege Attribution" "0,1" bitfld.long 0x8 11. "PPARD11,Port Output Enable for GPT Group 3 Privilege Attribution" "0,1" hexmask.long.byte 0x8 6.--10. 1. "Reserved,These bits are read as 11111. The write value should be 11111." newline bitfld.long 0x8 5. "PPARD5,Asynchronous General Purpose Timer 0 Privilege Attribution" "0,1" bitfld.long 0x8 4. "PPARD4,Asynchronous General Purpose Timer 1 Privilege Attribution" "0,1" hexmask.long.byte 0x8 0.--3. 1. "Reserved,These bits are read as 1111. The write value should be 1111." line.long 0xC "PPARE,Peripheral Privilege Attribution Register E" bitfld.long 0xC 31. "PPARE31,General PWM Timer channel0 Privilege Attribution" "0,1" bitfld.long 0xC 30. "PPARE30,General PWM Timer channel1 Privilege Attribution" "0,1" bitfld.long 0xC 29. "PPARE29,General PWM Timer channel2 Privilege Attribution" "0,1" bitfld.long 0xC 28. "PPARE28,General PWM Timer channel3 Privilege Attribution" "0,1" bitfld.long 0xC 27. "PPARE27,General PWM Timer channel4 Privilege Attribution" "0,1" newline bitfld.long 0xC 26. "PPARE26,General PWM Timer channel5 Privilege Attribution" "0,1" bitfld.long 0xC 25. "PPARE25,General PWM Timer channel6 Privilege Attribution" "0,1" bitfld.long 0xC 24. "PPARE24,General PWM Timer channel7 Privilege Attribution" "0,1" bitfld.long 0xC 23. "PPARE23,General PWM Timer channel8 Privilege Attribution" "0,1" bitfld.long 0xC 22. "PPARE22,General PWM Timer channel9 Privilege Attribution" "0,1" newline bitfld.long 0xC 21. "PPARE21,General PWM Timer channel10 Privilege Attribution" "0,1" bitfld.long 0xC 20. "PPARE20,General PWM Timer channel11 Privilege Attribution" "0,1" bitfld.long 0xC 19. "PPARE19,General PWM Timer channel12 Privilege Attribution" "0,1" bitfld.long 0xC 18. "PPARE18,General PWM Timer channel13 Privilege Attribution" "0,1" bitfld.long 0xC 16.--17. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0xC 15. "Reserved,This bit is read as 1. The write value should be 1." "0,1" hexmask.long.byte 0xC 10.--14. 1. "Reserved,These bits are read as 11111. The write value should be 11111." bitfld.long 0xC 9. "PPARE9,ULPT0 Privilege Attribution" "0,1" bitfld.long 0xC 8. "PPARE8,ULPT1 Privilege Attribution" "0,1" hexmask.long.byte 0xC 4.--7. 1. "Reserved,These bits are read as 1111. The write value should be 1111." newline bitfld.long 0xC 3. "PPARE3,Real Time Clock Privilege Attribution" "0,1" bitfld.long 0xC 2. "PPARE2,Independent Watchdog Timer Privilege Attribution" "0,1" bitfld.long 0xC 1. "PPARE1,Watchdog Timer0 Privilege Attribution" "0,1" bitfld.long 0xC 0. "Reserved,This bit is read as 1. The write value should be 1." "0,1" line.long 0x10 "MSPAR,Module Stop Privilege Attribution Register" bitfld.long 0x10 31. "MSPAR31,ELC clock stop Privilege Attribution" "0: Privilege.,1: Non-Privilege" hexmask.long.word 0x10 16.--30. 1. "Reserved,These bits are read as 111111111111111. The write value should be 111111111111111." hexmask.long.word 0x10 0.--15. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." rgroup.long 0x30++0xB line.long 0x0 "CFSAMONA,Code Flash Security Attribution Monitor Register A" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.word 0x0 15.--23. 1. "CFS2,Code Flash Secure area" hexmask.long.word 0x0 0.--14. 1. "Reserved,These bits are read as 000000000000000." line.long 0x4 "DFSAMON,Data Flash Security Attribution Monitor Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x4 10.--15. 1. "DFS,Data flash Secure area" hexmask.long.word 0x4 0.--9. 1. "Reserved,These bits are read as 0000000000." line.long 0x8 "DLMMON,Device Lifecycle Management State Monitor Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 1111111111111111." hexmask.long.word 0x8 4.--15. 1. "Reserved,These bits are read as 111111111111." hexmask.long.byte 0x8 0.--3. 1. "DLMMON,Device Lifecycle Management State Monitor" tree.end tree.end tree "RMPU (Renesas Memory Protection Unit)" base ad:0x0 tree "RMPU" base ad:0x40000000 group.word 0x0++0x1 line.word 0x0 "MMPUOAD,MMPU Operation After Detection Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "OAD,Operation after detection" "0: NMI,1: Reset" group.word 0x4++0x1 line.word 0x0 "MMPUOADPT,MMPU Operation After Detection Protect Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUOAD register writing is possible.,1: MMPUOAD register writing is protected. Read is.." group.word 0x100++0x1 line.word 0x0 "MMPUENDMAC,MMPU Enable Register for DMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of DMAC Enable" "0: Bus master MPU of DMAC is disabled,1: Bus master MPU of DMAC is enabled" group.word 0x104++0x1 line.word 0x0 "MMPUENPTDMAC,MMPU Enable Protect Register for DMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENDMAC register write is possible,1: MMPUENDMAC register write is protected. Read is.." group.word 0x108++0x1 line.word 0x0 "MMPURPTDMAC,MMPU Regions Protect Register for DMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for DMAC write is possible,1: Bus master MPU register for DMAC write is.." group.word 0x10C++0x1 line.word 0x0 "MMPURPTDMAC_SEC,MMPU Regions Protect register for DMAC Secure" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for DMAC Secure write is..,1: Bus master MPU register for DMAC Secure write is.." repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x200)++0x1 line.word 0x0 "MMPUACDMAC$1,MMPU Access Control Register for DMAC %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "PP,Privilege protection" "0: Unprivileged access permission,1: Unprivileged access protection" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: DMAC region n unit is disabled,1: DMAC region n unit is enabled" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x204)++0x3 line.long 0x0 "MMPUSDMAC$1,MMPU Start Address Register for DMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 5 bits are fixed to 0." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x208)++0x3 line.long 0x0 "MMPUEDMAC$1,MMPU End Address Register for DMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 5 bits are fixed to 1." repeat.end group.word 0x500++0x1 line.word 0x0 "MMPUENEDMAC,MMPU Enable Register for EDMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of EDMAC Enable" "0: Bus master MPU of EDMAC is disabled,1: Bus master MPU of EDMAC is enabled" group.word 0x504++0x1 line.word 0x0 "MMPUENPTEDMAC,MMPU Enable Protect Register for EDMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENEDMAC register write is possible,1: MMPUENEDMAC register write is protected. Read is.." group.word 0x508++0x1 line.word 0x0 "MMPURPTEDMAC,MMPU Regions Protect Register for EDMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for EDMAC write is..,1: Bus master MPU register for EDMAC write is.." repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x600)++0x1 line.word 0x0 "MMPUACEDMAC$1,MMPU Access Control Register for EDMAC %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: EDMAC region n unit is disabled,1: EDMAC region n unit is enabled" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x604)++0x3 line.long 0x0 "MMPUSEDMAC$1,MMPU Start Address Register for EDMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 5 bits are fixed to 0." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x608)++0x3 line.long 0x0 "MMPUEEDMAC$1,MMPU End Address Register for EDMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 5 bits are fixed to 1." repeat.end group.word 0x700++0x1 line.word 0x0 "MMPUENGLCDC,MMPU Enable Register for GLCDC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of GLCDC Enable" "0: Bus master MPU of GLCDC is disabled,1: Bus master MPU of GLCDC is enabled" group.word 0x704++0x1 line.word 0x0 "MMPUENPTGLCDC,MMPU Enable Protect Register for GLCDC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENGLCDC register write is possible,1: MMPUENGLCDC register write is protected. Read is.." group.word 0x708++0x1 line.word 0x0 "MMPURPTGLCDC,MMPU Regions Protect Register for GLCDC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for GLCDC write is..,1: Bus master MPU register for GLCDC write is.." repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x800)++0x1 line.word 0x0 "MMPUACGLCDC$1,MMPU Access Control Register for GLCDC %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: GLCDC region n unit is disabled,1: GLCDC region n unit is enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x804)++0x3 line.long 0x0 "MMPUSGLCDC$1,MMPU Start Address Register for GLCDC %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 10 bits are fixed to 0." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x808)++0x3 line.long 0x0 "MMPUEGLCDC$1,Graphics Region %s End Address Register" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 10 bits are fixed to 1." repeat.end group.word 0x900++0x1 line.word 0x0 "MMPUENDRW,MMPU Enable Register for DRW" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of DRW Enable" "0: Bus master MPU of DRW is disabled,1: Bus master MPU of DRW is enabled" group.word 0x904++0x1 line.word 0x0 "MMPUENPDRW,MMPU Enable Protect Register for DRW" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENDRW register write is possible,1: MMPUENDRW register write is protected. Read is.." group.word 0x908++0x1 line.word 0x0 "MMPURPTDRW,MMPU Regions Protect Register for DRW" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for DRW write is possible,1: Bus master MPU register for DRW write is.." repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0xA00)++0x1 line.word 0x0 "MMPUACDRW$1,MMPU Access Control Register for DRW %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: DRW region n unit is disabled,1: DRW region n unit is enabled" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xA04)++0x3 line.long 0x0 "MMPUSDRW$1,MMPU Start Address Register for DRW %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 10 bits are fixed to 0." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xA08)++0x3 line.long 0x0 "MMPUEDRW$1,Graphics Region %s End Address Register" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 10 bits are fixed to 1." repeat.end group.word 0xB00++0x1 line.word 0x0 "MMPUENMIPI,MMPU Enable Register for MIPI" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of MIPI Enable" "0: Bus master MPU of MIPI is disabled,1: Bus master MPU of MIPI is enabled" group.word 0xB04++0x1 line.word 0x0 "MMPUENPTMIPI,MMPU Enable Protect Register for MIPI" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENMIPI register write is possible,1: MMPUENMIPI register write is protected. Read is.." group.word 0xB08++0x1 line.word 0x0 "MMPURPTMIPI,MMPU Regions Protect Register for MIPI" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for MIPI write is possible,1: Bus master MPU register for MIPI write is.." group.word 0xC00++0x1 line.word 0x0 "MMPUACMIPI ,MMPU Access Control Register for MIPI" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: MIPI region n unit is disabled,1: MIPI region n unit is enabled" group.long 0xC04++0x7 line.long 0x0 "MMPUSMIPI,MMPU Start Address Register for MIPI" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 12 bits are fixed to 0." line.long 0x4 "MMPUEMIPI,MMPU End Address Register for MIPI" hexmask.long 0x4 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 12 bits are fixed to 1." group.word 0xD00++0x1 line.word 0x0 "MMPUENCEU,MMPU Enable Register for CEU" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of CEU Enable" "0: Bus master MPU of CEU is disabled,1: Bus master MPU of CEU is enabled" group.word 0xD04++0x1 line.word 0x0 "MMPUENPTCEU,MMPU Enable Protect Register for CEU" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENCEU register write is possible,1: MMPUENCEU register write is protected. Read is.." group.word 0xD08++0x1 line.word 0x0 "MMPURPTCEU,MMPU Regions Protect Register for CEU" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for CEU write is possible,1: Bus master MPU register for CEU write is.." repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0xE00)++0x1 line.word 0x0 "MMPUACCEU$1,MMPU Access Control Register for CEU %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: CEU region n unit is disabled,1: CEU region n unit is enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xE04)++0x3 line.long 0x0 "MMPUSCEU$1,MMPU Start Address Register for CEU %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 12 bits are fixed to 0." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xE08)++0x3 line.long 0x0 "MMPUECEU$1,MMPU End Address Register for CEU %s" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 12 bits are fixed to 1." repeat.end tree.end tree "RMPU_NS" base ad:0x50000000 group.word 0x0++0x1 line.word 0x0 "MMPUOAD,MMPU Operation After Detection Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "OAD,Operation after detection" "0: NMI,1: Reset" group.word 0x4++0x1 line.word 0x0 "MMPUOADPT,MMPU Operation After Detection Protect Register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUOAD register writing is possible.,1: MMPUOAD register writing is protected. Read is.." group.word 0x100++0x1 line.word 0x0 "MMPUENDMAC,MMPU Enable Register for DMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of DMAC Enable" "0: Bus master MPU of DMAC is disabled,1: Bus master MPU of DMAC is enabled" group.word 0x104++0x1 line.word 0x0 "MMPUENPTDMAC,MMPU Enable Protect Register for DMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENDMAC register write is possible,1: MMPUENDMAC register write is protected. Read is.." group.word 0x108++0x1 line.word 0x0 "MMPURPTDMAC,MMPU Regions Protect Register for DMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for DMAC write is possible,1: Bus master MPU register for DMAC write is.." group.word 0x10C++0x1 line.word 0x0 "MMPURPTDMAC_SEC,MMPU Regions Protect register for DMAC Secure" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for DMAC Secure write is..,1: Bus master MPU register for DMAC Secure write is.." repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x200)++0x1 line.word 0x0 "MMPUACDMAC$1,MMPU Access Control Register for DMAC %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "PP,Privilege protection" "0: Unprivileged access permission,1: Unprivileged access protection" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: DMAC region n unit is disabled,1: DMAC region n unit is enabled" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x204)++0x3 line.long 0x0 "MMPUSDMAC$1,MMPU Start Address Register for DMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 5 bits are fixed to 0." repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x208)++0x3 line.long 0x0 "MMPUEDMAC$1,MMPU End Address Register for DMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 5 bits are fixed to 1." repeat.end group.word 0x500++0x1 line.word 0x0 "MMPUENEDMAC,MMPU Enable Register for EDMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of EDMAC Enable" "0: Bus master MPU of EDMAC is disabled,1: Bus master MPU of EDMAC is enabled" group.word 0x504++0x1 line.word 0x0 "MMPUENPTEDMAC,MMPU Enable Protect Register for EDMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENEDMAC register write is possible,1: MMPUENEDMAC register write is protected. Read is.." group.word 0x508++0x1 line.word 0x0 "MMPURPTEDMAC,MMPU Regions Protect Register for EDMAC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for EDMAC write is..,1: Bus master MPU register for EDMAC write is.." repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x600)++0x1 line.word 0x0 "MMPUACEDMAC$1,MMPU Access Control Register for EDMAC %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: EDMAC region n unit is disabled,1: EDMAC region n unit is enabled" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x604)++0x3 line.long 0x0 "MMPUSEDMAC$1,MMPU Start Address Register for EDMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 5 bits are fixed to 0." repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x608)++0x3 line.long 0x0 "MMPUEEDMAC$1,MMPU End Address Register for EDMAC %s" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 5 bits are fixed to 1." repeat.end group.word 0x700++0x1 line.word 0x0 "MMPUENGLCDC,MMPU Enable Register for GLCDC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of GLCDC Enable" "0: Bus master MPU of GLCDC is disabled,1: Bus master MPU of GLCDC is enabled" group.word 0x704++0x1 line.word 0x0 "MMPUENPTGLCDC,MMPU Enable Protect Register for GLCDC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENGLCDC register write is possible,1: MMPUENGLCDC register write is protected. Read is.." group.word 0x708++0x1 line.word 0x0 "MMPURPTGLCDC,MMPU Regions Protect Register for GLCDC" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for GLCDC write is..,1: Bus master MPU register for GLCDC write is.." repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0x800)++0x1 line.word 0x0 "MMPUACGLCDC$1,MMPU Access Control Register for GLCDC %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: GLCDC region n unit is disabled,1: GLCDC region n unit is enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x804)++0x3 line.long 0x0 "MMPUSGLCDC$1,MMPU Start Address Register for GLCDC %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 10 bits are fixed to 0." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x808)++0x3 line.long 0x0 "MMPUEGLCDC$1,Graphics Region %s End Address Register" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 10 bits are fixed to 1." repeat.end group.word 0x900++0x1 line.word 0x0 "MMPUENDRW,MMPU Enable Register for DRW" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of DRW Enable" "0: Bus master MPU of DRW is disabled,1: Bus master MPU of DRW is enabled" group.word 0x904++0x1 line.word 0x0 "MMPUENPDRW,MMPU Enable Protect Register for DRW" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENDRW register write is possible,1: MMPUENDRW register write is protected. Read is.." group.word 0x908++0x1 line.word 0x0 "MMPURPTDRW,MMPU Regions Protect Register for DRW" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for DRW write is possible,1: Bus master MPU register for DRW write is.." repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0xA00)++0x1 line.word 0x0 "MMPUACDRW$1,MMPU Access Control Register for DRW %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: DRW region n unit is disabled,1: DRW region n unit is enabled" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xA04)++0x3 line.long 0x0 "MMPUSDRW$1,MMPU Start Address Register for DRW %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 10 bits are fixed to 0." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xA08)++0x3 line.long 0x0 "MMPUEDRW$1,Graphics Region %s End Address Register" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 10 bits are fixed to 1." repeat.end group.word 0xB00++0x1 line.word 0x0 "MMPUENMIPI,MMPU Enable Register for MIPI" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of MIPI Enable" "0: Bus master MPU of MIPI is disabled,1: Bus master MPU of MIPI is enabled" group.word 0xB04++0x1 line.word 0x0 "MMPUENPTMIPI,MMPU Enable Protect Register for MIPI" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENMIPI register write is possible,1: MMPUENMIPI register write is protected. Read is.." group.word 0xB08++0x1 line.word 0x0 "MMPURPTMIPI,MMPU Regions Protect Register for MIPI" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for MIPI write is possible,1: Bus master MPU register for MIPI write is.." group.word 0xC00++0x1 line.word 0x0 "MMPUACMIPI ,MMPU Access Control Register for MIPI" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: MIPI region n unit is disabled,1: MIPI region n unit is enabled" group.long 0xC04++0x7 line.long 0x0 "MMPUSMIPI,MMPU Start Address Register for MIPI" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 12 bits are fixed to 0." line.long 0x4 "MMPUEMIPI,MMPU End Address Register for MIPI" hexmask.long 0x4 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 12 bits are fixed to 1." group.word 0xD00++0x1 line.word 0x0 "MMPUENCEU,MMPU Enable Register for CEU" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "ENABLE,Bus master MPU of CEU Enable" "0: Bus master MPU of CEU is disabled,1: Bus master MPU of CEU is enabled" group.word 0xD04++0x1 line.word 0x0 "MMPUENPTCEU,MMPU Enable Protect Register for CEU" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: MMPUENCEU register write is possible,1: MMPUENCEU register write is protected. Read is.." group.word 0xD08++0x1 line.word 0x0 "MMPURPTCEU,MMPU Regions Protect Register for CEU" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PROTECT,Protection of register" "0: Bus master MPU register for CEU write is possible,1: Bus master MPU register for CEU write is.." repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.word ($2+0xE00)++0x1 line.word 0x0 "MMPUACCEU$1,MMPU Access Control Register for CEU %s" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "WP,Write protection" "0: Write permission,1: Write protection" bitfld.word 0x0 1. "RP,Read protection" "0: Read permission,1: Read protection" newline bitfld.word 0x0 0. "ENABLE,Region Enable" "0: CEU region n unit is disabled,1: CEU region n unit is enabled" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xE04)++0x3 line.long 0x0 "MMPUSCEU$1,MMPU Start Address Register for CEU %s" hexmask.long 0x0 0.--31. 1. "MMPUS,Region Stat Address : Address where the region starts for use in region determination.NOTE: The low-order 12 bits are fixed to 0." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0xE08)++0x3 line.long 0x0 "MMPUECEU$1,MMPU End Address Register for CEU %s" hexmask.long 0x0 0.--31. 1. "MMPUE,Region End Address : Address where the region end for use in region determination.NOTE: The low-order 12 bits are fixed to 1." repeat.end tree.end tree.end tree "RTC (Realtime Clock)" base ad:0x0 tree "RTC" base ad:0x40202000 rgroup.byte 0x0++0x0 line.byte 0x0 "R64CNT,64-Hz Counter" bitfld.byte 0x0 6. "F1HZ,1Hz" "0,1" bitfld.byte 0x0 5. "F2HZ,2Hz" "0,1" newline bitfld.byte 0x0 4. "F4HZ,4Hz" "0,1" bitfld.byte 0x0 3. "F8HZ,8Hz" "0,1" newline bitfld.byte 0x0 2. "F16HZ,16Hz" "0,1" bitfld.byte 0x0 1. "F32HZ,32Hz" "0,1" newline bitfld.byte 0x0 0. "F64HZ,64Hz" "0,1" group.byte 0x2++0x0 line.byte 0x0 "BCNT0,Binary Counter 0" hexmask.byte 0x0 0.--7. 1. "BCNT0,The BCNT0 counter is a readable/writable 32-bit binary counter b7 to b0." group.byte 0x2++0x0 line.byte 0x0 "RSECCNT,Second Counter" bitfld.byte 0x0 4.--6. "SEC10,10-Second Count Counts from 0 to 5 for 60-second counting." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Count Counts from 0 to 9 every second. When a carry is generated 1 is added to the tens place." group.byte 0x4++0x0 line.byte 0x0 "BCNT1,Binary Counter 1" hexmask.byte 0x0 0.--7. 1. "BCNT1,The BCNT1 counter is a readable/writable 32-bit binary counter b15 to b8." group.byte 0x4++0x0 line.byte 0x0 "RMINCNT,Minute Counter" bitfld.byte 0x0 4.--6. "MIN10,10-Minute Count Counts from 0 to 5 for 60-minute counting." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Count Counts from 0 to 9 every minute. When a carry is generated 1 is added to the tens place." group.byte 0x6++0x0 line.byte 0x0 "BCNT2,Binary Counter 2" hexmask.byte 0x0 0.--7. 1. "BCNT2,The BCNT2 counter is a readable/writable 32-bit binary counter b23 to b16." group.byte 0x6++0x0 line.byte 0x0 "RHRCNT,Hour Counter" bitfld.byte 0x0 6. "PM,Time Counter Setting for a.m./p.m." "0: a.m.,1: p.m." bitfld.byte 0x0 4.--5. "HR10,10-Hour Count Counts from 0 to 2 once per carry from the ones place." "0,1,2,3" newline hexmask.byte 0x0 0.--3. 1. "HR1,1-Hour Count Counts from 0 to 9 once per hour. When a carry is generated 1 is added to the tens place." group.byte 0x8++0x0 line.byte 0x0 "BCNT3,Binary Counter 3" hexmask.byte 0x0 0.--7. 1. "BCNT3,The BCNT3 counter is a readable/writable 32-bit binary counter b31 to b24." group.byte 0x8++0x0 line.byte 0x0 "RWKCNT,Day-of-Week Counter" bitfld.byte 0x0 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,?,?,?,?,?,?" group.byte 0xA++0x0 line.byte 0x0 "RDAYCNT,Day Counter" bitfld.byte 0x0 4.--5. "DATE10,10-Day Count Counts from 0 to 3 once per carry from the ones place." "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "DATE1,1-Day Count Counts from 0 to 9 once per day. When a carry is generated 1 is added to the tens place." group.byte 0xC++0x0 line.byte 0x0 "RMONCNT,Month Counter" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MON10,10-Month Count Counts from 0 to 1 once per carry from the ones place." "0,1" newline hexmask.byte 0x0 0.--3. 1. "MON1,1-Month Count Counts from 0 to 9 once per month. When a carry is generated 1 is added to the tens place." group.word 0xE++0x1 line.word 0x0 "RYRCNT,Year Counter" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 4.--7. 1. "YR10,10-Year Count Counts from 0 to 9 once per carry from ones place. When a carry is generated in the tens place 1 is added to the hundreds place." newline hexmask.word.byte 0x0 0.--3. 1. "YR1,1-Year Count Counts from 0 to 9 once per year. When a carry is generated 1 is added to the tens place." group.byte 0x10++0x0 line.byte 0x0 "BCNT0AR,Binary Counter 0 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT0AR,he BCNT0AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b7 to b0." group.byte 0x10++0x0 line.byte 0x0 "RSECAR,Second Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RSECCNT.." bitfld.byte 0x0 4.--6. "SEC10,10-Seconds Value for the tens place of seconds" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Value for the ones place of seconds" group.byte 0x12++0x0 line.byte 0x0 "BCNT1AR,Binary Counter 1 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT1AR,he BCNT1AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b15 to b8." group.byte 0x12++0x0 line.byte 0x0 "RMINAR,Minute Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RMINCNT.." bitfld.byte 0x0 4.--6. "MIN10,10-Minute Count Value for the tens place of minutes" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Count Value for the ones place of minutes" group.byte 0x14++0x0 line.byte 0x0 "BCNT2AR,Binary Counter 2 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT2AR,The BCNT2AR counter is a readable/writable 32-bit binary counter b23 to b16." group.byte 0x14++0x0 line.byte 0x0 "RHRAR,Hour Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RHRCNT.." bitfld.byte 0x0 6. "PM,Time Counter Setting for a.m./p.m." "0: a.m.,1: p.m." newline bitfld.byte 0x0 4.--5. "HR10,10-Hour Count Value for the tens place of hours" "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "HR1,1-Hour Count Value for the ones place of hours" group.byte 0x16++0x0 line.byte 0x0 "BCNT3AR,Binary Counter 3 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT3AR,The BCNT3AR counter is a readable/writable 32-bit binary counter b31 to b24." group.byte 0x16++0x0 line.byte 0x0 "RWKAR,Day-of-Week Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RWKCNT.." hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,?,?,?,?,?,?" group.byte 0x18++0x0 line.byte 0x0 "BCNT0AER,Binary Counter 0 Alarm Enable Register" hexmask.byte 0x0 0.--7. 1. "ENB,The BCNT0AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b7 to b0." group.byte 0x18++0x0 line.byte 0x0 "RDAYAR,Date Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RDAYCNT.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "DATE10,10 Days Value for the tens place of days" "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "DATE1,1 Day Value for the ones place of days" group.byte 0x1A++0x0 line.byte 0x0 "BCNT1AER,Binary Counter 1 Alarm Enable Register" hexmask.byte 0x0 0.--7. 1. "ENB,The BCNT1AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b15 to b8." group.byte 0x1A++0x0 line.byte 0x0 "RMONAR,Month Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RMONCNT.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 4. "MON10,10 Months Value for the tens place of months" "0,1" hexmask.byte 0x0 0.--3. 1. "MON1,1 Month Value for the ones place of months" group.word 0x1C++0x1 line.word 0x0 "BCNT2AER,Binary Counter 2 Alarm Enable Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "ENB,The BCNT2AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b23 to b16." group.word 0x1C++0x1 line.word 0x0 "RYRAR,Year Alarm Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 4.--7. 1. "YR10,10 Years Value for the tens place of years" newline hexmask.word.byte 0x0 0.--3. 1. "YR1,1 Year Value for the ones place of years" group.byte 0x1E++0x0 line.byte 0x0 "BCNT3AER,Binary Counter 3 Alarm Enable Register" hexmask.byte 0x0 0.--7. 1. "ENB,The BCNT3AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b31 to b24." group.byte 0x1E++0x0 line.byte 0x0 "RYRAREN,Year Alarm Enable Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RYRCNT.." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x20++0x0 line.byte 0x0 "RSR,RTC Start Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "PF,Interrupt period" "0,1" newline bitfld.byte 0x0 1. "CF,Carry flag" "0,1" bitfld.byte 0x0 0. "AF,Alarm flag" "0,1" group.byte 0x22++0x0 line.byte 0x0 "RCR1,RTC Control Register 1" hexmask.byte 0x0 4.--7. 1. "PES,Periodic Interrupt Select" bitfld.byte 0x0 3. "RTCOS,RTCOUT Output Select" "0: RTCOUT outputs 1 Hz.,1: RTCOUT outputs 64 Hz." newline bitfld.byte 0x0 2. "PIE,Periodic Interrupt Enable" "0: A periodic interrupt request is disabled.,1: A periodic interrupt request is enabled." bitfld.byte 0x0 1. "CIE,Carry Interrupt Enable" "0: A carry interrupt request is disabled.,1: A carry interrupt request is enabled." newline bitfld.byte 0x0 0. "AIE,Alarm Interrupt Enable" "0: An alarm interrupt request is disabled.,1: An alarm interrupt request is enabled." group.byte 0x24++0x0 line.byte 0x0 "RCR2,RTC Control Register 2" bitfld.byte 0x0 7. "CNTMD,Count Mode Select" "0: The calendar count mode.,1: The binary count mode." bitfld.byte 0x0 6. "HR24,Hours Mode" "0: The RTC operates in 12-hour mode.,1: The RTC operates in 24-hour mode." newline bitfld.byte 0x0 5. "AADJP,Automatic Adjustment Period Select (When the LOCO clock is selected the setting of this bit is disabled.)" "0: The RADJ.ADJ[5:0] setting value is adjusted from..,1: The RADJ.ADJ[5:0] setting value is adjusted from.." bitfld.byte 0x0 4. "AADJE,Automatic Adjustment Enable (When the LOCO clock is selected the setting of this bit is disabled.)" "0: Automatic adjustment is disabled.,1: Automatic adjustment is enabled." newline bitfld.byte 0x0 3. "RTCOE,RTCOUT Output Enable" "0: RTCOUT output disabled.,1: RTCOUT output enabled." bitfld.byte 0x0 2. "ADJ30,30-Second Adjustment" "0: Writing is invalid.(write) / In normal time..,1: 30-second adjustment is executed.(write) /.." newline bitfld.byte 0x0 1. "RESET,RTC Software Reset" "0: Writing is invalid.(write) / In normal time..,1: The prescaler and the target registers for RTC.." bitfld.byte 0x0 0. "START,Start" "0: Prescaler and time counter are stopped.,1: Prescaler and time counter operate normally." group.byte 0x26++0x0 line.byte 0x0 "RCR3,RTC Control Register 3" group.byte 0x28++0x0 line.byte 0x0 "RCR4,RTC Control Register 4" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "RCKSEL,Count Source Select" "0: Sub-clock oscillator is selected.,1: LOCO clock oscillator is selected." group.word 0x2A++0x3 line.word 0x0 "RFRH,Frequency Register H" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "RFC16,Frequency Comparison Value (b16) To generate the operating clock from the LOCOclock this bit sets the comparison value of the 128-Hz clock cycle." "0,1" line.word 0x2 "RFRL,Frequency Register L" hexmask.word 0x2 0.--15. 1. "RFC,Frequency Comparison Value(b15-b0) To generate the operating clock from the main clock this bit sets the comparison value of the 128-Hz clock cycle." group.byte 0x2E++0x0 line.byte 0x0 "RADJ,Time Error Adjustment Register" bitfld.byte 0x0 6.--7. "PMADJ,Plus-Minus" "0: Adjustment is not performed.,1: Adjustment is performed by the addition to the..,?,?" hexmask.byte 0x0 0.--5. 1. "ADJ,Adjustment Value These bits specify the adjustment value from the prescaler." group.byte 0x32++0x0 line.byte 0x0 "RTEST,RTEST" group.byte 0x38++0x0 line.byte 0x0 "RKEY,RKEY" repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0x40)++0x0 line.byte 0x0 "RTCCR$1,Time Capture Control Register %s" bitfld.byte 0x0 7. "TCEN,Time Capture Event Input Pin Enable" "0: The RTCIC pin is disabled as the time capture..,1: The RTCIC pin is enabled as the time capture.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "TCNF,Time Capture Noise Filter Control" "0: The noise filter is off.,1: Setting prohibited,?,?" bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 2. "TCST,Time Capture Status" "0: No event is detected.,1: An event is detected." bitfld.byte 0x0 0.--1. "TCCT,Time Capture Control" "0: No event is detected.,1: Rising edge is detected.,?,?" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x52)++0x0 line.byte 0x0 "BCNT0CP$1,BCNT0 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT0CP,BCNT0CP is a read-only register that captures the BCNT0 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x52)++0x0 line.byte 0x0 "RSECCP$1,Second Capture Register %s" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 4.--6. "SEC10,10-Second Capture Capture value for the tens place of seconds" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Capture Capture value for the ones place of seconds" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x54)++0x0 line.byte 0x0 "BCNT1CP$1,BCNT1 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT1CP,BCNT1CP is a read-only register that captures the BCNT1 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x54)++0x0 line.byte 0x0 "RMINCP$1,Minute Capture Register %s" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 4.--6. "MIN10,10-Minute Capture Capture value for the tens place of minutes" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Capture Capture value for the ones place of minutes" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x56)++0x0 line.byte 0x0 "BCNT2CP$1,BCNT2 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT2CP,BCNT2CP is a read-only register that captures the BCNT2 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x56)++0x0 line.byte 0x0 "RHRCP$1,Hour Capture Register %s" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "PM,A.m./p.m. select for time counter setting." "0: a.m.,1: p.m." newline bitfld.byte 0x0 4.--5. "HR10,10-Minute Capture Capture value for the tens place of minutes" "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "HR1,1-Minute Capture Capture value for the ones place of minutes" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x5A)++0x0 line.byte 0x0 "BCNT3CP$1,BCNT3 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT3CP,BCNT3CP is a read-only register that captures the BCNT3 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x5A)++0x0 line.byte 0x0 "RDAYCP$1,Date Capture Register %s" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "DATE10,10-Day Capture Capture value for the tens place of minutes" "0,1,2,3" newline hexmask.byte 0x0 0.--3. 1. "DATE1,1-Day Capture Capture value for the ones place of minutes" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x5C)++0x0 line.byte 0x0 "RMONCP$1,Month Capture Register %s" bitfld.byte 0x0 4. "MON10,10-Month Capture Capture value for the tens place of months" "0,1" hexmask.byte 0x0 0.--3. 1. "MON1,1-Month Capture Capture value for the ones place of months" repeat.end tree.end tree "RTC_NS" base ad:0x50202000 rgroup.byte 0x0++0x0 line.byte 0x0 "R64CNT,64-Hz Counter" bitfld.byte 0x0 6. "F1HZ,1Hz" "0,1" bitfld.byte 0x0 5. "F2HZ,2Hz" "0,1" newline bitfld.byte 0x0 4. "F4HZ,4Hz" "0,1" bitfld.byte 0x0 3. "F8HZ,8Hz" "0,1" newline bitfld.byte 0x0 2. "F16HZ,16Hz" "0,1" bitfld.byte 0x0 1. "F32HZ,32Hz" "0,1" newline bitfld.byte 0x0 0. "F64HZ,64Hz" "0,1" group.byte 0x2++0x0 line.byte 0x0 "BCNT0,Binary Counter 0" hexmask.byte 0x0 0.--7. 1. "BCNT0,The BCNT0 counter is a readable/writable 32-bit binary counter b7 to b0." group.byte 0x2++0x0 line.byte 0x0 "RSECCNT,Second Counter" bitfld.byte 0x0 4.--6. "SEC10,10-Second Count Counts from 0 to 5 for 60-second counting." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Count Counts from 0 to 9 every second. When a carry is generated 1 is added to the tens place." group.byte 0x4++0x0 line.byte 0x0 "BCNT1,Binary Counter 1" hexmask.byte 0x0 0.--7. 1. "BCNT1,The BCNT1 counter is a readable/writable 32-bit binary counter b15 to b8." group.byte 0x4++0x0 line.byte 0x0 "RMINCNT,Minute Counter" bitfld.byte 0x0 4.--6. "MIN10,10-Minute Count Counts from 0 to 5 for 60-minute counting." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Count Counts from 0 to 9 every minute. When a carry is generated 1 is added to the tens place." group.byte 0x6++0x0 line.byte 0x0 "BCNT2,Binary Counter 2" hexmask.byte 0x0 0.--7. 1. "BCNT2,The BCNT2 counter is a readable/writable 32-bit binary counter b23 to b16." group.byte 0x6++0x0 line.byte 0x0 "RHRCNT,Hour Counter" bitfld.byte 0x0 6. "PM,Time Counter Setting for a.m./p.m." "0: a.m.,1: p.m." bitfld.byte 0x0 4.--5. "HR10,10-Hour Count Counts from 0 to 2 once per carry from the ones place." "0,1,2,3" newline hexmask.byte 0x0 0.--3. 1. "HR1,1-Hour Count Counts from 0 to 9 once per hour. When a carry is generated 1 is added to the tens place." group.byte 0x8++0x0 line.byte 0x0 "BCNT3,Binary Counter 3" hexmask.byte 0x0 0.--7. 1. "BCNT3,The BCNT3 counter is a readable/writable 32-bit binary counter b31 to b24." group.byte 0x8++0x0 line.byte 0x0 "RWKCNT,Day-of-Week Counter" bitfld.byte 0x0 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,?,?,?,?,?,?" group.byte 0xA++0x0 line.byte 0x0 "RDAYCNT,Day Counter" bitfld.byte 0x0 4.--5. "DATE10,10-Day Count Counts from 0 to 3 once per carry from the ones place." "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "DATE1,1-Day Count Counts from 0 to 9 once per day. When a carry is generated 1 is added to the tens place." group.byte 0xC++0x0 line.byte 0x0 "RMONCNT,Month Counter" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MON10,10-Month Count Counts from 0 to 1 once per carry from the ones place." "0,1" newline hexmask.byte 0x0 0.--3. 1. "MON1,1-Month Count Counts from 0 to 9 once per month. When a carry is generated 1 is added to the tens place." group.word 0xE++0x1 line.word 0x0 "RYRCNT,Year Counter" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 4.--7. 1. "YR10,10-Year Count Counts from 0 to 9 once per carry from ones place. When a carry is generated in the tens place 1 is added to the hundreds place." newline hexmask.word.byte 0x0 0.--3. 1. "YR1,1-Year Count Counts from 0 to 9 once per year. When a carry is generated 1 is added to the tens place." group.byte 0x10++0x0 line.byte 0x0 "BCNT0AR,Binary Counter 0 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT0AR,he BCNT0AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b7 to b0." group.byte 0x10++0x0 line.byte 0x0 "RSECAR,Second Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RSECCNT.." bitfld.byte 0x0 4.--6. "SEC10,10-Seconds Value for the tens place of seconds" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Value for the ones place of seconds" group.byte 0x12++0x0 line.byte 0x0 "BCNT1AR,Binary Counter 1 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT1AR,he BCNT1AR counter is a readable/writable alarm register corresponding to 32-bit binary counter b15 to b8." group.byte 0x12++0x0 line.byte 0x0 "RMINAR,Minute Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RMINCNT.." bitfld.byte 0x0 4.--6. "MIN10,10-Minute Count Value for the tens place of minutes" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Count Value for the ones place of minutes" group.byte 0x14++0x0 line.byte 0x0 "BCNT2AR,Binary Counter 2 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT2AR,The BCNT2AR counter is a readable/writable 32-bit binary counter b23 to b16." group.byte 0x14++0x0 line.byte 0x0 "RHRAR,Hour Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RHRCNT.." bitfld.byte 0x0 6. "PM,Time Counter Setting for a.m./p.m." "0: a.m.,1: p.m." newline bitfld.byte 0x0 4.--5. "HR10,10-Hour Count Value for the tens place of hours" "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "HR1,1-Hour Count Value for the ones place of hours" group.byte 0x16++0x0 line.byte 0x0 "BCNT3AR,Binary Counter 3 Alarm Register" hexmask.byte 0x0 0.--7. 1. "BCNT3AR,The BCNT3AR counter is a readable/writable 32-bit binary counter b31 to b24." group.byte 0x16++0x0 line.byte 0x0 "RWKAR,Day-of-Week Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RWKCNT.." hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 0.--2. "DAYW,Day-of-Week Counting" "0: Sunday,1: Monday,?,?,?,?,?,?" group.byte 0x18++0x0 line.byte 0x0 "BCNT0AER,Binary Counter 0 Alarm Enable Register" hexmask.byte 0x0 0.--7. 1. "ENB,The BCNT0AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b7 to b0." group.byte 0x18++0x0 line.byte 0x0 "RDAYAR,Date Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RDAYCNT.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "DATE10,10 Days Value for the tens place of days" "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "DATE1,1 Day Value for the ones place of days" group.byte 0x1A++0x0 line.byte 0x0 "BCNT1AER,Binary Counter 1 Alarm Enable Register" hexmask.byte 0x0 0.--7. 1. "ENB,The BCNT1AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b15 to b8." group.byte 0x1A++0x0 line.byte 0x0 "RMONAR,Month Alarm Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RMONCNT.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 4. "MON10,10 Months Value for the tens place of months" "0,1" hexmask.byte 0x0 0.--3. 1. "MON1,1 Month Value for the ones place of months" group.word 0x1C++0x1 line.word 0x0 "BCNT2AER,Binary Counter 2 Alarm Enable Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 0.--7. 1. "ENB,The BCNT2AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b23 to b16." group.word 0x1C++0x1 line.word 0x0 "RYRAR,Year Alarm Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x0 4.--7. 1. "YR10,10 Years Value for the tens place of years" newline hexmask.word.byte 0x0 0.--3. 1. "YR1,1 Year Value for the ones place of years" group.byte 0x1E++0x0 line.byte 0x0 "BCNT3AER,Binary Counter 3 Alarm Enable Register" hexmask.byte 0x0 0.--7. 1. "ENB,The BCNT3AER register is a readable/writable register for setting the alarm enable corresponding to 32-bit binary counter b31 to b24." group.byte 0x1E++0x0 line.byte 0x0 "RYRAREN,Year Alarm Enable Register" bitfld.byte 0x0 7. "ENB,Compare enable" "0: The register value is not compared with the..,1: The register value is compared with the RYRCNT.." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." group.byte 0x20++0x0 line.byte 0x0 "RSR,RTC Start Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "PF,Interrupt period" "0,1" newline bitfld.byte 0x0 1. "CF,Carry flag" "0,1" bitfld.byte 0x0 0. "AF,Alarm flag" "0,1" group.byte 0x22++0x0 line.byte 0x0 "RCR1,RTC Control Register 1" hexmask.byte 0x0 4.--7. 1. "PES,Periodic Interrupt Select" bitfld.byte 0x0 3. "RTCOS,RTCOUT Output Select" "0: RTCOUT outputs 1 Hz.,1: RTCOUT outputs 64 Hz." newline bitfld.byte 0x0 2. "PIE,Periodic Interrupt Enable" "0: A periodic interrupt request is disabled.,1: A periodic interrupt request is enabled." bitfld.byte 0x0 1. "CIE,Carry Interrupt Enable" "0: A carry interrupt request is disabled.,1: A carry interrupt request is enabled." newline bitfld.byte 0x0 0. "AIE,Alarm Interrupt Enable" "0: An alarm interrupt request is disabled.,1: An alarm interrupt request is enabled." group.byte 0x24++0x0 line.byte 0x0 "RCR2,RTC Control Register 2" bitfld.byte 0x0 7. "CNTMD,Count Mode Select" "0: The calendar count mode.,1: The binary count mode." bitfld.byte 0x0 6. "HR24,Hours Mode" "0: The RTC operates in 12-hour mode.,1: The RTC operates in 24-hour mode." newline bitfld.byte 0x0 5. "AADJP,Automatic Adjustment Period Select (When the LOCO clock is selected the setting of this bit is disabled.)" "0: The RADJ.ADJ[5:0] setting value is adjusted from..,1: The RADJ.ADJ[5:0] setting value is adjusted from.." bitfld.byte 0x0 4. "AADJE,Automatic Adjustment Enable (When the LOCO clock is selected the setting of this bit is disabled.)" "0: Automatic adjustment is disabled.,1: Automatic adjustment is enabled." newline bitfld.byte 0x0 3. "RTCOE,RTCOUT Output Enable" "0: RTCOUT output disabled.,1: RTCOUT output enabled." bitfld.byte 0x0 2. "ADJ30,30-Second Adjustment" "0: Writing is invalid.(write) / In normal time..,1: 30-second adjustment is executed.(write) /.." newline bitfld.byte 0x0 1. "RESET,RTC Software Reset" "0: Writing is invalid.(write) / In normal time..,1: The prescaler and the target registers for RTC.." bitfld.byte 0x0 0. "START,Start" "0: Prescaler and time counter are stopped.,1: Prescaler and time counter operate normally." group.byte 0x26++0x0 line.byte 0x0 "RCR3,RTC Control Register 3" group.byte 0x28++0x0 line.byte 0x0 "RCR4,RTC Control Register 4" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "RCKSEL,Count Source Select" "0: Sub-clock oscillator is selected.,1: LOCO clock oscillator is selected." group.word 0x2A++0x3 line.word 0x0 "RFRH,Frequency Register H" hexmask.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.word 0x0 0. "RFC16,Frequency Comparison Value (b16) To generate the operating clock from the LOCOclock this bit sets the comparison value of the 128-Hz clock cycle." "0,1" line.word 0x2 "RFRL,Frequency Register L" hexmask.word 0x2 0.--15. 1. "RFC,Frequency Comparison Value(b15-b0) To generate the operating clock from the main clock this bit sets the comparison value of the 128-Hz clock cycle." group.byte 0x2E++0x0 line.byte 0x0 "RADJ,Time Error Adjustment Register" bitfld.byte 0x0 6.--7. "PMADJ,Plus-Minus" "0: Adjustment is not performed.,1: Adjustment is performed by the addition to the..,?,?" hexmask.byte 0x0 0.--5. 1. "ADJ,Adjustment Value These bits specify the adjustment value from the prescaler." group.byte 0x32++0x0 line.byte 0x0 "RTEST,RTEST" group.byte 0x38++0x0 line.byte 0x0 "RKEY,RKEY" repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0x40)++0x0 line.byte 0x0 "RTCCR$1,Time Capture Control Register %s" bitfld.byte 0x0 7. "TCEN,Time Capture Event Input Pin Enable" "0: The RTCIC pin is disabled as the time capture..,1: The RTCIC pin is enabled as the time capture.." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 4.--5. "TCNF,Time Capture Noise Filter Control" "0: The noise filter is off.,1: Setting prohibited,?,?" bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 2. "TCST,Time Capture Status" "0: No event is detected.,1: An event is detected." bitfld.byte 0x0 0.--1. "TCCT,Time Capture Control" "0: No event is detected.,1: Rising edge is detected.,?,?" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x52)++0x0 line.byte 0x0 "BCNT0CP$1,BCNT0 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT0CP,BCNT0CP is a read-only register that captures the BCNT0 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x52)++0x0 line.byte 0x0 "RSECCP$1,Second Capture Register %s" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 4.--6. "SEC10,10-Second Capture Capture value for the tens place of seconds" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "SEC1,1-Second Capture Capture value for the ones place of seconds" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x54)++0x0 line.byte 0x0 "BCNT1CP$1,BCNT1 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT1CP,BCNT1CP is a read-only register that captures the BCNT1 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x54)++0x0 line.byte 0x0 "RMINCP$1,Minute Capture Register %s" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 4.--6. "MIN10,10-Minute Capture Capture value for the tens place of minutes" "0,1,2,3,4,5,6,7" newline hexmask.byte 0x0 0.--3. 1. "MIN1,1-Minute Capture Capture value for the ones place of minutes" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x56)++0x0 line.byte 0x0 "BCNT2CP$1,BCNT2 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT2CP,BCNT2CP is a read-only register that captures the BCNT2 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x56)++0x0 line.byte 0x0 "RHRCP$1,Hour Capture Register %s" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "PM,A.m./p.m. select for time counter setting." "0: a.m.,1: p.m." newline bitfld.byte 0x0 4.--5. "HR10,10-Minute Capture Capture value for the tens place of minutes" "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "HR1,1-Minute Capture Capture value for the ones place of minutes" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x5A)++0x0 line.byte 0x0 "BCNT3CP$1,BCNT3 Capture Register %s" hexmask.byte 0x0 0.--7. 1. "BCNT3CP,BCNT3CP is a read-only register that captures the BCNT3 value when a time capture event is detected." repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x5A)++0x0 line.byte 0x0 "RDAYCP$1,Date Capture Register %s" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "DATE10,10-Day Capture Capture value for the tens place of minutes" "0,1,2,3" newline hexmask.byte 0x0 0.--3. 1. "DATE1,1-Day Capture Capture value for the ones place of minutes" repeat.end repeat 3. (increment 0x0 0x1)(increment 0x0 0x10) rgroup.byte ($2+0x5C)++0x0 line.byte 0x0 "RMONCP$1,Month Capture Register %s" bitfld.byte 0x0 4. "MON10,10-Month Capture Capture value for the tens place of months" "0,1" hexmask.byte 0x0 0.--3. 1. "MON1,1-Month Capture Capture value for the ones place of months" repeat.end tree.end tree.end tree "SCI (Serial Communication Interface)" base ad:0x0 tree "SCI0" base ad:0x40358000 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI0_NS" base ad:0x50358000 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI1" base ad:0x40358100 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI1_NS" base ad:0x50358100 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI2" base ad:0x40358200 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI2_NS" base ad:0x50358200 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI3" base ad:0x40358300 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI3_NS" base ad:0x50358300 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI4" base ad:0x40358400 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI4_NS" base ad:0x50358400 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI9" base ad:0x40358900 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree "SCI9_NS" base ad:0x50358900 rgroup.long 0x0++0x3 line.long 0x0 "RDR,Received Data Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 25.--26. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 24. "ORER,Overrun error flag" "0: No overrun error occurred,1: An overrun error has occurred" hexmask.long.word 0x0 13.--23. 1. "Reserved,These bits are read as 00000000000." newline bitfld.long 0x0 12. "FFER,Framing error flag" "0: No framing error occurred at the first data of..,1: A framing error has occurred at the first data.." bitfld.long 0x0 11. "FPER,Parity error flag" "0: No parity error occurred at the first data of..,1: A parity error has occurred at the first data of.." newline bitfld.long 0x0 10. "DR,Receive data ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." bitfld.long 0x0 9. "MPB,Multiprocessor bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.long.word 0x0 0.--8. 1. "RDAT,Received data." group.long 0x4++0x3 line.long 0x0 "TDR,Transmission Data Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 1111111111111111. The write value should be 1111111111111111." bitfld.long 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" bitfld.long 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" hexmask.long.word 0x0 0.--8. 1. "TDAT,Transmission data." group.word 0x4++0x1 line.word 0x0 "TDR_HA_L,Transmission Data Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.word 0x0 9. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline hexmask.word 0x0 0.--8. 1. "TDAT,Transmission data." group.byte 0x4++0x1 line.byte 0x0 "TDR_BY_LL,Transmission Data Register" hexmask.byte 0x0 0.--7. 1. "TDAT,Transmission data." line.byte 0x1 "TDR_BY_LH,Transmission Data Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 111. The write value should be 111." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "TSYNC,Transmit sync data bit." "0: Start bit outputs data Sync,1: Start bit outputs command Sync" newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.byte 0x1 1. "MPBT,Multi-processor transfer bit flag" "0: Data transmission cycles,1: ID transmission cycles" newline bitfld.byte 0x1 0. "TDAT,Transmission data." "0,1" group.long 0x8++0x3 line.long 0x0 "CCR0,Common Control Register 0" hexmask.long.byte 0x0 25.--31. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 24. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.long 0x0 20. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." bitfld.long 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" newline bitfld.long 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.word 0x8++0x1 line.word 0x0 "CCR0_HA_L,Common Control Register 0" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.word 0x0 9. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.word 0x0 8. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" group.byte 0x8++0x1 line.byte 0x0 "CCR0_BY_LL,Common Control Register 0" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TE,Transmit Enable" "0: Serial transmission is disabled,1: Serial transmission is enabled" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RE,Receive Enable" "0: Serial reception is disabled,1: Serial reception is enabled" line.byte 0x1 "CCR0_BY_LH,Common Control Register 0" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "IDSEL,ID frame select Bit" "0: It's always compared data in spite of the value..,1: It's compared data when the MPB bit is '1' ( ID.." newline bitfld.byte 0x1 1. "DCME,Data Compare Match Enable" "0: Address match function is disabled.,1: Address match function is enabled" bitfld.byte 0x1 0. "MPIE,Multi-Processor Interrupt Enable" "0: Normal reception,1: When the data with the multi-processor bit set.." group.word 0xA++0x1 line.word 0x0 "CCR0_HA_H,Common Control Register 0" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.word 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" group.byte 0xA++0x1 line.byte 0x0 "CCR0_BY_HL,Common Control Register 0" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "TEIE,Transmit End Interrupt Enable" "0: A TEI interrupt request is disabled,1: A TEI interrupt request is enabled" newline bitfld.byte 0x0 4. "TIE,Transmit Interrupt Enable" "0: A TXI interrupt request is disabled,1: A TXI interrupt request is enabled" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "RIE,Receive Interrupt Enable" "0: RXI and ERI interrupt requests are disabled,1: RXI and ERI interrupt requests are enabled" line.byte 0x1 "CCR0_BY_HH,Common Control Register 0" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SSE,SSn# Pin Function Enable" "0: SSn# pin function is disabled.,1: SSn# pin function is enabled." group.long 0xC++0x3 line.long 0x0 "CCR1,Common Control Register 1" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 28. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24.--26. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 20. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 16. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.long 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.long 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.long 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.long 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.word 0xC++0x1 line.word 0x0 "CCR1_HA_L,Common Control Register 1" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.word 0x0 12. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 9. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.word 0x0 8. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.word 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.word 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." group.byte 0xC++0x1 line.byte 0x0 "CCR1_BY_LL,Common Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "SPB2IO,Serial port break I/O bit" "0: The value of SPB2DT bit isn't output in TxD..,1: The value of SPB2DT bit is output in TxD terminal." newline bitfld.byte 0x0 4. "SPB2DT,Serial port break data select bit" "0: Low level is output in TxD terminal when TINV is..,1: High level is output in TxD terminal when TINV.." bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 1. "CTSPEN,CTS external terminal enable bit." "0: at the same time,1: Dedicated setting to simultaneously use CTS /.." bitfld.byte 0x0 0. "CTSE,CTS Enable" "0: CTS function is disabled (RTS output function is..,1: CTS function is enabled." line.byte 0x1 "CCR1_BY_LH,Common Control Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "RINV,RxD invert bit" "0: Received data from RxD is input directly.,1: Received data from RxD is inverted and input." newline bitfld.byte 0x1 4. "TINV,TxD invert bit" "0: Transmit data is output directly to TxD.,1: Transmit data is inverted and output to TxD." bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 1. "PM,Parity Mode" "0: Selects even parity,1: Selects odd parity" bitfld.byte 0x1 0. "PE,Parity Enable" "0: Parity bit addition or checking is not performed,1: The parity bit is added or checked" group.word 0xE++0x1 line.word 0x0 "CCR1_HA_H,Common Control Register 1" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 12. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8.--10. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" newline bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" group.byte 0xE++0x1 line.byte 0x0 "CCR1_BY_HL,Common Control Register 1" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "SHARPS,TxD/RxD Pin Multiplexing Select" "0: The TxD and RxD pins are independent.,1: The TxD and RxD signals are multiplexed on the.." newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "SPLP,Serial communication Port LoopBack" "0: Normal mode,1: Loopback mode" line.byte 0x1 "CCR1_BY_HH,Common Control Register 1" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 4. "NFEN,Digital Noise Filter Function Enable" "0: Noise cancellation function for the RXDn/TXDn..,1: Noise cancellation function for the RXDn/TXDn.." newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0.--2. "NFCS,Noise Filter Clock Select" "0: Settings other than above are prohibited.,1: The on-chip baud rate generator clock divided by..,?,?,?,?,?,?" group.long 0x10++0x3 line.long 0x0 "CCR2,Common Control Register 2" hexmask.long.byte 0x0 24.--31. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 20.--21. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.long 0x0 17.--19. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 16. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." hexmask.long.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.long 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.long 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.word 0x10++0x1 line.word 0x0 "CCR2_HA_L,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" bitfld.word 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." newline bitfld.word 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" group.byte 0x10++0x1 line.byte 0x0 "CCR2_BY_LL,Common Control Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "ABCSE,Asynchronous Mode Base Clock Select1" "0: frequency is output from the baud rate generator.,?" newline bitfld.byte 0x0 5. "ABCS,Asynchronous Mode Base Clock Select" "0: Selects 16 base clock cycles for 1-bit period.,1: Selects 8 base clock cycles for 1-bit period." bitfld.byte 0x0 4. "BGDM,Baud Rate Generator Double-Speed Mode Select" "0: Baud rate generator outputs the clock with..,1: Baud rate generator outputs the clock with.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "BCP,Basic clock pulse" "0,1,2,3,4,5,6,7" line.byte 0x1 "CCR2_BY_LH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "BRR,BRR is an 8-bit register that adjusts the bit rate." group.word 0x12++0x1 line.word 0x0 "CCR2_HA_H,Common Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." group.byte 0x12++0x1 line.byte 0x0 "CCR2_BY_HL,Common Control Register 2" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "CKS,Clock Select" "0: TCLK clock,1: TCLK/4 clock,?,?" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "BRME,Bit Modulation Enable" "0: Bit rate modulation function is disabled.,1: Bit rate modulation function is enabled." line.byte 0x1 "CCR2_BY_HH,Common Control Register 2" hexmask.byte 0x1 0.--7. 1. "MDDR,MDDR corrects the bit rate adjusted by the BRR setting" group.long 0x14++0x3 line.long 0x0 "CCR3,Common Control Register 3" bitfld.long 0x0 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 29. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.long 0x0 28. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.long 0x0 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 26. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.long 0x0 24.--25. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 21. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.long 0x0 20. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.long 0x0 19. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.long 0x0 16.--18. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" bitfld.long 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." newline bitfld.long 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" bitfld.long 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." newline bitfld.long 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" bitfld.long 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" newline hexmask.long.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." newline bitfld.long 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.word 0x14++0x1 line.word 0x0 "CCR3_HA_L,Common Control Register 3" bitfld.word 0x0 15. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 14. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.word 0x0 13. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.word 0x0 12. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 8.--9. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" newline bitfld.word 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.word.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.word 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.byte 0x14++0x1 line.byte 0x0 "CCR3_BY_LL,Common Control Register 3" bitfld.byte 0x0 7. "BPEN,Synchronizer ByPass Enable" "0: Synchronizer-bypass desable,1: Synchronizer-bypass enable" hexmask.byte 0x0 2.--6. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.byte 0x0 1. "CPOL,Clock Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.byte 0x0 0. "CPHA,Clock Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.byte 0x1 "CCR3_BY_LH,Common Control Register 3" bitfld.byte 0x1 7. "RXDESEL,Asynchronous Start Bit Edge Detection Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 6. "STP,Stop Bit Length" "0: 1 stop bit,1: 2 stop bits" newline bitfld.byte 0x1 5. "SINV,Transmitted/Received Data Invert" "0: RSR contents are inverted and stored to RDR.,1: TDR contents are inverted before being.." bitfld.byte 0x1 4. "LSBF,LSB first select bit" "0: MSB first,1: LSB first." newline bitfld.byte 0x1 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 0.--1. "CHR,CHaRacter length select" "0: Transmit/receive in 9-bit length,1: Transmit/receive in 9-bit length,?,?" group.word 0x16++0x1 line.word 0x0 "CCR3_HA_H,Common Control Register 3" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.word 0x0 12. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 10. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.word 0x0 8.--9. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.word 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.word 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.word 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" group.byte 0x16++0x1 line.byte 0x0 "CCR3_BY_HL,Common Control Register 3" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "DEN,Driver control Enable" "0: RS-485 driver control function is disable,?" newline bitfld.byte 0x0 4. "FM,FIFO Mode Select" "0: Non-FIFO mode,1: FIFO mode" bitfld.byte 0x0 3. "MP,Multi-Processor mode" "0: Multi-processor communications function is..,1: Multi-processor communications function is enabled" newline bitfld.byte 0x0 0.--2. "MOD,communication MODe select bit" "0: Asynchronous,1: Smart card interface,?,?,?,?,?,?" line.byte 0x1 "CCR3_BY_HH,Common Control Register 3" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BLK,Block transfer mode" "0: Operates in non-block transfer mode.,1: Operates in block transfer mode." newline bitfld.byte 0x1 4. "GM,GSM Mode" "0: Operates in non-GSM mode,1: It operates in GSM mode" bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 2. "ACS0,Asynchronous Mode Clock Source Select" "0: External clock input,1: Logical AND of two clock cycles output from the.." bitfld.byte 0x1 0.--1. "CKE,Clock Enable" "0: Output fixed low,1: Clock output,?,?" group.long 0x18++0x3 line.long 0x0 "CCR4,Common Control Register 4" bitfld.long 0x0 31. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.long 0x0 28.--30. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.long 0x0 27. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.long 0x0 24.--26. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 18.--23. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 17. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.long 0x0 16. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.word 0x18++0x1 line.word 0x0 "CCR4_HA_L,Common Control Register 4" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.word 0x0 0.--8. 1. "CMPD,Compare Match Data" group.byte 0x18++0x1 line.byte 0x0 "CCR4_BY_LL,Common Control Register 4" hexmask.byte 0x0 0.--7. 1. "CMPD,Compare Match Data" line.byte 0x1 "CCR4_BY_LH,Common Control Register 4" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x1 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 0. "CMPD,Compare Match Data" "0,1" group.word 0x1A++0x1 line.word 0x0 "CCR4_HA_H,Common Control Register 4" bitfld.word 0x0 15. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.word 0x0 12.--14. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.word 0x0 11. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.word 0x0 8.--10. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" newline hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.word 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" group.byte 0x1A++0x1 line.byte 0x0 "CCR4_BY_HL,Common Control Register 4" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "ATEN,Adjustment enable bit for transmit waveform" "0: Adjustment transmit waveform function is disabled,1: Adjustment transmit waveform function is enabled" newline bitfld.byte 0x0 0. "ASEN,Adjustment enable bit for sampling timing" "0: Adjustment sampling timing function is disabled,1: Adjustment sampling timing function is enabled" line.byte 0x1 "CCR4_BY_HH,Common Control Register 4" bitfld.byte 0x1 7. "AET,Adjustment Duty control level select" "0: waveform(when CCR1.TINV is 0.),1: Expand the high period by adjustment of the.." bitfld.byte 0x1 4.--6. "ATT,Adjustmen Transmission timing value" "0: internal base clock * the value of ATT[2:0],?,?,?,?,?,?,?" newline bitfld.byte 0x1 3. "AJD,Adjustment Direction for sampling timing" "0: The sampling timing is adjusted after the..,1: The sampling timing is adjusted before the.." bitfld.byte 0x1 0.--2. "AST,Adjustment Sampling Timing value" "0: internal base clock * the setting value of..,?,?,?,?,?,?,?" rgroup.byte 0x1C++0x0 line.byte 0x0 "CESR,Communication Enable Status Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "TIST,Internal status of TE signal" "0: Internal status of TE is '0',1: Internal status of TE is '1'" newline bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 0. "RIST,Internal status of RE signal" "0: Internal status of RE is '0',1: Internal status of RE is '1'" group.byte 0x1E++0x0 line.byte 0x0 "HCR,HBS valid mode Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "HDIC,HDC valid mode start bit Initialize Control" "0: Output terminal is initialized for each start bit.,1: Output terminal is not initialized for each.." newline bitfld.byte 0x0 3. "HDST,HDC valid mode STart bit" "0: Start bit is started from TXD terminal.,1: Start bit is started from TXDB terminal." bitfld.byte 0x0 2. "HDOC,HDC valid mode Output Control" "0: Select 1 terminal output mode,1: Select 2 terminal output mode" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "HDEN,HDC valid mode Enable" "0: Disabled Half Data valid mode,1: Enabled Half Data valid mode" group.long 0x20++0x3 line.long 0x0 "ICR,Simple-I2C Control Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 22.--23. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.long 0x0 20.--21. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.long 0x0 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 18. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.long 0x0 17. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.long 0x0 16. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" bitfld.long 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" bitfld.long 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.word 0x20++0x1 line.word 0x0 "ICR_HA_L,Simple-I2C Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 13. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.word 0x0 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 9. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.word 0x0 8. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" bitfld.word 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" group.byte 0x20++0x1 line.byte 0x0 "ICR_BY_LL,Simple-I2C Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "IICDL,SSDA Delay Output Select" line.byte 0x1 "ICR_BY_LH,Simple-I2C Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "IICACKT,ACK Transmission Data" "0: ACK transmission,1: NACK transmission and reception of ACK/NACK" newline bitfld.byte 0x1 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x1 1. "IICCSC,Clock Synchronization" "0: No synchronization with the clock signal,1: Synchronization with the clock signal" newline bitfld.byte 0x1 0. "IICINTM,I2C Interrupt Mode Select" "0: Use ACK/NACK interrupts.,1: Use reception and transmission interrupts" group.word 0x22++0x1 line.word 0x0 "ICR_HA_H,Simple-I2C Control Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" newline bitfld.word 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." bitfld.word 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." newline bitfld.word 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.byte 0x22++0x0 line.byte 0x0 "ICR_BY_HL,Simple-I2C Control Register" bitfld.byte 0x0 6.--7. "IICSCLS,SCL Output Select" "0: Serial clock output,1: Generate a start restart or stop condition.,?,?" bitfld.byte 0x0 4.--5. "IICSDAS,SDA Output Select" "0: Serial data output,1: Generate a start restart or stop condition.,?,?" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "IICSTPREQ,Stop Condition Generation" "0: A stop condition is not generated.,1: A stop condition is generated." newline bitfld.byte 0x0 1. "IICRSTAREQ,Restart Condition Generation" "0: A restart condition is not generated.,1: A restart condition is generated." bitfld.byte 0x0 0. "IICSTAREQ,Start Condition Generation" "0: A start condition is not generated.,1: A start condition is generated." group.long 0x24++0x3 line.long 0x0 "FCR,FIFO Control Register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.long 0x0 23. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 16.--20. 1. "RTRG,Receive FIFO data trigger number" bitfld.long 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." newline bitfld.long 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.word 0x24++0x1 line.word 0x0 "FCR_HA_L,FIFO Control Register" bitfld.word 0x0 15. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.word 0x0 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 8.--12. 1. "TTRG,Transmit FIFO data trigger number" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" group.byte 0x24++0x1 line.byte 0x0 "FCR_BY_LL,FIFO Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DRES,Receive data ready error select bit" "0: reception data full interrupt (RXI),1: receive error interrupt (ERI)" line.byte 0x1 "FCR_BY_LH,FIFO Control Register" bitfld.byte 0x1 7. "TFRST,Transmit FIFO Data Register Reset" "0: The number of data stored in TDR register are..,1: The number of data stored in TDR register are.." bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x1 0.--4. 1. "TTRG,Transmit FIFO data trigger number" group.word 0x26++0x1 line.word 0x0 "FCR_HA_H,FIFO Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" newline bitfld.word 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.word.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" group.byte 0x26++0x1 line.byte 0x0 "FCR_BY_HL,FIFO Control Register" bitfld.byte 0x0 7. "RFRST,Receive FIFO Data Register Reset" "0: The number of data stored in RDR register are..,1: The number of data stored in RDR register are.." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "RTRG,Receive FIFO data trigger number" line.byte 0x1 "FCR_BY_HH,FIFO Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "RSTRG,RTS# Output ActiveTrigger Number Select" group.long 0x2C++0x3 line.long 0x0 "MCR,Manchester Control Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.long 0x0 25. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.long 0x0 24. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.long 0x0 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 20.--21. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.long.byte 0x0 16.--19. 1. "RPLEN,Receive preface length" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" hexmask.long.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." newline bitfld.long 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.long 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.long 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.long 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.long 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.word 0x2C++0x1 line.word 0x0 "MCR_HA_L,Manchester Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 8.--11. 1. "TPLEN,Transmit preface length." bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." bitfld.word 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." newline bitfld.word 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." bitfld.word 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." newline bitfld.word 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." group.byte 0x2C++0x1 line.byte 0x0 "MCR_BY_LL,Manchester Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "SBSEL,Start bit select" "0: Start bit is 1 bit.,1: Start bit is Command Sync / Data Sync (3 bits)." newline bitfld.byte 0x0 5. "SYNSEL,Sync select" "0: Sync type is set with the SYNVAL bit.,1: Sync type is set by TSYNC bit." bitfld.byte 0x0 4. "SYNVAL,Sync type of Manchester code start bit is set." "0: Start bit is added as <0 -> 1 transition> with 1..,1: Start bit is added as <1 -> 0 transition> with 1.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "ERTEN,Manchester edge retiming enable" "0: Disables the receive retiming function,1: Enable the receive retiming function." newline bitfld.byte 0x0 1. "TMPOL,Transmission Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." bitfld.byte 0x0 0. "RMPOL,Receive Manchester polarity" "0: Logic code 0 is changed from 0 to 1 of..,1: Logic code 0 is changed from 1 to 0 of.." line.byte 0x1 "MCR_BY_LH,Manchester Control Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 4.--5. "TPPAT,Transmit preface pattern." "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x1 0.--3. 1. "TPLEN,Transmit preface length." group.word 0x2E++0x1 line.word 0x0 "MCR_HA_H,Manchester Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.word 0x0 9. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.word 0x0 8. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.word.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" group.byte 0x2E++0x1 line.byte 0x0 "MCR_BY_HL,Manchester Control Register" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4.--5. "RPPAT,Receive preface pattern" "0: ALL ZERO,1: ZERO ONE,?,?" newline hexmask.byte 0x0 0.--3. 1. "RPLEN,Receive preface length" line.byte 0x1 "MCR_BY_HH,Manchester Control Register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 2. "SBEREN,Start bit error enable" "0: Not handle start bit error as interrupt.,1: Handle start bit error as interrupt." newline bitfld.byte 0x1 1. "SYEREN,Sync Error enable" "0: Not handle recive sync error as interrupt.,1: Handle receive sync error as interrupt." bitfld.byte 0x1 0. "PFEREN,Preface Error enable" "0: Not handle preface error as interrupt.,1: Handle preface error as interrupt." group.long 0x30++0x3 line.long 0x0 "DCR,Driver Control Register" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "DENGT,Deriver Enable NeGate Time" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.word 0x30++0x1 line.word 0x0 "DCR_HA_L,Driver Control Register" bitfld.word 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word.byte 0x0 8.--12. 1. "DEAST,Driver Enable Assertion Time" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." group.byte 0x30++0x1 line.byte 0x0 "DCR_BY_LL,Driver Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "DEPOL,Driver Enable POLarity select" "0: Driver enable signal is active high.,1: Driver enable signal is active low." line.byte 0x1 "DCR_BY_LH,Driver Control Register" bitfld.byte 0x1 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x1 0.--4. 1. "DEAST,Driver Enable Assertion Time" group.word 0x32++0x1 line.word 0x0 "DCR_HA_H,Driver Control Register" hexmask.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.word.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.byte 0x32++0x0 line.byte 0x0 "DCR_BY_HL,Driver Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.byte 0x0 0.--4. 1. "DENGT,Deriver Enable NeGate Time" group.long 0x34++0x3 line.long 0x0 "XCR0,Simple-LIN(SCIX) Control Register 0" hexmask.long.byte 0x0 26.--31. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 24.--25. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.long 0x0 21. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.long 0x0 20. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.long 0x0 16. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." bitfld.long 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" newline bitfld.long 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" bitfld.long 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" newline bitfld.long 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" bitfld.long 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.word 0x34++0x1 line.word 0x0 "XCR0_HA_L,Simple-LIN(SCIX) Control Register 0" bitfld.word 0x0 13.--15. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.word 0x0 12. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.word 0x0 10.--11. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.word 0x0 9. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.word 0x0 8. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" hexmask.word.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" group.byte 0x34++0x1 line.byte 0x0 "XCR0_BY_LL,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "TCSS,Timer count clock source select" "0: TCLK,1: TCLK/4,?,?" line.byte 0x1 "XCR0_BY_LH,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x1 5.--7. "PIBS,Priority Interrupt Bit select" "0: Control Field 1 bit 0.,1: Control Field 1 bit 1.,?,?,?,?,?,?" bitfld.byte 0x1 4. "PIBE,Priority Interrupt Bit Enable" "0: Priority interrupt bit is disable,1: Priority interrupt bit is enable" newline bitfld.byte 0x1 2.--3. "CF1DS,Control field 1 compare data select" "0: XCR1.PCF1D[7:0] is compare data,1: XCR1.SCF1D[7:0] is compare data,?,?" bitfld.byte 0x1 1. "CF0RE,Control field 0 presence/absence select" "0: Control field 0 exists in Start frame,1: No Control field 0 in Start frame" newline bitfld.byte 0x1 0. "BFE,Break field presence/absence select" "0: Break field exists in Start frame,1: No break field in Start frame" group.word 0x36++0x1 line.word 0x0 "XCR0_HA_H,Simple-LIN(SCIX) Control Register 0" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 8.--9. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" newline bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.word 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.word 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.word 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." group.byte 0x36++0x1 line.byte 0x0 "XCR0_BY_HL,Simple-LIN(SCIX) Control Register 0" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "AEDIE,Active Edge Detection Interrupt Enable" "0: Active edge detection interrupt is disable.,1: Active edge detection interrupt is enable." newline bitfld.byte 0x0 5. "COFIE,Counter Over Flow Interrupt Enable" "0: Counter over flow is not a factor of ERI.,1: Counter over flow is a factor of ERI." bitfld.byte 0x0 4. "BFDIE,Break Filed Detection Interrupt Enable" "0: Break field detection interrupt is disable.,1: Break field detection interrupt is enable." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "BCDIE,Bus Collision Detect Interrupt Enable" "0: Bus collision detection is not a factor of ERI.,1: Bus collision detection is a factor of ERI." newline bitfld.byte 0x0 0. "BFOIE,Break Filed Output end Interrupt Enable" "0: Break field output end is not a factor of TXI.,1: Break field output end is a factor of TXI." line.byte 0x1 "XCR0_BY_HH,Simple-LIN(SCIX) Control Register 0" hexmask.byte 0x1 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x1 0.--1. "BCCS,Bus Collision detection Clock Select" "0: RSCI base clock,1: RSCI base clock/2,?,?" group.long 0x38++0x3 line.long 0x0 "XCR1,Simple-LIN(SCIX) Control Register 1" hexmask.long.byte 0x0 24.--31. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.long.byte 0x0 16.--23. 1. "SCF1D,Secondary compare Data for Control Field 1" newline hexmask.long.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.long 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.long 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.word 0x38++0x1 line.word 0x0 "XCR1_HA_L,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "PCF1D,Priority compare Data for Control Field 1" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" bitfld.word 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" group.byte 0x38++0x1 line.byte 0x0 "XCR1_BY_LL,Simple-LIN(SCIX) Control Register 1" bitfld.byte 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 5. "BMEN,Bit rate Measurement function Enable" "0: Bit rate Measurement function disable,1: Bit rate Measurement function enable" newline bitfld.byte 0x0 4. "SDST,Start frame Detection Start trigger" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" bitfld.byte 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x0 0. "TCST,break field Timer Count Start trigger" "0: Timer count abort for break field output,1: Timer count start for break field output" line.byte 0x1 "XCR1_BY_LH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "PCF1D,Priority compare Data for Control Field 1" group.word 0x3A++0x1 line.word 0x0 "XCR1_HA_H,Simple-LIN(SCIX) Control Register 1" hexmask.word.byte 0x0 8.--15. 1. "CF1CE,Control Field 1 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" group.byte 0x3A++0x1 line.byte 0x0 "XCR1_BY_HL,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x0 0.--7. 1. "SCF1D,Secondary compare Data for Control Field 1" line.byte 0x1 "XCR1_BY_HH,Simple-LIN(SCIX) Control Register 1" hexmask.byte 0x1 0.--7. 1. "CF1CE,Control Field 1 Compare bit Enable" group.long 0x3C++0x3 line.long 0x0 "XCR2,Simple-LIN(SCIX) Control Register 2" hexmask.long.word 0x0 16.--31. 1. "BFLW,Break Field Low Width" hexmask.long.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" newline hexmask.long.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.word 0x3C++0x1 line.word 0x0 "XCR2_HA_L,Simple-LIN(SCIX) Control Register 2" hexmask.word.byte 0x0 8.--15. 1. "CF0CE,Control Field 0 Compare bit Enable" hexmask.word.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" group.byte 0x3C++0x1 line.byte 0x0 "XCR2_BY_LL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "CF0D,Compare Data for Control Field 0" line.byte 0x1 "XCR2_BY_LH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "CF0CE,Control Field 0 Compare bit Enable" group.word 0x3E++0x1 line.word 0x0 "XCR2_HA_H,Simple-LIN(SCIX) Control Register 2" hexmask.word 0x0 0.--15. 1. "BFLW,Break Field Low Width" group.byte 0x3E++0x1 line.byte 0x0 "XCR2_BY_HL,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x0 0.--7. 1. "BFLW,Break Field Low Width" line.byte 0x1 "XCR2_BY_HH,Simple-LIN(SCIX) Control Register 2" hexmask.byte 0x1 0.--7. 1. "BFLW,Break Field Low Width" rgroup.long 0x48++0x1B line.long 0x0 "CSR,Common Status Register" bitfld.long 0x0 31. "RDRF,Receive Data Full Flag" "0: No received data is in RDR register,1: Received data is in RDR register" bitfld.long 0x0 30. "TEND,Transmit End Flag" "0: A character is being transmitted.,1: Character transfer has been completed." newline bitfld.long 0x0 29. "TDRE,Transmit Data Empty Flag" "0: Transmit data is in TDR register,1: No transmit data is in TDR register" bitfld.long 0x0 28. "FER,Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 27. "PER,Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 26. "MFF,Mode Fault Flag" "0: No mode fault error,1: Mode fault error" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 24. "ORER,Overrun Error Flag" "0: No overrun error occurred,1: An overrun error has occurred" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 18. "DFER,Data Compare Match Framing Error Flag" "0: No framing error occurred,1: A framing error has occurred" newline bitfld.long 0x0 17. "DPER,Data Compare Match Parity Error Flag" "0: No parity error occurred,1: A parity error has occurred" bitfld.long 0x0 16. "DCMF,Data Compare Match Flag" "0: No matched,1: Matched" newline bitfld.long 0x0 15. "RxDMON,Serial input data monitor bit" "0: RXD terminal is the Low level when RINV is 0.,1: RXD terminal is the High level when RINV is 1." hexmask.long.word 0x0 5.--14. 1. "Reserved,These bits are read as 0000000000." newline bitfld.long 0x0 4. "ERS,Error Signal Status Flag" "0: Low error signal not responded,1: Low error signal responded" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000." line.long 0x4 "ISR,Simple-I2C Status Register" hexmask.long 0x4 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." bitfld.long 0x4 5. "IICSCLI,SCL input monitor bit" "0: SCL pin state is low level,1: SCL pin state is high level" newline bitfld.long 0x4 4. "IICSDAI,SDA input monitor bit." "0: SDA pin state is low level,1: SDA pin state is high level" bitfld.long 0x4 3. "IICSTIF,Issuing of Start Restart or Stop Condition Completed Flag" "0: There are no requests for generating conditions..,1: A start restart or stop condition is completely.." newline bitfld.long 0x4 2. "IICBBS,Bus busy flag." "0: Stop condition detection,1: Start condition detection" bitfld.long 0x4 1. "Reserved,This bit is read as 0." "0,1" newline bitfld.long 0x4 0. "IICACKR,ACK Reception Data Flag" "0: ACK received,1: NACK received" line.long 0x8 "FRSR,FIFO Receive Status Register" bitfld.long 0x8 30.--31. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 24.--29. 1. "FNUM,Framing Error Count" newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 16.--21. 1. "PNUM,Parity Error Count" newline bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" hexmask.long.byte 0x8 8.--13. 1. "R,Receive FIFO Data Count" newline hexmask.long.byte 0x8 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x8 1. "BRK,Break detection signal flag" "0: No break signal is received.,1: A break signal is received" newline bitfld.long 0x8 0. "DR,Receive Data Ready flag" "0: Receiving is in progress or no received data has..,1: Next receive data has not been received for a.." line.long 0xC "FTSR,FIFO Transmit Status Register" hexmask.long 0xC 6.--31. 1. "Reserved,These bits are read as 00000000000000000000000000." hexmask.long.byte 0xC 0.--5. 1. "T,Transmit FIFO Data Count" line.long 0x10 "MSR,Manchester Status Register" hexmask.long 0x10 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x10 6. "RSYNC,Receive sync data bit." "0: Start bit receives data Sync,1: Start bit receives command Sync" newline bitfld.long 0x10 5. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 4. "MER,Manchester error flag" "0: No Manchester error occurred,1: A manchester error has occurred" newline bitfld.long 0x10 3. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x10 2. "SBER,Start bit Error Register" "0: No start bit error detected.,1: Start bit error detected." newline bitfld.long 0x10 1. "SYER,Sync Error Registe" "0: Receive sync error not detected.,1: Receive sync error detected." bitfld.long 0x10 0. "PFER,Preface Error Register" "0: No prefetch error detected.,1: Prefetch error detected." line.long 0x14 "XSR0,Simple-LIN(SCIX) Status Register 0" hexmask.long.byte 0x14 24.--31. 1. "CF1RD,Control Field 1 Read Data" hexmask.long.byte 0x14 16.--23. 1. "CF0RD,Control Field 0 Read Data" newline bitfld.long 0x14 15. "AEDF,Active Edge Detection Flag" "0,1" bitfld.long 0x14 14. "COF,Counter Over flow Flag" "0,1" newline bitfld.long 0x14 13. "PIBDF,Priority Interrupt Bit Detection Flag" "0,1" bitfld.long 0x14 12. "CF1MF,Control Field 1 Match Flag" "0,1" newline bitfld.long 0x14 11. "CF0MF,Control Field 0 Match Flag" "0,1" bitfld.long 0x14 10. "BFDF,Break Field Detection Flag" "0,1" newline bitfld.long 0x14 9. "BCDF,Bus Collision Detection Flag" "0,1" bitfld.long 0x14 8. "BFOF,Break Field Output end Flag" "0,1" newline hexmask.long.byte 0x14 2.--7. 1. "Reserved,These bits are read as 000000." bitfld.long 0x14 1. "RXDSF,RXD input Status Flag" "0: Permit RXD input to core,1: Prohibit RXD input to core" newline bitfld.long 0x14 0. "SFSF,Start Frame Status Flag" "0: Start frame / Break field detetion disable,1: Start frame / Break field detetion enable" line.long 0x18 "XSR1,Simple-LIN(SCIX) Status Register 1" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x18 0.--15. 1. "TCNT,Timer CouNT capture value" wgroup.long 0x68++0x3 line.long 0x0 "CFCLR,Common Flag Clear Register" bitfld.long 0x0 31. "RDRFC,RDRF Clear bit" "0,1" bitfld.long 0x0 30. "Reserved,The write value should be 0." "0,1" newline bitfld.long 0x0 29. "TDREC,TDRE Clear bit" "0,1" bitfld.long 0x0 28. "FERC,FER Clear bit" "0,1" newline bitfld.long 0x0 27. "PERC,PER Clear bit" "0,1" bitfld.long 0x0 26. "MFFC,MFF Clear bit" "0,1" newline bitfld.long 0x0 25. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 24. "ORERC,ORER Clear bit" "0,1" newline hexmask.long.byte 0x0 19.--23. 1. "Reserved,The write value should be 00000." bitfld.long 0x0 18. "DFERC,DFER Clear bit" "0,1" newline bitfld.long 0x0 17. "DPERC,DPER Clear bit" "0,1" bitfld.long 0x0 16. "DCMFC,DCMF Clear bit" "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.long 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x68++0x1 line.word 0x0 "CFCLR_HA_L,Common Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.byte 0x68++0x0 line.byte 0x0 "CFCLR_BY_LL,Common Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "ERSC,ERS Clear bit" "0,1" newline hexmask.byte 0x0 0.--3. 1. "Reserved,The write value should be 0000." wgroup.word 0x6A++0x1 line.word 0x0 "CFCLR_HA_H,Common Flag Clear Register" bitfld.word 0x0 15. "RDRFC,RDRF Clear bit" "0,1" bitfld.word 0x0 14. "Reserved,The write value should be 0." "0,1" newline bitfld.word 0x0 13. "TDREC,TDRE Clear bit" "0,1" bitfld.word 0x0 12. "FERC,FER Clear bit" "0,1" newline bitfld.word 0x0 11. "PERC,PER Clear bit" "0,1" bitfld.word 0x0 10. "MFFC,MFF Clear bit" "0,1" newline bitfld.word 0x0 9. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 8. "ORERC,ORER Clear bit" "0,1" newline hexmask.word.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.word 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.word 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.word 0x0 0. "DCMFC,DCMF Clear bit" "0,1" wgroup.byte 0x6A++0x1 line.byte 0x0 "CFCLR_BY_HL,Common Flag Clear Register" hexmask.byte 0x0 3.--7. 1. "Reserved,The write value should be 00000." bitfld.byte 0x0 2. "DFERC,DFER Clear bit" "0,1" newline bitfld.byte 0x0 1. "DPERC,DPER Clear bit" "0,1" bitfld.byte 0x0 0. "DCMFC,DCMF Clear bit" "0,1" line.byte 0x1 "CFCLR_BY_HH,Common Flag Clear Register" bitfld.byte 0x1 7. "RDRFC,RDRF Clear bit" "0,1" bitfld.byte 0x1 6. "Reserved,The write value should be 0." "0,1" newline bitfld.byte 0x1 5. "TDREC,TDRE Clear bit" "0,1" bitfld.byte 0x1 4. "FERC,FER Clear bit" "0,1" newline bitfld.byte 0x1 3. "PERC,PER Clear bit" "0,1" bitfld.byte 0x1 2. "MFFC,MFF Clear bit" "0,1" newline bitfld.byte 0x1 1. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x1 0. "ORERC,ORER Clear bit" "0,1" wgroup.long 0x6C++0x3 line.long 0x0 "ICFCLR,Simple-I2C Flag Clear Register" hexmask.long 0x0 4.--31. 1. "Reserved,The write value should be 0000000000000000000000000000." bitfld.long 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.long 0x0 2. "IICBBSC,IICBBS Clear bit" "0,1" bitfld.long 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.word 0x6C++0x1 line.word 0x0 "ICFCLR_HA_L,Simple-I2C Flag Clear Register" hexmask.word 0x0 4.--15. 1. "Reserved,The write value should be 000000000000." bitfld.word 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.word 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.word 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.byte 0x6C++0x0 line.byte 0x0 "ICFCLR_BY_LL,Simple-I2C Flag Clear Register" hexmask.byte 0x0 4.--7. 1. "Reserved,The write value should be 0000." bitfld.byte 0x0 3. "IICSTIFC,IICSTIF Clear bit" "0,1" newline bitfld.byte 0x0 2. "IICBBSC,IICBBSC Clear bit" "0,1" bitfld.byte 0x0 0.--1. "Reserved,The write value should be 00." "0,1,2,3" wgroup.long 0x70++0x3 line.long 0x0 "FFCLR,FIFO Flag Clear Register" hexmask.long 0x0 2.--31. 1. "Reserved,The write value should be 000000000000000000000000000000." bitfld.long 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.long 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.word 0x70++0x1 line.word 0x0 "FFCLR_HA_L,FIFO Flag Clear Register" hexmask.word 0x0 2.--15. 1. "Reserved,The write value should be 00000000000000." bitfld.word 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.word 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.byte 0x70++0x0 line.byte 0x0 "FFCLR_BY_LL,FIFO Flag Clear Register" hexmask.byte 0x0 2.--7. 1. "Reserved,The write value should be 000000." bitfld.byte 0x0 1. "BRKC,BRK Clear bit" "0,1" newline bitfld.byte 0x0 0. "DRC,DR Clear bit" "0,1" wgroup.long 0x74++0x3 line.long 0x0 "MFCLR,Manchester Flag Clear Register" hexmask.long 0x0 5.--31. 1. "Reserved,The write value should be 000000000000000000000000000." bitfld.long 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.long 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.long 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.long 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.long 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.word 0x74++0x1 line.word 0x0 "MFCLR_HA_L,Manchester Flag Clear Register" hexmask.word 0x0 5.--15. 1. "Reserved,The write value should be 00000000000." bitfld.word 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.word 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.word 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.word 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.word 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.byte 0x74++0x0 line.byte 0x0 "MFCLR_BY_LL,Manchester Flag Clear Register" bitfld.byte 0x0 5.--7. "Reserved,The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "MERC,MER Clear bit" "0,1" newline bitfld.byte 0x0 3. "Reserved,The write value should be 0." "0,1" bitfld.byte 0x0 2. "SBERC,SBER Clear bit" "0,1" newline bitfld.byte 0x0 1. "SYERC,SYER Clear bit" "0,1" bitfld.byte 0x0 0. "PFERC,PFER Clear bit" "0,1" wgroup.long 0x78++0x3 line.long 0x0 "XFCLR,Simpe-LIN(SCIX) Flag Clear Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." bitfld.long 0x0 15. "AEDC,AED Clear bit" "0,1" newline bitfld.long 0x0 14. "COFC,COF Clear bit" "0,1" bitfld.long 0x0 13. "PIBDC,PIBD Clear bit" "0,1" newline bitfld.long 0x0 12. "CF1MC,CF1M Clear bit" "0,1" bitfld.long 0x0 11. "CF0MC,CF0M Clear bit" "0,1" newline bitfld.long 0x0 10. "BFDC,BFD Clear bit" "0,1" bitfld.long 0x0 9. "BCDC,BCD Clear bit" "0,1" newline bitfld.long 0x0 8. "BFOC,BFO Clear bit" "0,1" hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.word 0x78++0x1 line.word 0x0 "XFCLR_HA_L,Simpe-LIN(SCIX) Flag Clear Register" bitfld.word 0x0 15. "AEDC,AED Clear bit" "0,1" bitfld.word 0x0 14. "COFC,COF Clear bit" "0,1" newline bitfld.word 0x0 13. "PIBDC,PIBD Clear bit" "0,1" bitfld.word 0x0 12. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.word 0x0 11. "CF0MC,CF0M Clear bit" "0,1" bitfld.word 0x0 10. "BFDC,BFD Clear bit" "0,1" newline bitfld.word 0x0 9. "BCDC,BCD Clear bit" "0,1" bitfld.word 0x0 8. "BFOC,BFO Clear bit" "0,1" newline hexmask.word.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." wgroup.byte 0x79++0x0 line.byte 0x0 "XFCLR_BY_LH,Simpe-LIN(SCIX) Flag Clear Register" bitfld.byte 0x0 7. "AEDC,AED Clear bit" "0,1" bitfld.byte 0x0 6. "COFC,COF Clear bit" "0,1" newline bitfld.byte 0x0 5. "PIBDC,PIBD Clear bit" "0,1" bitfld.byte 0x0 4. "CF1MC,CF1M Clear bit" "0,1" newline bitfld.byte 0x0 3. "CF0MC,CF0M Clear bit" "0,1" bitfld.byte 0x0 2. "BFDC,BFD Clear bit" "0,1" newline bitfld.byte 0x0 1. "BCDC,BCD Clear bit" "0,1" bitfld.byte 0x0 0. "BFOC,BFO Clear bit" "0,1" tree.end tree.end tree "SDHI (SD Host Interface)" base ad:0x0 tree "SDHI0" base ad:0x40252000 group.long 0x0++0x3 line.long 0x0 "SD_CMD,Command Type Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "CMD12AT,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple block..,1: CMD12 is not automatically issued at multiple..,?,?" newline bitfld.long 0x0 13. "TRSTP,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multiple block transfer" bitfld.long 0x0 12. "CMDRW,Write/Read Mode (enabled when the command with data is handled)" "0: Write (SD/MMC host interface -> SD card/MMC),1: Read (SD/MMC host interface <- SD card/MMC)" newline bitfld.long 0x0 11. "CMDTP,Data Mode (Command Type)" "0: Command does not include data transfer (bc bcr..,1: Command includes data transfer (adtc)" bitfld.long 0x0 8.--10. "RSPTP,Mode/Response TypeNOTE: As some commands cannot be used in normal mode see section 1.4.10 Example of SD_CMD Register Setting to select mode/response type." "0: Settings prohibited.,?,?,?,?,?,?,?" newline bitfld.long 0x0 6.--7. "ACMD,Command Type Select" "0: Setting prohibited,1: ACMD,?,?" hexmask.long.byte 0x0 0.--5. 1. "CMDIDX,Command IndexThese bits specify Command Format[45:40] (command index).[Examples]CMD6: SD_CMD[7:0] = 8'b00_000110CMD18: SD_CMD[7:0] = 8'b00_010010ACMD13: SD_CMD[7:0] = 8'b01_001101" group.long 0x8++0xF line.long 0x0 "SD_ARG,SD Command Argument Register" hexmask.long 0x0 0.--31. 1. "SD_ARG,Argument RegisterSet command format[39:8] (argument)" line.long 0x4 "SD_ARG1,SD Command Argument Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_ARG1,Argument Register 1Set command format[39:24] (argument)" line.long 0x8 "SD_STOP,Data Stop Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x8 8. "SEC,Block Count EnableSet SEC to 1 at multiple block transfer.When SD_CMD is set as follows to start the command sequence while SEC is set to 1 CMD12 is automatically issued to stop multi-block transfer with the number of blocks which is set to.." "0: Disables SD_SECCNT setting value.,1: Enables SD_SECCNT setting value." newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "STP,Stop- When STP is set to 1 during multiple block transfer CMD12 is issued to halt the transfer through the SD host interface.However if a command sequence is halted because of a communications error or timeout CMD12 is not issued. Although.." "0,1" line.long 0xC "SD_SECCNT,Block Count Register" hexmask.long 0xC 0.--31. 1. "SD_SECCNT,Number of Transfer BlocksNOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1." rgroup.long 0x18++0x1F line.long 0x0 "SD_RSP10,SD Card Response Register 10" hexmask.long 0x0 0.--31. 1. "SD_RSP10,Store the response from the SD card/MMC" line.long 0x4 "SD_RSP1,SD Card Response Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_RSP1,Store the response from the SD card/MMC" line.long 0x8 "SD_RSP32,SD Card Response Register 32" hexmask.long 0x8 0.--31. 1. "SD_RSP32,Store the response from the SD card/MMC" line.long 0xC "SD_RSP3,SD Card Response Register 3" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0xC 0.--15. 1. "SD_RSP3,Store the response from the SD card/MMC" line.long 0x10 "SD_RSP54,SD Card Response Register 54" hexmask.long 0x10 0.--31. 1. "SD_RSP54,Store the response from the SD card/MMC" line.long 0x14 "SD_RSP5,SD Card Response Register 5" hexmask.long.word 0x14 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x14 0.--15. 1. "SD_RSP5,Store the response from the SD card/MMC" line.long 0x18 "SD_RSP76,SD Card Response Register 76" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.tbyte 0x18 0.--23. 1. "SD_RSP76,Store the response from the SD card/MMC" line.long 0x1C "SD_RSP7,SD Card Response Register 7" hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x1C 0.--7. 1. "SD_RSP7,Store the response from the SD card/MMC" group.long 0x38++0x1B line.long 0x0 "SD_INFO1,SD Card Interrupt Flag Register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline rbitfld.long 0x0 10. "SDD3MON,Inticates the SDnDAT3 State" "0: SDnDAT3 is set to 0.,1: SDnDAT3 is set to 1." bitfld.long 0x0 9. "SDD3IN,SDnDAT3 Card Insertion" "0: SD card insertion not detected,1: SD card insertion detected" newline bitfld.long 0x0 8. "SDD3RM,SDnDAT3 Card Removal" "0: SD card removal not detected,1: SD card removal detected" rbitfld.long 0x0 7. "SDWPMON,Indicates the SDnWP state" "0: SDnWP is set to 1.,1: SDnWP is set to 0." newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.long 0x0 5. "SDCDMON,Indicates the SDnCD state" "0: Indicates that Mcycle has elapsed with SDnCD..,1: Indicates that Mcycle has elapsed with SDnCD.." newline bitfld.long 0x0 4. "SDCDIN,SDnCD Card Insertion" "0: Card insertion not detected,1: Card insertion detected" bitfld.long 0x0 3. "SDCDRM,SDnCD Card Removal" "0: Card removal not detected,1: Card removal detected" newline bitfld.long 0x0 2. "ACEND,Access End" "0: Access end is not detected,1: Access end is detected" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "RSPEND,Response End Detection" "0: Response end is not detected,1: Response end is detected" line.long 0x4 "SD_INFO2,SD Card Interrupt Flag Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "ILA,Illegal Access Error" "0: Illegal access error not detected,1: Illegal access error detected" newline rbitfld.long 0x4 14. "CBSY,Command Type Register Busy" "0: A command sequence is being executed.,1: A command sequence has been completed." rbitfld.long 0x4 13. "SD_CLK_CTRLEN,When a command sequence is started by writing to SD_CMD the CBSY bit is set to 1 and at the same time the SCLKDIVEN bit is set to 0. The SCLKDIVEN bit is set to 1 after 8 cycles of SDCLK have elapsed after setting of the CBSY bit to 0.." "0: The SD/MMC bus (CMD DAT) is busy. Writing to the..,1: The SD/MMC bus (CMD DAT) is not busy." newline bitfld.long 0x4 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0.,1: Data can be written in SD_BUF0." newline bitfld.long 0x4 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0.,1: Data can be read from SD_BUF0." rbitfld.long 0x4 7. "SDD0MON,SDDAT0Indicates the SDDAT0 state of the port specified by SD_PORTSEL." "0: SDDAT0 is set to 0.,1: SDDAT0 is set to 1." newline bitfld.long 0x4 6. "RSPTO,Response Timeout" "0: Response timeout not detected,1: Response timeout detected" bitfld.long 0x4 5. "ILR,SD_BUF Illegal Read Access" "0: Illegal read access to the SD_BUF register not..,1: Illegal read access to the SD_BUF register.." newline bitfld.long 0x4 4. "ILW,SD_BUF Illegal Write Access" "0: Illegal write access to the SD_BUF register not..,1: Illegal write access to the SD_BUF register.." bitfld.long 0x4 3. "DTO,Data Timeout" "0: Data timeout not detected,1: Data timeout detected" newline bitfld.long 0x4 2. "ENDE,END Error" "0: End bit error not detected,1: End bit error detected" bitfld.long 0x4 1. "CRCE,CRC Error" "0: CRC error not detected,1: CRC error detected" newline bitfld.long 0x4 0. "CMDE,Command Error" "0: Command error not detected,1: Command error detected" line.long 0x8 "SD_INFO1_MASK,SD_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 9. "SDD3INM,SDnDAT3 Card Insertion Interrupt Request Mask" "0: SD card insertion interrupt request by the..,1: SD card insertion interrupt request by the.." bitfld.long 0x8 8. "SDD3RMM,SDnDAT3 Card Removal Interrupt Request Mask" "0: SD card removal interrupt request by the SDnDAT3..,1: SD card removal interrupt request by the SDnDAT3.." newline bitfld.long 0x8 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 4. "SDCDINM,SDnCD card Insertion Interrupt Request Mask" "0: Card insertion interrupt request by the SDnCD is..,1: Card insertion interrupt request by the SDnCD is.." newline bitfld.long 0x8 3. "SDCDRMM,SDnCD card Removal Interrupt Request Mask" "0: Card removal interrupt request by the by the..,1: Card removal interrupt request by the by the.." bitfld.long 0x8 2. "ACENDM,Access End Interrupt Request Mask" "0: Access end interrupt request is not masked,1: Access end interrupt request is masked" newline bitfld.long 0x8 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 0. "RSPENDM,Response End Interrupt Request Mask" "0: Response end interrupt request is not masked,1: Response end interrupt request is masked" line.long 0xC "SD_INFO2_MASK,SD_INFO2 Interrupt Mask Register" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0xC 15. "ILAM,Illegal Access Error Interrupt Request Mask" "0: Illegal access error interrupt request not masked,1: Illegal access error interrupt request masked" newline bitfld.long 0xC 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0xC 11. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 9. "BWEM,BWE Interrupt Request Mask" "0: Write enable interrupt request for the SD_BUF..,1: Write enable interrupt request for the SD_BUF.." newline bitfld.long 0xC 8. "BREM,BRE Interrupt Request Mask" "0: Read enable interrupt request for the SD buffer..,1: Read enable interrupt request for the SD buffer.." bitfld.long 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 6. "RSPTOM,Response Timeout Interrupt Request Mask" "0: Response timeout interrupt request not masked,1: Response timeout interrupt request masked" bitfld.long 0xC 5. "ILRM,SD_BUF Register Illegal Read Interrupt Request Mask" "0: Illegal read detection interrupt request for the..,1: Illegal read detection interrupt request for the.." newline bitfld.long 0xC 4. "ILWM,SD_BUF Register Illegal Write Interrupt Request Mask" "0: Illegal write detection interrupt request for..,1: Illegal write detection interrupt request for.." bitfld.long 0xC 3. "DTOM,Data Timeout Interrupt Request Mask" "0: Data timeout interrupt request not masked,1: Data timeout interrupt request masked" newline bitfld.long 0xC 2. "ENDEM,End Bit Error Interrupt Request Mask" "0: End bit detection error interrupt request not..,1: End bit detection error interrupt request masked" bitfld.long 0xC 1. "CRCEM,CRC Error Interrupt Request Mask" "0: CRC error interrupt request not masked,1: CRC error interrupt request masked" newline bitfld.long 0xC 0. "CMDEM,Command Error Interrupt Request Mask" "0: Command error interrupt request not masked,1: Command error interrupt request masked" line.long 0x10 "SD_CLK_CTRL,SD Clock Control Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x10 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x10 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 9. "CLKCTRLEN,SD/MMC Clock Output Automatic Control Enable" "0: Automatic control for SD/MMC Clock output is..,1: Automatic control for SD/MMC Clock output is.." newline bitfld.long 0x10 8. "CLKEN,SD/MMC Clock Output Control Enable" "0: SD/MMC Clock output is disabled. The SDCLK..,1: SD/MMC Clock output is enabled." hexmask.long.byte 0x10 0.--7. 1. "CLKSEL,SDHI Clock Frequency Select" line.long 0x14 "SD_SIZE,Transfer Data Length Register" hexmask.long.tbyte 0x14 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x14 0.--9. 1. "LEN,Transfer Data SizeThese bits specify a size between 1 and 512 bytes for the transfer of single blocks.In cases of multiple block transfer with automatic issuing of CMD12 (CMD18 and CMD25) the only specifiable transfer data size is 512 bytes." line.long 0x18 "SD_OPTION,SD Card Access Control Option Register" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x18 15. "WIDTH,Bus WidthNOTE: The initial value is applied at a reset and when the SOFT_RST.SDRST flag is 0." "0: 4-bit width (WIDTH8=0) / 8-bit width (WIDTH8=1),1: 1-bit width (WIDTH8=0 or 1 )" newline bitfld.long 0x18 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x18 13. "WIDTH8,Bus Widthsee b15 WIDTH bit" "0,1" newline hexmask.long.byte 0x18 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 8. "TOUTMASK,Timeout MASKWhen timeout occurs in case of inactivating timeout software reset should be executed to terminate command sequence." "0: Activate Timeout,1: Inactivate Timeout(RSPTO bit and DTO bit of.." newline hexmask.long.byte 0x18 4.--7. 1. "TOP,Timeout Counter" hexmask.long.byte 0x18 0.--3. 1. "CTOP,Card Detect Time Counter" rgroup.long 0x58++0x7 line.long 0x0 "SD_ERR_STS1,SD Error Status Register 1" hexmask.long.tbyte 0x0 15.--31. 1. "Reserved,These bits are read as 00000000000000000." bitfld.long 0x0 12.--14. "CRCTK,CRC Status TokenStore the CRC status token value (normal value is 010b)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 11. "CRCTKE,CRC Status Token Error" "0: An error has not occured in the CRC status.,1: An error has occured in the CRC status." bitfld.long 0x0 10. "RDCRCE,Read Data CRC Error" "0: CRC error has detected in read data,1: CRC error has not detected in read data" newline bitfld.long 0x0 9. "RSPCRCE1,Response CRC Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPCRCE0." "0: CRC error has not occured.,1: CRC error has occured in the response to a.." bitfld.long 0x0 8. "RSPCRCE0,Response CRC Error 0NOTE: other than a response to a command issued within a command sequence" "0: A CRC error has not occur in a response,1: A CRC error has occured in a response" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 5. "CRCLENE,CRC Status Token Length Error" "0: An error has not occured in the CRC status length.,1: An error has occured in the CRC status length.." newline bitfld.long 0x0 4. "RDLENE,Read Data Length Error" "0: An error has occurred not in the read data length.,1: An error has occured in the read data length.." bitfld.long 0x0 3. "RSPLENE1,Response Length Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPLENE0." "0: An error has not occurred in the response length..,1: An error has occured in the response length to a.." newline bitfld.long 0x0 2. "RSPLENE0,Response Length Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the response length,1: An error has occured in the response length" bitfld.long 0x0 1. "CMDE1,Command Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is Indicated in CMDE0." "0: An error has not occurs in the command index of..,1: An error has occured in the command index of the.." newline bitfld.long 0x0 0. "CMDE0,Command Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the command index of..,1: An error has occured in the command index of a.." line.long 0x4 "SD_ERR_STS2,SD Error Status Register 2" hexmask.long 0x4 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x4 6. "CRCBSYTO,CRC Status Token Busy Timeout" "0: Not timeout,1: The busy state continues for longer than N-cycle.." newline bitfld.long 0x4 5. "CRCTO,CRC Status Token Timeout" "0: Not timeout,1: The CRC status is not received though a longer.." bitfld.long 0x4 4. "RDTO,Read Data Timeout" "0: Not timeout,1: The read data is not received though a longer.." newline bitfld.long 0x4 3. "BSYTO1,Busy Timeout 1" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." bitfld.long 0x4 2. "BSYTO0,Busy Timeout 0" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." newline bitfld.long 0x4 1. "RSPTO1,Response Timeout 1" "0: Not timeout.,1: The response to a command issued within a.." bitfld.long 0x4 0. "RSPTO0,Response Timeout 0" "0: Not timeout.,1: The response (other than a response to a command.." group.long 0x60++0x3 line.long 0x0 "SD_BUF0,SD Buffer Register" hexmask.long 0x0 0.--31. 1. "SD_BUF,SD Buffer RegisterWhen writing to the SD card the write data is written to this register. When reading from the SD card the read data is read from this register. This register is internally connected to two 512-byte buffers.If both buffers are.." group.long 0x68++0xB line.long 0x0 "SDIO_MODE,SDIO Mode Control Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "C52PUB,SDIO None AbortNOTE: See manual" "0,1" newline bitfld.long 0x0 8. "IOABT,SDIO AbortNOTE: See manual" "0,1" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "RWREQ,Read Wait Request" "0: Allow SD/MMC to exit read wait state,1: Request for SD/MMC to enter read wait state." bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "INTEN,SDIO Mode" "0: Disables the SD host interface to receive SDIO..,1: Enables the SD host interface to receive SDIO.." line.long 0x4 "SDIO_INFO1,SDIO Interrupt Flag Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "EXWT,EXWT Status FlagNOTE: See manual" "0,1" newline bitfld.long 0x4 14. "EXPUB52,EXPUB52 Status FlagNOTE: See manual" "0,1" hexmask.long.word 0x4 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x4 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 0. "IOIRQ,SDIO Interrupt Status" "0: SDIO interrupt not accepted,1: SDIO interrupt accepted" line.long 0x8 "SDIO_INFO1_MASK,SDIO_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x8 15. "EXWTM,EXWT Interrupt Request Mask Control" "0: EXWT interrupt request not masked,1: EXWT interrupt request masked" newline bitfld.long 0x8 14. "EXPUB52M,EXPUB52 Interrupt Request Mask Control" "0: EXPUB52 interrupt request not masked,1: EXPUB52 interrupt request masked" hexmask.long.word 0x8 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x8 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x8 0. "IOIRQM,IOIRQ Interrupt Mask Control" "0: IOIRQ interrupt not masked,1: IOIRQ interrupt masked" group.long 0x1B0++0x3 line.long 0x0 "SD_DMAEN,DMA Mode Enable Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." bitfld.long 0x0 12. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.long.byte 0x0 5.--11. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "DMAEN,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled.,1: The SD_BUF read/write DMA transfer is enabled." newline bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1C0++0x3 line.long 0x0 "SOFT_RST,Software Reset Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 0. "SDRST,Software Reset of SD I/F Unit" "0: Reset,1: Reset released" group.long 0x1CC++0x3 line.long 0x0 "SDIF_MODE,SD Interface Mode Setting Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "NOCHKCR,CRC Check Mask (for MMC test commands)" "0: CRC check is valid,1: CRC check is invalid(CRC16 value is ignored when.." newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1E0++0x3 line.long 0x0 "EXT_SWAP,Swap Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "BRSWP,SD_BUF0 Swap Read" "0: The current data are read without swapping.,1: Swapping of the positions of the higher- and.." newline bitfld.long 0x0 6. "BWSWP,SD_BUF0 Swap Write" "0: The current data are written without swapping.,1: Swapping of the positions of the higher- and.." hexmask.long.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." tree.end tree "SDHI0_NS" base ad:0x50252000 group.long 0x0++0x3 line.long 0x0 "SD_CMD,Command Type Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "CMD12AT,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple block..,1: CMD12 is not automatically issued at multiple..,?,?" newline bitfld.long 0x0 13. "TRSTP,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multiple block transfer" bitfld.long 0x0 12. "CMDRW,Write/Read Mode (enabled when the command with data is handled)" "0: Write (SD/MMC host interface -> SD card/MMC),1: Read (SD/MMC host interface <- SD card/MMC)" newline bitfld.long 0x0 11. "CMDTP,Data Mode (Command Type)" "0: Command does not include data transfer (bc bcr..,1: Command includes data transfer (adtc)" bitfld.long 0x0 8.--10. "RSPTP,Mode/Response TypeNOTE: As some commands cannot be used in normal mode see section 1.4.10 Example of SD_CMD Register Setting to select mode/response type." "0: Settings prohibited.,?,?,?,?,?,?,?" newline bitfld.long 0x0 6.--7. "ACMD,Command Type Select" "0: Setting prohibited,1: ACMD,?,?" hexmask.long.byte 0x0 0.--5. 1. "CMDIDX,Command IndexThese bits specify Command Format[45:40] (command index).[Examples]CMD6: SD_CMD[7:0] = 8'b00_000110CMD18: SD_CMD[7:0] = 8'b00_010010ACMD13: SD_CMD[7:0] = 8'b01_001101" group.long 0x8++0xF line.long 0x0 "SD_ARG,SD Command Argument Register" hexmask.long 0x0 0.--31. 1. "SD_ARG,Argument RegisterSet command format[39:8] (argument)" line.long 0x4 "SD_ARG1,SD Command Argument Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_ARG1,Argument Register 1Set command format[39:24] (argument)" line.long 0x8 "SD_STOP,Data Stop Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x8 8. "SEC,Block Count EnableSet SEC to 1 at multiple block transfer.When SD_CMD is set as follows to start the command sequence while SEC is set to 1 CMD12 is automatically issued to stop multi-block transfer with the number of blocks which is set to.." "0: Disables SD_SECCNT setting value.,1: Enables SD_SECCNT setting value." newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "STP,Stop- When STP is set to 1 during multiple block transfer CMD12 is issued to halt the transfer through the SD host interface.However if a command sequence is halted because of a communications error or timeout CMD12 is not issued. Although.." "0,1" line.long 0xC "SD_SECCNT,Block Count Register" hexmask.long 0xC 0.--31. 1. "SD_SECCNT,Number of Transfer BlocksNOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1." rgroup.long 0x18++0x1F line.long 0x0 "SD_RSP10,SD Card Response Register 10" hexmask.long 0x0 0.--31. 1. "SD_RSP10,Store the response from the SD card/MMC" line.long 0x4 "SD_RSP1,SD Card Response Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_RSP1,Store the response from the SD card/MMC" line.long 0x8 "SD_RSP32,SD Card Response Register 32" hexmask.long 0x8 0.--31. 1. "SD_RSP32,Store the response from the SD card/MMC" line.long 0xC "SD_RSP3,SD Card Response Register 3" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0xC 0.--15. 1. "SD_RSP3,Store the response from the SD card/MMC" line.long 0x10 "SD_RSP54,SD Card Response Register 54" hexmask.long 0x10 0.--31. 1. "SD_RSP54,Store the response from the SD card/MMC" line.long 0x14 "SD_RSP5,SD Card Response Register 5" hexmask.long.word 0x14 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x14 0.--15. 1. "SD_RSP5,Store the response from the SD card/MMC" line.long 0x18 "SD_RSP76,SD Card Response Register 76" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.tbyte 0x18 0.--23. 1. "SD_RSP76,Store the response from the SD card/MMC" line.long 0x1C "SD_RSP7,SD Card Response Register 7" hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x1C 0.--7. 1. "SD_RSP7,Store the response from the SD card/MMC" group.long 0x38++0x1B line.long 0x0 "SD_INFO1,SD Card Interrupt Flag Register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline rbitfld.long 0x0 10. "SDD3MON,Inticates the SDnDAT3 State" "0: SDnDAT3 is set to 0.,1: SDnDAT3 is set to 1." bitfld.long 0x0 9. "SDD3IN,SDnDAT3 Card Insertion" "0: SD card insertion not detected,1: SD card insertion detected" newline bitfld.long 0x0 8. "SDD3RM,SDnDAT3 Card Removal" "0: SD card removal not detected,1: SD card removal detected" rbitfld.long 0x0 7. "SDWPMON,Indicates the SDnWP state" "0: SDnWP is set to 1.,1: SDnWP is set to 0." newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.long 0x0 5. "SDCDMON,Indicates the SDnCD state" "0: Indicates that Mcycle has elapsed with SDnCD..,1: Indicates that Mcycle has elapsed with SDnCD.." newline bitfld.long 0x0 4. "SDCDIN,SDnCD Card Insertion" "0: Card insertion not detected,1: Card insertion detected" bitfld.long 0x0 3. "SDCDRM,SDnCD Card Removal" "0: Card removal not detected,1: Card removal detected" newline bitfld.long 0x0 2. "ACEND,Access End" "0: Access end is not detected,1: Access end is detected" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "RSPEND,Response End Detection" "0: Response end is not detected,1: Response end is detected" line.long 0x4 "SD_INFO2,SD Card Interrupt Flag Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "ILA,Illegal Access Error" "0: Illegal access error not detected,1: Illegal access error detected" newline rbitfld.long 0x4 14. "CBSY,Command Type Register Busy" "0: A command sequence is being executed.,1: A command sequence has been completed." rbitfld.long 0x4 13. "SD_CLK_CTRLEN,When a command sequence is started by writing to SD_CMD the CBSY bit is set to 1 and at the same time the SCLKDIVEN bit is set to 0. The SCLKDIVEN bit is set to 1 after 8 cycles of SDCLK have elapsed after setting of the CBSY bit to 0.." "0: The SD/MMC bus (CMD DAT) is busy. Writing to the..,1: The SD/MMC bus (CMD DAT) is not busy." newline bitfld.long 0x4 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0.,1: Data can be written in SD_BUF0." newline bitfld.long 0x4 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0.,1: Data can be read from SD_BUF0." rbitfld.long 0x4 7. "SDD0MON,SDDAT0Indicates the SDDAT0 state of the port specified by SD_PORTSEL." "0: SDDAT0 is set to 0.,1: SDDAT0 is set to 1." newline bitfld.long 0x4 6. "RSPTO,Response Timeout" "0: Response timeout not detected,1: Response timeout detected" bitfld.long 0x4 5. "ILR,SD_BUF Illegal Read Access" "0: Illegal read access to the SD_BUF register not..,1: Illegal read access to the SD_BUF register.." newline bitfld.long 0x4 4. "ILW,SD_BUF Illegal Write Access" "0: Illegal write access to the SD_BUF register not..,1: Illegal write access to the SD_BUF register.." bitfld.long 0x4 3. "DTO,Data Timeout" "0: Data timeout not detected,1: Data timeout detected" newline bitfld.long 0x4 2. "ENDE,END Error" "0: End bit error not detected,1: End bit error detected" bitfld.long 0x4 1. "CRCE,CRC Error" "0: CRC error not detected,1: CRC error detected" newline bitfld.long 0x4 0. "CMDE,Command Error" "0: Command error not detected,1: Command error detected" line.long 0x8 "SD_INFO1_MASK,SD_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 9. "SDD3INM,SDnDAT3 Card Insertion Interrupt Request Mask" "0: SD card insertion interrupt request by the..,1: SD card insertion interrupt request by the.." bitfld.long 0x8 8. "SDD3RMM,SDnDAT3 Card Removal Interrupt Request Mask" "0: SD card removal interrupt request by the SDnDAT3..,1: SD card removal interrupt request by the SDnDAT3.." newline bitfld.long 0x8 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 4. "SDCDINM,SDnCD card Insertion Interrupt Request Mask" "0: Card insertion interrupt request by the SDnCD is..,1: Card insertion interrupt request by the SDnCD is.." newline bitfld.long 0x8 3. "SDCDRMM,SDnCD card Removal Interrupt Request Mask" "0: Card removal interrupt request by the by the..,1: Card removal interrupt request by the by the.." bitfld.long 0x8 2. "ACENDM,Access End Interrupt Request Mask" "0: Access end interrupt request is not masked,1: Access end interrupt request is masked" newline bitfld.long 0x8 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 0. "RSPENDM,Response End Interrupt Request Mask" "0: Response end interrupt request is not masked,1: Response end interrupt request is masked" line.long 0xC "SD_INFO2_MASK,SD_INFO2 Interrupt Mask Register" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0xC 15. "ILAM,Illegal Access Error Interrupt Request Mask" "0: Illegal access error interrupt request not masked,1: Illegal access error interrupt request masked" newline bitfld.long 0xC 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0xC 11. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 9. "BWEM,BWE Interrupt Request Mask" "0: Write enable interrupt request for the SD_BUF..,1: Write enable interrupt request for the SD_BUF.." newline bitfld.long 0xC 8. "BREM,BRE Interrupt Request Mask" "0: Read enable interrupt request for the SD buffer..,1: Read enable interrupt request for the SD buffer.." bitfld.long 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 6. "RSPTOM,Response Timeout Interrupt Request Mask" "0: Response timeout interrupt request not masked,1: Response timeout interrupt request masked" bitfld.long 0xC 5. "ILRM,SD_BUF Register Illegal Read Interrupt Request Mask" "0: Illegal read detection interrupt request for the..,1: Illegal read detection interrupt request for the.." newline bitfld.long 0xC 4. "ILWM,SD_BUF Register Illegal Write Interrupt Request Mask" "0: Illegal write detection interrupt request for..,1: Illegal write detection interrupt request for.." bitfld.long 0xC 3. "DTOM,Data Timeout Interrupt Request Mask" "0: Data timeout interrupt request not masked,1: Data timeout interrupt request masked" newline bitfld.long 0xC 2. "ENDEM,End Bit Error Interrupt Request Mask" "0: End bit detection error interrupt request not..,1: End bit detection error interrupt request masked" bitfld.long 0xC 1. "CRCEM,CRC Error Interrupt Request Mask" "0: CRC error interrupt request not masked,1: CRC error interrupt request masked" newline bitfld.long 0xC 0. "CMDEM,Command Error Interrupt Request Mask" "0: Command error interrupt request not masked,1: Command error interrupt request masked" line.long 0x10 "SD_CLK_CTRL,SD Clock Control Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x10 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x10 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 9. "CLKCTRLEN,SD/MMC Clock Output Automatic Control Enable" "0: Automatic control for SD/MMC Clock output is..,1: Automatic control for SD/MMC Clock output is.." newline bitfld.long 0x10 8. "CLKEN,SD/MMC Clock Output Control Enable" "0: SD/MMC Clock output is disabled. The SDCLK..,1: SD/MMC Clock output is enabled." hexmask.long.byte 0x10 0.--7. 1. "CLKSEL,SDHI Clock Frequency Select" line.long 0x14 "SD_SIZE,Transfer Data Length Register" hexmask.long.tbyte 0x14 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x14 0.--9. 1. "LEN,Transfer Data SizeThese bits specify a size between 1 and 512 bytes for the transfer of single blocks.In cases of multiple block transfer with automatic issuing of CMD12 (CMD18 and CMD25) the only specifiable transfer data size is 512 bytes." line.long 0x18 "SD_OPTION,SD Card Access Control Option Register" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x18 15. "WIDTH,Bus WidthNOTE: The initial value is applied at a reset and when the SOFT_RST.SDRST flag is 0." "0: 4-bit width (WIDTH8=0) / 8-bit width (WIDTH8=1),1: 1-bit width (WIDTH8=0 or 1 )" newline bitfld.long 0x18 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x18 13. "WIDTH8,Bus Widthsee b15 WIDTH bit" "0,1" newline hexmask.long.byte 0x18 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 8. "TOUTMASK,Timeout MASKWhen timeout occurs in case of inactivating timeout software reset should be executed to terminate command sequence." "0: Activate Timeout,1: Inactivate Timeout(RSPTO bit and DTO bit of.." newline hexmask.long.byte 0x18 4.--7. 1. "TOP,Timeout Counter" hexmask.long.byte 0x18 0.--3. 1. "CTOP,Card Detect Time Counter" rgroup.long 0x58++0x7 line.long 0x0 "SD_ERR_STS1,SD Error Status Register 1" hexmask.long.tbyte 0x0 15.--31. 1. "Reserved,These bits are read as 00000000000000000." bitfld.long 0x0 12.--14. "CRCTK,CRC Status TokenStore the CRC status token value (normal value is 010b)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 11. "CRCTKE,CRC Status Token Error" "0: An error has not occured in the CRC status.,1: An error has occured in the CRC status." bitfld.long 0x0 10. "RDCRCE,Read Data CRC Error" "0: CRC error has detected in read data,1: CRC error has not detected in read data" newline bitfld.long 0x0 9. "RSPCRCE1,Response CRC Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPCRCE0." "0: CRC error has not occured.,1: CRC error has occured in the response to a.." bitfld.long 0x0 8. "RSPCRCE0,Response CRC Error 0NOTE: other than a response to a command issued within a command sequence" "0: A CRC error has not occur in a response,1: A CRC error has occured in a response" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 5. "CRCLENE,CRC Status Token Length Error" "0: An error has not occured in the CRC status length.,1: An error has occured in the CRC status length.." newline bitfld.long 0x0 4. "RDLENE,Read Data Length Error" "0: An error has occurred not in the read data length.,1: An error has occured in the read data length.." bitfld.long 0x0 3. "RSPLENE1,Response Length Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPLENE0." "0: An error has not occurred in the response length..,1: An error has occured in the response length to a.." newline bitfld.long 0x0 2. "RSPLENE0,Response Length Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the response length,1: An error has occured in the response length" bitfld.long 0x0 1. "CMDE1,Command Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is Indicated in CMDE0." "0: An error has not occurs in the command index of..,1: An error has occured in the command index of the.." newline bitfld.long 0x0 0. "CMDE0,Command Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the command index of..,1: An error has occured in the command index of a.." line.long 0x4 "SD_ERR_STS2,SD Error Status Register 2" hexmask.long 0x4 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x4 6. "CRCBSYTO,CRC Status Token Busy Timeout" "0: Not timeout,1: The busy state continues for longer than N-cycle.." newline bitfld.long 0x4 5. "CRCTO,CRC Status Token Timeout" "0: Not timeout,1: The CRC status is not received though a longer.." bitfld.long 0x4 4. "RDTO,Read Data Timeout" "0: Not timeout,1: The read data is not received though a longer.." newline bitfld.long 0x4 3. "BSYTO1,Busy Timeout 1" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." bitfld.long 0x4 2. "BSYTO0,Busy Timeout 0" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." newline bitfld.long 0x4 1. "RSPTO1,Response Timeout 1" "0: Not timeout.,1: The response to a command issued within a.." bitfld.long 0x4 0. "RSPTO0,Response Timeout 0" "0: Not timeout.,1: The response (other than a response to a command.." group.long 0x60++0x3 line.long 0x0 "SD_BUF0,SD Buffer Register" hexmask.long 0x0 0.--31. 1. "SD_BUF,SD Buffer RegisterWhen writing to the SD card the write data is written to this register. When reading from the SD card the read data is read from this register. This register is internally connected to two 512-byte buffers.If both buffers are.." group.long 0x68++0xB line.long 0x0 "SDIO_MODE,SDIO Mode Control Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "C52PUB,SDIO None AbortNOTE: See manual" "0,1" newline bitfld.long 0x0 8. "IOABT,SDIO AbortNOTE: See manual" "0,1" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "RWREQ,Read Wait Request" "0: Allow SD/MMC to exit read wait state,1: Request for SD/MMC to enter read wait state." bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "INTEN,SDIO Mode" "0: Disables the SD host interface to receive SDIO..,1: Enables the SD host interface to receive SDIO.." line.long 0x4 "SDIO_INFO1,SDIO Interrupt Flag Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "EXWT,EXWT Status FlagNOTE: See manual" "0,1" newline bitfld.long 0x4 14. "EXPUB52,EXPUB52 Status FlagNOTE: See manual" "0,1" hexmask.long.word 0x4 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x4 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 0. "IOIRQ,SDIO Interrupt Status" "0: SDIO interrupt not accepted,1: SDIO interrupt accepted" line.long 0x8 "SDIO_INFO1_MASK,SDIO_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x8 15. "EXWTM,EXWT Interrupt Request Mask Control" "0: EXWT interrupt request not masked,1: EXWT interrupt request masked" newline bitfld.long 0x8 14. "EXPUB52M,EXPUB52 Interrupt Request Mask Control" "0: EXPUB52 interrupt request not masked,1: EXPUB52 interrupt request masked" hexmask.long.word 0x8 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x8 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x8 0. "IOIRQM,IOIRQ Interrupt Mask Control" "0: IOIRQ interrupt not masked,1: IOIRQ interrupt masked" group.long 0x1B0++0x3 line.long 0x0 "SD_DMAEN,DMA Mode Enable Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." bitfld.long 0x0 12. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.long.byte 0x0 5.--11. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "DMAEN,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled.,1: The SD_BUF read/write DMA transfer is enabled." newline bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1C0++0x3 line.long 0x0 "SOFT_RST,Software Reset Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 0. "SDRST,Software Reset of SD I/F Unit" "0: Reset,1: Reset released" group.long 0x1CC++0x3 line.long 0x0 "SDIF_MODE,SD Interface Mode Setting Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "NOCHKCR,CRC Check Mask (for MMC test commands)" "0: CRC check is valid,1: CRC check is invalid(CRC16 value is ignored when.." newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1E0++0x3 line.long 0x0 "EXT_SWAP,Swap Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "BRSWP,SD_BUF0 Swap Read" "0: The current data are read without swapping.,1: Swapping of the positions of the higher- and.." newline bitfld.long 0x0 6. "BWSWP,SD_BUF0 Swap Write" "0: The current data are written without swapping.,1: Swapping of the positions of the higher- and.." hexmask.long.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." tree.end tree "SDHI1" base ad:0x40252400 group.long 0x0++0x3 line.long 0x0 "SD_CMD,Command Type Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "CMD12AT,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple block..,1: CMD12 is not automatically issued at multiple..,?,?" newline bitfld.long 0x0 13. "TRSTP,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multiple block transfer" bitfld.long 0x0 12. "CMDRW,Write/Read Mode (enabled when the command with data is handled)" "0: Write (SD/MMC host interface -> SD card/MMC),1: Read (SD/MMC host interface <- SD card/MMC)" newline bitfld.long 0x0 11. "CMDTP,Data Mode (Command Type)" "0: Command does not include data transfer (bc bcr..,1: Command includes data transfer (adtc)" bitfld.long 0x0 8.--10. "RSPTP,Mode/Response TypeNOTE: As some commands cannot be used in normal mode see section 1.4.10 Example of SD_CMD Register Setting to select mode/response type." "0: Settings prohibited.,?,?,?,?,?,?,?" newline bitfld.long 0x0 6.--7. "ACMD,Command Type Select" "0: Setting prohibited,1: ACMD,?,?" hexmask.long.byte 0x0 0.--5. 1. "CMDIDX,Command IndexThese bits specify Command Format[45:40] (command index).[Examples]CMD6: SD_CMD[7:0] = 8'b00_000110CMD18: SD_CMD[7:0] = 8'b00_010010ACMD13: SD_CMD[7:0] = 8'b01_001101" group.long 0x8++0xF line.long 0x0 "SD_ARG,SD Command Argument Register" hexmask.long 0x0 0.--31. 1. "SD_ARG,Argument RegisterSet command format[39:8] (argument)" line.long 0x4 "SD_ARG1,SD Command Argument Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_ARG1,Argument Register 1Set command format[39:24] (argument)" line.long 0x8 "SD_STOP,Data Stop Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x8 8. "SEC,Block Count EnableSet SEC to 1 at multiple block transfer.When SD_CMD is set as follows to start the command sequence while SEC is set to 1 CMD12 is automatically issued to stop multi-block transfer with the number of blocks which is set to.." "0: Disables SD_SECCNT setting value.,1: Enables SD_SECCNT setting value." newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "STP,Stop- When STP is set to 1 during multiple block transfer CMD12 is issued to halt the transfer through the SD host interface.However if a command sequence is halted because of a communications error or timeout CMD12 is not issued. Although.." "0,1" line.long 0xC "SD_SECCNT,Block Count Register" hexmask.long 0xC 0.--31. 1. "SD_SECCNT,Number of Transfer BlocksNOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1." rgroup.long 0x18++0x1F line.long 0x0 "SD_RSP10,SD Card Response Register 10" hexmask.long 0x0 0.--31. 1. "SD_RSP10,Store the response from the SD card/MMC" line.long 0x4 "SD_RSP1,SD Card Response Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_RSP1,Store the response from the SD card/MMC" line.long 0x8 "SD_RSP32,SD Card Response Register 32" hexmask.long 0x8 0.--31. 1. "SD_RSP32,Store the response from the SD card/MMC" line.long 0xC "SD_RSP3,SD Card Response Register 3" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0xC 0.--15. 1. "SD_RSP3,Store the response from the SD card/MMC" line.long 0x10 "SD_RSP54,SD Card Response Register 54" hexmask.long 0x10 0.--31. 1. "SD_RSP54,Store the response from the SD card/MMC" line.long 0x14 "SD_RSP5,SD Card Response Register 5" hexmask.long.word 0x14 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x14 0.--15. 1. "SD_RSP5,Store the response from the SD card/MMC" line.long 0x18 "SD_RSP76,SD Card Response Register 76" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.tbyte 0x18 0.--23. 1. "SD_RSP76,Store the response from the SD card/MMC" line.long 0x1C "SD_RSP7,SD Card Response Register 7" hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x1C 0.--7. 1. "SD_RSP7,Store the response from the SD card/MMC" group.long 0x38++0x1B line.long 0x0 "SD_INFO1,SD Card Interrupt Flag Register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline rbitfld.long 0x0 10. "SDD3MON,Inticates the SDnDAT3 State" "0: SDnDAT3 is set to 0.,1: SDnDAT3 is set to 1." bitfld.long 0x0 9. "SDD3IN,SDnDAT3 Card Insertion" "0: SD card insertion not detected,1: SD card insertion detected" newline bitfld.long 0x0 8. "SDD3RM,SDnDAT3 Card Removal" "0: SD card removal not detected,1: SD card removal detected" rbitfld.long 0x0 7. "SDWPMON,Indicates the SDnWP state" "0: SDnWP is set to 1.,1: SDnWP is set to 0." newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.long 0x0 5. "SDCDMON,Indicates the SDnCD state" "0: Indicates that Mcycle has elapsed with SDnCD..,1: Indicates that Mcycle has elapsed with SDnCD.." newline bitfld.long 0x0 4. "SDCDIN,SDnCD Card Insertion" "0: Card insertion not detected,1: Card insertion detected" bitfld.long 0x0 3. "SDCDRM,SDnCD Card Removal" "0: Card removal not detected,1: Card removal detected" newline bitfld.long 0x0 2. "ACEND,Access End" "0: Access end is not detected,1: Access end is detected" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "RSPEND,Response End Detection" "0: Response end is not detected,1: Response end is detected" line.long 0x4 "SD_INFO2,SD Card Interrupt Flag Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "ILA,Illegal Access Error" "0: Illegal access error not detected,1: Illegal access error detected" newline rbitfld.long 0x4 14. "CBSY,Command Type Register Busy" "0: A command sequence is being executed.,1: A command sequence has been completed." rbitfld.long 0x4 13. "SD_CLK_CTRLEN,When a command sequence is started by writing to SD_CMD the CBSY bit is set to 1 and at the same time the SCLKDIVEN bit is set to 0. The SCLKDIVEN bit is set to 1 after 8 cycles of SDCLK have elapsed after setting of the CBSY bit to 0.." "0: The SD/MMC bus (CMD DAT) is busy. Writing to the..,1: The SD/MMC bus (CMD DAT) is not busy." newline bitfld.long 0x4 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0.,1: Data can be written in SD_BUF0." newline bitfld.long 0x4 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0.,1: Data can be read from SD_BUF0." rbitfld.long 0x4 7. "SDD0MON,SDDAT0Indicates the SDDAT0 state of the port specified by SD_PORTSEL." "0: SDDAT0 is set to 0.,1: SDDAT0 is set to 1." newline bitfld.long 0x4 6. "RSPTO,Response Timeout" "0: Response timeout not detected,1: Response timeout detected" bitfld.long 0x4 5. "ILR,SD_BUF Illegal Read Access" "0: Illegal read access to the SD_BUF register not..,1: Illegal read access to the SD_BUF register.." newline bitfld.long 0x4 4. "ILW,SD_BUF Illegal Write Access" "0: Illegal write access to the SD_BUF register not..,1: Illegal write access to the SD_BUF register.." bitfld.long 0x4 3. "DTO,Data Timeout" "0: Data timeout not detected,1: Data timeout detected" newline bitfld.long 0x4 2. "ENDE,END Error" "0: End bit error not detected,1: End bit error detected" bitfld.long 0x4 1. "CRCE,CRC Error" "0: CRC error not detected,1: CRC error detected" newline bitfld.long 0x4 0. "CMDE,Command Error" "0: Command error not detected,1: Command error detected" line.long 0x8 "SD_INFO1_MASK,SD_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 9. "SDD3INM,SDnDAT3 Card Insertion Interrupt Request Mask" "0: SD card insertion interrupt request by the..,1: SD card insertion interrupt request by the.." bitfld.long 0x8 8. "SDD3RMM,SDnDAT3 Card Removal Interrupt Request Mask" "0: SD card removal interrupt request by the SDnDAT3..,1: SD card removal interrupt request by the SDnDAT3.." newline bitfld.long 0x8 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 4. "SDCDINM,SDnCD card Insertion Interrupt Request Mask" "0: Card insertion interrupt request by the SDnCD is..,1: Card insertion interrupt request by the SDnCD is.." newline bitfld.long 0x8 3. "SDCDRMM,SDnCD card Removal Interrupt Request Mask" "0: Card removal interrupt request by the by the..,1: Card removal interrupt request by the by the.." bitfld.long 0x8 2. "ACENDM,Access End Interrupt Request Mask" "0: Access end interrupt request is not masked,1: Access end interrupt request is masked" newline bitfld.long 0x8 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 0. "RSPENDM,Response End Interrupt Request Mask" "0: Response end interrupt request is not masked,1: Response end interrupt request is masked" line.long 0xC "SD_INFO2_MASK,SD_INFO2 Interrupt Mask Register" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0xC 15. "ILAM,Illegal Access Error Interrupt Request Mask" "0: Illegal access error interrupt request not masked,1: Illegal access error interrupt request masked" newline bitfld.long 0xC 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0xC 11. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 9. "BWEM,BWE Interrupt Request Mask" "0: Write enable interrupt request for the SD_BUF..,1: Write enable interrupt request for the SD_BUF.." newline bitfld.long 0xC 8. "BREM,BRE Interrupt Request Mask" "0: Read enable interrupt request for the SD buffer..,1: Read enable interrupt request for the SD buffer.." bitfld.long 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 6. "RSPTOM,Response Timeout Interrupt Request Mask" "0: Response timeout interrupt request not masked,1: Response timeout interrupt request masked" bitfld.long 0xC 5. "ILRM,SD_BUF Register Illegal Read Interrupt Request Mask" "0: Illegal read detection interrupt request for the..,1: Illegal read detection interrupt request for the.." newline bitfld.long 0xC 4. "ILWM,SD_BUF Register Illegal Write Interrupt Request Mask" "0: Illegal write detection interrupt request for..,1: Illegal write detection interrupt request for.." bitfld.long 0xC 3. "DTOM,Data Timeout Interrupt Request Mask" "0: Data timeout interrupt request not masked,1: Data timeout interrupt request masked" newline bitfld.long 0xC 2. "ENDEM,End Bit Error Interrupt Request Mask" "0: End bit detection error interrupt request not..,1: End bit detection error interrupt request masked" bitfld.long 0xC 1. "CRCEM,CRC Error Interrupt Request Mask" "0: CRC error interrupt request not masked,1: CRC error interrupt request masked" newline bitfld.long 0xC 0. "CMDEM,Command Error Interrupt Request Mask" "0: Command error interrupt request not masked,1: Command error interrupt request masked" line.long 0x10 "SD_CLK_CTRL,SD Clock Control Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x10 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x10 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 9. "CLKCTRLEN,SD/MMC Clock Output Automatic Control Enable" "0: Automatic control for SD/MMC Clock output is..,1: Automatic control for SD/MMC Clock output is.." newline bitfld.long 0x10 8. "CLKEN,SD/MMC Clock Output Control Enable" "0: SD/MMC Clock output is disabled. The SDCLK..,1: SD/MMC Clock output is enabled." hexmask.long.byte 0x10 0.--7. 1. "CLKSEL,SDHI Clock Frequency Select" line.long 0x14 "SD_SIZE,Transfer Data Length Register" hexmask.long.tbyte 0x14 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x14 0.--9. 1. "LEN,Transfer Data SizeThese bits specify a size between 1 and 512 bytes for the transfer of single blocks.In cases of multiple block transfer with automatic issuing of CMD12 (CMD18 and CMD25) the only specifiable transfer data size is 512 bytes." line.long 0x18 "SD_OPTION,SD Card Access Control Option Register" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x18 15. "WIDTH,Bus WidthNOTE: The initial value is applied at a reset and when the SOFT_RST.SDRST flag is 0." "0: 4-bit width (WIDTH8=0) / 8-bit width (WIDTH8=1),1: 1-bit width (WIDTH8=0 or 1 )" newline bitfld.long 0x18 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x18 13. "WIDTH8,Bus Widthsee b15 WIDTH bit" "0,1" newline hexmask.long.byte 0x18 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 8. "TOUTMASK,Timeout MASKWhen timeout occurs in case of inactivating timeout software reset should be executed to terminate command sequence." "0: Activate Timeout,1: Inactivate Timeout(RSPTO bit and DTO bit of.." newline hexmask.long.byte 0x18 4.--7. 1. "TOP,Timeout Counter" hexmask.long.byte 0x18 0.--3. 1. "CTOP,Card Detect Time Counter" rgroup.long 0x58++0x7 line.long 0x0 "SD_ERR_STS1,SD Error Status Register 1" hexmask.long.tbyte 0x0 15.--31. 1. "Reserved,These bits are read as 00000000000000000." bitfld.long 0x0 12.--14. "CRCTK,CRC Status TokenStore the CRC status token value (normal value is 010b)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 11. "CRCTKE,CRC Status Token Error" "0: An error has not occured in the CRC status.,1: An error has occured in the CRC status." bitfld.long 0x0 10. "RDCRCE,Read Data CRC Error" "0: CRC error has detected in read data,1: CRC error has not detected in read data" newline bitfld.long 0x0 9. "RSPCRCE1,Response CRC Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPCRCE0." "0: CRC error has not occured.,1: CRC error has occured in the response to a.." bitfld.long 0x0 8. "RSPCRCE0,Response CRC Error 0NOTE: other than a response to a command issued within a command sequence" "0: A CRC error has not occur in a response,1: A CRC error has occured in a response" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 5. "CRCLENE,CRC Status Token Length Error" "0: An error has not occured in the CRC status length.,1: An error has occured in the CRC status length.." newline bitfld.long 0x0 4. "RDLENE,Read Data Length Error" "0: An error has occurred not in the read data length.,1: An error has occured in the read data length.." bitfld.long 0x0 3. "RSPLENE1,Response Length Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPLENE0." "0: An error has not occurred in the response length..,1: An error has occured in the response length to a.." newline bitfld.long 0x0 2. "RSPLENE0,Response Length Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the response length,1: An error has occured in the response length" bitfld.long 0x0 1. "CMDE1,Command Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is Indicated in CMDE0." "0: An error has not occurs in the command index of..,1: An error has occured in the command index of the.." newline bitfld.long 0x0 0. "CMDE0,Command Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the command index of..,1: An error has occured in the command index of a.." line.long 0x4 "SD_ERR_STS2,SD Error Status Register 2" hexmask.long 0x4 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x4 6. "CRCBSYTO,CRC Status Token Busy Timeout" "0: Not timeout,1: The busy state continues for longer than N-cycle.." newline bitfld.long 0x4 5. "CRCTO,CRC Status Token Timeout" "0: Not timeout,1: The CRC status is not received though a longer.." bitfld.long 0x4 4. "RDTO,Read Data Timeout" "0: Not timeout,1: The read data is not received though a longer.." newline bitfld.long 0x4 3. "BSYTO1,Busy Timeout 1" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." bitfld.long 0x4 2. "BSYTO0,Busy Timeout 0" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." newline bitfld.long 0x4 1. "RSPTO1,Response Timeout 1" "0: Not timeout.,1: The response to a command issued within a.." bitfld.long 0x4 0. "RSPTO0,Response Timeout 0" "0: Not timeout.,1: The response (other than a response to a command.." group.long 0x60++0x3 line.long 0x0 "SD_BUF0,SD Buffer Register" hexmask.long 0x0 0.--31. 1. "SD_BUF,SD Buffer RegisterWhen writing to the SD card the write data is written to this register. When reading from the SD card the read data is read from this register. This register is internally connected to two 512-byte buffers.If both buffers are.." group.long 0x68++0xB line.long 0x0 "SDIO_MODE,SDIO Mode Control Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "C52PUB,SDIO None AbortNOTE: See manual" "0,1" newline bitfld.long 0x0 8. "IOABT,SDIO AbortNOTE: See manual" "0,1" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "RWREQ,Read Wait Request" "0: Allow SD/MMC to exit read wait state,1: Request for SD/MMC to enter read wait state." bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "INTEN,SDIO Mode" "0: Disables the SD host interface to receive SDIO..,1: Enables the SD host interface to receive SDIO.." line.long 0x4 "SDIO_INFO1,SDIO Interrupt Flag Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "EXWT,EXWT Status FlagNOTE: See manual" "0,1" newline bitfld.long 0x4 14. "EXPUB52,EXPUB52 Status FlagNOTE: See manual" "0,1" hexmask.long.word 0x4 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x4 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 0. "IOIRQ,SDIO Interrupt Status" "0: SDIO interrupt not accepted,1: SDIO interrupt accepted" line.long 0x8 "SDIO_INFO1_MASK,SDIO_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x8 15. "EXWTM,EXWT Interrupt Request Mask Control" "0: EXWT interrupt request not masked,1: EXWT interrupt request masked" newline bitfld.long 0x8 14. "EXPUB52M,EXPUB52 Interrupt Request Mask Control" "0: EXPUB52 interrupt request not masked,1: EXPUB52 interrupt request masked" hexmask.long.word 0x8 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x8 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x8 0. "IOIRQM,IOIRQ Interrupt Mask Control" "0: IOIRQ interrupt not masked,1: IOIRQ interrupt masked" group.long 0x1B0++0x3 line.long 0x0 "SD_DMAEN,DMA Mode Enable Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." bitfld.long 0x0 12. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.long.byte 0x0 5.--11. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "DMAEN,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled.,1: The SD_BUF read/write DMA transfer is enabled." newline bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1C0++0x3 line.long 0x0 "SOFT_RST,Software Reset Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 0. "SDRST,Software Reset of SD I/F Unit" "0: Reset,1: Reset released" group.long 0x1CC++0x3 line.long 0x0 "SDIF_MODE,SD Interface Mode Setting Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "NOCHKCR,CRC Check Mask (for MMC test commands)" "0: CRC check is valid,1: CRC check is invalid(CRC16 value is ignored when.." newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1E0++0x3 line.long 0x0 "EXT_SWAP,Swap Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "BRSWP,SD_BUF0 Swap Read" "0: The current data are read without swapping.,1: Swapping of the positions of the higher- and.." newline bitfld.long 0x0 6. "BWSWP,SD_BUF0 Swap Write" "0: The current data are written without swapping.,1: Swapping of the positions of the higher- and.." hexmask.long.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." tree.end tree "SDHI1_NS" base ad:0x50252400 group.long 0x0++0x3 line.long 0x0 "SD_CMD,Command Type Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x0 14.--15. "CMD12AT,Multiple Block Transfer Mode (enabled at multiple block transfer)" "0: CMD12 is automatically issued at multiple block..,1: CMD12 is not automatically issued at multiple..,?,?" newline bitfld.long 0x0 13. "TRSTP,Single/Multiple Block Transfer (enabled when the command with data is handled)" "0: Single block transfer,1: Multiple block transfer" bitfld.long 0x0 12. "CMDRW,Write/Read Mode (enabled when the command with data is handled)" "0: Write (SD/MMC host interface -> SD card/MMC),1: Read (SD/MMC host interface <- SD card/MMC)" newline bitfld.long 0x0 11. "CMDTP,Data Mode (Command Type)" "0: Command does not include data transfer (bc bcr..,1: Command includes data transfer (adtc)" bitfld.long 0x0 8.--10. "RSPTP,Mode/Response TypeNOTE: As some commands cannot be used in normal mode see section 1.4.10 Example of SD_CMD Register Setting to select mode/response type." "0: Settings prohibited.,?,?,?,?,?,?,?" newline bitfld.long 0x0 6.--7. "ACMD,Command Type Select" "0: Setting prohibited,1: ACMD,?,?" hexmask.long.byte 0x0 0.--5. 1. "CMDIDX,Command IndexThese bits specify Command Format[45:40] (command index).[Examples]CMD6: SD_CMD[7:0] = 8'b00_000110CMD18: SD_CMD[7:0] = 8'b00_010010ACMD13: SD_CMD[7:0] = 8'b01_001101" group.long 0x8++0xF line.long 0x0 "SD_ARG,SD Command Argument Register" hexmask.long 0x0 0.--31. 1. "SD_ARG,Argument RegisterSet command format[39:8] (argument)" line.long 0x4 "SD_ARG1,SD Command Argument Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_ARG1,Argument Register 1Set command format[39:24] (argument)" line.long 0x8 "SD_STOP,Data Stop Register" hexmask.long.tbyte 0x8 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x8 8. "SEC,Block Count EnableSet SEC to 1 at multiple block transfer.When SD_CMD is set as follows to start the command sequence while SEC is set to 1 CMD12 is automatically issued to stop multi-block transfer with the number of blocks which is set to.." "0: Disables SD_SECCNT setting value.,1: Enables SD_SECCNT setting value." newline hexmask.long.byte 0x8 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x8 0. "STP,Stop- When STP is set to 1 during multiple block transfer CMD12 is issued to halt the transfer through the SD host interface.However if a command sequence is halted because of a communications error or timeout CMD12 is not issued. Although.." "0,1" line.long 0xC "SD_SECCNT,Block Count Register" hexmask.long 0xC 0.--31. 1. "SD_SECCNT,Number of Transfer BlocksNOTE: Do not change the value of this bit when the CBSY bit in SD_INFO2 is set to 1." rgroup.long 0x18++0x1F line.long 0x0 "SD_RSP10,SD Card Response Register 10" hexmask.long 0x0 0.--31. 1. "SD_RSP10,Store the response from the SD card/MMC" line.long 0x4 "SD_RSP1,SD Card Response Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x4 0.--15. 1. "SD_RSP1,Store the response from the SD card/MMC" line.long 0x8 "SD_RSP32,SD Card Response Register 32" hexmask.long 0x8 0.--31. 1. "SD_RSP32,Store the response from the SD card/MMC" line.long 0xC "SD_RSP3,SD Card Response Register 3" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0xC 0.--15. 1. "SD_RSP3,Store the response from the SD card/MMC" line.long 0x10 "SD_RSP54,SD Card Response Register 54" hexmask.long 0x10 0.--31. 1. "SD_RSP54,Store the response from the SD card/MMC" line.long 0x14 "SD_RSP5,SD Card Response Register 5" hexmask.long.word 0x14 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x14 0.--15. 1. "SD_RSP5,Store the response from the SD card/MMC" line.long 0x18 "SD_RSP76,SD Card Response Register 76" hexmask.long.byte 0x18 24.--31. 1. "Reserved,These bits are read as 00000000." hexmask.long.tbyte 0x18 0.--23. 1. "SD_RSP76,Store the response from the SD card/MMC" line.long 0x1C "SD_RSP7,SD Card Response Register 7" hexmask.long.tbyte 0x1C 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000." hexmask.long.byte 0x1C 0.--7. 1. "SD_RSP7,Store the response from the SD card/MMC" group.long 0x38++0x1B line.long 0x0 "SD_INFO1,SD Card Interrupt Flag Register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline rbitfld.long 0x0 10. "SDD3MON,Inticates the SDnDAT3 State" "0: SDnDAT3 is set to 0.,1: SDnDAT3 is set to 1." bitfld.long 0x0 9. "SDD3IN,SDnDAT3 Card Insertion" "0: SD card insertion not detected,1: SD card insertion detected" newline bitfld.long 0x0 8. "SDD3RM,SDnDAT3 Card Removal" "0: SD card removal not detected,1: SD card removal detected" rbitfld.long 0x0 7. "SDWPMON,Indicates the SDnWP state" "0: SDnWP is set to 1.,1: SDnWP is set to 0." newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.long 0x0 5. "SDCDMON,Indicates the SDnCD state" "0: Indicates that Mcycle has elapsed with SDnCD..,1: Indicates that Mcycle has elapsed with SDnCD.." newline bitfld.long 0x0 4. "SDCDIN,SDnCD Card Insertion" "0: Card insertion not detected,1: Card insertion detected" bitfld.long 0x0 3. "SDCDRM,SDnCD Card Removal" "0: Card removal not detected,1: Card removal detected" newline bitfld.long 0x0 2. "ACEND,Access End" "0: Access end is not detected,1: Access end is detected" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "RSPEND,Response End Detection" "0: Response end is not detected,1: Response end is detected" line.long 0x4 "SD_INFO2,SD Card Interrupt Flag Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "ILA,Illegal Access Error" "0: Illegal access error not detected,1: Illegal access error detected" newline rbitfld.long 0x4 14. "CBSY,Command Type Register Busy" "0: A command sequence is being executed.,1: A command sequence has been completed." rbitfld.long 0x4 13. "SD_CLK_CTRLEN,When a command sequence is started by writing to SD_CMD the CBSY bit is set to 1 and at the same time the SCLKDIVEN bit is set to 0. The SCLKDIVEN bit is set to 1 after 8 cycles of SDCLK have elapsed after setting of the CBSY bit to 0.." "0: The SD/MMC bus (CMD DAT) is busy. Writing to the..,1: The SD/MMC bus (CMD DAT) is not busy." newline bitfld.long 0x4 10.--12. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x4 9. "BWE,SD_BUF Write Enable" "0: Data cannot be written in SD_BUF0.,1: Data can be written in SD_BUF0." newline bitfld.long 0x4 8. "BRE,SD_BUF Read Enable" "0: Data cannot be read from SD_BUF0.,1: Data can be read from SD_BUF0." rbitfld.long 0x4 7. "SDD0MON,SDDAT0Indicates the SDDAT0 state of the port specified by SD_PORTSEL." "0: SDDAT0 is set to 0.,1: SDDAT0 is set to 1." newline bitfld.long 0x4 6. "RSPTO,Response Timeout" "0: Response timeout not detected,1: Response timeout detected" bitfld.long 0x4 5. "ILR,SD_BUF Illegal Read Access" "0: Illegal read access to the SD_BUF register not..,1: Illegal read access to the SD_BUF register.." newline bitfld.long 0x4 4. "ILW,SD_BUF Illegal Write Access" "0: Illegal write access to the SD_BUF register not..,1: Illegal write access to the SD_BUF register.." bitfld.long 0x4 3. "DTO,Data Timeout" "0: Data timeout not detected,1: Data timeout detected" newline bitfld.long 0x4 2. "ENDE,END Error" "0: End bit error not detected,1: End bit error detected" bitfld.long 0x4 1. "CRCE,CRC Error" "0: CRC error not detected,1: CRC error detected" newline bitfld.long 0x4 0. "CMDE,Command Error" "0: Command error not detected,1: Command error detected" line.long 0x8 "SD_INFO1_MASK,SD_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x8 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x8 9. "SDD3INM,SDnDAT3 Card Insertion Interrupt Request Mask" "0: SD card insertion interrupt request by the..,1: SD card insertion interrupt request by the.." bitfld.long 0x8 8. "SDD3RMM,SDnDAT3 Card Removal Interrupt Request Mask" "0: SD card removal interrupt request by the SDnDAT3..,1: SD card removal interrupt request by the SDnDAT3.." newline bitfld.long 0x8 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 4. "SDCDINM,SDnCD card Insertion Interrupt Request Mask" "0: Card insertion interrupt request by the SDnCD is..,1: Card insertion interrupt request by the SDnCD is.." newline bitfld.long 0x8 3. "SDCDRMM,SDnCD card Removal Interrupt Request Mask" "0: Card removal interrupt request by the by the..,1: Card removal interrupt request by the by the.." bitfld.long 0x8 2. "ACENDM,Access End Interrupt Request Mask" "0: Access end interrupt request is not masked,1: Access end interrupt request is masked" newline bitfld.long 0x8 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 0. "RSPENDM,Response End Interrupt Request Mask" "0: Response end interrupt request is not masked,1: Response end interrupt request is masked" line.long 0xC "SD_INFO2_MASK,SD_INFO2 Interrupt Mask Register" hexmask.long.word 0xC 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0xC 15. "ILAM,Illegal Access Error Interrupt Request Mask" "0: Illegal access error interrupt request not masked,1: Illegal access error interrupt request masked" newline bitfld.long 0xC 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0xC 11. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 9. "BWEM,BWE Interrupt Request Mask" "0: Write enable interrupt request for the SD_BUF..,1: Write enable interrupt request for the SD_BUF.." newline bitfld.long 0xC 8. "BREM,BRE Interrupt Request Mask" "0: Read enable interrupt request for the SD buffer..,1: Read enable interrupt request for the SD buffer.." bitfld.long 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 6. "RSPTOM,Response Timeout Interrupt Request Mask" "0: Response timeout interrupt request not masked,1: Response timeout interrupt request masked" bitfld.long 0xC 5. "ILRM,SD_BUF Register Illegal Read Interrupt Request Mask" "0: Illegal read detection interrupt request for the..,1: Illegal read detection interrupt request for the.." newline bitfld.long 0xC 4. "ILWM,SD_BUF Register Illegal Write Interrupt Request Mask" "0: Illegal write detection interrupt request for..,1: Illegal write detection interrupt request for.." bitfld.long 0xC 3. "DTOM,Data Timeout Interrupt Request Mask" "0: Data timeout interrupt request not masked,1: Data timeout interrupt request masked" newline bitfld.long 0xC 2. "ENDEM,End Bit Error Interrupt Request Mask" "0: End bit detection error interrupt request not..,1: End bit detection error interrupt request masked" bitfld.long 0xC 1. "CRCEM,CRC Error Interrupt Request Mask" "0: CRC error interrupt request not masked,1: CRC error interrupt request masked" newline bitfld.long 0xC 0. "CMDEM,Command Error Interrupt Request Mask" "0: Command error interrupt request not masked,1: Command error interrupt request masked" line.long 0x10 "SD_CLK_CTRL,SD Clock Control Register" hexmask.long.word 0x10 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x10 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x10 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x10 9. "CLKCTRLEN,SD/MMC Clock Output Automatic Control Enable" "0: Automatic control for SD/MMC Clock output is..,1: Automatic control for SD/MMC Clock output is.." newline bitfld.long 0x10 8. "CLKEN,SD/MMC Clock Output Control Enable" "0: SD/MMC Clock output is disabled. The SDCLK..,1: SD/MMC Clock output is enabled." hexmask.long.byte 0x10 0.--7. 1. "CLKSEL,SDHI Clock Frequency Select" line.long 0x14 "SD_SIZE,Transfer Data Length Register" hexmask.long.tbyte 0x14 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." hexmask.long.word 0x14 0.--9. 1. "LEN,Transfer Data SizeThese bits specify a size between 1 and 512 bytes for the transfer of single blocks.In cases of multiple block transfer with automatic issuing of CMD12 (CMD18 and CMD25) the only specifiable transfer data size is 512 bytes." line.long 0x18 "SD_OPTION,SD Card Access Control Option Register" hexmask.long.word 0x18 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x18 15. "WIDTH,Bus WidthNOTE: The initial value is applied at a reset and when the SOFT_RST.SDRST flag is 0." "0: 4-bit width (WIDTH8=0) / 8-bit width (WIDTH8=1),1: 1-bit width (WIDTH8=0 or 1 )" newline bitfld.long 0x18 14. "Reserved,This bit is read as 1. The write value should be 1." "0,1" bitfld.long 0x18 13. "WIDTH8,Bus Widthsee b15 WIDTH bit" "0,1" newline hexmask.long.byte 0x18 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 8. "TOUTMASK,Timeout MASKWhen timeout occurs in case of inactivating timeout software reset should be executed to terminate command sequence." "0: Activate Timeout,1: Inactivate Timeout(RSPTO bit and DTO bit of.." newline hexmask.long.byte 0x18 4.--7. 1. "TOP,Timeout Counter" hexmask.long.byte 0x18 0.--3. 1. "CTOP,Card Detect Time Counter" rgroup.long 0x58++0x7 line.long 0x0 "SD_ERR_STS1,SD Error Status Register 1" hexmask.long.tbyte 0x0 15.--31. 1. "Reserved,These bits are read as 00000000000000000." bitfld.long 0x0 12.--14. "CRCTK,CRC Status TokenStore the CRC status token value (normal value is 010b)" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 11. "CRCTKE,CRC Status Token Error" "0: An error has not occured in the CRC status.,1: An error has occured in the CRC status." bitfld.long 0x0 10. "RDCRCE,Read Data CRC Error" "0: CRC error has detected in read data,1: CRC error has not detected in read data" newline bitfld.long 0x0 9. "RSPCRCE1,Response CRC Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPCRCE0." "0: CRC error has not occured.,1: CRC error has occured in the response to a.." bitfld.long 0x0 8. "RSPCRCE0,Response CRC Error 0NOTE: other than a response to a command issued within a command sequence" "0: A CRC error has not occur in a response,1: A CRC error has occured in a response" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 5. "CRCLENE,CRC Status Token Length Error" "0: An error has not occured in the CRC status length.,1: An error has occured in the CRC status length.." newline bitfld.long 0x0 4. "RDLENE,Read Data Length Error" "0: An error has occurred not in the read data length.,1: An error has occured in the read data length.." bitfld.long 0x0 3. "RSPLENE1,Response Length Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is indicated in RSPLENE0." "0: An error has not occurred in the response length..,1: An error has occured in the response length to a.." newline bitfld.long 0x0 2. "RSPLENE0,Response Length Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the response length,1: An error has occured in the response length" bitfld.long 0x0 1. "CMDE1,Command Error 1NOTE: In cases where CMD12 is issued by setting a command index in SD_CMD this is Indicated in CMDE0." "0: An error has not occurs in the command index of..,1: An error has occured in the command index of the.." newline bitfld.long 0x0 0. "CMDE0,Command Error 0NOTE: other than a response to a command issued within a command sequence" "0: An error has not occured in the command index of..,1: An error has occured in the command index of a.." line.long 0x4 "SD_ERR_STS2,SD Error Status Register 2" hexmask.long 0x4 7.--31. 1. "Reserved,These bits are read as 0000000000000000000000000." bitfld.long 0x4 6. "CRCBSYTO,CRC Status Token Busy Timeout" "0: Not timeout,1: The busy state continues for longer than N-cycle.." newline bitfld.long 0x4 5. "CRCTO,CRC Status Token Timeout" "0: Not timeout,1: The CRC status is not received though a longer.." bitfld.long 0x4 4. "RDTO,Read Data Timeout" "0: Not timeout,1: The read data is not received though a longer.." newline bitfld.long 0x4 3. "BSYTO1,Busy Timeout 1" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." bitfld.long 0x4 2. "BSYTO0,Busy Timeout 0" "0: Not timeout.,1: The busy state for longer than N-cycle continues.." newline bitfld.long 0x4 1. "RSPTO1,Response Timeout 1" "0: Not timeout.,1: The response to a command issued within a.." bitfld.long 0x4 0. "RSPTO0,Response Timeout 0" "0: Not timeout.,1: The response (other than a response to a command.." group.long 0x60++0x3 line.long 0x0 "SD_BUF0,SD Buffer Register" hexmask.long 0x0 0.--31. 1. "SD_BUF,SD Buffer RegisterWhen writing to the SD card the write data is written to this register. When reading from the SD card the read data is read from this register. This register is internally connected to two 512-byte buffers.If both buffers are.." group.long 0x68++0xB line.long 0x0 "SDIO_MODE,SDIO Mode Control Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000. The write value should be 0000000000000000000000." bitfld.long 0x0 9. "C52PUB,SDIO None AbortNOTE: See manual" "0,1" newline bitfld.long 0x0 8. "IOABT,SDIO AbortNOTE: See manual" "0,1" hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x0 2. "RWREQ,Read Wait Request" "0: Allow SD/MMC to exit read wait state,1: Request for SD/MMC to enter read wait state." bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "INTEN,SDIO Mode" "0: Disables the SD host interface to receive SDIO..,1: Enables the SD host interface to receive SDIO.." line.long 0x4 "SDIO_INFO1,SDIO Interrupt Flag Register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "EXWT,EXWT Status FlagNOTE: See manual" "0,1" newline bitfld.long 0x4 14. "EXPUB52,EXPUB52 Status FlagNOTE: See manual" "0,1" hexmask.long.word 0x4 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x4 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 0. "IOIRQ,SDIO Interrupt Status" "0: SDIO interrupt not accepted,1: SDIO interrupt accepted" line.long 0x8 "SDIO_INFO1_MASK,SDIO_INFO1 Interrupt Mask Register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x8 15. "EXWTM,EXWT Interrupt Request Mask Control" "0: EXWT interrupt request not masked,1: EXWT interrupt request masked" newline bitfld.long 0x8 14. "EXPUB52M,EXPUB52 Interrupt Request Mask Control" "0: EXPUB52 interrupt request not masked,1: EXPUB52 interrupt request masked" hexmask.long.word 0x8 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." newline bitfld.long 0x8 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" bitfld.long 0x8 0. "IOIRQM,IOIRQ Interrupt Mask Control" "0: IOIRQ interrupt not masked,1: IOIRQ interrupt masked" group.long 0x1B0++0x3 line.long 0x0 "SD_DMAEN,DMA Mode Enable Register" hexmask.long.tbyte 0x0 13.--31. 1. "Reserved,These bits are read as 0000000000000000000. The write value should be 0000000000000000000." bitfld.long 0x0 12. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline hexmask.long.byte 0x0 5.--11. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 4. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.long 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 1. "DMAEN,SD_BUF Read/Write DMA Transfer" "0: The SD_BUF read/write DMA transfer is disabled.,1: The SD_BUF read/write DMA transfer is enabled." newline bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1C0++0x3 line.long 0x0 "SOFT_RST,Software Reset Register" hexmask.long 0x0 3.--31. 1. "Reserved,These bits are read as 00000000000000000000000000000. The write value should be 00000000000000000000000000000." bitfld.long 0x0 1.--2. "Reserved,These bits are read as 11. The write value should be 11." "0,1,2,3" newline bitfld.long 0x0 0. "SDRST,Software Reset of SD I/F Unit" "0: Reset,1: Reset released" group.long 0x1CC++0x3 line.long 0x0 "SDIF_MODE,SD Interface Mode Setting Register" hexmask.long.tbyte 0x0 9.--31. 1. "Reserved,These bits are read as 00000000000000000000000. The write value should be 00000000000000000000000." bitfld.long 0x0 8. "NOCHKCR,CRC Check Mask (for MMC test commands)" "0: CRC check is valid,1: CRC check is invalid(CRC16 value is ignored when.." newline hexmask.long.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x1E0++0x3 line.long 0x0 "EXT_SWAP,Swap Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "Reserved,These bits are read as 000000000000000000000000. The write value should be 000000000000000000000000." bitfld.long 0x0 7. "BRSWP,SD_BUF0 Swap Read" "0: The current data are read without swapping.,1: Swapping of the positions of the higher- and.." newline bitfld.long 0x0 6. "BWSWP,SD_BUF0 Swap Write" "0: The current data are written without swapping.,1: Swapping of the positions of the higher- and.." hexmask.long.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." tree.end tree.end tree "SPI (Serial Peripheral Interface)" base ad:0x0 tree "SPI0" base ad:0x4035C000 group.long 0x0++0x33 line.long 0x0 "SPDR,RSPI Data Register" hexmask.long 0x0 0.--31. 1. "SPD,SPDR is the interface with the buffers that hold data for transmission and reception by the SPI.When accessing in word (SPDCR.SPBYT=0 and SPDCR.SPLW=1) access SPDR." line.long 0x4 "SPDECR,RSPI Delay Control Register" bitfld.long 0x4 31. "ASLPEN,Receive sampling timing loopback adjustment function selection bit(Private)" "0: Receive sampling timing loopback adjustment..,1: Receive sampling timing loopback adjustment.." hexmask.long.byte 0x4 27.--30. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 24.--26. "ARST,Adjust receive sampling by delaying 0 to 4 TCLK from the center of bit." "0: 0 TCLK delay,1: 1 TCLK delay,?,?,?,?,?,?" hexmask.long.byte 0x4 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 16.--18. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 TCLK,1: 2 RSPCK + 2 TCLK,?,?,?,?,?,?" hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 8.--10. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 0.--2. "SCKDL,RSPCK Delay setting bit" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" line.long 0x8 "SPCR,RSPI Control Register" bitfld.long 0x8 31. "BPEN,Synchronization circuit bypass enable bit" "0: Non-bypass,1: Bypass" bitfld.long 0x8 30. "MSTR,RSPI Master/Slave Mode Select" "0: Select slave mode,1: Select master mode." newline bitfld.long 0x8 28.--29. "TXMD,Communications Operating Mode Select" "0: Transmission / reception serial communication,1: Transmission only,?,?" bitfld.long 0x8 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x8 25. "SPFRF,RSPI frame format selection bit(Initial value: 1'b0)" "0: Motorola SPI,1: TI SSP '" bitfld.long 0x8 24. "SPMS,RSPI Mode Select" "0: Select RSPI operation (4-wire method),1: Select clock synchronous operation (3-wire.." newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x8 21. "CENDIE,RSPI Communication End Interrupt Enable" "0: Disable communication end interrupt request,1: Enable communication end interrupt request." newline bitfld.long 0x8 20. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disable transmit buffer empty interrupt requests,1: Enable transmit buffer empty interrupt requests." bitfld.long 0x8 19. "SPDRES,Receive data ready error select bit" "0: Receive data full interrupt,1: Error interrupt." newline bitfld.long 0x8 18. "SPIIE,RSPI Idle Interrupt Enable" "0: Disable idle interrupt requests,1: Enable idle interrupt requests." bitfld.long 0x8 17. "SPRIE,RSPI Receive Buffer Full Interrupt Enable" "0: Disable RSPI receive buffer full interrupt..,1: Enable RSPI receive buffer full interrupt.." newline bitfld.long 0x8 16. "SPEIE,RSPI Error Interrupt Enable" "0: Disable RSPI error interrupt requests,1: Enable RSPI error interrupt requests." bitfld.long 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x8 14. "MODFEN,Mode Fault Error Detection Enable" "0: Disable detection of mode fault errors,1: Enable detection of mode fault errors." bitfld.long 0x8 13. "BFDS,Delay Selection Bit between frames for Burst Transfer" "0: Delay (RSPCK delay SSL negation delay and..,1: Delay between frames is not inserted in burst.." newline bitfld.long 0x8 12. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disable RSPCK auto-stop function,1: Enable RSPCK auto-stop function." bitfld.long 0x8 11. "PTE,Parity Self-Testing" "0: Disable self-diagnosis function of the parity..,1: Enable self-diagnosis function of the parity.." newline bitfld.long 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 9. "SPOE,Parity Mode" "0: Select even parity for transmission and reception,1: Select odd parity for transmission and reception." newline bitfld.long 0x8 8. "SPPE,Parity Enable" "0: Do not add parity bit to transmit data and do..,1: Add parity bit to transmit data and check parity.." bitfld.long 0x8 7. "SPSCKSEL,RSPI master receive clock select bit" "0: MRIOCLK selection (analog delay adjustment),1: MRCLK selection (digital delay adjustment)" newline bitfld.long 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 4.--5. "SPTICK,TI SSP clock format control bit" "0: Default (no additional clock is output after the..,1: Output 1RSPCK additionally after the last data,?,?" newline bitfld.long 0x8 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "SPE,RSPI Function Enable" "0: Disable RSPI function,1: Enable RSPI function." line.long 0xC "SPCR2,RSPI Control Register 2" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 28.--30. "SPTDDL,RSPI transmit data delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 24.--26. "SPSCKDL,RSPI master receive clock analog delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0xC 21. "MOIFE,MOSI Idle Value Fixing Enable" "0: Set MOSI output value to equal final data from..,1: Set MOSI output value to equal value set in the.." newline bitfld.long 0xC 20. "MOIFV,MOSI Idle Fixed Value" "0: Set level output on MOSIn pin during MOSI idling..,1: Set level output on MOSIn pin during MOSI idling.." bitfld.long 0xC 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 18. "SPOM,RSPI Output Pin Mode Select" "0: CMOS output,1: Open-drain output" bitfld.long 0xC 17. "SPLP2,RSPI Loopback 2" "0: Normal mode,1: Loopback mode (data is not inverted for.." newline bitfld.long 0xC 16. "SPLP,RSPI Loopback" "0: Normal mode,1: Loopback mode (data is inverted for transmission)" hexmask.long.byte 0xC 8.--15. 1. "SPDRC,RSPI Receive data ready detection adjustment bit" newline bitfld.long 0xC 7. "RMSTTG,Reception only master start bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." bitfld.long 0xC 6. "RMEDTG,Reception only master end bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." newline bitfld.long 0xC 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0xC 0.--4. 1. "RMFM,Receive-only master frame processing count setting bit" line.long 0x10 "SPCR3,RSPI Control Register 3" hexmask.long.byte 0x10 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x10 24.--26. "SPSLN,RSPI sequence length setting bit" "0: Sequence Length 1 SPDMDx x = 0->0->...,1: Sequence Length 2 SPDMDx x = 0->1->0->...,?,?,?,?,?,?" newline hexmask.long.byte 0x10 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x10 8.--15. 1. "SPR,SPBR sets the bit rate in master mode." newline bitfld.long 0x10 7. "SSL7P,SSL7 Signal Polarity Setting" "0: Set SSL7 signal to active low,1: Set SSL7 signal to active high." bitfld.long 0x10 6. "SSL6P,SSL6 Signal Polarity Setting" "0: Set SSL6 signal to active low,1: Set SSL6 signal to active high." newline bitfld.long 0x10 5. "SSL5P,SSL5 Signal Polarity Setting" "0: Set SSL5 signal to active low,1: Set SSL5 signal to active high." bitfld.long 0x10 4. "SSL4P,SSL4 Signal Polarity Setting" "0: Set SSL4 signal to active low,1: Set SSL4 signal to active high." newline bitfld.long 0x10 3. "SSL3P,SSL3 Signal Polarity Setting" "0: Set SSL3 signal to active low,1: Set SSL3 signal to active high." bitfld.long 0x10 2. "SSL2P,SSL2 Signal Polarity Setting" "0: Set SSL2 signal to active low,1: Set SSL2 signal to active high." newline bitfld.long 0x10 1. "SSL1P,SSL1 Signal Polarity Setting" "0: Set SSL1 signal to active low,1: Set SSL1 signal to active high." bitfld.long 0x10 0. "SSL0P,SSL0 Signal Polarity Setting" "0: Set SSL0 signal to active low,1: Set SSL0 signal to active high." line.long 0x14 "SPCMD0,RSPI Command Register 0" hexmask.long.byte 0x14 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x14 24.--26. "SSLA0,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x14 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x14 16.--20. 1. "SPB0,RSPI data length setting bit" newline bitfld.long 0x14 15. "SCKDEN0,RSPCK Delay Setting Enable" "0: Motolora SPI: RSPCK delay is 1RSPCK,1: RSPCK delay is the value of the RSPCK delay.." bitfld.long 0x14 14. "SLNDEN0,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x14 13. "SPNDEN0,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x14 12. "LSBF0,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x14 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x14 7. "SSLKP0,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x14 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x14 2.--3. "BRDV0,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x14 1. "CPOL0,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x14 0. "CPHA0,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x18 "SPCMD1,RSPI Command Register 1" hexmask.long.byte 0x18 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x18 24.--26. "SSLA1,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x18 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 16.--20. 1. "SPB1,RSPI data length setting bit" newline bitfld.long 0x18 15. "SCKDEN1,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x18 14. "SLNDEN1,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x18 13. "SPNDEN1,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x18 12. "LSBF1,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x18 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 7. "SSLKP1,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x18 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x18 2.--3. "BRDV1,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x18 1. "CPOL1,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x18 0. "CPHA1,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x1C "SPCMD2,RSPI Command Register 2" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 24.--26. "SSLA2,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x1C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 16.--20. 1. "SPB2,RSPI data length setting bit" newline bitfld.long 0x1C 15. "SCKDEN2,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x1C 14. "SLNDEN2,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x1C 13. "SPNDEN2,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x1C 12. "LSBF2,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x1C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 7. "SSLKP2,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x1C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2.--3. "BRDV2,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x1C 1. "CPOL2,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x1C 0. "CPHA2,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x20 "SPCMD3,RSPI Command Register 3" hexmask.long.byte 0x20 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x20 24.--26. "SSLA3,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x20 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x20 16.--20. 1. "SPB3,RSPI data length setting bit" newline bitfld.long 0x20 15. "SCKDEN3,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x20 14. "SLNDEN3,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x20 13. "SPNDEN3,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x20 12. "LSBF3,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x20 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 7. "SSLKP3,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x20 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x20 2.--3. "BRDV3,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x20 1. "CPOL3,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x20 0. "CPHA3,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x24 "SPCMD4,RSPI Command Register 4" hexmask.long.byte 0x24 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x24 24.--26. "SSLA4,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x24 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--20. 1. "SPB4,RSPI data length setting bit" newline bitfld.long 0x24 15. "SCKDEN4,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x24 14. "SLNDEN4,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x24 13. "SPNDEN4,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x24 12. "LSBF4,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x24 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x24 7. "SSLKP4,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x24 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x24 2.--3. "BRDV4,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x24 1. "CPOL4,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x24 0. "CPHA4,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x28 "SPCMD5,RSPI Command Register 5" hexmask.long.byte 0x28 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x28 24.--26. "SSLA5,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x28 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x28 16.--20. 1. "SPB5,RSPI data length setting bit" newline bitfld.long 0x28 15. "SCKDEN5,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x28 14. "SLNDEN5,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x28 13. "SPNDEN5,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x28 12. "LSBF5,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x28 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 7. "SSLKP5,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x28 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x28 2.--3. "BRDV5,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x28 1. "CPOL5,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x28 0. "CPHA5,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x2C "SPCMD6,RSPI Command Register 6" hexmask.long.byte 0x2C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x2C 24.--26. "SSLA6,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x2C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x2C 16.--20. 1. "SPB6,RSPI data length setting bit" newline bitfld.long 0x2C 15. "SCKDEN6,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x2C 14. "SLNDEN6,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x2C 13. "SPNDEN6,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x2C 12. "LSBF6,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x2C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 7. "SSLKP6,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x2C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2.--3. "BRDV6,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x2C 1. "CPOL6,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x2C 0. "CPHA6,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x30 "SPCMD7,RSPI Command Register 7" hexmask.long.byte 0x30 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x30 24.--26. "SSLA7,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x30 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x30 16.--20. 1. "SPB7,RSPI data length setting bit" newline bitfld.long 0x30 15. "SCKDEN7,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x30 14. "SLNDEN7,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x30 13. "SPNDEN7,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x30 12. "LSBF7,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x30 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x30 7. "SSLKP7,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x30 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x30 2.--3. "BRDV7,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x30 1. "CPOL7,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x30 0. "CPHA7,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.long 0x40++0x7 line.long 0x0 "SPDCR,RSPI Data Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "SPFC,Frame number setting bit" "0: 1 frame,1: 2 frames,?,?" bitfld.long 0x0 7. "SPWRAL,RSPI write test mode" "0: Data is stored in one buffer by one writing..,1: Data is stored in all buffers by one writing.." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 4. "SINV,Serial data invert" "0: Not invert serial data,1: Invert serial data." newline bitfld.long 0x0 3. "SPRDTD,RSPI Receive/Transmit Data Select" "0: Read SPDR/SPDR_HA/SPDR_BY values from receive..,1: Read SPDR/SPDR_HA/SPDR_BY values from transmit.." bitfld.long 0x0 1.--2. "SLSEL,SSl Pin Output Specification(In the multi master mode (MODFEN=1) SSL0 (output) is disabled.)" "0: SSL0(output) is enabled / SSL1(output) is..,1: SSL0(output) is enabled / SSL1(output) is..,?,?" newline bitfld.long 0x0 0. "BYSW,Byte Swap Operating Mode Select" "0: Byte Swap OFF,1: Byte Swap ON." line.long 0x4 "SPDCR2,RSPI Data Control Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 8.--9. "TTRG,Transmission FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 0.--1. "RTRG,Receive FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" rgroup.long 0x50++0x3 line.long 0x0 "SPSR,RSPI Status Register" bitfld.long 0x0 31. "SPRF,Receive buffer full flag(Initial value: 1'b0)" "0: No valid data in the receive buffer,1: Valid data in the receive buffer" bitfld.long 0x0 30. "CENDF,Communication complete flag(Initial value: 1'b0)" "0: SPI is not communicating or communicating,1: SPI communication completed" newline bitfld.long 0x0 29. "SPTEF,Send bufferEmpty flag(Initial value: 1'b0)" "0: Data is in the transmit buffer,1: No data is in the transmit buffer" bitfld.long 0x0 28. "UDRF,Underrun Error Flag(This bit is invalid when MODF flag is 0.)" "0: -: No mode fault error or underrun error,?" newline bitfld.long 0x0 27. "PERF,Parity error flag(Initial value: 1'b0)" "0: No parity error occurred,1: Parity error occurred" bitfld.long 0x0 26. "MODF,Mode fault error(Initial value: 1'b0)" "0: No mode fault or underrun error occurred,1: Mode fault error or underrun error occurred" newline bitfld.long 0x0 25. "IDLNF,RSPI Idle Flag" "0: RSPI is in the idle state,1: RSPI is in the transfer state" bitfld.long 0x0 24. "OVRF,Overrun error flag(Initial value: 1'b0)" "0: No overrun error occurred,1: Overrun error occurred" newline bitfld.long 0x0 23. "SPDRF,Receive data delay flag" "0: It is Receiving now or Rx FIFO is read all data..,1: Receive data is less than threshold and Next.." hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 12.--14. "SPECM,RSPI Error Command" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 8.--10. "SPCP,RSPI Command Pointer" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.long 0x58++0xB line.long 0x0 "SPTFSR,RSPI transmit FIFO status register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 0.--2. "TFDN,Transmit FIFO data empty stage indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x4 "SPRFSR,RSPI receive FIFO status register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x4 0.--2. "RFDN,Receive FIFO data storage stage number indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x8 "SPPSR,RSPI Poling status regster" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x8 1.--15. 1. "Reserved,These bits are read as 000000000000000." newline bitfld.long 0x8 0. "SPEPS,SPE poling status regster" "0,1" group.long 0x68++0x7 line.long 0x0 "SPSRC,RSPI Status Clear Register" bitfld.long 0x0 31. "SPRFC,Clear receive buffer full flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 30. "CENDFC,Clear communication complete flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 29. "SPTEFC,Send bufferEmpty flag clear(Initial value: 1'b0)" "0,1" bitfld.long 0x0 28. "UDRFC,Underrun error flag clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 27. "PERFC,Clear parity error flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 26. "MODFC,Mode fault error clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "OVRFC,Clear overrun error flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 23. "SPDRFC,Rx data ready flag clear bit" "0,1" hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "SPFCR,RSPI FIFO clear register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "SPFRST,RSPI FIFO clear bit" "0,1" tree.end tree "SPI0_NS" base ad:0x5035C000 group.long 0x0++0x33 line.long 0x0 "SPDR,RSPI Data Register" hexmask.long 0x0 0.--31. 1. "SPD,SPDR is the interface with the buffers that hold data for transmission and reception by the SPI.When accessing in word (SPDCR.SPBYT=0 and SPDCR.SPLW=1) access SPDR." line.long 0x4 "SPDECR,RSPI Delay Control Register" bitfld.long 0x4 31. "ASLPEN,Receive sampling timing loopback adjustment function selection bit(Private)" "0: Receive sampling timing loopback adjustment..,1: Receive sampling timing loopback adjustment.." hexmask.long.byte 0x4 27.--30. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 24.--26. "ARST,Adjust receive sampling by delaying 0 to 4 TCLK from the center of bit." "0: 0 TCLK delay,1: 1 TCLK delay,?,?,?,?,?,?" hexmask.long.byte 0x4 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 16.--18. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 TCLK,1: 2 RSPCK + 2 TCLK,?,?,?,?,?,?" hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 8.--10. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 0.--2. "SCKDL,RSPCK Delay setting bit" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" line.long 0x8 "SPCR,RSPI Control Register" bitfld.long 0x8 31. "BPEN,Synchronization circuit bypass enable bit" "0: Non-bypass,1: Bypass" bitfld.long 0x8 30. "MSTR,RSPI Master/Slave Mode Select" "0: Select slave mode,1: Select master mode." newline bitfld.long 0x8 28.--29. "TXMD,Communications Operating Mode Select" "0: Transmission / reception serial communication,1: Transmission only,?,?" bitfld.long 0x8 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x8 25. "SPFRF,RSPI frame format selection bit(Initial value: 1'b0)" "0: Motorola SPI,1: TI SSP '" bitfld.long 0x8 24. "SPMS,RSPI Mode Select" "0: Select RSPI operation (4-wire method),1: Select clock synchronous operation (3-wire.." newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x8 21. "CENDIE,RSPI Communication End Interrupt Enable" "0: Disable communication end interrupt request,1: Enable communication end interrupt request." newline bitfld.long 0x8 20. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disable transmit buffer empty interrupt requests,1: Enable transmit buffer empty interrupt requests." bitfld.long 0x8 19. "SPDRES,Receive data ready error select bit" "0: Receive data full interrupt,1: Error interrupt." newline bitfld.long 0x8 18. "SPIIE,RSPI Idle Interrupt Enable" "0: Disable idle interrupt requests,1: Enable idle interrupt requests." bitfld.long 0x8 17. "SPRIE,RSPI Receive Buffer Full Interrupt Enable" "0: Disable RSPI receive buffer full interrupt..,1: Enable RSPI receive buffer full interrupt.." newline bitfld.long 0x8 16. "SPEIE,RSPI Error Interrupt Enable" "0: Disable RSPI error interrupt requests,1: Enable RSPI error interrupt requests." bitfld.long 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x8 14. "MODFEN,Mode Fault Error Detection Enable" "0: Disable detection of mode fault errors,1: Enable detection of mode fault errors." bitfld.long 0x8 13. "BFDS,Delay Selection Bit between frames for Burst Transfer" "0: Delay (RSPCK delay SSL negation delay and..,1: Delay between frames is not inserted in burst.." newline bitfld.long 0x8 12. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disable RSPCK auto-stop function,1: Enable RSPCK auto-stop function." bitfld.long 0x8 11. "PTE,Parity Self-Testing" "0: Disable self-diagnosis function of the parity..,1: Enable self-diagnosis function of the parity.." newline bitfld.long 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 9. "SPOE,Parity Mode" "0: Select even parity for transmission and reception,1: Select odd parity for transmission and reception." newline bitfld.long 0x8 8. "SPPE,Parity Enable" "0: Do not add parity bit to transmit data and do..,1: Add parity bit to transmit data and check parity.." bitfld.long 0x8 7. "SPSCKSEL,RSPI master receive clock select bit" "0: MRIOCLK selection (analog delay adjustment),1: MRCLK selection (digital delay adjustment)" newline bitfld.long 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 4.--5. "SPTICK,TI SSP clock format control bit" "0: Default (no additional clock is output after the..,1: Output 1RSPCK additionally after the last data,?,?" newline bitfld.long 0x8 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "SPE,RSPI Function Enable" "0: Disable RSPI function,1: Enable RSPI function." line.long 0xC "SPCR2,RSPI Control Register 2" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 28.--30. "SPTDDL,RSPI transmit data delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 24.--26. "SPSCKDL,RSPI master receive clock analog delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0xC 21. "MOIFE,MOSI Idle Value Fixing Enable" "0: Set MOSI output value to equal final data from..,1: Set MOSI output value to equal value set in the.." newline bitfld.long 0xC 20. "MOIFV,MOSI Idle Fixed Value" "0: Set level output on MOSIn pin during MOSI idling..,1: Set level output on MOSIn pin during MOSI idling.." bitfld.long 0xC 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 18. "SPOM,RSPI Output Pin Mode Select" "0: CMOS output,1: Open-drain output" bitfld.long 0xC 17. "SPLP2,RSPI Loopback 2" "0: Normal mode,1: Loopback mode (data is not inverted for.." newline bitfld.long 0xC 16. "SPLP,RSPI Loopback" "0: Normal mode,1: Loopback mode (data is inverted for transmission)" hexmask.long.byte 0xC 8.--15. 1. "SPDRC,RSPI Receive data ready detection adjustment bit" newline bitfld.long 0xC 7. "RMSTTG,Reception only master start bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." bitfld.long 0xC 6. "RMEDTG,Reception only master end bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." newline bitfld.long 0xC 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0xC 0.--4. 1. "RMFM,Receive-only master frame processing count setting bit" line.long 0x10 "SPCR3,RSPI Control Register 3" hexmask.long.byte 0x10 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x10 24.--26. "SPSLN,RSPI sequence length setting bit" "0: Sequence Length 1 SPDMDx x = 0->0->...,1: Sequence Length 2 SPDMDx x = 0->1->0->...,?,?,?,?,?,?" newline hexmask.long.byte 0x10 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x10 8.--15. 1. "SPR,SPBR sets the bit rate in master mode." newline bitfld.long 0x10 7. "SSL7P,SSL7 Signal Polarity Setting" "0: Set SSL7 signal to active low,1: Set SSL7 signal to active high." bitfld.long 0x10 6. "SSL6P,SSL6 Signal Polarity Setting" "0: Set SSL6 signal to active low,1: Set SSL6 signal to active high." newline bitfld.long 0x10 5. "SSL5P,SSL5 Signal Polarity Setting" "0: Set SSL5 signal to active low,1: Set SSL5 signal to active high." bitfld.long 0x10 4. "SSL4P,SSL4 Signal Polarity Setting" "0: Set SSL4 signal to active low,1: Set SSL4 signal to active high." newline bitfld.long 0x10 3. "SSL3P,SSL3 Signal Polarity Setting" "0: Set SSL3 signal to active low,1: Set SSL3 signal to active high." bitfld.long 0x10 2. "SSL2P,SSL2 Signal Polarity Setting" "0: Set SSL2 signal to active low,1: Set SSL2 signal to active high." newline bitfld.long 0x10 1. "SSL1P,SSL1 Signal Polarity Setting" "0: Set SSL1 signal to active low,1: Set SSL1 signal to active high." bitfld.long 0x10 0. "SSL0P,SSL0 Signal Polarity Setting" "0: Set SSL0 signal to active low,1: Set SSL0 signal to active high." line.long 0x14 "SPCMD0,RSPI Command Register 0" hexmask.long.byte 0x14 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x14 24.--26. "SSLA0,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x14 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x14 16.--20. 1. "SPB0,RSPI data length setting bit" newline bitfld.long 0x14 15. "SCKDEN0,RSPCK Delay Setting Enable" "0: Motolora SPI: RSPCK delay is 1RSPCK,1: RSPCK delay is the value of the RSPCK delay.." bitfld.long 0x14 14. "SLNDEN0,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x14 13. "SPNDEN0,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x14 12. "LSBF0,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x14 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x14 7. "SSLKP0,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x14 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x14 2.--3. "BRDV0,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x14 1. "CPOL0,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x14 0. "CPHA0,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x18 "SPCMD1,RSPI Command Register 1" hexmask.long.byte 0x18 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x18 24.--26. "SSLA1,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x18 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 16.--20. 1. "SPB1,RSPI data length setting bit" newline bitfld.long 0x18 15. "SCKDEN1,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x18 14. "SLNDEN1,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x18 13. "SPNDEN1,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x18 12. "LSBF1,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x18 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 7. "SSLKP1,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x18 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x18 2.--3. "BRDV1,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x18 1. "CPOL1,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x18 0. "CPHA1,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x1C "SPCMD2,RSPI Command Register 2" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 24.--26. "SSLA2,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x1C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 16.--20. 1. "SPB2,RSPI data length setting bit" newline bitfld.long 0x1C 15. "SCKDEN2,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x1C 14. "SLNDEN2,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x1C 13. "SPNDEN2,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x1C 12. "LSBF2,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x1C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 7. "SSLKP2,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x1C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2.--3. "BRDV2,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x1C 1. "CPOL2,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x1C 0. "CPHA2,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x20 "SPCMD3,RSPI Command Register 3" hexmask.long.byte 0x20 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x20 24.--26. "SSLA3,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x20 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x20 16.--20. 1. "SPB3,RSPI data length setting bit" newline bitfld.long 0x20 15. "SCKDEN3,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x20 14. "SLNDEN3,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x20 13. "SPNDEN3,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x20 12. "LSBF3,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x20 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 7. "SSLKP3,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x20 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x20 2.--3. "BRDV3,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x20 1. "CPOL3,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x20 0. "CPHA3,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x24 "SPCMD4,RSPI Command Register 4" hexmask.long.byte 0x24 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x24 24.--26. "SSLA4,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x24 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--20. 1. "SPB4,RSPI data length setting bit" newline bitfld.long 0x24 15. "SCKDEN4,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x24 14. "SLNDEN4,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x24 13. "SPNDEN4,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x24 12. "LSBF4,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x24 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x24 7. "SSLKP4,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x24 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x24 2.--3. "BRDV4,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x24 1. "CPOL4,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x24 0. "CPHA4,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x28 "SPCMD5,RSPI Command Register 5" hexmask.long.byte 0x28 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x28 24.--26. "SSLA5,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x28 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x28 16.--20. 1. "SPB5,RSPI data length setting bit" newline bitfld.long 0x28 15. "SCKDEN5,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x28 14. "SLNDEN5,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x28 13. "SPNDEN5,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x28 12. "LSBF5,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x28 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 7. "SSLKP5,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x28 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x28 2.--3. "BRDV5,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x28 1. "CPOL5,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x28 0. "CPHA5,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x2C "SPCMD6,RSPI Command Register 6" hexmask.long.byte 0x2C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x2C 24.--26. "SSLA6,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x2C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x2C 16.--20. 1. "SPB6,RSPI data length setting bit" newline bitfld.long 0x2C 15. "SCKDEN6,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x2C 14. "SLNDEN6,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x2C 13. "SPNDEN6,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x2C 12. "LSBF6,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x2C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 7. "SSLKP6,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x2C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2.--3. "BRDV6,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x2C 1. "CPOL6,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x2C 0. "CPHA6,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x30 "SPCMD7,RSPI Command Register 7" hexmask.long.byte 0x30 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x30 24.--26. "SSLA7,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x30 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x30 16.--20. 1. "SPB7,RSPI data length setting bit" newline bitfld.long 0x30 15. "SCKDEN7,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x30 14. "SLNDEN7,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x30 13. "SPNDEN7,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x30 12. "LSBF7,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x30 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x30 7. "SSLKP7,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x30 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x30 2.--3. "BRDV7,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x30 1. "CPOL7,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x30 0. "CPHA7,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.long 0x40++0x7 line.long 0x0 "SPDCR,RSPI Data Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "SPFC,Frame number setting bit" "0: 1 frame,1: 2 frames,?,?" bitfld.long 0x0 7. "SPWRAL,RSPI write test mode" "0: Data is stored in one buffer by one writing..,1: Data is stored in all buffers by one writing.." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 4. "SINV,Serial data invert" "0: Not invert serial data,1: Invert serial data." newline bitfld.long 0x0 3. "SPRDTD,RSPI Receive/Transmit Data Select" "0: Read SPDR/SPDR_HA/SPDR_BY values from receive..,1: Read SPDR/SPDR_HA/SPDR_BY values from transmit.." bitfld.long 0x0 1.--2. "SLSEL,SSl Pin Output Specification(In the multi master mode (MODFEN=1) SSL0 (output) is disabled.)" "0: SSL0(output) is enabled / SSL1(output) is..,1: SSL0(output) is enabled / SSL1(output) is..,?,?" newline bitfld.long 0x0 0. "BYSW,Byte Swap Operating Mode Select" "0: Byte Swap OFF,1: Byte Swap ON." line.long 0x4 "SPDCR2,RSPI Data Control Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 8.--9. "TTRG,Transmission FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 0.--1. "RTRG,Receive FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" rgroup.long 0x50++0x3 line.long 0x0 "SPSR,RSPI Status Register" bitfld.long 0x0 31. "SPRF,Receive buffer full flag(Initial value: 1'b0)" "0: No valid data in the receive buffer,1: Valid data in the receive buffer" bitfld.long 0x0 30. "CENDF,Communication complete flag(Initial value: 1'b0)" "0: SPI is not communicating or communicating,1: SPI communication completed" newline bitfld.long 0x0 29. "SPTEF,Send bufferEmpty flag(Initial value: 1'b0)" "0: Data is in the transmit buffer,1: No data is in the transmit buffer" bitfld.long 0x0 28. "UDRF,Underrun Error Flag(This bit is invalid when MODF flag is 0.)" "0: -: No mode fault error or underrun error,?" newline bitfld.long 0x0 27. "PERF,Parity error flag(Initial value: 1'b0)" "0: No parity error occurred,1: Parity error occurred" bitfld.long 0x0 26. "MODF,Mode fault error(Initial value: 1'b0)" "0: No mode fault or underrun error occurred,1: Mode fault error or underrun error occurred" newline bitfld.long 0x0 25. "IDLNF,RSPI Idle Flag" "0: RSPI is in the idle state,1: RSPI is in the transfer state" bitfld.long 0x0 24. "OVRF,Overrun error flag(Initial value: 1'b0)" "0: No overrun error occurred,1: Overrun error occurred" newline bitfld.long 0x0 23. "SPDRF,Receive data delay flag" "0: It is Receiving now or Rx FIFO is read all data..,1: Receive data is less than threshold and Next.." hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 12.--14. "SPECM,RSPI Error Command" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 8.--10. "SPCP,RSPI Command Pointer" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.long 0x58++0xB line.long 0x0 "SPTFSR,RSPI transmit FIFO status register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 0.--2. "TFDN,Transmit FIFO data empty stage indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x4 "SPRFSR,RSPI receive FIFO status register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x4 0.--2. "RFDN,Receive FIFO data storage stage number indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x8 "SPPSR,RSPI Poling status regster" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x8 1.--15. 1. "Reserved,These bits are read as 000000000000000." newline bitfld.long 0x8 0. "SPEPS,SPE poling status regster" "0,1" group.long 0x68++0x7 line.long 0x0 "SPSRC,RSPI Status Clear Register" bitfld.long 0x0 31. "SPRFC,Clear receive buffer full flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 30. "CENDFC,Clear communication complete flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 29. "SPTEFC,Send bufferEmpty flag clear(Initial value: 1'b0)" "0,1" bitfld.long 0x0 28. "UDRFC,Underrun error flag clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 27. "PERFC,Clear parity error flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 26. "MODFC,Mode fault error clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "OVRFC,Clear overrun error flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 23. "SPDRFC,Rx data ready flag clear bit" "0,1" hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "SPFCR,RSPI FIFO clear register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "SPFRST,RSPI FIFO clear bit" "0,1" tree.end tree "SPI1" base ad:0x4035C100 group.long 0x0++0x33 line.long 0x0 "SPDR,RSPI Data Register" hexmask.long 0x0 0.--31. 1. "SPD,SPDR is the interface with the buffers that hold data for transmission and reception by the SPI.When accessing in word (SPDCR.SPBYT=0 and SPDCR.SPLW=1) access SPDR." line.long 0x4 "SPDECR,RSPI Delay Control Register" bitfld.long 0x4 31. "ASLPEN,Receive sampling timing loopback adjustment function selection bit(Private)" "0: Receive sampling timing loopback adjustment..,1: Receive sampling timing loopback adjustment.." hexmask.long.byte 0x4 27.--30. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 24.--26. "ARST,Adjust receive sampling by delaying 0 to 4 TCLK from the center of bit." "0: 0 TCLK delay,1: 1 TCLK delay,?,?,?,?,?,?" hexmask.long.byte 0x4 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 16.--18. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 TCLK,1: 2 RSPCK + 2 TCLK,?,?,?,?,?,?" hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 8.--10. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 0.--2. "SCKDL,RSPCK Delay setting bit" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" line.long 0x8 "SPCR,RSPI Control Register" bitfld.long 0x8 31. "BPEN,Synchronization circuit bypass enable bit" "0: Non-bypass,1: Bypass" bitfld.long 0x8 30. "MSTR,RSPI Master/Slave Mode Select" "0: Select slave mode,1: Select master mode." newline bitfld.long 0x8 28.--29. "TXMD,Communications Operating Mode Select" "0: Transmission / reception serial communication,1: Transmission only,?,?" bitfld.long 0x8 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x8 25. "SPFRF,RSPI frame format selection bit(Initial value: 1'b0)" "0: Motorola SPI,1: TI SSP '" bitfld.long 0x8 24. "SPMS,RSPI Mode Select" "0: Select RSPI operation (4-wire method),1: Select clock synchronous operation (3-wire.." newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x8 21. "CENDIE,RSPI Communication End Interrupt Enable" "0: Disable communication end interrupt request,1: Enable communication end interrupt request." newline bitfld.long 0x8 20. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disable transmit buffer empty interrupt requests,1: Enable transmit buffer empty interrupt requests." bitfld.long 0x8 19. "SPDRES,Receive data ready error select bit" "0: Receive data full interrupt,1: Error interrupt." newline bitfld.long 0x8 18. "SPIIE,RSPI Idle Interrupt Enable" "0: Disable idle interrupt requests,1: Enable idle interrupt requests." bitfld.long 0x8 17. "SPRIE,RSPI Receive Buffer Full Interrupt Enable" "0: Disable RSPI receive buffer full interrupt..,1: Enable RSPI receive buffer full interrupt.." newline bitfld.long 0x8 16. "SPEIE,RSPI Error Interrupt Enable" "0: Disable RSPI error interrupt requests,1: Enable RSPI error interrupt requests." bitfld.long 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x8 14. "MODFEN,Mode Fault Error Detection Enable" "0: Disable detection of mode fault errors,1: Enable detection of mode fault errors." bitfld.long 0x8 13. "BFDS,Delay Selection Bit between frames for Burst Transfer" "0: Delay (RSPCK delay SSL negation delay and..,1: Delay between frames is not inserted in burst.." newline bitfld.long 0x8 12. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disable RSPCK auto-stop function,1: Enable RSPCK auto-stop function." bitfld.long 0x8 11. "PTE,Parity Self-Testing" "0: Disable self-diagnosis function of the parity..,1: Enable self-diagnosis function of the parity.." newline bitfld.long 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 9. "SPOE,Parity Mode" "0: Select even parity for transmission and reception,1: Select odd parity for transmission and reception." newline bitfld.long 0x8 8. "SPPE,Parity Enable" "0: Do not add parity bit to transmit data and do..,1: Add parity bit to transmit data and check parity.." bitfld.long 0x8 7. "SPSCKSEL,RSPI master receive clock select bit" "0: MRIOCLK selection (analog delay adjustment),1: MRCLK selection (digital delay adjustment)" newline bitfld.long 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 4.--5. "SPTICK,TI SSP clock format control bit" "0: Default (no additional clock is output after the..,1: Output 1RSPCK additionally after the last data,?,?" newline bitfld.long 0x8 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "SPE,RSPI Function Enable" "0: Disable RSPI function,1: Enable RSPI function." line.long 0xC "SPCR2,RSPI Control Register 2" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 28.--30. "SPTDDL,RSPI transmit data delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 24.--26. "SPSCKDL,RSPI master receive clock analog delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0xC 21. "MOIFE,MOSI Idle Value Fixing Enable" "0: Set MOSI output value to equal final data from..,1: Set MOSI output value to equal value set in the.." newline bitfld.long 0xC 20. "MOIFV,MOSI Idle Fixed Value" "0: Set level output on MOSIn pin during MOSI idling..,1: Set level output on MOSIn pin during MOSI idling.." bitfld.long 0xC 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 18. "SPOM,RSPI Output Pin Mode Select" "0: CMOS output,1: Open-drain output" bitfld.long 0xC 17. "SPLP2,RSPI Loopback 2" "0: Normal mode,1: Loopback mode (data is not inverted for.." newline bitfld.long 0xC 16. "SPLP,RSPI Loopback" "0: Normal mode,1: Loopback mode (data is inverted for transmission)" hexmask.long.byte 0xC 8.--15. 1. "SPDRC,RSPI Receive data ready detection adjustment bit" newline bitfld.long 0xC 7. "RMSTTG,Reception only master start bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." bitfld.long 0xC 6. "RMEDTG,Reception only master end bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." newline bitfld.long 0xC 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0xC 0.--4. 1. "RMFM,Receive-only master frame processing count setting bit" line.long 0x10 "SPCR3,RSPI Control Register 3" hexmask.long.byte 0x10 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x10 24.--26. "SPSLN,RSPI sequence length setting bit" "0: Sequence Length 1 SPDMDx x = 0->0->...,1: Sequence Length 2 SPDMDx x = 0->1->0->...,?,?,?,?,?,?" newline hexmask.long.byte 0x10 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x10 8.--15. 1. "SPR,SPBR sets the bit rate in master mode." newline bitfld.long 0x10 7. "SSL7P,SSL7 Signal Polarity Setting" "0: Set SSL7 signal to active low,1: Set SSL7 signal to active high." bitfld.long 0x10 6. "SSL6P,SSL6 Signal Polarity Setting" "0: Set SSL6 signal to active low,1: Set SSL6 signal to active high." newline bitfld.long 0x10 5. "SSL5P,SSL5 Signal Polarity Setting" "0: Set SSL5 signal to active low,1: Set SSL5 signal to active high." bitfld.long 0x10 4. "SSL4P,SSL4 Signal Polarity Setting" "0: Set SSL4 signal to active low,1: Set SSL4 signal to active high." newline bitfld.long 0x10 3. "SSL3P,SSL3 Signal Polarity Setting" "0: Set SSL3 signal to active low,1: Set SSL3 signal to active high." bitfld.long 0x10 2. "SSL2P,SSL2 Signal Polarity Setting" "0: Set SSL2 signal to active low,1: Set SSL2 signal to active high." newline bitfld.long 0x10 1. "SSL1P,SSL1 Signal Polarity Setting" "0: Set SSL1 signal to active low,1: Set SSL1 signal to active high." bitfld.long 0x10 0. "SSL0P,SSL0 Signal Polarity Setting" "0: Set SSL0 signal to active low,1: Set SSL0 signal to active high." line.long 0x14 "SPCMD0,RSPI Command Register 0" hexmask.long.byte 0x14 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x14 24.--26. "SSLA0,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x14 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x14 16.--20. 1. "SPB0,RSPI data length setting bit" newline bitfld.long 0x14 15. "SCKDEN0,RSPCK Delay Setting Enable" "0: Motolora SPI: RSPCK delay is 1RSPCK,1: RSPCK delay is the value of the RSPCK delay.." bitfld.long 0x14 14. "SLNDEN0,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x14 13. "SPNDEN0,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x14 12. "LSBF0,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x14 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x14 7. "SSLKP0,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x14 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x14 2.--3. "BRDV0,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x14 1. "CPOL0,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x14 0. "CPHA0,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x18 "SPCMD1,RSPI Command Register 1" hexmask.long.byte 0x18 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x18 24.--26. "SSLA1,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x18 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 16.--20. 1. "SPB1,RSPI data length setting bit" newline bitfld.long 0x18 15. "SCKDEN1,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x18 14. "SLNDEN1,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x18 13. "SPNDEN1,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x18 12. "LSBF1,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x18 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 7. "SSLKP1,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x18 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x18 2.--3. "BRDV1,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x18 1. "CPOL1,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x18 0. "CPHA1,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x1C "SPCMD2,RSPI Command Register 2" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 24.--26. "SSLA2,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x1C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 16.--20. 1. "SPB2,RSPI data length setting bit" newline bitfld.long 0x1C 15. "SCKDEN2,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x1C 14. "SLNDEN2,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x1C 13. "SPNDEN2,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x1C 12. "LSBF2,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x1C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 7. "SSLKP2,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x1C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2.--3. "BRDV2,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x1C 1. "CPOL2,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x1C 0. "CPHA2,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x20 "SPCMD3,RSPI Command Register 3" hexmask.long.byte 0x20 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x20 24.--26. "SSLA3,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x20 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x20 16.--20. 1. "SPB3,RSPI data length setting bit" newline bitfld.long 0x20 15. "SCKDEN3,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x20 14. "SLNDEN3,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x20 13. "SPNDEN3,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x20 12. "LSBF3,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x20 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 7. "SSLKP3,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x20 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x20 2.--3. "BRDV3,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x20 1. "CPOL3,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x20 0. "CPHA3,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x24 "SPCMD4,RSPI Command Register 4" hexmask.long.byte 0x24 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x24 24.--26. "SSLA4,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x24 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--20. 1. "SPB4,RSPI data length setting bit" newline bitfld.long 0x24 15. "SCKDEN4,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x24 14. "SLNDEN4,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x24 13. "SPNDEN4,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x24 12. "LSBF4,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x24 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x24 7. "SSLKP4,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x24 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x24 2.--3. "BRDV4,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x24 1. "CPOL4,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x24 0. "CPHA4,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x28 "SPCMD5,RSPI Command Register 5" hexmask.long.byte 0x28 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x28 24.--26. "SSLA5,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x28 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x28 16.--20. 1. "SPB5,RSPI data length setting bit" newline bitfld.long 0x28 15. "SCKDEN5,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x28 14. "SLNDEN5,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x28 13. "SPNDEN5,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x28 12. "LSBF5,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x28 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 7. "SSLKP5,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x28 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x28 2.--3. "BRDV5,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x28 1. "CPOL5,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x28 0. "CPHA5,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x2C "SPCMD6,RSPI Command Register 6" hexmask.long.byte 0x2C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x2C 24.--26. "SSLA6,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x2C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x2C 16.--20. 1. "SPB6,RSPI data length setting bit" newline bitfld.long 0x2C 15. "SCKDEN6,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x2C 14. "SLNDEN6,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x2C 13. "SPNDEN6,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x2C 12. "LSBF6,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x2C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 7. "SSLKP6,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x2C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2.--3. "BRDV6,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x2C 1. "CPOL6,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x2C 0. "CPHA6,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x30 "SPCMD7,RSPI Command Register 7" hexmask.long.byte 0x30 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x30 24.--26. "SSLA7,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x30 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x30 16.--20. 1. "SPB7,RSPI data length setting bit" newline bitfld.long 0x30 15. "SCKDEN7,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x30 14. "SLNDEN7,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x30 13. "SPNDEN7,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x30 12. "LSBF7,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x30 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x30 7. "SSLKP7,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x30 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x30 2.--3. "BRDV7,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x30 1. "CPOL7,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x30 0. "CPHA7,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.long 0x40++0x7 line.long 0x0 "SPDCR,RSPI Data Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "SPFC,Frame number setting bit" "0: 1 frame,1: 2 frames,?,?" bitfld.long 0x0 7. "SPWRAL,RSPI write test mode" "0: Data is stored in one buffer by one writing..,1: Data is stored in all buffers by one writing.." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 4. "SINV,Serial data invert" "0: Not invert serial data,1: Invert serial data." newline bitfld.long 0x0 3. "SPRDTD,RSPI Receive/Transmit Data Select" "0: Read SPDR/SPDR_HA/SPDR_BY values from receive..,1: Read SPDR/SPDR_HA/SPDR_BY values from transmit.." bitfld.long 0x0 1.--2. "SLSEL,SSl Pin Output Specification(In the multi master mode (MODFEN=1) SSL0 (output) is disabled.)" "0: SSL0(output) is enabled / SSL1(output) is..,1: SSL0(output) is enabled / SSL1(output) is..,?,?" newline bitfld.long 0x0 0. "BYSW,Byte Swap Operating Mode Select" "0: Byte Swap OFF,1: Byte Swap ON." line.long 0x4 "SPDCR2,RSPI Data Control Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 8.--9. "TTRG,Transmission FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 0.--1. "RTRG,Receive FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" rgroup.long 0x50++0x3 line.long 0x0 "SPSR,RSPI Status Register" bitfld.long 0x0 31. "SPRF,Receive buffer full flag(Initial value: 1'b0)" "0: No valid data in the receive buffer,1: Valid data in the receive buffer" bitfld.long 0x0 30. "CENDF,Communication complete flag(Initial value: 1'b0)" "0: SPI is not communicating or communicating,1: SPI communication completed" newline bitfld.long 0x0 29. "SPTEF,Send bufferEmpty flag(Initial value: 1'b0)" "0: Data is in the transmit buffer,1: No data is in the transmit buffer" bitfld.long 0x0 28. "UDRF,Underrun Error Flag(This bit is invalid when MODF flag is 0.)" "0: -: No mode fault error or underrun error,?" newline bitfld.long 0x0 27. "PERF,Parity error flag(Initial value: 1'b0)" "0: No parity error occurred,1: Parity error occurred" bitfld.long 0x0 26. "MODF,Mode fault error(Initial value: 1'b0)" "0: No mode fault or underrun error occurred,1: Mode fault error or underrun error occurred" newline bitfld.long 0x0 25. "IDLNF,RSPI Idle Flag" "0: RSPI is in the idle state,1: RSPI is in the transfer state" bitfld.long 0x0 24. "OVRF,Overrun error flag(Initial value: 1'b0)" "0: No overrun error occurred,1: Overrun error occurred" newline bitfld.long 0x0 23. "SPDRF,Receive data delay flag" "0: It is Receiving now or Rx FIFO is read all data..,1: Receive data is less than threshold and Next.." hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 12.--14. "SPECM,RSPI Error Command" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 8.--10. "SPCP,RSPI Command Pointer" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.long 0x58++0xB line.long 0x0 "SPTFSR,RSPI transmit FIFO status register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 0.--2. "TFDN,Transmit FIFO data empty stage indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x4 "SPRFSR,RSPI receive FIFO status register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x4 0.--2. "RFDN,Receive FIFO data storage stage number indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x8 "SPPSR,RSPI Poling status regster" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x8 1.--15. 1. "Reserved,These bits are read as 000000000000000." newline bitfld.long 0x8 0. "SPEPS,SPE poling status regster" "0,1" group.long 0x68++0x7 line.long 0x0 "SPSRC,RSPI Status Clear Register" bitfld.long 0x0 31. "SPRFC,Clear receive buffer full flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 30. "CENDFC,Clear communication complete flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 29. "SPTEFC,Send bufferEmpty flag clear(Initial value: 1'b0)" "0,1" bitfld.long 0x0 28. "UDRFC,Underrun error flag clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 27. "PERFC,Clear parity error flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 26. "MODFC,Mode fault error clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "OVRFC,Clear overrun error flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 23. "SPDRFC,Rx data ready flag clear bit" "0,1" hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "SPFCR,RSPI FIFO clear register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "SPFRST,RSPI FIFO clear bit" "0,1" tree.end tree "SPI1_NS" base ad:0x5035C100 group.long 0x0++0x33 line.long 0x0 "SPDR,RSPI Data Register" hexmask.long 0x0 0.--31. 1. "SPD,SPDR is the interface with the buffers that hold data for transmission and reception by the SPI.When accessing in word (SPDCR.SPBYT=0 and SPDCR.SPLW=1) access SPDR." line.long 0x4 "SPDECR,RSPI Delay Control Register" bitfld.long 0x4 31. "ASLPEN,Receive sampling timing loopback adjustment function selection bit(Private)" "0: Receive sampling timing loopback adjustment..,1: Receive sampling timing loopback adjustment.." hexmask.long.byte 0x4 27.--30. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 24.--26. "ARST,Adjust receive sampling by delaying 0 to 4 TCLK from the center of bit." "0: 0 TCLK delay,1: 1 TCLK delay,?,?,?,?,?,?" hexmask.long.byte 0x4 19.--23. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 16.--18. "SPNDL,SPI Next-Access Delay Setting" "0: 1 RSPCK + 2 TCLK,1: 2 RSPCK + 2 TCLK,?,?,?,?,?,?" hexmask.long.byte 0x4 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 8.--10. "SLNDL,SSL Negation Delay Setting" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.long 0x4 0.--2. "SCKDL,RSPCK Delay setting bit" "0: 1 RSPCK,1: 2 RSPCK,?,?,?,?,?,?" line.long 0x8 "SPCR,RSPI Control Register" bitfld.long 0x8 31. "BPEN,Synchronization circuit bypass enable bit" "0: Non-bypass,1: Bypass" bitfld.long 0x8 30. "MSTR,RSPI Master/Slave Mode Select" "0: Select slave mode,1: Select master mode." newline bitfld.long 0x8 28.--29. "TXMD,Communications Operating Mode Select" "0: Transmission / reception serial communication,1: Transmission only,?,?" bitfld.long 0x8 26.--27. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x8 25. "SPFRF,RSPI frame format selection bit(Initial value: 1'b0)" "0: Motorola SPI,1: TI SSP '" bitfld.long 0x8 24. "SPMS,RSPI Mode Select" "0: Select RSPI operation (4-wire method),1: Select clock synchronous operation (3-wire.." newline bitfld.long 0x8 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x8 21. "CENDIE,RSPI Communication End Interrupt Enable" "0: Disable communication end interrupt request,1: Enable communication end interrupt request." newline bitfld.long 0x8 20. "SPTIE,Transmit Buffer Empty Interrupt Enable" "0: Disable transmit buffer empty interrupt requests,1: Enable transmit buffer empty interrupt requests." bitfld.long 0x8 19. "SPDRES,Receive data ready error select bit" "0: Receive data full interrupt,1: Error interrupt." newline bitfld.long 0x8 18. "SPIIE,RSPI Idle Interrupt Enable" "0: Disable idle interrupt requests,1: Enable idle interrupt requests." bitfld.long 0x8 17. "SPRIE,RSPI Receive Buffer Full Interrupt Enable" "0: Disable RSPI receive buffer full interrupt..,1: Enable RSPI receive buffer full interrupt.." newline bitfld.long 0x8 16. "SPEIE,RSPI Error Interrupt Enable" "0: Disable RSPI error interrupt requests,1: Enable RSPI error interrupt requests." bitfld.long 0x8 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x8 14. "MODFEN,Mode Fault Error Detection Enable" "0: Disable detection of mode fault errors,1: Enable detection of mode fault errors." bitfld.long 0x8 13. "BFDS,Delay Selection Bit between frames for Burst Transfer" "0: Delay (RSPCK delay SSL negation delay and..,1: Delay between frames is not inserted in burst.." newline bitfld.long 0x8 12. "SCKASE,RSPCK Auto-Stop Function Enable" "0: Disable RSPCK auto-stop function,1: Enable RSPCK auto-stop function." bitfld.long 0x8 11. "PTE,Parity Self-Testing" "0: Disable self-diagnosis function of the parity..,1: Enable self-diagnosis function of the parity.." newline bitfld.long 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 9. "SPOE,Parity Mode" "0: Select even parity for transmission and reception,1: Select odd parity for transmission and reception." newline bitfld.long 0x8 8. "SPPE,Parity Enable" "0: Do not add parity bit to transmit data and do..,1: Add parity bit to transmit data and check parity.." bitfld.long 0x8 7. "SPSCKSEL,RSPI master receive clock select bit" "0: MRIOCLK selection (analog delay adjustment),1: MRCLK selection (digital delay adjustment)" newline bitfld.long 0x8 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 4.--5. "SPTICK,TI SSP clock format control bit" "0: Default (no additional clock is output after the..,1: Output 1RSPCK additionally after the last data,?,?" newline bitfld.long 0x8 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x8 0. "SPE,RSPI Function Enable" "0: Disable RSPI function,1: Enable RSPI function." line.long 0xC "SPCR2,RSPI Control Register 2" bitfld.long 0xC 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 28.--30. "SPTDDL,RSPI transmit data delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 27. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0xC 24.--26. "SPSCKDL,RSPI master receive clock analog delay setting bit" "0: No delay,1: Enter the delay according to the product..,?,?,?,?,?,?" newline bitfld.long 0xC 22.--23. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0xC 21. "MOIFE,MOSI Idle Value Fixing Enable" "0: Set MOSI output value to equal final data from..,1: Set MOSI output value to equal value set in the.." newline bitfld.long 0xC 20. "MOIFV,MOSI Idle Fixed Value" "0: Set level output on MOSIn pin during MOSI idling..,1: Set level output on MOSIn pin during MOSI idling.." bitfld.long 0xC 19. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0xC 18. "SPOM,RSPI Output Pin Mode Select" "0: CMOS output,1: Open-drain output" bitfld.long 0xC 17. "SPLP2,RSPI Loopback 2" "0: Normal mode,1: Loopback mode (data is not inverted for.." newline bitfld.long 0xC 16. "SPLP,RSPI Loopback" "0: Normal mode,1: Loopback mode (data is inverted for transmission)" hexmask.long.byte 0xC 8.--15. 1. "SPDRC,RSPI Receive data ready detection adjustment bit" newline bitfld.long 0xC 7. "RMSTTG,Reception only master start bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." bitfld.long 0xC 6. "RMEDTG,Reception only master end bit" "0: Reception only master and reception stopped,1: Reception only starts with master(1 is writable.." newline bitfld.long 0xC 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0xC 0.--4. 1. "RMFM,Receive-only master frame processing count setting bit" line.long 0x10 "SPCR3,RSPI Control Register 3" hexmask.long.byte 0x10 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x10 24.--26. "SPSLN,RSPI sequence length setting bit" "0: Sequence Length 1 SPDMDx x = 0->0->...,1: Sequence Length 2 SPDMDx x = 0->1->0->...,?,?,?,?,?,?" newline hexmask.long.byte 0x10 16.--23. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x10 8.--15. 1. "SPR,SPBR sets the bit rate in master mode." newline bitfld.long 0x10 7. "SSL7P,SSL7 Signal Polarity Setting" "0: Set SSL7 signal to active low,1: Set SSL7 signal to active high." bitfld.long 0x10 6. "SSL6P,SSL6 Signal Polarity Setting" "0: Set SSL6 signal to active low,1: Set SSL6 signal to active high." newline bitfld.long 0x10 5. "SSL5P,SSL5 Signal Polarity Setting" "0: Set SSL5 signal to active low,1: Set SSL5 signal to active high." bitfld.long 0x10 4. "SSL4P,SSL4 Signal Polarity Setting" "0: Set SSL4 signal to active low,1: Set SSL4 signal to active high." newline bitfld.long 0x10 3. "SSL3P,SSL3 Signal Polarity Setting" "0: Set SSL3 signal to active low,1: Set SSL3 signal to active high." bitfld.long 0x10 2. "SSL2P,SSL2 Signal Polarity Setting" "0: Set SSL2 signal to active low,1: Set SSL2 signal to active high." newline bitfld.long 0x10 1. "SSL1P,SSL1 Signal Polarity Setting" "0: Set SSL1 signal to active low,1: Set SSL1 signal to active high." bitfld.long 0x10 0. "SSL0P,SSL0 Signal Polarity Setting" "0: Set SSL0 signal to active low,1: Set SSL0 signal to active high." line.long 0x14 "SPCMD0,RSPI Command Register 0" hexmask.long.byte 0x14 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x14 24.--26. "SSLA0,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x14 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x14 16.--20. 1. "SPB0,RSPI data length setting bit" newline bitfld.long 0x14 15. "SCKDEN0,RSPCK Delay Setting Enable" "0: Motolora SPI: RSPCK delay is 1RSPCK,1: RSPCK delay is the value of the RSPCK delay.." bitfld.long 0x14 14. "SLNDEN0,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x14 13. "SPNDEN0,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x14 12. "LSBF0,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x14 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x14 7. "SSLKP0,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x14 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x14 2.--3. "BRDV0,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x14 1. "CPOL0,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x14 0. "CPHA0,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x18 "SPCMD1,RSPI Command Register 1" hexmask.long.byte 0x18 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x18 24.--26. "SSLA1,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x18 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x18 16.--20. 1. "SPB1,RSPI data length setting bit" newline bitfld.long 0x18 15. "SCKDEN1,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x18 14. "SLNDEN1,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x18 13. "SPNDEN1,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x18 12. "LSBF1,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x18 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x18 7. "SSLKP1,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x18 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x18 2.--3. "BRDV1,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x18 1. "CPOL1,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x18 0. "CPHA1,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x1C "SPCMD2,RSPI Command Register 2" hexmask.long.byte 0x1C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x1C 24.--26. "SSLA2,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x1C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x1C 16.--20. 1. "SPB2,RSPI data length setting bit" newline bitfld.long 0x1C 15. "SCKDEN2,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x1C 14. "SLNDEN2,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x1C 13. "SPNDEN2,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x1C 12. "LSBF2,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x1C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x1C 7. "SSLKP2,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x1C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x1C 2.--3. "BRDV2,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x1C 1. "CPOL2,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x1C 0. "CPHA2,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x20 "SPCMD3,RSPI Command Register 3" hexmask.long.byte 0x20 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x20 24.--26. "SSLA3,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x20 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x20 16.--20. 1. "SPB3,RSPI data length setting bit" newline bitfld.long 0x20 15. "SCKDEN3,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x20 14. "SLNDEN3,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x20 13. "SPNDEN3,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x20 12. "LSBF3,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x20 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x20 7. "SSLKP3,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x20 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x20 2.--3. "BRDV3,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x20 1. "CPOL3,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x20 0. "CPHA3,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x24 "SPCMD4,RSPI Command Register 4" hexmask.long.byte 0x24 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x24 24.--26. "SSLA4,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x24 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x24 16.--20. 1. "SPB4,RSPI data length setting bit" newline bitfld.long 0x24 15. "SCKDEN4,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x24 14. "SLNDEN4,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x24 13. "SPNDEN4,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x24 12. "LSBF4,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x24 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x24 7. "SSLKP4,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x24 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x24 2.--3. "BRDV4,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x24 1. "CPOL4,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x24 0. "CPHA4,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x28 "SPCMD5,RSPI Command Register 5" hexmask.long.byte 0x28 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x28 24.--26. "SSLA5,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x28 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x28 16.--20. 1. "SPB5,RSPI data length setting bit" newline bitfld.long 0x28 15. "SCKDEN5,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x28 14. "SLNDEN5,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x28 13. "SPNDEN5,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x28 12. "LSBF5,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x28 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x28 7. "SSLKP5,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x28 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x28 2.--3. "BRDV5,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x28 1. "CPOL5,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x28 0. "CPHA5,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x2C "SPCMD6,RSPI Command Register 6" hexmask.long.byte 0x2C 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x2C 24.--26. "SSLA6,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x2C 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x2C 16.--20. 1. "SPB6,RSPI data length setting bit" newline bitfld.long 0x2C 15. "SCKDEN6,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x2C 14. "SLNDEN6,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x2C 13. "SPNDEN6,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x2C 12. "LSBF6,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x2C 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x2C 7. "SSLKP6,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x2C 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x2C 2.--3. "BRDV6,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x2C 1. "CPOL6,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x2C 0. "CPHA6,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." line.long 0x30 "SPCMD7,RSPI Command Register 7" hexmask.long.byte 0x30 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x30 24.--26. "SSLA7,SSL Signal Assertion Setting" "0: SSL0,1: SSL1,?,?,?,?,?,?" newline bitfld.long 0x30 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x30 16.--20. 1. "SPB7,RSPI data length setting bit" newline bitfld.long 0x30 15. "SCKDEN7,RSPCK Delay Setting Enable" "0: Select RSPCK delay of 1RSPCK,1: Select RSPCK delay equal to the setting in the.." bitfld.long 0x30 14. "SLNDEN7,SSL Negation Delay Setting Enable" "0: Select SSL negation delay of 1 RSPCK,1: Select SSL negation delay equal to the setting.." newline bitfld.long 0x30 13. "SPNDEN7,RSPI Next-Access Delay Enable" "0: Select next-access delay of 1 RSPCK + 2 PCLK,1: Select next-access delay equal to the setting in.." bitfld.long 0x30 12. "LSBF7,RSPI LSB First bit" "0: MSB first,1: LSB first." newline hexmask.long.byte 0x30 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.long 0x30 7. "SSLKP7,SSL Signal Level Keeping" "0: Negate all SSL signals on completion of transfer,1: Keep SSL signal level from the end of transfer.." newline bitfld.long 0x30 4.--6. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x30 2.--3. "BRDV7,Bit Rate Division Setting" "0: Base bit rate,1: Base bit rate divided by 2,?,?" newline bitfld.long 0x30 1. "CPOL7,RSPCK Polarity Setting" "0: Set RSPCK low during idle,1: Set RSPCK high during idle." bitfld.long 0x30 0. "CPHA7,RSPCK Phase Setting" "0: Select data sampling on leading edge data change..,1: Select data change on leading edge data sampling.." group.long 0x40++0x7 line.long 0x0 "SPDCR,RSPI Data Control Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 8.--9. "SPFC,Frame number setting bit" "0: 1 frame,1: 2 frames,?,?" bitfld.long 0x0 7. "SPWRAL,RSPI write test mode" "0: Data is stored in one buffer by one writing..,1: Data is stored in all buffers by one writing.." newline bitfld.long 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 4. "SINV,Serial data invert" "0: Not invert serial data,1: Invert serial data." newline bitfld.long 0x0 3. "SPRDTD,RSPI Receive/Transmit Data Select" "0: Read SPDR/SPDR_HA/SPDR_BY values from receive..,1: Read SPDR/SPDR_HA/SPDR_BY values from transmit.." bitfld.long 0x0 1.--2. "SLSEL,SSl Pin Output Specification(In the multi master mode (MODFEN=1) SSL0 (output) is disabled.)" "0: SSL0(output) is enabled / SSL1(output) is..,1: SSL0(output) is enabled / SSL1(output) is..,?,?" newline bitfld.long 0x0 0. "BYSW,Byte Swap Operating Mode Select" "0: Byte Swap OFF,1: Byte Swap ON." line.long 0x4 "SPDCR2,RSPI Data Control Register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 8.--9. "TTRG,Transmission FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" hexmask.long.byte 0x4 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x4 0.--1. "RTRG,Receive FIFO threshold setting bit" "0: Threshold 1,1: Threshold 2,?,?" rgroup.long 0x50++0x3 line.long 0x0 "SPSR,RSPI Status Register" bitfld.long 0x0 31. "SPRF,Receive buffer full flag(Initial value: 1'b0)" "0: No valid data in the receive buffer,1: Valid data in the receive buffer" bitfld.long 0x0 30. "CENDF,Communication complete flag(Initial value: 1'b0)" "0: SPI is not communicating or communicating,1: SPI communication completed" newline bitfld.long 0x0 29. "SPTEF,Send bufferEmpty flag(Initial value: 1'b0)" "0: Data is in the transmit buffer,1: No data is in the transmit buffer" bitfld.long 0x0 28. "UDRF,Underrun Error Flag(This bit is invalid when MODF flag is 0.)" "0: -: No mode fault error or underrun error,?" newline bitfld.long 0x0 27. "PERF,Parity error flag(Initial value: 1'b0)" "0: No parity error occurred,1: Parity error occurred" bitfld.long 0x0 26. "MODF,Mode fault error(Initial value: 1'b0)" "0: No mode fault or underrun error occurred,1: Mode fault error or underrun error occurred" newline bitfld.long 0x0 25. "IDLNF,RSPI Idle Flag" "0: RSPI is in the idle state,1: RSPI is in the transfer state" bitfld.long 0x0 24. "OVRF,Overrun error flag(Initial value: 1'b0)" "0: No overrun error occurred,1: Overrun error occurred" newline bitfld.long 0x0 23. "SPDRF,Receive data delay flag" "0: It is Receiving now or Rx FIFO is read all data..,1: Receive data is less than threshold and Next.." hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000." newline bitfld.long 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 12.--14. "SPECM,RSPI Error Command" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline bitfld.long 0x0 11. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 8.--10. "SPCP,RSPI Command Pointer" "0: SPCMD0,1: SPCMD1,?,?,?,?,?,?" newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000." rgroup.long 0x58++0xB line.long 0x0 "SPTFSR,RSPI transmit FIFO status register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x0 0.--2. "TFDN,Transmit FIFO data empty stage indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x4 "SPRFSR,RSPI receive FIFO status register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000." newline hexmask.long.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.long 0x4 0.--2. "RFDN,Receive FIFO data storage stage number indication bit" "0: Empty stage number 0,1: Empty stage number 1,?,?,?,?,?,?" line.long 0x8 "SPPSR,RSPI Poling status regster" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000." hexmask.long.word 0x8 1.--15. 1. "Reserved,These bits are read as 000000000000000." newline bitfld.long 0x8 0. "SPEPS,SPE poling status regster" "0,1" group.long 0x68++0x7 line.long 0x0 "SPSRC,RSPI Status Clear Register" bitfld.long 0x0 31. "SPRFC,Clear receive buffer full flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 30. "CENDFC,Clear communication complete flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 29. "SPTEFC,Send bufferEmpty flag clear(Initial value: 1'b0)" "0,1" bitfld.long 0x0 28. "UDRFC,Underrun error flag clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 27. "PERFC,Clear parity error flag(Initial value: 1'b0)" "0,1" bitfld.long 0x0 26. "MODFC,Mode fault error clear(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 25. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 24. "OVRFC,Clear overrun error flag(Initial value: 1'b0)" "0,1" newline bitfld.long 0x0 23. "SPDRFC,Rx data ready flag clear bit" "0,1" hexmask.long.byte 0x0 16.--22. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline hexmask.long.word 0x0 0.--15. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." line.long 0x4 "SPFCR,RSPI FIFO clear register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "SPFRST,RSPI FIFO clear bit" "0,1" tree.end tree.end tree "SRAM (SRAM Control)" base ad:0x0 tree "SRAM" base ad:0x40002000 group.word 0x0++0x1 line.word 0x0 "SRAMPRCR_S,SRAM Protection Control Register for Secure" hexmask.word.byte 0x0 8.--15. 1. "KW,Write Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PR,Register Write Control" "0: Accesses to registers are disabled,1: Accesses to registers are enabled" group.word 0x4++0x1 line.word 0x0 "SRAMPRCR_NS,SRAM Protection Control Register for Non-Secure" hexmask.word.byte 0x0 8.--15. 1. "KW,Write Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PR,Register Write Control" "0: Writing to registers are disabled,1: Writing to registers are enabled" group.byte 0x8++0x0 line.byte 0x0 "SRAMWTSC,SRAM Wait State Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "WTEN,wait enable" "0: Do not add wait state in read access cycle to..,1: Add wait state in read access cycle to SRAMs." group.byte 0x10++0x0 line.byte 0x0 "SRAMCR0,SRAM Control Register 0" bitfld.byte 0x0 7. "TSTBYP,ECC Test Enable / ECC Bypass Select" "0: Disable ECC bypass,1: Enable ECC bypass" bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 4. "E1STSEN,ECC 1-Bit Error Information Update Enable" "0: Disable updating of 1-bit ECC error information,1: Bit Error Information Update Enable" bitfld.byte 0x0 2.--3. "ECCMOD,ECC Operating Mode Select" "0: Disable ECC function,1: Setting prohibited,?,?" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "OAD,Operation after detection for 1-bit ECC error detection" "0: Non-maskable interrupt,1: bit ECC error detection" group.byte 0x14++0x0 line.byte 0x0 "SRAMCR1,SRAM Control Register 1" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "OAD,Operation after detection for parity error detection" "0: Non maskable interrupt,1: Reset." group.byte 0x30++0x0 line.byte 0x0 "SRAMECCRGN0,SRAM0 ECC Region Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "ECCRGN,ECC Region" "0: No ECC Region,1: 0x2200_0000 - 0x2201_FFFF / 0x3200_0000 -..,?,?" rgroup.word 0x40++0x1 line.word 0x0 "SRAMESR,SRAM Error Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "ERRS,Standby SRAM Parity Error status" "0: Parity error has not occurred.,1: Parity error has occurred." newline hexmask.word 0x0 3.--13. 1. "Reserved,These bits are read as 00000000000." bitfld.word 0x0 2. "ERR1,SRAM1 Parity Error Status" "0: Parity error has not occurred.,1: Parity error has occurred." newline bitfld.word 0x0 1. "ERR01,SRAM0 2-bit ECC Error Status" "0: 2-bit ECC error has not occurred.,1: 2-bit ECC error has occurred." bitfld.word 0x0 0. "ERR00,SRAM0 1-bit ECC Error Status" "0: 1-bit ECC error has not occurred.,1: bit ECC Error Status" group.word 0x48++0x1 line.word 0x0 "SRAMESCLR,SRAM Error Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "CLRS,Standby SRAM Parity Error Status Clear" "?,1: Clear Parity error." newline hexmask.word 0x0 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 2. "CLR1,SRAM1 Parity Error Status Clear" "?,1: Clear Parity error." newline bitfld.word 0x0 1. "CLR01,SRAM0 2-bit ECC Error Status Clear" "?,1: Clear 2-bit ECC error." bitfld.word 0x0 0. "CLR00,SRAM0 1-bit ECC Error Status Clear" "?,1: bit ECC Error Status Clear" repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x50)++0x3 line.long 0x0 "SRAMEAR$1,SRAM Error Address Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000." hexmask.long.tbyte 0x0 3.--19. 1. "EA,SRAM Error Address" newline bitfld.long 0x0 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" repeat.end group.byte 0x110++0x0 line.byte 0x0 "STBRAMCR,Standby SRAM Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "OAD,Operation after detection" "0: Non-maskable interrupt.,1: Reset." rgroup.long 0x150++0x3 line.long 0x0 "STBRAMEAR,Standby SRAM Error Address Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000." hexmask.long.byte 0x0 2.--9. 1. "EA,SRAM Error Address" newline bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" tree.end tree "SRAM_NS" base ad:0x50002000 group.word 0x0++0x1 line.word 0x0 "SRAMPRCR_S,SRAM Protection Control Register for Secure" hexmask.word.byte 0x0 8.--15. 1. "KW,Write Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PR,Register Write Control" "0: Accesses to registers are disabled,1: Accesses to registers are enabled" group.word 0x4++0x1 line.word 0x0 "SRAMPRCR_NS,SRAM Protection Control Register for Non-Secure" hexmask.word.byte 0x0 8.--15. 1. "KW,Write Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.word 0x0 0. "PR,Register Write Control" "0: Writing to registers are disabled,1: Writing to registers are enabled" group.byte 0x8++0x0 line.byte 0x0 "SRAMWTSC,SRAM Wait State Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "WTEN,wait enable" "0: Do not add wait state in read access cycle to..,1: Add wait state in read access cycle to SRAMs." group.byte 0x10++0x0 line.byte 0x0 "SRAMCR0,SRAM Control Register 0" bitfld.byte 0x0 7. "TSTBYP,ECC Test Enable / ECC Bypass Select" "0: Disable ECC bypass,1: Enable ECC bypass" bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 4. "E1STSEN,ECC 1-Bit Error Information Update Enable" "0: Disable updating of 1-bit ECC error information,1: Bit Error Information Update Enable" bitfld.byte 0x0 2.--3. "ECCMOD,ECC Operating Mode Select" "0: Disable ECC function,1: Setting prohibited,?,?" newline bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0. "OAD,Operation after detection for 1-bit ECC error detection" "0: Non-maskable interrupt,1: bit ECC error detection" group.byte 0x14++0x0 line.byte 0x0 "SRAMCR1,SRAM Control Register 1" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "OAD,Operation after detection for parity error detection" "0: Non maskable interrupt,1: Reset." group.byte 0x30++0x0 line.byte 0x0 "SRAMECCRGN0,SRAM0 ECC Region Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "ECCRGN,ECC Region" "0: No ECC Region,1: 0x2200_0000 - 0x2201_FFFF / 0x3200_0000 -..,?,?" rgroup.word 0x40++0x1 line.word 0x0 "SRAMESR,SRAM Error Status Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0." "0,1" bitfld.word 0x0 14. "ERRS,Standby SRAM Parity Error status" "0: Parity error has not occurred.,1: Parity error has occurred." newline hexmask.word 0x0 3.--13. 1. "Reserved,These bits are read as 00000000000." bitfld.word 0x0 2. "ERR1,SRAM1 Parity Error Status" "0: Parity error has not occurred.,1: Parity error has occurred." newline bitfld.word 0x0 1. "ERR01,SRAM0 2-bit ECC Error Status" "0: 2-bit ECC error has not occurred.,1: 2-bit ECC error has occurred." bitfld.word 0x0 0. "ERR00,SRAM0 1-bit ECC Error Status" "0: 1-bit ECC error has not occurred.,1: bit ECC Error Status" group.word 0x48++0x1 line.word 0x0 "SRAMESCLR,SRAM Error Status Clear Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "CLRS,Standby SRAM Parity Error Status Clear" "?,1: Clear Parity error." newline hexmask.word 0x0 3.--13. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.word 0x0 2. "CLR1,SRAM1 Parity Error Status Clear" "?,1: Clear Parity error." newline bitfld.word 0x0 1. "CLR01,SRAM0 2-bit ECC Error Status Clear" "?,1: Clear 2-bit ECC error." bitfld.word 0x0 0. "CLR00,SRAM0 1-bit ECC Error Status Clear" "?,1: bit ECC Error Status Clear" repeat 3. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x50)++0x3 line.long 0x0 "SRAMEAR$1,SRAM Error Address Register" hexmask.long.word 0x0 20.--31. 1. "Reserved,These bits are read as 000000000000." hexmask.long.tbyte 0x0 3.--19. 1. "EA,SRAM Error Address" newline bitfld.long 0x0 0.--2. "Reserved,These bits are read as 000." "0,1,2,3,4,5,6,7" repeat.end group.byte 0x110++0x0 line.byte 0x0 "STBRAMCR,Standby SRAM Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "OAD,Operation after detection" "0: Non-maskable interrupt.,1: Reset." rgroup.long 0x150++0x3 line.long 0x0 "STBRAMEAR,Standby SRAM Error Address Register" hexmask.long.tbyte 0x0 10.--31. 1. "Reserved,These bits are read as 0000000000000000000000." hexmask.long.byte 0x0 2.--9. 1. "EA,SRAM Error Address" newline bitfld.long 0x0 0.--1. "Reserved,These bits are read as 00." "0,1,2,3" tree.end tree.end tree "SSIE (Serial Sound Interface Enhanced)" base ad:0x0 tree "SSIE0" base ad:0x4025D000 group.long 0x0++0x7 line.long 0x0 "SSICR,Control Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "CKS,Oversampling Clock Select" "0: AUDIO_CLK input,1: Setting prohibited" newline bitfld.long 0x0 29. "TUIEN,Transmit Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 28. "TOIEN,Transmit Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 27. "RUIEN,Receive Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 26. "ROIEN,Receive Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 25. "IIEN,Idle Mode Interrupt Enable" "0: Disables an idle mode interrupt.,1: Enables an idle mode interrupt." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22.--23. "CHNL,Channels" "0: Settings other than above are prohibited.,?,?,?" bitfld.long 0x0 19.--21. "DWL,Data Word Length" "0: Settings other than above are prohibited.,1: 16 bits,?,?,?,?,?,?" newline bitfld.long 0x0 16.--18. "SWL,System Word LengthSet the system word length to the bit clock frequency/2 fs." "0: Settings other than above are prohibited.,1: 16 bits (serial bit clock frequency = 32fs ),?,?,?,?,?,?" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "SWSD,Serial WS Direction NOTE: Only the following settings are allowed: (SCKD SWSD) = (0 0) and (1 1). Other settings are prohibited." "0: Serial word select is input slave mode.,1: Serial word select is output master mode." bitfld.long 0x0 13. "SCKP,Serial Bit Clock Polarity" "0: SSIWS and SSIDATA change at the SSISCK falling..,1: SSIWS and SSIDATA change at the SSISCK rising.." newline bitfld.long 0x0 12. "SWSP,Serial WS Polarity" "0: SSIWS is low for 1st channel high for 2nd channel.,1: SSIWS is high for 1st channel low for 2nd channel." bitfld.long 0x0 11. "SPDP,Serial Padding Polarity" "0: Padding bits are low.,1: Padding bits are high." newline bitfld.long 0x0 10. "SDTA,Serial Data Alignment" "0: Transmitting and receiving in the order of..,1: Transmitting and receiving in the order of.." bitfld.long 0x0 9. "PDTA,Parallel Data Alignment" "0: The lower bits of parallel data (SSITDR SSIRDR)..,1: The upper bits of parallel data (SSITDR SSIRDR).." newline bitfld.long 0x0 8. "DEL,Serial Data Delay" "0: 1 clock cycle delay between SSIWS and SSIDATA,1: No delay between SSIWS and SSIDATA" hexmask.long.byte 0x0 4.--7. 1. "CKDV,Serial Oversampling Clock Division Ratio" newline bitfld.long 0x0 3. "MUEN,Mute EnableNOTE: When this module is muted the value of outputting serial data is rewritten to 0 but data transmission is not stopped. Write dummy data to the SSIFTDR not to generate a transmit underflow because the number of data in the transmit.." "0: This module is not muted.,1: This module is muted." bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "TEN,Transmit Enable" "0: Disables the transmit operation.,1: Enables the transmit operation." bitfld.long 0x0 0. "REN,Receive Enable" "0: Disables the receive operation.,1: Enables the receive operation." line.long 0x4 "SSISR,Status Register" bitfld.long 0x4 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 29. "TUIRQ,Transmit Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit underflow has occurred.,1: A transmit underflow has occurred." newline bitfld.long 0x4 28. "TOIRQ,Transmit Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit overflow has occurred.,1: A transmit overflow has occurred." bitfld.long 0x4 27. "RUIRQ,Receive Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive underflow has occurred.,1: A receive underflow has occurred." newline bitfld.long 0x4 26. "ROIRQ,Receive Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive overflow has occurred.,1: A receive overflow has occurred." rbitfld.long 0x4 25. "IIRQ,Idle Mode Interrupt Status Flag" "0: This module is not in idle state.,1: This module is in idle state." newline hexmask.long.word 0x4 16.--24. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.word 0x4 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline rbitfld.long 0x4 5.--6. "TCHNO,Transmit Channel Number" "0,1,2,3" rbitfld.long 0x4 4. "TSWNO,Transmit Serial Word Number" "0,1" newline rbitfld.long 0x4 2.--3. "RCHNO,Receive Channel Number.These bits are read as 00b." "0,1,2,3" rbitfld.long 0x4 1. "RSWNO,Receive Serial Word Number" "0,1" newline rbitfld.long 0x4 0. "IDST,Idle Mode Status Flag" "0: Serial bus is operating.,1: The current communication is stopped." group.long 0x10++0x7 line.long 0x0 "SSIFCR,FIFO Control Register" bitfld.long 0x0 31. "AUCKE,Oversampling Clock Enable" "0: The oversampling clock is disabled.,1: The oversampling clock is enabled." hexmask.long.word 0x0 17.--30. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 16. "SSIRST,SSI soft ware reset" "0: Clears the SSI software reset.,1: initiates the SSI software reset." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "TTRG,Transmit Data Trigger Number NOTE: The values in parenthesis are the number of empty stages in SSIFTDR at which the TDE flag is set." "0: 7 (1),1: 6 (2),?,?" bitfld.long 0x0 4.--5. "RTRG,Receive Data Trigger Number" "0: 1,1: 2,?,?" newline bitfld.long 0x0 3. "TIE,Transmit Interrupt Enable NOTE: TXI can be cleared by clearing either the TDE flag (see the description of the TDE bit for details) or TIE bit." "0: Transmit data empty interrupt (TXI) request is..,1: Transmit data empty interrupt (TXI) request is.." bitfld.long 0x0 2. "RIE,Receive Interrupt Enable NOTE: RXI can be cleared by clearing either the RDF flag (see the description of the RDF bit for details) or RIE bit." "0: Receive data full interrupt (RXI) request is..,1: Receive data full interrupt (RXI) request is.." newline bitfld.long 0x0 1. "TFRST,Transmit FIFO Data Register Reset" "0: Clears the transmit data FIFO reset.,1: Initiates the transmit data FIFO reset." bitfld.long 0x0 0. "RFRST,Receive FIFO Data Register Reset" "0: Clears the receive data FIFO reset.,1: Initiates the receive data FIFO reset." line.long 0x4 "SSIFSR,FIFO Status Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 24.--27. 1. "TDC,Transmit Data Indicate Flag(Indicates the number of data units stored in SSIFTDR)" newline hexmask.long.byte 0x4 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 16. "TDE,Transmit Data Empty Flag NOTE: Since the SSIFTDR register is a 32-byte FIFO register the maximum number of bytes that can be written to it while the TDE flag is 1 is 8 - TDC[3:0]. If writing data to the SSIFTDR register is continued after all the.." "0: Number of data bytes for transmission in SSIFTDR..,1: Number of data bytes for transmission in SSIFTDR.." newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 8.--11. 1. "RDC,Receive Data Indicate Flag(Indicates the number of data units stored in SSIFRDR)" newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "RDF,Receive Data Full Flag NOTE: Since the SSIFRDR register is a 32-byte FIFO register the maximum number of data bytes that can be read from it while the RDF flag is 1 is indicated in the RDC[3:0] flags. If reading data from the SSIFRDR register is.." "0: Number of received data bytes in SSIFRDR is less..,1: Number of received data bytes in SSIFRDR is.." wgroup.long 0x18++0x3 line.long 0x0 "SSIFTDR,Transmit FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFTDR,SSIFTDR is a write-only FIFO register consisting of eight stages of 32-bit registers for storing data to be serially transmitted. NOTE: that when the SSIFTDR register is full of data (32 bytes) the next data cannot be written to it. If writing.." rgroup.long 0x1C++0x3 line.long 0x0 "SSIFRDR,Receive FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFRDR,SSIFRDR is a read-only FIFO register consisting of eight stages of 32-bit registers for storing serially received data." group.long 0x20++0x7 line.long 0x0 "SSIOFR,Audio Format Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 9. "BCKASTP,Whether to Enable Stopping BCK Output When SSIE is in Idle Status" "0: Always outputs BCK to the SSIBCK pin.,1: Automatically controls output of BCK to the.." bitfld.long 0x0 8. "LRCONT,Whether to Enable LRCK/FS Continuation" "0: Disables LRCK/FS continuation.,1: Enables LRCK/FS continuation." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "OMOD,Audio Format Select" "0: I2S format,1: TDM format,?,?" line.long 0x4 "SSISCR,Status Control Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--12. 1. "TDES,TDE Setting Condition Select" bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 0.--4. 1. "RDFS,RDF Setting Condition Select" tree.end tree "SSIE0_NS" base ad:0x5025D000 group.long 0x0++0x7 line.long 0x0 "SSICR,Control Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "CKS,Oversampling Clock Select" "0: AUDIO_CLK input,1: Setting prohibited" newline bitfld.long 0x0 29. "TUIEN,Transmit Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 28. "TOIEN,Transmit Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 27. "RUIEN,Receive Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 26. "ROIEN,Receive Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 25. "IIEN,Idle Mode Interrupt Enable" "0: Disables an idle mode interrupt.,1: Enables an idle mode interrupt." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22.--23. "CHNL,Channels" "0: Settings other than above are prohibited.,?,?,?" bitfld.long 0x0 19.--21. "DWL,Data Word Length" "0: Settings other than above are prohibited.,1: 16 bits,?,?,?,?,?,?" newline bitfld.long 0x0 16.--18. "SWL,System Word LengthSet the system word length to the bit clock frequency/2 fs." "0: Settings other than above are prohibited.,1: 16 bits (serial bit clock frequency = 32fs ),?,?,?,?,?,?" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "SWSD,Serial WS Direction NOTE: Only the following settings are allowed: (SCKD SWSD) = (0 0) and (1 1). Other settings are prohibited." "0: Serial word select is input slave mode.,1: Serial word select is output master mode." bitfld.long 0x0 13. "SCKP,Serial Bit Clock Polarity" "0: SSIWS and SSIDATA change at the SSISCK falling..,1: SSIWS and SSIDATA change at the SSISCK rising.." newline bitfld.long 0x0 12. "SWSP,Serial WS Polarity" "0: SSIWS is low for 1st channel high for 2nd channel.,1: SSIWS is high for 1st channel low for 2nd channel." bitfld.long 0x0 11. "SPDP,Serial Padding Polarity" "0: Padding bits are low.,1: Padding bits are high." newline bitfld.long 0x0 10. "SDTA,Serial Data Alignment" "0: Transmitting and receiving in the order of..,1: Transmitting and receiving in the order of.." bitfld.long 0x0 9. "PDTA,Parallel Data Alignment" "0: The lower bits of parallel data (SSITDR SSIRDR)..,1: The upper bits of parallel data (SSITDR SSIRDR).." newline bitfld.long 0x0 8. "DEL,Serial Data Delay" "0: 1 clock cycle delay between SSIWS and SSIDATA,1: No delay between SSIWS and SSIDATA" hexmask.long.byte 0x0 4.--7. 1. "CKDV,Serial Oversampling Clock Division Ratio" newline bitfld.long 0x0 3. "MUEN,Mute EnableNOTE: When this module is muted the value of outputting serial data is rewritten to 0 but data transmission is not stopped. Write dummy data to the SSIFTDR not to generate a transmit underflow because the number of data in the transmit.." "0: This module is not muted.,1: This module is muted." bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "TEN,Transmit Enable" "0: Disables the transmit operation.,1: Enables the transmit operation." bitfld.long 0x0 0. "REN,Receive Enable" "0: Disables the receive operation.,1: Enables the receive operation." line.long 0x4 "SSISR,Status Register" bitfld.long 0x4 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 29. "TUIRQ,Transmit Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit underflow has occurred.,1: A transmit underflow has occurred." newline bitfld.long 0x4 28. "TOIRQ,Transmit Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit overflow has occurred.,1: A transmit overflow has occurred." bitfld.long 0x4 27. "RUIRQ,Receive Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive underflow has occurred.,1: A receive underflow has occurred." newline bitfld.long 0x4 26. "ROIRQ,Receive Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive overflow has occurred.,1: A receive overflow has occurred." rbitfld.long 0x4 25. "IIRQ,Idle Mode Interrupt Status Flag" "0: This module is not in idle state.,1: This module is in idle state." newline hexmask.long.word 0x4 16.--24. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.word 0x4 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline rbitfld.long 0x4 5.--6. "TCHNO,Transmit Channel Number" "0,1,2,3" rbitfld.long 0x4 4. "TSWNO,Transmit Serial Word Number" "0,1" newline rbitfld.long 0x4 2.--3. "RCHNO,Receive Channel Number.These bits are read as 00b." "0,1,2,3" rbitfld.long 0x4 1. "RSWNO,Receive Serial Word Number" "0,1" newline rbitfld.long 0x4 0. "IDST,Idle Mode Status Flag" "0: Serial bus is operating.,1: The current communication is stopped." group.long 0x10++0x7 line.long 0x0 "SSIFCR,FIFO Control Register" bitfld.long 0x0 31. "AUCKE,Oversampling Clock Enable" "0: The oversampling clock is disabled.,1: The oversampling clock is enabled." hexmask.long.word 0x0 17.--30. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 16. "SSIRST,SSI soft ware reset" "0: Clears the SSI software reset.,1: initiates the SSI software reset." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "TTRG,Transmit Data Trigger Number NOTE: The values in parenthesis are the number of empty stages in SSIFTDR at which the TDE flag is set." "0: 7 (1),1: 6 (2),?,?" bitfld.long 0x0 4.--5. "RTRG,Receive Data Trigger Number" "0: 1,1: 2,?,?" newline bitfld.long 0x0 3. "TIE,Transmit Interrupt Enable NOTE: TXI can be cleared by clearing either the TDE flag (see the description of the TDE bit for details) or TIE bit." "0: Transmit data empty interrupt (TXI) request is..,1: Transmit data empty interrupt (TXI) request is.." bitfld.long 0x0 2. "RIE,Receive Interrupt Enable NOTE: RXI can be cleared by clearing either the RDF flag (see the description of the RDF bit for details) or RIE bit." "0: Receive data full interrupt (RXI) request is..,1: Receive data full interrupt (RXI) request is.." newline bitfld.long 0x0 1. "TFRST,Transmit FIFO Data Register Reset" "0: Clears the transmit data FIFO reset.,1: Initiates the transmit data FIFO reset." bitfld.long 0x0 0. "RFRST,Receive FIFO Data Register Reset" "0: Clears the receive data FIFO reset.,1: Initiates the receive data FIFO reset." line.long 0x4 "SSIFSR,FIFO Status Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 24.--27. 1. "TDC,Transmit Data Indicate Flag(Indicates the number of data units stored in SSIFTDR)" newline hexmask.long.byte 0x4 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 16. "TDE,Transmit Data Empty Flag NOTE: Since the SSIFTDR register is a 32-byte FIFO register the maximum number of bytes that can be written to it while the TDE flag is 1 is 8 - TDC[3:0]. If writing data to the SSIFTDR register is continued after all the.." "0: Number of data bytes for transmission in SSIFTDR..,1: Number of data bytes for transmission in SSIFTDR.." newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 8.--11. 1. "RDC,Receive Data Indicate Flag(Indicates the number of data units stored in SSIFRDR)" newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "RDF,Receive Data Full Flag NOTE: Since the SSIFRDR register is a 32-byte FIFO register the maximum number of data bytes that can be read from it while the RDF flag is 1 is indicated in the RDC[3:0] flags. If reading data from the SSIFRDR register is.." "0: Number of received data bytes in SSIFRDR is less..,1: Number of received data bytes in SSIFRDR is.." wgroup.long 0x18++0x3 line.long 0x0 "SSIFTDR,Transmit FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFTDR,SSIFTDR is a write-only FIFO register consisting of eight stages of 32-bit registers for storing data to be serially transmitted. NOTE: that when the SSIFTDR register is full of data (32 bytes) the next data cannot be written to it. If writing.." rgroup.long 0x1C++0x3 line.long 0x0 "SSIFRDR,Receive FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFRDR,SSIFRDR is a read-only FIFO register consisting of eight stages of 32-bit registers for storing serially received data." group.long 0x20++0x7 line.long 0x0 "SSIOFR,Audio Format Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 9. "BCKASTP,Whether to Enable Stopping BCK Output When SSIE is in Idle Status" "0: Always outputs BCK to the SSIBCK pin.,1: Automatically controls output of BCK to the.." bitfld.long 0x0 8. "LRCONT,Whether to Enable LRCK/FS Continuation" "0: Disables LRCK/FS continuation.,1: Enables LRCK/FS continuation." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "OMOD,Audio Format Select" "0: I2S format,1: TDM format,?,?" line.long 0x4 "SSISCR,Status Control Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--12. 1. "TDES,TDE Setting Condition Select" bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 0.--4. 1. "RDFS,RDF Setting Condition Select" tree.end tree "SSIE1" base ad:0x4025D100 group.long 0x0++0x7 line.long 0x0 "SSICR,Control Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "CKS,Oversampling Clock Select" "0: AUDIO_CLK input,1: Setting prohibited" newline bitfld.long 0x0 29. "TUIEN,Transmit Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 28. "TOIEN,Transmit Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 27. "RUIEN,Receive Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 26. "ROIEN,Receive Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 25. "IIEN,Idle Mode Interrupt Enable" "0: Disables an idle mode interrupt.,1: Enables an idle mode interrupt." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22.--23. "CHNL,Channels" "0: Settings other than above are prohibited.,?,?,?" bitfld.long 0x0 19.--21. "DWL,Data Word Length" "0: Settings other than above are prohibited.,1: 16 bits,?,?,?,?,?,?" newline bitfld.long 0x0 16.--18. "SWL,System Word LengthSet the system word length to the bit clock frequency/2 fs." "0: Settings other than above are prohibited.,1: 16 bits (serial bit clock frequency = 32fs ),?,?,?,?,?,?" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "SWSD,Serial WS Direction NOTE: Only the following settings are allowed: (SCKD SWSD) = (0 0) and (1 1). Other settings are prohibited." "0: Serial word select is input slave mode.,1: Serial word select is output master mode." bitfld.long 0x0 13. "SCKP,Serial Bit Clock Polarity" "0: SSIWS and SSIDATA change at the SSISCK falling..,1: SSIWS and SSIDATA change at the SSISCK rising.." newline bitfld.long 0x0 12. "SWSP,Serial WS Polarity" "0: SSIWS is low for 1st channel high for 2nd channel.,1: SSIWS is high for 1st channel low for 2nd channel." bitfld.long 0x0 11. "SPDP,Serial Padding Polarity" "0: Padding bits are low.,1: Padding bits are high." newline bitfld.long 0x0 10. "SDTA,Serial Data Alignment" "0: Transmitting and receiving in the order of..,1: Transmitting and receiving in the order of.." bitfld.long 0x0 9. "PDTA,Parallel Data Alignment" "0: The lower bits of parallel data (SSITDR SSIRDR)..,1: The upper bits of parallel data (SSITDR SSIRDR).." newline bitfld.long 0x0 8. "DEL,Serial Data Delay" "0: 1 clock cycle delay between SSIWS and SSIDATA,1: No delay between SSIWS and SSIDATA" hexmask.long.byte 0x0 4.--7. 1. "CKDV,Serial Oversampling Clock Division Ratio" newline bitfld.long 0x0 3. "MUEN,Mute EnableNOTE: When this module is muted the value of outputting serial data is rewritten to 0 but data transmission is not stopped. Write dummy data to the SSIFTDR not to generate a transmit underflow because the number of data in the transmit.." "0: This module is not muted.,1: This module is muted." bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "TEN,Transmit Enable" "0: Disables the transmit operation.,1: Enables the transmit operation." bitfld.long 0x0 0. "REN,Receive Enable" "0: Disables the receive operation.,1: Enables the receive operation." line.long 0x4 "SSISR,Status Register" bitfld.long 0x4 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 29. "TUIRQ,Transmit Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit underflow has occurred.,1: A transmit underflow has occurred." newline bitfld.long 0x4 28. "TOIRQ,Transmit Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit overflow has occurred.,1: A transmit overflow has occurred." bitfld.long 0x4 27. "RUIRQ,Receive Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive underflow has occurred.,1: A receive underflow has occurred." newline bitfld.long 0x4 26. "ROIRQ,Receive Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive overflow has occurred.,1: A receive overflow has occurred." rbitfld.long 0x4 25. "IIRQ,Idle Mode Interrupt Status Flag" "0: This module is not in idle state.,1: This module is in idle state." newline hexmask.long.word 0x4 16.--24. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.word 0x4 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline rbitfld.long 0x4 5.--6. "TCHNO,Transmit Channel Number" "0,1,2,3" rbitfld.long 0x4 4. "TSWNO,Transmit Serial Word Number" "0,1" newline rbitfld.long 0x4 2.--3. "RCHNO,Receive Channel Number.These bits are read as 00b." "0,1,2,3" rbitfld.long 0x4 1. "RSWNO,Receive Serial Word Number" "0,1" newline rbitfld.long 0x4 0. "IDST,Idle Mode Status Flag" "0: Serial bus is operating.,1: The current communication is stopped." group.long 0x10++0x7 line.long 0x0 "SSIFCR,FIFO Control Register" bitfld.long 0x0 31. "AUCKE,Oversampling Clock Enable" "0: The oversampling clock is disabled.,1: The oversampling clock is enabled." hexmask.long.word 0x0 17.--30. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 16. "SSIRST,SSI soft ware reset" "0: Clears the SSI software reset.,1: initiates the SSI software reset." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "TTRG,Transmit Data Trigger Number NOTE: The values in parenthesis are the number of empty stages in SSIFTDR at which the TDE flag is set." "0: 7 (1),1: 6 (2),?,?" bitfld.long 0x0 4.--5. "RTRG,Receive Data Trigger Number" "0: 1,1: 2,?,?" newline bitfld.long 0x0 3. "TIE,Transmit Interrupt Enable NOTE: TXI can be cleared by clearing either the TDE flag (see the description of the TDE bit for details) or TIE bit." "0: Transmit data empty interrupt (TXI) request is..,1: Transmit data empty interrupt (TXI) request is.." bitfld.long 0x0 2. "RIE,Receive Interrupt Enable NOTE: RXI can be cleared by clearing either the RDF flag (see the description of the RDF bit for details) or RIE bit." "0: Receive data full interrupt (RXI) request is..,1: Receive data full interrupt (RXI) request is.." newline bitfld.long 0x0 1. "TFRST,Transmit FIFO Data Register Reset" "0: Clears the transmit data FIFO reset.,1: Initiates the transmit data FIFO reset." bitfld.long 0x0 0. "RFRST,Receive FIFO Data Register Reset" "0: Clears the receive data FIFO reset.,1: Initiates the receive data FIFO reset." line.long 0x4 "SSIFSR,FIFO Status Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 24.--27. 1. "TDC,Transmit Data Indicate Flag(Indicates the number of data units stored in SSIFTDR)" newline hexmask.long.byte 0x4 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 16. "TDE,Transmit Data Empty Flag NOTE: Since the SSIFTDR register is a 32-byte FIFO register the maximum number of bytes that can be written to it while the TDE flag is 1 is 8 - TDC[3:0]. If writing data to the SSIFTDR register is continued after all the.." "0: Number of data bytes for transmission in SSIFTDR..,1: Number of data bytes for transmission in SSIFTDR.." newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 8.--11. 1. "RDC,Receive Data Indicate Flag(Indicates the number of data units stored in SSIFRDR)" newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "RDF,Receive Data Full Flag NOTE: Since the SSIFRDR register is a 32-byte FIFO register the maximum number of data bytes that can be read from it while the RDF flag is 1 is indicated in the RDC[3:0] flags. If reading data from the SSIFRDR register is.." "0: Number of received data bytes in SSIFRDR is less..,1: Number of received data bytes in SSIFRDR is.." wgroup.long 0x18++0x3 line.long 0x0 "SSIFTDR,Transmit FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFTDR,SSIFTDR is a write-only FIFO register consisting of eight stages of 32-bit registers for storing data to be serially transmitted. NOTE: that when the SSIFTDR register is full of data (32 bytes) the next data cannot be written to it. If writing.." rgroup.long 0x1C++0x3 line.long 0x0 "SSIFRDR,Receive FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFRDR,SSIFRDR is a read-only FIFO register consisting of eight stages of 32-bit registers for storing serially received data." group.long 0x20++0x7 line.long 0x0 "SSIOFR,Audio Format Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 9. "BCKASTP,Whether to Enable Stopping BCK Output When SSIE is in Idle Status" "0: Always outputs BCK to the SSIBCK pin.,1: Automatically controls output of BCK to the.." bitfld.long 0x0 8. "LRCONT,Whether to Enable LRCK/FS Continuation" "0: Disables LRCK/FS continuation.,1: Enables LRCK/FS continuation." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "OMOD,Audio Format Select" "0: I2S format,1: TDM format,?,?" line.long 0x4 "SSISCR,Status Control Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--12. 1. "TDES,TDE Setting Condition Select" bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 0.--4. 1. "RDFS,RDF Setting Condition Select" tree.end tree "SSIE1_NS" base ad:0x5025D100 group.long 0x0++0x7 line.long 0x0 "SSICR,Control Register" bitfld.long 0x0 31. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 30. "CKS,Oversampling Clock Select" "0: AUDIO_CLK input,1: Setting prohibited" newline bitfld.long 0x0 29. "TUIEN,Transmit Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 28. "TOIEN,Transmit Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 27. "RUIEN,Receive Underflow Interrupt Enable" "0: Disables an underflow interrupt.,1: Enables an underflow interrupt." bitfld.long 0x0 26. "ROIEN,Receive Overflow Interrupt Enable" "0: Disables an overflow interrupt.,1: Enables an overflow interrupt." newline bitfld.long 0x0 25. "IIEN,Idle Mode Interrupt Enable" "0: Disables an idle mode interrupt.,1: Enables an idle mode interrupt." bitfld.long 0x0 24. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 22.--23. "CHNL,Channels" "0: Settings other than above are prohibited.,?,?,?" bitfld.long 0x0 19.--21. "DWL,Data Word Length" "0: Settings other than above are prohibited.,1: 16 bits,?,?,?,?,?,?" newline bitfld.long 0x0 16.--18. "SWL,System Word LengthSet the system word length to the bit clock frequency/2 fs." "0: Settings other than above are prohibited.,1: 16 bits (serial bit clock frequency = 32fs ),?,?,?,?,?,?" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "SWSD,Serial WS Direction NOTE: Only the following settings are allowed: (SCKD SWSD) = (0 0) and (1 1). Other settings are prohibited." "0: Serial word select is input slave mode.,1: Serial word select is output master mode." bitfld.long 0x0 13. "SCKP,Serial Bit Clock Polarity" "0: SSIWS and SSIDATA change at the SSISCK falling..,1: SSIWS and SSIDATA change at the SSISCK rising.." newline bitfld.long 0x0 12. "SWSP,Serial WS Polarity" "0: SSIWS is low for 1st channel high for 2nd channel.,1: SSIWS is high for 1st channel low for 2nd channel." bitfld.long 0x0 11. "SPDP,Serial Padding Polarity" "0: Padding bits are low.,1: Padding bits are high." newline bitfld.long 0x0 10. "SDTA,Serial Data Alignment" "0: Transmitting and receiving in the order of..,1: Transmitting and receiving in the order of.." bitfld.long 0x0 9. "PDTA,Parallel Data Alignment" "0: The lower bits of parallel data (SSITDR SSIRDR)..,1: The upper bits of parallel data (SSITDR SSIRDR).." newline bitfld.long 0x0 8. "DEL,Serial Data Delay" "0: 1 clock cycle delay between SSIWS and SSIDATA,1: No delay between SSIWS and SSIDATA" hexmask.long.byte 0x0 4.--7. 1. "CKDV,Serial Oversampling Clock Division Ratio" newline bitfld.long 0x0 3. "MUEN,Mute EnableNOTE: When this module is muted the value of outputting serial data is rewritten to 0 but data transmission is not stopped. Write dummy data to the SSIFTDR not to generate a transmit underflow because the number of data in the transmit.." "0: This module is not muted.,1: This module is muted." bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "TEN,Transmit Enable" "0: Disables the transmit operation.,1: Enables the transmit operation." bitfld.long 0x0 0. "REN,Receive Enable" "0: Disables the receive operation.,1: Enables the receive operation." line.long 0x4 "SSISR,Status Register" bitfld.long 0x4 30.--31. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x4 29. "TUIRQ,Transmit Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit underflow has occurred.,1: A transmit underflow has occurred." newline bitfld.long 0x4 28. "TOIRQ,Transmit Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No transmit overflow has occurred.,1: A transmit overflow has occurred." bitfld.long 0x4 27. "RUIRQ,Receive Underflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive underflow has occurred.,1: A receive underflow has occurred." newline bitfld.long 0x4 26. "ROIRQ,Receive Overflow Error Interrupt Status Flag NOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: No receive overflow has occurred.,1: A receive overflow has occurred." rbitfld.long 0x4 25. "IIRQ,Idle Mode Interrupt Status Flag" "0: This module is not in idle state.,1: This module is in idle state." newline hexmask.long.word 0x4 16.--24. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." hexmask.long.word 0x4 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline rbitfld.long 0x4 5.--6. "TCHNO,Transmit Channel Number" "0,1,2,3" rbitfld.long 0x4 4. "TSWNO,Transmit Serial Word Number" "0,1" newline rbitfld.long 0x4 2.--3. "RCHNO,Receive Channel Number.These bits are read as 00b." "0,1,2,3" rbitfld.long 0x4 1. "RSWNO,Receive Serial Word Number" "0,1" newline rbitfld.long 0x4 0. "IDST,Idle Mode Status Flag" "0: Serial bus is operating.,1: The current communication is stopped." group.long 0x10++0x7 line.long 0x0 "SSIFCR,FIFO Control Register" bitfld.long 0x0 31. "AUCKE,Oversampling Clock Enable" "0: The oversampling clock is disabled.,1: The oversampling clock is enabled." hexmask.long.word 0x0 17.--30. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 16. "SSIRST,SSI soft ware reset" "0: Clears the SSI software reset.,1: initiates the SSI software reset." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "TTRG,Transmit Data Trigger Number NOTE: The values in parenthesis are the number of empty stages in SSIFTDR at which the TDE flag is set." "0: 7 (1),1: 6 (2),?,?" bitfld.long 0x0 4.--5. "RTRG,Receive Data Trigger Number" "0: 1,1: 2,?,?" newline bitfld.long 0x0 3. "TIE,Transmit Interrupt Enable NOTE: TXI can be cleared by clearing either the TDE flag (see the description of the TDE bit for details) or TIE bit." "0: Transmit data empty interrupt (TXI) request is..,1: Transmit data empty interrupt (TXI) request is.." bitfld.long 0x0 2. "RIE,Receive Interrupt Enable NOTE: RXI can be cleared by clearing either the RDF flag (see the description of the RDF bit for details) or RIE bit." "0: Receive data full interrupt (RXI) request is..,1: Receive data full interrupt (RXI) request is.." newline bitfld.long 0x0 1. "TFRST,Transmit FIFO Data Register Reset" "0: Clears the transmit data FIFO reset.,1: Initiates the transmit data FIFO reset." bitfld.long 0x0 0. "RFRST,Receive FIFO Data Register Reset" "0: Clears the receive data FIFO reset.,1: Initiates the receive data FIFO reset." line.long 0x4 "SSIFSR,FIFO Status Register" hexmask.long.byte 0x4 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 24.--27. 1. "TDC,Transmit Data Indicate Flag(Indicates the number of data units stored in SSIFTDR)" newline hexmask.long.byte 0x4 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 16. "TDE,Transmit Data Empty Flag NOTE: Since the SSIFTDR register is a 32-byte FIFO register the maximum number of bytes that can be written to it while the TDE flag is 1 is 8 - TDC[3:0]. If writing data to the SSIFTDR register is continued after all the.." "0: Number of data bytes for transmission in SSIFTDR..,1: Number of data bytes for transmission in SSIFTDR.." newline hexmask.long.byte 0x4 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x4 8.--11. 1. "RDC,Receive Data Indicate Flag(Indicates the number of data units stored in SSIFRDR)" newline hexmask.long.byte 0x4 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.long 0x4 0. "RDF,Receive Data Full Flag NOTE: Since the SSIFRDR register is a 32-byte FIFO register the maximum number of data bytes that can be read from it while the RDF flag is 1 is indicated in the RDC[3:0] flags. If reading data from the SSIFRDR register is.." "0: Number of received data bytes in SSIFRDR is less..,1: Number of received data bytes in SSIFRDR is.." wgroup.long 0x18++0x3 line.long 0x0 "SSIFTDR,Transmit FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFTDR,SSIFTDR is a write-only FIFO register consisting of eight stages of 32-bit registers for storing data to be serially transmitted. NOTE: that when the SSIFTDR register is full of data (32 bytes) the next data cannot be written to it. If writing.." rgroup.long 0x1C++0x3 line.long 0x0 "SSIFRDR,Receive FIFO Data Register" hexmask.long 0x0 0.--31. 1. "SSIFRDR,SSIFRDR is a read-only FIFO register consisting of eight stages of 32-bit registers for storing serially received data." group.long 0x20++0x7 line.long 0x0 "SSIOFR,Audio Format Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 9. "BCKASTP,Whether to Enable Stopping BCK Output When SSIE is in Idle Status" "0: Always outputs BCK to the SSIBCK pin.,1: Automatically controls output of BCK to the.." bitfld.long 0x0 8. "LRCONT,Whether to Enable LRCK/FS Continuation" "0: Disables LRCK/FS continuation.,1: Enables LRCK/FS continuation." newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 0.--1. "OMOD,Audio Format Select" "0: I2S format,1: TDM format,?,?" line.long 0x4 "SSISCR,Status Control Register" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 8.--12. 1. "TDES,TDE Setting Condition Select" bitfld.long 0x4 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 0.--4. 1. "RDFS,RDF Setting Condition Select" tree.end tree.end tree "SYSC (System Control)" base ad:0x0 tree "SYSC" base ad:0x4001E000 group.byte 0xC++0x0 line.byte 0x0 "SBYCR,Standby Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "OPE,Output Port Enable" "0: In software standby mode or deep software..,1: In software standby mode or deep software.." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0xE++0x0 line.byte 0x0 "SSCR2,Software Standby Control Register 2" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." rbitfld.byte 0x0 0. "SS1RSF,Software Standby 1 regulator status flag" "0: After returning from Software Standby mode 1 the..,1: After returning from Software Standby mode 1 the.." group.byte 0x10++0x0 line.byte 0x0 "FLSCR,Flash Standby Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 0. "FLSWCF,Flash Stabilization wait completion flag" "0: Flash stabilization wait time is not completed..,1: Flash stabilization wait time is completed when.." group.long 0x20++0x3 line.long 0x0 "SCKDIVCR,System Clock Division Control Register" hexmask.long.byte 0x0 28.--31. 1. "FCK,Flash IF Clock (FCLK) Select" hexmask.long.byte 0x0 24.--27. 1. "ICK,System Clock (ICLK) Select" newline hexmask.long.byte 0x0 20.--23. 1. "PCKE,Peripheral Module Clock E (PCLKE) Select" hexmask.long.byte 0x0 16.--19. 1. "BCK,External Bus Clock (BCLK) Select" newline hexmask.long.byte 0x0 12.--15. 1. "PCKA,Peripheral Module Clock A (PCLKA) Select" hexmask.long.byte 0x0 8.--11. 1. "PCKB,Peripheral Module Clock B (PCLKB) Select" newline hexmask.long.byte 0x0 4.--7. 1. "PCKC,Peripheral Module Clock C (PCLKC) Select" hexmask.long.byte 0x0 0.--3. 1. "PCKD,Peripheral Module Clock D (PCLKD) Select" group.byte 0x24++0x0 line.byte 0x0 "SCKDIVCR2,System Clock Division Control Register 2" hexmask.byte 0x0 4.--7. 1. "CPUCK1,CPU1 Clock (CPUCLK1) Select" hexmask.byte 0x0 0.--3. 1. "CPUCK,CPU Clock (CPUCLK) Select" group.byte 0x26++0x0 line.byte 0x0 "SCKSCR,System Clock Source Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "CKSEL,Clock Source Select" "0: HOCO,1: MOCO,?,?,?,?,?,?" group.word 0x28++0x1 line.word 0x0 "PLLCCR,PLL Clock Control Register" hexmask.word.byte 0x0 8.--15. 1. "PLLMUL,PLL1 Frequency Multiplication Factor Select" bitfld.word 0x0 6.--7. "PLLMULNF,PLL1 Frequency Multiplication Fractional Factor Select" "0: 0.00 (Value after reset),1: 0.33 (1/3),?,?" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PLSRCSEL,PLL1 Clock Source Select" "0: Main clock oscillator,1: HOCO" newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0.--1. "PLIDIV,PLL1 Input Frequency Division Ratio Select" "0: /1,1: /2,?,?" group.byte 0x2A++0x0 line.byte 0x0 "PLLCR,PLL Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PLLSTP,PLL1 Stop Control" "0: Operate the PLL1,1: Stop the PLL1" group.byte 0x30++0x0 line.byte 0x0 "BCKCR,External Bus Clock Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BCLKDIV,BCLK Pin Output Select" "0: BCLK,1: BCLK/2" group.byte 0x32++0x0 line.byte 0x0 "MOSCCR,Main Clock Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MOSTP,Main Clock Oscillator Stop" "0: Main clock oscillator is operating.,1: Main clock oscillator is stopped." group.byte 0x36++0x0 line.byte 0x0 "HOCOCR,High-Speed On-Chip Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "HCSTP,HOCO Stop" "0: Operate the HOCO clock,1: Stop the HOCO clock" group.byte 0x38++0x1 line.byte 0x0 "MOCOCR,Middle-Speed On-Chip Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MCSTP,MOCO Stop" "0: Operate the MOCO clock,1: Stop the MOCO clock" line.byte 0x1 "FLLCR1,FLL Control Register 1" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "FLLEN,FLL Enable" "0: FLL function is disabled.,1: FLL function is enabled." group.word 0x3A++0x1 line.word 0x0 "FLLCR2,FLL Control Register 2" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word 0x0 0.--10. 1. "FLLCNTL,FLL Multiplication Control" rgroup.byte 0x3C++0x0 line.byte 0x0 "OSCSF,Oscillation Stabilization Flag Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "PLL2SF,PLL2 Clock Oscillation Stabilization Flag" "0: The PLL2 clock is stopped or oscillation of the..,1: Oscillation of the PLL2 clock is stable so the.." newline bitfld.byte 0x0 5. "PLLSF,PLL1 Clock Oscillation Stabilization Flag" "0: The PLL1 clock is stopped or oscillation of the..,1: Oscillation of the PLL1 clock is stable so the.." bitfld.byte 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 3. "MOSCSF,Main Clock Oscillation Stabilization Flag" "0: Main clock oscillator is stopped (MOSTP = 1) or..,1: Main clock oscillator is stable so is available.." bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.byte 0x0 0. "HOCOSF,HOCO Clock Oscillation Stabilization FlagNOTE: The HOCOSF bit value after a reset is 1 when the OFS1.HOCOEN bit is 0. It is 0 when the OFS1.HOCOEN bit is 1." "0: HOCO clock is stopped or is not yet stable,1: HOCO clock is stable so is available for use as.." group.byte 0x3E++0x3 line.byte 0x0 "CKOCR,Clock Out Control Register" bitfld.byte 0x0 7. "CKOEN,Clock out enable" "0: Disable clock out,1: Enable clock out" bitfld.byte 0x0 4.--6. "CKODIV,Clock out input frequency Division Select" "0: /1,1: /2,?,?,?,?,?,?" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "TRCKCR,Trace Clock Control Register" bitfld.byte 0x1 7. "TRCKEN,Trace Clock operating Enable" "0: Stop,1: Operation enable" bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 4. "TRCKSEL,Trace Clock source select" "0: System clock source (value after reset),1: HOCO (oscillation in debug mode)" hexmask.byte 0x1 0.--3. 1. "TRCK,Trace Clock operating frequency select" line.byte 0x2 "OSTDCR,Oscillation Stop Detection Control Register" bitfld.byte 0x2 7. "OSTDE,Oscillation Stop Detection Function Enable" "0: Disable oscillation stop detection function,1: Enable oscillation stop detection function" hexmask.byte 0x2 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x2 0. "OSTDIE,Oscillation Stop Detection Interrupt Enable" "0: Disable oscillation stop detection interrupt (do..,1: Enable oscillation stop detection interrupt.." line.byte 0x3 "OSTDSR,Oscillation Stop Detection Status Register" hexmask.byte 0x3 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x3 0. "OSTDF,Oscillation Stop Detection Flag" "0: Main clock oscillation stop not detected,1: Main clock oscillation stop detected" rgroup.byte 0x43++0x0 line.byte 0x0 "OSCMONR,Oscillator Monitor Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "LOCOMON,LOCO operation monitor" "0: LOCO is set to operate.,1: LOCO is set to stop" newline bitfld.byte 0x0 1. "MOCOMON,MOCO operation monitor" "0: MOCO is set to operate.,1: MOCO is set to stop." bitfld.byte 0x0 0. "Reserved,This bit is read as 0." "0,1" group.word 0x48++0x1 line.word 0x0 "PLL2CCR,PLL2 Clock Control Register" hexmask.word.byte 0x0 8.--15. 1. "PLL2MUL,PLL2 Frequency Multiplication Factor Select" bitfld.word 0x0 6.--7. "PLL2MULNF,PLL2 Frequency Multiplication Fractional Factor Select" "0: 0.00 (Value after reset),1: 0.33 (1/3),?,?" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PL2SRCSEL,PLL Clock Source Select" "0: Main clock oscillator,1: HOCO" newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0.--1. "PL2IDIV,PLL2 Input Frequency Division Ratio Select" "0: /1 (Value after reset),1: /2,?,?" group.byte 0x4A++0x0 line.byte 0x0 "PLL2CR,PLL2 Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PLL2STP,PLL2 Stop Control" "0: Operate the PLL2,1: Stop the PLL2." group.word 0x4C++0x3 line.word 0x0 "PLLCCR2,PLL Clock Control Register 2" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 8.--11. 1. "PLODIVR,PLL1 Output Frequency Division Ratio Select for output clock R" newline hexmask.word.byte 0x0 4.--7. 1. "PLODIVQ,PLL1 Output Frequency Division Ratio Select for output clock Q" hexmask.word.byte 0x0 0.--3. 1. "PLODIVP,PLL1 Output Frequency Division Ratio Select for output clock P" line.word 0x2 "PLL2CCR2,PLL2 Clock Control Register 2" hexmask.word.byte 0x2 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x2 8.--11. 1. "PL2ODIVR,PLL2 Output Frequency Division Ratio Select for output clock R" newline hexmask.word.byte 0x2 4.--7. 1. "PL2ODIVQ,PLL2 Output Frequency Division Ratio Select for output clock Q" hexmask.word.byte 0x2 0.--3. 1. "PL2ODIVP,PLL2 Output Frequency Division Ratio Select for output clock P" group.byte 0x52++0x5 line.byte 0x0 "EBCKOCR,External Bus Clock Output Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "EBCKOEN,BCLK Pin Output Control" "0: Disable EBCLK pin output (fixed high),1: Enable EBCLK pin output" line.byte 0x1 "SDCKOCR,SDRAM Clock Output Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SDCKOEN,SDCLK Pin Output Control" "0: Disable SDCLK pin output (fixed high),1: Enable SDCLK pin output" line.byte 0x2 "SCICKDIVCR,SCI clock Division control register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x3 "SCICKCR,SCI clock control register" rbitfld.byte 0x3 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x3 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x3 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x3 0.--3. 1. "CKSEL,Clock Source Select" line.byte 0x4 "SPICKDIVCR,SPI clock Division control register" hexmask.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x4 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x5 "SPICKCR,SPI clock control register" rbitfld.byte 0x5 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x5 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x5 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x5 0.--3. 1. "CKSEL,Clock Source Select" group.byte 0x5A++0x5 line.byte 0x0 "ADCCKDIVCR,ADC clock Division control register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x1 "ADCCKCR,ADC clock control register" rbitfld.byte 0x1 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x1 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x1 0.--3. 1. "CKSEL,Clock Source Select" line.byte 0x2 "GPTCKDIVCR,GPT clock Division control register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x3 "GPTCKCR,GPT clock control register" rbitfld.byte 0x3 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x3 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x3 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x3 0.--3. 1. "CKSEL,Clock Source Select" line.byte 0x4 "LCDCKDIVCR,LCD clock Division control register" hexmask.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x4 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x5 "LCDCKCR,LCD clock control register" rbitfld.byte 0x5 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x5 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x5 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x5 0.--3. 1. "CKSEL,Clock Source Select" group.byte 0x61++0x1 line.byte 0x0 "MOCOUTCR,MOCO User Trimming Control Register" hexmask.byte 0x0 0.--7. 1. "MOCOUTRM,MOCO User Trimming" line.byte 0x1 "HOCOUTCR,HOCO User Trimming Control Register" hexmask.byte 0x1 0.--7. 1. "HOCOUTRM,HOCO User Trimming" group.byte 0x6C++0x4 line.byte 0x0 "USBCKDIVCR,USB clock Division control register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "USBCKDIV,USB clock (USBCLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x1 "OCTACKDIVCR,Octal-SPI clock Division control register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "OCTACKDIV,Octal-SPI clock (OCTACLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x2 "CANFDCKDIVCR,CANFD Core clock Division control register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 0.--2. "CANFDCKDIV,CANFD Core clock (CANFDCLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x3 "USB60CKDIVCR,USB60 clock Division control register" hexmask.byte 0x3 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x3 0.--2. "USB60CKDIV,USB clock (USB60CLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x4 "I3CCKDIVCR,I3C clock Division control register" hexmask.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x4 0.--2. "I3CCKDIV,I3C clock (I3CCLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" group.byte 0x74++0x4 line.byte 0x0 "USBCKCR,USB clock control register" bitfld.byte 0x0 7. "USBCKSRDY,USB clock (USBCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x0 6. "USBCKSREQ,USB clock (USBCLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "USBCKSEL,USB clock (USBCLK) Source Select" line.byte 0x1 "OCTACKCR,Octal-SPI clock control register" bitfld.byte 0x1 7. "OCTACKSRDY,Octal-SPI clock (OCTACLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x1 6. "OCTACKSREQ,Octal-SPI clock (OCTACLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x1 0.--3. 1. "OCTACKSEL,Octal-SPI clock (OCTACLK) Source Select" line.byte 0x2 "CANFDCKCR,CANFD Core clock control register" bitfld.byte 0x2 7. "CANFDCKSRDY,CANFD Core clock (CANFDCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x2 6. "CANFDCKSREQ,CANFD Core clock (CANFDCLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x2 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x2 0.--3. 1. "CANFDCKSEL,CANFD Core clock (CANFDCLK) Source Select" line.byte 0x3 "USB60CKCR,USB60 clock control register" bitfld.byte 0x3 7. "USB60CKSRDY,USB clock (USB60CLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x3 6. "USB60CKSREQ,USB clock (USB60CLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x3 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x3 0.--3. 1. "USB60CKSEL,USB clock (USB60CLK) Source Select" line.byte 0x4 "I3CCKCR,I3C clock control register" bitfld.byte 0x4 7. "I3CCKSRDY,I3C clock (I3CCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x4 6. "I3CCKREQ,I3C clock (I3CCLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x4 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x4 0.--3. 1. "I3CCKSEL,I3C clock (I3CCLK) Source Select" group.byte 0x7C++0x1 line.byte 0x0 "MOSCSCR,Main Clock Oscillator Standby Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MOSCSOKP,Main Clock Oscillator Standby Oscillation Keep select" "0: Disable,1: Enable" line.byte 0x1 "HOCOSCR,High-Speed On-Chip Oscillator Standby Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "HOCOSOKP,HOCO Standby Oscillation Keep select" "0: Disable,1: Enable" group.byte 0xA0++0x0 line.byte 0x0 "OPCCR,Operating Power Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "OPCMTSF,Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition" newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0.--1. "OPCM,Operating Power Control Mode Select" "0: Setting prohibited,1: Prohibited,?,?" group.byte 0xA2++0x0 line.byte 0x0 "MOSCWTCR,Main Clock Oscillator Wait Control Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "MSTS,Main clock oscillator wait time setting" group.long 0xC0++0x3 line.long 0x0 "RSTSR1,Reset Status Register 1" hexmask.long.word 0x0 23.--31. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." bitfld.long 0x0 22. "NWRF,Network Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Network Reset not detected.,1: Network Reset detected." newline bitfld.long 0x0 21. "LM1RF,Local memory 1 error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Local memory 1 error reset not detected.,1: Local memory 1 error reset detected." bitfld.long 0x0 20. "CLU1RF,CPU1 Lockup Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: CPU1 Lockup reset not detected.,1: CPU1 Lockup reset detected." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "WDT1RF,Watchdog Timer1 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Watchdog timer1 reset not detected.,1: Watchdog timer1 reset detected." newline bitfld.long 0x0 16. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "CMRF,Common memory error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Common memory error reset not detected.,1: Common memory error reset detected." bitfld.long 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 10. "BUSRF,Bus error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Bus error reset not detected.,1: Bus error reset detected." hexmask.long.byte 0x0 6.--9. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 5. "LM0RF,Local memory 0 error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Local memory 0 error reset not detected.,1: Local memory 0 error reset detected." bitfld.long 0x0 4. "CLU0RF,CPU0 Lockup Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: CPU0 Lockup reset not detected.,1: CPU0 Lockup reset detected." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "SWRF,Software Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Software reset not detected.,1: Software reset detected." newline bitfld.long 0x0 1. "WDT0RF,Watchdog Timer0 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Watchdog timer0 reset not detected.,1: Watchdog timer0 reset detected." bitfld.long 0x0 0. "IWDTRF,Independent Watchdog Timer Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Independent watchdog timer reset not detected.,1: Independent watchdog timer reset detected." group.byte 0xCC++0x0 line.byte 0x0 "SYRACCR,System Register Access Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BUSY,Access Ready monitor" "0: Ready to read/write access,1: Writing in progress" repeat 2. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xE0)++0x0 line.byte 0x0 "PVD$1CR1,Voltage Monitor %s Circuit Control Register 1" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "IRQSEL,Voltage Monitor Interrupt Type Select" "0: Non-maskable interrupt,1: Maskable interrupt" newline bitfld.byte 0x0 0.--1. "IDTSEL,Voltage Monitor Interrupt Generation Condition Select" "0: Generate when VCC>=Vdet (rise) is detected,1: Generate when VCC Vdet or MON bit is disabled" newline bitfld.byte 0x0 0. "DET,Voltage Monitor Voltage Change Detection Flag NOTE: Only 0 can be written to this bit. After writing 0 to this bit it takes 2 system clock cycles for the bit to be read as 0." "0: Not detected,1: Vdet passage detection" repeat.end group.byte 0xF0++0x0 line.byte 0x0 "CRVSYSCR,Clock Recovery System Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CRVEN,Clock Recovery Enable" "0: Disable,1: Enable" group.byte 0x110++0x0 line.byte 0x0 "PDCTRGD,Graphics Power Domain Control Register" rbitfld.byte 0x0 7. "PDPGSF,Power gating status flag" "0: Target domain is power on (not gating),1: Target domain is power off (during Gating)" rbitfld.byte 0x0 6. "PDCSF,Power control status flag" "0: Power gating control is not executed (idle),1: Power gating control is in progress" newline hexmask.byte 0x0 1.--5. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0. "PDDE,Power control enable" "0: Power on the target domain,1: Power off the target domain" group.word 0x140++0x1 line.word 0x0 "PDRAMSCR0,SRAM power domain Standby Control Register 0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.byte 0x142++0x0 line.byte 0x0 "PDRAMSCR1,SRAM power domain Standby Control Register 1" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x3B0++0x1 line.word 0x0 "VBRSABAR,VBATT Backup Register Security Attribute Boundary Address Register" hexmask.word 0x0 0.--15. 1. "SABA,Security Attribute Boundary Address" group.word 0x3B4++0x1 line.word 0x0 "VBRPABARS,VBATT Backup Register Privilege Attribute Boundary Address Register for Secure Region" hexmask.word 0x0 0.--15. 1. "PABAS,Privilege Attribute Boundary Address for Secure Region" group.word 0x3B8++0x1 line.word 0x0 "VBRPABARNS,VBATT Backup Register Privilege Attribute Boundary Address Register for Non-secure Region" hexmask.word 0x0 0.--15. 1. "PABANS,Privilege Attribute Boundary Address for Non-secure Region" group.long 0x3C0++0x13 line.long 0x0 "CGFSAR,Clock Generation Function Security Attribute Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "NONSEC26,Non-secure Attribute bit 26" "0: Secure,1: Non-secure" newline bitfld.long 0x0 25. "NONSEC25,Non-secure Attribute bit 25" "0: Secure,1: Non-secure" bitfld.long 0x0 24. "NONSEC24,Non-secure Attribute bit 24" "0: Secure,1: Non-secure" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "NONSEC22,Non-secure Attribute bit 22" "0: Secure,1: Non-secure" newline bitfld.long 0x0 21. "NONSEC21,Non-secure Attribute bit 21" "0: Secure,1: Non-secure" bitfld.long 0x0 20. "NONSEC20,Non-secure Attribute bit 20" "0: Secure,1: Non-secure" newline bitfld.long 0x0 19. "NONSEC19,Non-secure Attribute bit 19" "0: Secure,1: Non-secure" bitfld.long 0x0 18. "NONSEC18,Non-secure Attribute bit 18" "0: Secure,1: Non-secure" newline bitfld.long 0x0 17. "NONSEC17,Non-secure Attribute bit 17" "0: Secure,1: Non-secure" bitfld.long 0x0 16. "NONSEC16,Non-secure Attribute bit 16" "0: Secure,1: Non-secure" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "NONSEC13,Non-secure Attribute bit 13" "0: Secure,1: Non-secure" newline bitfld.long 0x0 12. "NONSEC12,Non-secure Attribute bit 12" "0: Secure,1: Non-secure" bitfld.long 0x0 11. "NONSEC11,Non-secure Attribute bit 11" "0: Secure,1: Non-secure" newline bitfld.long 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 9. "NONSEC09,Non-secure Attribute bit 9" "0: Secure,1: Non-secure" newline bitfld.long 0x0 8. "NONSEC08,Non-secure Attribute bit 8" "0: Secure,1: Non-secure" bitfld.long 0x0 7. "NONSEC07,Non-secure Attribute bit 7" "0: Secure,1: Non-secure" newline bitfld.long 0x0 6. "NONSEC06,Non-secure Attribute bit 6" "0: Secure,1: Non-secure" bitfld.long 0x0 5. "NONSEC05,Non-secure Attribute bit 5" "0: Secure,1: Non-secure" newline bitfld.long 0x0 4. "NONSEC04,Non-secure Attribute bit 4" "0: Secure,1: Non-secure" bitfld.long 0x0 3. "NONSEC03,Non-secure Attribute bit 3" "0: Secure,1: Non-secure" newline bitfld.long 0x0 2. "NONSEC02,Non-secure Attribute bit 2" "0: Secure,1: Non-secure" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "NONSEC00,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" line.long 0x4 "RSTSAR,Reset Security Attribution Register" hexmask.long 0x4 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." bitfld.long 0x4 3. "NONSEC3,Non-secure Attribute bit 3" "0: Secure,1: Non-secure" newline bitfld.long 0x4 2. "NONSEC2,Non-secure Attribute bit 2" "0: Secure,1: Non-secure" bitfld.long 0x4 1. "NONSEC1,Non-secure Attribute bit 1" "0: Secure,1: Non-secure" newline bitfld.long 0x4 0. "NONSEC0,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" line.long 0x8 "LPMSAR,Low Power Mode Security Attribution Register" hexmask.long.word 0x8 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x8 21. "NONSEC21,Non-secure Attribute bit 21" "0: Secure,1: Non-secure" newline bitfld.long 0x8 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 19. "NONSEC19,Non-secure Attribute bit 19" "0: Secure,1: Non-secure" newline bitfld.long 0x8 18. "NONSEC18,Non-secure Attribute bit 18" "0: Secure,1: Non-secure" bitfld.long 0x8 17. "NONSEC17,Non-secure Attribute bit 17" "0: Secure,1: Non-secure" newline bitfld.long 0x8 16. "NONSEC16,Non-secure Attribute bit 16" "0: Secure,1: Non-secure" hexmask.long.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 8. "NONSEC8,Non-secure Attribute bit 08" "0: Secure,1: Non-secure" hexmask.long.byte 0x8 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x8 3. "NONSEC3,Non-secure Attribute bit 03" "0: Secure,1: Non-secure" bitfld.long 0x8 2. "NONSEC2,Non-secure Attribute bit 02" "0: Secure,1: Non-secure" newline bitfld.long 0x8 1. "NONSEC1,Non-secure Attribute bit 01" "0: Secure,1: Non-secure" bitfld.long 0x8 0. "NONSEC0,Non-secure Attribute bit 00" "0: Secure,1: Non-secure" line.long 0xC "PVDSAR,Programable Voltage Detection Security Attribution Register" hexmask.long 0xC 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." bitfld.long 0xC 1. "NONSEC1,Non-secure Attribute bit 1" "0: Secure,1: Non-secure" newline bitfld.long 0xC 0. "NONSEC0,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" line.long 0x10 "BBFSAR,Battery Backup Function Security Attribute Register" hexmask.long 0x10 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." bitfld.long 0x10 4. "NONSEC4,Non-secure Attribute bit 4" "0: Secure,1: Non-secure" newline bitfld.long 0x10 3. "NONSEC3,Non-secure Attribute bit 3" "0: Secure,1: Non-secure" bitfld.long 0x10 2. "NONSEC2,Non-secure Attribute bit 2" "0: Secure,1: Non-secure" newline bitfld.long 0x10 1. "NONSEC1,Non-secure Attribute bit 1" "0: Secure,1: Non-secure" bitfld.long 0x10 0. "NONSEC0,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" group.long 0x3D8++0x3 line.long 0x0 "PGCSAR,Power Gating Control Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "NONSEC2,Non-secure Attribute bit 02" "0: Secure,1: Non-secure" bitfld.long 0x0 1. "NONSEC1,Non-secure Attribute bit 01" "0: Secure,1: Non-secure" newline bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x3E0++0x7 line.long 0x0 "DPFSAR,Deep Standby Interrupt Factor Security Attribution Register" bitfld.long 0x0 31. "DPFSA31,Deep Standby Interrupt Factor Security Attribute bit 31" "0: Secure,1: Non-secure" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 29. "DPFSA29,Deep Standby Interrupt Factor Security Attribute bit 29" "0: Secure,1: Non-secure" bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 27. "DPFSA27,Deep Standby Interrupt Factor Security Attribute bit 27" "0: Secure,1: Non-secure" bitfld.long 0x0 26. "DPFSA26,Deep Standby Interrupt Factor Security Attribute bit 26" "0: Secure,1: Non-secure" newline bitfld.long 0x0 25. "DPFSA25,Deep Standby Interrupt Factor Security Attribute bit 25" "0: Secure,1: Non-secure" bitfld.long 0x0 24. "DPFSA24,Deep Standby Interrupt Factor Security Attribute bit 24" "0: Secure,1: Non-secure" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 20. "DPFSA20,Deep Standby Interrupt Factor Security Attribute bit 20" "0: Secure,1: Non-secure" newline bitfld.long 0x0 19. "DPFSA19,Deep Standby Interrupt Factor Security Attribute bit 19" "0: Secure,1: Non-secure" bitfld.long 0x0 18. "DPFSA18,Deep Standby Interrupt Factor Security Attribute bit 18" "0: Secure,1: Non-secure" newline bitfld.long 0x0 17. "DPFSA17,Deep Standby Interrupt Factor Security Attribute bit 17" "0: Secure,1: Non-secure" bitfld.long 0x0 16. "DPFSA16,Deep Standby Interrupt Factor Security Attribute bit 16" "0: Secure,1: Non-secure" line.long 0x4 "RSCSAR,RAM Standby Control Security Attribution Register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "RSCSA17,RAM Standby Control Security Attribute bit 17" "0: Secure,1: Non-secure" newline bitfld.long 0x4 16. "RSCSA16,RAM Standby Control Security Attribute bit 16" "0: Secure,1: Non-secure" bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 14. "RSCSA14,RAM Standby Control Security Attribute bit 14" "0: Secure,1: Non-secure" bitfld.long 0x4 13. "RSCSA13,RAM Standby Control Security Attribute bit 13" "0: Secure,1: Non-secure" newline bitfld.long 0x4 12. "RSCSA12,RAM Standby Control Security Attribute bit 12" "0: Secure,1: Non-secure" bitfld.long 0x4 11. "RSCSA11,RAM Standby Control Security Attribute bit 11" "0: Secure,1: Non-secure" newline bitfld.long 0x4 10. "RSCSA10,RAM Standby Control Security Attribute bit 10" "0: Secure,1: Non-secure" bitfld.long 0x4 9. "RSCSA9,RAM Standby Control Security Attribute bit 09" "0: Secure,1: Non-secure" newline bitfld.long 0x4 8. "RSCSA8,RAM Standby Control Security Attribute bit 08" "0: Secure,1: Non-secure" bitfld.long 0x4 7. "RSCSA7,RAM Standby Control Security Attribute bit 07" "0: Secure,1: Non-secure" newline bitfld.long 0x4 6. "RSCSA6,RAM Standby Control Security Attribute bit 06" "0: Secure,1: Non-secure" bitfld.long 0x4 5. "RSCSA5,RAM Standby Control Security Attribute bit 05" "0: Secure,1: Non-secure" newline bitfld.long 0x4 4. "RSCSA4,RAM Standby Control Security Attribute bit 04" "0: Secure,1: Non-secure" bitfld.long 0x4 3. "RSCSA3,RAM Standby Control Security Attribute bit 03" "0: Secure,1: Non-secure" newline bitfld.long 0x4 2. "RSCSA2,RAM Standby Control Security Attribute bit 02" "0: Secure,1: Non-secure" bitfld.long 0x4 1. "RSCSA1,RAM Standby Control Security Attribute bit 01" "0: Secure,1: Non-secure" newline bitfld.long 0x4 0. "RSCSA0,RAM Standby Control Security Attribute bit 00" "0: Secure,1: Non-secure" group.word 0x3FA++0x1 line.word 0x0 "PRCR_S,Protect Register for Secure Register" hexmask.word.byte 0x0 8.--15. 1. "PRKEY,PRC Key Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 5. "PRC5,Enables writing to the registers related the reset control." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 4. "PRC4,Enables writing to the registers related to the security and privilege setting registers." "0: Write disabled,1: Write enabled" bitfld.word 0x0 3. "PRC3,Enables writing to the registers related to the PVD." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "PRC1,Enables writing to the registers related to the operating modes the low power modes and the battery backup function." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 0. "PRC0,Enables writing to the registers related to the clock generation circuit." "0: Write disabled,1: Write enabled" group.word 0x3FE++0x1 line.word 0x0 "PRCR_NS,Protect Register for Non-secure Register" hexmask.word.byte 0x0 8.--15. 1. "PRKEY,PRC Key Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "PRC4,Enables writing to the registers related to the privilege setting registers." "0: Write disabled,1: Write enabled" bitfld.word 0x0 3. "PRC3,Enables writing to the registers related to the PVD." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "PRC1,Enables writing to the registers related to the operating modes the low power modes and the battery backup function." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 0. "PRC0,Enables writing to the registers related to the clock generation circuit." "0: Write disabled,1: Write enabled" group.byte 0x400++0x0 line.byte 0x0 "LOCOCR,Low-Speed On-Chip Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "LCSTP,LOCO Stop" "0: Operate the LOCO clock,1: Stop the LOCO clock" group.byte 0x402++0x0 line.byte 0x0 "LOCOUTCR,LOCO User Trimming Control Register" hexmask.byte 0x0 0.--7. 1. "LOCOUTRM,LOCO User Trimming" group.byte 0xA00++0x0 line.byte 0x0 "DPSBYCR,Deep Standby Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "IOKEEP,I/O Port Retention" "0: When the Deep Software Standby mode is canceled..,1: When the Deep Software Standby mode is canceled.." newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "SRKEEP,Standby RAM Retention" "0: When entering the Software Standby mode or the..,1: When entering the Software Standby mode or the.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "DCSSMODE,DCDC SSMODE" "0: When the Deep Software Standby mode is canceled..,1: When the Deep Software Standby mode is canceled.." newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.byte 0xA04++0x0 line.byte 0x0 "DPSWCR,Deep Standby Wait Control Register" hexmask.byte 0x0 0.--7. 1. "WTSTS,Deep Software Wait Standby Time Setting Bit" group.byte 0xA08++0x0 line.byte 0x0 "DPSIER0,Deep Standby Interrupt Enable Register 0" bitfld.byte 0x0 7. "DIRQ7E,IRQ7-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 6. "DIRQ6E,IRQ6-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 5. "DIRQ5E,IRQ5-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 4. "DIRQ4E,IRQ4-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 3. "DIRQ3E,IRQ3-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DIRQ2E,IRQ2-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DIRQ1E,IRQ1-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: DS Pin Enable" bitfld.byte 0x0 0. "DIRQ0E,IRQ0-DS Pin Enable" "0: DS Pin Enable,1: Cancelling deep software standby mode is enabled" group.byte 0xA0C++0x0 line.byte 0x0 "DPSIER1,Deep Standby Interrupt Enable Register 1" bitfld.byte 0x0 7. "DIRQ15E,IRQ15-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled" bitfld.byte 0x0 6. "DIRQ14E,IRQ14-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 5. "DIRQ13E,IRQ13-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 4. "DIRQ12E,IRQ12-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 3. "DIRQ11E,IRQ11-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DIRQ10E,IRQ10-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DIRQ9E,IRQ9-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 0. "DIRQ8E,IRQ8-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" group.byte 0xA10++0x0 line.byte 0x0 "DPSIER2,Deep Standby Interrupt Enable Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "DNMIE,NMI Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 3. "DRTCAIE,RTC Alarm interrupt Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DTRTCIIE,RTC Interval interrupt Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DPVD2IE,PVD2 Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 0. "DPVD1IE,PVD1 Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" group.byte 0xA14++0x0 line.byte 0x0 "DPSIER3,Deep Standby Interrupt Enable Register 3" bitfld.byte 0x0 7. "DVBATTADIE,VBATT Tamper Detection Deep Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "DIWDTIE,IWDT Overflow Deep Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled" bitfld.byte 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 3. "DULPT1IE,ULPT1 Overflow Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DULPT0IE,ULPT0 Overflow Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DUSBHSIE,USBHS Suspend/Resume Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 0. "DUSBFSIE,USBFS Suspend/Resume Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" group.byte 0xA18++0x0 line.byte 0x0 "DPSIFR0,Deep Standby Interrupt Flag Register 0" bitfld.byte 0x0 7. "DIRQ7F,IRQ7-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 6. "DIRQ6F,IRQ6-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 5. "DIRQ5F,IRQ5-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 4. "DIRQ4F,IRQ4-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 3. "DIRQ3F,IRQ3-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DIRQ2F,IRQ2-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DIRQ1F,IRQ1-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: DS Pin Deep Standby Cancel Flag" bitfld.byte 0x0 0. "DIRQ0F,IRQ0-DS Pin Deep Standby Cancel Flag" "0: DS Pin Deep Standby Cancel Flag,1: The cancel request is generated" group.byte 0xA1C++0x0 line.byte 0x0 "DPSIFR1,Deep Standby Interrupt Flag Register 1" bitfld.byte 0x0 7. "DIRQ15F,IRQ15-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 6. "DIRQ14F,IRQ14-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 5. "DIRQ13F,IRQ13-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 4. "DIRQ12F,IRQ12-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 3. "DIRQ11F,IRQ11-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DIRQ10F,IRQ10-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DIRQ9F,IRQ9-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 0. "DIRQ8F,IRQ8-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0xA20++0x0 line.byte 0x0 "DPSIFR2,Deep Standby Interrupt Flag Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "DNMIF,NMI Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 3. "DRTCAIF,RTC Alarm interrupt Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DTRTCIIF,RTC Interval interrupt Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DPVD2IF,PVD2 Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 0. "DPVD1IF,PVD1 Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0xA24++0x0 line.byte 0x0 "DPSIFR3,Deep Standby Interrupt Flag Register 3" bitfld.byte 0x0 7. "DVBATTADIF,VBATT Tamper Detection Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "DIWDTIF,IWDT Overflow Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 3. "DULPT1IF,ULPT1 Overflow Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DULPT0IF,ULPT0 Overflow Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DUSBHSIF,USBHS Suspend/Resume Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 0. "DUSBFSIF,USBFS Suspend/Resume Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0xA28++0x0 line.byte 0x0 "DPSIEGR0,Deep Standby Interrupt Edge Register 0" bitfld.byte 0x0 7. "DIRQ7EG,IRQ7-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 6. "DIRQ6EG,IRQ6-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 5. "DIRQ5EG,IRQ5-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 4. "DIRQ4EG,IRQ4-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 3. "DIRQ3EG,IRQ3-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 2. "DIRQ2EG,IRQ2-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 1. "DIRQ1EG,IRQ1-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: DS Pin Edge Select" bitfld.byte 0x0 0. "DIRQ0EG,IRQ0-DS Pin Edge Select" "0: DS Pin Edge Select,1: A cancel request is generated at a rising edge" group.byte 0xA2C++0x0 line.byte 0x0 "DPSIEGR1,Deep Standby Interrupt Edge Register 1" bitfld.byte 0x0 7. "DIRQ15EG,IRQ15-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 6. "DIRQ14EG,IRQ14-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 5. "DIRQ13EG,IRQ13-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 4. "DIRQ12EG,IRQ12-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 3. "DIRQ11EG,IRQ11-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 2. "DIRQ10EG,IRQ10-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 1. "DIRQ9EG,IRQ9-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 0. "DIRQ8EG,IRQ8-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" group.byte 0xA30++0x0 line.byte 0x0 "DPSIEGR2,Deep Standby Interrupt Edge Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "DNMIEG,NMI Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "DPVD2EG,PVD2 Edge Select" "0: A cancel request is generated when VCC=Vdet2.." newline bitfld.byte 0x0 0. "DPVD1EG,PVD1 Edge Select" "0: A cancel request is generated when VCC=Vdet1.." group.byte 0xA38++0x0 line.byte 0x0 "SYOCDCR,System Control OCD Control Register" bitfld.byte 0x0 7. "DBGEN,Debugger Enable bit" "0: Disable on-chip debugger function,1: Enable on-chip debugger function" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "DOCDF,Deep Standby OCD flag" "0: DBIRQ is not generated.,1: DBIRQ is generated." group.byte 0xA40++0x0 line.byte 0x0 "RSTSR0,Reset Status Register 0" bitfld.byte 0x0 7. "DPSRSTF,Deep Software Standby Reset FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Deep software standby mode cancelation not..,1: Deep software standby mode cancelation requested.." bitfld.byte 0x0 6. "PVD5RF,Voltage Monitor 5 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 5 reset not detected.,1: Voltage Monitor 5 reset detected." newline bitfld.byte 0x0 5. "PVD4RF,Voltage Monitor 4 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 4 reset not detected.,1: Voltage Monitor 4 reset detected." bitfld.byte 0x0 4. "PVD3RF,Voltage Monitor 3 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 3 reset not detected.,1: Voltage Monitor 3 reset detected." newline bitfld.byte 0x0 3. "PVD2RF,Voltage Monitor 2 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 2 reset not detected.,1: Voltage Monitor 2 reset detected." bitfld.byte 0x0 2. "PVD1RF,Voltage Monitor 1 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 1 reset not detected.,1: Voltage Monitor 1 reset detected." newline bitfld.byte 0x0 1. "PVD0RF,Voltage Monitor 0 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 0 reset not detected.,1: Voltage Monitor 0 reset detected." bitfld.byte 0x0 0. "PORF,Power-On Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Power-on reset not detected.,1: Power-on reset detected." group.byte 0xA44++0x0 line.byte 0x0 "RSTSR2,Reset Status Register 2" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CWSF,Cold/Warm Start Determination Flag" "0: Cold start,1: Warm start" group.byte 0xA48++0x0 line.byte 0x0 "RSTSR3,Reset Status Register 3" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "OCPRF,Overcurrent protection reset Detect Flag" "0: Overcurrent protection reset not detected.,1: Overcurrent protection reset detected." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 000. The write value should be 000." group.byte 0xA50++0x0 line.byte 0x0 "MOMCR,Main Clock Oscillator Mode Oscillation Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "MOSEL,Main Clock Oscillator Switching" "0: Resonator,1: External clock input" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "AGCEN,Auto Gain Control Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--3. "MODRV0,Main Clock Oscillator Drive Capability 0 Switching" "0: 8MHz,1: 8.1MHz to 16MHz,?,?,?,?,?,?" bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.byte 0xA54++0x0 line.byte 0x0 "FWEPROR,Flash Write Erase Protect Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "FLWE,Flash Programing and Erasure" "0: Prohibits programming and erasure of the code..,1: Permits programming and erasure of the code..,?,?" group.byte 0xA58++0x0 line.byte 0x0 "PVD1CMPCR,Voltage Monitor 1 Comparator Control Register" bitfld.byte 0x0 7. "PVDE,Voltage Detection 1 Enable" "0: Voltage detection 1 circuit disabled,1: Voltage detection 1 circuit enabled" bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "PVDLVL,Detection Voltage 1 Level Select(Standard voltage during drop in voltage)" group.byte 0xA5C++0x0 line.byte 0x0 "PVD2CMPCR,Voltage Monitor 2 Comparator Control Register" bitfld.byte 0x0 7. "PVDE,Voltage Detection 2 Enable" "0: Voltage detection 2 circuit disabled,1: Voltage detection 2 circuit enabled" bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "PVDLVL,Detection Voltage 2 Level Select(Standard voltage during drop in voltage)" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xA70)++0x0 line.byte 0x0 "PVD$1CR0,Voltage Monitor %s Circuit Control Register 0" bitfld.byte 0x0 7. "RN,Voltage Monitor Reset Negate Select" "0: Negation follows a stabilization time (tPVD)..,1: Negation follows a stabilization time (tPVD).." bitfld.byte 0x0 6. "RI,Voltage Monitor Circuit Mode Select" "0: Voltage Monitor interrupt during Vdet1 passage,1: Voltage Monitor reset enabled when the voltage.." newline bitfld.byte 0x0 4.--5. "FSAMP,Sampling Clock Select" "0: 1/2 LOCO frequency,1: 1/4 LOCO frequency,?,?" bitfld.byte 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.byte 0x0 2. "CMPE,Voltage Monitor Circuit Comparison Result Output Enable" "0: Disable voltage monitor 1 circuit comparison..,1: Enable voltage monitor 1 circuit comparison.." bitfld.byte 0x0 1. "DFDIS,Voltage Monitor Digital Filter Disable Mode Select" "0: Enable digital filter,1: Disable digital filter" newline bitfld.byte 0x0 0. "RIE,Voltage Monitor Interrupt/Reset Enable" "0: Disable,1: Enable" repeat.end group.byte 0xA84++0x0 line.byte 0x0 "VBATTMNSELR,Battery Backup Voltage Monitor Function Select Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "VBATTMNSEL,VBATT Voltage Monitor Function Select Bit" "0,1" group.byte 0xA88++0x0 line.byte 0x0 "VBTBPCR1,VBATT Battery Power Supply Control Register 1" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BPWSWSTP,Battery Power Supply Switch Stop" "0: Battery power supply switch enable,1: Battery power supply switch stop" group.byte 0xA90++0x0 line.byte 0x0 "LPSCR,Low Power State Control Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "LPMD,Low power mode setting bit" group.byte 0xA98++0x0 line.byte 0x0 "SSCR1,Software Standby Control Register 1" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SS1FR,Software Standby 1 Fast Return" "0: When returning from Software Standby mode 1 fast..,1: When returning from Software Standby mode 1 fast.." group.byte 0xAB0++0x0 line.byte 0x0 "LVOCR,Low Power State Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "LVO1E,Low Voltage Operation 1 Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 0. "LVO0E,Low Voltage Operation 0 Enable" "0: Disable,1: Enable" group.byte 0xAD0++0x0 line.byte 0x0 "SYRSTMSK0,System Reset Mask Control Register0" bitfld.byte 0x0 7. "BUSMASK,BUS error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 6. "CMMASK,Common memory error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 5. "LM0MASK,Local memory 0 error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 4. "CLUP0MASK,CPU0 Lockup Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "SWMASK,Software Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 1. "WDT0MASK,CPU0 Watchdog timer Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 0. "IWDTMASK,Independent watchdog timer Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." group.byte 0xAD4++0x0 line.byte 0x0 "SYRSTMSK1,System Reset Mask Control Register1" bitfld.byte 0x0 7. "NWMASK,Network Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "LM1MASK,Local memory 1 error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 4. "CLUP1MASK,CPU1 Lockup Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "WDT1MASK,CPU1 Watchdog timer Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.byte 0xAD8++0x0 line.byte 0x0 "SYRSTMSK2,System Reset Mask Control Register2" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PVD5MASK,Voltage Monitor 5 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 3. "PVD4MASK,Voltage Monitor 4 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 2. "PVD3MASK,Voltage Monitor 3 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 1. "PVD2MASK,Voltage Monitor 2 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 0. "PVD1MASK,Voltage Monitor 1 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." group.byte 0xB04++0x0 line.byte 0x0 "PLL1LDOCR,PLL1-LDO Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "SKEEP,STBY Keep" "0: PLL1-LDO is stopped during Software Standby mode.,1: PLL1-LDO state before Software Standby mode is.." bitfld.byte 0x0 0. "LDOSTP,LDO Stop" "0: PLL1-LDO is enabled,1: PLL1-LDO is stopped" group.byte 0xB08++0x0 line.byte 0x0 "PLL2LDOCR,PLL2-LDO Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "SKEEP,STBY Keep" "0: PLL2-LDO is stopped during Software Standby mode.,1: PLL2-LDO state before Software Standby mode is.." bitfld.byte 0x0 0. "LDOSTP,LDO Stop" "0: PLL2-LDO is enabled,1: PLL2-LDO is stopped" group.byte 0xB0C++0x0 line.byte 0x0 "HOCOLDOCR,HOCO-LDO Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "SKEEP,STBY Keep" "0: HOCO-LDO is stopped during Software Standby mode.,1: HOCO-LDO state before Software Standby mode is.." bitfld.byte 0x0 0. "LDOSTP,LDO Stop" "0: HOCO-LDO is enabled,1: HOCO-LDO is stopped" group.byte 0xB10++0x0 line.byte 0x0 "MOMCR2,Main Clock Oscillator Mode Control Register 2" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MOMODE,Main Clock Oscillator Mode Select" "0: Normal crystal oscillator mode (value after reset),1: 8M to 12MHz custom ceramic mode" group.byte 0xC00++0x1 line.byte 0x0 "SOSCCR,Sub-clock oscillator control register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SOSTP,Sub-Clock Oscillator Stop" "0: Operate the sub-clock oscillator,1: Stop the sub-clock oscillator" line.byte 0x1 "SOMCR,Sub Clock Oscillator Mode Control Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "SOSEL,Sub Clock Oscillator Switching" "0: Resonator,1: External clock input" newline hexmask.byte 0x1 2.--5. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x1 0.--1. "SODRV,Sub Clock Oscillator Drive Capability Switching" "0: :Standard(12.5pf) (value after reset),1: Low power mode 1 (9pf),?,?" group.byte 0xC40++0x0 line.byte 0x0 "VBTBER,VBATT Backup Enable Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "VBAE,VBATT backup register access enable bit" "0: disable to access VBTBKR,1: enable to access VBTBKR" newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0xC45++0x1 line.byte 0x0 "VBTBPCR2,VBATT Battery Power Supply Control Register 2" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "VDETE,Voltage drop detection enable" "0: Controlled by the power on reset of VCC,1: VCC Voltage drop detection enable" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "VDETLVL,VDETBAT Level Select" "0: 2.8V,1: 2.53V,?,?,?,?,?,?" line.byte 0x1 "VBTBPSR,VBATT Battery Power Supply Status Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BPWSWM,Battery Power Supply Switch Status Monitor" "0: VCC voltage < VDETBAT,1: VCC voltage > VDETBAT" newline bitfld.byte 0x1 4. "VBPORM,VBATT_POR Monitor" "0: VBATT_R voltage < VVBATPOR,1: VBATT_R voltage > VVBATPOR" bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x1 0. "VBPORF,VBATT_POR Flag" "0: VBATT_R voltage drop is not detected,1: VBATT_R voltage drop is detected" group.byte 0xC48++0x2 line.byte 0x0 "VBTADSR,VBATT Tamper detection Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "VBTADF2,VBATT Tamper Detection flag 2" "0: RTCIC2 input edge is not detected,1: RTCIC2 input edge is detected" newline bitfld.byte 0x0 1. "VBTADF1,VBATT Tamper Detection flag 1" "0: RTCIC1 input edge is not detected,1: RTCIC1 input edge is detected" bitfld.byte 0x0 0. "VBTADF0,VBATT Tamper Detection flag 0" "0: RTCIC2 input edge is not detected,1: RTCIC2 input edge is detected" line.byte 0x1 "VBTADCR1,VBATT Tamper detection Control Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "VBTADCLE2,VBATT Tamper Detection Backup Register Clear Enable 2" "0: Clear Backup Register by VBTADF2 flag is disable,1: Clear Backup Register by VBTADF2 flag is enable" newline bitfld.byte 0x1 5. "VBTADCLE1,VBATT Tamper Detection Backup Register Clear Enable 1" "0: Clear Backup Register by VBTADF1 flag is disable,1: Clear Backup Register by VBTADF1 flag is enable" bitfld.byte 0x1 4. "VBTADCLE0,VBATT Tamper Detection Backup Register Clear Enable 0" "0: Clear Backup Register by VBTADF0 flag is disable,1: Clear Backup Register by VBTADF0 flag is enable" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "VBTADIE2,VBATT Tamper Detection Interrupt Enable 2" "0: Interrupt by VBTADF2 flag is disable,1: Interrupt by VBTADF2 flag is enable" newline bitfld.byte 0x1 1. "VBTADIE1,VBATT Tamper Detection Interrupt Enable 1" "0: Interrupt by VBTADF1 flag is disable,1: Interrupt by VBTADF1 flag is enable" bitfld.byte 0x1 0. "VBTADIE0,VBATT Tamper Detection Interrupt Enable 0" "0: Interrupt by VBTADF0 flag is disable,1: Interrupt by VBTADF0 flag is enable" line.byte 0x2 "VBTADCR2,VBATT Tamper detection Control Register 2" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 2. "VBRTCES2,VBATT RTC Time Capture Event Source Select 2" "0: RTCIC2,1: VBTADF2" newline bitfld.byte 0x2 1. "VBRTCES1,VBATT RTC Time Capture Event Source Select 1" "0: RTCIC1,1: VBTADF1" bitfld.byte 0x2 0. "VBRTCES0,VBATT RTC Time Capture Event Source Select 0" "0: RTCIC0,1: VBTADF0" group.byte 0xC4C++0x2 line.byte 0x0 "VBTICTLR,VBATT Input Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "VCH2INEN,RTCIC2 Input Enable" "0: Disabled,1: Enabled" newline bitfld.byte 0x0 1. "VCH1INEN,RTCIC1 Input Enable" "0: Disabled,1: Enabled" bitfld.byte 0x0 0. "VCH0INEN,RTCIC0 Input Enable" "0: Disabled,1: Enabled" line.byte 0x1 "VBTICTLR2,VBATT Input Control Register 2" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "VCH2EG,VBATT CH2 Input Edge Select" "0: RTCIC2 pin input event is detected on falling edge,1: RTCIC2 pin input event is detected on rising edge" newline bitfld.byte 0x1 5. "VCH1EG,VBATT CH1 Input Edge Select" "0: RTCIC1 pin input event is detected on falling edge,1: RTCIC1 pin input event is detected on rising edge" bitfld.byte 0x1 4. "VCH0EG,VBATT CH0 Input Edge Select" "0: RTCIC0 pin input event is detected on falling edge,1: RTCIC0 pin input event is detected on rising edge" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "VCH2NCE,VBATT CH2 Input Noise Canceler Enable" "0: RTCIC2 pin input noise canceler disable,1: RTCIC2 pin input noise canceler enable" newline bitfld.byte 0x1 1. "VCH1NCE,VBATT CH1 Input Noise Canceler Enable" "0: RTCIC1 pin inputs noise canceler disable,1: RTCIC1 pin input noise canceler enable" bitfld.byte 0x1 0. "VCH0NCE,VBATT CH0 Input Noise Canceler Enable" "0: RTCIC0 pin input noise canceler disable,1: RTCIC0 pin input noise canceler enable" line.byte 0x2 "VBTIMONR,VBATT Input Monitor Register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 2. "VCH2MON,VBATT CH2 Input monitor" "0: RTCIC2 pin input is low level,1: RTCIC2 pin input is high level." newline bitfld.byte 0x2 1. "VCH1MON,VBATT CH1 Input monitor" "0: RTCIC1 pin input is low level,1: RTCIC1 pin input is high level." bitfld.byte 0x2 0. "VCH0MON,VBATT CH0 Input monitor" "0: RTCIC0 pin input is low level,1: RTCIC0 pin input is high level." repeat 128. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0xD00)++0x0 line.byte 0x0 "VBTBKR$1,VBATT Backup Register %s" hexmask.byte 0x0 0.--7. 1. "VBTBKR,VBTBKRn [7:0] (n=0 to 127)" repeat.end tree.end tree "SYSC_NS" base ad:0x5001E000 group.byte 0xC++0x0 line.byte 0x0 "SBYCR,Standby Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "OPE,Output Port Enable" "0: In software standby mode or deep software..,1: In software standby mode or deep software.." newline hexmask.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.byte 0xE++0x0 line.byte 0x0 "SSCR2,Software Standby Control Register 2" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." rbitfld.byte 0x0 0. "SS1RSF,Software Standby 1 regulator status flag" "0: After returning from Software Standby mode 1 the..,1: After returning from Software Standby mode 1 the.." group.byte 0x10++0x0 line.byte 0x0 "FLSCR,Flash Standby Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.byte 0x0 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 0. "FLSWCF,Flash Stabilization wait completion flag" "0: Flash stabilization wait time is not completed..,1: Flash stabilization wait time is completed when.." group.long 0x20++0x3 line.long 0x0 "SCKDIVCR,System Clock Division Control Register" hexmask.long.byte 0x0 28.--31. 1. "FCK,Flash IF Clock (FCLK) Select" hexmask.long.byte 0x0 24.--27. 1. "ICK,System Clock (ICLK) Select" newline hexmask.long.byte 0x0 20.--23. 1. "PCKE,Peripheral Module Clock E (PCLKE) Select" hexmask.long.byte 0x0 16.--19. 1. "BCK,External Bus Clock (BCLK) Select" newline hexmask.long.byte 0x0 12.--15. 1. "PCKA,Peripheral Module Clock A (PCLKA) Select" hexmask.long.byte 0x0 8.--11. 1. "PCKB,Peripheral Module Clock B (PCLKB) Select" newline hexmask.long.byte 0x0 4.--7. 1. "PCKC,Peripheral Module Clock C (PCLKC) Select" hexmask.long.byte 0x0 0.--3. 1. "PCKD,Peripheral Module Clock D (PCLKD) Select" group.byte 0x24++0x0 line.byte 0x0 "SCKDIVCR2,System Clock Division Control Register 2" hexmask.byte 0x0 4.--7. 1. "CPUCK1,CPU1 Clock (CPUCLK1) Select" hexmask.byte 0x0 0.--3. 1. "CPUCK,CPU Clock (CPUCLK) Select" group.byte 0x26++0x0 line.byte 0x0 "SCKSCR,System Clock Source Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "CKSEL,Clock Source Select" "0: HOCO,1: MOCO,?,?,?,?,?,?" group.word 0x28++0x1 line.word 0x0 "PLLCCR,PLL Clock Control Register" hexmask.word.byte 0x0 8.--15. 1. "PLLMUL,PLL1 Frequency Multiplication Factor Select" bitfld.word 0x0 6.--7. "PLLMULNF,PLL1 Frequency Multiplication Fractional Factor Select" "0: 0.00 (Value after reset),1: 0.33 (1/3),?,?" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PLSRCSEL,PLL1 Clock Source Select" "0: Main clock oscillator,1: HOCO" newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0.--1. "PLIDIV,PLL1 Input Frequency Division Ratio Select" "0: /1,1: /2,?,?" group.byte 0x2A++0x0 line.byte 0x0 "PLLCR,PLL Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PLLSTP,PLL1 Stop Control" "0: Operate the PLL1,1: Stop the PLL1" group.byte 0x30++0x0 line.byte 0x0 "BCKCR,External Bus Clock Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BCLKDIV,BCLK Pin Output Select" "0: BCLK,1: BCLK/2" group.byte 0x32++0x0 line.byte 0x0 "MOSCCR,Main Clock Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MOSTP,Main Clock Oscillator Stop" "0: Main clock oscillator is operating.,1: Main clock oscillator is stopped." group.byte 0x36++0x0 line.byte 0x0 "HOCOCR,High-Speed On-Chip Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "HCSTP,HOCO Stop" "0: Operate the HOCO clock,1: Stop the HOCO clock" group.byte 0x38++0x1 line.byte 0x0 "MOCOCR,Middle-Speed On-Chip Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MCSTP,MOCO Stop" "0: Operate the MOCO clock,1: Stop the MOCO clock" line.byte 0x1 "FLLCR1,FLL Control Register 1" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "FLLEN,FLL Enable" "0: FLL function is disabled.,1: FLL function is enabled." group.word 0x3A++0x1 line.word 0x0 "FLLCR2,FLL Control Register 2" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." hexmask.word 0x0 0.--10. 1. "FLLCNTL,FLL Multiplication Control" rgroup.byte 0x3C++0x0 line.byte 0x0 "OSCSF,Oscillation Stabilization Flag Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0." "0,1" bitfld.byte 0x0 6. "PLL2SF,PLL2 Clock Oscillation Stabilization Flag" "0: The PLL2 clock is stopped or oscillation of the..,1: Oscillation of the PLL2 clock is stable so the.." newline bitfld.byte 0x0 5. "PLLSF,PLL1 Clock Oscillation Stabilization Flag" "0: The PLL1 clock is stopped or oscillation of the..,1: Oscillation of the PLL1 clock is stable so the.." bitfld.byte 0x0 4. "Reserved,This bit is read as 0." "0,1" newline bitfld.byte 0x0 3. "MOSCSF,Main Clock Oscillation Stabilization Flag" "0: Main clock oscillator is stopped (MOSTP = 1) or..,1: Main clock oscillator is stable so is available.." bitfld.byte 0x0 1.--2. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.byte 0x0 0. "HOCOSF,HOCO Clock Oscillation Stabilization FlagNOTE: The HOCOSF bit value after a reset is 1 when the OFS1.HOCOEN bit is 0. It is 0 when the OFS1.HOCOEN bit is 1." "0: HOCO clock is stopped or is not yet stable,1: HOCO clock is stable so is available for use as.." group.byte 0x3E++0x3 line.byte 0x0 "CKOCR,Clock Out Control Register" bitfld.byte 0x0 7. "CKOEN,Clock out enable" "0: Disable clock out,1: Enable clock out" bitfld.byte 0x0 4.--6. "CKODIV,Clock out input frequency Division Select" "0: /1,1: /2,?,?,?,?,?,?" newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "TRCKCR,Trace Clock Control Register" bitfld.byte 0x1 7. "TRCKEN,Trace Clock operating Enable" "0: Stop,1: Operation enable" bitfld.byte 0x1 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x1 4. "TRCKSEL,Trace Clock source select" "0: System clock source (value after reset),1: HOCO (oscillation in debug mode)" hexmask.byte 0x1 0.--3. 1. "TRCK,Trace Clock operating frequency select" line.byte 0x2 "OSTDCR,Oscillation Stop Detection Control Register" bitfld.byte 0x2 7. "OSTDE,Oscillation Stop Detection Function Enable" "0: Disable oscillation stop detection function,1: Enable oscillation stop detection function" hexmask.byte 0x2 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x2 0. "OSTDIE,Oscillation Stop Detection Interrupt Enable" "0: Disable oscillation stop detection interrupt (do..,1: Enable oscillation stop detection interrupt.." line.byte 0x3 "OSTDSR,Oscillation Stop Detection Status Register" hexmask.byte 0x3 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x3 0. "OSTDF,Oscillation Stop Detection Flag" "0: Main clock oscillation stop not detected,1: Main clock oscillation stop detected" rgroup.byte 0x43++0x0 line.byte 0x0 "OSCMONR,Oscillator Monitor Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000." bitfld.byte 0x0 2. "LOCOMON,LOCO operation monitor" "0: LOCO is set to operate.,1: LOCO is set to stop" newline bitfld.byte 0x0 1. "MOCOMON,MOCO operation monitor" "0: MOCO is set to operate.,1: MOCO is set to stop." bitfld.byte 0x0 0. "Reserved,This bit is read as 0." "0,1" group.word 0x48++0x1 line.word 0x0 "PLL2CCR,PLL2 Clock Control Register" hexmask.word.byte 0x0 8.--15. 1. "PLL2MUL,PLL2 Frequency Multiplication Factor Select" bitfld.word 0x0 6.--7. "PLL2MULNF,PLL2 Frequency Multiplication Fractional Factor Select" "0: 0.00 (Value after reset),1: 0.33 (1/3),?,?" newline bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 4. "PL2SRCSEL,PLL Clock Source Select" "0: Main clock oscillator,1: HOCO" newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 0.--1. "PL2IDIV,PLL2 Input Frequency Division Ratio Select" "0: /1 (Value after reset),1: /2,?,?" group.byte 0x4A++0x0 line.byte 0x0 "PLL2CR,PLL2 Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "PLL2STP,PLL2 Stop Control" "0: Operate the PLL2,1: Stop the PLL2." group.word 0x4C++0x3 line.word 0x0 "PLLCCR2,PLL Clock Control Register 2" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 8.--11. 1. "PLODIVR,PLL1 Output Frequency Division Ratio Select for output clock R" newline hexmask.word.byte 0x0 4.--7. 1. "PLODIVQ,PLL1 Output Frequency Division Ratio Select for output clock Q" hexmask.word.byte 0x0 0.--3. 1. "PLODIVP,PLL1 Output Frequency Division Ratio Select for output clock P" line.word 0x2 "PLL2CCR2,PLL2 Clock Control Register 2" hexmask.word.byte 0x2 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x2 8.--11. 1. "PL2ODIVR,PLL2 Output Frequency Division Ratio Select for output clock R" newline hexmask.word.byte 0x2 4.--7. 1. "PL2ODIVQ,PLL2 Output Frequency Division Ratio Select for output clock Q" hexmask.word.byte 0x2 0.--3. 1. "PL2ODIVP,PLL2 Output Frequency Division Ratio Select for output clock P" group.byte 0x52++0x5 line.byte 0x0 "EBCKOCR,External Bus Clock Output Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "EBCKOEN,BCLK Pin Output Control" "0: Disable EBCLK pin output (fixed high),1: Enable EBCLK pin output" line.byte 0x1 "SDCKOCR,SDRAM Clock Output Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "SDCKOEN,SDCLK Pin Output Control" "0: Disable SDCLK pin output (fixed high),1: Enable SDCLK pin output" line.byte 0x2 "SCICKDIVCR,SCI clock Division control register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x3 "SCICKCR,SCI clock control register" rbitfld.byte 0x3 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x3 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x3 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x3 0.--3. 1. "CKSEL,Clock Source Select" line.byte 0x4 "SPICKDIVCR,SPI clock Division control register" hexmask.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x4 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x5 "SPICKCR,SPI clock control register" rbitfld.byte 0x5 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x5 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x5 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x5 0.--3. 1. "CKSEL,Clock Source Select" group.byte 0x5A++0x5 line.byte 0x0 "ADCCKDIVCR,ADC clock Division control register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x1 "ADCCKCR,ADC clock control register" rbitfld.byte 0x1 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x1 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x1 0.--3. 1. "CKSEL,Clock Source Select" line.byte 0x2 "GPTCKDIVCR,GPT clock Division control register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x3 "GPTCKCR,GPT clock control register" rbitfld.byte 0x3 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x3 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x3 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x3 0.--3. 1. "CKSEL,Clock Source Select" line.byte 0x4 "LCDCKDIVCR,LCD clock Division control register" hexmask.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x4 0.--2. "CKDIV,Clock Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x5 "LCDCKCR,LCD clock control register" rbitfld.byte 0x5 7. "CKSRDY,Clock Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x5 6. "CKSREQ,Clock Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x5 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x5 0.--3. 1. "CKSEL,Clock Source Select" group.byte 0x61++0x1 line.byte 0x0 "MOCOUTCR,MOCO User Trimming Control Register" hexmask.byte 0x0 0.--7. 1. "MOCOUTRM,MOCO User Trimming" line.byte 0x1 "HOCOUTCR,HOCO User Trimming Control Register" hexmask.byte 0x1 0.--7. 1. "HOCOUTRM,HOCO User Trimming" group.byte 0x6C++0x4 line.byte 0x0 "USBCKDIVCR,USB clock Division control register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0.--2. "USBCKDIV,USB clock (USBCLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x1 "OCTACKDIVCR,Octal-SPI clock Division control register" hexmask.byte 0x1 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x1 0.--2. "OCTACKDIV,Octal-SPI clock (OCTACLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x2 "CANFDCKDIVCR,CANFD Core clock Division control register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 0.--2. "CANFDCKDIV,CANFD Core clock (CANFDCLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x3 "USB60CKDIVCR,USB60 clock Division control register" hexmask.byte 0x3 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x3 0.--2. "USB60CKDIV,USB clock (USB60CLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" line.byte 0x4 "I3CCKDIVCR,I3C clock Division control register" hexmask.byte 0x4 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x4 0.--2. "I3CCKDIV,I3C clock (I3CCLK) Division Select" "0: /1 (value after reset),1: /2,?,?,?,?,?,?" group.byte 0x74++0x4 line.byte 0x0 "USBCKCR,USB clock control register" bitfld.byte 0x0 7. "USBCKSRDY,USB clock (USBCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x0 6. "USBCKSREQ,USB clock (USBCLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x0 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x0 0.--3. 1. "USBCKSEL,USB clock (USBCLK) Source Select" line.byte 0x1 "OCTACKCR,Octal-SPI clock control register" bitfld.byte 0x1 7. "OCTACKSRDY,Octal-SPI clock (OCTACLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x1 6. "OCTACKSREQ,Octal-SPI clock (OCTACLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x1 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x1 0.--3. 1. "OCTACKSEL,Octal-SPI clock (OCTACLK) Source Select" line.byte 0x2 "CANFDCKCR,CANFD Core clock control register" bitfld.byte 0x2 7. "CANFDCKSRDY,CANFD Core clock (CANFDCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x2 6. "CANFDCKSREQ,CANFD Core clock (CANFDCLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x2 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x2 0.--3. 1. "CANFDCKSEL,CANFD Core clock (CANFDCLK) Source Select" line.byte 0x3 "USB60CKCR,USB60 clock control register" bitfld.byte 0x3 7. "USB60CKSRDY,USB clock (USB60CLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x3 6. "USB60CKSREQ,USB clock (USB60CLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x3 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x3 0.--3. 1. "USB60CKSEL,USB clock (USB60CLK) Source Select" line.byte 0x4 "I3CCKCR,I3C clock control register" bitfld.byte 0x4 7. "I3CCKSRDY,I3C clock (I3CCLK) Switching Ready state flag" "0: Impossible to Switch,1: Possible to Switch" bitfld.byte 0x4 6. "I3CCKREQ,I3C clock (I3CCLK) Switching Request" "0: No request,1: Request switching" newline bitfld.byte 0x4 4.--5. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.byte 0x4 0.--3. 1. "I3CCKSEL,I3C clock (I3CCLK) Source Select" group.byte 0x7C++0x1 line.byte 0x0 "MOSCSCR,Main Clock Oscillator Standby Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MOSCSOKP,Main Clock Oscillator Standby Oscillation Keep select" "0: Disable,1: Enable" line.byte 0x1 "HOCOSCR,High-Speed On-Chip Oscillator Standby Control Register" hexmask.byte 0x1 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x1 0. "HOCOSOKP,HOCO Standby Oscillation Keep select" "0: Disable,1: Enable" group.byte 0xA0++0x0 line.byte 0x0 "OPCCR,Operating Power Control Register" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" rbitfld.byte 0x0 4. "OPCMTSF,Operating Power Control Mode Transition Status Flag" "0: Transition completed,1: During transition" newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 0.--1. "OPCM,Operating Power Control Mode Select" "0: Setting prohibited,1: Prohibited,?,?" group.byte 0xA2++0x0 line.byte 0x0 "MOSCWTCR,Main Clock Oscillator Wait Control Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "MSTS,Main clock oscillator wait time setting" group.long 0xC0++0x3 line.long 0x0 "RSTSR1,Reset Status Register 1" hexmask.long.word 0x0 23.--31. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." bitfld.long 0x0 22. "NWRF,Network Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Network Reset not detected.,1: Network Reset detected." newline bitfld.long 0x0 21. "LM1RF,Local memory 1 error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Local memory 1 error reset not detected.,1: Local memory 1 error reset detected." bitfld.long 0x0 20. "CLU1RF,CPU1 Lockup Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: CPU1 Lockup reset not detected.,1: CPU1 Lockup reset detected." newline bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 17. "WDT1RF,Watchdog Timer1 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Watchdog timer1 reset not detected.,1: Watchdog timer1 reset detected." newline bitfld.long 0x0 16. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 14. "CMRF,Common memory error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Common memory error reset not detected.,1: Common memory error reset detected." bitfld.long 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 10. "BUSRF,Bus error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Bus error reset not detected.,1: Bus error reset detected." hexmask.long.byte 0x0 6.--9. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x0 5. "LM0RF,Local memory 0 error Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Local memory 0 error reset not detected.,1: Local memory 0 error reset detected." bitfld.long 0x0 4. "CLU0RF,CPU0 Lockup Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: CPU0 Lockup reset not detected.,1: CPU0 Lockup reset detected." newline bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 2. "SWRF,Software Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Software reset not detected.,1: Software reset detected." newline bitfld.long 0x0 1. "WDT0RF,Watchdog Timer0 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Watchdog timer0 reset not detected.,1: Watchdog timer0 reset detected." bitfld.long 0x0 0. "IWDTRF,Independent Watchdog Timer Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Independent watchdog timer reset not detected.,1: Independent watchdog timer reset detected." group.byte 0xCC++0x0 line.byte 0x0 "SYRACCR,System Register Access Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BUSY,Access Ready monitor" "0: Ready to read/write access,1: Writing in progress" repeat 2. (increment 0x0 0x1)(increment 0x0 0x2) group.byte ($2+0xE0)++0x0 line.byte 0x0 "PVD$1CR1,Voltage Monitor %s Circuit Control Register 1" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "IRQSEL,Voltage Monitor Interrupt Type Select" "0: Non-maskable interrupt,1: Maskable interrupt" newline bitfld.byte 0x0 0.--1. "IDTSEL,Voltage Monitor Interrupt Generation Condition Select" "0: Generate when VCC>=Vdet (rise) is detected,1: Generate when VCC Vdet or MON bit is disabled" newline bitfld.byte 0x0 0. "DET,Voltage Monitor Voltage Change Detection Flag NOTE: Only 0 can be written to this bit. After writing 0 to this bit it takes 2 system clock cycles for the bit to be read as 0." "0: Not detected,1: Vdet passage detection" repeat.end group.byte 0xF0++0x0 line.byte 0x0 "CRVSYSCR,Clock Recovery System Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CRVEN,Clock Recovery Enable" "0: Disable,1: Enable" group.byte 0x110++0x0 line.byte 0x0 "PDCTRGD,Graphics Power Domain Control Register" rbitfld.byte 0x0 7. "PDPGSF,Power gating status flag" "0: Target domain is power on (not gating),1: Target domain is power off (during Gating)" rbitfld.byte 0x0 6. "PDCSF,Power control status flag" "0: Power gating control is not executed (idle),1: Power gating control is in progress" newline hexmask.byte 0x0 1.--5. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 0. "PDDE,Power control enable" "0: Power on the target domain,1: Power off the target domain" group.word 0x140++0x1 line.word 0x0 "PDRAMSCR0,SRAM power domain Standby Control Register 0" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.byte 0x142++0x0 line.byte 0x0 "PDRAMSCR1,SRAM power domain Standby Control Register 1" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x3B0++0x1 line.word 0x0 "VBRSABAR,VBATT Backup Register Security Attribute Boundary Address Register" hexmask.word 0x0 0.--15. 1. "SABA,Security Attribute Boundary Address" group.word 0x3B4++0x1 line.word 0x0 "VBRPABARS,VBATT Backup Register Privilege Attribute Boundary Address Register for Secure Region" hexmask.word 0x0 0.--15. 1. "PABAS,Privilege Attribute Boundary Address for Secure Region" group.word 0x3B8++0x1 line.word 0x0 "VBRPABARNS,VBATT Backup Register Privilege Attribute Boundary Address Register for Non-secure Region" hexmask.word 0x0 0.--15. 1. "PABANS,Privilege Attribute Boundary Address for Non-secure Region" group.long 0x3C0++0x13 line.long 0x0 "CGFSAR,Clock Generation Function Security Attribute Register" hexmask.long.byte 0x0 27.--31. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.long 0x0 26. "NONSEC26,Non-secure Attribute bit 26" "0: Secure,1: Non-secure" newline bitfld.long 0x0 25. "NONSEC25,Non-secure Attribute bit 25" "0: Secure,1: Non-secure" bitfld.long 0x0 24. "NONSEC24,Non-secure Attribute bit 24" "0: Secure,1: Non-secure" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "NONSEC22,Non-secure Attribute bit 22" "0: Secure,1: Non-secure" newline bitfld.long 0x0 21. "NONSEC21,Non-secure Attribute bit 21" "0: Secure,1: Non-secure" bitfld.long 0x0 20. "NONSEC20,Non-secure Attribute bit 20" "0: Secure,1: Non-secure" newline bitfld.long 0x0 19. "NONSEC19,Non-secure Attribute bit 19" "0: Secure,1: Non-secure" bitfld.long 0x0 18. "NONSEC18,Non-secure Attribute bit 18" "0: Secure,1: Non-secure" newline bitfld.long 0x0 17. "NONSEC17,Non-secure Attribute bit 17" "0: Secure,1: Non-secure" bitfld.long 0x0 16. "NONSEC16,Non-secure Attribute bit 16" "0: Secure,1: Non-secure" newline bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 13. "NONSEC13,Non-secure Attribute bit 13" "0: Secure,1: Non-secure" newline bitfld.long 0x0 12. "NONSEC12,Non-secure Attribute bit 12" "0: Secure,1: Non-secure" bitfld.long 0x0 11. "NONSEC11,Non-secure Attribute bit 11" "0: Secure,1: Non-secure" newline bitfld.long 0x0 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 9. "NONSEC09,Non-secure Attribute bit 9" "0: Secure,1: Non-secure" newline bitfld.long 0x0 8. "NONSEC08,Non-secure Attribute bit 8" "0: Secure,1: Non-secure" bitfld.long 0x0 7. "NONSEC07,Non-secure Attribute bit 7" "0: Secure,1: Non-secure" newline bitfld.long 0x0 6. "NONSEC06,Non-secure Attribute bit 6" "0: Secure,1: Non-secure" bitfld.long 0x0 5. "NONSEC05,Non-secure Attribute bit 5" "0: Secure,1: Non-secure" newline bitfld.long 0x0 4. "NONSEC04,Non-secure Attribute bit 4" "0: Secure,1: Non-secure" bitfld.long 0x0 3. "NONSEC03,Non-secure Attribute bit 3" "0: Secure,1: Non-secure" newline bitfld.long 0x0 2. "NONSEC02,Non-secure Attribute bit 2" "0: Secure,1: Non-secure" bitfld.long 0x0 1. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 0. "NONSEC00,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" line.long 0x4 "RSTSAR,Reset Security Attribution Register" hexmask.long 0x4 4.--31. 1. "Reserved,These bits are read as 0000000000000000000000000000. The write value should be 0000000000000000000000000000." bitfld.long 0x4 3. "NONSEC3,Non-secure Attribute bit 3" "0: Secure,1: Non-secure" newline bitfld.long 0x4 2. "NONSEC2,Non-secure Attribute bit 2" "0: Secure,1: Non-secure" bitfld.long 0x4 1. "NONSEC1,Non-secure Attribute bit 1" "0: Secure,1: Non-secure" newline bitfld.long 0x4 0. "NONSEC0,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" line.long 0x8 "LPMSAR,Low Power Mode Security Attribution Register" hexmask.long.word 0x8 22.--31. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x8 21. "NONSEC21,Non-secure Attribute bit 21" "0: Secure,1: Non-secure" newline bitfld.long 0x8 20. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 19. "NONSEC19,Non-secure Attribute bit 19" "0: Secure,1: Non-secure" newline bitfld.long 0x8 18. "NONSEC18,Non-secure Attribute bit 18" "0: Secure,1: Non-secure" bitfld.long 0x8 17. "NONSEC17,Non-secure Attribute bit 17" "0: Secure,1: Non-secure" newline bitfld.long 0x8 16. "NONSEC16,Non-secure Attribute bit 16" "0: Secure,1: Non-secure" hexmask.long.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x8 8. "NONSEC8,Non-secure Attribute bit 08" "0: Secure,1: Non-secure" hexmask.long.byte 0x8 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x8 3. "NONSEC3,Non-secure Attribute bit 03" "0: Secure,1: Non-secure" bitfld.long 0x8 2. "NONSEC2,Non-secure Attribute bit 02" "0: Secure,1: Non-secure" newline bitfld.long 0x8 1. "NONSEC1,Non-secure Attribute bit 01" "0: Secure,1: Non-secure" bitfld.long 0x8 0. "NONSEC0,Non-secure Attribute bit 00" "0: Secure,1: Non-secure" line.long 0xC "PVDSAR,Programable Voltage Detection Security Attribution Register" hexmask.long 0xC 2.--31. 1. "Reserved,These bits are read as 000000000000000000000000000000. The write value should be 000000000000000000000000000000." bitfld.long 0xC 1. "NONSEC1,Non-secure Attribute bit 1" "0: Secure,1: Non-secure" newline bitfld.long 0xC 0. "NONSEC0,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" line.long 0x10 "BBFSAR,Battery Backup Function Security Attribute Register" hexmask.long 0x10 5.--31. 1. "Reserved,These bits are read as 000000000000000000000000000. The write value should be 000000000000000000000000000." bitfld.long 0x10 4. "NONSEC4,Non-secure Attribute bit 4" "0: Secure,1: Non-secure" newline bitfld.long 0x10 3. "NONSEC3,Non-secure Attribute bit 3" "0: Secure,1: Non-secure" bitfld.long 0x10 2. "NONSEC2,Non-secure Attribute bit 2" "0: Secure,1: Non-secure" newline bitfld.long 0x10 1. "NONSEC1,Non-secure Attribute bit 1" "0: Secure,1: Non-secure" bitfld.long 0x10 0. "NONSEC0,Non-secure Attribute bit 0" "0: Secure,1: Non-secure" group.long 0x3D8++0x3 line.long 0x0 "PGCSAR,Power Gating Control Security Attribution Register" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.word 0x0 7.--15. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 2. "NONSEC2,Non-secure Attribute bit 02" "0: Secure,1: Non-secure" bitfld.long 0x0 1. "NONSEC1,Non-secure Attribute bit 01" "0: Secure,1: Non-secure" newline bitfld.long 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.long 0x3E0++0x7 line.long 0x0 "DPFSAR,Deep Standby Interrupt Factor Security Attribution Register" bitfld.long 0x0 31. "DPFSA31,Deep Standby Interrupt Factor Security Attribute bit 31" "0: Secure,1: Non-secure" bitfld.long 0x0 30. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 29. "DPFSA29,Deep Standby Interrupt Factor Security Attribute bit 29" "0: Secure,1: Non-secure" bitfld.long 0x0 28. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 27. "DPFSA27,Deep Standby Interrupt Factor Security Attribute bit 27" "0: Secure,1: Non-secure" bitfld.long 0x0 26. "DPFSA26,Deep Standby Interrupt Factor Security Attribute bit 26" "0: Secure,1: Non-secure" newline bitfld.long 0x0 25. "DPFSA25,Deep Standby Interrupt Factor Security Attribute bit 25" "0: Secure,1: Non-secure" bitfld.long 0x0 24. "DPFSA24,Deep Standby Interrupt Factor Security Attribute bit 24" "0: Secure,1: Non-secure" newline bitfld.long 0x0 23. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 21. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 20. "DPFSA20,Deep Standby Interrupt Factor Security Attribute bit 20" "0: Secure,1: Non-secure" newline bitfld.long 0x0 19. "DPFSA19,Deep Standby Interrupt Factor Security Attribute bit 19" "0: Secure,1: Non-secure" bitfld.long 0x0 18. "DPFSA18,Deep Standby Interrupt Factor Security Attribute bit 18" "0: Secure,1: Non-secure" newline bitfld.long 0x0 17. "DPFSA17,Deep Standby Interrupt Factor Security Attribute bit 17" "0: Secure,1: Non-secure" bitfld.long 0x0 16. "DPFSA16,Deep Standby Interrupt Factor Security Attribute bit 16" "0: Secure,1: Non-secure" line.long 0x4 "RSCSAR,RAM Standby Control Security Attribution Register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "RSCSA17,RAM Standby Control Security Attribute bit 17" "0: Secure,1: Non-secure" newline bitfld.long 0x4 16. "RSCSA16,RAM Standby Control Security Attribute bit 16" "0: Secure,1: Non-secure" bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 14. "RSCSA14,RAM Standby Control Security Attribute bit 14" "0: Secure,1: Non-secure" bitfld.long 0x4 13. "RSCSA13,RAM Standby Control Security Attribute bit 13" "0: Secure,1: Non-secure" newline bitfld.long 0x4 12. "RSCSA12,RAM Standby Control Security Attribute bit 12" "0: Secure,1: Non-secure" bitfld.long 0x4 11. "RSCSA11,RAM Standby Control Security Attribute bit 11" "0: Secure,1: Non-secure" newline bitfld.long 0x4 10. "RSCSA10,RAM Standby Control Security Attribute bit 10" "0: Secure,1: Non-secure" bitfld.long 0x4 9. "RSCSA9,RAM Standby Control Security Attribute bit 09" "0: Secure,1: Non-secure" newline bitfld.long 0x4 8. "RSCSA8,RAM Standby Control Security Attribute bit 08" "0: Secure,1: Non-secure" bitfld.long 0x4 7. "RSCSA7,RAM Standby Control Security Attribute bit 07" "0: Secure,1: Non-secure" newline bitfld.long 0x4 6. "RSCSA6,RAM Standby Control Security Attribute bit 06" "0: Secure,1: Non-secure" bitfld.long 0x4 5. "RSCSA5,RAM Standby Control Security Attribute bit 05" "0: Secure,1: Non-secure" newline bitfld.long 0x4 4. "RSCSA4,RAM Standby Control Security Attribute bit 04" "0: Secure,1: Non-secure" bitfld.long 0x4 3. "RSCSA3,RAM Standby Control Security Attribute bit 03" "0: Secure,1: Non-secure" newline bitfld.long 0x4 2. "RSCSA2,RAM Standby Control Security Attribute bit 02" "0: Secure,1: Non-secure" bitfld.long 0x4 1. "RSCSA1,RAM Standby Control Security Attribute bit 01" "0: Secure,1: Non-secure" newline bitfld.long 0x4 0. "RSCSA0,RAM Standby Control Security Attribute bit 00" "0: Secure,1: Non-secure" group.word 0x3FA++0x1 line.word 0x0 "PRCR_S,Protect Register for Secure Register" hexmask.word.byte 0x0 8.--15. 1. "PRKEY,PRC Key Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 5. "PRC5,Enables writing to the registers related the reset control." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 4. "PRC4,Enables writing to the registers related to the security and privilege setting registers." "0: Write disabled,1: Write enabled" bitfld.word 0x0 3. "PRC3,Enables writing to the registers related to the PVD." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "PRC1,Enables writing to the registers related to the operating modes the low power modes and the battery backup function." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 0. "PRC0,Enables writing to the registers related to the clock generation circuit." "0: Write disabled,1: Write enabled" group.word 0x3FE++0x1 line.word 0x0 "PRCR_NS,Protect Register for Non-secure Register" hexmask.word.byte 0x0 8.--15. 1. "PRKEY,PRC Key Code" bitfld.word 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "PRC4,Enables writing to the registers related to the privilege setting registers." "0: Write disabled,1: Write enabled" bitfld.word 0x0 3. "PRC3,Enables writing to the registers related to the PVD." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 1. "PRC1,Enables writing to the registers related to the operating modes the low power modes and the battery backup function." "0: Write disabled,1: Write enabled" newline bitfld.word 0x0 0. "PRC0,Enables writing to the registers related to the clock generation circuit." "0: Write disabled,1: Write enabled" group.byte 0x400++0x0 line.byte 0x0 "LOCOCR,Low-Speed On-Chip Oscillator Control Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "LCSTP,LOCO Stop" "0: Operate the LOCO clock,1: Stop the LOCO clock" group.byte 0x402++0x0 line.byte 0x0 "LOCOUTCR,LOCO User Trimming Control Register" hexmask.byte 0x0 0.--7. 1. "LOCOUTRM,LOCO User Trimming" group.byte 0xA00++0x0 line.byte 0x0 "DPSBYCR,Deep Standby Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "IOKEEP,I/O Port Retention" "0: When the Deep Software Standby mode is canceled..,1: When the Deep Software Standby mode is canceled.." newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "SRKEEP,Standby RAM Retention" "0: When entering the Software Standby mode or the..,1: When entering the Software Standby mode or the.." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "DCSSMODE,DCDC SSMODE" "0: When the Deep Software Standby mode is canceled..,1: When the Deep Software Standby mode is canceled.." newline bitfld.byte 0x0 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" group.byte 0xA04++0x0 line.byte 0x0 "DPSWCR,Deep Standby Wait Control Register" hexmask.byte 0x0 0.--7. 1. "WTSTS,Deep Software Wait Standby Time Setting Bit" group.byte 0xA08++0x0 line.byte 0x0 "DPSIER0,Deep Standby Interrupt Enable Register 0" bitfld.byte 0x0 7. "DIRQ7E,IRQ7-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 6. "DIRQ6E,IRQ6-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 5. "DIRQ5E,IRQ5-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 4. "DIRQ4E,IRQ4-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 3. "DIRQ3E,IRQ3-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DIRQ2E,IRQ2-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DIRQ1E,IRQ1-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: DS Pin Enable" bitfld.byte 0x0 0. "DIRQ0E,IRQ0-DS Pin Enable" "0: DS Pin Enable,1: Cancelling deep software standby mode is enabled" group.byte 0xA0C++0x0 line.byte 0x0 "DPSIER1,Deep Standby Interrupt Enable Register 1" bitfld.byte 0x0 7. "DIRQ15E,IRQ15-DS Pin Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled" bitfld.byte 0x0 6. "DIRQ14E,IRQ14-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 5. "DIRQ13E,IRQ13-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 4. "DIRQ12E,IRQ12-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 3. "DIRQ11E,IRQ11-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DIRQ10E,IRQ10-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DIRQ9E,IRQ9-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 0. "DIRQ8E,IRQ8-DS Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" group.byte 0xA10++0x0 line.byte 0x0 "DPSIER2,Deep Standby Interrupt Enable Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "DNMIE,NMI Pin Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 3. "DRTCAIE,RTC Alarm interrupt Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DTRTCIIE,RTC Interval interrupt Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DPVD2IE,PVD2 Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 0. "DPVD1IE,PVD1 Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" group.byte 0xA14++0x0 line.byte 0x0 "DPSIER3,Deep Standby Interrupt Enable Register 3" bitfld.byte 0x0 7. "DVBATTADIE,VBATT Tamper Detection Deep Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "DIWDTIE,IWDT Overflow Deep Standby Cancel Signal Enable" "0: Cancelling Deep Software Standby mode is disabled,1: Cancelling Deep Software Standby mode is enabled" bitfld.byte 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 3. "DULPT1IE,ULPT1 Overflow Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 2. "DULPT0IE,ULPT0 Overflow Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" newline bitfld.byte 0x0 1. "DUSBHSIE,USBHS Suspend/Resume Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" bitfld.byte 0x0 0. "DUSBFSIE,USBFS Suspend/Resume Deep Standby Cancel Signal Enable" "0: Cancelling deep software standby mode is disabled,1: Cancelling deep software standby mode is enabled" group.byte 0xA18++0x0 line.byte 0x0 "DPSIFR0,Deep Standby Interrupt Flag Register 0" bitfld.byte 0x0 7. "DIRQ7F,IRQ7-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 6. "DIRQ6F,IRQ6-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 5. "DIRQ5F,IRQ5-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 4. "DIRQ4F,IRQ4-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 3. "DIRQ3F,IRQ3-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DIRQ2F,IRQ2-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DIRQ1F,IRQ1-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: DS Pin Deep Standby Cancel Flag" bitfld.byte 0x0 0. "DIRQ0F,IRQ0-DS Pin Deep Standby Cancel Flag" "0: DS Pin Deep Standby Cancel Flag,1: The cancel request is generated" group.byte 0xA1C++0x0 line.byte 0x0 "DPSIFR1,Deep Standby Interrupt Flag Register 1" bitfld.byte 0x0 7. "DIRQ15F,IRQ15-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 6. "DIRQ14F,IRQ14-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 5. "DIRQ13F,IRQ13-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 4. "DIRQ12F,IRQ12-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 3. "DIRQ11F,IRQ11-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DIRQ10F,IRQ10-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DIRQ9F,IRQ9-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 0. "DIRQ8F,IRQ8-DS Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0xA20++0x0 line.byte 0x0 "DPSIFR2,Deep Standby Interrupt Flag Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "DNMIF,NMI Pin Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 3. "DRTCAIF,RTC Alarm interrupt Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DTRTCIIF,RTC Interval interrupt Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DPVD2IF,PVD2 Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 0. "DPVD1IF,PVD1 Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0xA24++0x0 line.byte 0x0 "DPSIFR3,Deep Standby Interrupt Flag Register 3" bitfld.byte 0x0 7. "DVBATTADIF,VBATT Tamper Detection Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "DIWDTIF,IWDT Overflow Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 3. "DULPT1IF,ULPT1 Overflow Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 2. "DULPT0IF,ULPT0 Overflow Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" newline bitfld.byte 0x0 1. "DUSBHSIF,USBHS Suspend/Resume Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" bitfld.byte 0x0 0. "DUSBFSIF,USBFS Suspend/Resume Deep Standby Cancel Flag" "0: The cancel request is not generated,1: The cancel request is generated" group.byte 0xA28++0x0 line.byte 0x0 "DPSIEGR0,Deep Standby Interrupt Edge Register 0" bitfld.byte 0x0 7. "DIRQ7EG,IRQ7-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 6. "DIRQ6EG,IRQ6-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 5. "DIRQ5EG,IRQ5-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 4. "DIRQ4EG,IRQ4-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 3. "DIRQ3EG,IRQ3-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 2. "DIRQ2EG,IRQ2-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 1. "DIRQ1EG,IRQ1-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: DS Pin Edge Select" bitfld.byte 0x0 0. "DIRQ0EG,IRQ0-DS Pin Edge Select" "0: DS Pin Edge Select,1: A cancel request is generated at a rising edge" group.byte 0xA2C++0x0 line.byte 0x0 "DPSIEGR1,Deep Standby Interrupt Edge Register 1" bitfld.byte 0x0 7. "DIRQ15EG,IRQ15-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 6. "DIRQ14EG,IRQ14-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 5. "DIRQ13EG,IRQ13-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 4. "DIRQ12EG,IRQ12-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 3. "DIRQ11EG,IRQ11-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 2. "DIRQ10EG,IRQ10-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 1. "DIRQ9EG,IRQ9-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" bitfld.byte 0x0 0. "DIRQ8EG,IRQ8-DS Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" group.byte 0xA30++0x0 line.byte 0x0 "DPSIEGR2,Deep Standby Interrupt Edge Register 2" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "DNMIEG,NMI Pin Edge Select" "0: A cancel request is generated at a falling edge,1: A cancel request is generated at a rising edge" newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "DPVD2EG,PVD2 Edge Select" "0: A cancel request is generated when VCC=Vdet2.." newline bitfld.byte 0x0 0. "DPVD1EG,PVD1 Edge Select" "0: A cancel request is generated when VCC=Vdet1.." group.byte 0xA38++0x0 line.byte 0x0 "SYOCDCR,System Control OCD Control Register" bitfld.byte 0x0 7. "DBGEN,Debugger Enable bit" "0: Disable on-chip debugger function,1: Enable on-chip debugger function" hexmask.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.byte 0x0 0. "DOCDF,Deep Standby OCD flag" "0: DBIRQ is not generated.,1: DBIRQ is generated." group.byte 0xA40++0x0 line.byte 0x0 "RSTSR0,Reset Status Register 0" bitfld.byte 0x0 7. "DPSRSTF,Deep Software Standby Reset FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Deep software standby mode cancelation not..,1: Deep software standby mode cancelation requested.." bitfld.byte 0x0 6. "PVD5RF,Voltage Monitor 5 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 5 reset not detected.,1: Voltage Monitor 5 reset detected." newline bitfld.byte 0x0 5. "PVD4RF,Voltage Monitor 4 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 4 reset not detected.,1: Voltage Monitor 4 reset detected." bitfld.byte 0x0 4. "PVD3RF,Voltage Monitor 3 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 3 reset not detected.,1: Voltage Monitor 3 reset detected." newline bitfld.byte 0x0 3. "PVD2RF,Voltage Monitor 2 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 2 reset not detected.,1: Voltage Monitor 2 reset detected." bitfld.byte 0x0 2. "PVD1RF,Voltage Monitor 1 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 1 reset not detected.,1: Voltage Monitor 1 reset detected." newline bitfld.byte 0x0 1. "PVD0RF,Voltage Monitor 0 Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Voltage Monitor 0 reset not detected.,1: Voltage Monitor 0 reset detected." bitfld.byte 0x0 0. "PORF,Power-On Reset Detect FlagNOTE: Writable only to clear the flag. Confirm the value is 1 and then write 0." "0: Power-on reset not detected.,1: Power-on reset detected." group.byte 0xA44++0x0 line.byte 0x0 "RSTSR2,Reset Status Register 2" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "CWSF,Cold/Warm Start Determination Flag" "0: Cold start,1: Warm start" group.byte 0xA48++0x0 line.byte 0x0 "RSTSR3,Reset Status Register 3" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "OCPRF,Overcurrent protection reset Detect Flag" "0: Overcurrent protection reset not detected.,1: Overcurrent protection reset detected." newline hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 000. The write value should be 000." group.byte 0xA50++0x0 line.byte 0x0 "MOMCR,Main Clock Oscillator Mode Oscillation Control Register" bitfld.byte 0x0 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 6. "MOSEL,Main Clock Oscillator Switching" "0: Resonator,1: External clock input" newline bitfld.byte 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 4. "AGCEN,Auto Gain Control Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 1.--3. "MODRV0,Main Clock Oscillator Drive Capability 0 Switching" "0: 8MHz,1: 8.1MHz to 16MHz,?,?,?,?,?,?" bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.byte 0xA54++0x0 line.byte 0x0 "FWEPROR,Flash Write Erase Protect Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 0.--1. "FLWE,Flash Programing and Erasure" "0: Prohibits programming and erasure of the code..,1: Permits programming and erasure of the code..,?,?" group.byte 0xA58++0x0 line.byte 0x0 "PVD1CMPCR,Voltage Monitor 1 Comparator Control Register" bitfld.byte 0x0 7. "PVDE,Voltage Detection 1 Enable" "0: Voltage detection 1 circuit disabled,1: Voltage detection 1 circuit enabled" bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "PVDLVL,Detection Voltage 1 Level Select(Standard voltage during drop in voltage)" group.byte 0xA5C++0x0 line.byte 0x0 "PVD2CMPCR,Voltage Monitor 2 Comparator Control Register" bitfld.byte 0x0 7. "PVDE,Voltage Detection 2 Enable" "0: Voltage detection 2 circuit disabled,1: Voltage detection 2 circuit enabled" bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.byte 0x0 0.--4. 1. "PVDLVL,Detection Voltage 2 Level Select(Standard voltage during drop in voltage)" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.byte ($2+0xA70)++0x0 line.byte 0x0 "PVD$1CR0,Voltage Monitor %s Circuit Control Register 0" bitfld.byte 0x0 7. "RN,Voltage Monitor Reset Negate Select" "0: Negation follows a stabilization time (tPVD)..,1: Negation follows a stabilization time (tPVD).." bitfld.byte 0x0 6. "RI,Voltage Monitor Circuit Mode Select" "0: Voltage Monitor interrupt during Vdet1 passage,1: Voltage Monitor reset enabled when the voltage.." newline bitfld.byte 0x0 4.--5. "FSAMP,Sampling Clock Select" "0: 1/2 LOCO frequency,1: 1/4 LOCO frequency,?,?" bitfld.byte 0x0 3. "Reserved,This bit is read as 1. The write value should be 1." "0,1" newline bitfld.byte 0x0 2. "CMPE,Voltage Monitor Circuit Comparison Result Output Enable" "0: Disable voltage monitor 1 circuit comparison..,1: Enable voltage monitor 1 circuit comparison.." bitfld.byte 0x0 1. "DFDIS,Voltage Monitor Digital Filter Disable Mode Select" "0: Enable digital filter,1: Disable digital filter" newline bitfld.byte 0x0 0. "RIE,Voltage Monitor Interrupt/Reset Enable" "0: Disable,1: Enable" repeat.end group.byte 0xA84++0x0 line.byte 0x0 "VBATTMNSELR,Battery Backup Voltage Monitor Function Select Register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "VBATTMNSEL,VBATT Voltage Monitor Function Select Bit" "0,1" group.byte 0xA88++0x0 line.byte 0x0 "VBTBPCR1,VBATT Battery Power Supply Control Register 1" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "BPWSWSTP,Battery Power Supply Switch Stop" "0: Battery power supply switch enable,1: Battery power supply switch stop" group.byte 0xA90++0x0 line.byte 0x0 "LPSCR,Low Power State Control Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.byte 0x0 0.--3. 1. "LPMD,Low power mode setting bit" group.byte 0xA98++0x0 line.byte 0x0 "SSCR1,Software Standby Control Register 1" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SS1FR,Software Standby 1 Fast Return" "0: When returning from Software Standby mode 1 fast..,1: When returning from Software Standby mode 1 fast.." group.byte 0xAB0++0x0 line.byte 0x0 "LVOCR,Low Power State Control Register" hexmask.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.byte 0x0 1. "LVO1E,Low Voltage Operation 1 Enable" "0: Disable,1: Enable" newline bitfld.byte 0x0 0. "LVO0E,Low Voltage Operation 0 Enable" "0: Disable,1: Enable" group.byte 0xAD0++0x0 line.byte 0x0 "SYRSTMSK0,System Reset Mask Control Register0" bitfld.byte 0x0 7. "BUSMASK,BUS error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 6. "CMMASK,Common memory error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 5. "LM0MASK,Local memory 0 error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 4. "CLUP0MASK,CPU0 Lockup Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 2. "SWMASK,Software Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 1. "WDT0MASK,CPU0 Watchdog timer Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 0. "IWDTMASK,Independent watchdog timer Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." group.byte 0xAD4++0x0 line.byte 0x0 "SYRSTMSK1,System Reset Mask Control Register1" bitfld.byte 0x0 7. "NWMASK,Network Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 5. "LM1MASK,Local memory 1 error Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 4. "CLUP1MASK,CPU1 Lockup Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 1. "WDT1MASK,CPU1 Watchdog timer Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" group.byte 0xAD8++0x0 line.byte 0x0 "SYRSTMSK2,System Reset Mask Control Register2" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "PVD5MASK,Voltage Monitor 5 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 3. "PVD4MASK,Voltage Monitor 4 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 2. "PVD3MASK,Voltage Monitor 3 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." newline bitfld.byte 0x0 1. "PVD2MASK,Voltage Monitor 2 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." bitfld.byte 0x0 0. "PVD1MASK,Voltage Monitor 1 Reset Mask" "0: Reset occurrence is enabled.,1: Reset occurrence is disabled." group.byte 0xB04++0x0 line.byte 0x0 "PLL1LDOCR,PLL1-LDO Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "SKEEP,STBY Keep" "0: PLL1-LDO is stopped during Software Standby mode.,1: PLL1-LDO state before Software Standby mode is.." bitfld.byte 0x0 0. "LDOSTP,LDO Stop" "0: PLL1-LDO is enabled,1: PLL1-LDO is stopped" group.byte 0xB08++0x0 line.byte 0x0 "PLL2LDOCR,PLL2-LDO Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "SKEEP,STBY Keep" "0: PLL2-LDO is stopped during Software Standby mode.,1: PLL2-LDO state before Software Standby mode is.." bitfld.byte 0x0 0. "LDOSTP,LDO Stop" "0: PLL2-LDO is enabled,1: PLL2-LDO is stopped" group.byte 0xB0C++0x0 line.byte 0x0 "HOCOLDOCR,HOCO-LDO Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x0 1. "SKEEP,STBY Keep" "0: HOCO-LDO is stopped during Software Standby mode.,1: HOCO-LDO state before Software Standby mode is.." bitfld.byte 0x0 0. "LDOSTP,LDO Stop" "0: HOCO-LDO is enabled,1: HOCO-LDO is stopped" group.byte 0xB10++0x0 line.byte 0x0 "MOMCR2,Main Clock Oscillator Mode Control Register 2" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "MOMODE,Main Clock Oscillator Mode Select" "0: Normal crystal oscillator mode (value after reset),1: 8M to 12MHz custom ceramic mode" group.byte 0xC00++0x1 line.byte 0x0 "SOSCCR,Sub-clock oscillator control register" hexmask.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.byte 0x0 0. "SOSTP,Sub-Clock Oscillator Stop" "0: Operate the sub-clock oscillator,1: Stop the sub-clock oscillator" line.byte 0x1 "SOMCR,Sub Clock Oscillator Mode Control Register" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "SOSEL,Sub Clock Oscillator Switching" "0: Resonator,1: External clock input" newline hexmask.byte 0x1 2.--5. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x1 0.--1. "SODRV,Sub Clock Oscillator Drive Capability Switching" "0: :Standard(12.5pf) (value after reset),1: Low power mode 1 (9pf),?,?" group.byte 0xC40++0x0 line.byte 0x0 "VBTBER,VBATT Backup Enable Register" hexmask.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.byte 0x0 3. "VBAE,VBATT backup register access enable bit" "0: disable to access VBTBKR,1: enable to access VBTBKR" newline bitfld.byte 0x0 0.--2. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" group.byte 0xC45++0x1 line.byte 0x0 "VBTBPCR2,VBATT Battery Power Supply Control Register 2" bitfld.byte 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.byte 0x0 4. "VDETE,Voltage drop detection enable" "0: Controlled by the power on reset of VCC,1: VCC Voltage drop detection enable" newline bitfld.byte 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x0 0.--2. "VDETLVL,VDETBAT Level Select" "0: 2.8V,1: 2.53V,?,?,?,?,?,?" line.byte 0x1 "VBTBPSR,VBATT Battery Power Supply Status Register" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "BPWSWM,Battery Power Supply Switch Status Monitor" "0: VCC voltage < VDETBAT,1: VCC voltage > VDETBAT" newline bitfld.byte 0x1 4. "VBPORM,VBATT_POR Monitor" "0: VBATT_R voltage < VVBATPOR,1: VBATT_R voltage > VVBATPOR" bitfld.byte 0x1 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.byte 0x1 0. "VBPORF,VBATT_POR Flag" "0: VBATT_R voltage drop is not detected,1: VBATT_R voltage drop is detected" group.byte 0xC48++0x2 line.byte 0x0 "VBTADSR,VBATT Tamper detection Status Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "VBTADF2,VBATT Tamper Detection flag 2" "0: RTCIC2 input edge is not detected,1: RTCIC2 input edge is detected" newline bitfld.byte 0x0 1. "VBTADF1,VBATT Tamper Detection flag 1" "0: RTCIC1 input edge is not detected,1: RTCIC1 input edge is detected" bitfld.byte 0x0 0. "VBTADF0,VBATT Tamper Detection flag 0" "0: RTCIC2 input edge is not detected,1: RTCIC2 input edge is detected" line.byte 0x1 "VBTADCR1,VBATT Tamper detection Control Register 1" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "VBTADCLE2,VBATT Tamper Detection Backup Register Clear Enable 2" "0: Clear Backup Register by VBTADF2 flag is disable,1: Clear Backup Register by VBTADF2 flag is enable" newline bitfld.byte 0x1 5. "VBTADCLE1,VBATT Tamper Detection Backup Register Clear Enable 1" "0: Clear Backup Register by VBTADF1 flag is disable,1: Clear Backup Register by VBTADF1 flag is enable" bitfld.byte 0x1 4. "VBTADCLE0,VBATT Tamper Detection Backup Register Clear Enable 0" "0: Clear Backup Register by VBTADF0 flag is disable,1: Clear Backup Register by VBTADF0 flag is enable" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "VBTADIE2,VBATT Tamper Detection Interrupt Enable 2" "0: Interrupt by VBTADF2 flag is disable,1: Interrupt by VBTADF2 flag is enable" newline bitfld.byte 0x1 1. "VBTADIE1,VBATT Tamper Detection Interrupt Enable 1" "0: Interrupt by VBTADF1 flag is disable,1: Interrupt by VBTADF1 flag is enable" bitfld.byte 0x1 0. "VBTADIE0,VBATT Tamper Detection Interrupt Enable 0" "0: Interrupt by VBTADF0 flag is disable,1: Interrupt by VBTADF0 flag is enable" line.byte 0x2 "VBTADCR2,VBATT Tamper detection Control Register 2" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 2. "VBRTCES2,VBATT RTC Time Capture Event Source Select 2" "0: RTCIC2,1: VBTADF2" newline bitfld.byte 0x2 1. "VBRTCES1,VBATT RTC Time Capture Event Source Select 1" "0: RTCIC1,1: VBTADF1" bitfld.byte 0x2 0. "VBRTCES0,VBATT RTC Time Capture Event Source Select 0" "0: RTCIC0,1: VBTADF0" group.byte 0xC4C++0x2 line.byte 0x0 "VBTICTLR,VBATT Input Control Register" hexmask.byte 0x0 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x0 2. "VCH2INEN,RTCIC2 Input Enable" "0: Disabled,1: Enabled" newline bitfld.byte 0x0 1. "VCH1INEN,RTCIC1 Input Enable" "0: Disabled,1: Enabled" bitfld.byte 0x0 0. "VCH0INEN,RTCIC0 Input Enable" "0: Disabled,1: Enabled" line.byte 0x1 "VBTICTLR2,VBATT Input Control Register 2" bitfld.byte 0x1 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 6. "VCH2EG,VBATT CH2 Input Edge Select" "0: RTCIC2 pin input event is detected on falling edge,1: RTCIC2 pin input event is detected on rising edge" newline bitfld.byte 0x1 5. "VCH1EG,VBATT CH1 Input Edge Select" "0: RTCIC1 pin input event is detected on falling edge,1: RTCIC1 pin input event is detected on rising edge" bitfld.byte 0x1 4. "VCH0EG,VBATT CH0 Input Edge Select" "0: RTCIC0 pin input event is detected on falling edge,1: RTCIC0 pin input event is detected on rising edge" newline bitfld.byte 0x1 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 2. "VCH2NCE,VBATT CH2 Input Noise Canceler Enable" "0: RTCIC2 pin input noise canceler disable,1: RTCIC2 pin input noise canceler enable" newline bitfld.byte 0x1 1. "VCH1NCE,VBATT CH1 Input Noise Canceler Enable" "0: RTCIC1 pin inputs noise canceler disable,1: RTCIC1 pin input noise canceler enable" bitfld.byte 0x1 0. "VCH0NCE,VBATT CH0 Input Noise Canceler Enable" "0: RTCIC0 pin input noise canceler disable,1: RTCIC0 pin input noise canceler enable" line.byte 0x2 "VBTIMONR,VBATT Input Monitor Register" hexmask.byte 0x2 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x2 2. "VCH2MON,VBATT CH2 Input monitor" "0: RTCIC2 pin input is low level,1: RTCIC2 pin input is high level." newline bitfld.byte 0x2 1. "VCH1MON,VBATT CH1 Input monitor" "0: RTCIC1 pin input is low level,1: RTCIC1 pin input is high level." bitfld.byte 0x2 0. "VCH0MON,VBATT CH0 Input monitor" "0: RTCIC0 pin input is low level,1: RTCIC0 pin input is high level." repeat 128. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0xD00)++0x0 line.byte 0x0 "VBTBKR$1,VBATT Backup Register %s" hexmask.byte 0x0 0.--7. 1. "VBTBKR,VBTBKRn [7:0] (n=0 to 127)" repeat.end tree.end tree.end tree "TSD (Temperature Sensor Data)" base ad:0x0 tree "TSD" base ad:0x4011B17C rgroup.long 0x0++0x3 line.long 0x0 "TSCDR,Temperature Sensor Calibration Data Register" hexmask.long.tbyte 0x0 12.--31. 1. "Reserved,These bits are read as 00000000000000000000." hexmask.long.word 0x0 0.--11. 1. "TSCD,Temperature sensor calibration data is a digital value obtained using the 12-bit A/D converter unit 0 to convert the voltage output by the temperature sensor under the condition Ta = Tj = 127DegreeC and AVCC0 = 3.3 V." tree.end tree "TSD_NS" base ad:0x5011B17C rgroup.long 0x0++0x3 line.long 0x0 "TSCDR,Temperature Sensor Calibration Data Register" hexmask.long.tbyte 0x0 12.--31. 1. "Reserved,These bits are read as 00000000000000000000." hexmask.long.word 0x0 0.--11. 1. "TSCD,Temperature sensor calibration data is a digital value obtained using the 12-bit A/D converter unit 0 to convert the voltage output by the temperature sensor under the condition Ta = Tj = 127DegreeC and AVCC0 = 3.3 V." tree.end tree.end tree "TSN (Temperature Sensor)" base ad:0x0 tree "TSN" base ad:0x40235000 group.byte 0x0++0x3 line.byte 0x0 "TSCR,Temperature Sensor Control Register" bitfld.byte 0x0 7. "TSEN,Temperature Sensor Output Enable" "0: Stops the temperature sensor.,1: Starts the temperature sensor." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4. "TSOE,Temperature Sensor Enable" "0: Disables output from the temperature sensor to..,1: Enables output from the temperature sensor to.." hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "TSTRM0,TSTRM0" line.byte 0x2 "TSTRM1,TSTRM1" line.byte 0x3 "TSTST,TSTST" tree.end tree "TSN_NS" base ad:0x50235000 group.byte 0x0++0x3 line.byte 0x0 "TSCR,Temperature Sensor Control Register" bitfld.byte 0x0 7. "TSEN,Temperature Sensor Output Enable" "0: Stops the temperature sensor.,1: Starts the temperature sensor." bitfld.byte 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x0 4. "TSOE,Temperature Sensor Enable" "0: Disables output from the temperature sensor to..,1: Enables output from the temperature sensor to.." hexmask.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.byte 0x1 "TSTRM0,TSTRM0" line.byte 0x2 "TSTRM1,TSTRM1" line.byte 0x3 "TSTST,TSTST" tree.end tree.end tree "TZF (TrustZone Filter)" base ad:0x0 tree "TZF" base ad:0x40004000 group.word 0x10++0x1 line.word 0x0 "TZFOAD,TrustZone Filter Operation After Detection register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "OAD,Operation after detection" "0: NMI,1: Reset" group.word 0x14++0x1 line.word 0x0 "TZFPT,TrustZone Filter Protect register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "PROTECT,Protection of register" "0: TZFOAD register writing is possible.,1: TZFOAD register writing is protected. Read is.." tree.end tree "TZF_NS" base ad:0x50004000 group.word 0x10++0x1 line.word 0x0 "TZFOAD,TrustZone Filter Operation After Detection register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "OAD,Operation after detection" "0: NMI,1: Reset" group.word 0x14++0x1 line.word 0x0 "TZFPT,TrustZone Filter Protect register" hexmask.word.byte 0x0 8.--15. 1. "KEY,Key Code" hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "PROTECT,Protection of register" "0: TZFOAD register writing is possible.,1: TZFOAD register writing is protected. Read is.." tree.end tree.end tree "ULPT (Ultra-Low Power Timer)" base ad:0x0 tree "ULPT0" base ad:0x40220000 group.long 0x0++0xB line.long 0x0 "ULPTCNT,ULPT Counter Register" hexmask.long 0x0 0.--31. 1. "ULPTCNT,32bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the ULPTCR register the 32-bit counter is forcibly stopped and set to FFFFFFFFH." line.long 0x4 "ULPTCMA,ULPT Compare Match A Register" hexmask.long 0x4 0.--31. 1. "ULPTCMA,ULPT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" line.long 0x8 "ULPTCMB,ULPT Compare Match B Register" hexmask.long 0x8 0.--31. 1. "ULPTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" group.byte 0xC++0x6 line.byte 0x0 "ULPTCR,ULPT Control Register" bitfld.byte 0x0 7. "TCMBF,ULPT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,ULPT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,ULPT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 3.--4. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 2. "TSTOP,ULPT count forced stop" "0: no effect,1: The count is forcibly stopped." rbitfld.byte 0x0 1. "TCSTF,ULPT count status flag" "0: Count stops,1: Count running" newline bitfld.byte 0x0 0. "TSTART,ULPT count start" "0: Count stops,1: Count starts" line.byte 0x1 "ULPTMR1,ULPT Mode Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "TCK1,ULPT count source select" "0: Divided clock LOCO specified by ULPTMR2.CKS bit.,1: Divided clock fSUB specified by ULPTMR2.CKS bit." newline bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 3. "TEDGPL,ULPTEVI edge polarity select" "0: One edge(rise),1: Both edges" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 1. "TMOD1,ULPT operating mode select" "0: Timer mode,1: Event counter mode" newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ULPTMR2,ULPT Mode Register 2" bitfld.byte 0x2 7. "LPM,ULPT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" line.byte 0x3 "ULPTMR3,ULPT Mode Register 3" bitfld.byte 0x3 6.--7. "TEEPOL,ULPTEE edge polarity select" "0: Setting prohibited,1: Fall edge,?,?" bitfld.byte 0x3 4.--5. "TEECTL,ULPTEE function select" "0: Setting prohibited,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TOPOL,ULPTO polarity select" "0: ULPTO Output is started at low,1: ULPTO Output is started at high" newline bitfld.byte 0x3 1. "TEVPOL,ULPTEVI polarity switch" "0: Extarnal event input(ULPTEVI port) forward..,1: Extarnal event input(ULPTEVI port) inversion" bitfld.byte 0x3 0. "TCNTCTL,ULPT count function select" "0: Continuous mode,1: One shot mode" line.byte 0x4 "ULPTIOC,ULPT I/O Control Register" bitfld.byte 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x4 6. "TIOGT0,ULPTEVI count control" "0: Extarnal event is always counted,1: Extarnal event is counted while the ULPTEE pin.." newline bitfld.byte 0x4 4.--5. "TIPF,ULPTEVI input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" bitfld.byte 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x4 2. "TOE,ULPTO output enable" "0: ULPTO output disabled (port),1: ULPTO output enabled" bitfld.byte 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x5 "ULPTISR,ULPT Event Pin Select Register" hexmask.byte 0x5 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x5 2. "RCCPSEL2,ULPTEE polarty selection" "0: An external event is counted during the..,1: An external event is counted during the.." newline bitfld.byte 0x5 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x6 "ULPTCMSR,ULPT Compare Match Function Select Register" bitfld.byte 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 6. "TOPOLB,ULPTOB polarity select" "0: ULPTOB Output is started at low,1: ULPTOB Output is started at high" newline bitfld.byte 0x6 5. "TOEB,ULPTOB output enable" "0: ULPTOB output disabled (port),1: ULPTOB output enabled" bitfld.byte 0x6 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x6 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 2. "TOPOLA,ULPTOA polarity select" "0: ULPTOA Output is started at low,1: ULPTOA Output is started at high" newline bitfld.byte 0x6 1. "TOEA,ULPTOA output enable" "0: ULPTOA output disabled (port),1: ULPTOA output enabled" bitfld.byte 0x6 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" tree.end tree "ULPT0_NS" base ad:0x50220000 group.long 0x0++0xB line.long 0x0 "ULPTCNT,ULPT Counter Register" hexmask.long 0x0 0.--31. 1. "ULPTCNT,32bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the ULPTCR register the 32-bit counter is forcibly stopped and set to FFFFFFFFH." line.long 0x4 "ULPTCMA,ULPT Compare Match A Register" hexmask.long 0x4 0.--31. 1. "ULPTCMA,ULPT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" line.long 0x8 "ULPTCMB,ULPT Compare Match B Register" hexmask.long 0x8 0.--31. 1. "ULPTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" group.byte 0xC++0x6 line.byte 0x0 "ULPTCR,ULPT Control Register" bitfld.byte 0x0 7. "TCMBF,ULPT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,ULPT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,ULPT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 3.--4. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 2. "TSTOP,ULPT count forced stop" "0: no effect,1: The count is forcibly stopped." rbitfld.byte 0x0 1. "TCSTF,ULPT count status flag" "0: Count stops,1: Count running" newline bitfld.byte 0x0 0. "TSTART,ULPT count start" "0: Count stops,1: Count starts" line.byte 0x1 "ULPTMR1,ULPT Mode Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "TCK1,ULPT count source select" "0: Divided clock LOCO specified by ULPTMR2.CKS bit.,1: Divided clock fSUB specified by ULPTMR2.CKS bit." newline bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 3. "TEDGPL,ULPTEVI edge polarity select" "0: One edge(rise),1: Both edges" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 1. "TMOD1,ULPT operating mode select" "0: Timer mode,1: Event counter mode" newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ULPTMR2,ULPT Mode Register 2" bitfld.byte 0x2 7. "LPM,ULPT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" line.byte 0x3 "ULPTMR3,ULPT Mode Register 3" bitfld.byte 0x3 6.--7. "TEEPOL,ULPTEE edge polarity select" "0: Setting prohibited,1: Fall edge,?,?" bitfld.byte 0x3 4.--5. "TEECTL,ULPTEE function select" "0: Setting prohibited,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TOPOL,ULPTO polarity select" "0: ULPTO Output is started at low,1: ULPTO Output is started at high" newline bitfld.byte 0x3 1. "TEVPOL,ULPTEVI polarity switch" "0: Extarnal event input(ULPTEVI port) forward..,1: Extarnal event input(ULPTEVI port) inversion" bitfld.byte 0x3 0. "TCNTCTL,ULPT count function select" "0: Continuous mode,1: One shot mode" line.byte 0x4 "ULPTIOC,ULPT I/O Control Register" bitfld.byte 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x4 6. "TIOGT0,ULPTEVI count control" "0: Extarnal event is always counted,1: Extarnal event is counted while the ULPTEE pin.." newline bitfld.byte 0x4 4.--5. "TIPF,ULPTEVI input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" bitfld.byte 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x4 2. "TOE,ULPTO output enable" "0: ULPTO output disabled (port),1: ULPTO output enabled" bitfld.byte 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x5 "ULPTISR,ULPT Event Pin Select Register" hexmask.byte 0x5 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x5 2. "RCCPSEL2,ULPTEE polarty selection" "0: An external event is counted during the..,1: An external event is counted during the.." newline bitfld.byte 0x5 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x6 "ULPTCMSR,ULPT Compare Match Function Select Register" bitfld.byte 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 6. "TOPOLB,ULPTOB polarity select" "0: ULPTOB Output is started at low,1: ULPTOB Output is started at high" newline bitfld.byte 0x6 5. "TOEB,ULPTOB output enable" "0: ULPTOB output disabled (port),1: ULPTOB output enabled" bitfld.byte 0x6 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x6 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 2. "TOPOLA,ULPTOA polarity select" "0: ULPTOA Output is started at low,1: ULPTOA Output is started at high" newline bitfld.byte 0x6 1. "TOEA,ULPTOA output enable" "0: ULPTOA output disabled (port),1: ULPTOA output enabled" bitfld.byte 0x6 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" tree.end tree "ULPT1" base ad:0x40220100 group.long 0x0++0xB line.long 0x0 "ULPTCNT,ULPT Counter Register" hexmask.long 0x0 0.--31. 1. "ULPTCNT,32bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the ULPTCR register the 32-bit counter is forcibly stopped and set to FFFFFFFFH." line.long 0x4 "ULPTCMA,ULPT Compare Match A Register" hexmask.long 0x4 0.--31. 1. "ULPTCMA,ULPT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" line.long 0x8 "ULPTCMB,ULPT Compare Match B Register" hexmask.long 0x8 0.--31. 1. "ULPTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" group.byte 0xC++0x6 line.byte 0x0 "ULPTCR,ULPT Control Register" bitfld.byte 0x0 7. "TCMBF,ULPT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,ULPT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,ULPT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 3.--4. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 2. "TSTOP,ULPT count forced stop" "0: no effect,1: The count is forcibly stopped." rbitfld.byte 0x0 1. "TCSTF,ULPT count status flag" "0: Count stops,1: Count running" newline bitfld.byte 0x0 0. "TSTART,ULPT count start" "0: Count stops,1: Count starts" line.byte 0x1 "ULPTMR1,ULPT Mode Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "TCK1,ULPT count source select" "0: Divided clock LOCO specified by ULPTMR2.CKS bit.,1: Divided clock fSUB specified by ULPTMR2.CKS bit." newline bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 3. "TEDGPL,ULPTEVI edge polarity select" "0: One edge(rise),1: Both edges" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 1. "TMOD1,ULPT operating mode select" "0: Timer mode,1: Event counter mode" newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ULPTMR2,ULPT Mode Register 2" bitfld.byte 0x2 7. "LPM,ULPT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" line.byte 0x3 "ULPTMR3,ULPT Mode Register 3" bitfld.byte 0x3 6.--7. "TEEPOL,ULPTEE edge polarity select" "0: Setting prohibited,1: Fall edge,?,?" bitfld.byte 0x3 4.--5. "TEECTL,ULPTEE function select" "0: Setting prohibited,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TOPOL,ULPTO polarity select" "0: ULPTO Output is started at low,1: ULPTO Output is started at high" newline bitfld.byte 0x3 1. "TEVPOL,ULPTEVI polarity switch" "0: Extarnal event input(ULPTEVI port) forward..,1: Extarnal event input(ULPTEVI port) inversion" bitfld.byte 0x3 0. "TCNTCTL,ULPT count function select" "0: Continuous mode,1: One shot mode" line.byte 0x4 "ULPTIOC,ULPT I/O Control Register" bitfld.byte 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x4 6. "TIOGT0,ULPTEVI count control" "0: Extarnal event is always counted,1: Extarnal event is counted while the ULPTEE pin.." newline bitfld.byte 0x4 4.--5. "TIPF,ULPTEVI input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" bitfld.byte 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x4 2. "TOE,ULPTO output enable" "0: ULPTO output disabled (port),1: ULPTO output enabled" bitfld.byte 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x5 "ULPTISR,ULPT Event Pin Select Register" hexmask.byte 0x5 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x5 2. "RCCPSEL2,ULPTEE polarty selection" "0: An external event is counted during the..,1: An external event is counted during the.." newline bitfld.byte 0x5 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x6 "ULPTCMSR,ULPT Compare Match Function Select Register" bitfld.byte 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 6. "TOPOLB,ULPTOB polarity select" "0: ULPTOB Output is started at low,1: ULPTOB Output is started at high" newline bitfld.byte 0x6 5. "TOEB,ULPTOB output enable" "0: ULPTOB output disabled (port),1: ULPTOB output enabled" bitfld.byte 0x6 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x6 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 2. "TOPOLA,ULPTOA polarity select" "0: ULPTOA Output is started at low,1: ULPTOA Output is started at high" newline bitfld.byte 0x6 1. "TOEA,ULPTOA output enable" "0: ULPTOA output disabled (port),1: ULPTOA output enabled" bitfld.byte 0x6 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" tree.end tree "ULPT1_NS" base ad:0x50220100 group.long 0x0++0xB line.long 0x0 "ULPTCNT,ULPT Counter Register" hexmask.long 0x0 0.--31. 1. "ULPTCNT,32bit counter and reload registerNOTE : When 1 is written to the TSTOP bit in the ULPTCR register the 32-bit counter is forcibly stopped and set to FFFFFFFFH." line.long 0x4 "ULPTCMA,ULPT Compare Match A Register" hexmask.long 0x4 0.--31. 1. "ULPTCMA,ULPT Compare Match A RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" line.long 0x8 "ULPTCMB,ULPT Compare Match B Register" hexmask.long 0x8 0.--31. 1. "ULPTCMB,AGT Compare Match B RegisterNOTE : When 1 is written to the TSTOP bit in the ULPTCR register set to FFFFFFFFH" group.byte 0xC++0x6 line.byte 0x0 "ULPTCR,ULPT Control Register" bitfld.byte 0x0 7. "TCMBF,ULPT compare match B flag" "0: No Match,1: Match" bitfld.byte 0x0 6. "TCMAF,ULPT compare match A flag" "0: No Match,1: Match" newline bitfld.byte 0x0 5. "TUNDF,ULPT underflow flag" "0: No underflow,1: Underflow" bitfld.byte 0x0 3.--4. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.byte 0x0 2. "TSTOP,ULPT count forced stop" "0: no effect,1: The count is forcibly stopped." rbitfld.byte 0x0 1. "TCSTF,ULPT count status flag" "0: Count stops,1: Count running" newline bitfld.byte 0x0 0. "TSTART,ULPT count start" "0: Count stops,1: Count starts" line.byte 0x1 "ULPTMR1,ULPT Mode Register 1" bitfld.byte 0x1 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.byte 0x1 5. "TCK1,ULPT count source select" "0: Divided clock LOCO specified by ULPTMR2.CKS bit.,1: Divided clock fSUB specified by ULPTMR2.CKS bit." newline bitfld.byte 0x1 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 3. "TEDGPL,ULPTEVI edge polarity select" "0: One edge(rise),1: Both edges" newline bitfld.byte 0x1 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x1 1. "TMOD1,ULPT operating mode select" "0: Timer mode,1: Event counter mode" newline bitfld.byte 0x1 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.byte 0x2 "ULPTMR2,ULPT Mode Register 2" bitfld.byte 0x2 7. "LPM,ULPT Low Power Mode" "0: Normal mode,1: Low Power mode" hexmask.byte 0x2 3.--6. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.byte 0x2 0.--2. "CKS,fsub/LOCO count source clock frequency division ratio select" "0: 1/1,1: 1/2,?,?,?,?,?,?" line.byte 0x3 "ULPTMR3,ULPT Mode Register 3" bitfld.byte 0x3 6.--7. "TEEPOL,ULPTEE edge polarity select" "0: Setting prohibited,1: Fall edge,?,?" bitfld.byte 0x3 4.--5. "TEECTL,ULPTEE function select" "0: Setting prohibited,?,?,?" newline bitfld.byte 0x3 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x3 2. "TOPOL,ULPTO polarity select" "0: ULPTO Output is started at low,1: ULPTO Output is started at high" newline bitfld.byte 0x3 1. "TEVPOL,ULPTEVI polarity switch" "0: Extarnal event input(ULPTEVI port) forward..,1: Extarnal event input(ULPTEVI port) inversion" bitfld.byte 0x3 0. "TCNTCTL,ULPT count function select" "0: Continuous mode,1: One shot mode" line.byte 0x4 "ULPTIOC,ULPT I/O Control Register" bitfld.byte 0x4 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x4 6. "TIOGT0,ULPTEVI count control" "0: Extarnal event is always counted,1: Extarnal event is counted while the ULPTEE pin.." newline bitfld.byte 0x4 4.--5. "TIPF,ULPTEVI input filter select" "0: No filter,1: Filter sampled at PCLKB,?,?" bitfld.byte 0x4 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.byte 0x4 2. "TOE,ULPTO output enable" "0: ULPTO output disabled (port),1: ULPTO output enabled" bitfld.byte 0x4 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x5 "ULPTISR,ULPT Event Pin Select Register" hexmask.byte 0x5 3.--7. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.byte 0x5 2. "RCCPSEL2,ULPTEE polarty selection" "0: An external event is counted during the..,1: An external event is counted during the.." newline bitfld.byte 0x5 0.--1. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" line.byte 0x6 "ULPTCMSR,ULPT Compare Match Function Select Register" bitfld.byte 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 6. "TOPOLB,ULPTOB polarity select" "0: ULPTOB Output is started at low,1: ULPTOB Output is started at high" newline bitfld.byte 0x6 5. "TOEB,ULPTOB output enable" "0: ULPTOB output disabled (port),1: ULPTOB output enabled" bitfld.byte 0x6 4. "TCMEB,Compare match B register enable" "0: Disable compare match B register,1: Enable compare match B register" newline bitfld.byte 0x6 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.byte 0x6 2. "TOPOLA,ULPTOA polarity select" "0: ULPTOA Output is started at low,1: ULPTOA Output is started at high" newline bitfld.byte 0x6 1. "TOEA,ULPTOA output enable" "0: ULPTOA output disabled (port),1: ULPTOA output enabled" bitfld.byte 0x6 0. "TCMEA,Compare match A register enable" "0: Disable compare match A register,1: Enable compare match A register" tree.end tree.end tree "USBFS (USB 2.0 Full-Speed Module)" base ad:0x0 tree "USBFS" base ad:0x40250000 group.word 0x0++0x1 line.word 0x0 "SYSCFG,System Configuration Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SCKE,USB Clock Enable" "0: Stops supplying the clock signal to the USB.,1: Enables supplying the clock signal to the USB." newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "DCFM,Controller Function Select" "0: Function controller is selected.,1: Host controller is selected." newline bitfld.word 0x0 5. "DRPD,D+/D- Line Resistor Control" "0: Pulling down the lines is disabled.,1: Pulling down the lines is enabled." bitfld.word 0x0 4. "DPRPU,D+ Line Resistor Control" "0: Pulling up the line is disabled.,1: Pulling up the line is enabled." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "USBE,USB Operation Enable" "0: USB operation is disabled.,1: USB operation is enabled." rgroup.word 0x4++0x1 line.word 0x0 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x0 14.--15. "OVCMON,External USB0_OVRCURA/ USB0_OVRCURB Input Pin MonitorThe OCVMON[1] bit indicates the status of the USBHS_OVRCURA pin. The OCVMON[0] bit indicates the status of the USBHS_OVRCURB pin." "0,1,2,3" hexmask.word.byte 0x0 7.--13. 1. "Reserved,These bits are read as 0000000." newline bitfld.word 0x0 6. "HTACT,USB Host Sequencer Status Monitor" "0: Host sequencer of the USB is completely stopped.,1: Host sequencer of the USB is not completely.." bitfld.word 0x0 5. "SOFEA,Active Monitor When the Host Controller is Selected." "0: SOF output is stopped.,1: SOF output is operating." newline bitfld.word 0x0 3.--4. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 2. "IDMON,External ID0 Input Pin Monitor" "0: USB0_ID pin is low,1: USB0_ID pin is high" newline bitfld.word 0x0 0.--1. "LNST,USB Data Line Status Monitor" "0: SE0,1: J-State,?,?" group.word 0x8++0x1 line.word 0x0 "DVSTCTR0,Device State Control Register 0" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 11. "HNPBTOA,Host Negotiation Protocol (HNP) Control This bit is used when switching from device B to device A while in OTG mode. If the HNPBTOA bit is 1 the internal function control keeps the suspended state until the HNP processing ends even though.." "0: Normal Operation,1: Switching from device B to device A is enabled" newline bitfld.word 0x0 10. "EXICEN,USB0_EXICEN Output Pin Control" "0: External USB0_EXICEN pin outputs low,1: External USB0_EXICEN pin outputs high" bitfld.word 0x0 9. "VBUSEN,USB0_VBUSEN Output Pin Control" "0: External USB0_VBUSEN pin outputs low,1: External USB0_VBUSEN pin outputs high" newline bitfld.word 0x0 8. "WKUP,Wakeup Output" "0: Remote wakeup signal is not output.,1: Remote wakeup signal is output." bitfld.word 0x0 7. "RWUPE,Wakeup Detection Enable" "0: Downstream port wakeup is disabled.,1: Downstream port wakeup is enabled." newline bitfld.word 0x0 6. "USBRST,USB Bus Reset Output" "0: USB bus reset signal is not output.,1: USB bus reset signal is output." bitfld.word 0x0 5. "RESUME,Resume Output" "0: Resume signal is not output.,1: Resume signal is output." newline bitfld.word 0x0 4. "UACT,USB Bus Enable" "0: Downstream port is disabled (SOF transmission is..,1: Downstream port is enabled (SOF transmission is.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.word 0x0 0.--2. "RHST,USB Bus Reset Status" "0: USB bus reset in progress(When the host..,1: Low-speed connection(When the host controller is..,?,?,?,?,?,?" group.word 0x14++0x1 line.word 0x0 "CFIFO,CFIFO Port Register" hexmask.word 0x0 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.byte 0x14++0x1 line.byte 0x0 "CFIFOL,CFIFO Port Register L" line.byte 0x1 "CFIFOH,CFIFO Port Register H" group.word 0x18++0x1 line.word 0x0 "D0FIFO,D0FIFO Port Register" hexmask.word 0x0 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.byte 0x18++0x1 line.byte 0x0 "D0FIFOL,D0FIFO Port Register L" line.byte 0x1 "D0FIFOH,D0FIFO Port Register H" group.word 0x1C++0x1 line.word 0x0 "D1FIFO,D1FIFO Port Register" hexmask.word 0x0 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.byte 0x1C++0x1 line.byte 0x0 "D1FIFOL,D1FIFO Port Register L" line.byte 0x1 "D1FIFOH,D1FIFO Port Register H" group.word 0x20++0x3 line.word 0x0 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time the.." rbitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound.,1: The buffer pointer is rewound." newline bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 10. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "BIGEND,CFIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "ISEL,CFIFO Port Access Direction When DCP is Selected" "0: Reading from the buffer memory is selected,1: Writing to the buffer memory is selected" newline bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,CFIFO Port Access Pipe Specification" line.word 0x2 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x2 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled.,1: FIFO port access is enabled." hexmask.word.byte 0x2 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word 0x2 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data." group.word 0x28++0xB line.word 0x0 "D0FIFOSEL,D0FIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time the.." rbitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound.,1: The buffer pointer is rewound." newline bitfld.word 0x0 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled.,1: Auto buffer clear mode is enabled." bitfld.word 0x0 12. "DREQE,DMA/DTC Transfer Request Enable" "0: DMA/DTC transfer request is disabled.,1: DMA/DTC transfer request is enabled." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x2 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x2 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled.,1: FIFO port access is enabled." hexmask.word.byte 0x2 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word 0x2 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data." line.word 0x4 "D1FIFOSEL,D1FIFO Port Select Register" bitfld.word 0x4 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time the.." rbitfld.word 0x4 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound.,1: The buffer pointer is rewound." newline bitfld.word 0x4 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled.,1: Auto buffer clear mode is enabled." bitfld.word 0x4 12. "DREQE,DMA/DTC Transfer Request Enable" "0: DMA/DTC transfer request is disabled.,1: DMA/DTC transfer request is enabled." newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline hexmask.word.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x4 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x6 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x6 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x6 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x6 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled.,1: FIFO port access is enabled." hexmask.word.byte 0x6 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word 0x6 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data." line.word 0x8 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x8 15. "VBSE,VBUS Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 14. "RSME,Resume Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 13. "SOFE,Frame Number Update Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 12. "DVSE,Device State Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline hexmask.word.byte 0x8 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.word 0xA "INTENB1,Interrupt Enable Register 1" bitfld.word 0xA 15. "OVRCRE,Overcurrent Input Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 14. "BCHGE,USB Bus Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xA 12. "DTCHE,Disconnection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 11. "ATTCHE,Connection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" hexmask.word.byte 0xA 7.--10. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.word 0xA 6. "EOFERRE,EOF Error Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 5. "SIGNE,Setup Transaction Error Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 4. "SACKE,Setup Transaction Normal Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0xA 0. "PDDETINTE,Port 0 Portable Device detection interrupt enabled.When PDDETINT interrupt is detected specify disable / enable USB interrupt output." "0: Interrupt output disabled,1: Enable interrupt output" group.word 0x36++0x7 line.word 0x0 "BRDYENB,BRDY Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "PIPE9BRDYE,BRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 8. "PIPE8BRDYE,BRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 7. "PIPE7BRDYE,BRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 6. "PIPE6BRDYE,BRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 5. "PIPE5BRDYE,BRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 4. "PIPE4BRDYE,BRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 3. "PIPE3BRDYE,BRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 2. "PIPE2BRDYE,BRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 1. "PIPE1BRDYE,BRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 0. "PIPE0BRDYE,BRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" line.word 0x2 "NRDYENB,NRDY Interrupt Enable Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x2 9. "PIPE9NRDYE,NRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 8. "PIPE8NRDYE,NRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 7. "PIPE7NRDYE,NRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 6. "PIPE6NRDYE,NRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 5. "PIPE5NRDYE,NRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 4. "PIPE4NRDYE,NRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 3. "PIPE3NRDYE,NRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 2. "PIPE2NRDYE,NRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 1. "PIPE1NRDYE,NRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 0. "PIPE0NRDYE,NRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" line.word 0x4 "BEMPENB,BEMP Interrupt Enable Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x4 9. "PIPE9BEMPE,BEMP Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 8. "PIPE8BEMPE,BEMP Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 7. "PIPE7BEMPE,BEMP Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 6. "PIPE6BEMPE,BEMP Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 5. "PIPE5BEMPE,BEMP Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 4. "PIPE4BEMPE,BEMP Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 3. "PIPE3BEMPE,BEMP Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 2. "PIPE2BEMPE,BEMP Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 1. "PIPE1BEMPE,BEMP Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 0. "PIPE0BEMPE,BEMP Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" line.word 0x6 "SOFCFG,SOF Output Configuration Register" hexmask.word.byte 0x6 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x6 8. "TRNENSEL,Transaction-Enabled Time Select" "0: For non-low-speed communication,1: For low-speed communication" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "BRDYM,BRDY Interrupt Status Clear Timing" "0: Software clears the status.,1: The USB clears the status when data has been.." newline bitfld.word 0x6 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.word 0x6 4. "EDGESTS,Edge Interrupt Output Status Monitor" "0: before stopping the clock supply to the USB module,1: the edge interrupt output signal is in the.." newline hexmask.word.byte 0x6 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x40++0x3 line.word 0x0 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x0 15. "VBINT,VBUS Interrupt Status" "0: VBUS interrupts are not generated.,1: VBUS interrupts are generated." bitfld.word 0x0 14. "RESM,Resume Interrupt Status" "0: Resume interrupts are not generated.,1: Resume interrupts are generated." newline bitfld.word 0x0 13. "SOFR,Frame Number Refresh Interrupt Status" "0: SOF interrupts are not generated.,1: SOF interrupts are generated." bitfld.word 0x0 12. "DVST,Device State Transition Interrupt Status" "0: Device state transition interrupts are not..,1: Device state transition interrupts are generated." newline bitfld.word 0x0 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: Control transfer stage transition interrupts are..,1: Control transfer stage transition interrupts are.." rbitfld.word 0x0 10. "BEMP,Buffer Empty Interrupt Status" "0: BEMP interrupts are not generated.,1: BEMP interrupts are generated." newline rbitfld.word 0x0 9. "NRDY,Buffer Not Ready Interrupt Status" "0: NRDY interrupts are not generated.,1: NRDY interrupts are generated." rbitfld.word 0x0 8. "BRDY,Buffer Ready Interrupt Status" "0: BRDY interrupts are not generated.,1: BRDY interrupts are generated." newline rbitfld.word 0x0 7. "VBSTS,VBUS Input Status" "0: USB0_VBUS pin is low.,1: USB0_VBUS pin is high." rbitfld.word 0x0 4.--6. "DVSQ,Device State" "0: Suspended state,1: Default state,?,?,?,?,?,?" newline bitfld.word 0x0 3. "VALID,USB Request Reception" "0: Setup packet is not received,1: Setup packet is received" rbitfld.word 0x0 0.--2. "CTSQ,Control Transfer Stage" "0: Setting prohibited,1: Control read data stage,?,?,?,?,?,?" line.word 0x2 "INTSTS1,Interrupt Status Register 1" bitfld.word 0x2 15. "OVRCR,Overcurrent Input Change Interrupt Status" "0: OVRCR interrupts are not generated.,1: OVRCR interrupts are generated." bitfld.word 0x2 14. "BCHG,USB Bus Change Interrupt Status" "0: BCHG interrupts are not generated.,1: BCHG interrupts are generated." newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "DTCH,USB Disconnection Detection Interrupt Status" "0: DTCH interrupts are not generated.,1: DTCH interrupts are generated." newline bitfld.word 0x2 11. "ATTCH,ATTCH Interrupt Status" "0: ATTCH interrupts are not generated.,1: ATTCH interrupts are generated." hexmask.word.byte 0x2 7.--10. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.word 0x2 6. "EOFERR,EOF Error Detection Interrupt Status" "0: EOFERR interrupts are not generated.,1: EOFERR interrupts are generated." bitfld.word 0x2 5. "SIGN,Setup Transaction Error Interrupt Status" "0: SIGN interrupts are not generated.,1: SIGN interrupts are generated." newline bitfld.word 0x2 4. "SACK,Setup Transaction Normal Response Interrupt Status" "0: SACK interrupts are not generated.,1: SACK interrupts are generated." bitfld.word 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x2 0. "PDDETINT,Port 0 Portable Device Detection Interrupt Status.When the host controller function is selected Portable Device detection interrupt status is displayed." "0: PDDETINT interrupt not occurred,1: PDDETINT interrupt generated" group.word 0x46++0xB line.word 0x0 "BRDYSTS,BRDY Interrupt Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "PIPE9BRDY,BRDY Interrupt Status for PIPE9" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 8. "PIPE8BRDY,BRDY Interrupt Status for PIPE8" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 7. "PIPE7BRDY,BRDY Interrupt Status for PIPE7" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 6. "PIPE6BRDY,BRDY Interrupt Status for PIPE6" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 5. "PIPE5BRDY,BRDY Interrupt Status for PIPE5" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 4. "PIPE4BRDY,BRDY Interrupt Status for PIPE4" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 3. "PIPE3BRDY,BRDY Interrupt Status for PIPE3" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 2. "PIPE2BRDY,BRDY Interrupt Status for PIPE2" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 1. "PIPE1BRDY,BRDY Interrupt Status for PIPE1" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 0. "PIPE0BRDY,BRDY Interrupt Status for PIPE0" "0: Interrupts are not generated.,1: Interrupts are generated." line.word 0x2 "NRDYSTS,NRDY Interrupt Status Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x2 9. "PIPE9NRDY,NRDY Interrupt Status for PIPE9" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 8. "PIPE8NRDY,NRDY Interrupt Status for PIPE8" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 7. "PIPE7NRDY,NRDY Interrupt Status for PIPE7" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 6. "PIPE6NRDY,NRDY Interrupt Status for PIPE6" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 5. "PIPE5NRDY,NRDY Interrupt Status for PIPE5" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 4. "PIPE4NRDY,NRDY Interrupt Status for PIPE4" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 3. "PIPE3NRDY,NRDY Interrupt Status for PIPE3" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 2. "PIPE2NRDY,NRDY Interrupt Status for PIPE2" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 1. "PIPE1NRDY,NRDY Interrupt Status for PIPE1" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 0. "PIPE0NRDY,NRDY Interrupt Status for PIPE0" "0: Interrupts are not generated.,1: Interrupts are generated." line.word 0x4 "BEMPSTS,BEMP Interrupt Status Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x4 9. "PIPE9BEMP,BEMP Interrupt Status for PIPE9" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 8. "PIPE8BEMP,BEMP Interrupt Status for PIPE8" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 7. "PIPE7BEMP,BEMP Interrupt Status for PIPE7" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 6. "PIPE6BEMP,BEMP Interrupt Status for PIPE6" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 5. "PIPE5BEMP,BEMP Interrupt Status for PIPE5" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 4. "PIPE4BEMP,BEMP Interrupt Status for PIPE4" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 3. "PIPE3BEMP,BEMP Interrupt Status for PIPE3" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 2. "PIPE2BEMP,BEMP Interrupt Status for PIPE2" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 1. "PIPE1BEMP,BEMP Interrupt Status for PIPE1" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 0. "PIPE0BEMP,BEMP Interrupt Status for PIPE0" "0: Interrupts are not generated.,1: Interrupts are generated." line.word 0x6 "FRMNUM,Frame Number Register" bitfld.word 0x6 15. "OVRN,Overrun/Underrun Detection Status" "0: No error,1: An error occurred" bitfld.word 0x6 14. "CRCE,Receive Data Error" "0: No error,1: An error occurred" newline bitfld.word 0x6 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x6 0.--10. 1. "FRNM,Frame NumberLatest frame number" line.word 0x8 "DVCHGR,Device State Change Register" bitfld.word 0x8 15. "DVCHG,Device State Change" "0: Disables the writing to the..,1: Enables the writing to the USBADDR.STSRECOV[3:0].." hexmask.word 0x8 0.--14. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." line.word 0xA "USBADDR,USB Address Register" hexmask.word.byte 0xA 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0xA 8.--11. 1. "STSRECOV,Status Recovery" newline bitfld.word 0xA 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0xA 0.--6. 1. "USBADDR,USB AddressWhen the function controller is selected these bits indicate the USB address assigned by the host when the SET_ADDRESS request is successfully processed." group.word 0x54++0xD line.word 0x0 "USBREQ,USB Request Type Register" hexmask.word.byte 0x0 8.--15. 1. "BREQUEST,RequestThese bits store the USB request bRequest value." hexmask.word.byte 0x0 0.--7. 1. "BMREQUESTTYPE,Request TypeThese bits store the USB request bmRequestType value." line.word 0x2 "USBVAL,USB Request Value Register" hexmask.word 0x2 0.--15. 1. "WVALUE,ValueThese bits store the USB request wValue value." line.word 0x4 "USBINDX,USB Request Index Register" hexmask.word 0x4 0.--15. 1. "WINDEX,IndexThese bits store the USB request wIndex value." line.word 0x6 "USBLENG,USB Request Length Register" hexmask.word 0x6 0.--15. 1. "WLENGTUH,LengthThese bits store the USB request wLength value." line.word 0x8 "DCPCFG,DCP Configuration Register" hexmask.word.byte 0x8 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x8 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe continued at the end of transfer,1: Pipe disabled at the end of transfer" newline bitfld.word 0x8 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x8 4. "DIR,Transfer Direction" "0: Data receiving direction,1: Data transmitting direction" newline hexmask.word.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.word 0xA "DCPMAXP,DCP Maximum Packet Size Register" hexmask.word.byte 0xA 12.--15. 1. "DEVSEL,Device Select" hexmask.word.byte 0xA 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline hexmask.word.byte 0xA 0.--6. 1. "MXPS,Maximum Packet SizeThese bits set the maximum amount of data (maximum packet size) in payloads for the DCP." line.word 0xC "DCPCTR,DCP Control Register" rbitfld.word 0xC 15. "BSTS,Buffer Status" "0: Buffer access is disabled.,1: Buffer access is enabled." bitfld.word 0xC 14. "SUREQ,Setup Token Transmission" "0: Invalid,1: Transmits the setup packet." newline bitfld.word 0xC 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0xC 11. "SUREQCLR,SUREQ Bit Clear" "0: Invalid,1: Clears the SUREQ bit to 0." newline bitfld.word 0xC 9.--10. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0xC 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0." newline bitfld.word 0xC 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1." rbitfld.word 0xC 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: DATA1" newline rbitfld.word 0xC 5. "PBUSY,Pipe Busy" "0: DCP is not used for the transaction.,1: DCP is used for the transaction." bitfld.word 0xC 3.--4. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0xC 2. "CCPL,Control Transfer End Enable" "0: Invalid,1: Completion of control transfer is enabled." bitfld.word 0xC 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),?,?" group.word 0x64++0x1 line.word 0x0 "PIPESEL,Pipe Window Select Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "PIPESEL,Pipe Window Select" group.word 0x68++0x1 line.word 0x0 "PIPECFG,Pipe Configuration Register" bitfld.word 0x0 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Bulk transfer(PIPE1 and PIPE5) /Setting..,?,?" bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 10. "BFRE,BRDY Interrupt Operation Specification" "0: BRDY interrupt upon transmitting or receiving data,1: BRDY interrupt upon completion of reading data" bitfld.word 0x0 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer" newline bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe assignment continued at the end of transfer,1: Pipe assignment disabled at the end of transfer" newline bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction" hexmask.word.byte 0x0 0.--3. 1. "EPNUM,Endpoint NumberThese bits specify the endpoint number for the selected pipe.Setting 0000b means unused pipe." group.word 0x6C++0x3 line.word 0x0 "PIPEMAXP,Pipe Maximum Packet Size Register" hexmask.word.byte 0x0 12.--15. 1. "DEVSEL,Device Select" bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word 0x0 0.--8. 1. "MXPS,Maximum Packet SizePIPE1 and PIPE2: 1 byte (001h) to 256 bytes (100h)PIPE3 to PIPE5: 8 bytes (008h) 16 bytes (010h) 32 bytes (020h) 64 bytes (040h) (Bits [8:7] and [2:0] are not provided.)PIPE6 to PIPE9: 1 byte (001h) to 64 bytes (040h).." line.word 0x2 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x2 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x2 12. "IFIS,Isochronous IN Buffer Flush" "0: The buffer is not flushed.,1: The buffer is flushed." newline hexmask.word 0x2 3.--11. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." bitfld.word 0x2 0.--2. "IITV,Interval Error Detection IntervalSpecifies the interval error detection timing for the selected pipe in terms of frames which is expressed as nth power of 2." "0,1,2,3,4,5,6,7" repeat 5. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x70)++0x1 line.word 0x0 "PIPE$1CTR,Pipe %s Control Register" rbitfld.word 0x0 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled.,1: Buffer access by the CPU is enabled." rbitfld.word 0x0 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer" newline bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled.,1: Auto response is enabled." newline bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)" bitfld.word 0x0 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0." newline bitfld.word 0x0 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1." rbitfld.word 0x0 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" newline rbitfld.word 0x0 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the transaction.,1: The relevant pipe is used for the transaction." bitfld.word 0x0 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),?,?" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x7A)++0x1 line.word 0x0 "PIPE$1CTR,Pipe %s Control Register" rbitfld.word 0x0 15. "BSTS,Buffer Status" "0: Buffer access is disabled.,1: Buffer access is enabled." hexmask.word.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear Mode" "0: Auto buffer clear mode is disabled.,1: Auto buffer clear mode is enabled (all buffers.." bitfld.word 0x0 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0." newline bitfld.word 0x0 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1." rbitfld.word 0x0 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" newline rbitfld.word 0x0 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used at the USB bus.,1: The relevant pipe is used at the USB bus." bitfld.word 0x0 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),?,?" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x90)++0x1 line.word 0x0 "PIPE$1TRE,Pipe %s Transaction Counter Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled.,1: Transaction counter is enabled." newline bitfld.word 0x0 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x92)++0x1 line.word 0x0 "PIPE$1TRN,Pipe %s Transaction Counter Register" hexmask.word 0x0 0.--15. 1. "TRNCNT,Transaction Counter" repeat.end group.long 0xB0++0x7 line.long 0x0 "BCCTRL1,Battery Charging signal control register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline rbitfld.long 0x0 9. "CHGDETST,Charging Down Stream Port detection flag(Valid when CHGDETE = 1)The CHGDET input status from the USB-PHY is displayed." "0: Not detected,1: detection" rbitfld.long 0x0 8. "PDDETSTS,Portable Device Detection Flag(Valid when UPDATE = 1)PRTBLDET input status from the USB-PHY is displayed." "0: Not detected,1: detection" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "CHGDETE,Charging Down Stream Port detection Enable" "0: Charging Down Stream Port detection stop,1: Charging Down Stream Port detection permission" newline bitfld.long 0x0 4. "PDDETE,Portable Device Detection Enable" "0: Portable device detection stops,1: Portable Device detection permission" bitfld.long 0x0 3. "VDPSRCE,VDP_SRC IDP_SINK enable" "0: VDP_SRC IDP_SINK shutdown,1: VDP_SRC IDP_SINK output" newline bitfld.long 0x0 2. "VDMSRCE,VDM_SRC IDM_SINK enable" "0: VDM_SRC IDM_SINK blocking,1: VDM_SRC IDM_SINK output" bitfld.long 0x0 1. "IDPSRCE,IDP_SRC enabled" "0: IDP blocking,1: IDP output" newline bitfld.long 0x0 0. "RPDME,UDM pulldown control.Control the pull-down resistance of the UDM terminal." "0: Pull down OFF,1: Pull down ON" line.long 0x4 "BCCTRL2,Battery Charging signal control register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 12.--13. "PHYDET,Detection sensitivity variable bit.USB-PHY Portable Device Detection Charging D-Port Detection Sensitivity Adjust.Initial value: 10" "0,1,2,3" hexmask.long.byte 0x4 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 7. "BATCHGE,Battery Charging operation enabled" "0: Battery Charging operation prohibited,1: Battery Charging operation enabled" bitfld.long 0x4 6. "DCPMODE,DCP operation enableSet it to 0 when using the Peripheral Controller function." "0: DCP operation stops,1: DCP operation enabled" newline hexmask.long.byte 0x4 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat 6. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0xD0)++0x1 line.word 0x0 "DEVADD$1,Device Address %s Configuration Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDn is not used,1: Low speed,?,?" newline hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end group.long 0xF8++0x3 line.long 0x0 "VRCGCTRL,VRCORE clock gating set register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "VRCG_MSKCNT,VRCORE clock gating mask count" newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "VRCGEN,VRCORE clock gating enable" "0: diable,1: enable" group.long 0x400++0xB line.long 0x0 "DPUSR0R,Deep Software Standby USB Transceiver Control/Pin Monitor Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." rbitfld.long 0x0 23. "DVBSTS0,USB VBUS InputIndicates the VBUS input signal of the USB." "0,1" newline rbitfld.long 0x0 22. "DPDDET0,USB 0 PRTBLDET input" "0,1" rbitfld.long 0x0 21. "DOVCB0,USB OVRCURB InputIndicates the OVRCURB input signal of the USB." "0,1" newline rbitfld.long 0x0 20. "DOVCA0,USB OVRCURA InputIndicates the OVRCURA input signal of the USB." "0,1" bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 17. "DM0,USB D-InputIndicates the D- input signal of the USB." "0,1" rbitfld.long 0x0 16. "DP0,USB0 D+ InputIndicates the D+ input signal of the USB." "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 4. "FIXPHY0,USB Transceiver Output Fix" "0: The outputs are fixed in normal mode and on..,1: The outputs are fixed on transitions to deep.." newline bitfld.long 0x0 3. "DRPD0,D+/D- Pull-Down Resistor Control" "0: Disables DP/DM pull-down resistor.,1: Enables DP/DM pull-down resistor." bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "RPUE0,DP Pull-Up Resistor Control" "0: Disables DP pull-up resistor.,1: Enables DP pull-up resistor." bitfld.long 0x0 0. "SRPC0,USB Single End Receiver Control" "0: Input through the DP and DM inputs is disabled.,1: Input through the DP and DM inputs is enabled." line.long 0x4 "DPUSR1R,Deep Software Standby USB Suspend/Resume Interrupt Register" hexmask.long.byte 0x4 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." rbitfld.long 0x4 23. "DVBINT0,USB VBUS Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." newline rbitfld.long 0x4 22. "DPDDETINT0,USB PDDET Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." rbitfld.long 0x4 21. "DOVRCRB0,USB OVRCURB Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." newline rbitfld.long 0x4 20. "DOVRCRA0,USB OVRCURA Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." bitfld.long 0x4 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x4 17. "DMINT0,USB DM Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." rbitfld.long 0x4 16. "DPINT0,USB DP Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." newline hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x4 7. "DVBSE0,USB VBUS Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." newline bitfld.long 0x4 6. "DPDDETE0,USB PDDET Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x4 5. "DOVRCRBE0,USB OVRCURB Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." newline bitfld.long 0x4 4. "DOVRCRAE0,USB OVRCURA Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 1. "DMINTE0,USB DM Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x4 0. "DPINTE0,USB DP Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." line.long 0x8 "DPBCCTRL,Deep standby USB Battery Charging function register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x8 12.--13. "DPPHYDET,Detection sensitivity variable bit.USB-PHY Portable Device Detection Charging D-Port Detection Sensitivity Adjust.Initial value: 10" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x8 7. "DPBATCHGE,USBattery Charging operation enabled" "0: Battery Charging operation prohibited,1: Battery Charging operation enabled" bitfld.long 0x8 6. "DPDCPMODE,DCP operation enable.Set it to 0 when using the Peripheral Controller function." "0: DCP operation stops,1: DCP operation enabled" newline bitfld.long 0x8 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 4. "DPPDDETE,Portable Device Detection Enable" "0: Portable device detection stops,1: Portable Device detection permission" newline hexmask.long.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." tree.end tree "USBFS_NS" base ad:0x50250000 group.word 0x0++0x1 line.word 0x0 "SYSCFG,System Configuration Control Register" hexmask.word.byte 0x0 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0x0 10. "SCKE,USB Clock Enable" "0: Stops supplying the clock signal to the USB.,1: Enables supplying the clock signal to the USB." newline bitfld.word 0x0 7.--9. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 6. "DCFM,Controller Function Select" "0: Function controller is selected.,1: Host controller is selected." newline bitfld.word 0x0 5. "DRPD,D+/D- Line Resistor Control" "0: Pulling down the lines is disabled.,1: Pulling down the lines is enabled." bitfld.word 0x0 4. "DPRPU,D+ Line Resistor Control" "0: Pulling up the line is disabled.,1: Pulling up the line is enabled." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "USBE,USB Operation Enable" "0: USB operation is disabled.,1: USB operation is enabled." rgroup.word 0x4++0x1 line.word 0x0 "SYSSTS0,System Configuration Status Register 0" bitfld.word 0x0 14.--15. "OVCMON,External USB0_OVRCURA/ USB0_OVRCURB Input Pin MonitorThe OCVMON[1] bit indicates the status of the USBHS_OVRCURA pin. The OCVMON[0] bit indicates the status of the USBHS_OVRCURB pin." "0,1,2,3" hexmask.word.byte 0x0 7.--13. 1. "Reserved,These bits are read as 0000000." newline bitfld.word 0x0 6. "HTACT,USB Host Sequencer Status Monitor" "0: Host sequencer of the USB is completely stopped.,1: Host sequencer of the USB is not completely.." bitfld.word 0x0 5. "SOFEA,Active Monitor When the Host Controller is Selected." "0: SOF output is stopped.,1: SOF output is operating." newline bitfld.word 0x0 3.--4. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 2. "IDMON,External ID0 Input Pin Monitor" "0: USB0_ID pin is low,1: USB0_ID pin is high" newline bitfld.word 0x0 0.--1. "LNST,USB Data Line Status Monitor" "0: SE0,1: J-State,?,?" group.word 0x8++0x1 line.word 0x0 "DVSTCTR0,Device State Control Register 0" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 11. "HNPBTOA,Host Negotiation Protocol (HNP) Control This bit is used when switching from device B to device A while in OTG mode. If the HNPBTOA bit is 1 the internal function control keeps the suspended state until the HNP processing ends even though.." "0: Normal Operation,1: Switching from device B to device A is enabled" newline bitfld.word 0x0 10. "EXICEN,USB0_EXICEN Output Pin Control" "0: External USB0_EXICEN pin outputs low,1: External USB0_EXICEN pin outputs high" bitfld.word 0x0 9. "VBUSEN,USB0_VBUSEN Output Pin Control" "0: External USB0_VBUSEN pin outputs low,1: External USB0_VBUSEN pin outputs high" newline bitfld.word 0x0 8. "WKUP,Wakeup Output" "0: Remote wakeup signal is not output.,1: Remote wakeup signal is output." bitfld.word 0x0 7. "RWUPE,Wakeup Detection Enable" "0: Downstream port wakeup is disabled.,1: Downstream port wakeup is enabled." newline bitfld.word 0x0 6. "USBRST,USB Bus Reset Output" "0: USB bus reset signal is not output.,1: USB bus reset signal is output." bitfld.word 0x0 5. "RESUME,Resume Output" "0: Resume signal is not output.,1: Resume signal is output." newline bitfld.word 0x0 4. "UACT,USB Bus Enable" "0: Downstream port is disabled (SOF transmission is..,1: Downstream port is enabled (SOF transmission is.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.word 0x0 0.--2. "RHST,USB Bus Reset Status" "0: USB bus reset in progress(When the host..,1: Low-speed connection(When the host controller is..,?,?,?,?,?,?" group.word 0x14++0x1 line.word 0x0 "CFIFO,CFIFO Port Register" hexmask.word 0x0 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.byte 0x14++0x1 line.byte 0x0 "CFIFOL,CFIFO Port Register L" line.byte 0x1 "CFIFOH,CFIFO Port Register H" group.word 0x18++0x1 line.word 0x0 "D0FIFO,D0FIFO Port Register" hexmask.word 0x0 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.byte 0x18++0x1 line.byte 0x0 "D0FIFOL,D0FIFO Port Register L" line.byte 0x1 "D0FIFOH,D0FIFO Port Register H" group.word 0x1C++0x1 line.word 0x0 "D1FIFO,D1FIFO Port Register" hexmask.word 0x0 0.--15. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.byte 0x1C++0x1 line.byte 0x0 "D1FIFOL,D1FIFO Port Register L" line.byte 0x1 "D1FIFOH,D1FIFO Port Register H" group.word 0x20++0x3 line.word 0x0 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time the.." rbitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound.,1: The buffer pointer is rewound." newline bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 10. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "BIGEND,CFIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "ISEL,CFIFO Port Access Direction When DCP is Selected" "0: Reading from the buffer memory is selected,1: Writing to the buffer memory is selected" newline bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,CFIFO Port Access Pipe Specification" line.word 0x2 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x2 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled.,1: FIFO port access is enabled." hexmask.word.byte 0x2 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word 0x2 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data." group.word 0x28++0xB line.word 0x0 "D0FIFOSEL,D0FIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time the.." rbitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound.,1: The buffer pointer is rewound." newline bitfld.word 0x0 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled.,1: Auto buffer clear mode is enabled." bitfld.word 0x0 12. "DREQE,DMA/DTC Transfer Request Enable" "0: DMA/DTC transfer request is disabled.,1: DMA/DTC transfer request is enabled." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x2 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x2 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled.,1: FIFO port access is enabled." hexmask.word.byte 0x2 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word 0x2 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data." line.word 0x4 "D1FIFOSEL,D1FIFO Port Select Register" bitfld.word 0x4 15. "RCNT,Read Count Mode" "0: The DTLN[8:0] bits (CFIFOCRT.DTLN[8:0]..,1: The DTLN[8:0] bits are decremented each time the.." rbitfld.word 0x4 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound.,1: The buffer pointer is rewound." newline bitfld.word 0x4 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled.,1: Auto buffer clear mode is enabled." bitfld.word 0x4 12. "DREQE,DMA/DTC Transfer Request Enable" "0: DMA/DTC transfer request is disabled.,1: DMA/DTC transfer request is enabled." newline bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 10. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width" newline bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x4 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline hexmask.word.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x4 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x6 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x6 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" rbitfld.word 0x6 14. "BCLR,CPU Buffer Clear" "0: Invalid,1: Clears the buffer memory on the CPU side" newline rbitfld.word 0x6 13. "FRDY,FIFO Port Ready" "0: FIFO port access is disabled.,1: FIFO port access is enabled." hexmask.word.byte 0x6 9.--12. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word 0x6 0.--8. 1. "DTLN,Receive Data LengthIndicates the length of the receive data." line.word 0x8 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x8 15. "VBSE,VBUS Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 14. "RSME,Resume Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 13. "SOFE,Frame Number Update Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 12. "DVSE,Device State Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline hexmask.word.byte 0x8 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.word 0xA "INTENB1,Interrupt Enable Register 1" bitfld.word 0xA 15. "OVRCRE,Overcurrent Input Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 14. "BCHGE,USB Bus Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xA 12. "DTCHE,Disconnection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 11. "ATTCHE,Connection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" hexmask.word.byte 0xA 7.--10. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.word 0xA 6. "EOFERRE,EOF Error Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 5. "SIGNE,Setup Transaction Error Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 4. "SACKE,Setup Transaction Normal Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0xA 0. "PDDETINTE,Port 0 Portable Device detection interrupt enabled.When PDDETINT interrupt is detected specify disable / enable USB interrupt output." "0: Interrupt output disabled,1: Enable interrupt output" group.word 0x36++0x7 line.word 0x0 "BRDYENB,BRDY Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "PIPE9BRDYE,BRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 8. "PIPE8BRDYE,BRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 7. "PIPE7BRDYE,BRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 6. "PIPE6BRDYE,BRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 5. "PIPE5BRDYE,BRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 4. "PIPE4BRDYE,BRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 3. "PIPE3BRDYE,BRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 2. "PIPE2BRDYE,BRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x0 1. "PIPE1BRDYE,BRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x0 0. "PIPE0BRDYE,BRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" line.word 0x2 "NRDYENB,NRDY Interrupt Enable Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x2 9. "PIPE9NRDYE,NRDY Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 8. "PIPE8NRDYE,NRDY Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 7. "PIPE7NRDYE,NRDY Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 6. "PIPE6NRDYE,NRDY Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 5. "PIPE5NRDYE,NRDY Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 4. "PIPE4NRDYE,NRDY Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 3. "PIPE3NRDYE,NRDY Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 2. "PIPE2NRDYE,NRDY Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x2 1. "PIPE1NRDYE,NRDY Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x2 0. "PIPE0NRDYE,NRDY Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" line.word 0x4 "BEMPENB,BEMP Interrupt Enable Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x4 9. "PIPE9BEMPE,BEMP Interrupt Enable for PIPE9" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 8. "PIPE8BEMPE,BEMP Interrupt Enable for PIPE8" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 7. "PIPE7BEMPE,BEMP Interrupt Enable for PIPE7" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 6. "PIPE6BEMPE,BEMP Interrupt Enable for PIPE6" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 5. "PIPE5BEMPE,BEMP Interrupt Enable for PIPE5" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 4. "PIPE4BEMPE,BEMP Interrupt Enable for PIPE4" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 3. "PIPE3BEMPE,BEMP Interrupt Enable for PIPE3" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 2. "PIPE2BEMPE,BEMP Interrupt Enable for PIPE2" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x4 1. "PIPE1BEMPE,BEMP Interrupt Enable for PIPE1" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x4 0. "PIPE0BEMPE,BEMP Interrupt Enable for PIPE0" "0: Interrupt output disabled,1: Interrupt output enabled" line.word 0x6 "SOFCFG,SOF Output Configuration Register" hexmask.word.byte 0x6 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x6 8. "TRNENSEL,Transaction-Enabled Time Select" "0: For non-low-speed communication,1: For low-speed communication" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "BRDYM,BRDY Interrupt Status Clear Timing" "0: Software clears the status.,1: The USB clears the status when data has been.." newline bitfld.word 0x6 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.word 0x6 4. "EDGESTS,Edge Interrupt Output Status Monitor" "0: before stopping the clock supply to the USB module,1: the edge interrupt output signal is in the.." newline hexmask.word.byte 0x6 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x40++0x3 line.word 0x0 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x0 15. "VBINT,VBUS Interrupt Status" "0: VBUS interrupts are not generated.,1: VBUS interrupts are generated." bitfld.word 0x0 14. "RESM,Resume Interrupt Status" "0: Resume interrupts are not generated.,1: Resume interrupts are generated." newline bitfld.word 0x0 13. "SOFR,Frame Number Refresh Interrupt Status" "0: SOF interrupts are not generated.,1: SOF interrupts are generated." bitfld.word 0x0 12. "DVST,Device State Transition Interrupt Status" "0: Device state transition interrupts are not..,1: Device state transition interrupts are generated." newline bitfld.word 0x0 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: Control transfer stage transition interrupts are..,1: Control transfer stage transition interrupts are.." rbitfld.word 0x0 10. "BEMP,Buffer Empty Interrupt Status" "0: BEMP interrupts are not generated.,1: BEMP interrupts are generated." newline rbitfld.word 0x0 9. "NRDY,Buffer Not Ready Interrupt Status" "0: NRDY interrupts are not generated.,1: NRDY interrupts are generated." rbitfld.word 0x0 8. "BRDY,Buffer Ready Interrupt Status" "0: BRDY interrupts are not generated.,1: BRDY interrupts are generated." newline rbitfld.word 0x0 7. "VBSTS,VBUS Input Status" "0: USB0_VBUS pin is low.,1: USB0_VBUS pin is high." rbitfld.word 0x0 4.--6. "DVSQ,Device State" "0: Suspended state,1: Default state,?,?,?,?,?,?" newline bitfld.word 0x0 3. "VALID,USB Request Reception" "0: Setup packet is not received,1: Setup packet is received" rbitfld.word 0x0 0.--2. "CTSQ,Control Transfer Stage" "0: Setting prohibited,1: Control read data stage,?,?,?,?,?,?" line.word 0x2 "INTSTS1,Interrupt Status Register 1" bitfld.word 0x2 15. "OVRCR,Overcurrent Input Change Interrupt Status" "0: OVRCR interrupts are not generated.,1: OVRCR interrupts are generated." bitfld.word 0x2 14. "BCHG,USB Bus Change Interrupt Status" "0: BCHG interrupts are not generated.,1: BCHG interrupts are generated." newline bitfld.word 0x2 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 12. "DTCH,USB Disconnection Detection Interrupt Status" "0: DTCH interrupts are not generated.,1: DTCH interrupts are generated." newline bitfld.word 0x2 11. "ATTCH,ATTCH Interrupt Status" "0: ATTCH interrupts are not generated.,1: ATTCH interrupts are generated." hexmask.word.byte 0x2 7.--10. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.word 0x2 6. "EOFERR,EOF Error Detection Interrupt Status" "0: EOFERR interrupts are not generated.,1: EOFERR interrupts are generated." bitfld.word 0x2 5. "SIGN,Setup Transaction Error Interrupt Status" "0: SIGN interrupts are not generated.,1: SIGN interrupts are generated." newline bitfld.word 0x2 4. "SACK,Setup Transaction Normal Response Interrupt Status" "0: SACK interrupts are not generated.,1: SACK interrupts are generated." bitfld.word 0x2 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x2 0. "PDDETINT,Port 0 Portable Device Detection Interrupt Status.When the host controller function is selected Portable Device detection interrupt status is displayed." "0: PDDETINT interrupt not occurred,1: PDDETINT interrupt generated" group.word 0x46++0xB line.word 0x0 "BRDYSTS,BRDY Interrupt Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "PIPE9BRDY,BRDY Interrupt Status for PIPE9" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 8. "PIPE8BRDY,BRDY Interrupt Status for PIPE8" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 7. "PIPE7BRDY,BRDY Interrupt Status for PIPE7" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 6. "PIPE6BRDY,BRDY Interrupt Status for PIPE6" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 5. "PIPE5BRDY,BRDY Interrupt Status for PIPE5" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 4. "PIPE4BRDY,BRDY Interrupt Status for PIPE4" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 3. "PIPE3BRDY,BRDY Interrupt Status for PIPE3" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 2. "PIPE2BRDY,BRDY Interrupt Status for PIPE2" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x0 1. "PIPE1BRDY,BRDY Interrupt Status for PIPE1" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x0 0. "PIPE0BRDY,BRDY Interrupt Status for PIPE0" "0: Interrupts are not generated.,1: Interrupts are generated." line.word 0x2 "NRDYSTS,NRDY Interrupt Status Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x2 9. "PIPE9NRDY,NRDY Interrupt Status for PIPE9" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 8. "PIPE8NRDY,NRDY Interrupt Status for PIPE8" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 7. "PIPE7NRDY,NRDY Interrupt Status for PIPE7" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 6. "PIPE6NRDY,NRDY Interrupt Status for PIPE6" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 5. "PIPE5NRDY,NRDY Interrupt Status for PIPE5" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 4. "PIPE4NRDY,NRDY Interrupt Status for PIPE4" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 3. "PIPE3NRDY,NRDY Interrupt Status for PIPE3" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 2. "PIPE2NRDY,NRDY Interrupt Status for PIPE2" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x2 1. "PIPE1NRDY,NRDY Interrupt Status for PIPE1" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x2 0. "PIPE0NRDY,NRDY Interrupt Status for PIPE0" "0: Interrupts are not generated.,1: Interrupts are generated." line.word 0x4 "BEMPSTS,BEMP Interrupt Status Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x4 9. "PIPE9BEMP,BEMP Interrupt Status for PIPE9" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 8. "PIPE8BEMP,BEMP Interrupt Status for PIPE8" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 7. "PIPE7BEMP,BEMP Interrupt Status for PIPE7" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 6. "PIPE6BEMP,BEMP Interrupt Status for PIPE6" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 5. "PIPE5BEMP,BEMP Interrupt Status for PIPE5" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 4. "PIPE4BEMP,BEMP Interrupt Status for PIPE4" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 3. "PIPE3BEMP,BEMP Interrupt Status for PIPE3" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 2. "PIPE2BEMP,BEMP Interrupt Status for PIPE2" "0: Interrupts are not generated.,1: Interrupts are generated." bitfld.word 0x4 1. "PIPE1BEMP,BEMP Interrupt Status for PIPE1" "0: Interrupts are not generated.,1: Interrupts are generated." newline bitfld.word 0x4 0. "PIPE0BEMP,BEMP Interrupt Status for PIPE0" "0: Interrupts are not generated.,1: Interrupts are generated." line.word 0x6 "FRMNUM,Frame Number Register" bitfld.word 0x6 15. "OVRN,Overrun/Underrun Detection Status" "0: No error,1: An error occurred" bitfld.word 0x6 14. "CRCE,Receive Data Error" "0: No error,1: An error occurred" newline bitfld.word 0x6 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x6 0.--10. 1. "FRNM,Frame NumberLatest frame number" line.word 0x8 "DVCHGR,Device State Change Register" bitfld.word 0x8 15. "DVCHG,Device State Change" "0: Disables the writing to the..,1: Enables the writing to the USBADDR.STSRECOV[3:0].." hexmask.word 0x8 0.--14. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." line.word 0xA "USBADDR,USB Address Register" hexmask.word.byte 0xA 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0xA 8.--11. 1. "STSRECOV,Status Recovery" newline bitfld.word 0xA 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0xA 0.--6. 1. "USBADDR,USB AddressWhen the function controller is selected these bits indicate the USB address assigned by the host when the SET_ADDRESS request is successfully processed." group.word 0x54++0xD line.word 0x0 "USBREQ,USB Request Type Register" hexmask.word.byte 0x0 8.--15. 1. "BREQUEST,RequestThese bits store the USB request bRequest value." hexmask.word.byte 0x0 0.--7. 1. "BMREQUESTTYPE,Request TypeThese bits store the USB request bmRequestType value." line.word 0x2 "USBVAL,USB Request Value Register" hexmask.word 0x2 0.--15. 1. "WVALUE,ValueThese bits store the USB request wValue value." line.word 0x4 "USBINDX,USB Request Index Register" hexmask.word 0x4 0.--15. 1. "WINDEX,IndexThese bits store the USB request wIndex value." line.word 0x6 "USBLENG,USB Request Length Register" hexmask.word 0x6 0.--15. 1. "WLENGTUH,LengthThese bits store the USB request wLength value." line.word 0x8 "DCPCFG,DCP Configuration Register" hexmask.word.byte 0x8 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x8 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe continued at the end of transfer,1: Pipe disabled at the end of transfer" newline bitfld.word 0x8 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x8 4. "DIR,Transfer Direction" "0: Data receiving direction,1: Data transmitting direction" newline hexmask.word.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.word 0xA "DCPMAXP,DCP Maximum Packet Size Register" hexmask.word.byte 0xA 12.--15. 1. "DEVSEL,Device Select" hexmask.word.byte 0xA 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline hexmask.word.byte 0xA 0.--6. 1. "MXPS,Maximum Packet SizeThese bits set the maximum amount of data (maximum packet size) in payloads for the DCP." line.word 0xC "DCPCTR,DCP Control Register" rbitfld.word 0xC 15. "BSTS,Buffer Status" "0: Buffer access is disabled.,1: Buffer access is enabled." bitfld.word 0xC 14. "SUREQ,Setup Token Transmission" "0: Invalid,1: Transmits the setup packet." newline bitfld.word 0xC 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0xC 11. "SUREQCLR,SUREQ Bit Clear" "0: Invalid,1: Clears the SUREQ bit to 0." newline bitfld.word 0xC 9.--10. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0xC 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0." newline bitfld.word 0xC 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1." rbitfld.word 0xC 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: DATA1" newline rbitfld.word 0xC 5. "PBUSY,Pipe Busy" "0: DCP is not used for the transaction.,1: DCP is used for the transaction." bitfld.word 0xC 3.--4. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0xC 2. "CCPL,Control Transfer End Enable" "0: Invalid,1: Completion of control transfer is enabled." bitfld.word 0xC 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),?,?" group.word 0x64++0x1 line.word 0x0 "PIPESEL,Pipe Window Select Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "PIPESEL,Pipe Window Select" group.word 0x68++0x1 line.word 0x0 "PIPECFG,Pipe Configuration Register" bitfld.word 0x0 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Bulk transfer(PIPE1 and PIPE5) /Setting..,?,?" bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 10. "BFRE,BRDY Interrupt Operation Specification" "0: BRDY interrupt upon transmitting or receiving data,1: BRDY interrupt upon completion of reading data" bitfld.word 0x0 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer" newline bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: Pipe assignment continued at the end of transfer,1: Pipe assignment disabled at the end of transfer" newline bitfld.word 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction" hexmask.word.byte 0x0 0.--3. 1. "EPNUM,Endpoint NumberThese bits specify the endpoint number for the selected pipe.Setting 0000b means unused pipe." group.word 0x6C++0x3 line.word 0x0 "PIPEMAXP,Pipe Maximum Packet Size Register" hexmask.word.byte 0x0 12.--15. 1. "DEVSEL,Device Select" bitfld.word 0x0 9.--11. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline hexmask.word 0x0 0.--8. 1. "MXPS,Maximum Packet SizePIPE1 and PIPE2: 1 byte (001h) to 256 bytes (100h)PIPE3 to PIPE5: 8 bytes (008h) 16 bytes (010h) 32 bytes (020h) 64 bytes (040h) (Bits [8:7] and [2:0] are not provided.)PIPE6 to PIPE9: 1 byte (001h) to 64 bytes (040h).." line.word 0x2 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x2 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x2 12. "IFIS,Isochronous IN Buffer Flush" "0: The buffer is not flushed.,1: The buffer is flushed." newline hexmask.word 0x2 3.--11. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." bitfld.word 0x2 0.--2. "IITV,Interval Error Detection IntervalSpecifies the interval error detection timing for the selected pipe in terms of frames which is expressed as nth power of 2." "0,1,2,3,4,5,6,7" repeat 5. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x70)++0x1 line.word 0x0 "PIPE$1CTR,Pipe %s Control Register" rbitfld.word 0x0 15. "BSTS,Buffer Status" "0: Buffer access by the CPU is disabled.,1: Buffer access by the CPU is enabled." rbitfld.word 0x0 14. "INBUFM,Transmit Buffer Monitor" "0: No data to be transmitted is in the FIFO buffer,1: Data to be transmitted is in the FIFO buffer" newline bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 10. "ATREPM,Auto Response Mode" "0: Auto response is disabled.,1: Auto response is enabled." newline bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear Mode" "0: Disabled,1: Enabled (all buffers are initialized)" bitfld.word 0x0 8. "SQCLR,Sequence Toggle Bit Clear" "0: Write disabled,1: Specifies DATA0." newline bitfld.word 0x0 7. "SQSET,Sequence Toggle Bit Set" "0: Write disabled,1: Specifies DATA1." rbitfld.word 0x0 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" newline rbitfld.word 0x0 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the transaction.,1: The relevant pipe is used for the transaction." bitfld.word 0x0 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),?,?" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x7A)++0x1 line.word 0x0 "PIPE$1CTR,Pipe %s Control Register" rbitfld.word 0x0 15. "BSTS,Buffer Status" "0: Buffer access is disabled.,1: Buffer access is enabled." hexmask.word.byte 0x0 10.--14. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear Mode" "0: Auto buffer clear mode is disabled.,1: Auto buffer clear mode is enabled (all buffers.." bitfld.word 0x0 8. "SQCLR,Sequence Toggle Bit Clear" "0: Invalid,1: Specifies DATA0." newline bitfld.word 0x0 7. "SQSET,Sequence Toggle Bit Set" "0: Invalid,1: Specifies DATA1." rbitfld.word 0x0 6. "SQMON,Sequence Toggle Bit Confirmation" "0: DATA0,1: DATA1" newline rbitfld.word 0x0 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used at the USB bus.,1: The relevant pipe is used at the USB bus." bitfld.word 0x0 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on the buffer state),?,?" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x90)++0x1 line.word 0x0 "PIPE$1TRE,Pipe %s Transaction Counter Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TRENB,Transaction Counter Enable" "0: Transaction counter is disabled.,1: Transaction counter is enabled." newline bitfld.word 0x0 8. "TRCLR,Transaction Counter Clear" "0: Invalid,1: The current counter value is cleared." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x92)++0x1 line.word 0x0 "PIPE$1TRN,Pipe %s Transaction Counter Register" hexmask.word 0x0 0.--15. 1. "TRNCNT,Transaction Counter" repeat.end group.long 0xB0++0x7 line.long 0x0 "BCCTRL1,Battery Charging signal control register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline rbitfld.long 0x0 9. "CHGDETST,Charging Down Stream Port detection flag(Valid when CHGDETE = 1)The CHGDET input status from the USB-PHY is displayed." "0: Not detected,1: detection" rbitfld.long 0x0 8. "PDDETSTS,Portable Device Detection Flag(Valid when UPDATE = 1)PRTBLDET input status from the USB-PHY is displayed." "0: Not detected,1: detection" newline bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 5. "CHGDETE,Charging Down Stream Port detection Enable" "0: Charging Down Stream Port detection stop,1: Charging Down Stream Port detection permission" newline bitfld.long 0x0 4. "PDDETE,Portable Device Detection Enable" "0: Portable device detection stops,1: Portable Device detection permission" bitfld.long 0x0 3. "VDPSRCE,VDP_SRC IDP_SINK enable" "0: VDP_SRC IDP_SINK shutdown,1: VDP_SRC IDP_SINK output" newline bitfld.long 0x0 2. "VDMSRCE,VDM_SRC IDM_SINK enable" "0: VDM_SRC IDM_SINK blocking,1: VDM_SRC IDM_SINK output" bitfld.long 0x0 1. "IDPSRCE,IDP_SRC enabled" "0: IDP blocking,1: IDP output" newline bitfld.long 0x0 0. "RPDME,UDM pulldown control.Control the pull-down resistance of the UDM terminal." "0: Pull down OFF,1: Pull down ON" line.long 0x4 "BCCTRL2,Battery Charging signal control register 2" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 12.--13. "PHYDET,Detection sensitivity variable bit.USB-PHY Portable Device Detection Charging D-Port Detection Sensitivity Adjust.Initial value: 10" "0,1,2,3" hexmask.long.byte 0x4 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x4 7. "BATCHGE,Battery Charging operation enabled" "0: Battery Charging operation prohibited,1: Battery Charging operation enabled" bitfld.long 0x4 6. "DCPMODE,DCP operation enableSet it to 0 when using the Peripheral Controller function." "0: DCP operation stops,1: DCP operation enabled" newline hexmask.long.byte 0x4 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat 6. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0xD0)++0x1 line.word 0x0 "DEVADD$1,Device Address %s Configuration Register" hexmask.word.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.word 0x0 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDn is not used,1: Low speed,?,?" newline hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end group.long 0xF8++0x3 line.long 0x0 "VRCGCTRL,VRCORE clock gating set register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.long.byte 0x0 16.--23. 1. "VRCG_MSKCNT,VRCORE clock gating mask count" newline hexmask.long.word 0x0 1.--15. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 0. "VRCGEN,VRCORE clock gating enable" "0: diable,1: enable" group.long 0x400++0xB line.long 0x0 "DPUSR0R,Deep Software Standby USB Transceiver Control/Pin Monitor Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." rbitfld.long 0x0 23. "DVBSTS0,USB VBUS InputIndicates the VBUS input signal of the USB." "0,1" newline rbitfld.long 0x0 22. "DPDDET0,USB 0 PRTBLDET input" "0,1" rbitfld.long 0x0 21. "DOVCB0,USB OVRCURB InputIndicates the OVRCURB input signal of the USB." "0,1" newline rbitfld.long 0x0 20. "DOVCA0,USB OVRCURA InputIndicates the OVRCURA input signal of the USB." "0,1" bitfld.long 0x0 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x0 17. "DM0,USB D-InputIndicates the D- input signal of the USB." "0,1" rbitfld.long 0x0 16. "DP0,USB0 D+ InputIndicates the D+ input signal of the USB." "0,1" newline hexmask.long.word 0x0 5.--15. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." bitfld.long 0x0 4. "FIXPHY0,USB Transceiver Output Fix" "0: The outputs are fixed in normal mode and on..,1: The outputs are fixed on transitions to deep.." newline bitfld.long 0x0 3. "DRPD0,D+/D- Pull-Down Resistor Control" "0: Disables DP/DM pull-down resistor.,1: Enables DP/DM pull-down resistor." bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "RPUE0,DP Pull-Up Resistor Control" "0: Disables DP pull-up resistor.,1: Enables DP pull-up resistor." bitfld.long 0x0 0. "SRPC0,USB Single End Receiver Control" "0: Input through the DP and DM inputs is disabled.,1: Input through the DP and DM inputs is enabled." line.long 0x4 "DPUSR1R,Deep Software Standby USB Suspend/Resume Interrupt Register" hexmask.long.byte 0x4 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." rbitfld.long 0x4 23. "DVBINT0,USB VBUS Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." newline rbitfld.long 0x4 22. "DPDDETINT0,USB PDDET Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." rbitfld.long 0x4 21. "DOVRCRB0,USB OVRCURB Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." newline rbitfld.long 0x4 20. "DOVRCRA0,USB OVRCURA Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." bitfld.long 0x4 18.--19. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.long 0x4 17. "DMINT0,USB DM Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." rbitfld.long 0x4 16. "DPINT0,USB DP Interrupt Source Recovery" "0: The system has not returned from deep software..,1: The system has returned from deep software.." newline hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x4 7. "DVBSE0,USB VBUS Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." newline bitfld.long 0x4 6. "DPDDETE0,USB PDDET Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x4 5. "DOVRCRBE0,USB OVRCURB Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." newline bitfld.long 0x4 4. "DOVRCRAE0,USB OVRCURA Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 1. "DMINTE0,USB DM Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." bitfld.long 0x4 0. "DPINTE0,USB DP Interrupt Enable/Clear" "0: Recovery from deep software standby mode is..,1: Recovery from deep software standby mode is.." line.long 0x8 "DPBCCTRL,Deep standby USB Battery Charging function register" hexmask.long.word 0x8 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x8 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x8 12.--13. "DPPHYDET,Detection sensitivity variable bit.USB-PHY Portable Device Detection Charging D-Port Detection Sensitivity Adjust.Initial value: 10" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline bitfld.long 0x8 7. "DPBATCHGE,USBattery Charging operation enabled" "0: Battery Charging operation prohibited,1: Battery Charging operation enabled" bitfld.long 0x8 6. "DPDCPMODE,DCP operation enable.Set it to 0 when using the Peripheral Controller function." "0: DCP operation stops,1: DCP operation enabled" newline bitfld.long 0x8 5. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x8 4. "DPPDDETE,Portable Device Detection Enable" "0: Portable device detection stops,1: Portable Device detection permission" newline hexmask.long.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." tree.end tree.end tree "USBHS (USB 2.0 High-Speed Module)" base ad:0x0 tree "USBHS" base ad:0x40351000 group.word 0x0++0x3 line.word 0x0 "SYSCFG,System Configuration Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "CNEN,Single End Receiver Enable" "0: Single end receiver operation is disabled.,1: Single end receiver operation is enabled." newline bitfld.word 0x0 7. "HSE,High-Speed Operation Enable" "0: High-speed operation is disabled.(When the..,1: High-speed operation is enabled (the controller.." bitfld.word 0x0 6. "DCFM,Controller Function Select" "0: Function controller function is selected.,1: Host controller function is selected." newline bitfld.word 0x0 5. "DRPD,D+/D- Line Resistor Control" "0: Pulling down the line is disabled.,1: Pulling down the line is enabled." bitfld.word 0x0 4. "DPRPU,D+ Line Resistor Control" "0: Pulling up the line is disabled.,1: Pulling up the line is enabled." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "USBE,USB Operation Enable" "0: USB operation is disabled.,1: USB operation is enabled." line.word 0x2 "BUSWAIT,CPU Bus Wait Register" hexmask.word 0x2 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x2 0.--3. 1. "BWAIT,CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles)" rgroup.word 0x4++0x3 line.word 0x0 "SYSSTS0,System Configuration Status Register" bitfld.word 0x0 14.--15. "OCVMON,External USB1_OVRCURA/USB1_OVRCURB Input Pin MonitorThe OCVMON[1] bit indicates the status of the USBHS_OVRCURA pin. The OCVMON[0] bit indicates the status of the USBHS_OVRCURB pin." "0,1,2,3" hexmask.word.byte 0x0 7.--13. 1. "Reserved,These bits are read as 0000000." newline bitfld.word 0x0 6. "HTACT,Host Sequencer Status Monitor" "0: Host sequencer is stopped.,1: Host sequencer is operating." bitfld.word 0x0 5. "SOFEA,SOF Active Monitor While Host Controller Function is Selected." "0: SOF output is stopped.,1: SOF output is operating." newline bitfld.word 0x0 3.--4. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 2. "IDMON,ID0 Pin Monitor" "0: ID0 = Low,1: ID0 = High" newline bitfld.word 0x0 0.--1. "LNST,USB Data Line Status Monitor" "0: SE0 (During Low-Speed Operation:only when the..,1: K-State (During Low-Speed Operation:only when..,?,?" line.word 0x2 "PLLSTA,PLL Status Register" hexmask.word 0x2 1.--15. 1. "Reserved,These bits are read as 000000000000000." bitfld.word 0x2 0. "PLLLOCK,PLL Lock Flag" "0: PLL is not locked.,1: PLL is locked." group.word 0x8++0x1 line.word 0x0 "DVSTCTR0,Device State Control Register 0" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 11. "HNPBTOA,Host Negotiation Protocol (HNP) Control This bit is used when switching from device B to device A while in OTG mode. If the HNPBTOA bit is 1 the internal function control keeps the suspended state until the HNP processing ends even though.." "0: Normal Operation,1: Switching from device B to device A is enabled" newline bitfld.word 0x0 10. "EXICEN,USB0_EXICEN Output Pin ControlThe EXICEN bit value is output as the status of the external USB0_EXICEN pin without change." "0,1" bitfld.word 0x0 9. "VBUSEN,USB0_VBUSEN Output Pin ControlThe VBUSEN bit value is output as the status of the external USB0_VBUSEN pin without change." "0,1" newline bitfld.word 0x0 8. "WKUP,Wakeup Output" "0: Remote wakeup signal is not output.,1: Remote wakeup signal is output." bitfld.word 0x0 7. "RWUPE,Remote Wakeup Detection Enable" "0: Downstream-port remote wakeup is disabled.,1: Downstream-port remote wakeup is enabled." newline bitfld.word 0x0 6. "USBRST,USB Bus Reset Output" "0: USB bus reset signal is not output.,1: USB bus reset signal is output." bitfld.word 0x0 5. "RESUME,Resume Output" "0: Resume signal is not output.,1: Resume signal is output." newline bitfld.word 0x0 4. "UACT,USB Bus Enable" "0: Downstream port is disabled (SOF or micro-SOF..,1: Downstream port is enabled (SOF or micro-SOF.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.word 0x0 0.--2. "RHST,USB Bus Reset Status" "0: USB bus reset in progress(When the host..,1: Low-speed connection(When the host controller..,?,?,?,?,?,?" group.word 0xC++0x1 line.word 0x0 "TESTMODE,USB Test Mode Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "UTST,Test Mode" group.long 0x14++0x3 line.long 0x0 "CFIFO,CFIFO Port Register" hexmask.long 0x0 0.--31. 1. "FIFOPORT,FIFO Port.Read receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.word 0x14++0x1 line.word 0x0 "CFIFOL,CFIFO Port Register L" group.byte 0x14++0x0 line.byte 0x0 "CFIFOLL,CFIFO Port Register LL" group.word 0x16++0x1 line.word 0x0 "CFIFOH,CFIFO Port Register H" group.byte 0x17++0x0 line.byte 0x0 "CFIFOHH,CFIFO Port Register HH" group.long 0x18++0x3 line.long 0x0 "D0FIFO,D0FIFO Port Register" hexmask.long 0x0 0.--31. 1. "FIFOPORT,FIFO Port Read receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.word 0x18++0x1 line.word 0x0 "D0FIFOL,D0FIFO Port Register L" group.byte 0x18++0x0 line.byte 0x0 "D0FIFOLL,D0FIFO Port Register LL" group.word 0x1A++0x1 line.word 0x0 "D0FIFOH,D0FIFO Port Register H" group.byte 0x1B++0x0 line.byte 0x0 "D0FIFOHH,D0FIFO Port Register HH" group.long 0x1C++0x3 line.long 0x0 "D1FIFO,D1FIFO Port Register" hexmask.long 0x0 0.--31. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.word 0x1C++0x1 line.word 0x0 "D1FIFOL,D1FIFO Port Register L" group.byte 0x1C++0x0 line.byte 0x0 "D1FIFOLL,D1FIFO Port Register LL" group.word 0x1E++0x1 line.word 0x0 "D1FIFOH,D1FIFO Port Register H" group.byte 0x1F++0x0 line.byte 0x0 "D1FIFOHH,D1FIFO Port Register HH" group.word 0x20++0x3 line.word 0x0 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: Do not rewind buffer pointer (Writing 0 has no..,1: Rewind buffer pointer." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,?,?" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "ISEL,FIFO Port Access Direction when DCP is Selected" "0: Reading from the buffer memory is selected,1: Writing to the buffer memory is selected" newline bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x2 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side." newline rbitfld.word 0x2 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed." "0: FIFO port access is disabled,1: FIFO port access is enabled" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x2 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data." group.word 0x28++0xB line.word 0x0 "D0FIFOSEL,D0FIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x0 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x0 12. "DREQE,UCL_Dx_DREQ Signal Output Enable" "0: Disables the output,1: Enables the output" newline bitfld.word 0x0 10.--11. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,?,?" bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x2 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side." newline rbitfld.word 0x2 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed." "0: FIFO port access is disabled,1: FIFO port access is enabled" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x2 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data." line.word 0x4 "D1FIFOSEL,D1FIFO Port Select Register" bitfld.word 0x4 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x4 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x4 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x4 12. "DREQE,UCL_Dx_DREQ Signal Output Enable" "0: Disables the output,1: Enables the output" newline bitfld.word 0x4 10.--11. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,?,?" bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" hexmask.word.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word.byte 0x4 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x6 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x6 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x6 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side." newline rbitfld.word 0x6 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed." "0: FIFO port access is disabled,1: FIFO port access is enabled" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x6 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data." line.word 0x8 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x8 15. "VBSE,VBUS Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 14. "RSME,Resume Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 13. "SOFE,Frame Number Update Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 12. "DVSE,Device State Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline hexmask.word.byte 0x8 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.word 0xA "INTENB1,Interrupt Enable Register 1" bitfld.word 0xA 15. "OVRCRE,OVRCRE Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 14. "BCHGE,USB Bus Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xA 12. "DTCHE,Disconnection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 11. "ATTCHE,Connection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xA 9. "L1RSMENDE,L1 Resume End Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 8. "LPMENDE,LPM Transaction End Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xA 6. "EOFERRE,EOF Error Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 5. "SIGNE,Setup Transaction Error Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 4. "SACKE,Setup Transaction Normal Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0xA 0. "PDDETINTE,PDDETINT Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x36++0xD line.word 0x0 "BRDYENB,BRDY Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x0 0.--9. 1. "PIPEBRDYE,BRDY Interrupt Enable for Each Pipe" line.word 0x2 "NRDYENB,NRDY Interrupt Enable Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x2 0.--9. 1. "PIPENRDYE,NRDY Interrupt Enable for Each Pipe" line.word 0x4 "BEMPENB,BEMP Interrupt Enable Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x4 0.--9. 1. "PIPEBEMPE,BEMP Interrupt Enable for Each Pipe" line.word 0x6 "SOFCFG,SOF Pin Configuration Register" hexmask.word.byte 0x6 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x6 8. "TRNENSEL,Transaction-Enabled Time Select.The transfer efficiency can be improved by setting this bit to 1 if no low-speed device is connected directly or via FS-HUB to the USB port." "0: For non-low-speed communication,1: For low-speed communication" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "BRDYM,PIPEBRDY Interrupt Status Clear Timing.This bit can be set only in the initial setting (before communications).The setting cannot be changed once communication starts." "0: Software clears the status.,1: Hardware clears the status when data has been.." newline bitfld.word 0x6 5. "INTL,Interrupt Output Sense Select" "0: Edge sense,1: Level sense" rbitfld.word 0x6 4. "EDGESTS,Interrupt Edge Processing Status Monitor" "0: Interrupt edge processing is not run,1: Interrupt edge processing is running" newline hexmask.word.byte 0x6 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.word 0x8 "PHYSET,PHY Setting Register" bitfld.word 0x8 15. "HSEB,CL-Only Mode" "0: CL-only mode is not activated.,1: CL-only mode is activated." bitfld.word 0x8 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 11. "REPSTART,Forcibly Start Terminating Resistance Adjustment" "0: Terminating resistance adjustment is forcibly..,1: Terminating resistance adjustment is not.." bitfld.word 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 8.--9. "REPSEL,Terminating Resistance Adjustment Cycle" "0: No cycle is set.,1: Adjust terminating resistance at 16-second..,?,?" bitfld.word 0x8 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x8 4.--5. "CLKSEL,Input System Clock Frequency" "0: Setting Prohibited,1: 12 MHz,?,?" bitfld.word 0x8 3. "CDPEN,Charging Downstream Port Enable" "0: Disable charging downstream port,1: Enable charging downstream port" newline bitfld.word 0x8 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 1. "PLLRESET,PLL Reset Control" "0: Disable PLL reset control for UTMI_PHY,1: Enable PLL reset control for UTMI_PHY" newline bitfld.word 0x8 0. "DIRPD,Power-Down Control" "0: Does not enter low-power consumption mode,1: Enter low-power consumption mode" line.word 0xA "INTSTS0,Interrupt Status Register 0" bitfld.word 0xA 15. "VBINT,VBUS Interrupt Status" "0: VBUS interrupt is not generated on detecting a..,1: VBUS interrupt is generated on detecting a.." bitfld.word 0xA 14. "RESM,Resume Interrupt Status" "0: Resume interrupts are not generated,1: Resume interrupts are generated" newline bitfld.word 0xA 13. "SOFR,Frame Number Refresh Interrupt Status" "0: SOF interrupts are not generated,1: SOF interrupts are generated" bitfld.word 0xA 12. "DVST,Device State Transition Interrupt Status" "0: Device state transition interrupts are not..,1: Device state transition interrupts are generated" newline bitfld.word 0xA 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: Control transfer stage transition interrupts are..,1: Control transfer stage transition interrupts are.." rbitfld.word 0xA 10. "BEMP,Buffer Empty Interrupt Status" "0: BEMP interrupts are not generated,1: BEMP interrupts are not generated" newline rbitfld.word 0xA 9. "NRDY,Buffer Not Ready Interrupt Status" "0: NRDY interrupts are not generated,1: NRDY interrupts are generated" rbitfld.word 0xA 8. "BRDY,Buffer Ready Interrupt Status" "0: BRDY interrupts are not generated,1: BRDY interrupts are generated" newline rbitfld.word 0xA 7. "VBSTS,VBUS Input Status" "0: The USBHS_VBUS pin is low,1: The USBHS_VBUS pin is high" rbitfld.word 0xA 4.--6. "DVSQ,Device State" "0: Suspended state(1xx),1: Default state,?,?,?,?,?,?" newline bitfld.word 0xA 3. "VALID,USB Request Reception" "0: Not detected,1: Setup packet reception" rbitfld.word 0xA 0.--2. "CTSQ,Control Transfer Stage" "0: Idle or setup stage,1: Control read data stage,?,?,?,?,?,?" line.word 0xC "INTSTS1,Interrupt Status Register 1" bitfld.word 0xC 15. "OVRCR,Overcurrent Interrupt Status" "0: OVRCR interrupts are not generated,1: OVRCR interrupts are generated" bitfld.word 0xC 14. "BCHG,USB Bus Change Interrupt Status" "0: BCHG interrupts are not generated,1: BCHG interrupts are generated" newline bitfld.word 0xC 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 12. "DTCH,USB Disconnection Detection Interrupt Status" "0: DTCH interrupts are not generated,1: DTCH interrupts are generated" newline bitfld.word 0xC 11. "ATTCH,USB Connection Detection Interrupt Status" "0: ATTCH interrupts are not generated,1: ATTCH interrupts are generated" bitfld.word 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 9. "L1RSMEND,L1 Resume End Interrupt Status" "0: L1RSMEND interrupts are not generated,1: L1RSMEND interrupts are generated" bitfld.word 0xC 8. "LPMEND,LPM Transaction End Interrupt Status" "0: LPMEND interrupts are not generated,1: LPMEND interrupts are generated" newline bitfld.word 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 6. "EOFERR,EOF Error Detection Interrupt Status" "0: EOFERR interrupts are not generated,1: EOFERR interrupts are generated" newline bitfld.word 0xC 5. "SIGN,Setup Transaction Error Interrupt Status" "0: SIGN interrupts are not generated,1: SIGN interrupts are generated" bitfld.word 0xC 4. "SACK,Setup Transaction Normal Response Interrupt Status" "0: SACK interrupts are not generated,1: SACK interrupts are generated" newline bitfld.word 0xC 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0xC 0. "PDDETINT,PDDET Detection Interrupt Status" "0: PDDET interrupts are not generated,1: PDDET interrupts are generated" group.word 0x46++0xB line.word 0x0 "BRDYSTS,BRDY Interrupt Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x0 0.--9. 1. "PIPEBRDY,BRDY Interrupt Status for Each Pipe" line.word 0x2 "NRDYSTS,NRDY Interrupt Status Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x2 0.--9. 1. "PIPENRDY,NRDY Interrupt Status for Each Pipe" line.word 0x4 "BEMPSTS,BEMP Interrupt Status Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x4 0.--9. 1. "PIPEBEMP,BEMP Interrupt Status for Each Pipe" line.word 0x6 "FRMNUM,Frame Number Register" bitfld.word 0x6 15. "OVRN,Overrun/Underrun Detection Status" "0: No error,1: An error occurred" bitfld.word 0x6 14. "CRCE,CRC Error Detection Status" "0: No error,1: An error occurred" newline bitfld.word 0x6 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x6 0.--10. 1. "FRNM,Frame Number.Indicate the latest frame number." line.word 0x8 "UFRMNUM,uFrame Number Register" bitfld.word 0x8 15. "DVCHG,Device State Change" "0: Disables the writing to the..,1: Enables the writing to the.." hexmask.word 0x8 3.--14. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline rbitfld.word 0x8 0.--2. "UFRNM,MicroframeIndicate the microframe number." "0,1,2,3,4,5,6,7" line.word 0xA "USBADDR,USB Address Register" hexmask.word.byte 0xA 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0xA 8.--10. "STSRECOV0,Status Recovery" "0: Setting prohibited.,1: Return to the full-speed state(bits..,?,?,?,?,?,?" newline bitfld.word 0xA 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0xA 0.--6. 1. "USBADDR,USB AddressWhen the function controller function is selected these bits indicate the USB address assigned by the host." group.word 0x54++0xD line.word 0x0 "USBREQ,USB Request Type Register" hexmask.word.byte 0x0 8.--15. 1. "BREQUEST,USB request bRequest value Finction controller selected : read-only Host controller selected : read-write" hexmask.word.byte 0x0 0.--7. 1. "BMREQUESTTYPE,USB request bmRequestType value Finction controller selected : read-only Host controller selected : read-write" line.word 0x2 "USBVAL,USB Request Value Register" hexmask.word 0x2 0.--15. 1. "WVALUE,Value of USB request wValue Finction controller selected : read-only Host controller selected : read-write" line.word 0x4 "USBINDX,USB Request Index Register" hexmask.word 0x4 0.--15. 1. "WINDEX,Value of USB request wIndex Finction controller selected : read-only Host controller selected : read-write" line.word 0x6 "USBLENG,USB Request Length Register" hexmask.word 0x6 0.--15. 1. "WLENGTH,Value of USB request wLength Finction controller selected : read-only Host controller selected : read-write" line.word 0x8 "DCPCFG,DCP Configuration Register" hexmask.word.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x8 8. "CNTMD,Continuous Transfer Mode" "0: Non-continuous transfer mode,1: Continuous transfer mode" newline bitfld.word 0x8 7. "SHTNAK,Pipe Blocking on End of Transfer" "0: The pipe remains open after transfer ends.,1: The pipe is blocked after transfer ends." bitfld.word 0x8 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x8 4. "DIR,Transfer Direction" "0: Data receiving direction,1: Data transmitting direction" hexmask.word.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.word 0xA "DCPMAXP,DCP Maximum Packet Size Register" hexmask.word.byte 0xA 12.--15. 1. "DEVSEL,Device SelectThese bits specify the address of the destination function device for control transfer when the host controller function is selected." hexmask.word.byte 0xA 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline hexmask.word.byte 0xA 0.--6. 1. "MXPS,Maximum Packet SizeThese bits specify the maximum data payload (maximum packet size) for the DCP." line.word 0xC "DCPCTR,DCP Control Register" rbitfld.word 0xC 15. "BSTS,Buffer Status" "0: Buffer access is disabled.,1: Buffer access is enabled." bitfld.word 0xC 14. "SUREQ,SETUP Token Transmission" "0: Writing is ignored.,1: Transmits the setup packet." newline bitfld.word 0xC 13. "CSCLR,Split Transaction CSPLIT Status Clear" "0: Writing is ignored.,1: Clears the CSSTS bit to 0." rbitfld.word 0xC 12. "CSSTS,Split Transaction COMPLETE SPLIT(CSPLIT) Status" "0: START-SPLIT(SSPLIT) transaction processing is in..,1: The CSPLIT transaction processing is in progress." newline bitfld.word 0xC 11. "SUREQCLR,SUREQ Bit Clear" "0: Writing is ignored.,1: Clears the SUREQ bit to 0." bitfld.word 0xC 9.--10. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0xC 8. "SQCLR,Toggle Bit Clear" "0: Writing is ignored.,1: Specifies DATA0." bitfld.word 0xC 7. "SQSET,Toggle Bit Set" "0: Writing is ignored.,1: Specifies DATA1." newline rbitfld.word 0xC 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: DATA1" rbitfld.word 0xC 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the USB bus.,1: The relevant pipe is in use for the USB bus." newline bitfld.word 0xC 4. "PINGE,PING Token Issue Enable" "0: Issuing PING token is disabled.,1: Normal PING operation" bitfld.word 0xC 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 2. "CCPL,Control Transfer End Enable" "0: Completion of control transfer is disabled.,1: Completion of control transfer is enabled." bitfld.word 0xC 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on buffer state),?,?" group.word 0x64++0x1 line.word 0x0 "PIPESEL,Pipe Window Select Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "PIPESEL,Pipe Window SelectThese bits specify the pipe for registers at addresses 68H to 6EH." group.word 0x68++0x7 line.word 0x0 "PIPECFG,Pipe Configuration Register" bitfld.word 0x0 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Bulk transfer,?,?" bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 10. "BFRE,BRDY Interrupt Operation Specification" "0: BRDY interrupt upon transmitting or receiving data,1: BRDY interrupt upon completion of reading data" bitfld.word 0x0 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer" newline bitfld.word 0x0 8. "CNTMD,Continuous Transfer Mode" "0: Discontinuous transfer mode,1: Continuous transfer mode" bitfld.word 0x0 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: The pipe is continued at the end of transfer.,1: The pipe is disabled at the end of transfer." newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction" newline hexmask.word.byte 0x0 0.--3. 1. "EPNUM,Endpoint Number" line.word 0x2 "PIPEBUF,Pipe Buffer Register" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x2 10.--14. 1. "BUFSIZE,Buffer Size 00h: 64 bytes 01h: 128 bytes : 1Fh: 2 Kbytes" newline bitfld.word 0x2 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 0.--7. 1. "BUFNMB,Buffer NumberThese bits specify the FIFO buffer number of the selected pipe (04h to 87h)." line.word 0x4 "PIPEMAXP,Pipe Maximum Packet Size Register" hexmask.word.byte 0x4 12.--15. 1. "DEVSEL,Device SelectThese bits specify the address of the peripheral device when the host controller function is selected." bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x4 0.--10. 1. "MXPS,Maximum Packet SizeThese bits specify the maximum data payload (maximum packet size) for the selected pipe.A size of 1h to 40h bytes can be set for PIPE6 to PIPE9." line.word 0x6 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x6 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x6 12. "IFIS,Isochronous IN Buffer Flush" "0: The buffer is not flushed.,1: The buffer is flushed." newline hexmask.word 0x6 3.--11. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." bitfld.word 0x6 0.--2. "IITV,Interval Error Detection IntervalThese bits specify the transfer interval timing for the selected pipe as n-th power of 2 of the frame timing." "0,1,2,3,4,5,6,7" repeat 9. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x70)++0x1 line.word 0x0 "PIPE$1CTR,PIPE Control Register" rbitfld.word 0x0 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe." "0: Buffer access is disabled.,1: Buffer access is enabled." rbitfld.word 0x0 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction." "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO buffer." newline bitfld.word 0x0 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled.,1: The CSSTS bit is cleared." rbitfld.word 0x0 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress or..,1: CSplit Transaction processing is in progress." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe." "0: Auto response mode is disabled.,1: Auto response mode is enabled (Transmission:.." newline bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" bitfld.word 0x0 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored.,1: Specifies DATA0." newline bitfld.word 0x0 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored.,1: Specifies DATA1." rbitfld.word 0x0 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" newline rbitfld.word 0x0 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus.,1: The relevant pipe is in use for the USB bus." bitfld.word 0x0 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe." "0: NAK response,1: BUF response (depending on buffer state),?,?" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x90)++0x1 line.word 0x0 "PIPE$1TRE,PIPE Transaction Counter Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TRENB,Transaction Counter EnableEnables or disables the transaction counter function." "0: The transaction counter function is disabled.,1: The transaction counter function is enabled." newline bitfld.word 0x0 8. "TRCLR,Transaction Counter ClearSetting this bit to 1 allows clearing the transaction counter to 0." "0: Invalid,1: The current counter value is cleared." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x92)++0x1 line.word 0x0 "PIPE$1TRN,PIPE Transaction Counter Register" hexmask.word 0x0 0.--15. 1. "TRNCNT,Transaction CounterWhen writing to: Specify the number of total packets (number of transactions) to be received by the relevant PIPE.When read from: When TRENB = 0: Indicate the specified number of transactions.When TRENB = 1: Indicate the number.." repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0xD0)++0x1 line.word 0x0 "DEVADD$1,Device Address Configuration Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 11.--14. 1. "UPPHUB,Communication Target Connecting Hub Register" newline bitfld.word 0x0 8.--10. "HUBPORT,Communication Target Connecting Hub Port" "0: Port number of the hub,?,?,?,?,?,?,?" bitfld.word 0x0 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDx is not used.,1: Low speed,?,?" newline hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end group.word 0xE4++0x1 line.word 0x0 "DEVADDA,Device Address Configuration Register A" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 11.--14. 1. "UPPHUB,Communication Target Connecting Hub Register" newline bitfld.word 0x0 8.--10. "HUBPORT,Communication Target Connecting Hub Port" "0: Port number of the hub,?,?,?,?,?,?,?" bitfld.word 0x0 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDA is not used.,1: Low speed,?,?" newline hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x100++0x3 line.word 0x0 "LPCTRL,Low Power Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 7. "HWUPM,Hardware return made control" "0: Hardware return is not made while the CPU clock..,1: Hardware return is made while the CPU clock is.." hexmask.word.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.word 0x2 "LPSTS,Low Power Status Register" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "SUSPENDM,UTMI SuspendM ControlThis bit controls the SuspendM signal to the PHY designed under the UTMI specification." "0: UTMI suspension mode,1: UTMI normal mode" newline hexmask.word 0x2 0.--13. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." group.word 0x140++0x1 line.word 0x0 "BCCTRL,Battery Charging Control Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." rbitfld.word 0x0 9. "PDDETSTS,PDDET Status" "0: The PDDET pin is at low level.,1: The PDDET pin is at high level." newline rbitfld.word 0x0 8. "CHGDETSTS,CHGDET Status" "0: The CHGDET pin is at low level.,1: The CHGDET pin is at high level." bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "DCPMODE,DCP Mode Control" "0: The RDCP_DAT resistor is disabled,1: The RDCP_DAT resistor is enabled." bitfld.word 0x0 4. "VDMSRCE,VDMSRC Control" "0: The VDM_SRC circuit is disabled. (Initial value),1: The VDM_SRC circuit is enabled." newline bitfld.word 0x0 3. "IDPSINKE,IDPSINK Control" "0: The IDP_SINK circuit is disabled. (Initial value),1: The IDP_SINK circuit is enabled." bitfld.word 0x0 2. "VDPSRCE,VDPSRC Control" "0: The VDP_SRC circuit is disabled. (Initial value),1: The VDP_SRC circuit is enabled." newline bitfld.word 0x0 1. "IDMSINKE,IDMSINK Control" "0: The IDM_SINK circuit is disabled. (Initial value),1: The IDM_SINK circuit is enabled." bitfld.word 0x0 0. "IDPSRCE,IDPSRC Control" "0: The IDP_SRC circuit is disabled. (Initial value),1: The IDP_SRC circuit is enabled." group.word 0x144++0x7 line.word 0x0 "PL1CTRL1,Function L1 Control Register 1" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "L1EXTMD,PHY Control Mode at L1 Return" "0: SUSPENDM is not set by hardware when Host K is..,1: SUSPENDM is set by hardware when Host K is.." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x0 8.--11. 1. "HIRDTHR,L1 Response Negotiation Threshold ValueHIRD threshold value used for L1NEGOMD.The format is the same as the HIRD field in HL1CTRL." newline hexmask.word.byte 0x0 4.--7. 1. "DVSQ,DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0.Indicates the L1 state together with the device state bits DVSQ[2:0]." bitfld.word 0x0 3. "L1NEGOMD,L1 Response Negotiation Control.NOTE: This bit is valid only when the L1RESPMD[1:0] value is 2'b11." "0: When receive HIRD is larger than HIRDTHR[3:0]..,1: When receive HIRD is smaller than HIRDTHR[3:0].." newline bitfld.word 0x0 1.--2. "L1RESPMD,L1 Response Mode" "0: NYET,1: ACK,?,?" bitfld.word 0x0 0. "L1RESPEN,L1 Response Enable" "0: LPM is not supported.,1: LPM is supported." line.word 0x2 "PL1CTRL2,Function L1 Control Register 2" bitfld.word 0x2 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x2 12. "RWEMON,RWE Value Monitor" "0: The RWE bit value of the LPM token received last..,1: The RWE bit value of the LPM token received last.." newline hexmask.word.byte 0x2 8.--11. 1. "HIRDMON,HIRD Value Monitor" hexmask.word.byte 0x2 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.word 0x4 "HL1CTRL1,Host L1 Control Register 1" hexmask.word 0x4 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x4 1.--2. "L1STATUS,L1 Request Completion Status" "0: ACK received,1: NYET received,?,?" newline bitfld.word 0x4 0. "L1REQ,L1 Transition Request" "0: This bit is cleared to 0 by hardware when the..,1: To make a transition to the L1 state." line.word 0x6 "HL1CTRL2,Host L1 Control Register 2" bitfld.word 0x6 15. "BESL,BESL & Alternate HIRDThis bit selects the K-State drive period at the time of L1 Resume." "0,1" bitfld.word 0x6 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x6 12. "L1RWE,LPM Token L1 RemoteWake EnableThese bits specify the value to be set in the RWE field of LPM token." "0,1" hexmask.word.byte 0x6 8.--11. 1. "HIRD,LPM Token HIRD" newline hexmask.word.byte 0x6 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x6 0.--3. 1. "L1ADDR,LPM Token DeviceAddressThese bits specify the value to be set in the ADDR field of LPM token." group.word 0x154++0x3 line.word 0x0 "VRCGCTRL1,VRCORE CG Control Register 1" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "ICCLK_DLYEN,ICCLK delay enable" "0: disabled,1: enabled" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "VRCGEN,Clock gating for VRCORE Enable" "0: disabled,1: enabled" line.word 0x2 "VRCGCTRL2,VRCORE CG Control Register 2" hexmask.word.byte 0x2 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x2 0.--7. 1. "VRCG_MSKCNT,Clocking mask count for VRCORE" rgroup.long 0x160++0x3 line.long 0x0 "DPUSR0R,Deep Standby USB Transceiver Control/Pin Monitor Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x0 23. "DVBSTSHM,VBUS InputIndicates VBUS input signal on the HS side of USB port." "0,1" newline bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 21. "DOVCBHM,OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port." "0,1" newline bitfld.long 0x0 20. "DOVCAHM,OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port." "0,1" hexmask.long.tbyte 0x0 0.--19. 1. "Reserved,These bits are read as 00000000000000000000." group.long 0x164++0x3 line.long 0x0 "DPUSR1R,Deep Standby USB Suspend/Resume Interrupt Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." rbitfld.long 0x0 23. "DVBSTSH,Indication of Return from VBUS Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" newline bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.long 0x0 21. "DOVCBH,Indication of Return from OVRCURB Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" newline rbitfld.long 0x0 20. "DOVCAH,Indication of Return from OVRCURA Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" hexmask.long.byte 0x0 16.--19. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 7. "DVBSTSHE,VBUS Interrupt Enable/Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 5. "DOVCBHE,OVRCURB Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline bitfld.long 0x0 4. "DOVCAHE,OVRCURA Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x168++0x3 line.word 0x0 "DPUSR2R,Deep Standby USB Suspend/Resume Interrupt Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "DMINTE,DM Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline bitfld.word 0x0 8. "DPINTE,DP Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.word 0x0 5. "DMVAL,DM InputIndicates DM input signal on the HS side of USB port." "0,1" rbitfld.word 0x0 4. "DPVAL,DP InputIndicates DP input signal on the HS side of USB port." "0,1" newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.word 0x0 1. "DMINT,Indication of Return from DM Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" newline rbitfld.word 0x0 0. "DPINT,Indication of Return from DP Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" line.word 0x2 "DPUSRCR,Deep Standby USB Suspend/Resume Command Register" hexmask.word 0x2 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x2 1. "FIXPHYPD,USB Transceiver Control Fix for PLL" "0: Normal mode,1: Go to/Return from deep software standby mode" newline bitfld.word 0x2 0. "FIXPHY,USB Transceiver Control Fix" "0: Normal mode,1: Go to/Return from deep software standby mode" tree.end tree "USBHS_NS" base ad:0x50351000 group.word 0x0++0x3 line.word 0x0 "SYSCFG,System Configuration Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "CNEN,Single End Receiver Enable" "0: Single end receiver operation is disabled.,1: Single end receiver operation is enabled." newline bitfld.word 0x0 7. "HSE,High-Speed Operation Enable" "0: High-speed operation is disabled.(When the..,1: High-speed operation is enabled (the controller.." bitfld.word 0x0 6. "DCFM,Controller Function Select" "0: Function controller function is selected.,1: Host controller function is selected." newline bitfld.word 0x0 5. "DRPD,D+/D- Line Resistor Control" "0: Pulling down the line is disabled.,1: Pulling down the line is enabled." bitfld.word 0x0 4. "DPRPU,D+ Line Resistor Control" "0: Pulling up the line is disabled.,1: Pulling up the line is enabled." newline bitfld.word 0x0 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x0 0. "USBE,USB Operation Enable" "0: USB operation is disabled.,1: USB operation is enabled." line.word 0x2 "BUSWAIT,CPU Bus Wait Register" hexmask.word 0x2 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x2 0.--3. 1. "BWAIT,CPU Bus Access Wait Specification BWAIT waits (BWAIT+2 access cycles)" rgroup.word 0x4++0x3 line.word 0x0 "SYSSTS0,System Configuration Status Register" bitfld.word 0x0 14.--15. "OCVMON,External USB1_OVRCURA/USB1_OVRCURB Input Pin MonitorThe OCVMON[1] bit indicates the status of the USBHS_OVRCURA pin. The OCVMON[0] bit indicates the status of the USBHS_OVRCURB pin." "0,1,2,3" hexmask.word.byte 0x0 7.--13. 1. "Reserved,These bits are read as 0000000." newline bitfld.word 0x0 6. "HTACT,Host Sequencer Status Monitor" "0: Host sequencer is stopped.,1: Host sequencer is operating." bitfld.word 0x0 5. "SOFEA,SOF Active Monitor While Host Controller Function is Selected." "0: SOF output is stopped.,1: SOF output is operating." newline bitfld.word 0x0 3.--4. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.word 0x0 2. "IDMON,ID0 Pin Monitor" "0: ID0 = Low,1: ID0 = High" newline bitfld.word 0x0 0.--1. "LNST,USB Data Line Status Monitor" "0: SE0 (During Low-Speed Operation:only when the..,1: K-State (During Low-Speed Operation:only when..,?,?" line.word 0x2 "PLLSTA,PLL Status Register" hexmask.word 0x2 1.--15. 1. "Reserved,These bits are read as 000000000000000." bitfld.word 0x2 0. "PLLLOCK,PLL Lock Flag" "0: PLL is not locked.,1: PLL is locked." group.word 0x8++0x1 line.word 0x0 "DVSTCTR0,Device State Control Register 0" hexmask.word.byte 0x0 12.--15. 1. "Reserved,These bits are read as 0000. The write value should be 0000." bitfld.word 0x0 11. "HNPBTOA,Host Negotiation Protocol (HNP) Control This bit is used when switching from device B to device A while in OTG mode. If the HNPBTOA bit is 1 the internal function control keeps the suspended state until the HNP processing ends even though.." "0: Normal Operation,1: Switching from device B to device A is enabled" newline bitfld.word 0x0 10. "EXICEN,USB0_EXICEN Output Pin ControlThe EXICEN bit value is output as the status of the external USB0_EXICEN pin without change." "0,1" bitfld.word 0x0 9. "VBUSEN,USB0_VBUSEN Output Pin ControlThe VBUSEN bit value is output as the status of the external USB0_VBUSEN pin without change." "0,1" newline bitfld.word 0x0 8. "WKUP,Wakeup Output" "0: Remote wakeup signal is not output.,1: Remote wakeup signal is output." bitfld.word 0x0 7. "RWUPE,Remote Wakeup Detection Enable" "0: Downstream-port remote wakeup is disabled.,1: Downstream-port remote wakeup is enabled." newline bitfld.word 0x0 6. "USBRST,USB Bus Reset Output" "0: USB bus reset signal is not output.,1: USB bus reset signal is output." bitfld.word 0x0 5. "RESUME,Resume Output" "0: Resume signal is not output.,1: Resume signal is output." newline bitfld.word 0x0 4. "UACT,USB Bus Enable" "0: Downstream port is disabled (SOF or micro-SOF..,1: Downstream port is enabled (SOF or micro-SOF.." bitfld.word 0x0 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline rbitfld.word 0x0 0.--2. "RHST,USB Bus Reset Status" "0: USB bus reset in progress(When the host..,1: Low-speed connection(When the host controller..,?,?,?,?,?,?" group.word 0xC++0x1 line.word 0x0 "TESTMODE,USB Test Mode Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "UTST,Test Mode" group.long 0x14++0x3 line.long 0x0 "CFIFO,CFIFO Port Register" hexmask.long 0x0 0.--31. 1. "FIFOPORT,FIFO Port.Read receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.word 0x14++0x1 line.word 0x0 "CFIFOL,CFIFO Port Register L" group.byte 0x14++0x0 line.byte 0x0 "CFIFOLL,CFIFO Port Register LL" group.word 0x16++0x1 line.word 0x0 "CFIFOH,CFIFO Port Register H" group.byte 0x17++0x0 line.byte 0x0 "CFIFOHH,CFIFO Port Register HH" group.long 0x18++0x3 line.long 0x0 "D0FIFO,D0FIFO Port Register" hexmask.long 0x0 0.--31. 1. "FIFOPORT,FIFO Port Read receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.word 0x18++0x1 line.word 0x0 "D0FIFOL,D0FIFO Port Register L" group.byte 0x18++0x0 line.byte 0x0 "D0FIFOLL,D0FIFO Port Register LL" group.word 0x1A++0x1 line.word 0x0 "D0FIFOH,D0FIFO Port Register H" group.byte 0x1B++0x0 line.byte 0x0 "D0FIFOHH,D0FIFO Port Register HH" group.long 0x1C++0x3 line.long 0x0 "D1FIFO,D1FIFO Port Register" hexmask.long 0x0 0.--31. 1. "FIFOPORT,FIFO PortRead receive data from the FIFO buffer or write transmit data to the FIFO buffer by accessing these bits." group.word 0x1C++0x1 line.word 0x0 "D1FIFOL,D1FIFO Port Register L" group.byte 0x1C++0x0 line.byte 0x0 "D1FIFOLL,D1FIFO Port Register LL" group.word 0x1E++0x1 line.word 0x0 "D1FIFOH,D1FIFO Port Register H" group.byte 0x1F++0x0 line.byte 0x0 "D1FIFOHH,D1FIFO Port Register HH" group.word 0x20++0x3 line.word 0x0 "CFIFOSEL,CFIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: Do not rewind buffer pointer (Writing 0 has no..,1: Rewind buffer pointer." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 10.--11. "MBW,CFIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,?,?" newline bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" newline bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 5. "ISEL,FIFO Port Access Direction when DCP is Selected" "0: Reading from the buffer memory is selected,1: Writing to the buffer memory is selected" newline bitfld.word 0x0 4. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x2 "CFIFOCTR,CFIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side." newline rbitfld.word 0x2 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed." "0: FIFO port access is disabled,1: FIFO port access is enabled" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x2 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data." group.word 0x28++0xB line.word 0x0 "D0FIFOSEL,D0FIFO Port Select Register" bitfld.word 0x0 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x0 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x0 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x0 12. "DREQE,UCL_Dx_DREQ Signal Output Enable" "0: Disables the output,1: Enables the output" newline bitfld.word 0x0 10.--11. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,?,?" bitfld.word 0x0 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" hexmask.word.byte 0x0 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word.byte 0x0 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x2 "D0FIFOCTR,D0FIFO Port Control Register" bitfld.word 0x2 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x2 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side." newline rbitfld.word 0x2 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed." "0: FIFO port access is disabled,1: FIFO port access is enabled" bitfld.word 0x2 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x2 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data." line.word 0x4 "D1FIFOSEL,D1FIFO Port Select Register" bitfld.word 0x4 15. "RCNT,Read Count Mode" "0: The DTLN bits are cleared when all of the..,1: The DTLN bits are decremented each time the.." bitfld.word 0x4 14. "REW,Buffer Pointer Rewind" "0: The buffer pointer is not rewound,1: The buffer pointer is rewound" newline bitfld.word 0x4 13. "DCLRM,Auto Buffer Memory Clear Mode Accessed after Specified Pipe Data is Read" "0: Auto buffer clear mode is disabled,1: Auto buffer clear mode is enabled" bitfld.word 0x4 12. "DREQE,UCL_Dx_DREQ Signal Output Enable" "0: Disables the output,1: Enables the output" newline bitfld.word 0x4 10.--11. "MBW,FIFO Port Access Bit Width" "0: 8-bit width,1: 16-bit width,?,?" bitfld.word 0x4 9. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x4 8. "BIGEND,FIFO Port Endian Control" "0: Little endian,1: Big endian" hexmask.word.byte 0x4 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.word.byte 0x4 0.--3. 1. "CURPIPE,FIFO Port Access Pipe Specification" line.word 0x6 "D1FIFOCTR,D1FIFO Port Control Register" bitfld.word 0x6 15. "BVAL,Buffer Memory Valid Flag" "0: Invalid,1: Writing ended" bitfld.word 0x6 14. "BCLR,CPU Buffer Clear" "0: No operation,1: Clear FIFO buffer on the CPU side." newline rbitfld.word 0x6 13. "FRDY,FIFO Port ReadyIndicates whether the FIFO port can be accessed." "0: FIFO port access is disabled,1: FIFO port access is enabled" bitfld.word 0x6 12. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x6 0.--11. 1. "DTLN,Receive Data Length.Indicates the length of the receive data." line.word 0x8 "INTENB0,Interrupt Enable Register 0" bitfld.word 0x8 15. "VBSE,VBUS Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 14. "RSME,Resume Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 13. "SOFE,Frame Number Update Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 12. "DVSE,Device State Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 11. "CTRE,Control Transfer Stage Transition Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 10. "BEMPE,Buffer Empty Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0x8 9. "NRDYE,Buffer Not Ready Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0x8 8. "BRDYE,Buffer Ready Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline hexmask.word.byte 0x8 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.word 0xA "INTENB1,Interrupt Enable Register 1" bitfld.word 0xA 15. "OVRCRE,OVRCRE Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 14. "BCHGE,USB Bus Change Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xA 12. "DTCHE,Disconnection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 11. "ATTCHE,Connection Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xA 9. "L1RSMENDE,L1 Resume End Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 8. "LPMENDE,LPM Transaction End Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xA 6. "EOFERRE,EOF Error Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 5. "SIGNE,Setup Transaction Error Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" bitfld.word 0xA 4. "SACKE,Setup Transaction Normal Response Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" newline bitfld.word 0xA 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0xA 0. "PDDETINTE,PDDETINT Detection Interrupt Enable" "0: Interrupt output disabled,1: Interrupt output enabled" group.word 0x36++0xD line.word 0x0 "BRDYENB,BRDY Interrupt Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x0 0.--9. 1. "PIPEBRDYE,BRDY Interrupt Enable for Each Pipe" line.word 0x2 "NRDYENB,NRDY Interrupt Enable Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x2 0.--9. 1. "PIPENRDYE,NRDY Interrupt Enable for Each Pipe" line.word 0x4 "BEMPENB,BEMP Interrupt Enable Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x4 0.--9. 1. "PIPEBEMPE,BEMP Interrupt Enable for Each Pipe" line.word 0x6 "SOFCFG,SOF Pin Configuration Register" hexmask.word.byte 0x6 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x6 8. "TRNENSEL,Transaction-Enabled Time Select.The transfer efficiency can be improved by setting this bit to 1 if no low-speed device is connected directly or via FS-HUB to the USB port." "0: For non-low-speed communication,1: For low-speed communication" newline bitfld.word 0x6 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x6 6. "BRDYM,PIPEBRDY Interrupt Status Clear Timing.This bit can be set only in the initial setting (before communications).The setting cannot be changed once communication starts." "0: Software clears the status.,1: Hardware clears the status when data has been.." newline bitfld.word 0x6 5. "INTL,Interrupt Output Sense Select" "0: Edge sense,1: Level sense" rbitfld.word 0x6 4. "EDGESTS,Interrupt Edge Processing Status Monitor" "0: Interrupt edge processing is not run,1: Interrupt edge processing is running" newline hexmask.word.byte 0x6 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.word 0x8 "PHYSET,PHY Setting Register" bitfld.word 0x8 15. "HSEB,CL-Only Mode" "0: CL-only mode is not activated.,1: CL-only mode is activated." bitfld.word 0x8 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x8 11. "REPSTART,Forcibly Start Terminating Resistance Adjustment" "0: Terminating resistance adjustment is forcibly..,1: Terminating resistance adjustment is not.." bitfld.word 0x8 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x8 8.--9. "REPSEL,Terminating Resistance Adjustment Cycle" "0: No cycle is set.,1: Adjust terminating resistance at 16-second..,?,?" bitfld.word 0x8 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x8 4.--5. "CLKSEL,Input System Clock Frequency" "0: Setting Prohibited,1: 12 MHz,?,?" bitfld.word 0x8 3. "CDPEN,Charging Downstream Port Enable" "0: Disable charging downstream port,1: Enable charging downstream port" newline bitfld.word 0x8 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x8 1. "PLLRESET,PLL Reset Control" "0: Disable PLL reset control for UTMI_PHY,1: Enable PLL reset control for UTMI_PHY" newline bitfld.word 0x8 0. "DIRPD,Power-Down Control" "0: Does not enter low-power consumption mode,1: Enter low-power consumption mode" line.word 0xA "INTSTS0,Interrupt Status Register 0" bitfld.word 0xA 15. "VBINT,VBUS Interrupt Status" "0: VBUS interrupt is not generated on detecting a..,1: VBUS interrupt is generated on detecting a.." bitfld.word 0xA 14. "RESM,Resume Interrupt Status" "0: Resume interrupts are not generated,1: Resume interrupts are generated" newline bitfld.word 0xA 13. "SOFR,Frame Number Refresh Interrupt Status" "0: SOF interrupts are not generated,1: SOF interrupts are generated" bitfld.word 0xA 12. "DVST,Device State Transition Interrupt Status" "0: Device state transition interrupts are not..,1: Device state transition interrupts are generated" newline bitfld.word 0xA 11. "CTRT,Control Transfer Stage Transition Interrupt Status" "0: Control transfer stage transition interrupts are..,1: Control transfer stage transition interrupts are.." rbitfld.word 0xA 10. "BEMP,Buffer Empty Interrupt Status" "0: BEMP interrupts are not generated,1: BEMP interrupts are not generated" newline rbitfld.word 0xA 9. "NRDY,Buffer Not Ready Interrupt Status" "0: NRDY interrupts are not generated,1: NRDY interrupts are generated" rbitfld.word 0xA 8. "BRDY,Buffer Ready Interrupt Status" "0: BRDY interrupts are not generated,1: BRDY interrupts are generated" newline rbitfld.word 0xA 7. "VBSTS,VBUS Input Status" "0: The USBHS_VBUS pin is low,1: The USBHS_VBUS pin is high" rbitfld.word 0xA 4.--6. "DVSQ,Device State" "0: Suspended state(1xx),1: Default state,?,?,?,?,?,?" newline bitfld.word 0xA 3. "VALID,USB Request Reception" "0: Not detected,1: Setup packet reception" rbitfld.word 0xA 0.--2. "CTSQ,Control Transfer Stage" "0: Idle or setup stage,1: Control read data stage,?,?,?,?,?,?" line.word 0xC "INTSTS1,Interrupt Status Register 1" bitfld.word 0xC 15. "OVRCR,Overcurrent Interrupt Status" "0: OVRCR interrupts are not generated,1: OVRCR interrupts are generated" bitfld.word 0xC 14. "BCHG,USB Bus Change Interrupt Status" "0: BCHG interrupts are not generated,1: BCHG interrupts are generated" newline bitfld.word 0xC 13. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 12. "DTCH,USB Disconnection Detection Interrupt Status" "0: DTCH interrupts are not generated,1: DTCH interrupts are generated" newline bitfld.word 0xC 11. "ATTCH,USB Connection Detection Interrupt Status" "0: ATTCH interrupts are not generated,1: ATTCH interrupts are generated" bitfld.word 0xC 10. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 9. "L1RSMEND,L1 Resume End Interrupt Status" "0: L1RSMEND interrupts are not generated,1: L1RSMEND interrupts are generated" bitfld.word 0xC 8. "LPMEND,LPM Transaction End Interrupt Status" "0: LPMEND interrupts are not generated,1: LPMEND interrupts are generated" newline bitfld.word 0xC 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0xC 6. "EOFERR,EOF Error Detection Interrupt Status" "0: EOFERR interrupts are not generated,1: EOFERR interrupts are generated" newline bitfld.word 0xC 5. "SIGN,Setup Transaction Error Interrupt Status" "0: SIGN interrupts are not generated,1: SIGN interrupts are generated" bitfld.word 0xC 4. "SACK,Setup Transaction Normal Response Interrupt Status" "0: SACK interrupts are not generated,1: SACK interrupts are generated" newline bitfld.word 0xC 1.--3. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0xC 0. "PDDETINT,PDDET Detection Interrupt Status" "0: PDDET interrupts are not generated,1: PDDET interrupts are generated" group.word 0x46++0xB line.word 0x0 "BRDYSTS,BRDY Interrupt Status Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x0 0.--9. 1. "PIPEBRDY,BRDY Interrupt Status for Each Pipe" line.word 0x2 "NRDYSTS,NRDY Interrupt Status Register" hexmask.word.byte 0x2 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x2 0.--9. 1. "PIPENRDY,NRDY Interrupt Status for Each Pipe" line.word 0x4 "BEMPSTS,BEMP Interrupt Status Register" hexmask.word.byte 0x4 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." hexmask.word 0x4 0.--9. 1. "PIPEBEMP,BEMP Interrupt Status for Each Pipe" line.word 0x6 "FRMNUM,Frame Number Register" bitfld.word 0x6 15. "OVRN,Overrun/Underrun Detection Status" "0: No error,1: An error occurred" bitfld.word 0x6 14. "CRCE,CRC Error Detection Status" "0: No error,1: An error occurred" newline bitfld.word 0x6 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.word 0x6 0.--10. 1. "FRNM,Frame Number.Indicate the latest frame number." line.word 0x8 "UFRMNUM,uFrame Number Register" bitfld.word 0x8 15. "DVCHG,Device State Change" "0: Disables the writing to the..,1: Enables the writing to the.." hexmask.word 0x8 3.--14. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." newline rbitfld.word 0x8 0.--2. "UFRNM,MicroframeIndicate the microframe number." "0,1,2,3,4,5,6,7" line.word 0xA "USBADDR,USB Address Register" hexmask.word.byte 0xA 11.--15. 1. "Reserved,These bits are read as 00000. The write value should be 00000." bitfld.word 0xA 8.--10. "STSRECOV0,Status Recovery" "0: Setting prohibited.,1: Return to the full-speed state(bits..,?,?,?,?,?,?" newline bitfld.word 0xA 7. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0xA 0.--6. 1. "USBADDR,USB AddressWhen the function controller function is selected these bits indicate the USB address assigned by the host." group.word 0x54++0xD line.word 0x0 "USBREQ,USB Request Type Register" hexmask.word.byte 0x0 8.--15. 1. "BREQUEST,USB request bRequest value Finction controller selected : read-only Host controller selected : read-write" hexmask.word.byte 0x0 0.--7. 1. "BMREQUESTTYPE,USB request bmRequestType value Finction controller selected : read-only Host controller selected : read-write" line.word 0x2 "USBVAL,USB Request Value Register" hexmask.word 0x2 0.--15. 1. "WVALUE,Value of USB request wValue Finction controller selected : read-only Host controller selected : read-write" line.word 0x4 "USBINDX,USB Request Index Register" hexmask.word 0x4 0.--15. 1. "WINDEX,Value of USB request wIndex Finction controller selected : read-only Host controller selected : read-write" line.word 0x6 "USBLENG,USB Request Length Register" hexmask.word 0x6 0.--15. 1. "WLENGTH,Value of USB request wLength Finction controller selected : read-only Host controller selected : read-write" line.word 0x8 "DCPCFG,DCP Configuration Register" hexmask.word.byte 0x8 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x8 8. "CNTMD,Continuous Transfer Mode" "0: Non-continuous transfer mode,1: Continuous transfer mode" newline bitfld.word 0x8 7. "SHTNAK,Pipe Blocking on End of Transfer" "0: The pipe remains open after transfer ends.,1: The pipe is blocked after transfer ends." bitfld.word 0x8 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x8 4. "DIR,Transfer Direction" "0: Data receiving direction,1: Data transmitting direction" hexmask.word.byte 0x8 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." line.word 0xA "DCPMAXP,DCP Maximum Packet Size Register" hexmask.word.byte 0xA 12.--15. 1. "DEVSEL,Device SelectThese bits specify the address of the destination function device for control transfer when the host controller function is selected." hexmask.word.byte 0xA 7.--11. 1. "Reserved,These bits are read as 00000. The write value should be 00000." newline hexmask.word.byte 0xA 0.--6. 1. "MXPS,Maximum Packet SizeThese bits specify the maximum data payload (maximum packet size) for the DCP." line.word 0xC "DCPCTR,DCP Control Register" rbitfld.word 0xC 15. "BSTS,Buffer Status" "0: Buffer access is disabled.,1: Buffer access is enabled." bitfld.word 0xC 14. "SUREQ,SETUP Token Transmission" "0: Writing is ignored.,1: Transmits the setup packet." newline bitfld.word 0xC 13. "CSCLR,Split Transaction CSPLIT Status Clear" "0: Writing is ignored.,1: Clears the CSSTS bit to 0." rbitfld.word 0xC 12. "CSSTS,Split Transaction COMPLETE SPLIT(CSPLIT) Status" "0: START-SPLIT(SSPLIT) transaction processing is in..,1: The CSPLIT transaction processing is in progress." newline bitfld.word 0xC 11. "SUREQCLR,SUREQ Bit Clear" "0: Writing is ignored.,1: Clears the SUREQ bit to 0." bitfld.word 0xC 9.--10. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0xC 8. "SQCLR,Toggle Bit Clear" "0: Writing is ignored.,1: Specifies DATA0." bitfld.word 0xC 7. "SQSET,Toggle Bit Set" "0: Writing is ignored.,1: Specifies DATA1." newline rbitfld.word 0xC 6. "SQMON,Sequence Toggle Bit Monitor" "0: DATA0,1: DATA1" rbitfld.word 0xC 5. "PBUSY,Pipe Busy" "0: The relevant pipe is not used for the USB bus.,1: The relevant pipe is in use for the USB bus." newline bitfld.word 0xC 4. "PINGE,PING Token Issue Enable" "0: Issuing PING token is disabled.,1: Normal PING operation" bitfld.word 0xC 3. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0xC 2. "CCPL,Control Transfer End Enable" "0: Completion of control transfer is disabled.,1: Completion of control transfer is enabled." bitfld.word 0xC 0.--1. "PID,Response PID" "0: NAK response,1: BUF response (depending on buffer state),?,?" group.word 0x64++0x1 line.word 0x0 "PIPESEL,Pipe Window Select Register" hexmask.word 0x0 4.--15. 1. "Reserved,These bits are read as 000000000000. The write value should be 000000000000." hexmask.word.byte 0x0 0.--3. 1. "PIPESEL,Pipe Window SelectThese bits specify the pipe for registers at addresses 68H to 6EH." group.word 0x68++0x7 line.word 0x0 "PIPECFG,Pipe Configuration Register" bitfld.word 0x0 14.--15. "TYPE,Transfer Type" "0: Pipe not used,1: Bulk transfer,?,?" bitfld.word 0x0 11.--13. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 10. "BFRE,BRDY Interrupt Operation Specification" "0: BRDY interrupt upon transmitting or receiving data,1: BRDY interrupt upon completion of reading data" bitfld.word 0x0 9. "DBLB,Double Buffer Mode" "0: Single buffer,1: Double buffer" newline bitfld.word 0x0 8. "CNTMD,Continuous Transfer Mode" "0: Discontinuous transfer mode,1: Continuous transfer mode" bitfld.word 0x0 7. "SHTNAK,Pipe Disabled at End of Transfer" "0: The pipe is continued at the end of transfer.,1: The pipe is disabled at the end of transfer." newline bitfld.word 0x0 5.--6. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 4. "DIR,Transfer Direction" "0: Receiving direction,1: Transmitting direction" newline hexmask.word.byte 0x0 0.--3. 1. "EPNUM,Endpoint Number" line.word 0x2 "PIPEBUF,Pipe Buffer Register" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x2 10.--14. 1. "BUFSIZE,Buffer Size 00h: 64 bytes 01h: 128 bytes : 1Fh: 2 Kbytes" newline bitfld.word 0x2 8.--9. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x2 0.--7. 1. "BUFNMB,Buffer NumberThese bits specify the FIFO buffer number of the selected pipe (04h to 87h)." line.word 0x4 "PIPEMAXP,Pipe Maximum Packet Size Register" hexmask.word.byte 0x4 12.--15. 1. "DEVSEL,Device SelectThese bits specify the address of the peripheral device when the host controller function is selected." bitfld.word 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline hexmask.word 0x4 0.--10. 1. "MXPS,Maximum Packet SizeThese bits specify the maximum data payload (maximum packet size) for the selected pipe.A size of 1h to 40h bytes can be set for PIPE6 to PIPE9." line.word 0x6 "PIPEPERI,Pipe Cycle Control Register" bitfld.word 0x6 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x6 12. "IFIS,Isochronous IN Buffer Flush" "0: The buffer is not flushed.,1: The buffer is flushed." newline hexmask.word 0x6 3.--11. 1. "Reserved,These bits are read as 000000000. The write value should be 000000000." bitfld.word 0x6 0.--2. "IITV,Interval Error Detection IntervalThese bits specify the transfer interval timing for the selected pipe as n-th power of 2 of the frame timing." "0,1,2,3,4,5,6,7" repeat 9. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x70)++0x1 line.word 0x0 "PIPE$1CTR,PIPE Control Register" rbitfld.word 0x0 15. "BSTS,Buffer StatusThis bit indicates the FIFO buffer status for the relevant pipe." "0: Buffer access is disabled.,1: Buffer access is enabled." rbitfld.word 0x0 14. "INBUFM,Transmit Buffer MonitorThis bit indicates the FIFO buffer status for the relevant pipe in the transmitting direction." "0: No transmittable data is present in the FIFO..,1: Transmittable data is present in the FIFO buffer." newline bitfld.word 0x0 13. "CSCLR,CSPLIT Status ClearSet this bit to 1 when clearing the CSSTS bit of the relevant pipe" "0: Writing is disabled.,1: The CSSTS bit is cleared." rbitfld.word 0x0 12. "CSSTS,CSSTS StatusThis bit indicates the CSPLIT status of Split Transaction of the relevant pipe" "0: SSplit Transaction processing is in progress or..,1: CSplit Transaction processing is in progress." newline bitfld.word 0x0 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 10. "ATREPM,Auto Response ModeThis bit enables or disables auto response mode for the relevant pipe." "0: Auto response mode is disabled.,1: Auto response mode is enabled (Transmission:.." newline bitfld.word 0x0 9. "ACLRM,Auto Buffer Clear ModeThis bit enables or disables auto buffer clear mode for the relevant pipe" "0: Disabled,1: Enabled (all buffers are initialized)" bitfld.word 0x0 8. "SQCLR,Toggle Bit ClearThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is cleared to DATA0" "0: Writing is ignored.,1: Specifies DATA0." newline bitfld.word 0x0 7. "SQSET,Toggle Bit SetThis bit is set to 1 when the expected value of the sequence toggle bit for the next transaction of the relevant pipe is set for DATA1" "0: Writing is ignored.,1: Specifies DATA1." rbitfld.word 0x0 6. "SQMON,Toggle Bit ConfirmationThis bit indicates the expected value of the sequence toggle bit for the next transaction of the relevant pipe" "0: DATA0,1: DATA1" newline rbitfld.word 0x0 5. "PBUSY,Pipe BusyThis bit indicates whether the relevant pipe is being used for the USB bus" "0: The relevant pipe is not used for the USB bus.,1: The relevant pipe is in use for the USB bus." bitfld.word 0x0 2.--4. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" newline bitfld.word 0x0 0.--1. "PID,Response PIDThese bits specify the response type for the next transaction of the relevant pipe." "0: NAK response,1: BUF response (depending on buffer state),?,?" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x90)++0x1 line.word 0x0 "PIPE$1TRE,PIPE Transaction Counter Enable Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "TRENB,Transaction Counter EnableEnables or disables the transaction counter function." "0: The transaction counter function is disabled.,1: The transaction counter function is enabled." newline bitfld.word 0x0 8. "TRCLR,Transaction Counter ClearSetting this bit to 1 allows clearing the transaction counter to 0." "0: Invalid,1: The current counter value is cleared." hexmask.word.byte 0x0 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) group.word ($2+0x92)++0x1 line.word 0x0 "PIPE$1TRN,PIPE Transaction Counter Register" hexmask.word 0x0 0.--15. 1. "TRNCNT,Transaction CounterWhen writing to: Specify the number of total packets (number of transactions) to be received by the relevant PIPE.When read from: When TRENB = 0: Indicate the specified number of transactions.When TRENB = 1: Indicate the number.." repeat.end repeat 10. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0xD0)++0x1 line.word 0x0 "DEVADD$1,Device Address Configuration Register" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 11.--14. 1. "UPPHUB,Communication Target Connecting Hub Register" newline bitfld.word 0x0 8.--10. "HUBPORT,Communication Target Connecting Hub Port" "0: Port number of the hub,?,?,?,?,?,?,?" bitfld.word 0x0 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDx is not used.,1: Low speed,?,?" newline hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." repeat.end group.word 0xE4++0x1 line.word 0x0 "DEVADDA,Device Address Configuration Register A" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.word.byte 0x0 11.--14. 1. "UPPHUB,Communication Target Connecting Hub Register" newline bitfld.word 0x0 8.--10. "HUBPORT,Communication Target Connecting Hub Port" "0: Port number of the hub,?,?,?,?,?,?,?" bitfld.word 0x0 6.--7. "USBSPD,Transfer Speed of Communication Target Device" "0: DEVADDA is not used.,1: Low speed,?,?" newline hexmask.word.byte 0x0 0.--5. 1. "Reserved,These bits are read as 000000. The write value should be 000000." group.word 0x100++0x3 line.word 0x0 "LPCTRL,Low Power Control Register" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.word 0x0 7. "HWUPM,Hardware return made control" "0: Hardware return is not made while the CPU clock..,1: Hardware return is made while the CPU clock is.." hexmask.word.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.word 0x0 0. "Reserved,This bit is read as 0. The write value should be 0." "0,1" line.word 0x2 "LPSTS,Low Power Status Register" bitfld.word 0x2 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x2 14. "SUSPENDM,UTMI SuspendM ControlThis bit controls the SuspendM signal to the PHY designed under the UTMI specification." "0: UTMI suspension mode,1: UTMI normal mode" newline hexmask.word 0x2 0.--13. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." group.word 0x140++0x1 line.word 0x0 "BCCTRL,Battery Charging Control Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." rbitfld.word 0x0 9. "PDDETSTS,PDDET Status" "0: The PDDET pin is at low level.,1: The PDDET pin is at high level." newline rbitfld.word 0x0 8. "CHGDETSTS,CHGDET Status" "0: The CHGDET pin is at low level.,1: The CHGDET pin is at high level." bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 5. "DCPMODE,DCP Mode Control" "0: The RDCP_DAT resistor is disabled,1: The RDCP_DAT resistor is enabled." bitfld.word 0x0 4. "VDMSRCE,VDMSRC Control" "0: The VDM_SRC circuit is disabled. (Initial value),1: The VDM_SRC circuit is enabled." newline bitfld.word 0x0 3. "IDPSINKE,IDPSINK Control" "0: The IDP_SINK circuit is disabled. (Initial value),1: The IDP_SINK circuit is enabled." bitfld.word 0x0 2. "VDPSRCE,VDPSRC Control" "0: The VDP_SRC circuit is disabled. (Initial value),1: The VDP_SRC circuit is enabled." newline bitfld.word 0x0 1. "IDMSINKE,IDMSINK Control" "0: The IDM_SINK circuit is disabled. (Initial value),1: The IDM_SINK circuit is enabled." bitfld.word 0x0 0. "IDPSRCE,IDPSRC Control" "0: The IDP_SRC circuit is disabled. (Initial value),1: The IDP_SRC circuit is enabled." group.word 0x144++0x7 line.word 0x0 "PL1CTRL1,Function L1 Control Register 1" bitfld.word 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.word 0x0 14. "L1EXTMD,PHY Control Mode at L1 Return" "0: SUSPENDM is not set by hardware when Host K is..,1: SUSPENDM is set by hardware when Host K is.." newline bitfld.word 0x0 12.--13. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.word.byte 0x0 8.--11. 1. "HIRDTHR,L1 Response Negotiation Threshold ValueHIRD threshold value used for L1NEGOMD.The format is the same as the HIRD field in HL1CTRL." newline hexmask.word.byte 0x0 4.--7. 1. "DVSQ,DVSQ Extension.DVSQ[3] is Mirror of DVSQ[2:0] in INTSTS0.Indicates the L1 state together with the device state bits DVSQ[2:0]." bitfld.word 0x0 3. "L1NEGOMD,L1 Response Negotiation Control.NOTE: This bit is valid only when the L1RESPMD[1:0] value is 2'b11." "0: When receive HIRD is larger than HIRDTHR[3:0]..,1: When receive HIRD is smaller than HIRDTHR[3:0].." newline bitfld.word 0x0 1.--2. "L1RESPMD,L1 Response Mode" "0: NYET,1: ACK,?,?" bitfld.word 0x0 0. "L1RESPEN,L1 Response Enable" "0: LPM is not supported.,1: LPM is supported." line.word 0x2 "PL1CTRL2,Function L1 Control Register 2" bitfld.word 0x2 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.word 0x2 12. "RWEMON,RWE Value Monitor" "0: The RWE bit value of the LPM token received last..,1: The RWE bit value of the LPM token received last.." newline hexmask.word.byte 0x2 8.--11. 1. "HIRDMON,HIRD Value Monitor" hexmask.word.byte 0x2 0.--7. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." line.word 0x4 "HL1CTRL1,Host L1 Control Register 1" hexmask.word 0x4 3.--15. 1. "Reserved,These bits are read as 0000000000000. The write value should be 0000000000000." bitfld.word 0x4 1.--2. "L1STATUS,L1 Request Completion Status" "0: ACK received,1: NYET received,?,?" newline bitfld.word 0x4 0. "L1REQ,L1 Transition Request" "0: This bit is cleared to 0 by hardware when the..,1: To make a transition to the L1 state." line.word 0x6 "HL1CTRL2,Host L1 Control Register 2" bitfld.word 0x6 15. "BESL,BESL & Alternate HIRDThis bit selects the K-State drive period at the time of L1 Resume." "0,1" bitfld.word 0x6 13.--14. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x6 12. "L1RWE,LPM Token L1 RemoteWake EnableThese bits specify the value to be set in the RWE field of LPM token." "0,1" hexmask.word.byte 0x6 8.--11. 1. "HIRD,LPM Token HIRD" newline hexmask.word.byte 0x6 4.--7. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.word.byte 0x6 0.--3. 1. "L1ADDR,LPM Token DeviceAddressThese bits specify the value to be set in the ADDR field of LPM token." group.word 0x154++0x3 line.word 0x0 "VRCGCTRL1,VRCORE CG Control Register 1" hexmask.word.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 8. "ICCLK_DLYEN,ICCLK delay enable" "0: disabled,1: enabled" newline hexmask.word.byte 0x0 1.--7. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." bitfld.word 0x0 0. "VRCGEN,Clock gating for VRCORE Enable" "0: disabled,1: enabled" line.word 0x2 "VRCGCTRL2,VRCORE CG Control Register 2" hexmask.word.byte 0x2 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." hexmask.word.byte 0x2 0.--7. 1. "VRCG_MSKCNT,Clocking mask count for VRCORE" rgroup.long 0x160++0x3 line.long 0x0 "DPUSR0R,Deep Standby USB Transceiver Control/Pin Monitor Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x0 23. "DVBSTSHM,VBUS InputIndicates VBUS input signal on the HS side of USB port." "0,1" newline bitfld.long 0x0 22. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x0 21. "DOVCBHM,OVRCURB InputIndicates OVRCURB input signal on the HS side of USB port." "0,1" newline bitfld.long 0x0 20. "DOVCAHM,OVRCURA InputIndicates OVRCURA input signal on the HS side of USB port." "0,1" hexmask.long.tbyte 0x0 0.--19. 1. "Reserved,These bits are read as 00000000000000000000." group.long 0x164++0x3 line.long 0x0 "DPUSR1R,Deep Standby USB Suspend/Resume Interrupt Register" hexmask.long.byte 0x0 24.--31. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." rbitfld.long 0x0 23. "DVBSTSH,Indication of Return from VBUS Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" newline bitfld.long 0x0 22. "Reserved,This bit is read as 0. The write value should be 0." "0,1" rbitfld.long 0x0 21. "DOVCBH,Indication of Return from OVRCURB Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" newline rbitfld.long 0x0 20. "DOVCAH,Indication of Return from OVRCURA Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" hexmask.long.byte 0x0 16.--19. 1. "Reserved,These bits are read as 0000. The write value should be 0000." newline hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." bitfld.long 0x0 7. "DVBSTSHE,VBUS Interrupt Enable/Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline bitfld.long 0x0 6. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x0 5. "DOVCBHE,OVRCURB Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline bitfld.long 0x0 4. "DOVCAHE,OVRCURA Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" hexmask.long.byte 0x0 0.--3. 1. "Reserved,These bits are read as 0000. The write value should be 0000." group.word 0x168++0x3 line.word 0x0 "DPUSR2R,Deep Standby USB Suspend/Resume Interrupt Register" hexmask.word.byte 0x0 10.--15. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.word 0x0 9. "DMINTE,DM Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" newline bitfld.word 0x0 8. "DPINTE,DP Interrupt Enable Clear" "0: Disables return from deep software standby mode,1: Enables return from deep software standby mode" bitfld.word 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline rbitfld.word 0x0 5. "DMVAL,DM InputIndicates DM input signal on the HS side of USB port." "0,1" rbitfld.word 0x0 4. "DPVAL,DP InputIndicates DP input signal on the HS side of USB port." "0,1" newline bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" rbitfld.word 0x0 1. "DMINT,Indication of Return from DM Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" newline rbitfld.word 0x0 0. "DPINT,Indication of Return from DP Interrupt Source" "0: Indicates deep software standby mode,1: Indicates return from deep software standby mode" line.word 0x2 "DPUSRCR,Deep Standby USB Suspend/Resume Command Register" hexmask.word 0x2 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.word 0x2 1. "FIXPHYPD,USB Transceiver Control Fix for PLL" "0: Normal mode,1: Go to/Return from deep software standby mode" newline bitfld.word 0x2 0. "FIXPHY,USB Transceiver Control Fix" "0: Normal mode,1: Go to/Return from deep software standby mode" tree.end tree.end tree "WDT (Watchdog Timer)" base ad:0x0 tree "WDT" base ad:0x40202600 group.byte 0x0++0x0 line.byte 0x0 "WDTRR,WDT Refresh Register" hexmask.byte 0x0 0.--7. 1. "WDTRR,WDTRR is an 8-bit register that refreshes the down-counter of the WDT." group.word 0x2++0x3 line.word 0x0 "WDTCR,WDT Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "RPSS,Window Start Position Selection" "0: 25 percent,1: 50 percent,?,?" bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 8.--9. "RPES,Window End Position Selection" "0: 75 percent,1: 50 percent,?,?" hexmask.word.byte 0x0 4.--7. 1. "CKS,Clock Division Ratio Selection" bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 0.--1. "TOPS,Timeout Period Selection" "0: 1 024 cycles (03FFh),1: 4 096 cycles (0FFFh),?,?" line.word 0x2 "WDTSR,WDT Status Register" bitfld.word 0x2 15. "REFEF,Refresh Error Flag" "0: No refresh error occurred,1: Refresh error occurred" bitfld.word 0x2 14. "UNDFF,Underflow Flag" "0: No underflow occurred,1: Underflow occurred" hexmask.word 0x2 0.--13. 1. "CNTVAL,Down-Counter ValueValue counted by the down-counter" group.byte 0x6++0x0 line.byte 0x0 "WDTRCR,WDT Reset Control Register" bitfld.byte 0x0 7. "RSTIRQS,Reset Interrupt Request Selection" "0: Non-maskable interrupt request or interrupt..,1: Reset output is enabled." group.byte 0x8++0x0 line.byte 0x0 "WDTCSTPR,WDT Count Stop Control Register" bitfld.byte 0x0 7. "SLCSTP,Sleep-Mode Count Stop Control" "0: Count stop is disabled.,1: Count is stopped at a transition to sleep mode." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." tree.end tree "WDT_NS" base ad:0x50202600 group.byte 0x0++0x0 line.byte 0x0 "WDTRR,WDT Refresh Register" hexmask.byte 0x0 0.--7. 1. "WDTRR,WDTRR is an 8-bit register that refreshes the down-counter of the WDT." group.word 0x2++0x3 line.word 0x0 "WDTCR,WDT Control Register" bitfld.word 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.word 0x0 12.--13. "RPSS,Window Start Position Selection" "0: 25 percent,1: 50 percent,?,?" bitfld.word 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 8.--9. "RPES,Window End Position Selection" "0: 75 percent,1: 50 percent,?,?" hexmask.word.byte 0x0 4.--7. 1. "CKS,Clock Division Ratio Selection" bitfld.word 0x0 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.word 0x0 0.--1. "TOPS,Timeout Period Selection" "0: 1 024 cycles (03FFh),1: 4 096 cycles (0FFFh),?,?" line.word 0x2 "WDTSR,WDT Status Register" bitfld.word 0x2 15. "REFEF,Refresh Error Flag" "0: No refresh error occurred,1: Refresh error occurred" bitfld.word 0x2 14. "UNDFF,Underflow Flag" "0: No underflow occurred,1: Underflow occurred" hexmask.word 0x2 0.--13. 1. "CNTVAL,Down-Counter ValueValue counted by the down-counter" group.byte 0x6++0x0 line.byte 0x0 "WDTRCR,WDT Reset Control Register" bitfld.byte 0x0 7. "RSTIRQS,Reset Interrupt Request Selection" "0: Non-maskable interrupt request or interrupt..,1: Reset output is enabled." group.byte 0x8++0x0 line.byte 0x0 "WDTCSTPR,WDT Count Stop Control Register" bitfld.byte 0x0 7. "SLCSTP,Sleep-Mode Count Stop Control" "0: Count stop is disabled.,1: Count is stopped at a transition to sleep mode." hexmask.byte 0x0 0.--6. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." tree.end tree.end tree "xSPI (eXpanded SPI)" base ad:0x0 tree "xSPI" base ad:0x40268000 group.long 0x0++0x7 line.long 0x0 "WRAPCFG,xSPI Wrapper Configuration register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "DSSFTCS1,DS shift for slave1" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CKSFTCS1,CK shift for slave1" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DSSFTCS0,DS shift for slave0" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "CKSFTCS0,CK shift for slave0" line.long 0x4 "COMCFG,xSPI Common Configuration register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "OENEGEX,Output Enable Negating extension" "0: No extend 1cycle Output enable,1: Extend 1cycle Output enable" newline bitfld.long 0x4 16. "OEASTEX,Output Enable Asserting extension" "0: No extend 1cycle Output enable,1: Extend 1cycle Output enable" hexmask.long.word 0x4 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x4 4.--5. "ECSINTOUTEN,ECS/INT Output Enable" "0,1,2,3" bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 0.--1. "ARBMD,Channel arbitration mode" "0,1,2,3" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "BMCFGCH$1,xSPI Bridge Map Configuration register ch%s" hexmask.long.byte 0x0 24.--31. 1. "CMBTIM,Combination timer" hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 16. "PREEN,Prefetch enable" "0: Disable prefetch function,1: Enable prefetch function" hexmask.long.byte 0x0 8.--15. 1. "MWRSIZE,Memory Write Size" newline bitfld.long 0x0 7. "MWRCOMB,Memory Write Combination mode" "0: Disable combination mode,1: Enable combination mode" hexmask.long.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 0. "WRMD,AHB Write Response mode" "0: Return response after storing to Internal Write..,1: Return response after issuing write transaction.." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x10)++0x3 line.long 0x0 "CMCFG0CS$1,xSPI Command Map Configuration register 0 cs%s" hexmask.long.byte 0x0 24.--31. 1. "ADDRPCD,Address Replace Code" hexmask.long.byte 0x0 16.--23. 1. "ADDRPEN,Address Replace Enable" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 5. "ARYAMD,Array address mode" "0: Normal address mode,1: Array address mode" newline bitfld.long 0x0 4. "WPBSTMD,Wrapping burst mode" "0: separate xSPI transfer at the wrapping address..,1: not separate xSPI transfer at the wrapping.." bitfld.long 0x0 2.--3. "ADDSIZE,Address size" "0: 1byte (256Byte address space),1: 2byte (64KByte address space),?,?" newline bitfld.long 0x0 0.--1. "FFMT,Frame format" "0: Normal format: Command 1byte Address ADDSIZE..,1: 8D-8D-8D profile 1.0 format: Command 2byte..,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x14)++0x3 line.long 0x0 "CMCFG1CS$1,xSPI Command Map Configuration register 1 cs%s" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "RDLATE,Read latency cycle" newline hexmask.long.word 0x0 0.--15. 1. "RDCMD,Read command" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x18)++0x3 line.long 0x0 "CMCFG2CS$1,xSPI Command Map Configuration register 2 cs%s" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "WRLATE,Write latency cycle" newline hexmask.long.word 0x0 0.--15. 1. "WRCMD,Write command" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x30)++0x3 line.long 0x0 "AIBMCFG$1CH0,xSPI AXI ID Bridge Map Config %s ch0" hexmask.long.word 0x0 16.--31. 1. "MASK,AXI ID to Chx Map Mask" hexmask.long.word 0x0 0.--15. 1. "ID,AXI ID to Chx Map Value" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x40)++0x3 line.long 0x0 "AIBMCFG$1CH1,xSPI AXI ID Bridge Map Config %s ch1" hexmask.long.word 0x0 16.--31. 1. "MASK,AXI ID to Chx Map Mask" hexmask.long.word 0x0 0.--15. 1. "ID,AXI ID to Chx Map Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x50)++0x3 line.long 0x0 "LIOCFGCS$1,xSPI Link I/O Configuration register cs%s" hexmask.long.byte 0x0 28.--31. 1. "DDRSMPEX,DDR sampling window extend" hexmask.long.byte 0x0 24.--27. 1. "SDRSMPSFT,SDR Sampling window shift" newline bitfld.long 0x0 23. "SDRSMPMD,SDR Sampling mode" "0: Samples data input at falling-edge,1: Samples data input at rising-edge" bitfld.long 0x0 22. "SDRDRV,SDR driving timing" "0: Drive at 1/2 cycle before CK rising-edge,1: Drive at CK rising-edge" newline bitfld.long 0x0 21. "CSNEGEX,CS negating extension" "0: No extension,1: Extend 1 cycle" bitfld.long 0x0 20. "CSASTEX,CS asserting extension" "0: No extension,1: Extend 1 cycle" newline hexmask.long.byte 0x0 16.--19. 1. "CSMIN,CS minimum idle term" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "WRMSKMD,Write mask mode" "0: Write mask disable,1: Write mask enable" newline bitfld.long 0x0 10. "LATEMD,Latency mode" "0: Configurable latency,1: Variable latency" hexmask.long.word 0x0 0.--9. 1. "PRTMD,Protocol mode" repeat.end group.long 0x58++0x3 line.long 0x0 "ABMCFG,xSPI AXI Bridge Map Config" hexmask.long.word 0x0 16.--31. 1. "CHSEL,AXI ID to Bridge Channel Select" hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ODRMD,AXI Transfer Ordering Mode" "0,1,2,3" group.long 0x60++0x3 line.long 0x0 "BMCTL0,xSPI Bridge Map Control register 0" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "CH1CS1ACC,System bus ch1 to slave1 memory area access enable" "0,1,2,3" bitfld.long 0x0 4.--5. "CH1CS0ACC,System bus ch1 to slave0 memory area access enable" "0,1,2,3" newline bitfld.long 0x0 2.--3. "CH0CS1ACC,System bus ch0 to slave1 memory area access enable" "0,1,2,3" bitfld.long 0x0 0.--1. "CH0CS0ACC,System bus ch0 to slave0 memory area access enable" "0,1,2,3" wgroup.long 0x64++0x3 line.long 0x0 "BMCTL1,xSPI Bridge Map Control register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 12.--15. 1. "Reserved,The write value should be 0000." newline bitfld.long 0x0 11. "PBUFCLRCH1,Prefetch Buffer clear for ch1" "0,1" bitfld.long 0x0 10. "PBUFCLRCH0,Prefetch Buffer clear for ch0" "0: No command,1: Clear request" newline bitfld.long 0x0 9. "MWRPUSHCH1,Memory Write Data Push for ch1" "0,1" bitfld.long 0x0 8. "MWRPUSHCH0,Memory Write Data Push for ch0" "0: No command,1: Push request" newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x68)++0x3 line.long 0x0 "CMCTLCH$1,xSPI Command Map Control register ch%s" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "XIPEN,XiP mode enable" "0: Disable XiP mode,1: Enable XiP mode" newline hexmask.long.byte 0x0 8.--15. 1. "XIPEXCODE,XiP mode exit code" hexmask.long.byte 0x0 0.--7. 1. "XIPENCODE,XiP mode enter code" repeat.end group.long 0x70++0xB line.long 0x0 "CDCTL0,xSPI Command Manual Control register 0" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 24.--27. 1. "PERREP,Periodic transaction repeat" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "PERITV,Periodic transaction interval" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 4.--5. "TRNUM,Transaction number" "0: Issue 1 command (using command buffer0),1: Issue 2 commands (using command buffer0-1),?,?" newline bitfld.long 0x0 3. "CSSEL,Chip select" "0: CS0,1: CS1" bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "PERMD,Periodic mode" "0: Direct manual-command mode,1: Periodic manual-command mode" bitfld.long 0x0 0. "TRREQ,Transaction request" "0: No transaction,1: Request transaction" line.long 0x4 "CDCTL1,xSPI Command Manual Control register 1" hexmask.long 0x4 0.--31. 1. "PEREXP,Periodic transaction expected value" line.long 0x8 "CDCTL2,xSPI Command Manual Control register 2" hexmask.long 0x8 0.--31. 1. "PERMSK,Periodic transaction masked value" repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x80)++0x3 line.long 0x0 "CDTBUF$1,xSPI Command Manual Type buf%s" hexmask.long.word 0x0 16.--31. 1. "CMD,Command (1-2byte)" bitfld.long 0x0 15. "TRTYPE,Transaction Type" "0: Read transaction (Readout from memory device),1: Not read transaction" newline bitfld.long 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--13. 1. "LATE,Latency cycle" newline hexmask.long.byte 0x0 5.--8. 1. "DATASIZE,Write/Read Data Size" bitfld.long 0x0 2.--4. "ADDSIZE,Address size" "0: Reserved,?,?,?,?,?,?,?" newline bitfld.long 0x0 0.--1. "CMDSIZE,Command Size" "0: 0byte (No command phase),?,?,?" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x84)++0x3 line.long 0x0 "CDABUF$1,xSPI Command Manual Address buf%s" hexmask.long 0x0 0.--31. 1. "ADD,Address" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x88)++0x3 line.long 0x0 "CDD0BUF$1,xSPI Command Manual Data 0 buf%s" hexmask.long 0x0 0.--31. 1. "DATA,Write/Read Data" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x8C)++0x3 line.long 0x0 "CDD1BUF$1,xSPI Command Manual Data 1 buf%s" hexmask.long 0x0 0.--31. 1. "DATA,Write/Read Data" repeat.end group.long 0x100++0xB line.long 0x0 "LPCTL0,xSPI Link Pattern Control register 0" bitfld.long 0x0 31. "XD2VAL,XiP Disable pattern 2nd phase value" "0: Low drive,1: High drive" bitfld.long 0x0 29.--30. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "XD2LEN,XiP Disable pattern 2nd phase length" bitfld.long 0x0 23. "XD1VAL,XiP Disable pattern 1st phase value" "0: Low drive,1: High drive" newline bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--20. 1. "XD1LEN,XiP Disable pattern 1st phase length" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 4.--5. "XDPIN,XiP Disable pattern pin" "0: 1pin,1: 2pin,?,?" newline bitfld.long 0x0 3. "CSSEL,Chip select" "0: slave0 (CS0),1: slave1 (CS1)" bitfld.long 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 0. "PATREQ,Pattern request" "0: No request XiP Disable pattern,1: Request XiP Disable pattern" line.long 0x4 "LPCTL1,xSPI Link Pattern Control register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 12.--14. "RSTSU,Reset pattern data output setup time" "0: 1 cycle,?,?,?,?,?,?,?" bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 8.--10. "RSTWID,Reset pattern width" "0: 2(=2^1) cycles,1: 4(=2^2) cycles,?,?,?,?,?,?" bitfld.long 0x4 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 4.--5. "RSTREP,Reset pattern repeat" "0: 4 times (Specified on Reset Signaling Protocol),1: 5 times,?,?" bitfld.long 0x4 3. "CSSEL,Chip select" "0: slave0 (CS0),1: slave1 (CS1)" newline bitfld.long 0x4 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 0.--1. "PATREQ,Pattern request" "0: No request,1: Request Reset pattern,?,?" line.long 0x8 "LIOCTL,xSPI Link I/O Control register" hexmask.long.word 0x8 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x8 17. "RSTCS1,Reset drive for slave1" "0,1" newline bitfld.long 0x8 16. "RSTCS0,Reset drive for slave0" "0: Drive Low level,1: Drive High level" hexmask.long.word 0x8 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x8 1. "WPCS1,WP drive for slave1" "0,1" bitfld.long 0x8 0. "WPCS0,WP drive for slave0" "0: Drive Low level,1: Drive High level" repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x130)++0x3 line.long 0x0 "CCCTL0CS$1,xSPI Command Calibration Control register 0 cs%s" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "CASFTEND,Calibration DS shift end value" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CASFTSTA,Calibration DS shift start value" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "CAITV,Calibration interval" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "CANOWR,Calibration no write mode" "0: Calibration sequence with write command,1: Calibration sequence without write command" newline bitfld.long 0x0 0. "CAEN,Automatic Calibration Enable" "0: Disable automatic calibration,1: Enable automatic calibration" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x134)++0x3 line.long 0x0 "CCCTL1CS$1,xSPI Command Calibration Control register 1 cs%s" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "CARDLATE,Read Latency cycle" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CAWRLATE,Write Latency cycle" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.byte 0x0 5.--8. 1. "CADATASIZE,Write/Read Data Size" newline bitfld.long 0x0 2.--4. "CAADDSIZE,Address size" "0: 0byte (No address phase),?,?,?,?,?,?,?" bitfld.long 0x0 0.--1. "CACMDSIZE,Command Size" "0: 0byte (No command phase),?,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x138)++0x3 line.long 0x0 "CCCTL2CS$1,xSPI Command Calibration Control register 2 cs%s" hexmask.long.word 0x0 16.--31. 1. "CARDCMD,Calibration pattern read command" hexmask.long.word 0x0 0.--15. 1. "CAWRCMD,Calibration pattern write command" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x13C)++0x3 line.long 0x0 "CCCTL3CS$1,xSPI Command Calibration Control register 3 cs%s" hexmask.long 0x0 0.--31. 1. "CAADD,Calibration pattern address" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x140)++0x3 line.long 0x0 "CCCTL4CS$1,xSPI Command Calibration Control register 4 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x144)++0x3 line.long 0x0 "CCCTL5CS$1,xSPI Command Calibration Control register 5 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x148)++0x3 line.long 0x0 "CCCTL6CS$1,xSPI Command Calibration Control register 6 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x14C)++0x3 line.long 0x0 "CCCTL7CS$1,xSPI Command Calibration Control register 7 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end rgroup.long 0x180++0x7 line.long 0x0 "VERSTT,xSPI Version register" hexmask.long 0x0 0.--31. 1. "VER,Version" line.long 0x4 "COMSTT,xSPI Common Status register" hexmask.long.word 0x4 23.--31. 1. "Reserved,These bits are read as 000000000." bitfld.long 0x4 22. "RSTOCS1,RSTO monitor for slave1" "0,1" newline bitfld.long 0x4 21. "INTCS1,INT monitor for slave1" "0,1" bitfld.long 0x4 20. "ECSCS1,ECS monitor for slave1" "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x4 18. "RSTOCS0,RSTO monitor for slave0" "0: Low level,1: High level" newline bitfld.long 0x4 17. "INTCS0,INT monitor for slave0" "0: Low level,1: High level" bitfld.long 0x4 16. "ECSCS0,ECS monitor for slave0" "0: Low level,1: High level" newline hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x4 7. "WRBUFNECH1,Write Buffer Not Empty for ch1" "0,1" newline bitfld.long 0x4 6. "WRBUFNECH0,Write Buffer Not Empty for ch0" "0: Empty,1: Not empty" bitfld.long 0x4 5. "PBUFNECH1,Prefetch Buffer Not Empty for ch1" "0,1" newline bitfld.long 0x4 4. "PBUFNECH0,Prefetch Buffer Not Empty for ch0" "0: Empty,1: Not empty" bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x4 1. "MEMACCCH1,Memory access ongoing from ch1" "0,1" bitfld.long 0x4 0. "MEMACCCH0,Memory access ongoing from ch0" "0: AHB ch0 is not accessing to memory.,1: AHB ch0 is accessing to memory." repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x188)++0x3 line.long 0x0 "CASTTCS$1,xSPI Calibration Status register cs%s" hexmask.long 0x0 0.--31. 1. "CASUC,Calibration Success" repeat.end rgroup.long 0x190++0x3 line.long 0x0 "INTS,xSPI Interrupt Status register" bitfld.long 0x0 31. "CASUCCS1,Calibration success for slave1" "0,1" bitfld.long 0x0 30. "CASUCCS0,Calibration success for slave0" "0: No detection,1: Detection" newline bitfld.long 0x0 29. "CAFAILCS1,Calibration failed for slave1" "0,1" bitfld.long 0x0 28. "CAFAILCS0,Calibration failed for slave0" "0: No detection,1: Detection" newline hexmask.long.byte 0x0 22.--27. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 21. "BUSERRCH1,AHB bus error for CH1" "0,1" newline bitfld.long 0x0 20. "BUSERRCH0,AHB bus error for CH0" "0,1" bitfld.long 0x0 19. "BRGUFCH1,Bridge Buffer underflow for CH1" "0,1" newline bitfld.long 0x0 18. "BRGUFCH0,Bridge Buffer underflow for CH0" "0: No detection,1: Detection" bitfld.long 0x0 17. "BRGOFCH1,Bridge Buffer overflow for CH1" "0,1" newline bitfld.long 0x0 16. "BRGOFCH0,Bridge Buffer overflow for CH0" "0: No detection,1: Detection" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 13. "INTCS1,Interrupt detection for slave1" "0,1" bitfld.long 0x0 12. "INTCS0,Interrupt detection for slave0" "0: No detection,1: Detection" newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 9. "ECSCS1,ECC error detection for slave1" "0,1" newline bitfld.long 0x0 8. "ECSCS0,ECC error detection for slave0" "0: No detection,1: Detection" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 5. "DSTOCS1,DS timeout for slave1" "0,1" bitfld.long 0x0 4. "DSTOCS0,DS timeout for slave0" "0: No detection,1: Detection" newline bitfld.long 0x0 3. "PERTO,Periodic transaction timeout" "0: No detection,1: Detection" bitfld.long 0x0 2. "INICMP,Initial Sequence Completed" "0: No detection,1: Detection" newline bitfld.long 0x0 1. "PATCMP,Pattern Completed" "0: No detection,1: Detection" bitfld.long 0x0 0. "CMDCMP,Command Completed" "0: No detection,1: Detection" wgroup.long 0x194++0x3 line.long 0x0 "INTC,xSPI Interrupt Clear register" bitfld.long 0x0 31. "CASUCCS1C,Calibration success for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 30. "CASUCCS0C,Calibration success for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 29. "CAFAILCS1C,Calibration failed for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 28. "CAFAILCS0C,Calibration failed for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline hexmask.long.byte 0x0 22.--27. 1. "Reserved,The write value should be 000000." bitfld.long 0x0 21. "BUSERRCH1C,AHB bus error for CH1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 20. "BUSERRCH0C,AHB bus error for CH0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 19. "BRGUFCH1C,Bridge Buffer underflow for CH1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 18. "BRGUFCH0C,Bridge Buffer underflow for CH0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 17. "BRGOFCH1C,Bridge Buffer overflow for CH1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 16. "BRGOFCH0C,Bridge Buffer overflow for CH0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 14.--15. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "INTCS1C,Interrupt detection for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 12. "INTCS0C,Interrupt detection for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 10.--11. "Reserved,The write value should be 00." "0,1,2,3" bitfld.long 0x0 9. "ECSCS1C,ECC error detection for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 8. "ECSCS0C,ECC error detection for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "DSTOCS1C,DS timeout for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 4. "DSTOCS0C,DS timeout for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 3. "PERTOC,Periodic transaction timeout interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 2. "INICMPC,Initial Sequence Completed interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 1. "PATCMPC,Pattern Completed interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 0. "CMDCMPC,Command Completed interrupt clear" "0: No change interrupt status,1: Clear interrupt status" group.long 0x198++0x3 line.long 0x0 "INTE,xSPI Interrupt Enable register" bitfld.long 0x0 31. "CASUCCS1E,Calibration success for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 30. "CASUCCS0E,Calibration success for slave0 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 29. "CAFAILCS1E,Calibration failed for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 28. "CAFAILCS0E,Calibration failed for slave0 interrupt enable" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 22.--27. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 21. "BUSERRCH1E,AHB bus error for CH1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "BUSERRCH0E,AHB bus error for CH0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 19. "BRGUFCH1E,Bridge Buffer underflow for CH1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "BRGUFCH0E,Bridge Buffer underflow for CH0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 17. "BRGOFCH1E,Bridge Buffer overflow for CH1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "BRGOFCH0E,Bridge Buffer overflow for CH0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "INTCS1E,Interrupt detection for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 12. "INTCS0E,Interrupt detection for slave0 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 9. "ECSCS1E,ECC error detection for slave1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "ECSCS0E,ECC error detection for slave0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "DSTOCS1E,DS timeout for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 4. "DSTOCS0E,DS timeout for slave0 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "PERTOE,Periodic transaction timeout interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 2. "INICMPE,Initial Sequence Completed interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "PATCMPE,Pattern Completed interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "CMDCMPE,Command Completed interrupt enable" "0: Disabled,1: Enabled" tree.end tree "xSPI_NS" base ad:0x50268000 group.long 0x0++0x7 line.long 0x0 "WRAPCFG,xSPI Wrapper Configuration register" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "DSSFTCS1,DS shift for slave1" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CKSFTCS1,CK shift for slave1" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "DSSFTCS0,DS shift for slave0" newline bitfld.long 0x0 5.--7. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--4. 1. "CKSFTCS0,CK shift for slave0" line.long 0x4 "COMCFG,xSPI Common Configuration register" hexmask.long.word 0x4 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x4 17. "OENEGEX,Output Enable Negating extension" "0: No extend 1cycle Output enable,1: Extend 1cycle Output enable" newline bitfld.long 0x4 16. "OEASTEX,Output Enable Asserting extension" "0: No extend 1cycle Output enable,1: Extend 1cycle Output enable" hexmask.long.word 0x4 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." newline bitfld.long 0x4 4.--5. "ECSINTOUTEN,ECS/INT Output Enable" "0,1,2,3" bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 0.--1. "ARBMD,Channel arbitration mode" "0,1,2,3" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "BMCFGCH$1,xSPI Bridge Map Configuration register ch%s" hexmask.long.byte 0x0 24.--31. 1. "CMBTIM,Combination timer" hexmask.long.byte 0x0 17.--23. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." newline bitfld.long 0x0 16. "PREEN,Prefetch enable" "0: Disable prefetch function,1: Enable prefetch function" hexmask.long.byte 0x0 8.--15. 1. "MWRSIZE,Memory Write Size" newline bitfld.long 0x0 7. "MWRCOMB,Memory Write Combination mode" "0: Disable combination mode,1: Enable combination mode" hexmask.long.byte 0x0 1.--6. 1. "Reserved,These bits are read as 000000. The write value should be 000000." newline bitfld.long 0x0 0. "WRMD,AHB Write Response mode" "0: Return response after storing to Internal Write..,1: Return response after issuing write transaction.." repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x10)++0x3 line.long 0x0 "CMCFG0CS$1,xSPI Command Map Configuration register 0 cs%s" hexmask.long.byte 0x0 24.--31. 1. "ADDRPCD,Address Replace Code" hexmask.long.byte 0x0 16.--23. 1. "ADDRPEN,Address Replace Enable" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 5. "ARYAMD,Array address mode" "0: Normal address mode,1: Array address mode" newline bitfld.long 0x0 4. "WPBSTMD,Wrapping burst mode" "0: separate xSPI transfer at the wrapping address..,1: not separate xSPI transfer at the wrapping.." bitfld.long 0x0 2.--3. "ADDSIZE,Address size" "0: 1byte (256Byte address space),1: 2byte (64KByte address space),?,?" newline bitfld.long 0x0 0.--1. "FFMT,Frame format" "0: Normal format: Command 1byte Address ADDSIZE..,1: 8D-8D-8D profile 1.0 format: Command 2byte..,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x14)++0x3 line.long 0x0 "CMCFG1CS$1,xSPI Command Map Configuration register 1 cs%s" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "RDLATE,Read latency cycle" newline hexmask.long.word 0x0 0.--15. 1. "RDCMD,Read command" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x18)++0x3 line.long 0x0 "CMCFG2CS$1,xSPI Command Map Configuration register 2 cs%s" hexmask.long.word 0x0 21.--31. 1. "Reserved,These bits are read as 00000000000. The write value should be 00000000000." hexmask.long.byte 0x0 16.--20. 1. "WRLATE,Write latency cycle" newline hexmask.long.word 0x0 0.--15. 1. "WRCMD,Write command" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x30)++0x3 line.long 0x0 "AIBMCFG$1CH0,xSPI AXI ID Bridge Map Config %s ch0" hexmask.long.word 0x0 16.--31. 1. "MASK,AXI ID to Chx Map Mask" hexmask.long.word 0x0 0.--15. 1. "ID,AXI ID to Chx Map Value" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x40)++0x3 line.long 0x0 "AIBMCFG$1CH1,xSPI AXI ID Bridge Map Config %s ch1" hexmask.long.word 0x0 16.--31. 1. "MASK,AXI ID to Chx Map Mask" hexmask.long.word 0x0 0.--15. 1. "ID,AXI ID to Chx Map Value" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x50)++0x3 line.long 0x0 "LIOCFGCS$1,xSPI Link I/O Configuration register cs%s" hexmask.long.byte 0x0 28.--31. 1. "DDRSMPEX,DDR sampling window extend" hexmask.long.byte 0x0 24.--27. 1. "SDRSMPSFT,SDR Sampling window shift" newline bitfld.long 0x0 23. "SDRSMPMD,SDR Sampling mode" "0: Samples data input at falling-edge,1: Samples data input at rising-edge" bitfld.long 0x0 22. "SDRDRV,SDR driving timing" "0: Drive at 1/2 cycle before CK rising-edge,1: Drive at CK rising-edge" newline bitfld.long 0x0 21. "CSNEGEX,CS negating extension" "0: No extension,1: Extend 1 cycle" bitfld.long 0x0 20. "CSASTEX,CS asserting extension" "0: No extension,1: Extend 1 cycle" newline hexmask.long.byte 0x0 16.--19. 1. "CSMIN,CS minimum idle term" bitfld.long 0x0 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 12.--14. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "WRMSKMD,Write mask mode" "0: Write mask disable,1: Write mask enable" newline bitfld.long 0x0 10. "LATEMD,Latency mode" "0: Configurable latency,1: Variable latency" hexmask.long.word 0x0 0.--9. 1. "PRTMD,Protocol mode" repeat.end group.long 0x58++0x3 line.long 0x0 "ABMCFG,xSPI AXI Bridge Map Config" hexmask.long.word 0x0 16.--31. 1. "CHSEL,AXI ID to Bridge Channel Select" hexmask.long.word 0x0 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x0 0.--1. "ODRMD,AXI Transfer Ordering Mode" "0,1,2,3" group.long 0x60++0x3 line.long 0x0 "BMCTL0,xSPI Bridge Map Control register 0" hexmask.long.word 0x0 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." hexmask.long.byte 0x0 8.--15. 1. "Reserved,These bits are read as 00000000. The write value should be 00000000." newline bitfld.long 0x0 6.--7. "CH1CS1ACC,System bus ch1 to slave1 memory area access enable" "0,1,2,3" bitfld.long 0x0 4.--5. "CH1CS0ACC,System bus ch1 to slave0 memory area access enable" "0,1,2,3" newline bitfld.long 0x0 2.--3. "CH0CS1ACC,System bus ch0 to slave1 memory area access enable" "0,1,2,3" bitfld.long 0x0 0.--1. "CH0CS0ACC,System bus ch0 to slave0 memory area access enable" "0,1,2,3" wgroup.long 0x64++0x3 line.long 0x0 "BMCTL1,xSPI Bridge Map Control register 1" hexmask.long.word 0x0 16.--31. 1. "Reserved,The write value should be 0000000000000000." hexmask.long.byte 0x0 12.--15. 1. "Reserved,The write value should be 0000." newline bitfld.long 0x0 11. "PBUFCLRCH1,Prefetch Buffer clear for ch1" "0,1" bitfld.long 0x0 10. "PBUFCLRCH0,Prefetch Buffer clear for ch0" "0: No command,1: Clear request" newline bitfld.long 0x0 9. "MWRPUSHCH1,Memory Write Data Push for ch1" "0,1" bitfld.long 0x0 8. "MWRPUSHCH0,Memory Write Data Push for ch0" "0: No command,1: Push request" newline hexmask.long.byte 0x0 0.--7. 1. "Reserved,The write value should be 00000000." repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x68)++0x3 line.long 0x0 "CMCTLCH$1,xSPI Command Map Control register ch%s" hexmask.long.word 0x0 17.--31. 1. "Reserved,These bits are read as 000000000000000. The write value should be 000000000000000." bitfld.long 0x0 16. "XIPEN,XiP mode enable" "0: Disable XiP mode,1: Enable XiP mode" newline hexmask.long.byte 0x0 8.--15. 1. "XIPEXCODE,XiP mode exit code" hexmask.long.byte 0x0 0.--7. 1. "XIPENCODE,XiP mode enter code" repeat.end group.long 0x70++0xB line.long 0x0 "CDCTL0,xSPI Command Manual Control register 0" hexmask.long.byte 0x0 28.--31. 1. "Reserved,These bits are read as 0000. The write value should be 0000." hexmask.long.byte 0x0 24.--27. 1. "PERREP,Periodic transaction repeat" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "PERITV,Periodic transaction interval" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 4.--5. "TRNUM,Transaction number" "0: Issue 1 command (using command buffer0),1: Issue 2 commands (using command buffer0-1),?,?" newline bitfld.long 0x0 3. "CSSEL,Chip select" "0: CS0,1: CS1" bitfld.long 0x0 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x0 1. "PERMD,Periodic mode" "0: Direct manual-command mode,1: Periodic manual-command mode" bitfld.long 0x0 0. "TRREQ,Transaction request" "0: No transaction,1: Request transaction" line.long 0x4 "CDCTL1,xSPI Command Manual Control register 1" hexmask.long 0x4 0.--31. 1. "PEREXP,Periodic transaction expected value" line.long 0x8 "CDCTL2,xSPI Command Manual Control register 2" hexmask.long 0x8 0.--31. 1. "PERMSK,Periodic transaction masked value" repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x80)++0x3 line.long 0x0 "CDTBUF$1,xSPI Command Manual Type buf%s" hexmask.long.word 0x0 16.--31. 1. "CMD,Command (1-2byte)" bitfld.long 0x0 15. "TRTYPE,Transaction Type" "0: Read transaction (Readout from memory device),1: Not read transaction" newline bitfld.long 0x0 14. "Reserved,This bit is read as 0. The write value should be 0." "0,1" hexmask.long.byte 0x0 9.--13. 1. "LATE,Latency cycle" newline hexmask.long.byte 0x0 5.--8. 1. "DATASIZE,Write/Read Data Size" bitfld.long 0x0 2.--4. "ADDSIZE,Address size" "0: Reserved,?,?,?,?,?,?,?" newline bitfld.long 0x0 0.--1. "CMDSIZE,Command Size" "0: 0byte (No command phase),?,?,?" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x84)++0x3 line.long 0x0 "CDABUF$1,xSPI Command Manual Address buf%s" hexmask.long 0x0 0.--31. 1. "ADD,Address" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x88)++0x3 line.long 0x0 "CDD0BUF$1,xSPI Command Manual Data 0 buf%s" hexmask.long 0x0 0.--31. 1. "DATA,Write/Read Data" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x10) group.long ($2+0x8C)++0x3 line.long 0x0 "CDD1BUF$1,xSPI Command Manual Data 1 buf%s" hexmask.long 0x0 0.--31. 1. "DATA,Write/Read Data" repeat.end group.long 0x100++0xB line.long 0x0 "LPCTL0,xSPI Link Pattern Control register 0" bitfld.long 0x0 31. "XD2VAL,XiP Disable pattern 2nd phase value" "0: Low drive,1: High drive" bitfld.long 0x0 29.--30. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline hexmask.long.byte 0x0 24.--28. 1. "XD2LEN,XiP Disable pattern 2nd phase length" bitfld.long 0x0 23. "XD1VAL,XiP Disable pattern 1st phase value" "0: Low drive,1: High drive" newline bitfld.long 0x0 21.--22. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" hexmask.long.byte 0x0 16.--20. 1. "XD1LEN,XiP Disable pattern 1st phase length" newline hexmask.long.word 0x0 6.--15. 1. "Reserved,These bits are read as 0000000000. The write value should be 0000000000." bitfld.long 0x0 4.--5. "XDPIN,XiP Disable pattern pin" "0: 1pin,1: 2pin,?,?" newline bitfld.long 0x0 3. "CSSEL,Chip select" "0: slave0 (CS0),1: slave1 (CS1)" bitfld.long 0x0 1.--2. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 0. "PATREQ,Pattern request" "0: No request XiP Disable pattern,1: Request XiP Disable pattern" line.long 0x4 "LPCTL1,xSPI Link Pattern Control register 1" hexmask.long.word 0x4 16.--31. 1. "Reserved,These bits are read as 0000000000000000. The write value should be 0000000000000000." bitfld.long 0x4 15. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 12.--14. "RSTSU,Reset pattern data output setup time" "0: 1 cycle,?,?,?,?,?,?,?" bitfld.long 0x4 11. "Reserved,This bit is read as 0. The write value should be 0." "0,1" newline bitfld.long 0x4 8.--10. "RSTWID,Reset pattern width" "0: 2(=2^1) cycles,1: 4(=2^2) cycles,?,?,?,?,?,?" bitfld.long 0x4 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x4 4.--5. "RSTREP,Reset pattern repeat" "0: 4 times (Specified on Reset Signaling Protocol),1: 5 times,?,?" bitfld.long 0x4 3. "CSSEL,Chip select" "0: slave0 (CS0),1: slave1 (CS1)" newline bitfld.long 0x4 2. "Reserved,This bit is read as 0. The write value should be 0." "0,1" bitfld.long 0x4 0.--1. "PATREQ,Pattern request" "0: No request,1: Request Reset pattern,?,?" line.long 0x8 "LIOCTL,xSPI Link I/O Control register" hexmask.long.word 0x8 18.--31. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." bitfld.long 0x8 17. "RSTCS1,Reset drive for slave1" "0,1" newline bitfld.long 0x8 16. "RSTCS0,Reset drive for slave0" "0: Drive Low level,1: Drive High level" hexmask.long.word 0x8 2.--15. 1. "Reserved,These bits are read as 00000000000000. The write value should be 00000000000000." newline bitfld.long 0x8 1. "WPCS1,WP drive for slave1" "0,1" bitfld.long 0x8 0. "WPCS0,WP drive for slave0" "0: Drive Low level,1: Drive High level" repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x130)++0x3 line.long 0x0 "CCCTL0CS$1,xSPI Command Calibration Control register 0 cs%s" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "CASFTEND,Calibration DS shift end value" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CASFTSTA,Calibration DS shift start value" newline bitfld.long 0x0 13.--15. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--12. 1. "CAITV,Calibration interval" newline hexmask.long.byte 0x0 2.--7. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 1. "CANOWR,Calibration no write mode" "0: Calibration sequence with write command,1: Calibration sequence without write command" newline bitfld.long 0x0 0. "CAEN,Automatic Calibration Enable" "0: Disable automatic calibration,1: Enable automatic calibration" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x134)++0x3 line.long 0x0 "CCCTL1CS$1,xSPI Command Calibration Control register 1 cs%s" bitfld.long 0x0 29.--31. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 24.--28. 1. "CARDLATE,Read Latency cycle" newline bitfld.long 0x0 21.--23. "Reserved,These bits are read as 000. The write value should be 000." "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 16.--20. 1. "CAWRLATE,Write Latency cycle" newline hexmask.long.byte 0x0 9.--15. 1. "Reserved,These bits are read as 0000000. The write value should be 0000000." hexmask.long.byte 0x0 5.--8. 1. "CADATASIZE,Write/Read Data Size" newline bitfld.long 0x0 2.--4. "CAADDSIZE,Address size" "0: 0byte (No address phase),?,?,?,?,?,?,?" bitfld.long 0x0 0.--1. "CACMDSIZE,Command Size" "0: 0byte (No command phase),?,?,?" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x138)++0x3 line.long 0x0 "CCCTL2CS$1,xSPI Command Calibration Control register 2 cs%s" hexmask.long.word 0x0 16.--31. 1. "CARDCMD,Calibration pattern read command" hexmask.long.word 0x0 0.--15. 1. "CAWRCMD,Calibration pattern write command" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x13C)++0x3 line.long 0x0 "CCCTL3CS$1,xSPI Command Calibration Control register 3 cs%s" hexmask.long 0x0 0.--31. 1. "CAADD,Calibration pattern address" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x140)++0x3 line.long 0x0 "CCCTL4CS$1,xSPI Command Calibration Control register 4 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x144)++0x3 line.long 0x0 "CCCTL5CS$1,xSPI Command Calibration Control register 5 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x148)++0x3 line.long 0x0 "CCCTL6CS$1,xSPI Command Calibration Control register 6 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x20) group.long ($2+0x14C)++0x3 line.long 0x0 "CCCTL7CS$1,xSPI Command Calibration Control register 7 cs%s" hexmask.long 0x0 0.--31. 1. "CADATA,Calibration pattern data" repeat.end rgroup.long 0x180++0x7 line.long 0x0 "VERSTT,xSPI Version register" hexmask.long 0x0 0.--31. 1. "VER,Version" line.long 0x4 "COMSTT,xSPI Common Status register" hexmask.long.word 0x4 23.--31. 1. "Reserved,These bits are read as 000000000." bitfld.long 0x4 22. "RSTOCS1,RSTO monitor for slave1" "0,1" newline bitfld.long 0x4 21. "INTCS1,INT monitor for slave1" "0,1" bitfld.long 0x4 20. "ECSCS1,ECS monitor for slave1" "0,1" newline bitfld.long 0x4 19. "Reserved,This bit is read as 0." "0,1" bitfld.long 0x4 18. "RSTOCS0,RSTO monitor for slave0" "0: Low level,1: High level" newline bitfld.long 0x4 17. "INTCS0,INT monitor for slave0" "0: Low level,1: High level" bitfld.long 0x4 16. "ECSCS0,ECS monitor for slave0" "0: Low level,1: High level" newline hexmask.long.byte 0x4 8.--15. 1. "Reserved,These bits are read as 00000000." bitfld.long 0x4 7. "WRBUFNECH1,Write Buffer Not Empty for ch1" "0,1" newline bitfld.long 0x4 6. "WRBUFNECH0,Write Buffer Not Empty for ch0" "0: Empty,1: Not empty" bitfld.long 0x4 5. "PBUFNECH1,Prefetch Buffer Not Empty for ch1" "0,1" newline bitfld.long 0x4 4. "PBUFNECH0,Prefetch Buffer Not Empty for ch0" "0: Empty,1: Not empty" bitfld.long 0x4 2.--3. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x4 1. "MEMACCCH1,Memory access ongoing from ch1" "0,1" bitfld.long 0x4 0. "MEMACCCH0,Memory access ongoing from ch0" "0: AHB ch0 is not accessing to memory.,1: AHB ch0 is accessing to memory." repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x188)++0x3 line.long 0x0 "CASTTCS$1,xSPI Calibration Status register cs%s" hexmask.long 0x0 0.--31. 1. "CASUC,Calibration Success" repeat.end rgroup.long 0x190++0x3 line.long 0x0 "INTS,xSPI Interrupt Status register" bitfld.long 0x0 31. "CASUCCS1,Calibration success for slave1" "0,1" bitfld.long 0x0 30. "CASUCCS0,Calibration success for slave0" "0: No detection,1: Detection" newline bitfld.long 0x0 29. "CAFAILCS1,Calibration failed for slave1" "0,1" bitfld.long 0x0 28. "CAFAILCS0,Calibration failed for slave0" "0: No detection,1: Detection" newline hexmask.long.byte 0x0 22.--27. 1. "Reserved,These bits are read as 000000." bitfld.long 0x0 21. "BUSERRCH1,AHB bus error for CH1" "0,1" newline bitfld.long 0x0 20. "BUSERRCH0,AHB bus error for CH0" "0,1" bitfld.long 0x0 19. "BRGUFCH1,Bridge Buffer underflow for CH1" "0,1" newline bitfld.long 0x0 18. "BRGUFCH0,Bridge Buffer underflow for CH0" "0: No detection,1: Detection" bitfld.long 0x0 17. "BRGOFCH1,Bridge Buffer overflow for CH1" "0,1" newline bitfld.long 0x0 16. "BRGOFCH0,Bridge Buffer overflow for CH0" "0: No detection,1: Detection" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 13. "INTCS1,Interrupt detection for slave1" "0,1" bitfld.long 0x0 12. "INTCS0,Interrupt detection for slave0" "0: No detection,1: Detection" newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00." "0,1,2,3" bitfld.long 0x0 9. "ECSCS1,ECC error detection for slave1" "0,1" newline bitfld.long 0x0 8. "ECSCS0,ECC error detection for slave0" "0: No detection,1: Detection" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00." "0,1,2,3" newline bitfld.long 0x0 5. "DSTOCS1,DS timeout for slave1" "0,1" bitfld.long 0x0 4. "DSTOCS0,DS timeout for slave0" "0: No detection,1: Detection" newline bitfld.long 0x0 3. "PERTO,Periodic transaction timeout" "0: No detection,1: Detection" bitfld.long 0x0 2. "INICMP,Initial Sequence Completed" "0: No detection,1: Detection" newline bitfld.long 0x0 1. "PATCMP,Pattern Completed" "0: No detection,1: Detection" bitfld.long 0x0 0. "CMDCMP,Command Completed" "0: No detection,1: Detection" wgroup.long 0x194++0x3 line.long 0x0 "INTC,xSPI Interrupt Clear register" bitfld.long 0x0 31. "CASUCCS1C,Calibration success for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 30. "CASUCCS0C,Calibration success for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 29. "CAFAILCS1C,Calibration failed for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 28. "CAFAILCS0C,Calibration failed for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline hexmask.long.byte 0x0 22.--27. 1. "Reserved,The write value should be 000000." bitfld.long 0x0 21. "BUSERRCH1C,AHB bus error for CH1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 20. "BUSERRCH0C,AHB bus error for CH0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 19. "BRGUFCH1C,Bridge Buffer underflow for CH1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 18. "BRGUFCH0C,Bridge Buffer underflow for CH0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 17. "BRGOFCH1C,Bridge Buffer overflow for CH1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 16. "BRGOFCH0C,Bridge Buffer overflow for CH0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 14.--15. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "INTCS1C,Interrupt detection for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 12. "INTCS0C,Interrupt detection for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 10.--11. "Reserved,The write value should be 00." "0,1,2,3" bitfld.long 0x0 9. "ECSCS1C,ECC error detection for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 8. "ECSCS0C,ECC error detection for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 6.--7. "Reserved,The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "DSTOCS1C,DS timeout for slave1 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 4. "DSTOCS0C,DS timeout for slave0 interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 3. "PERTOC,Periodic transaction timeout interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 2. "INICMPC,Initial Sequence Completed interrupt clear" "0: No change interrupt status,1: Clear interrupt status" newline bitfld.long 0x0 1. "PATCMPC,Pattern Completed interrupt clear" "0: No change interrupt status,1: Clear interrupt status" bitfld.long 0x0 0. "CMDCMPC,Command Completed interrupt clear" "0: No change interrupt status,1: Clear interrupt status" group.long 0x198++0x3 line.long 0x0 "INTE,xSPI Interrupt Enable register" bitfld.long 0x0 31. "CASUCCS1E,Calibration success for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 30. "CASUCCS0E,Calibration success for slave0 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 29. "CAFAILCS1E,Calibration failed for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 28. "CAFAILCS0E,Calibration failed for slave0 interrupt enable" "0: Disabled,1: Enabled" newline hexmask.long.byte 0x0 22.--27. 1. "Reserved,These bits are read as 000000. The write value should be 000000." bitfld.long 0x0 21. "BUSERRCH1E,AHB bus error for CH1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 20. "BUSERRCH0E,AHB bus error for CH0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 19. "BRGUFCH1E,Bridge Buffer underflow for CH1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 18. "BRGUFCH0E,Bridge Buffer underflow for CH0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 17. "BRGOFCH1E,Bridge Buffer overflow for CH1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 16. "BRGOFCH0E,Bridge Buffer overflow for CH0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 14.--15. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 13. "INTCS1E,Interrupt detection for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 12. "INTCS0E,Interrupt detection for slave0 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 10.--11. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" bitfld.long 0x0 9. "ECSCS1E,ECC error detection for slave1 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 8. "ECSCS0E,ECC error detection for slave0 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 6.--7. "Reserved,These bits are read as 00. The write value should be 00." "0,1,2,3" newline bitfld.long 0x0 5. "DSTOCS1E,DS timeout for slave1 interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 4. "DSTOCS0E,DS timeout for slave0 interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 3. "PERTOE,Periodic transaction timeout interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 2. "INICMPE,Initial Sequence Completed interrupt enable" "0: Disabled,1: Enabled" newline bitfld.long 0x0 1. "PATCMPE,Pattern Completed interrupt enable" "0: Disabled,1: Enabled" bitfld.long 0x0 0. "CMDCMPE,Command Completed interrupt enable" "0: Disabled,1: Enabled" tree.end tree.end AUTOINDENT.OFF