; -------------------------------------------------------------------------------- ; @Title: PIC32CZCA On-Chip Peripherals ; @Props: Released ; @Author: KRZ ; @Changelog: 2023-11-29 KRZ ; @Manufacturer: MICROCHIP - Microchip Technology Inc. ; @Doc: Generated (TRACE32, build: 164960.), based on: ; PIC32CZ2051CA80208.svd (Ver. 0), PIC32CZ2051CA90208.svd (Ver. 0), ; PIC32CZ4010CA80208.svd (Ver. 0), PIC32CZ4010CA90208.svd (Ver. 0), ; PIC32CZ8110CA80208.svd (Ver. 0), PIC32CZ8110CA90208.svd (Ver. 0) ; @Core: Cortex-M7F ; @Chip: PIC32CZ2051CA80208, PIC32CZ2051CA90208, PIC32CZ4010CA80208, ; PIC32CZ4010CA90208, PIC32CZ8110CA80208, PIC32CZ8110CA90208 ; @Copyright: (C) 1989-2023 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perpic32czca.per 17120 2023-11-29 10:52:42Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 tree.close "Core Registers (Cortex-M7F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 28. " DISFPUISSOPT ,DISFPUISSOPT" "No,Yes" bitfld.long 0x00 27. " DISCRITAXIRUW ,Disables critical AXI read-under-write" "No,Yes" bitfld.long 0x00 26. " DISDYNADD ,Disables dynamic allocation of ADD and SUB instructions" "No,Yes" textline " " bitfld.long 0x00 21.--25. " DISISSCH1 ,DISISSCH1" "Normal,Not issued in ch1,,,,,,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..." bitfld.long 0x00 16.--20. " DISDI ,DISDI" "Normal,ch1,,,,,,,,,,,,,,,Direct branches,Indirect branches,Loaded to PC,Integer MAC and MUL,VFP,?..." bitfld.long 0x00 15. " DISCRITAXIRUR ,Disables critical AXI read-under-read" "No,Yes" textline " " bitfld.long 0x00 14. " DISBTACALLOC ,DISBTACALLOC" "No,Yes" bitfld.long 0x00 13. " DISBTACREAD ,DISBTACREAD" "No,Yes" bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes" textline " " bitfld.long 0x00 11. " DISRAMODE ,Disables dynamic read allocate mode for Write-Back Write-Allocate memory regions" "No,Yes" bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes" textline "" group.long 0x10++0x03 line.long 0x00 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" group.long 0x14++0x07 line.long 0x00 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x00 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x04 "SYST_CVR,SysTick Current Value Register" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" hexmask.long.byte 0x00 24.--31. 1. " IMPLEMENTER ,Indicates implementer" bitfld.long 0x00 20.--23. " VARIANT ,Indicates processor revision" "Revision 0,Revision 1,?..." bitfld.long 0x00 16.--19. " ARCHITECTURE ,Architecture" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 4.--15. 1. " PARTNO ,Indicates part number" bitfld.long 0x00 0.--3. " REVISION ,Indicates patch release" "Patch 0,Patch 1,Patch 2,?..." group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control and State Register" bitfld.long 0x00 31. " NMIPENDSET ,On writes, makes the NMI exception active. On reads, indicates the state of the exception" "Inactive,Active" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET ,On writes, sets the PendSV exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" textline " " rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending" hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" textline " " rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" bitfld.long 0x08 0. " VECTRESET ,Writing 1 to this bit causes a local system reset" "No effect,Reset" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " STKALIGN ,Determines whether the exception entry sequence guarantees 8-byte stack frame alignment, adjusting the SP if necessary before saving state" "4-byte/no adjustment,8-byte/adjustment" bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise data access faults on handlers running at priority -1 or priority -2" "Lockup,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" bitfld.long 0x10 0. " NONBASETHRDENA ,Controls whether the processor can enter Thread mode at an execution priority level other than base level" "Disabled,Enabled" line.long 0x14 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x18 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x18 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x18 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x1C 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. " USGFAULTENA ,UsageFault" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,BusFault" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,MemManage" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall status" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault status" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage status" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault status" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick status" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV status" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor status" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall status" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault status" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault status" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage status" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,tacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstack Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault(exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault(exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "USAFAULT,Usage Fault Status Register" bitfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" bitfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" bitfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" textline " " bitfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" bitfld.word 0x00 1. " INVSTATE ,Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x13 line.long 0x00 "HFSR,HardFault Status Register" eventfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" eventfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred" eventfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" line.long 0x04 "DFSR,Debug Fault Status Register" eventfld.long 0x04 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not occurred,Occurred" eventfld.long 0x04 3. " VCATCH ,Indicates triggering of a Vector catch" "Not occurred,Occurred" eventfld.long 0x04 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not occurred,Occurred" textline " " eventfld.long 0x04 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not occurred,Occurred" eventfld.long 0x04 0. " HALTED ,Indicates a debug event generated by a C_HALT or C_STEP request or a step request triggered by setting DEMCR.MON_STEP to 1" "Not occurred,Occurred" line.long 0x08 "MMFAR,MemManage Fault Address Register" line.long 0x0C "BFAR,BusFault Address Register" line.long 0x10 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 22.--23. " CP11 ,Access privileges for coprocessor 11" "Denied,Privileged,,Full" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full" wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Triggered Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Memory System" width 10. rgroup.long 0xD78++0x0B line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOU ,Level of Unification" "Level 1,level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,level 2,?..." bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,?..." textline " " bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..." bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..." bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..." textline " " bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..." bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..." bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..." line.long 0x04 "CTR,Cache Type Register" bitfld.long 0x04 29.--31. " FORMAT ,Indicates the implemented CTR format" ",,,,ARMv7,?..." bitfld.long 0x04 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x04 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x04 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CCSIDR,Cache Size ID Register" bitfld.long 0x08 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported" bitfld.long 0x08 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported" bitfld.long 0x08 29. " RA ,Indicates support available for read allocation" "Not supported,Supported" textline " " bitfld.long 0x08 28. " WA ,Indicates support available for write allocation" "Not supported,Supported" hexmask.long.word 0x08 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1" hexmask.long.word 0x08 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1" textline " " bitfld.long 0x08 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512" group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,Instruction cache invalidate all to Point of Unification" wgroup.long 0xF58++0x1F line.long 0x00 "ICIMVAU,Instruction cache invalidate by address to PoU" line.long 0x04 "DCIMVAC,Data cache invalidate by address to Point of Coherency (PoC)" line.long 0x08 "DCISW,Data cache invalidate by set/way" line.long 0x0C "DCCMVAU,Data cache by address to PoU" line.long 0x10 "DCCMVAC,Data cache clean by address to PoC" line.long 0x14 "DCCSW,Data cache clean by set/way" line.long 0x18 "DCCIMVAC,Data cache clean and invalidate by address to PoC" line.long 0x1C "DCCISW,Data cache clean and invalidate by set/way" group.long 0xF90++0x13 line.long 0x00 "ITCMCR,Instruction Tightly-Coupled Memory Control Register" bitfld.long 0x00 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB" bitfld.long 0x00 2. " RETEN ,Retry phase enable" "Disabled,Enabled" bitfld.long 0x00 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " EN ,TCM enable" "Disabled,Enabled" line.long 0x04 "DTCMCR,Data Tightly-Coupled Memory Control Register" bitfld.long 0x04 3.--6. " SZ ,TCM size" "Not implemented,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB" bitfld.long 0x04 2. " RETEN ,Retry phase enable" "Disabled,Enabled" bitfld.long 0x04 1. " RMW ,Read-Modify-Write enable" "Disabled,Enabled" textline " " bitfld.long 0x04 0. " EN ,TCM enable" "Disabled,Enabled" line.long 0x08 "AHBPCR,AHBP control register" bitfld.long 0x08 1.--3. " SZ ,AHBP size" "AHBP disabled,64 MB,128 MB,256 MB,512 MB,?..." bitfld.long 0x08 0. " EN ,AHBP enable" "Disabled,Enabled" line.long 0x0C "CACR,L1 Cache Control Register" bitfld.long 0x0C 2. " FORCEWT ,Enables Force Write-through in the data cache" "Disabled,Enabled" bitfld.long 0x0C 1. " ECCDIS ,Disables ECC in the instruction and data cache" "No,Yes" bitfld.long 0x0C 0. " SIWT ,Enables limited cache coherency usage" "Disabled,Enabled" line.long 0x10 "AHBSCR,AHB Slave Control Register" bitfld.long 0x10 11.--15. " INITCOUNT ,Fairness counter initialization value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 2.--10. 1. " TPRI ,Threshold execution priority for AHBS traffic demotion" bitfld.long 0x10 0.--1. " CTL ,AHBS prioritization control" "AHBS,Software,AHBSCR.INITCOUNT,AHBSPRI" group.long 0xFA8++0x03 line.long 0x00 "ABFSR,Auxiliary Bus Fault Status Register" bitfld.long 0x00 8.--9. " AXIMTYPE ,Indicates the type of fault on the AXIM interface" "OKAY,EXOKAY,SLVERR,DECERR" bitfld.long 0x00 4. " EPPB ,Asynchronous fault on EPPB interface" "Not occurred,Occurred" bitfld.long 0x00 3. " AXIM ,Asynchronous fault on AXIM interface" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " AHBP ,Asynchronous fault on AHBP interface" "Not occurred,Occurred" bitfld.long 0x00 1. " DTCM ,Asynchronous fault on DTCM interface" "Not occurred,Occurred" bitfld.long 0x00 0. " ITCM ,Asynchronous fault on ITCM interface" "Not occurred,Occurred" group.long 0xFB0++0x03 line.long 0x00 "IEBR0,Instruction Error bank Register 0" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" group.long 0xFB4++0x03 line.long 0x00 "IEBR1,Instruction Error bank Register 1" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" group.long 0xFB8++0x03 line.long 0x00 "DEBR0,Data Error bank Register 0" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" group.long 0xFBC++0x03 line.long 0x00 "DEBR1,Data Error bank Register 1" bitfld.long 0x00 30.--31. " UD ,User-defined" "0,1,2,3" bitfld.long 0x00 17. " TOE ,Indicates the error type" "Correctable,Non-correctable" bitfld.long 0x00 16. " RB ,Indicates which RAM bank to use" "Tag,Data" textline " " hexmask.long.word 0x00 2.--15. 0x4 " RL ,Indicates the location in instruction cache RAM" bitfld.long 0x00 1. " LOCKED ,Indicates whether the location is locked or not locked" "Not locked,Locked" bitfld.long 0x00 0. " VALID ,Indicates whether the entry is valid or not" "Not valid,Valid" tree.end tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif CORENAME()=="CORTEXM7F" tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" newline bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" newline bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" newline bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x0B line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 24.--27. " SRTERR ,Indicates the hardware support for FP short vectors" "Not supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." newline bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." bitfld.long 0x00 12.--15. " FPEXTRP ,Indicates whether the FP hardware implementation supports exception trapping" "Not supported,?..." bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." newline bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." newline bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Full denorm. num. arit.,?..." line.long 0x08 "MVFR2,Media and FP Feature Register 2" bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..." width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" newline bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" newline bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Version 1,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" newline if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 30.--31. " REPLACE ,Defines the behaviour when the COMP address is matched" ",Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x00 2.--28. 0x04 " COMP ,Comparison Address" bitfld.long 0x00 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))))&0x10000000)==0x10000000) if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Enable bit for Breakpoint" "Disabled,Enabled" endif endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0C "CID3,Component ID3" tree.end else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group.long 0x00++0x1B line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 26. " NOEXTTRIG ,Shows whether the implementation includes external match signals" "Supported,Not supported" newline rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" newline bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" newline bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" newline bitfld.long 0x00 12. " PCSAMPLEENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" newline bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" line.long 0x04 "DWT_CYCCNT,Cycle Count register" line.long 0x08 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" line.long 0x0c "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x10 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x14 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" line.long 0x18 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" newline group.long 0x20++0x07 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" line.long 0x04 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x20) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x1A0)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x180)==0x80) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet,UNPREDICTABLE,UNPREDICTABLE,Generate watchpoint debug event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,CMPMATCH[N] event,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline bitfld.long 0x00 7. " CYCMATCH ,Enable cycle count comparison for comparator 0" "Disabled,Enabled" bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x30)++0x07 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" line.long 0x04 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x20) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08))&0x120)==0x00) group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x40)++0x07 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" line.long 0x04 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x20) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08))&0x120)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif group.long (0x50)++0x07 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" line.long 0x04 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x04 0.--4. " MASK ,The size of the ignore mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x20) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send address trace packet on READ/WRITE,Send data value + address packet on READ/WRITE,Send data value + address packet on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data address trace packet on READ,Send data address trace packet on WRITE,Send data address + PC value on READ,Send data address + PC value on WRITE" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08))&0x120)==0x00) group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,Send PC value trace packet on READ/WRITE,Send data value trace packet on READ/WRITE,Send data value + PC value on READ/WRITE,Watchpoint debug event on PC match,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,CMPMATCH[N] event on PC match,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ/WRITE,Send data value trace packet on READ,Send data value trace packet on WRITE,Send data value + PC value on READ,Send data value + PC value on WRITE" else group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 24. " MATCHED ,Comparator match" "No matched,Matched" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" bitfld.long 0x00 9. " LNK1ENA ,Supports use of a second linked comparator" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" newline textfld " " bitfld.long 0x00 5. " EMITRANGE ,Enables generation of Data trace address offset packets" "Disabled,Enabled" bitfld.long 0x00 0.--3. " FUNCTION ,Selects action taken on comparator match" "Disabled,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,Watchpoint debug event on READ,Watchpoint debug event on WRITE,Watchpoint debug event on READ/WRITE,UNPREDICTABLE,CMPMATCH[N] event on READ,CMPMATCH[N] event on WRITE,CMPMATCH[N] event on READ,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE,UNPREDICTABLE" endif width 6. tree "CoreSight Identification Registers" rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end width 0x0B else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end tree "AC (Analog Comparator Controller)" base ad:0x46822000 group.long 0x0++0x1B line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,Control B" bitfld.long 0x4 1. "START1,Comparator 1 Start Comparison" "0,1" bitfld.long 0x4 0. "START0,Comparator 0 Start Comparison" "0,1" line.long 0x8 "CTRLC,Control C" hexmask.long.byte 0x8 28.--31. 1. "CONFIG,Configuration Extension" bitfld.long 0x8 27. "AIPMPEN,Analog Input Charge Pump Enable" "0,1" newline bitfld.long 0x8 24.--26. "PRESCALER,Prescaling Factor" "0: Sampling rate is GCLK_AC (No division),1: Sampling rate is GCLK_AC/2,2: Sampling rate is GCLK_AC/4,3: Sampling rate is GCLK_AC/8,4: Sampling rate is GCLK_AC/16,5: Sampling rate is GCLK_AC/32,6: Sampling rate is GCLK_AC/64,7: Sampling rate is GCLK_AC/128" hexmask.long.word 0x8 12.--21. 1. "PER,Sample and Hold Clock Period" newline hexmask.long.word 0x8 0.--9. 1. "WIDTH,Sample and Hold Clock Pulse Width" line.long 0xC "EVCTRL,Event Control" bitfld.long 0xC 25. "INVEI1,Inverted Event Input Enable 1" "0,1" bitfld.long 0xC 24. "INVEI0,Inverted Event Input Enable 0" "0,1" newline bitfld.long 0xC 17. "COMPEI1,Comparator 1 Event Input Enable" "0,1" bitfld.long 0xC 16. "COMPEI0,Comparator 0 Event Input Enable" "0,1" newline bitfld.long 0xC 8. "WINEO0,Window 0 Event Output Enable" "0,1" bitfld.long 0xC 1. "COMPEO1,Comparator 1 Event Output Enable" "0,1" newline bitfld.long 0xC 0. "COMPEO0,Comparator 0 Event Output Enable" "0,1" line.long 0x10 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x10 8. "WIN0,Window 0 Interrupt Enable" "0,1" bitfld.long 0x10 1. "COMP1,Comparator 1 Interrupt Enable" "0,1" newline bitfld.long 0x10 0. "COMP0,Comparator 0 Interrupt Enable" "0,1" line.long 0x14 "INTENSET,Interrupt Enable Set" bitfld.long 0x14 8. "WIN0,Window 0 Interrupt Enable" "0,1" bitfld.long 0x14 1. "COMP1,Comparator 1 Interrupt Enable" "0,1" newline bitfld.long 0x14 0. "COMP0,Comparator 0 Interrupt Enable" "0,1" line.long 0x18 "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0x18 8. "WIN0,Window 0" "0,1" bitfld.long 0x18 1. "COMP1,Comparator 1" "0,1" newline bitfld.long 0x18 0. "COMP0,Comparator 0" "0,1" rgroup.long 0x1C++0x7 line.long 0x0 "STATUSA,Status A" bitfld.long 0x0 18.--19. "WSTATE1,Window 1 Current State" "0: Signal is above window,1: Signal is inside window,2: Signal is below window,?" bitfld.long 0x0 16.--17. "WSTATE0,Window 0 Current State" "0: Signal is above window,1: Signal is inside window,2: Signal is below window,?" newline bitfld.long 0x0 1. "STATE1,Comparator 1 Current State" "0,1" bitfld.long 0x0 0. "STATE0,Comparator 0 Current State" "0,1" line.long 0x4 "STATUSB,Status B" bitfld.long 0x4 1. "READY1,Comparator 1 Ready" "0,1" bitfld.long 0x4 0. "READY0,Comparator 0 Ready" "0,1" group.long 0x24++0x3 line.long 0x0 "DBGCTRL,Debug Control" bitfld.long 0x0 0. "DBGRUN,Debug Run" "0,1" rgroup.long 0x28++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 10. "WINCTRL0,WINCTRL 0 Synchronization Busy" "0,1" bitfld.long 0x0 3. "COMPCTRL1,COMPCTRL 1 Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "COMPCTRL0,COMPCTRL 0 Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x30)++0x3 line.long 0x0 "COMPCTRL[$1],Pair n Comparator Control 0" hexmask.long.byte 0x0 26.--31. 1. "SUT,Start-up Time" bitfld.long 0x0 24.--25. "OUT,Output" "0: The output of COMPn is not routed to the COMPn..,1: The asynchronous output of COMPn is routed to..,2: The synchronous output (including filtering) of..,?" newline bitfld.long 0x0 21.--23. "FLEN,Filter Length" "0: No filtering,1: 3-bit majority function (2 of 3),2: 5-bit majority function (3 of 5),?,?,?,?,?" bitfld.long 0x0 19.--20. "HYST,Hysteresis Level" "0: 10mV,1: 20mV,2: 40mV,3: 60mV" newline bitfld.long 0x0 17. "SPEED,Speed Selection" "0: High speed high power,1: Low speed low power" bitfld.long 0x0 16. "SWAP,Swap Inputs and Invert" "0,1" newline bitfld.long 0x0 12.--14. "MUXPOS,Positive Input Mux Selection" "0: I/O pin 0,1: I/O pin 1,2: I/O pin 2,3: I/O pin 3,4: Internal connection 0 device specific,5: Internal connection 1 device specific,6: Internal connection 2 device specific,7: Internal DAC" bitfld.long 0x0 8.--10. "MUXNEG,Negative Input Mux Selection" "0: I/O pin 0,1: I/O pin 1,2: I/O pin 2,3: I/O pin 3,4: Internal connection 0 device specific,5: Bangap,6: Ground,7: Internal DAC" newline bitfld.long 0x0 6. "RUNSTDBY,Run in Standby" "0,1" bitfld.long 0x0 4.--5. "INTSEL,Interrupt Selection" "0: Interrupt on comparator output toggle,1: Interrupt on comparator output rising,2: Interrupt on comparator output falling,3: Interrupt on end of comparison (single-shot mode.." newline bitfld.long 0x0 3. "SINGLE,Single-Shot Mode" "0,1" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" repeat.end group.long 0x38++0x7 line.long 0x0 "DACCTRL,Dac Control" bitfld.long 0x0 31. "SHEN1,DAC1 Sample and Hold Enable Operating Mode" "0,1" hexmask.long.byte 0x0 16.--22. 1. "VALUE1,DAC1 Output Value" newline bitfld.long 0x0 15. "SHEN0,DAC0 Sample and Hold Enable Operating Mode" "0,1" hexmask.long.byte 0x0 0.--6. 1. "VALUE0,DAC0 Output Value" line.long 0x4 "WINCTRL,Window Monitor Control" bitfld.long 0x4 1.--2. "WINTSEL0,Window 0 Interrupt Selection" "0: Interrupt on signal above window,1: Interrupt on signal inside window,2: Interrupt on signal below window,3: Interrupt on signal outside window" bitfld.long 0x4 0. "WEN0,Window 0 Mode Enable" "0,1" tree.end tree "ADC (Analog-to-Digital Converter)" base ad:0x46820000 group.long 0x0++0xB line.long 0x0 "CTRLA,CONTROL A REGISTER" bitfld.long 0x0 7. "ONDEMAND,On Demand Control" "0,1" bitfld.long 0x0 6. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 4. "AIPMPEN,Charge Pump Enable" "0,1" bitfld.long 0x0 2. "ANAEN,Analog Enable" "0,1" newline bitfld.long 0x0 1. "ENABLE,ENABLE BIT" "0,1" bitfld.long 0x0 0. "SWRST,SOFTWARE RESET BIT" "0,1" line.long 0x4 "CTRLB,CONTROL B REGISTER" bitfld.long 0x4 15. "SWCNVEN,Software Conversion Enable" "0,1" bitfld.long 0x4 10. "TRGSUSP,Trigger Suspend" "0,1" newline bitfld.long 0x4 9. "LSWTRG,Level Global Trigger" "0,1" bitfld.long 0x4 8. "GSWTRG,Global Software Trigger" "0,1" newline bitfld.long 0x4 7. "SAMP,Channel Sample" "0,1" bitfld.long 0x4 6. "RQCNVRT,Request Channel Convert" "0,1" newline bitfld.long 0x4 4.--5. "ADCORSEL,Software Trigger Core Select" "0,1,2,3" hexmask.long.byte 0x4 0.--3. 1. "ADCHSEL,Software Trigger Channel Select" line.long 0x8 "CTRLC,Control C Register" bitfld.long 0x8 28.--30. "COREINTERLEAVED,Number of Core to Interleave Triggers" "0: Interleaving Off,1: Interleaving Cores 1 and 2,2: Interleaving Cores 1 2 and 3,3: Interleaving Cores 0 1 2 and 3,4: Interleaving Cores 0 and 1,5: Interleaving Cores 0 1 and 2,?,?" hexmask.long.word 0x8 0.--15. 1. "CNT,Clock Divider for Synchronous Trigger" group.long 0x10++0x3 line.long 0x0 "CTRLD,Control D Register" bitfld.long 0x0 28.--30. "VREFSEL,Voltage Reference Select" "0: AVDD and AVSS,1: External VREFH and AVSS,?,?,?,?,?,?" hexmask.long.byte 0x0 24.--27. 1. "WKUPEXP,Wakeup cycles" newline hexmask.long.byte 0x0 20.--23. 1. "ANLEN,Analog Channel Enable" hexmask.long.byte 0x0 16.--19. 1. "CHNEN,Digital Channel Enable" newline hexmask.long.byte 0x0 8.--13. 1. "CTLCKDIV,Control Clock Divider" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x46820020 ad:0x46820040 ad:0x46820060 ad:0x46820080) tree "CONFIG[$1]" base $2 group.long ($2)++0x1B line.long 0x0 "CORCTRL,SARCORE Control" hexmask.long.byte 0x0 24.--30. 1. "ADCDIV,Division Ratio for SARCORE clock" bitfld.long 0x0 22. "SCNRTDS,SCAN Re-trigger Disable" "0,1" bitfld.long 0x0 21. "STRGLVL,Scan Trigger Level Sensitivity" "0,1" hexmask.long.byte 0x0 16.--19. 1. "STRGSRC,SCAN trigger source selection" newline bitfld.long 0x0 15. "EIRQOVR,Interrupt Type Select" "0,1" bitfld.long 0x0 12.--14. "EIS,Early Interrupt Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0 10.--11. "SELRES,Selects Resolution" "0: 6 bits,1: 8 bits,2: 10 bits,3: 12 bits (default)" hexmask.long.word 0x0 0.--9. 1. "SAMC,Sample Count" line.long 0x4 "CHNCFG1,Channel Configuration 1 (LVL/CMPEN)" hexmask.long.word 0x4 16.--31. 1. "LVL,Channel Level" hexmask.long.word 0x4 0.--15. 1. "CHNCMPEN,Channel Comparator Enable" line.long 0x8 "CHNCFG2,Channel Configuration 2(FRACT/CSS)" hexmask.long.word 0x8 16.--31. 1. "FRACT,Channel Fractional" hexmask.long.word 0x8 0.--15. 1. "CSS,Channel SCAN Select" line.long 0xC "CHNCFG3,Channel Configuration3 (SIGN/DIFF)" hexmask.long.word 0xC 16.--31. 1. "SIGN,SIGN setting" hexmask.long.word 0xC 0.--15. 1. "DIFF,Differential Mode" line.long 0x10 "CHNCFG4,Channel Configuration 4 (TRGSRC)" hexmask.long.byte 0x10 28.--31. 1. "TRGSRC7,Channel 7 Trigger Source" hexmask.long.byte 0x10 24.--27. 1. "TRGSRC6,Channel 6 Trigger Source" hexmask.long.byte 0x10 20.--23. 1. "TRGSRC5,Channel 5 Trigger Source" hexmask.long.byte 0x10 16.--19. 1. "TRGSRC4,Channel 4 Trigger Source" newline hexmask.long.byte 0x10 12.--15. 1. "TRGSRC3,Channel 3 Trigger Source" hexmask.long.byte 0x10 8.--11. 1. "TRGSRC2,Channel 2 Trigger Source" hexmask.long.byte 0x10 4.--7. 1. "TRGSRC1,Channel 1 Trigger Source" hexmask.long.byte 0x10 0.--3. 1. "TRGSRC0,Channel 0 Trigger Source" line.long 0x14 "CHNCFG5,Channel Configuration 5 (TRGSRC)" hexmask.long.byte 0x14 28.--31. 1. "TRGSRC15,Channel 15 Trigger Source" hexmask.long.byte 0x14 24.--27. 1. "TRGSRC14,Channel 14 Trigger Source" hexmask.long.byte 0x14 20.--23. 1. "TRGSRC13,Channel 13 Trigger Source" hexmask.long.byte 0x14 16.--19. 1. "TRGSRC12,Channel 12 Trigger Source" newline hexmask.long.byte 0x14 12.--15. 1. "TRGSRC11,Channel 11 Trigger Source" hexmask.long.byte 0x14 8.--11. 1. "TRGSRC10,Channel 10 Trigger Source" hexmask.long.byte 0x14 4.--7. 1. "TRGSRC9,Channel 9 Trigger Source" hexmask.long.byte 0x14 0.--3. 1. "TRGSRC8,Channel 8 Trigger Source" line.long 0x18 "CALCTRL,SARCORE Calibration Value" hexmask.long 0x18 0.--31. 1. "CALBITS,Calibration Values" group.long ($2+0x18)++0x3 line.long 0x0 "CALCTRL_FUSES_ADC_SARCORE_12BIT_V7A0_MODE,SARCORE Calibration Value" bitfld.long 0x0 31. "en_ext_bias,Dsiable Internal Bias Circuit" "0,1" bitfld.long 0x0 28.--29. "icmbf,Bias Current Common Mode Buffer" "0,1,2,3" bitfld.long 0x0 26.--27. "icmp_2,Bias Current Stage 2" "0,1,2,3" bitfld.long 0x0 24.--25. "icmp_1,Bias Current Stage 1" "0,1,2,3" newline bitfld.long 0x0 22.--23. "iadc_2,Current Consumption 2" "0,1,2,3" bitfld.long 0x0 20.--21. "iadc_1,Current Consumption 1" "0,1,2,3" hexmask.long.byte 0x0 11.--15. 1. "tclk_div,Test Clock Divider" bitfld.long 0x0 9.--10. "t1_dly,Regen Latch Delay" "0,1,2,3" newline bitfld.long 0x0 8. "sel_del,Scan Mode comp_out" "0,1" bitfld.long 0x0 7. "dbg_sel,Debug Bus Select" "0,1" bitfld.long 0x0 6. "en_rdac,Disable Power Cycling" "0,1" bitfld.long 0x0 5. "dis_laz,Disable auto-zeroing" "0,1" newline bitfld.long 0x0 4. "dis_saz,Disable auto-zeroing" "0,1" bitfld.long 0x0 3. "dis_faz,Disable auto-zeroing" "0,1" bitfld.long 0x0 2. "en_dither,Enable Dither" "0,1" bitfld.long 0x0 0. "en_cmbf,Enable Common Mode Buffer" "0,1" group.long ($2+0x18)++0x7 line.long 0x0 "CALCTRL_FUSES_ADC_SARCORE_12BIT_V7C0_MODE,SARCORE Calibration Value" bitfld.long 0x0 31. "en_ext_bias,Dsiable Internal Bias Circuit" "0,1" bitfld.long 0x0 28.--29. "icmbf,Bias Current Common Mode Buffer" "0,1,2,3" bitfld.long 0x0 26.--27. "icmp_2,Bias Current Stage 2" "0,1,2,3" bitfld.long 0x0 24.--25. "icmp_1,Bias Current Stage 1" "0,1,2,3" newline bitfld.long 0x0 22.--23. "iadc_2,Current Consumption 2" "0,1,2,3" bitfld.long 0x0 20.--21. "iadc_1,Current Consumption 1" "0,1,2,3" hexmask.long.byte 0x0 11.--15. 1. "tclk_div,Test Clock Divider" bitfld.long 0x0 9.--10. "t1_dly,Regen Latch Delay" "0,1,2,3" newline bitfld.long 0x0 8. "sel_del,Scan Mode comp_out" "0,1" bitfld.long 0x0 7. "dbg_sel,Debug Bus Select" "0,1" bitfld.long 0x0 6. "en_rdac,Disable Power Cycling" "0,1" bitfld.long 0x0 5. "dis_laz,Disable auto-zeroing" "0,1" newline bitfld.long 0x0 4. "dis_saz,Disable auto-zeroing" "0,1" bitfld.long 0x0 3. "dis_faz,Disable auto-zeroing" "0,1" bitfld.long 0x0 2. "en_dither,Enable Dither" "0,1" bitfld.long 0x0 0. "en_cmbf,Enable Common Mode Buffer" "0,1" line.long 0x4 "EVCTRL,Event Control" bitfld.long 0x4 4. "RESRDYEO,Result Ready Event Out" "0,1" bitfld.long 0x4 3. "STARTINV,Start Conversion Invert" "0,1" bitfld.long 0x4 0. "STARTEI,Start Event conversion input enable" "0,1" tree.end repeat.end base ad:0x46820000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xB0)++0x3 line.long 0x0 "CMPCTRL[$1],Comparator Control" bitfld.long 0x0 29. "IEHIHI,Enable VAL >= CMPHI" "0,1" bitfld.long 0x0 28. "IEHILO,Enable VAL < CMPHI" "0,1" newline hexmask.long.word 0x0 16.--27. 1. "ADCMPHI,High Limit of Digital Comparator" bitfld.long 0x0 15. "IEBTWN,Enable CMPLO <= VAL < CMPHI" "0,1" newline bitfld.long 0x0 14. "IELOHI,Enable VAL >= CMPLO" "0,1" bitfld.long 0x0 13. "IELOLO,Enable VAL < CMPLO" "0,1" newline bitfld.long 0x0 12. "CMPEN,Comparator Enable" "0,1" hexmask.long.word 0x0 0.--11. 1. "ADCMPLO,Low Limit of Digital Comparator" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC0)++0x3 line.long 0x0 "FLTCTRL[$1],Filter Control" hexmask.long.byte 0x0 10.--13. 1. "FLTCHNID,Channel ID" bitfld.long 0x0 8. "FLTEN,Filter Enable" "0,1" newline bitfld.long 0x0 4. "DATA16EN,16bit Averaging Mode" "0,1" bitfld.long 0x0 3. "FMODE,Filter Mode" "0,1" newline bitfld.long 0x0 0.--2. "OVRSAM,Oversampling Ratio" "0: (If FMODE is 0) 4 samples (shift sum 1 bit to..,1: (If FMODE is 0) 16 samples (shift sum 2 bits to..,2: (If FMODE is 0) 64 samples (shift sum 3 bits to..,3: (If FMODE is 0) 256 samples (shift sum 4 bits to..,4: (If FMODE is 0) 2 samples (shift sum 0 bits to..,5: (If FMODE is 0) 8 samples (shift sum 1 bit to..,6: (If FMODE is 0) 32 samples (shift sum 2 bits to..,7: (If FMODE is 0) 128 samples (shift sum 3 bits to.." repeat.end group.long 0xD0++0x7 line.long 0x0 "CORCHDATAID,Channel Ready DATA ID" bitfld.long 0x0 4.--5. "CORDYID,Core Read ID" "0,1,2,3" hexmask.long.byte 0x0 0.--3. 1. "CHRDYID,Channel Read ID" line.long 0x4 "CHRDYDAT,Channel Ready Data Register" bitfld.long 0x4 27. "FRACT,Fractional Setting" "0,1" bitfld.long 0x4 26. "SIGN,Sign Setting" "0,1" newline bitfld.long 0x4 25. "DIFF,Differential Setting" "0,1" bitfld.long 0x4 24. "LVL,Level Setting" "0,1" newline hexmask.long.word 0x4 0.--15. 1. "CHRDYDAT,Channel Output Data" rgroup.long 0xD8++0x3 line.long 0x0 "PFFDATA,APB FIFO Output Data" hexmask.long.byte 0x0 24.--31. 1. "PFFCNT,Current Data Entries in APB FIFO" bitfld.long 0x0 23. "PFFFRACT,Fractional Setting from APB FIFO" "0,1" newline bitfld.long 0x0 22. "PFFSIGN,Channel Sign from the APB FIFO" "0,1" bitfld.long 0x0 20.--21. "PFFCORID,Core ID from APB FIFO" "0,1,2,3" newline hexmask.long.byte 0x0 16.--19. 1. "PFFCHNID,Channel ID from APB FIFO" hexmask.long.word 0x0 0.--15. 1. "PFFDATA,SARCORE Conversion data from the APB FIFO" group.long 0xDC++0xB line.long 0x0 "DMABASE,DMA Sample Base Address" hexmask.long 0x0 0.--31. 1. "DMABASE,DMA Sample Value Base Address" line.long 0x4 "DMACTRL,DMA Control Register" bitfld.long 0x4 8.--10. "DMABL,DMA System RAM Buffer Length" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 4.--7. 1. "DMACR,DMA CORE Enables" newline bitfld.long 0x4 1. "DMAEN,DMA Enable" "0,1" line.long 0x8 "PFFCTRL,APB FIFO Control Register" bitfld.long 0x8 16. "PFFRDYDM,DMA APB FIFO Data Ready" "0: Selects CTLINTFLAG.PFFHFUL for the ADC DMA..,1: Selects CTLINTFLAG.PFFRDY for the ADC DMA PFFRDY.." hexmask.long.byte 0x8 4.--7. 1. "PFFCR,APB CORE FIFO Enable" newline bitfld.long 0x8 1. "PFFEN,APB FIFO Enable" "0,1" rgroup.long 0xE8++0x3 line.long 0x0 "SYNCBUSY,CORE SYNC Busy Status Register" bitfld.long 0x0 24. "SWRST,Software Reset Sync Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB sync busy" "0,1" newline bitfld.long 0x0 0. "ENABLE,Enable bit Sync Busy" "0,1" group.long 0xEC++0x1B line.long 0x0 "TESTREG,Test Control Register" bitfld.long 0x0 28.--29. "ADCORSEL,Core Select" "0,1,2,3" hexmask.long.byte 0x0 24.--27. 1. "ADCHSEL,Channel Select" newline hexmask.long.byte 0x0 16.--19. 1. "EN_ATEST,Analog Test Circuitry Enables" bitfld.long 0x0 0. "TESTEN,Test Mode Enable" "0,1" line.long 0x4 "DMAINTENCLR,DMA Interrupt Enable Clear" bitfld.long 0x4 16. "SOVFL,Synchonizer Overflow" "0,1" hexmask.long.byte 0x4 4.--7. 1. "RBF,Ram Buffer B Full" newline hexmask.long.byte 0x4 0.--3. 1. "RAF,Ram Buffer A Full" line.long 0x8 "DMAINTSET,DMA Interrupt Enable Set" bitfld.long 0x8 16. "SOVFL,Synchonizer Overflow" "0,1" hexmask.long.byte 0x8 4.--7. 1. "RBF,Ram Buffer B Full" newline hexmask.long.byte 0x8 0.--3. 1. "RAF,Ram Buffer A Full" line.long 0xC "DMAINTFLAG,DMA Interrupt Flag and Status" bitfld.long 0xC 16. "SOVFL,Synchronizer overflow" "0,1" hexmask.long.byte 0xC 4.--7. 1. "RBF,Ram Buffer B Full" newline hexmask.long.byte 0xC 0.--3. 1. "RAF,Ram Buffer A Full" line.long 0x10 "CTLINTENSET,CORE Controller Interrupt Enable Set" bitfld.long 0x10 11. "PFFHFUL,APB FIFO Half Full" "0,1" bitfld.long 0x10 10. "PFFRDY,APB FIFO Ready" "0,1" newline bitfld.long 0x10 9. "PFFOVF,APB FIFO Overflow" "0,1" bitfld.long 0x10 8. "PFFUNF,APB FIFO Underflow" "0,1" newline bitfld.long 0x10 7. "VREFRDY,VREF Ready" "0,1" bitfld.long 0x10 6. "VREFUPD,VREF update" "0,1" newline hexmask.long.byte 0x10 0.--3. 1. "CRRDY,Core Ready" line.long 0x14 "CTLINTENCLR,CORE Controller Interrupt Enable Clear" bitfld.long 0x14 11. "PFFHFUL,APB FIFO Half Full" "0,1" bitfld.long 0x14 10. "PFFRDY,APB FIFO Ready" "0,1" newline bitfld.long 0x14 9. "PFFOVF,APB FIFO overflow" "0,1" bitfld.long 0x14 8. "PFFUNF,APB FIFO underflow" "0,1" newline bitfld.long 0x14 7. "VREFRDY,VREF Ready" "0,1" bitfld.long 0x14 6. "VREFUPD,VREF Update" "0,1" newline hexmask.long.byte 0x14 0.--3. 1. "CRRDY,Core Ready Disable" line.long 0x18 "CTLINTFLAG,CORE Controller Interrupt Flags" bitfld.long 0x18 11. "PFFHFUL,APB FIFO Half Full" "0,1" bitfld.long 0x18 10. "PFFRDY,APB FIFO Ready" "0,1" newline bitfld.long 0x18 9. "PFFOVF,APB FIFO overflow" "0,1" bitfld.long 0x18 8. "PFFUNF,APB FIFO underflow" "0,1" newline bitfld.long 0x18 7. "VREFRDY,VREF Ready" "0,1" bitfld.long 0x18 6. "VREFUPD,VREF update" "0,1" newline hexmask.long.byte 0x18 0.--3. 1. "CRRDY,Core Ready" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x46820120 ad:0x46820130 ad:0x46820140 ad:0x46820150) tree "INT[$1]" base $2 group.long ($2)++0xB line.long 0x0 "INTENCLR,Interrupt Enable Clear" hexmask.long.word 0x0 12.--27. 1. "CHRDY,Channel Ready Disable" bitfld.long 0x0 11. "EOSRDY,Endo of Scan Disable" "0,1" bitfld.long 0x0 10. "CHNERRC,Channel Overwrite Error Disable" "0,1" bitfld.long 0x0 9. "FLTRDY,Filter Ready Disable" "0,1" bitfld.long 0x0 8. "CHRDYC,Core Current Channel Disable" "0,1" bitfld.long 0x0 7. "SOVFL,Synchonizer Overflow Disable" "0,1" bitfld.long 0x0 4. "CMPHIT,Compare Hit Disable" "0,1" line.long 0x4 "INTENSET,Interrupt Enable Set" hexmask.long.word 0x4 16.--31. 1. "CHRDY,Channel Ready Enable" bitfld.long 0x4 11. "EOSRDY,End of Scan Enable" "0,1" bitfld.long 0x4 10. "CHNERRC,Channel Overwrite Enable" "0,1" bitfld.long 0x4 9. "FLTRDY,Filter Ready Enable" "0,1" bitfld.long 0x4 8. "CHRDYC,Current Channel Ready Enable" "0,1" bitfld.long 0x4 7. "SOVFL,Synchronizer Overflow Enable" "0,1" bitfld.long 0x4 4. "CMPHIT,Compare Hit Enable" "0,1" line.long 0x8 "INTFLAG,Interrupt Flags" hexmask.long.word 0x8 16.--31. 1. "CHRDY,Channel Ready" hexmask.long.byte 0x8 12.--15. 1. "CRDYID,Channel Ready ID" bitfld.long 0x8 11. "EOSRDY,End of Scan Ready" "0,1" bitfld.long 0x8 10. "CHNERRC,Channel Overwrite Error" "0,1" bitfld.long 0x8 9. "FLTRDY,Filter Ready" "0,1" bitfld.long 0x8 8. "CHRDYC,Current Channel Ready" "0,1" bitfld.long 0x8 7. "SOVFL,Synchronizer Overflow" "0,1" bitfld.long 0x8 4. "CMPHIT,Compare Hit" "0,1" hexmask.long.byte 0x8 0.--3. 1. "CMPINTID,Compare Channel ID" tree.end repeat.end base ad:0x46820000 rgroup.long 0x160++0x3 line.long 0x0 "DIGTSTOUT,Test Debug Register" hexmask.long 0x0 0.--31. 1. "ADCDIGTST,Digital Debug Test port Register" group.long 0x164++0x7 line.long 0x0 "TSTIDOUT,Test Degug2 Register" bitfld.long 0x0 0. "TSTCORID,Core Digital Test Out Read ID" "0,1" line.long 0x4 "DBGCTRL,Debug Control Register" bitfld.long 0x4 0. "DBGRUN,Debug Running State" "0,1" tree.end tree "CAN (Controller Area Network)" base ad:0x0 tree "CAN0" base ad:0x45060000 rgroup.long 0x0++0x7 line.long 0x0 "CREL,Core Release" hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release" newline hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release" line.long 0x4 "ENDN,Endian" hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value" group.long 0x8++0x1B line.long 0x0 "MRCFG,Message RAM Configuration" hexmask.long.byte 0x0 16.--23. 1. "OFFSET,Base address offset" line.long 0x4 "DBTP,Fast Bit Timing and Prescaler" bitfld.long 0x4 23. "TDC,Tranceiver Delay Compensation" "0,1" hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Baud Rate Prescaler" newline hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data time segment after sample point" newline hexmask.long.byte 0x4 0.--3. 1. "DSJW,Data (Re)Synchronization Jump Width" line.long 0x8 "TEST,Test" bitfld.long 0x8 7. "RX,Receive Pin" "0,1" bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin" "0: TX controlled by CAN core,1: TX monitoring sample point,2: Dominant (0) level at pin CAN_TX,3: Recessive (1) level at pin CAN_TX" newline bitfld.long 0x8 4. "LBCK,Loop Back Mode" "0,1" line.long 0xC "RWD,RAM Watchdog" hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration" line.long 0x10 "CCCR,CC Control" bitfld.long 0x10 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration" "0,1" newline bitfld.long 0x10 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x10 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x10 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x10 7. "TEST,Test Mode Enable" "0,1" newline bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x10 5. "MON,Bus Monitoring Mode" "0,1" newline bitfld.long 0x10 4. "CSR,Clock Stop Request" "0,1" bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge" "0,1" newline bitfld.long 0x10 2. "ASM,ASM Restricted Operation Mode" "0,1" bitfld.long 0x10 1. "CCE,Configuration Change Enable" "0,1" newline bitfld.long 0x10 0. "INIT,Initialization" "0,1" line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler" hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Baud Rate Prescaler" newline hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" line.long 0x18 "TSCC,Timestamp Counter Configuration" hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler" bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented by TCP,?,?" rgroup.long 0x24++0x3 line.long 0x0 "TSCV,Timestamp Counter Value" hexmask.long.word 0x0 0.--15. 1. "TSC,Timestamp Counter" group.long 0x28++0x7 line.long 0x0 "TOCC,Timeout Counter Configuration" hexmask.long.word 0x0 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x0 1.--2. "TOS,Timeout Select" "0: Continuout operation,1: Timeout controlled by TX Event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1" newline bitfld.long 0x0 0. "ETOC,Enable Timeout Counter" "0,1" line.long 0x4 "TOCV,Timeout Counter Value" hexmask.long.word 0x4 0.--15. 1. "TOC,Timeout Counter" rgroup.long 0x40++0x7 line.long 0x0 "ECR,Error Counter" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1" newline hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter" line.long 0x4 "PSR,Protocol Status" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x4 14. "PXE,Protocol Exception Event" "0,1" newline bitfld.long 0x4 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x4 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" newline bitfld.long 0x4 11. "RESI,ESI flag of last received CAN FD Message" "0,1" bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" newline bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1" bitfld.long 0x4 6. "EW,Warning Status" "0,1" newline bitfld.long 0x4 5. "EP,Error Passive" "0,1" bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter" newline bitfld.long 0x4 0.--2. "LEC,Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" group.long 0x48++0x3 line.long 0x0 "TDCR,Extended ID Filter Configuration" hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset" hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Length" group.long 0x50++0xF line.long 0x0 "IR,Interrupt" bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1" newline bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1" bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1" newline bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1" bitfld.long 0x0 24. "EW,Warning Status" "0,1" newline bitfld.long 0x0 23. "EP,Error Passive" "0,1" bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1" newline bitfld.long 0x0 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1" newline bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1" newline bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1" newline bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1" newline bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x0 9. "TC,Timestamp Completed" "0,1" bitfld.long 0x0 8. "HPM,High Priority Message" "0,1" newline bitfld.long 0x0 7. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x0 6. "RF1F,Rx FIFO 1 FIFO Full" "0,1" newline bitfld.long 0x0 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 New Message" "0,1" newline bitfld.long 0x0 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 Full" "0,1" newline bitfld.long 0x0 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New Message" "0,1" line.long 0x4 "IE,Interrupt Enable" bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1" newline bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Interrupt Enable" "0,1" newline bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1" bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Element Lost Interrupt Enable" "0,1" bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x4 9. "TCE,Timestamp Completed Interrupt Enable" "0,1" bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1" newline bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 New Message Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 Full Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 New Message Interrupt Enable" "0,1" line.long 0x8 "ILS,Interrupt Line Select" bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1" newline bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Interrupt Line" "0,1" newline bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1" bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1" newline bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1" bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1" newline bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Rx Buffer Interrupt Line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1" newline bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1" newline bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Element Lost Interrupt Line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1" newline bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1" newline bitfld.long 0x8 9. "TCL,Timestamp Completed Interrupt Line" "0,1" bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1" newline bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 New Message Interrupt Line" "0,1" newline bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 Full Interrupt Line" "0,1" newline bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 New Message Interrupt Line" "0,1" line.long 0xC "ILE,Interrupt Line Enable" bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long 0x80++0xB line.long 0x0 "GFC,Global Filter Configuration" bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" newline bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0,1" line.long 0x4 "SIDFC,Standard ID Filter Configuration" hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x4 0.--15. 1. "FLSSA,Filter List Standard Start Address" line.long 0x8 "XIDFC,Extended ID Filter Configuration" hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended" hexmask.long.word 0x8 0.--15. 1. "FLESA,Filter List Extended Start Address" group.long 0x90++0x3 line.long 0x0 "XIDAM,Extended ID AND Mask" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "HPMS,High Priority Message Status" bitfld.long 0x0 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index" newline bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected,1: FIFO message lost,2: Message stored in FIFO 0,3: Message stored in FIFO 1" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index" group.long 0x98++0xB line.long 0x0 "NDAT1,New Data 1" bitfld.long 0x0 31. "ND31,New Data 31" "0,1" bitfld.long 0x0 30. "ND30,New Data 30" "0,1" newline bitfld.long 0x0 29. "ND29,New Data 29" "0,1" bitfld.long 0x0 28. "ND28,New Data 28" "0,1" newline bitfld.long 0x0 27. "ND27,New Data 27" "0,1" bitfld.long 0x0 26. "ND26,New Data 26" "0,1" newline bitfld.long 0x0 25. "ND25,New Data 25" "0,1" bitfld.long 0x0 24. "ND24,New Data 24" "0,1" newline bitfld.long 0x0 23. "ND23,New Data 23" "0,1" bitfld.long 0x0 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x0 21. "ND21,New Data 21" "0,1" bitfld.long 0x0 20. "ND20,New Data 20" "0,1" newline bitfld.long 0x0 19. "ND19,New Data 19" "0,1" bitfld.long 0x0 18. "ND18,New Data 18" "0,1" newline bitfld.long 0x0 17. "ND17,New Data 17" "0,1" bitfld.long 0x0 16. "ND16,New Data 16" "0,1" newline bitfld.long 0x0 15. "ND15,New Data 15" "0,1" bitfld.long 0x0 14. "ND14,New Data 14" "0,1" newline bitfld.long 0x0 13. "ND13,New Data 13" "0,1" bitfld.long 0x0 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x0 11. "ND11,New Data 11" "0,1" bitfld.long 0x0 10. "ND10,New Data 10" "0,1" newline bitfld.long 0x0 9. "ND9,New Data 9" "0,1" bitfld.long 0x0 8. "ND8,New Data 8" "0,1" newline bitfld.long 0x0 7. "ND7,New Data 7" "0,1" bitfld.long 0x0 6. "ND6,New Data 6" "0,1" newline bitfld.long 0x0 5. "ND5,New Data 5" "0,1" bitfld.long 0x0 4. "ND4,New Data 4" "0,1" newline bitfld.long 0x0 3. "ND3,New Data 3" "0,1" bitfld.long 0x0 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x0 1. "ND1,New Data 1" "0,1" bitfld.long 0x0 0. "ND0,New Data 0" "0,1" line.long 0x4 "NDAT2,New Data 2" bitfld.long 0x4 31. "ND63,New Data 63" "0,1" bitfld.long 0x4 30. "ND62,New Data 62" "0,1" newline bitfld.long 0x4 29. "ND61,New Data 61" "0,1" bitfld.long 0x4 28. "ND60,New Data 60" "0,1" newline bitfld.long 0x4 27. "ND59,New Data 59" "0,1" bitfld.long 0x4 26. "ND58,New Data 58" "0,1" newline bitfld.long 0x4 25. "ND57,New Data 57" "0,1" bitfld.long 0x4 24. "ND56,New Data 56" "0,1" newline bitfld.long 0x4 23. "ND55,New Data 55" "0,1" bitfld.long 0x4 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x4 21. "ND53,New Data 53" "0,1" bitfld.long 0x4 20. "ND52,New Data 52" "0,1" newline bitfld.long 0x4 19. "ND51,New Data 51" "0,1" bitfld.long 0x4 18. "ND50,New Data 50" "0,1" newline bitfld.long 0x4 17. "ND49,New Data 49" "0,1" bitfld.long 0x4 16. "ND48,New Data 48" "0,1" newline bitfld.long 0x4 15. "ND47,New Data 47" "0,1" bitfld.long 0x4 14. "ND46,New Data 46" "0,1" newline bitfld.long 0x4 13. "ND45,New Data 45" "0,1" bitfld.long 0x4 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x4 11. "ND43,New Data 43" "0,1" bitfld.long 0x4 10. "ND42,New Data 42" "0,1" newline bitfld.long 0x4 9. "ND41,New Data 41" "0,1" bitfld.long 0x4 8. "ND40,New Data 40" "0,1" newline bitfld.long 0x4 7. "ND39,New Data 39" "0,1" bitfld.long 0x4 6. "ND38,New Data 38" "0,1" newline bitfld.long 0x4 5. "ND37,New Data 37" "0,1" bitfld.long 0x4 4. "ND36,New Data 36" "0,1" newline bitfld.long 0x4 3. "ND35,New Data 35" "0,1" bitfld.long 0x4 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x4 1. "ND33,New Data 33" "0,1" bitfld.long 0x4 0. "ND32,New Data 32" "0,1" line.long 0x8 "RXF0C,Rx FIFO 0 Configuration" bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x8 0.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x3 line.long 0x0 "RXF0S,Rx FIFO 0 Status" bitfld.long 0x0 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 24. "F0F,Rx FIFO 0 Full" "0,1" newline hexmask.long.byte 0x0 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x0 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" newline hexmask.long.byte 0x0 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long 0xA8++0xB line.long 0x0 "RXF0A,Rx FIFO 0 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" line.long 0x4 "RXBC,Rx Buffer Configuration" hexmask.long.word 0x4 0.--15. 1. "RBSA,Rx Buffer Start Address" line.long 0x8 "RXF1C,Rx FIFO 1 Configuration" bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x8 0.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long 0xB4++0x3 line.long 0x0 "RXF1S,Rx FIFO 1 Status" bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state,1: Debug message A received,2: Debug message A/B received,3: Debug message A/B/C received DMA request set" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" newline bitfld.long 0x0 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" newline hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long 0xB8++0xB line.long 0x0 "RXF1A,Rx FIFO 1 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" line.long 0x4 "RXESC,Rx Buffer / FIFO Element Size Configuration" bitfld.long 0x4 8.--10. "RBDS,Rx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" bitfld.long 0x4 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" newline bitfld.long 0x4 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" line.long 0x8 "TXBC,Tx Buffer Configuration" bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" newline hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x8 0.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long 0xC4++0x3 line.long 0x0 "TXFQS,Tx FIFO / Queue Status" bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index" newline hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index" hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long 0xC8++0x3 line.long 0x0 "TXESC,Tx Buffer Element Size Configuration" bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" rgroup.long 0xCC++0x3 line.long 0x0 "TXBRP,Tx Buffer Request Pending" bitfld.long 0x0 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x0 30. "TRP30,Transmission Request Pending 30" "0,1" newline bitfld.long 0x0 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x0 28. "TRP28,Transmission Request Pending 28" "0,1" newline bitfld.long 0x0 27. "TRP27,Transmission Request Pending 27" "0,1" bitfld.long 0x0 26. "TRP26,Transmission Request Pending 26" "0,1" newline bitfld.long 0x0 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x0 24. "TRP24,Transmission Request Pending 24" "0,1" newline bitfld.long 0x0 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x0 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x0 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x0 20. "TRP20,Transmission Request Pending 20" "0,1" newline bitfld.long 0x0 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x0 18. "TRP18,Transmission Request Pending 18" "0,1" newline bitfld.long 0x0 17. "TRP17,Transmission Request Pending 17" "0,1" bitfld.long 0x0 16. "TRP16,Transmission Request Pending 16" "0,1" newline bitfld.long 0x0 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x0 14. "TRP14,Transmission Request Pending 14" "0,1" newline bitfld.long 0x0 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x0 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x0 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x0 10. "TRP10,Transmission Request Pending 10" "0,1" newline bitfld.long 0x0 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x0 8. "TRP8,Transmission Request Pending 8" "0,1" newline bitfld.long 0x0 7. "TRP7,Transmission Request Pending 7" "0,1" bitfld.long 0x0 6. "TRP6,Transmission Request Pending 6" "0,1" newline bitfld.long 0x0 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x0 4. "TRP4,Transmission Request Pending 4" "0,1" newline bitfld.long 0x0 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x0 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x0 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x0 0. "TRP0,Transmission Request Pending 0" "0,1" group.long 0xD0++0x7 line.long 0x0 "TXBAR,Tx Buffer Add Request" bitfld.long 0x0 31. "AR31,Add Request 31" "0,1" bitfld.long 0x0 30. "AR30,Add Request 30" "0,1" newline bitfld.long 0x0 29. "AR29,Add Request 29" "0,1" bitfld.long 0x0 28. "AR28,Add Request 28" "0,1" newline bitfld.long 0x0 27. "AR27,Add Request 27" "0,1" bitfld.long 0x0 26. "AR26,Add Request 26" "0,1" newline bitfld.long 0x0 25. "AR25,Add Request 25" "0,1" bitfld.long 0x0 24. "AR24,Add Request 24" "0,1" newline bitfld.long 0x0 23. "AR23,Add Request 23" "0,1" bitfld.long 0x0 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x0 21. "AR21,Add Request 21" "0,1" bitfld.long 0x0 20. "AR20,Add Request 20" "0,1" newline bitfld.long 0x0 19. "AR19,Add Request 19" "0,1" bitfld.long 0x0 18. "AR18,Add Request 18" "0,1" newline bitfld.long 0x0 17. "AR17,Add Request 17" "0,1" bitfld.long 0x0 16. "AR16,Add Request 16" "0,1" newline bitfld.long 0x0 15. "AR15,Add Request 15" "0,1" bitfld.long 0x0 14. "AR14,Add Request 14" "0,1" newline bitfld.long 0x0 13. "AR13,Add Request 13" "0,1" bitfld.long 0x0 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x0 11. "AR11,Add Request 11" "0,1" bitfld.long 0x0 10. "AR10,Add Request 10" "0,1" newline bitfld.long 0x0 9. "AR9,Add Request 9" "0,1" bitfld.long 0x0 8. "AR8,Add Request 8" "0,1" newline bitfld.long 0x0 7. "AR7,Add Request 7" "0,1" bitfld.long 0x0 6. "AR6,Add Request 6" "0,1" newline bitfld.long 0x0 5. "AR5,Add Request 5" "0,1" bitfld.long 0x0 4. "AR4,Add Request 4" "0,1" newline bitfld.long 0x0 3. "AR3,Add Request 3" "0,1" bitfld.long 0x0 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x0 1. "AR1,Add Request 1" "0,1" bitfld.long 0x0 0. "AR0,Add Request 0" "0,1" line.long 0x4 "TXBCR,Tx Buffer Cancellation Request" bitfld.long 0x4 31. "CR31,Cancellation Request 31" "0,1" bitfld.long 0x4 30. "CR30,Cancellation Request 30" "0,1" newline bitfld.long 0x4 29. "CR29,Cancellation Request 29" "0,1" bitfld.long 0x4 28. "CR28,Cancellation Request 28" "0,1" newline bitfld.long 0x4 27. "CR27,Cancellation Request 27" "0,1" bitfld.long 0x4 26. "CR26,Cancellation Request 26" "0,1" newline bitfld.long 0x4 25. "CR25,Cancellation Request 25" "0,1" bitfld.long 0x4 24. "CR24,Cancellation Request 24" "0,1" newline bitfld.long 0x4 23. "CR23,Cancellation Request 23" "0,1" bitfld.long 0x4 22. "CR22,Cancellation Request 22" "0,1" newline bitfld.long 0x4 21. "CR21,Cancellation Request 21" "0,1" bitfld.long 0x4 20. "CR20,Cancellation Request 20" "0,1" newline bitfld.long 0x4 19. "CR19,Cancellation Request 19" "0,1" bitfld.long 0x4 18. "CR18,Cancellation Request 18" "0,1" newline bitfld.long 0x4 17. "CR17,Cancellation Request 17" "0,1" bitfld.long 0x4 16. "CR16,Cancellation Request 16" "0,1" newline bitfld.long 0x4 15. "CR15,Cancellation Request 15" "0,1" bitfld.long 0x4 14. "CR14,Cancellation Request 14" "0,1" newline bitfld.long 0x4 13. "CR13,Cancellation Request 13" "0,1" bitfld.long 0x4 12. "CR12,Cancellation Request 12" "0,1" newline bitfld.long 0x4 11. "CR11,Cancellation Request 11" "0,1" bitfld.long 0x4 10. "CR10,Cancellation Request 10" "0,1" newline bitfld.long 0x4 9. "CR9,Cancellation Request 9" "0,1" bitfld.long 0x4 8. "CR8,Cancellation Request 8" "0,1" newline bitfld.long 0x4 7. "CR7,Cancellation Request 7" "0,1" bitfld.long 0x4 6. "CR6,Cancellation Request 6" "0,1" newline bitfld.long 0x4 5. "CR5,Cancellation Request 5" "0,1" bitfld.long 0x4 4. "CR4,Cancellation Request 4" "0,1" newline bitfld.long 0x4 3. "CR3,Cancellation Request 3" "0,1" bitfld.long 0x4 2. "CR2,Cancellation Request 2" "0,1" newline bitfld.long 0x4 1. "CR1,Cancellation Request 1" "0,1" bitfld.long 0x4 0. "CR0,Cancellation Request 0" "0,1" rgroup.long 0xD8++0x7 line.long 0x0 "TXBTO,Tx Buffer Transmission Occurred" bitfld.long 0x0 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x0 30. "TO30,Transmission Occurred 30" "0,1" newline bitfld.long 0x0 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x0 28. "TO28,Transmission Occurred 28" "0,1" newline bitfld.long 0x0 27. "TO27,Transmission Occurred 27" "0,1" bitfld.long 0x0 26. "TO26,Transmission Occurred 26" "0,1" newline bitfld.long 0x0 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x0 24. "TO24,Transmission Occurred 24" "0,1" newline bitfld.long 0x0 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x0 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x0 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x0 20. "TO20,Transmission Occurred 20" "0,1" newline bitfld.long 0x0 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x0 18. "TO18,Transmission Occurred 18" "0,1" newline bitfld.long 0x0 17. "TO17,Transmission Occurred 17" "0,1" bitfld.long 0x0 16. "TO16,Transmission Occurred 16" "0,1" newline bitfld.long 0x0 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x0 14. "TO14,Transmission Occurred 14" "0,1" newline bitfld.long 0x0 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x0 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x0 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x0 10. "TO10,Transmission Occurred 10" "0,1" newline bitfld.long 0x0 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x0 8. "TO8,Transmission Occurred 8" "0,1" newline bitfld.long 0x0 7. "TO7,Transmission Occurred 7" "0,1" bitfld.long 0x0 6. "TO6,Transmission Occurred 6" "0,1" newline bitfld.long 0x0 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x0 4. "TO4,Transmission Occurred 4" "0,1" newline bitfld.long 0x0 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x0 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x0 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x0 0. "TO0,Transmission Occurred 0" "0,1" line.long 0x4 "TXBCF,Tx Buffer Cancellation Finished" bitfld.long 0x4 31. "CF31,Tx Buffer Cancellation Finished 31" "0,1" bitfld.long 0x4 30. "CF30,Tx Buffer Cancellation Finished 30" "0,1" newline bitfld.long 0x4 29. "CF29,Tx Buffer Cancellation Finished 29" "0,1" bitfld.long 0x4 28. "CF28,Tx Buffer Cancellation Finished 28" "0,1" newline bitfld.long 0x4 27. "CF27,Tx Buffer Cancellation Finished 27" "0,1" bitfld.long 0x4 26. "CF26,Tx Buffer Cancellation Finished 26" "0,1" newline bitfld.long 0x4 25. "CF25,Tx Buffer Cancellation Finished 25" "0,1" bitfld.long 0x4 24. "CF24,Tx Buffer Cancellation Finished 24" "0,1" newline bitfld.long 0x4 23. "CF23,Tx Buffer Cancellation Finished 23" "0,1" bitfld.long 0x4 22. "CF22,Tx Buffer Cancellation Finished 22" "0,1" newline bitfld.long 0x4 21. "CF21,Tx Buffer Cancellation Finished 21" "0,1" bitfld.long 0x4 20. "CF20,Tx Buffer Cancellation Finished 20" "0,1" newline bitfld.long 0x4 19. "CF19,Tx Buffer Cancellation Finished 19" "0,1" bitfld.long 0x4 18. "CF18,Tx Buffer Cancellation Finished 18" "0,1" newline bitfld.long 0x4 17. "CF17,Tx Buffer Cancellation Finished 17" "0,1" bitfld.long 0x4 16. "CF16,Tx Buffer Cancellation Finished 16" "0,1" newline bitfld.long 0x4 15. "CF15,Tx Buffer Cancellation Finished 15" "0,1" bitfld.long 0x4 14. "CF14,Tx Buffer Cancellation Finished 14" "0,1" newline bitfld.long 0x4 13. "CF13,Tx Buffer Cancellation Finished 13" "0,1" bitfld.long 0x4 12. "CF12,Tx Buffer Cancellation Finished 12" "0,1" newline bitfld.long 0x4 11. "CF11,Tx Buffer Cancellation Finished 11" "0,1" bitfld.long 0x4 10. "CF10,Tx Buffer Cancellation Finished 10" "0,1" newline bitfld.long 0x4 9. "CF9,Tx Buffer Cancellation Finished 9" "0,1" bitfld.long 0x4 8. "CF8,Tx Buffer Cancellation Finished 8" "0,1" newline bitfld.long 0x4 7. "CF7,Tx Buffer Cancellation Finished 7" "0,1" bitfld.long 0x4 6. "CF6,Tx Buffer Cancellation Finished 6" "0,1" newline bitfld.long 0x4 5. "CF5,Tx Buffer Cancellation Finished 5" "0,1" bitfld.long 0x4 4. "CF4,Tx Buffer Cancellation Finished 4" "0,1" newline bitfld.long 0x4 3. "CF3,Tx Buffer Cancellation Finished 3" "0,1" bitfld.long 0x4 2. "CF2,Tx Buffer Cancellation Finished 2" "0,1" newline bitfld.long 0x4 1. "CF1,Tx Buffer Cancellation Finished 1" "0,1" bitfld.long 0x4 0. "CF0,Tx Buffer Cancellation Finished 0" "0,1" group.long 0xE0++0x7 line.long 0x0 "TXBTIE,Tx Buffer Transmission Interrupt Enable" bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable 31" "0,1" bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable 30" "0,1" newline bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable 29" "0,1" bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable 28" "0,1" newline bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable 27" "0,1" bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable 26" "0,1" newline bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable 25" "0,1" bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable 24" "0,1" newline bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable 23" "0,1" bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable 22" "0,1" newline bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable 21" "0,1" bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable 20" "0,1" newline bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable 19" "0,1" bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable 18" "0,1" newline bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable 17" "0,1" bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable 16" "0,1" newline bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable 15" "0,1" bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable 14" "0,1" newline bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable 13" "0,1" bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable 12" "0,1" newline bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable 11" "0,1" bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable 10" "0,1" newline bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable 9" "0,1" bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable 8" "0,1" newline bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable 7" "0,1" bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable 6" "0,1" newline bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable 5" "0,1" bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable 4" "0,1" newline bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable 3" "0,1" bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable 2" "0,1" newline bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable 1" "0,1" bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable 0" "0,1" line.long 0x4 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable" bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable 31" "0,1" bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable 30" "0,1" newline bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable 29" "0,1" bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable 28" "0,1" newline bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable 27" "0,1" bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable 26" "0,1" newline bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable 25" "0,1" bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable 24" "0,1" newline bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable 23" "0,1" bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable 22" "0,1" newline bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable 21" "0,1" bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable 20" "0,1" newline bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable 19" "0,1" bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable 18" "0,1" newline bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable 17" "0,1" bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable 16" "0,1" newline bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable 15" "0,1" bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable 14" "0,1" newline bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable 13" "0,1" bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable 12" "0,1" newline bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable 11" "0,1" bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable 10" "0,1" newline bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable 9" "0,1" bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable 8" "0,1" newline bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable 7" "0,1" bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable 6" "0,1" newline bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable 5" "0,1" bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable 4" "0,1" newline bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable 3" "0,1" bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable 2" "0,1" newline bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable 1" "0,1" bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable 0" "0,1" group.long 0xF0++0x3 line.long 0x0 "TXEFC,Tx Event FIFO Configuration" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size" newline hexmask.long.word 0x0 0.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long 0xF4++0x3 line.long 0x0 "TXEFS,Tx Event FIFO Status" bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1" newline hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index" newline hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level" group.long 0xF8++0x3 line.long 0x0 "TXEFA,Tx Event FIFO Acknowledge" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index" group.long 0x100++0x3 line.long 0x0 "ERROR,Error Interrupt Flag" bitfld.long 0x0 0. "BERR,AHB Bus Error Detection" "0,1" tree.end tree "CAN1" base ad:0x46060000 rgroup.long 0x0++0x7 line.long 0x0 "CREL,Core Release" hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release" newline hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release" line.long 0x4 "ENDN,Endian" hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value" group.long 0x8++0x1B line.long 0x0 "MRCFG,Message RAM Configuration" hexmask.long.byte 0x0 16.--23. 1. "OFFSET,Base address offset" line.long 0x4 "DBTP,Fast Bit Timing and Prescaler" bitfld.long 0x4 23. "TDC,Tranceiver Delay Compensation" "0,1" hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Baud Rate Prescaler" newline hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data time segment after sample point" newline hexmask.long.byte 0x4 0.--3. 1. "DSJW,Data (Re)Synchronization Jump Width" line.long 0x8 "TEST,Test" bitfld.long 0x8 7. "RX,Receive Pin" "0,1" bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin" "0: TX controlled by CAN core,1: TX monitoring sample point,2: Dominant (0) level at pin CAN_TX,3: Recessive (1) level at pin CAN_TX" newline bitfld.long 0x8 4. "LBCK,Loop Back Mode" "0,1" line.long 0xC "RWD,RAM Watchdog" hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration" line.long 0x10 "CCCR,CC Control" bitfld.long 0x10 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration" "0,1" newline bitfld.long 0x10 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x10 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x10 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x10 7. "TEST,Test Mode Enable" "0,1" newline bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x10 5. "MON,Bus Monitoring Mode" "0,1" newline bitfld.long 0x10 4. "CSR,Clock Stop Request" "0,1" bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge" "0,1" newline bitfld.long 0x10 2. "ASM,ASM Restricted Operation Mode" "0,1" bitfld.long 0x10 1. "CCE,Configuration Change Enable" "0,1" newline bitfld.long 0x10 0. "INIT,Initialization" "0,1" line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler" hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Baud Rate Prescaler" newline hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" line.long 0x18 "TSCC,Timestamp Counter Configuration" hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler" bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented by TCP,?,?" rgroup.long 0x24++0x3 line.long 0x0 "TSCV,Timestamp Counter Value" hexmask.long.word 0x0 0.--15. 1. "TSC,Timestamp Counter" group.long 0x28++0x7 line.long 0x0 "TOCC,Timeout Counter Configuration" hexmask.long.word 0x0 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x0 1.--2. "TOS,Timeout Select" "0: Continuout operation,1: Timeout controlled by TX Event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1" newline bitfld.long 0x0 0. "ETOC,Enable Timeout Counter" "0,1" line.long 0x4 "TOCV,Timeout Counter Value" hexmask.long.word 0x4 0.--15. 1. "TOC,Timeout Counter" rgroup.long 0x40++0x7 line.long 0x0 "ECR,Error Counter" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1" newline hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter" line.long 0x4 "PSR,Protocol Status" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x4 14. "PXE,Protocol Exception Event" "0,1" newline bitfld.long 0x4 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x4 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" newline bitfld.long 0x4 11. "RESI,ESI flag of last received CAN FD Message" "0,1" bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" newline bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1" bitfld.long 0x4 6. "EW,Warning Status" "0,1" newline bitfld.long 0x4 5. "EP,Error Passive" "0,1" bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter" newline bitfld.long 0x4 0.--2. "LEC,Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" group.long 0x48++0x3 line.long 0x0 "TDCR,Extended ID Filter Configuration" hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset" hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Length" group.long 0x50++0xF line.long 0x0 "IR,Interrupt" bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1" newline bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1" bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1" newline bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1" bitfld.long 0x0 24. "EW,Warning Status" "0,1" newline bitfld.long 0x0 23. "EP,Error Passive" "0,1" bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1" newline bitfld.long 0x0 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1" newline bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1" newline bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1" newline bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1" newline bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x0 9. "TC,Timestamp Completed" "0,1" bitfld.long 0x0 8. "HPM,High Priority Message" "0,1" newline bitfld.long 0x0 7. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x0 6. "RF1F,Rx FIFO 1 FIFO Full" "0,1" newline bitfld.long 0x0 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 New Message" "0,1" newline bitfld.long 0x0 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 Full" "0,1" newline bitfld.long 0x0 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New Message" "0,1" line.long 0x4 "IE,Interrupt Enable" bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1" newline bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Interrupt Enable" "0,1" newline bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1" bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Element Lost Interrupt Enable" "0,1" bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x4 9. "TCE,Timestamp Completed Interrupt Enable" "0,1" bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1" newline bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 New Message Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 Full Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 New Message Interrupt Enable" "0,1" line.long 0x8 "ILS,Interrupt Line Select" bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1" newline bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Interrupt Line" "0,1" newline bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1" bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1" newline bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1" bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1" newline bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Rx Buffer Interrupt Line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1" newline bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1" newline bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Element Lost Interrupt Line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1" newline bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1" newline bitfld.long 0x8 9. "TCL,Timestamp Completed Interrupt Line" "0,1" bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1" newline bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 New Message Interrupt Line" "0,1" newline bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 Full Interrupt Line" "0,1" newline bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 New Message Interrupt Line" "0,1" line.long 0xC "ILE,Interrupt Line Enable" bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long 0x80++0xB line.long 0x0 "GFC,Global Filter Configuration" bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" newline bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0,1" line.long 0x4 "SIDFC,Standard ID Filter Configuration" hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x4 0.--15. 1. "FLSSA,Filter List Standard Start Address" line.long 0x8 "XIDFC,Extended ID Filter Configuration" hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended" hexmask.long.word 0x8 0.--15. 1. "FLESA,Filter List Extended Start Address" group.long 0x90++0x3 line.long 0x0 "XIDAM,Extended ID AND Mask" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "HPMS,High Priority Message Status" bitfld.long 0x0 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index" newline bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected,1: FIFO message lost,2: Message stored in FIFO 0,3: Message stored in FIFO 1" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index" group.long 0x98++0xB line.long 0x0 "NDAT1,New Data 1" bitfld.long 0x0 31. "ND31,New Data 31" "0,1" bitfld.long 0x0 30. "ND30,New Data 30" "0,1" newline bitfld.long 0x0 29. "ND29,New Data 29" "0,1" bitfld.long 0x0 28. "ND28,New Data 28" "0,1" newline bitfld.long 0x0 27. "ND27,New Data 27" "0,1" bitfld.long 0x0 26. "ND26,New Data 26" "0,1" newline bitfld.long 0x0 25. "ND25,New Data 25" "0,1" bitfld.long 0x0 24. "ND24,New Data 24" "0,1" newline bitfld.long 0x0 23. "ND23,New Data 23" "0,1" bitfld.long 0x0 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x0 21. "ND21,New Data 21" "0,1" bitfld.long 0x0 20. "ND20,New Data 20" "0,1" newline bitfld.long 0x0 19. "ND19,New Data 19" "0,1" bitfld.long 0x0 18. "ND18,New Data 18" "0,1" newline bitfld.long 0x0 17. "ND17,New Data 17" "0,1" bitfld.long 0x0 16. "ND16,New Data 16" "0,1" newline bitfld.long 0x0 15. "ND15,New Data 15" "0,1" bitfld.long 0x0 14. "ND14,New Data 14" "0,1" newline bitfld.long 0x0 13. "ND13,New Data 13" "0,1" bitfld.long 0x0 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x0 11. "ND11,New Data 11" "0,1" bitfld.long 0x0 10. "ND10,New Data 10" "0,1" newline bitfld.long 0x0 9. "ND9,New Data 9" "0,1" bitfld.long 0x0 8. "ND8,New Data 8" "0,1" newline bitfld.long 0x0 7. "ND7,New Data 7" "0,1" bitfld.long 0x0 6. "ND6,New Data 6" "0,1" newline bitfld.long 0x0 5. "ND5,New Data 5" "0,1" bitfld.long 0x0 4. "ND4,New Data 4" "0,1" newline bitfld.long 0x0 3. "ND3,New Data 3" "0,1" bitfld.long 0x0 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x0 1. "ND1,New Data 1" "0,1" bitfld.long 0x0 0. "ND0,New Data 0" "0,1" line.long 0x4 "NDAT2,New Data 2" bitfld.long 0x4 31. "ND63,New Data 63" "0,1" bitfld.long 0x4 30. "ND62,New Data 62" "0,1" newline bitfld.long 0x4 29. "ND61,New Data 61" "0,1" bitfld.long 0x4 28. "ND60,New Data 60" "0,1" newline bitfld.long 0x4 27. "ND59,New Data 59" "0,1" bitfld.long 0x4 26. "ND58,New Data 58" "0,1" newline bitfld.long 0x4 25. "ND57,New Data 57" "0,1" bitfld.long 0x4 24. "ND56,New Data 56" "0,1" newline bitfld.long 0x4 23. "ND55,New Data 55" "0,1" bitfld.long 0x4 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x4 21. "ND53,New Data 53" "0,1" bitfld.long 0x4 20. "ND52,New Data 52" "0,1" newline bitfld.long 0x4 19. "ND51,New Data 51" "0,1" bitfld.long 0x4 18. "ND50,New Data 50" "0,1" newline bitfld.long 0x4 17. "ND49,New Data 49" "0,1" bitfld.long 0x4 16. "ND48,New Data 48" "0,1" newline bitfld.long 0x4 15. "ND47,New Data 47" "0,1" bitfld.long 0x4 14. "ND46,New Data 46" "0,1" newline bitfld.long 0x4 13. "ND45,New Data 45" "0,1" bitfld.long 0x4 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x4 11. "ND43,New Data 43" "0,1" bitfld.long 0x4 10. "ND42,New Data 42" "0,1" newline bitfld.long 0x4 9. "ND41,New Data 41" "0,1" bitfld.long 0x4 8. "ND40,New Data 40" "0,1" newline bitfld.long 0x4 7. "ND39,New Data 39" "0,1" bitfld.long 0x4 6. "ND38,New Data 38" "0,1" newline bitfld.long 0x4 5. "ND37,New Data 37" "0,1" bitfld.long 0x4 4. "ND36,New Data 36" "0,1" newline bitfld.long 0x4 3. "ND35,New Data 35" "0,1" bitfld.long 0x4 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x4 1. "ND33,New Data 33" "0,1" bitfld.long 0x4 0. "ND32,New Data 32" "0,1" line.long 0x8 "RXF0C,Rx FIFO 0 Configuration" bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x8 0.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x3 line.long 0x0 "RXF0S,Rx FIFO 0 Status" bitfld.long 0x0 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 24. "F0F,Rx FIFO 0 Full" "0,1" newline hexmask.long.byte 0x0 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x0 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" newline hexmask.long.byte 0x0 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long 0xA8++0xB line.long 0x0 "RXF0A,Rx FIFO 0 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" line.long 0x4 "RXBC,Rx Buffer Configuration" hexmask.long.word 0x4 0.--15. 1. "RBSA,Rx Buffer Start Address" line.long 0x8 "RXF1C,Rx FIFO 1 Configuration" bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x8 0.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long 0xB4++0x3 line.long 0x0 "RXF1S,Rx FIFO 1 Status" bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state,1: Debug message A received,2: Debug message A/B received,3: Debug message A/B/C received DMA request set" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" newline bitfld.long 0x0 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" newline hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long 0xB8++0xB line.long 0x0 "RXF1A,Rx FIFO 1 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" line.long 0x4 "RXESC,Rx Buffer / FIFO Element Size Configuration" bitfld.long 0x4 8.--10. "RBDS,Rx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" bitfld.long 0x4 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" newline bitfld.long 0x4 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" line.long 0x8 "TXBC,Tx Buffer Configuration" bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" newline hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x8 0.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long 0xC4++0x3 line.long 0x0 "TXFQS,Tx FIFO / Queue Status" bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index" newline hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index" hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long 0xC8++0x3 line.long 0x0 "TXESC,Tx Buffer Element Size Configuration" bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" rgroup.long 0xCC++0x3 line.long 0x0 "TXBRP,Tx Buffer Request Pending" bitfld.long 0x0 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x0 30. "TRP30,Transmission Request Pending 30" "0,1" newline bitfld.long 0x0 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x0 28. "TRP28,Transmission Request Pending 28" "0,1" newline bitfld.long 0x0 27. "TRP27,Transmission Request Pending 27" "0,1" bitfld.long 0x0 26. "TRP26,Transmission Request Pending 26" "0,1" newline bitfld.long 0x0 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x0 24. "TRP24,Transmission Request Pending 24" "0,1" newline bitfld.long 0x0 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x0 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x0 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x0 20. "TRP20,Transmission Request Pending 20" "0,1" newline bitfld.long 0x0 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x0 18. "TRP18,Transmission Request Pending 18" "0,1" newline bitfld.long 0x0 17. "TRP17,Transmission Request Pending 17" "0,1" bitfld.long 0x0 16. "TRP16,Transmission Request Pending 16" "0,1" newline bitfld.long 0x0 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x0 14. "TRP14,Transmission Request Pending 14" "0,1" newline bitfld.long 0x0 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x0 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x0 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x0 10. "TRP10,Transmission Request Pending 10" "0,1" newline bitfld.long 0x0 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x0 8. "TRP8,Transmission Request Pending 8" "0,1" newline bitfld.long 0x0 7. "TRP7,Transmission Request Pending 7" "0,1" bitfld.long 0x0 6. "TRP6,Transmission Request Pending 6" "0,1" newline bitfld.long 0x0 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x0 4. "TRP4,Transmission Request Pending 4" "0,1" newline bitfld.long 0x0 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x0 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x0 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x0 0. "TRP0,Transmission Request Pending 0" "0,1" group.long 0xD0++0x7 line.long 0x0 "TXBAR,Tx Buffer Add Request" bitfld.long 0x0 31. "AR31,Add Request 31" "0,1" bitfld.long 0x0 30. "AR30,Add Request 30" "0,1" newline bitfld.long 0x0 29. "AR29,Add Request 29" "0,1" bitfld.long 0x0 28. "AR28,Add Request 28" "0,1" newline bitfld.long 0x0 27. "AR27,Add Request 27" "0,1" bitfld.long 0x0 26. "AR26,Add Request 26" "0,1" newline bitfld.long 0x0 25. "AR25,Add Request 25" "0,1" bitfld.long 0x0 24. "AR24,Add Request 24" "0,1" newline bitfld.long 0x0 23. "AR23,Add Request 23" "0,1" bitfld.long 0x0 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x0 21. "AR21,Add Request 21" "0,1" bitfld.long 0x0 20. "AR20,Add Request 20" "0,1" newline bitfld.long 0x0 19. "AR19,Add Request 19" "0,1" bitfld.long 0x0 18. "AR18,Add Request 18" "0,1" newline bitfld.long 0x0 17. "AR17,Add Request 17" "0,1" bitfld.long 0x0 16. "AR16,Add Request 16" "0,1" newline bitfld.long 0x0 15. "AR15,Add Request 15" "0,1" bitfld.long 0x0 14. "AR14,Add Request 14" "0,1" newline bitfld.long 0x0 13. "AR13,Add Request 13" "0,1" bitfld.long 0x0 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x0 11. "AR11,Add Request 11" "0,1" bitfld.long 0x0 10. "AR10,Add Request 10" "0,1" newline bitfld.long 0x0 9. "AR9,Add Request 9" "0,1" bitfld.long 0x0 8. "AR8,Add Request 8" "0,1" newline bitfld.long 0x0 7. "AR7,Add Request 7" "0,1" bitfld.long 0x0 6. "AR6,Add Request 6" "0,1" newline bitfld.long 0x0 5. "AR5,Add Request 5" "0,1" bitfld.long 0x0 4. "AR4,Add Request 4" "0,1" newline bitfld.long 0x0 3. "AR3,Add Request 3" "0,1" bitfld.long 0x0 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x0 1. "AR1,Add Request 1" "0,1" bitfld.long 0x0 0. "AR0,Add Request 0" "0,1" line.long 0x4 "TXBCR,Tx Buffer Cancellation Request" bitfld.long 0x4 31. "CR31,Cancellation Request 31" "0,1" bitfld.long 0x4 30. "CR30,Cancellation Request 30" "0,1" newline bitfld.long 0x4 29. "CR29,Cancellation Request 29" "0,1" bitfld.long 0x4 28. "CR28,Cancellation Request 28" "0,1" newline bitfld.long 0x4 27. "CR27,Cancellation Request 27" "0,1" bitfld.long 0x4 26. "CR26,Cancellation Request 26" "0,1" newline bitfld.long 0x4 25. "CR25,Cancellation Request 25" "0,1" bitfld.long 0x4 24. "CR24,Cancellation Request 24" "0,1" newline bitfld.long 0x4 23. "CR23,Cancellation Request 23" "0,1" bitfld.long 0x4 22. "CR22,Cancellation Request 22" "0,1" newline bitfld.long 0x4 21. "CR21,Cancellation Request 21" "0,1" bitfld.long 0x4 20. "CR20,Cancellation Request 20" "0,1" newline bitfld.long 0x4 19. "CR19,Cancellation Request 19" "0,1" bitfld.long 0x4 18. "CR18,Cancellation Request 18" "0,1" newline bitfld.long 0x4 17. "CR17,Cancellation Request 17" "0,1" bitfld.long 0x4 16. "CR16,Cancellation Request 16" "0,1" newline bitfld.long 0x4 15. "CR15,Cancellation Request 15" "0,1" bitfld.long 0x4 14. "CR14,Cancellation Request 14" "0,1" newline bitfld.long 0x4 13. "CR13,Cancellation Request 13" "0,1" bitfld.long 0x4 12. "CR12,Cancellation Request 12" "0,1" newline bitfld.long 0x4 11. "CR11,Cancellation Request 11" "0,1" bitfld.long 0x4 10. "CR10,Cancellation Request 10" "0,1" newline bitfld.long 0x4 9. "CR9,Cancellation Request 9" "0,1" bitfld.long 0x4 8. "CR8,Cancellation Request 8" "0,1" newline bitfld.long 0x4 7. "CR7,Cancellation Request 7" "0,1" bitfld.long 0x4 6. "CR6,Cancellation Request 6" "0,1" newline bitfld.long 0x4 5. "CR5,Cancellation Request 5" "0,1" bitfld.long 0x4 4. "CR4,Cancellation Request 4" "0,1" newline bitfld.long 0x4 3. "CR3,Cancellation Request 3" "0,1" bitfld.long 0x4 2. "CR2,Cancellation Request 2" "0,1" newline bitfld.long 0x4 1. "CR1,Cancellation Request 1" "0,1" bitfld.long 0x4 0. "CR0,Cancellation Request 0" "0,1" rgroup.long 0xD8++0x7 line.long 0x0 "TXBTO,Tx Buffer Transmission Occurred" bitfld.long 0x0 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x0 30. "TO30,Transmission Occurred 30" "0,1" newline bitfld.long 0x0 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x0 28. "TO28,Transmission Occurred 28" "0,1" newline bitfld.long 0x0 27. "TO27,Transmission Occurred 27" "0,1" bitfld.long 0x0 26. "TO26,Transmission Occurred 26" "0,1" newline bitfld.long 0x0 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x0 24. "TO24,Transmission Occurred 24" "0,1" newline bitfld.long 0x0 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x0 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x0 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x0 20. "TO20,Transmission Occurred 20" "0,1" newline bitfld.long 0x0 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x0 18. "TO18,Transmission Occurred 18" "0,1" newline bitfld.long 0x0 17. "TO17,Transmission Occurred 17" "0,1" bitfld.long 0x0 16. "TO16,Transmission Occurred 16" "0,1" newline bitfld.long 0x0 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x0 14. "TO14,Transmission Occurred 14" "0,1" newline bitfld.long 0x0 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x0 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x0 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x0 10. "TO10,Transmission Occurred 10" "0,1" newline bitfld.long 0x0 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x0 8. "TO8,Transmission Occurred 8" "0,1" newline bitfld.long 0x0 7. "TO7,Transmission Occurred 7" "0,1" bitfld.long 0x0 6. "TO6,Transmission Occurred 6" "0,1" newline bitfld.long 0x0 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x0 4. "TO4,Transmission Occurred 4" "0,1" newline bitfld.long 0x0 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x0 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x0 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x0 0. "TO0,Transmission Occurred 0" "0,1" line.long 0x4 "TXBCF,Tx Buffer Cancellation Finished" bitfld.long 0x4 31. "CF31,Tx Buffer Cancellation Finished 31" "0,1" bitfld.long 0x4 30. "CF30,Tx Buffer Cancellation Finished 30" "0,1" newline bitfld.long 0x4 29. "CF29,Tx Buffer Cancellation Finished 29" "0,1" bitfld.long 0x4 28. "CF28,Tx Buffer Cancellation Finished 28" "0,1" newline bitfld.long 0x4 27. "CF27,Tx Buffer Cancellation Finished 27" "0,1" bitfld.long 0x4 26. "CF26,Tx Buffer Cancellation Finished 26" "0,1" newline bitfld.long 0x4 25. "CF25,Tx Buffer Cancellation Finished 25" "0,1" bitfld.long 0x4 24. "CF24,Tx Buffer Cancellation Finished 24" "0,1" newline bitfld.long 0x4 23. "CF23,Tx Buffer Cancellation Finished 23" "0,1" bitfld.long 0x4 22. "CF22,Tx Buffer Cancellation Finished 22" "0,1" newline bitfld.long 0x4 21. "CF21,Tx Buffer Cancellation Finished 21" "0,1" bitfld.long 0x4 20. "CF20,Tx Buffer Cancellation Finished 20" "0,1" newline bitfld.long 0x4 19. "CF19,Tx Buffer Cancellation Finished 19" "0,1" bitfld.long 0x4 18. "CF18,Tx Buffer Cancellation Finished 18" "0,1" newline bitfld.long 0x4 17. "CF17,Tx Buffer Cancellation Finished 17" "0,1" bitfld.long 0x4 16. "CF16,Tx Buffer Cancellation Finished 16" "0,1" newline bitfld.long 0x4 15. "CF15,Tx Buffer Cancellation Finished 15" "0,1" bitfld.long 0x4 14. "CF14,Tx Buffer Cancellation Finished 14" "0,1" newline bitfld.long 0x4 13. "CF13,Tx Buffer Cancellation Finished 13" "0,1" bitfld.long 0x4 12. "CF12,Tx Buffer Cancellation Finished 12" "0,1" newline bitfld.long 0x4 11. "CF11,Tx Buffer Cancellation Finished 11" "0,1" bitfld.long 0x4 10. "CF10,Tx Buffer Cancellation Finished 10" "0,1" newline bitfld.long 0x4 9. "CF9,Tx Buffer Cancellation Finished 9" "0,1" bitfld.long 0x4 8. "CF8,Tx Buffer Cancellation Finished 8" "0,1" newline bitfld.long 0x4 7. "CF7,Tx Buffer Cancellation Finished 7" "0,1" bitfld.long 0x4 6. "CF6,Tx Buffer Cancellation Finished 6" "0,1" newline bitfld.long 0x4 5. "CF5,Tx Buffer Cancellation Finished 5" "0,1" bitfld.long 0x4 4. "CF4,Tx Buffer Cancellation Finished 4" "0,1" newline bitfld.long 0x4 3. "CF3,Tx Buffer Cancellation Finished 3" "0,1" bitfld.long 0x4 2. "CF2,Tx Buffer Cancellation Finished 2" "0,1" newline bitfld.long 0x4 1. "CF1,Tx Buffer Cancellation Finished 1" "0,1" bitfld.long 0x4 0. "CF0,Tx Buffer Cancellation Finished 0" "0,1" group.long 0xE0++0x7 line.long 0x0 "TXBTIE,Tx Buffer Transmission Interrupt Enable" bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable 31" "0,1" bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable 30" "0,1" newline bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable 29" "0,1" bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable 28" "0,1" newline bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable 27" "0,1" bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable 26" "0,1" newline bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable 25" "0,1" bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable 24" "0,1" newline bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable 23" "0,1" bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable 22" "0,1" newline bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable 21" "0,1" bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable 20" "0,1" newline bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable 19" "0,1" bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable 18" "0,1" newline bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable 17" "0,1" bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable 16" "0,1" newline bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable 15" "0,1" bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable 14" "0,1" newline bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable 13" "0,1" bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable 12" "0,1" newline bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable 11" "0,1" bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable 10" "0,1" newline bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable 9" "0,1" bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable 8" "0,1" newline bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable 7" "0,1" bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable 6" "0,1" newline bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable 5" "0,1" bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable 4" "0,1" newline bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable 3" "0,1" bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable 2" "0,1" newline bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable 1" "0,1" bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable 0" "0,1" line.long 0x4 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable" bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable 31" "0,1" bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable 30" "0,1" newline bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable 29" "0,1" bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable 28" "0,1" newline bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable 27" "0,1" bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable 26" "0,1" newline bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable 25" "0,1" bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable 24" "0,1" newline bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable 23" "0,1" bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable 22" "0,1" newline bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable 21" "0,1" bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable 20" "0,1" newline bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable 19" "0,1" bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable 18" "0,1" newline bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable 17" "0,1" bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable 16" "0,1" newline bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable 15" "0,1" bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable 14" "0,1" newline bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable 13" "0,1" bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable 12" "0,1" newline bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable 11" "0,1" bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable 10" "0,1" newline bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable 9" "0,1" bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable 8" "0,1" newline bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable 7" "0,1" bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable 6" "0,1" newline bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable 5" "0,1" bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable 4" "0,1" newline bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable 3" "0,1" bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable 2" "0,1" newline bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable 1" "0,1" bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable 0" "0,1" group.long 0xF0++0x3 line.long 0x0 "TXEFC,Tx Event FIFO Configuration" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size" newline hexmask.long.word 0x0 0.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long 0xF4++0x3 line.long 0x0 "TXEFS,Tx Event FIFO Status" bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1" newline hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index" newline hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level" group.long 0xF8++0x3 line.long 0x0 "TXEFA,Tx Event FIFO Acknowledge" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index" group.long 0x100++0x3 line.long 0x0 "ERROR,Error Interrupt Flag" bitfld.long 0x0 0. "BERR,AHB Bus Error Detection" "0,1" tree.end tree "CAN2" base ad:0x46062000 rgroup.long 0x0++0x7 line.long 0x0 "CREL,Core Release" hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release" newline hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release" line.long 0x4 "ENDN,Endian" hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value" group.long 0x8++0x1B line.long 0x0 "MRCFG,Message RAM Configuration" hexmask.long.byte 0x0 16.--23. 1. "OFFSET,Base address offset" line.long 0x4 "DBTP,Fast Bit Timing and Prescaler" bitfld.long 0x4 23. "TDC,Tranceiver Delay Compensation" "0,1" hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Baud Rate Prescaler" newline hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data time segment after sample point" newline hexmask.long.byte 0x4 0.--3. 1. "DSJW,Data (Re)Synchronization Jump Width" line.long 0x8 "TEST,Test" bitfld.long 0x8 7. "RX,Receive Pin" "0,1" bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin" "0: TX controlled by CAN core,1: TX monitoring sample point,2: Dominant (0) level at pin CAN_TX,3: Recessive (1) level at pin CAN_TX" newline bitfld.long 0x8 4. "LBCK,Loop Back Mode" "0,1" line.long 0xC "RWD,RAM Watchdog" hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration" line.long 0x10 "CCCR,CC Control" bitfld.long 0x10 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration" "0,1" newline bitfld.long 0x10 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x10 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x10 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x10 7. "TEST,Test Mode Enable" "0,1" newline bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x10 5. "MON,Bus Monitoring Mode" "0,1" newline bitfld.long 0x10 4. "CSR,Clock Stop Request" "0,1" bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge" "0,1" newline bitfld.long 0x10 2. "ASM,ASM Restricted Operation Mode" "0,1" bitfld.long 0x10 1. "CCE,Configuration Change Enable" "0,1" newline bitfld.long 0x10 0. "INIT,Initialization" "0,1" line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler" hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Baud Rate Prescaler" newline hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" line.long 0x18 "TSCC,Timestamp Counter Configuration" hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler" bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented by TCP,?,?" rgroup.long 0x24++0x3 line.long 0x0 "TSCV,Timestamp Counter Value" hexmask.long.word 0x0 0.--15. 1. "TSC,Timestamp Counter" group.long 0x28++0x7 line.long 0x0 "TOCC,Timeout Counter Configuration" hexmask.long.word 0x0 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x0 1.--2. "TOS,Timeout Select" "0: Continuout operation,1: Timeout controlled by TX Event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1" newline bitfld.long 0x0 0. "ETOC,Enable Timeout Counter" "0,1" line.long 0x4 "TOCV,Timeout Counter Value" hexmask.long.word 0x4 0.--15. 1. "TOC,Timeout Counter" rgroup.long 0x40++0x7 line.long 0x0 "ECR,Error Counter" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1" newline hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter" line.long 0x4 "PSR,Protocol Status" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x4 14. "PXE,Protocol Exception Event" "0,1" newline bitfld.long 0x4 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x4 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" newline bitfld.long 0x4 11. "RESI,ESI flag of last received CAN FD Message" "0,1" bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" newline bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1" bitfld.long 0x4 6. "EW,Warning Status" "0,1" newline bitfld.long 0x4 5. "EP,Error Passive" "0,1" bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter" newline bitfld.long 0x4 0.--2. "LEC,Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" group.long 0x48++0x3 line.long 0x0 "TDCR,Extended ID Filter Configuration" hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset" hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Length" group.long 0x50++0xF line.long 0x0 "IR,Interrupt" bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1" newline bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1" bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1" newline bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1" bitfld.long 0x0 24. "EW,Warning Status" "0,1" newline bitfld.long 0x0 23. "EP,Error Passive" "0,1" bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1" newline bitfld.long 0x0 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1" newline bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1" newline bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1" newline bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1" newline bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x0 9. "TC,Timestamp Completed" "0,1" bitfld.long 0x0 8. "HPM,High Priority Message" "0,1" newline bitfld.long 0x0 7. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x0 6. "RF1F,Rx FIFO 1 FIFO Full" "0,1" newline bitfld.long 0x0 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 New Message" "0,1" newline bitfld.long 0x0 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 Full" "0,1" newline bitfld.long 0x0 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New Message" "0,1" line.long 0x4 "IE,Interrupt Enable" bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1" newline bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Interrupt Enable" "0,1" newline bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1" bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Element Lost Interrupt Enable" "0,1" bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x4 9. "TCE,Timestamp Completed Interrupt Enable" "0,1" bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1" newline bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 New Message Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 Full Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 New Message Interrupt Enable" "0,1" line.long 0x8 "ILS,Interrupt Line Select" bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1" newline bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Interrupt Line" "0,1" newline bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1" bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1" newline bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1" bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1" newline bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Rx Buffer Interrupt Line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1" newline bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1" newline bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Element Lost Interrupt Line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1" newline bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1" newline bitfld.long 0x8 9. "TCL,Timestamp Completed Interrupt Line" "0,1" bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1" newline bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 New Message Interrupt Line" "0,1" newline bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 Full Interrupt Line" "0,1" newline bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 New Message Interrupt Line" "0,1" line.long 0xC "ILE,Interrupt Line Enable" bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long 0x80++0xB line.long 0x0 "GFC,Global Filter Configuration" bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" newline bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0,1" line.long 0x4 "SIDFC,Standard ID Filter Configuration" hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x4 0.--15. 1. "FLSSA,Filter List Standard Start Address" line.long 0x8 "XIDFC,Extended ID Filter Configuration" hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended" hexmask.long.word 0x8 0.--15. 1. "FLESA,Filter List Extended Start Address" group.long 0x90++0x3 line.long 0x0 "XIDAM,Extended ID AND Mask" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "HPMS,High Priority Message Status" bitfld.long 0x0 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index" newline bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected,1: FIFO message lost,2: Message stored in FIFO 0,3: Message stored in FIFO 1" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index" group.long 0x98++0xB line.long 0x0 "NDAT1,New Data 1" bitfld.long 0x0 31. "ND31,New Data 31" "0,1" bitfld.long 0x0 30. "ND30,New Data 30" "0,1" newline bitfld.long 0x0 29. "ND29,New Data 29" "0,1" bitfld.long 0x0 28. "ND28,New Data 28" "0,1" newline bitfld.long 0x0 27. "ND27,New Data 27" "0,1" bitfld.long 0x0 26. "ND26,New Data 26" "0,1" newline bitfld.long 0x0 25. "ND25,New Data 25" "0,1" bitfld.long 0x0 24. "ND24,New Data 24" "0,1" newline bitfld.long 0x0 23. "ND23,New Data 23" "0,1" bitfld.long 0x0 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x0 21. "ND21,New Data 21" "0,1" bitfld.long 0x0 20. "ND20,New Data 20" "0,1" newline bitfld.long 0x0 19. "ND19,New Data 19" "0,1" bitfld.long 0x0 18. "ND18,New Data 18" "0,1" newline bitfld.long 0x0 17. "ND17,New Data 17" "0,1" bitfld.long 0x0 16. "ND16,New Data 16" "0,1" newline bitfld.long 0x0 15. "ND15,New Data 15" "0,1" bitfld.long 0x0 14. "ND14,New Data 14" "0,1" newline bitfld.long 0x0 13. "ND13,New Data 13" "0,1" bitfld.long 0x0 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x0 11. "ND11,New Data 11" "0,1" bitfld.long 0x0 10. "ND10,New Data 10" "0,1" newline bitfld.long 0x0 9. "ND9,New Data 9" "0,1" bitfld.long 0x0 8. "ND8,New Data 8" "0,1" newline bitfld.long 0x0 7. "ND7,New Data 7" "0,1" bitfld.long 0x0 6. "ND6,New Data 6" "0,1" newline bitfld.long 0x0 5. "ND5,New Data 5" "0,1" bitfld.long 0x0 4. "ND4,New Data 4" "0,1" newline bitfld.long 0x0 3. "ND3,New Data 3" "0,1" bitfld.long 0x0 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x0 1. "ND1,New Data 1" "0,1" bitfld.long 0x0 0. "ND0,New Data 0" "0,1" line.long 0x4 "NDAT2,New Data 2" bitfld.long 0x4 31. "ND63,New Data 63" "0,1" bitfld.long 0x4 30. "ND62,New Data 62" "0,1" newline bitfld.long 0x4 29. "ND61,New Data 61" "0,1" bitfld.long 0x4 28. "ND60,New Data 60" "0,1" newline bitfld.long 0x4 27. "ND59,New Data 59" "0,1" bitfld.long 0x4 26. "ND58,New Data 58" "0,1" newline bitfld.long 0x4 25. "ND57,New Data 57" "0,1" bitfld.long 0x4 24. "ND56,New Data 56" "0,1" newline bitfld.long 0x4 23. "ND55,New Data 55" "0,1" bitfld.long 0x4 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x4 21. "ND53,New Data 53" "0,1" bitfld.long 0x4 20. "ND52,New Data 52" "0,1" newline bitfld.long 0x4 19. "ND51,New Data 51" "0,1" bitfld.long 0x4 18. "ND50,New Data 50" "0,1" newline bitfld.long 0x4 17. "ND49,New Data 49" "0,1" bitfld.long 0x4 16. "ND48,New Data 48" "0,1" newline bitfld.long 0x4 15. "ND47,New Data 47" "0,1" bitfld.long 0x4 14. "ND46,New Data 46" "0,1" newline bitfld.long 0x4 13. "ND45,New Data 45" "0,1" bitfld.long 0x4 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x4 11. "ND43,New Data 43" "0,1" bitfld.long 0x4 10. "ND42,New Data 42" "0,1" newline bitfld.long 0x4 9. "ND41,New Data 41" "0,1" bitfld.long 0x4 8. "ND40,New Data 40" "0,1" newline bitfld.long 0x4 7. "ND39,New Data 39" "0,1" bitfld.long 0x4 6. "ND38,New Data 38" "0,1" newline bitfld.long 0x4 5. "ND37,New Data 37" "0,1" bitfld.long 0x4 4. "ND36,New Data 36" "0,1" newline bitfld.long 0x4 3. "ND35,New Data 35" "0,1" bitfld.long 0x4 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x4 1. "ND33,New Data 33" "0,1" bitfld.long 0x4 0. "ND32,New Data 32" "0,1" line.long 0x8 "RXF0C,Rx FIFO 0 Configuration" bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x8 0.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x3 line.long 0x0 "RXF0S,Rx FIFO 0 Status" bitfld.long 0x0 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 24. "F0F,Rx FIFO 0 Full" "0,1" newline hexmask.long.byte 0x0 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x0 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" newline hexmask.long.byte 0x0 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long 0xA8++0xB line.long 0x0 "RXF0A,Rx FIFO 0 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" line.long 0x4 "RXBC,Rx Buffer Configuration" hexmask.long.word 0x4 0.--15. 1. "RBSA,Rx Buffer Start Address" line.long 0x8 "RXF1C,Rx FIFO 1 Configuration" bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x8 0.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long 0xB4++0x3 line.long 0x0 "RXF1S,Rx FIFO 1 Status" bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state,1: Debug message A received,2: Debug message A/B received,3: Debug message A/B/C received DMA request set" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" newline bitfld.long 0x0 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" newline hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long 0xB8++0xB line.long 0x0 "RXF1A,Rx FIFO 1 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" line.long 0x4 "RXESC,Rx Buffer / FIFO Element Size Configuration" bitfld.long 0x4 8.--10. "RBDS,Rx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" bitfld.long 0x4 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" newline bitfld.long 0x4 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" line.long 0x8 "TXBC,Tx Buffer Configuration" bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" newline hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x8 0.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long 0xC4++0x3 line.long 0x0 "TXFQS,Tx FIFO / Queue Status" bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index" newline hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index" hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long 0xC8++0x3 line.long 0x0 "TXESC,Tx Buffer Element Size Configuration" bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" rgroup.long 0xCC++0x3 line.long 0x0 "TXBRP,Tx Buffer Request Pending" bitfld.long 0x0 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x0 30. "TRP30,Transmission Request Pending 30" "0,1" newline bitfld.long 0x0 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x0 28. "TRP28,Transmission Request Pending 28" "0,1" newline bitfld.long 0x0 27. "TRP27,Transmission Request Pending 27" "0,1" bitfld.long 0x0 26. "TRP26,Transmission Request Pending 26" "0,1" newline bitfld.long 0x0 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x0 24. "TRP24,Transmission Request Pending 24" "0,1" newline bitfld.long 0x0 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x0 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x0 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x0 20. "TRP20,Transmission Request Pending 20" "0,1" newline bitfld.long 0x0 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x0 18. "TRP18,Transmission Request Pending 18" "0,1" newline bitfld.long 0x0 17. "TRP17,Transmission Request Pending 17" "0,1" bitfld.long 0x0 16. "TRP16,Transmission Request Pending 16" "0,1" newline bitfld.long 0x0 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x0 14. "TRP14,Transmission Request Pending 14" "0,1" newline bitfld.long 0x0 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x0 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x0 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x0 10. "TRP10,Transmission Request Pending 10" "0,1" newline bitfld.long 0x0 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x0 8. "TRP8,Transmission Request Pending 8" "0,1" newline bitfld.long 0x0 7. "TRP7,Transmission Request Pending 7" "0,1" bitfld.long 0x0 6. "TRP6,Transmission Request Pending 6" "0,1" newline bitfld.long 0x0 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x0 4. "TRP4,Transmission Request Pending 4" "0,1" newline bitfld.long 0x0 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x0 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x0 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x0 0. "TRP0,Transmission Request Pending 0" "0,1" group.long 0xD0++0x7 line.long 0x0 "TXBAR,Tx Buffer Add Request" bitfld.long 0x0 31. "AR31,Add Request 31" "0,1" bitfld.long 0x0 30. "AR30,Add Request 30" "0,1" newline bitfld.long 0x0 29. "AR29,Add Request 29" "0,1" bitfld.long 0x0 28. "AR28,Add Request 28" "0,1" newline bitfld.long 0x0 27. "AR27,Add Request 27" "0,1" bitfld.long 0x0 26. "AR26,Add Request 26" "0,1" newline bitfld.long 0x0 25. "AR25,Add Request 25" "0,1" bitfld.long 0x0 24. "AR24,Add Request 24" "0,1" newline bitfld.long 0x0 23. "AR23,Add Request 23" "0,1" bitfld.long 0x0 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x0 21. "AR21,Add Request 21" "0,1" bitfld.long 0x0 20. "AR20,Add Request 20" "0,1" newline bitfld.long 0x0 19. "AR19,Add Request 19" "0,1" bitfld.long 0x0 18. "AR18,Add Request 18" "0,1" newline bitfld.long 0x0 17. "AR17,Add Request 17" "0,1" bitfld.long 0x0 16. "AR16,Add Request 16" "0,1" newline bitfld.long 0x0 15. "AR15,Add Request 15" "0,1" bitfld.long 0x0 14. "AR14,Add Request 14" "0,1" newline bitfld.long 0x0 13. "AR13,Add Request 13" "0,1" bitfld.long 0x0 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x0 11. "AR11,Add Request 11" "0,1" bitfld.long 0x0 10. "AR10,Add Request 10" "0,1" newline bitfld.long 0x0 9. "AR9,Add Request 9" "0,1" bitfld.long 0x0 8. "AR8,Add Request 8" "0,1" newline bitfld.long 0x0 7. "AR7,Add Request 7" "0,1" bitfld.long 0x0 6. "AR6,Add Request 6" "0,1" newline bitfld.long 0x0 5. "AR5,Add Request 5" "0,1" bitfld.long 0x0 4. "AR4,Add Request 4" "0,1" newline bitfld.long 0x0 3. "AR3,Add Request 3" "0,1" bitfld.long 0x0 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x0 1. "AR1,Add Request 1" "0,1" bitfld.long 0x0 0. "AR0,Add Request 0" "0,1" line.long 0x4 "TXBCR,Tx Buffer Cancellation Request" bitfld.long 0x4 31. "CR31,Cancellation Request 31" "0,1" bitfld.long 0x4 30. "CR30,Cancellation Request 30" "0,1" newline bitfld.long 0x4 29. "CR29,Cancellation Request 29" "0,1" bitfld.long 0x4 28. "CR28,Cancellation Request 28" "0,1" newline bitfld.long 0x4 27. "CR27,Cancellation Request 27" "0,1" bitfld.long 0x4 26. "CR26,Cancellation Request 26" "0,1" newline bitfld.long 0x4 25. "CR25,Cancellation Request 25" "0,1" bitfld.long 0x4 24. "CR24,Cancellation Request 24" "0,1" newline bitfld.long 0x4 23. "CR23,Cancellation Request 23" "0,1" bitfld.long 0x4 22. "CR22,Cancellation Request 22" "0,1" newline bitfld.long 0x4 21. "CR21,Cancellation Request 21" "0,1" bitfld.long 0x4 20. "CR20,Cancellation Request 20" "0,1" newline bitfld.long 0x4 19. "CR19,Cancellation Request 19" "0,1" bitfld.long 0x4 18. "CR18,Cancellation Request 18" "0,1" newline bitfld.long 0x4 17. "CR17,Cancellation Request 17" "0,1" bitfld.long 0x4 16. "CR16,Cancellation Request 16" "0,1" newline bitfld.long 0x4 15. "CR15,Cancellation Request 15" "0,1" bitfld.long 0x4 14. "CR14,Cancellation Request 14" "0,1" newline bitfld.long 0x4 13. "CR13,Cancellation Request 13" "0,1" bitfld.long 0x4 12. "CR12,Cancellation Request 12" "0,1" newline bitfld.long 0x4 11. "CR11,Cancellation Request 11" "0,1" bitfld.long 0x4 10. "CR10,Cancellation Request 10" "0,1" newline bitfld.long 0x4 9. "CR9,Cancellation Request 9" "0,1" bitfld.long 0x4 8. "CR8,Cancellation Request 8" "0,1" newline bitfld.long 0x4 7. "CR7,Cancellation Request 7" "0,1" bitfld.long 0x4 6. "CR6,Cancellation Request 6" "0,1" newline bitfld.long 0x4 5. "CR5,Cancellation Request 5" "0,1" bitfld.long 0x4 4. "CR4,Cancellation Request 4" "0,1" newline bitfld.long 0x4 3. "CR3,Cancellation Request 3" "0,1" bitfld.long 0x4 2. "CR2,Cancellation Request 2" "0,1" newline bitfld.long 0x4 1. "CR1,Cancellation Request 1" "0,1" bitfld.long 0x4 0. "CR0,Cancellation Request 0" "0,1" rgroup.long 0xD8++0x7 line.long 0x0 "TXBTO,Tx Buffer Transmission Occurred" bitfld.long 0x0 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x0 30. "TO30,Transmission Occurred 30" "0,1" newline bitfld.long 0x0 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x0 28. "TO28,Transmission Occurred 28" "0,1" newline bitfld.long 0x0 27. "TO27,Transmission Occurred 27" "0,1" bitfld.long 0x0 26. "TO26,Transmission Occurred 26" "0,1" newline bitfld.long 0x0 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x0 24. "TO24,Transmission Occurred 24" "0,1" newline bitfld.long 0x0 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x0 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x0 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x0 20. "TO20,Transmission Occurred 20" "0,1" newline bitfld.long 0x0 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x0 18. "TO18,Transmission Occurred 18" "0,1" newline bitfld.long 0x0 17. "TO17,Transmission Occurred 17" "0,1" bitfld.long 0x0 16. "TO16,Transmission Occurred 16" "0,1" newline bitfld.long 0x0 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x0 14. "TO14,Transmission Occurred 14" "0,1" newline bitfld.long 0x0 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x0 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x0 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x0 10. "TO10,Transmission Occurred 10" "0,1" newline bitfld.long 0x0 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x0 8. "TO8,Transmission Occurred 8" "0,1" newline bitfld.long 0x0 7. "TO7,Transmission Occurred 7" "0,1" bitfld.long 0x0 6. "TO6,Transmission Occurred 6" "0,1" newline bitfld.long 0x0 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x0 4. "TO4,Transmission Occurred 4" "0,1" newline bitfld.long 0x0 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x0 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x0 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x0 0. "TO0,Transmission Occurred 0" "0,1" line.long 0x4 "TXBCF,Tx Buffer Cancellation Finished" bitfld.long 0x4 31. "CF31,Tx Buffer Cancellation Finished 31" "0,1" bitfld.long 0x4 30. "CF30,Tx Buffer Cancellation Finished 30" "0,1" newline bitfld.long 0x4 29. "CF29,Tx Buffer Cancellation Finished 29" "0,1" bitfld.long 0x4 28. "CF28,Tx Buffer Cancellation Finished 28" "0,1" newline bitfld.long 0x4 27. "CF27,Tx Buffer Cancellation Finished 27" "0,1" bitfld.long 0x4 26. "CF26,Tx Buffer Cancellation Finished 26" "0,1" newline bitfld.long 0x4 25. "CF25,Tx Buffer Cancellation Finished 25" "0,1" bitfld.long 0x4 24. "CF24,Tx Buffer Cancellation Finished 24" "0,1" newline bitfld.long 0x4 23. "CF23,Tx Buffer Cancellation Finished 23" "0,1" bitfld.long 0x4 22. "CF22,Tx Buffer Cancellation Finished 22" "0,1" newline bitfld.long 0x4 21. "CF21,Tx Buffer Cancellation Finished 21" "0,1" bitfld.long 0x4 20. "CF20,Tx Buffer Cancellation Finished 20" "0,1" newline bitfld.long 0x4 19. "CF19,Tx Buffer Cancellation Finished 19" "0,1" bitfld.long 0x4 18. "CF18,Tx Buffer Cancellation Finished 18" "0,1" newline bitfld.long 0x4 17. "CF17,Tx Buffer Cancellation Finished 17" "0,1" bitfld.long 0x4 16. "CF16,Tx Buffer Cancellation Finished 16" "0,1" newline bitfld.long 0x4 15. "CF15,Tx Buffer Cancellation Finished 15" "0,1" bitfld.long 0x4 14. "CF14,Tx Buffer Cancellation Finished 14" "0,1" newline bitfld.long 0x4 13. "CF13,Tx Buffer Cancellation Finished 13" "0,1" bitfld.long 0x4 12. "CF12,Tx Buffer Cancellation Finished 12" "0,1" newline bitfld.long 0x4 11. "CF11,Tx Buffer Cancellation Finished 11" "0,1" bitfld.long 0x4 10. "CF10,Tx Buffer Cancellation Finished 10" "0,1" newline bitfld.long 0x4 9. "CF9,Tx Buffer Cancellation Finished 9" "0,1" bitfld.long 0x4 8. "CF8,Tx Buffer Cancellation Finished 8" "0,1" newline bitfld.long 0x4 7. "CF7,Tx Buffer Cancellation Finished 7" "0,1" bitfld.long 0x4 6. "CF6,Tx Buffer Cancellation Finished 6" "0,1" newline bitfld.long 0x4 5. "CF5,Tx Buffer Cancellation Finished 5" "0,1" bitfld.long 0x4 4. "CF4,Tx Buffer Cancellation Finished 4" "0,1" newline bitfld.long 0x4 3. "CF3,Tx Buffer Cancellation Finished 3" "0,1" bitfld.long 0x4 2. "CF2,Tx Buffer Cancellation Finished 2" "0,1" newline bitfld.long 0x4 1. "CF1,Tx Buffer Cancellation Finished 1" "0,1" bitfld.long 0x4 0. "CF0,Tx Buffer Cancellation Finished 0" "0,1" group.long 0xE0++0x7 line.long 0x0 "TXBTIE,Tx Buffer Transmission Interrupt Enable" bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable 31" "0,1" bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable 30" "0,1" newline bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable 29" "0,1" bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable 28" "0,1" newline bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable 27" "0,1" bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable 26" "0,1" newline bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable 25" "0,1" bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable 24" "0,1" newline bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable 23" "0,1" bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable 22" "0,1" newline bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable 21" "0,1" bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable 20" "0,1" newline bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable 19" "0,1" bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable 18" "0,1" newline bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable 17" "0,1" bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable 16" "0,1" newline bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable 15" "0,1" bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable 14" "0,1" newline bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable 13" "0,1" bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable 12" "0,1" newline bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable 11" "0,1" bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable 10" "0,1" newline bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable 9" "0,1" bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable 8" "0,1" newline bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable 7" "0,1" bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable 6" "0,1" newline bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable 5" "0,1" bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable 4" "0,1" newline bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable 3" "0,1" bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable 2" "0,1" newline bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable 1" "0,1" bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable 0" "0,1" line.long 0x4 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable" bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable 31" "0,1" bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable 30" "0,1" newline bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable 29" "0,1" bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable 28" "0,1" newline bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable 27" "0,1" bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable 26" "0,1" newline bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable 25" "0,1" bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable 24" "0,1" newline bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable 23" "0,1" bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable 22" "0,1" newline bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable 21" "0,1" bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable 20" "0,1" newline bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable 19" "0,1" bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable 18" "0,1" newline bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable 17" "0,1" bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable 16" "0,1" newline bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable 15" "0,1" bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable 14" "0,1" newline bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable 13" "0,1" bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable 12" "0,1" newline bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable 11" "0,1" bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable 10" "0,1" newline bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable 9" "0,1" bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable 8" "0,1" newline bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable 7" "0,1" bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable 6" "0,1" newline bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable 5" "0,1" bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable 4" "0,1" newline bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable 3" "0,1" bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable 2" "0,1" newline bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable 1" "0,1" bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable 0" "0,1" group.long 0xF0++0x3 line.long 0x0 "TXEFC,Tx Event FIFO Configuration" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size" newline hexmask.long.word 0x0 0.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long 0xF4++0x3 line.long 0x0 "TXEFS,Tx Event FIFO Status" bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1" newline hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index" newline hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level" group.long 0xF8++0x3 line.long 0x0 "TXEFA,Tx Event FIFO Acknowledge" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index" group.long 0x100++0x3 line.long 0x0 "ERROR,Error Interrupt Flag" bitfld.long 0x0 0. "BERR,AHB Bus Error Detection" "0,1" tree.end tree "CAN3" base ad:0x45860000 rgroup.long 0x0++0x7 line.long 0x0 "CREL,Core Release" hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release" newline hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release" line.long 0x4 "ENDN,Endian" hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value" group.long 0x8++0x1B line.long 0x0 "MRCFG,Message RAM Configuration" hexmask.long.byte 0x0 16.--23. 1. "OFFSET,Base address offset" line.long 0x4 "DBTP,Fast Bit Timing and Prescaler" bitfld.long 0x4 23. "TDC,Tranceiver Delay Compensation" "0,1" hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Baud Rate Prescaler" newline hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data time segment after sample point" newline hexmask.long.byte 0x4 0.--3. 1. "DSJW,Data (Re)Synchronization Jump Width" line.long 0x8 "TEST,Test" bitfld.long 0x8 7. "RX,Receive Pin" "0,1" bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin" "0: TX controlled by CAN core,1: TX monitoring sample point,2: Dominant (0) level at pin CAN_TX,3: Recessive (1) level at pin CAN_TX" newline bitfld.long 0x8 4. "LBCK,Loop Back Mode" "0,1" line.long 0xC "RWD,RAM Watchdog" hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration" line.long 0x10 "CCCR,CC Control" bitfld.long 0x10 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration" "0,1" newline bitfld.long 0x10 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x10 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x10 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x10 7. "TEST,Test Mode Enable" "0,1" newline bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x10 5. "MON,Bus Monitoring Mode" "0,1" newline bitfld.long 0x10 4. "CSR,Clock Stop Request" "0,1" bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge" "0,1" newline bitfld.long 0x10 2. "ASM,ASM Restricted Operation Mode" "0,1" bitfld.long 0x10 1. "CCE,Configuration Change Enable" "0,1" newline bitfld.long 0x10 0. "INIT,Initialization" "0,1" line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler" hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Baud Rate Prescaler" newline hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" line.long 0x18 "TSCC,Timestamp Counter Configuration" hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler" bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented by TCP,?,?" rgroup.long 0x24++0x3 line.long 0x0 "TSCV,Timestamp Counter Value" hexmask.long.word 0x0 0.--15. 1. "TSC,Timestamp Counter" group.long 0x28++0x7 line.long 0x0 "TOCC,Timeout Counter Configuration" hexmask.long.word 0x0 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x0 1.--2. "TOS,Timeout Select" "0: Continuout operation,1: Timeout controlled by TX Event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1" newline bitfld.long 0x0 0. "ETOC,Enable Timeout Counter" "0,1" line.long 0x4 "TOCV,Timeout Counter Value" hexmask.long.word 0x4 0.--15. 1. "TOC,Timeout Counter" rgroup.long 0x40++0x7 line.long 0x0 "ECR,Error Counter" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1" newline hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter" line.long 0x4 "PSR,Protocol Status" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x4 14. "PXE,Protocol Exception Event" "0,1" newline bitfld.long 0x4 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x4 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" newline bitfld.long 0x4 11. "RESI,ESI flag of last received CAN FD Message" "0,1" bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" newline bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1" bitfld.long 0x4 6. "EW,Warning Status" "0,1" newline bitfld.long 0x4 5. "EP,Error Passive" "0,1" bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter" newline bitfld.long 0x4 0.--2. "LEC,Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" group.long 0x48++0x3 line.long 0x0 "TDCR,Extended ID Filter Configuration" hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset" hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Length" group.long 0x50++0xF line.long 0x0 "IR,Interrupt" bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1" newline bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1" bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1" newline bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1" bitfld.long 0x0 24. "EW,Warning Status" "0,1" newline bitfld.long 0x0 23. "EP,Error Passive" "0,1" bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1" newline bitfld.long 0x0 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1" newline bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1" newline bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1" newline bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1" newline bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x0 9. "TC,Timestamp Completed" "0,1" bitfld.long 0x0 8. "HPM,High Priority Message" "0,1" newline bitfld.long 0x0 7. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x0 6. "RF1F,Rx FIFO 1 FIFO Full" "0,1" newline bitfld.long 0x0 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 New Message" "0,1" newline bitfld.long 0x0 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 Full" "0,1" newline bitfld.long 0x0 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New Message" "0,1" line.long 0x4 "IE,Interrupt Enable" bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1" newline bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Interrupt Enable" "0,1" newline bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1" bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Element Lost Interrupt Enable" "0,1" bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x4 9. "TCE,Timestamp Completed Interrupt Enable" "0,1" bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1" newline bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 New Message Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 Full Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 New Message Interrupt Enable" "0,1" line.long 0x8 "ILS,Interrupt Line Select" bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1" newline bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Interrupt Line" "0,1" newline bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1" bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1" newline bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1" bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1" newline bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Rx Buffer Interrupt Line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1" newline bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1" newline bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Element Lost Interrupt Line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1" newline bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1" newline bitfld.long 0x8 9. "TCL,Timestamp Completed Interrupt Line" "0,1" bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1" newline bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 New Message Interrupt Line" "0,1" newline bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 Full Interrupt Line" "0,1" newline bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 New Message Interrupt Line" "0,1" line.long 0xC "ILE,Interrupt Line Enable" bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long 0x80++0xB line.long 0x0 "GFC,Global Filter Configuration" bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" newline bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0,1" line.long 0x4 "SIDFC,Standard ID Filter Configuration" hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x4 0.--15. 1. "FLSSA,Filter List Standard Start Address" line.long 0x8 "XIDFC,Extended ID Filter Configuration" hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended" hexmask.long.word 0x8 0.--15. 1. "FLESA,Filter List Extended Start Address" group.long 0x90++0x3 line.long 0x0 "XIDAM,Extended ID AND Mask" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "HPMS,High Priority Message Status" bitfld.long 0x0 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index" newline bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected,1: FIFO message lost,2: Message stored in FIFO 0,3: Message stored in FIFO 1" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index" group.long 0x98++0xB line.long 0x0 "NDAT1,New Data 1" bitfld.long 0x0 31. "ND31,New Data 31" "0,1" bitfld.long 0x0 30. "ND30,New Data 30" "0,1" newline bitfld.long 0x0 29. "ND29,New Data 29" "0,1" bitfld.long 0x0 28. "ND28,New Data 28" "0,1" newline bitfld.long 0x0 27. "ND27,New Data 27" "0,1" bitfld.long 0x0 26. "ND26,New Data 26" "0,1" newline bitfld.long 0x0 25. "ND25,New Data 25" "0,1" bitfld.long 0x0 24. "ND24,New Data 24" "0,1" newline bitfld.long 0x0 23. "ND23,New Data 23" "0,1" bitfld.long 0x0 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x0 21. "ND21,New Data 21" "0,1" bitfld.long 0x0 20. "ND20,New Data 20" "0,1" newline bitfld.long 0x0 19. "ND19,New Data 19" "0,1" bitfld.long 0x0 18. "ND18,New Data 18" "0,1" newline bitfld.long 0x0 17. "ND17,New Data 17" "0,1" bitfld.long 0x0 16. "ND16,New Data 16" "0,1" newline bitfld.long 0x0 15. "ND15,New Data 15" "0,1" bitfld.long 0x0 14. "ND14,New Data 14" "0,1" newline bitfld.long 0x0 13. "ND13,New Data 13" "0,1" bitfld.long 0x0 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x0 11. "ND11,New Data 11" "0,1" bitfld.long 0x0 10. "ND10,New Data 10" "0,1" newline bitfld.long 0x0 9. "ND9,New Data 9" "0,1" bitfld.long 0x0 8. "ND8,New Data 8" "0,1" newline bitfld.long 0x0 7. "ND7,New Data 7" "0,1" bitfld.long 0x0 6. "ND6,New Data 6" "0,1" newline bitfld.long 0x0 5. "ND5,New Data 5" "0,1" bitfld.long 0x0 4. "ND4,New Data 4" "0,1" newline bitfld.long 0x0 3. "ND3,New Data 3" "0,1" bitfld.long 0x0 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x0 1. "ND1,New Data 1" "0,1" bitfld.long 0x0 0. "ND0,New Data 0" "0,1" line.long 0x4 "NDAT2,New Data 2" bitfld.long 0x4 31. "ND63,New Data 63" "0,1" bitfld.long 0x4 30. "ND62,New Data 62" "0,1" newline bitfld.long 0x4 29. "ND61,New Data 61" "0,1" bitfld.long 0x4 28. "ND60,New Data 60" "0,1" newline bitfld.long 0x4 27. "ND59,New Data 59" "0,1" bitfld.long 0x4 26. "ND58,New Data 58" "0,1" newline bitfld.long 0x4 25. "ND57,New Data 57" "0,1" bitfld.long 0x4 24. "ND56,New Data 56" "0,1" newline bitfld.long 0x4 23. "ND55,New Data 55" "0,1" bitfld.long 0x4 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x4 21. "ND53,New Data 53" "0,1" bitfld.long 0x4 20. "ND52,New Data 52" "0,1" newline bitfld.long 0x4 19. "ND51,New Data 51" "0,1" bitfld.long 0x4 18. "ND50,New Data 50" "0,1" newline bitfld.long 0x4 17. "ND49,New Data 49" "0,1" bitfld.long 0x4 16. "ND48,New Data 48" "0,1" newline bitfld.long 0x4 15. "ND47,New Data 47" "0,1" bitfld.long 0x4 14. "ND46,New Data 46" "0,1" newline bitfld.long 0x4 13. "ND45,New Data 45" "0,1" bitfld.long 0x4 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x4 11. "ND43,New Data 43" "0,1" bitfld.long 0x4 10. "ND42,New Data 42" "0,1" newline bitfld.long 0x4 9. "ND41,New Data 41" "0,1" bitfld.long 0x4 8. "ND40,New Data 40" "0,1" newline bitfld.long 0x4 7. "ND39,New Data 39" "0,1" bitfld.long 0x4 6. "ND38,New Data 38" "0,1" newline bitfld.long 0x4 5. "ND37,New Data 37" "0,1" bitfld.long 0x4 4. "ND36,New Data 36" "0,1" newline bitfld.long 0x4 3. "ND35,New Data 35" "0,1" bitfld.long 0x4 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x4 1. "ND33,New Data 33" "0,1" bitfld.long 0x4 0. "ND32,New Data 32" "0,1" line.long 0x8 "RXF0C,Rx FIFO 0 Configuration" bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x8 0.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x3 line.long 0x0 "RXF0S,Rx FIFO 0 Status" bitfld.long 0x0 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 24. "F0F,Rx FIFO 0 Full" "0,1" newline hexmask.long.byte 0x0 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x0 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" newline hexmask.long.byte 0x0 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long 0xA8++0xB line.long 0x0 "RXF0A,Rx FIFO 0 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" line.long 0x4 "RXBC,Rx Buffer Configuration" hexmask.long.word 0x4 0.--15. 1. "RBSA,Rx Buffer Start Address" line.long 0x8 "RXF1C,Rx FIFO 1 Configuration" bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x8 0.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long 0xB4++0x3 line.long 0x0 "RXF1S,Rx FIFO 1 Status" bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state,1: Debug message A received,2: Debug message A/B received,3: Debug message A/B/C received DMA request set" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" newline bitfld.long 0x0 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" newline hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long 0xB8++0xB line.long 0x0 "RXF1A,Rx FIFO 1 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" line.long 0x4 "RXESC,Rx Buffer / FIFO Element Size Configuration" bitfld.long 0x4 8.--10. "RBDS,Rx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" bitfld.long 0x4 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" newline bitfld.long 0x4 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" line.long 0x8 "TXBC,Tx Buffer Configuration" bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" newline hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x8 0.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long 0xC4++0x3 line.long 0x0 "TXFQS,Tx FIFO / Queue Status" bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index" newline hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index" hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long 0xC8++0x3 line.long 0x0 "TXESC,Tx Buffer Element Size Configuration" bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" rgroup.long 0xCC++0x3 line.long 0x0 "TXBRP,Tx Buffer Request Pending" bitfld.long 0x0 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x0 30. "TRP30,Transmission Request Pending 30" "0,1" newline bitfld.long 0x0 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x0 28. "TRP28,Transmission Request Pending 28" "0,1" newline bitfld.long 0x0 27. "TRP27,Transmission Request Pending 27" "0,1" bitfld.long 0x0 26. "TRP26,Transmission Request Pending 26" "0,1" newline bitfld.long 0x0 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x0 24. "TRP24,Transmission Request Pending 24" "0,1" newline bitfld.long 0x0 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x0 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x0 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x0 20. "TRP20,Transmission Request Pending 20" "0,1" newline bitfld.long 0x0 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x0 18. "TRP18,Transmission Request Pending 18" "0,1" newline bitfld.long 0x0 17. "TRP17,Transmission Request Pending 17" "0,1" bitfld.long 0x0 16. "TRP16,Transmission Request Pending 16" "0,1" newline bitfld.long 0x0 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x0 14. "TRP14,Transmission Request Pending 14" "0,1" newline bitfld.long 0x0 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x0 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x0 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x0 10. "TRP10,Transmission Request Pending 10" "0,1" newline bitfld.long 0x0 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x0 8. "TRP8,Transmission Request Pending 8" "0,1" newline bitfld.long 0x0 7. "TRP7,Transmission Request Pending 7" "0,1" bitfld.long 0x0 6. "TRP6,Transmission Request Pending 6" "0,1" newline bitfld.long 0x0 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x0 4. "TRP4,Transmission Request Pending 4" "0,1" newline bitfld.long 0x0 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x0 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x0 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x0 0. "TRP0,Transmission Request Pending 0" "0,1" group.long 0xD0++0x7 line.long 0x0 "TXBAR,Tx Buffer Add Request" bitfld.long 0x0 31. "AR31,Add Request 31" "0,1" bitfld.long 0x0 30. "AR30,Add Request 30" "0,1" newline bitfld.long 0x0 29. "AR29,Add Request 29" "0,1" bitfld.long 0x0 28. "AR28,Add Request 28" "0,1" newline bitfld.long 0x0 27. "AR27,Add Request 27" "0,1" bitfld.long 0x0 26. "AR26,Add Request 26" "0,1" newline bitfld.long 0x0 25. "AR25,Add Request 25" "0,1" bitfld.long 0x0 24. "AR24,Add Request 24" "0,1" newline bitfld.long 0x0 23. "AR23,Add Request 23" "0,1" bitfld.long 0x0 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x0 21. "AR21,Add Request 21" "0,1" bitfld.long 0x0 20. "AR20,Add Request 20" "0,1" newline bitfld.long 0x0 19. "AR19,Add Request 19" "0,1" bitfld.long 0x0 18. "AR18,Add Request 18" "0,1" newline bitfld.long 0x0 17. "AR17,Add Request 17" "0,1" bitfld.long 0x0 16. "AR16,Add Request 16" "0,1" newline bitfld.long 0x0 15. "AR15,Add Request 15" "0,1" bitfld.long 0x0 14. "AR14,Add Request 14" "0,1" newline bitfld.long 0x0 13. "AR13,Add Request 13" "0,1" bitfld.long 0x0 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x0 11. "AR11,Add Request 11" "0,1" bitfld.long 0x0 10. "AR10,Add Request 10" "0,1" newline bitfld.long 0x0 9. "AR9,Add Request 9" "0,1" bitfld.long 0x0 8. "AR8,Add Request 8" "0,1" newline bitfld.long 0x0 7. "AR7,Add Request 7" "0,1" bitfld.long 0x0 6. "AR6,Add Request 6" "0,1" newline bitfld.long 0x0 5. "AR5,Add Request 5" "0,1" bitfld.long 0x0 4. "AR4,Add Request 4" "0,1" newline bitfld.long 0x0 3. "AR3,Add Request 3" "0,1" bitfld.long 0x0 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x0 1. "AR1,Add Request 1" "0,1" bitfld.long 0x0 0. "AR0,Add Request 0" "0,1" line.long 0x4 "TXBCR,Tx Buffer Cancellation Request" bitfld.long 0x4 31. "CR31,Cancellation Request 31" "0,1" bitfld.long 0x4 30. "CR30,Cancellation Request 30" "0,1" newline bitfld.long 0x4 29. "CR29,Cancellation Request 29" "0,1" bitfld.long 0x4 28. "CR28,Cancellation Request 28" "0,1" newline bitfld.long 0x4 27. "CR27,Cancellation Request 27" "0,1" bitfld.long 0x4 26. "CR26,Cancellation Request 26" "0,1" newline bitfld.long 0x4 25. "CR25,Cancellation Request 25" "0,1" bitfld.long 0x4 24. "CR24,Cancellation Request 24" "0,1" newline bitfld.long 0x4 23. "CR23,Cancellation Request 23" "0,1" bitfld.long 0x4 22. "CR22,Cancellation Request 22" "0,1" newline bitfld.long 0x4 21. "CR21,Cancellation Request 21" "0,1" bitfld.long 0x4 20. "CR20,Cancellation Request 20" "0,1" newline bitfld.long 0x4 19. "CR19,Cancellation Request 19" "0,1" bitfld.long 0x4 18. "CR18,Cancellation Request 18" "0,1" newline bitfld.long 0x4 17. "CR17,Cancellation Request 17" "0,1" bitfld.long 0x4 16. "CR16,Cancellation Request 16" "0,1" newline bitfld.long 0x4 15. "CR15,Cancellation Request 15" "0,1" bitfld.long 0x4 14. "CR14,Cancellation Request 14" "0,1" newline bitfld.long 0x4 13. "CR13,Cancellation Request 13" "0,1" bitfld.long 0x4 12. "CR12,Cancellation Request 12" "0,1" newline bitfld.long 0x4 11. "CR11,Cancellation Request 11" "0,1" bitfld.long 0x4 10. "CR10,Cancellation Request 10" "0,1" newline bitfld.long 0x4 9. "CR9,Cancellation Request 9" "0,1" bitfld.long 0x4 8. "CR8,Cancellation Request 8" "0,1" newline bitfld.long 0x4 7. "CR7,Cancellation Request 7" "0,1" bitfld.long 0x4 6. "CR6,Cancellation Request 6" "0,1" newline bitfld.long 0x4 5. "CR5,Cancellation Request 5" "0,1" bitfld.long 0x4 4. "CR4,Cancellation Request 4" "0,1" newline bitfld.long 0x4 3. "CR3,Cancellation Request 3" "0,1" bitfld.long 0x4 2. "CR2,Cancellation Request 2" "0,1" newline bitfld.long 0x4 1. "CR1,Cancellation Request 1" "0,1" bitfld.long 0x4 0. "CR0,Cancellation Request 0" "0,1" rgroup.long 0xD8++0x7 line.long 0x0 "TXBTO,Tx Buffer Transmission Occurred" bitfld.long 0x0 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x0 30. "TO30,Transmission Occurred 30" "0,1" newline bitfld.long 0x0 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x0 28. "TO28,Transmission Occurred 28" "0,1" newline bitfld.long 0x0 27. "TO27,Transmission Occurred 27" "0,1" bitfld.long 0x0 26. "TO26,Transmission Occurred 26" "0,1" newline bitfld.long 0x0 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x0 24. "TO24,Transmission Occurred 24" "0,1" newline bitfld.long 0x0 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x0 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x0 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x0 20. "TO20,Transmission Occurred 20" "0,1" newline bitfld.long 0x0 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x0 18. "TO18,Transmission Occurred 18" "0,1" newline bitfld.long 0x0 17. "TO17,Transmission Occurred 17" "0,1" bitfld.long 0x0 16. "TO16,Transmission Occurred 16" "0,1" newline bitfld.long 0x0 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x0 14. "TO14,Transmission Occurred 14" "0,1" newline bitfld.long 0x0 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x0 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x0 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x0 10. "TO10,Transmission Occurred 10" "0,1" newline bitfld.long 0x0 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x0 8. "TO8,Transmission Occurred 8" "0,1" newline bitfld.long 0x0 7. "TO7,Transmission Occurred 7" "0,1" bitfld.long 0x0 6. "TO6,Transmission Occurred 6" "0,1" newline bitfld.long 0x0 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x0 4. "TO4,Transmission Occurred 4" "0,1" newline bitfld.long 0x0 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x0 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x0 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x0 0. "TO0,Transmission Occurred 0" "0,1" line.long 0x4 "TXBCF,Tx Buffer Cancellation Finished" bitfld.long 0x4 31. "CF31,Tx Buffer Cancellation Finished 31" "0,1" bitfld.long 0x4 30. "CF30,Tx Buffer Cancellation Finished 30" "0,1" newline bitfld.long 0x4 29. "CF29,Tx Buffer Cancellation Finished 29" "0,1" bitfld.long 0x4 28. "CF28,Tx Buffer Cancellation Finished 28" "0,1" newline bitfld.long 0x4 27. "CF27,Tx Buffer Cancellation Finished 27" "0,1" bitfld.long 0x4 26. "CF26,Tx Buffer Cancellation Finished 26" "0,1" newline bitfld.long 0x4 25. "CF25,Tx Buffer Cancellation Finished 25" "0,1" bitfld.long 0x4 24. "CF24,Tx Buffer Cancellation Finished 24" "0,1" newline bitfld.long 0x4 23. "CF23,Tx Buffer Cancellation Finished 23" "0,1" bitfld.long 0x4 22. "CF22,Tx Buffer Cancellation Finished 22" "0,1" newline bitfld.long 0x4 21. "CF21,Tx Buffer Cancellation Finished 21" "0,1" bitfld.long 0x4 20. "CF20,Tx Buffer Cancellation Finished 20" "0,1" newline bitfld.long 0x4 19. "CF19,Tx Buffer Cancellation Finished 19" "0,1" bitfld.long 0x4 18. "CF18,Tx Buffer Cancellation Finished 18" "0,1" newline bitfld.long 0x4 17. "CF17,Tx Buffer Cancellation Finished 17" "0,1" bitfld.long 0x4 16. "CF16,Tx Buffer Cancellation Finished 16" "0,1" newline bitfld.long 0x4 15. "CF15,Tx Buffer Cancellation Finished 15" "0,1" bitfld.long 0x4 14. "CF14,Tx Buffer Cancellation Finished 14" "0,1" newline bitfld.long 0x4 13. "CF13,Tx Buffer Cancellation Finished 13" "0,1" bitfld.long 0x4 12. "CF12,Tx Buffer Cancellation Finished 12" "0,1" newline bitfld.long 0x4 11. "CF11,Tx Buffer Cancellation Finished 11" "0,1" bitfld.long 0x4 10. "CF10,Tx Buffer Cancellation Finished 10" "0,1" newline bitfld.long 0x4 9. "CF9,Tx Buffer Cancellation Finished 9" "0,1" bitfld.long 0x4 8. "CF8,Tx Buffer Cancellation Finished 8" "0,1" newline bitfld.long 0x4 7. "CF7,Tx Buffer Cancellation Finished 7" "0,1" bitfld.long 0x4 6. "CF6,Tx Buffer Cancellation Finished 6" "0,1" newline bitfld.long 0x4 5. "CF5,Tx Buffer Cancellation Finished 5" "0,1" bitfld.long 0x4 4. "CF4,Tx Buffer Cancellation Finished 4" "0,1" newline bitfld.long 0x4 3. "CF3,Tx Buffer Cancellation Finished 3" "0,1" bitfld.long 0x4 2. "CF2,Tx Buffer Cancellation Finished 2" "0,1" newline bitfld.long 0x4 1. "CF1,Tx Buffer Cancellation Finished 1" "0,1" bitfld.long 0x4 0. "CF0,Tx Buffer Cancellation Finished 0" "0,1" group.long 0xE0++0x7 line.long 0x0 "TXBTIE,Tx Buffer Transmission Interrupt Enable" bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable 31" "0,1" bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable 30" "0,1" newline bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable 29" "0,1" bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable 28" "0,1" newline bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable 27" "0,1" bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable 26" "0,1" newline bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable 25" "0,1" bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable 24" "0,1" newline bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable 23" "0,1" bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable 22" "0,1" newline bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable 21" "0,1" bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable 20" "0,1" newline bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable 19" "0,1" bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable 18" "0,1" newline bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable 17" "0,1" bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable 16" "0,1" newline bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable 15" "0,1" bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable 14" "0,1" newline bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable 13" "0,1" bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable 12" "0,1" newline bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable 11" "0,1" bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable 10" "0,1" newline bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable 9" "0,1" bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable 8" "0,1" newline bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable 7" "0,1" bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable 6" "0,1" newline bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable 5" "0,1" bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable 4" "0,1" newline bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable 3" "0,1" bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable 2" "0,1" newline bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable 1" "0,1" bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable 0" "0,1" line.long 0x4 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable" bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable 31" "0,1" bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable 30" "0,1" newline bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable 29" "0,1" bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable 28" "0,1" newline bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable 27" "0,1" bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable 26" "0,1" newline bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable 25" "0,1" bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable 24" "0,1" newline bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable 23" "0,1" bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable 22" "0,1" newline bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable 21" "0,1" bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable 20" "0,1" newline bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable 19" "0,1" bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable 18" "0,1" newline bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable 17" "0,1" bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable 16" "0,1" newline bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable 15" "0,1" bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable 14" "0,1" newline bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable 13" "0,1" bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable 12" "0,1" newline bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable 11" "0,1" bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable 10" "0,1" newline bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable 9" "0,1" bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable 8" "0,1" newline bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable 7" "0,1" bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable 6" "0,1" newline bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable 5" "0,1" bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable 4" "0,1" newline bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable 3" "0,1" bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable 2" "0,1" newline bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable 1" "0,1" bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable 0" "0,1" group.long 0xF0++0x3 line.long 0x0 "TXEFC,Tx Event FIFO Configuration" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size" newline hexmask.long.word 0x0 0.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long 0xF4++0x3 line.long 0x0 "TXEFS,Tx Event FIFO Status" bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1" newline hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index" newline hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level" group.long 0xF8++0x3 line.long 0x0 "TXEFA,Tx Event FIFO Acknowledge" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index" group.long 0x100++0x3 line.long 0x0 "ERROR,Error Interrupt Flag" bitfld.long 0x0 0. "BERR,AHB Bus Error Detection" "0,1" tree.end tree "CAN4" base ad:0x45062000 rgroup.long 0x0++0x7 line.long 0x0 "CREL,Core Release" hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release" newline hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release" line.long 0x4 "ENDN,Endian" hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value" group.long 0x8++0x1B line.long 0x0 "MRCFG,Message RAM Configuration" hexmask.long.byte 0x0 16.--23. 1. "OFFSET,Base address offset" line.long 0x4 "DBTP,Fast Bit Timing and Prescaler" bitfld.long 0x4 23. "TDC,Tranceiver Delay Compensation" "0,1" hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Baud Rate Prescaler" newline hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data time segment after sample point" newline hexmask.long.byte 0x4 0.--3. 1. "DSJW,Data (Re)Synchronization Jump Width" line.long 0x8 "TEST,Test" bitfld.long 0x8 7. "RX,Receive Pin" "0,1" bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin" "0: TX controlled by CAN core,1: TX monitoring sample point,2: Dominant (0) level at pin CAN_TX,3: Recessive (1) level at pin CAN_TX" newline bitfld.long 0x8 4. "LBCK,Loop Back Mode" "0,1" line.long 0xC "RWD,RAM Watchdog" hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration" line.long 0x10 "CCCR,CC Control" bitfld.long 0x10 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration" "0,1" newline bitfld.long 0x10 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x10 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x10 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x10 7. "TEST,Test Mode Enable" "0,1" newline bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x10 5. "MON,Bus Monitoring Mode" "0,1" newline bitfld.long 0x10 4. "CSR,Clock Stop Request" "0,1" bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge" "0,1" newline bitfld.long 0x10 2. "ASM,ASM Restricted Operation Mode" "0,1" bitfld.long 0x10 1. "CCE,Configuration Change Enable" "0,1" newline bitfld.long 0x10 0. "INIT,Initialization" "0,1" line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler" hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Baud Rate Prescaler" newline hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" line.long 0x18 "TSCC,Timestamp Counter Configuration" hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler" bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented by TCP,?,?" rgroup.long 0x24++0x3 line.long 0x0 "TSCV,Timestamp Counter Value" hexmask.long.word 0x0 0.--15. 1. "TSC,Timestamp Counter" group.long 0x28++0x7 line.long 0x0 "TOCC,Timeout Counter Configuration" hexmask.long.word 0x0 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x0 1.--2. "TOS,Timeout Select" "0: Continuout operation,1: Timeout controlled by TX Event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1" newline bitfld.long 0x0 0. "ETOC,Enable Timeout Counter" "0,1" line.long 0x4 "TOCV,Timeout Counter Value" hexmask.long.word 0x4 0.--15. 1. "TOC,Timeout Counter" rgroup.long 0x40++0x7 line.long 0x0 "ECR,Error Counter" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1" newline hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter" line.long 0x4 "PSR,Protocol Status" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x4 14. "PXE,Protocol Exception Event" "0,1" newline bitfld.long 0x4 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x4 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" newline bitfld.long 0x4 11. "RESI,ESI flag of last received CAN FD Message" "0,1" bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" newline bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1" bitfld.long 0x4 6. "EW,Warning Status" "0,1" newline bitfld.long 0x4 5. "EP,Error Passive" "0,1" bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter" newline bitfld.long 0x4 0.--2. "LEC,Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" group.long 0x48++0x3 line.long 0x0 "TDCR,Extended ID Filter Configuration" hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset" hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Length" group.long 0x50++0xF line.long 0x0 "IR,Interrupt" bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1" newline bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1" bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1" newline bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1" bitfld.long 0x0 24. "EW,Warning Status" "0,1" newline bitfld.long 0x0 23. "EP,Error Passive" "0,1" bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1" newline bitfld.long 0x0 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1" newline bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1" newline bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1" newline bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1" newline bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x0 9. "TC,Timestamp Completed" "0,1" bitfld.long 0x0 8. "HPM,High Priority Message" "0,1" newline bitfld.long 0x0 7. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x0 6. "RF1F,Rx FIFO 1 FIFO Full" "0,1" newline bitfld.long 0x0 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 New Message" "0,1" newline bitfld.long 0x0 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 Full" "0,1" newline bitfld.long 0x0 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New Message" "0,1" line.long 0x4 "IE,Interrupt Enable" bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1" newline bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Interrupt Enable" "0,1" newline bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1" bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Element Lost Interrupt Enable" "0,1" bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x4 9. "TCE,Timestamp Completed Interrupt Enable" "0,1" bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1" newline bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 New Message Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 Full Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 New Message Interrupt Enable" "0,1" line.long 0x8 "ILS,Interrupt Line Select" bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1" newline bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Interrupt Line" "0,1" newline bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1" bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1" newline bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1" bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1" newline bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Rx Buffer Interrupt Line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1" newline bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1" newline bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Element Lost Interrupt Line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1" newline bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1" newline bitfld.long 0x8 9. "TCL,Timestamp Completed Interrupt Line" "0,1" bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1" newline bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 New Message Interrupt Line" "0,1" newline bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 Full Interrupt Line" "0,1" newline bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 New Message Interrupt Line" "0,1" line.long 0xC "ILE,Interrupt Line Enable" bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long 0x80++0xB line.long 0x0 "GFC,Global Filter Configuration" bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" newline bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0,1" line.long 0x4 "SIDFC,Standard ID Filter Configuration" hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x4 0.--15. 1. "FLSSA,Filter List Standard Start Address" line.long 0x8 "XIDFC,Extended ID Filter Configuration" hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended" hexmask.long.word 0x8 0.--15. 1. "FLESA,Filter List Extended Start Address" group.long 0x90++0x3 line.long 0x0 "XIDAM,Extended ID AND Mask" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "HPMS,High Priority Message Status" bitfld.long 0x0 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index" newline bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected,1: FIFO message lost,2: Message stored in FIFO 0,3: Message stored in FIFO 1" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index" group.long 0x98++0xB line.long 0x0 "NDAT1,New Data 1" bitfld.long 0x0 31. "ND31,New Data 31" "0,1" bitfld.long 0x0 30. "ND30,New Data 30" "0,1" newline bitfld.long 0x0 29. "ND29,New Data 29" "0,1" bitfld.long 0x0 28. "ND28,New Data 28" "0,1" newline bitfld.long 0x0 27. "ND27,New Data 27" "0,1" bitfld.long 0x0 26. "ND26,New Data 26" "0,1" newline bitfld.long 0x0 25. "ND25,New Data 25" "0,1" bitfld.long 0x0 24. "ND24,New Data 24" "0,1" newline bitfld.long 0x0 23. "ND23,New Data 23" "0,1" bitfld.long 0x0 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x0 21. "ND21,New Data 21" "0,1" bitfld.long 0x0 20. "ND20,New Data 20" "0,1" newline bitfld.long 0x0 19. "ND19,New Data 19" "0,1" bitfld.long 0x0 18. "ND18,New Data 18" "0,1" newline bitfld.long 0x0 17. "ND17,New Data 17" "0,1" bitfld.long 0x0 16. "ND16,New Data 16" "0,1" newline bitfld.long 0x0 15. "ND15,New Data 15" "0,1" bitfld.long 0x0 14. "ND14,New Data 14" "0,1" newline bitfld.long 0x0 13. "ND13,New Data 13" "0,1" bitfld.long 0x0 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x0 11. "ND11,New Data 11" "0,1" bitfld.long 0x0 10. "ND10,New Data 10" "0,1" newline bitfld.long 0x0 9. "ND9,New Data 9" "0,1" bitfld.long 0x0 8. "ND8,New Data 8" "0,1" newline bitfld.long 0x0 7. "ND7,New Data 7" "0,1" bitfld.long 0x0 6. "ND6,New Data 6" "0,1" newline bitfld.long 0x0 5. "ND5,New Data 5" "0,1" bitfld.long 0x0 4. "ND4,New Data 4" "0,1" newline bitfld.long 0x0 3. "ND3,New Data 3" "0,1" bitfld.long 0x0 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x0 1. "ND1,New Data 1" "0,1" bitfld.long 0x0 0. "ND0,New Data 0" "0,1" line.long 0x4 "NDAT2,New Data 2" bitfld.long 0x4 31. "ND63,New Data 63" "0,1" bitfld.long 0x4 30. "ND62,New Data 62" "0,1" newline bitfld.long 0x4 29. "ND61,New Data 61" "0,1" bitfld.long 0x4 28. "ND60,New Data 60" "0,1" newline bitfld.long 0x4 27. "ND59,New Data 59" "0,1" bitfld.long 0x4 26. "ND58,New Data 58" "0,1" newline bitfld.long 0x4 25. "ND57,New Data 57" "0,1" bitfld.long 0x4 24. "ND56,New Data 56" "0,1" newline bitfld.long 0x4 23. "ND55,New Data 55" "0,1" bitfld.long 0x4 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x4 21. "ND53,New Data 53" "0,1" bitfld.long 0x4 20. "ND52,New Data 52" "0,1" newline bitfld.long 0x4 19. "ND51,New Data 51" "0,1" bitfld.long 0x4 18. "ND50,New Data 50" "0,1" newline bitfld.long 0x4 17. "ND49,New Data 49" "0,1" bitfld.long 0x4 16. "ND48,New Data 48" "0,1" newline bitfld.long 0x4 15. "ND47,New Data 47" "0,1" bitfld.long 0x4 14. "ND46,New Data 46" "0,1" newline bitfld.long 0x4 13. "ND45,New Data 45" "0,1" bitfld.long 0x4 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x4 11. "ND43,New Data 43" "0,1" bitfld.long 0x4 10. "ND42,New Data 42" "0,1" newline bitfld.long 0x4 9. "ND41,New Data 41" "0,1" bitfld.long 0x4 8. "ND40,New Data 40" "0,1" newline bitfld.long 0x4 7. "ND39,New Data 39" "0,1" bitfld.long 0x4 6. "ND38,New Data 38" "0,1" newline bitfld.long 0x4 5. "ND37,New Data 37" "0,1" bitfld.long 0x4 4. "ND36,New Data 36" "0,1" newline bitfld.long 0x4 3. "ND35,New Data 35" "0,1" bitfld.long 0x4 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x4 1. "ND33,New Data 33" "0,1" bitfld.long 0x4 0. "ND32,New Data 32" "0,1" line.long 0x8 "RXF0C,Rx FIFO 0 Configuration" bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x8 0.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x3 line.long 0x0 "RXF0S,Rx FIFO 0 Status" bitfld.long 0x0 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 24. "F0F,Rx FIFO 0 Full" "0,1" newline hexmask.long.byte 0x0 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x0 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" newline hexmask.long.byte 0x0 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long 0xA8++0xB line.long 0x0 "RXF0A,Rx FIFO 0 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" line.long 0x4 "RXBC,Rx Buffer Configuration" hexmask.long.word 0x4 0.--15. 1. "RBSA,Rx Buffer Start Address" line.long 0x8 "RXF1C,Rx FIFO 1 Configuration" bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x8 0.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long 0xB4++0x3 line.long 0x0 "RXF1S,Rx FIFO 1 Status" bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state,1: Debug message A received,2: Debug message A/B received,3: Debug message A/B/C received DMA request set" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" newline bitfld.long 0x0 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" newline hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long 0xB8++0xB line.long 0x0 "RXF1A,Rx FIFO 1 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" line.long 0x4 "RXESC,Rx Buffer / FIFO Element Size Configuration" bitfld.long 0x4 8.--10. "RBDS,Rx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" bitfld.long 0x4 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" newline bitfld.long 0x4 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" line.long 0x8 "TXBC,Tx Buffer Configuration" bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" newline hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x8 0.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long 0xC4++0x3 line.long 0x0 "TXFQS,Tx FIFO / Queue Status" bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index" newline hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index" hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long 0xC8++0x3 line.long 0x0 "TXESC,Tx Buffer Element Size Configuration" bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" rgroup.long 0xCC++0x3 line.long 0x0 "TXBRP,Tx Buffer Request Pending" bitfld.long 0x0 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x0 30. "TRP30,Transmission Request Pending 30" "0,1" newline bitfld.long 0x0 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x0 28. "TRP28,Transmission Request Pending 28" "0,1" newline bitfld.long 0x0 27. "TRP27,Transmission Request Pending 27" "0,1" bitfld.long 0x0 26. "TRP26,Transmission Request Pending 26" "0,1" newline bitfld.long 0x0 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x0 24. "TRP24,Transmission Request Pending 24" "0,1" newline bitfld.long 0x0 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x0 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x0 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x0 20. "TRP20,Transmission Request Pending 20" "0,1" newline bitfld.long 0x0 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x0 18. "TRP18,Transmission Request Pending 18" "0,1" newline bitfld.long 0x0 17. "TRP17,Transmission Request Pending 17" "0,1" bitfld.long 0x0 16. "TRP16,Transmission Request Pending 16" "0,1" newline bitfld.long 0x0 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x0 14. "TRP14,Transmission Request Pending 14" "0,1" newline bitfld.long 0x0 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x0 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x0 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x0 10. "TRP10,Transmission Request Pending 10" "0,1" newline bitfld.long 0x0 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x0 8. "TRP8,Transmission Request Pending 8" "0,1" newline bitfld.long 0x0 7. "TRP7,Transmission Request Pending 7" "0,1" bitfld.long 0x0 6. "TRP6,Transmission Request Pending 6" "0,1" newline bitfld.long 0x0 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x0 4. "TRP4,Transmission Request Pending 4" "0,1" newline bitfld.long 0x0 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x0 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x0 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x0 0. "TRP0,Transmission Request Pending 0" "0,1" group.long 0xD0++0x7 line.long 0x0 "TXBAR,Tx Buffer Add Request" bitfld.long 0x0 31. "AR31,Add Request 31" "0,1" bitfld.long 0x0 30. "AR30,Add Request 30" "0,1" newline bitfld.long 0x0 29. "AR29,Add Request 29" "0,1" bitfld.long 0x0 28. "AR28,Add Request 28" "0,1" newline bitfld.long 0x0 27. "AR27,Add Request 27" "0,1" bitfld.long 0x0 26. "AR26,Add Request 26" "0,1" newline bitfld.long 0x0 25. "AR25,Add Request 25" "0,1" bitfld.long 0x0 24. "AR24,Add Request 24" "0,1" newline bitfld.long 0x0 23. "AR23,Add Request 23" "0,1" bitfld.long 0x0 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x0 21. "AR21,Add Request 21" "0,1" bitfld.long 0x0 20. "AR20,Add Request 20" "0,1" newline bitfld.long 0x0 19. "AR19,Add Request 19" "0,1" bitfld.long 0x0 18. "AR18,Add Request 18" "0,1" newline bitfld.long 0x0 17. "AR17,Add Request 17" "0,1" bitfld.long 0x0 16. "AR16,Add Request 16" "0,1" newline bitfld.long 0x0 15. "AR15,Add Request 15" "0,1" bitfld.long 0x0 14. "AR14,Add Request 14" "0,1" newline bitfld.long 0x0 13. "AR13,Add Request 13" "0,1" bitfld.long 0x0 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x0 11. "AR11,Add Request 11" "0,1" bitfld.long 0x0 10. "AR10,Add Request 10" "0,1" newline bitfld.long 0x0 9. "AR9,Add Request 9" "0,1" bitfld.long 0x0 8. "AR8,Add Request 8" "0,1" newline bitfld.long 0x0 7. "AR7,Add Request 7" "0,1" bitfld.long 0x0 6. "AR6,Add Request 6" "0,1" newline bitfld.long 0x0 5. "AR5,Add Request 5" "0,1" bitfld.long 0x0 4. "AR4,Add Request 4" "0,1" newline bitfld.long 0x0 3. "AR3,Add Request 3" "0,1" bitfld.long 0x0 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x0 1. "AR1,Add Request 1" "0,1" bitfld.long 0x0 0. "AR0,Add Request 0" "0,1" line.long 0x4 "TXBCR,Tx Buffer Cancellation Request" bitfld.long 0x4 31. "CR31,Cancellation Request 31" "0,1" bitfld.long 0x4 30. "CR30,Cancellation Request 30" "0,1" newline bitfld.long 0x4 29. "CR29,Cancellation Request 29" "0,1" bitfld.long 0x4 28. "CR28,Cancellation Request 28" "0,1" newline bitfld.long 0x4 27. "CR27,Cancellation Request 27" "0,1" bitfld.long 0x4 26. "CR26,Cancellation Request 26" "0,1" newline bitfld.long 0x4 25. "CR25,Cancellation Request 25" "0,1" bitfld.long 0x4 24. "CR24,Cancellation Request 24" "0,1" newline bitfld.long 0x4 23. "CR23,Cancellation Request 23" "0,1" bitfld.long 0x4 22. "CR22,Cancellation Request 22" "0,1" newline bitfld.long 0x4 21. "CR21,Cancellation Request 21" "0,1" bitfld.long 0x4 20. "CR20,Cancellation Request 20" "0,1" newline bitfld.long 0x4 19. "CR19,Cancellation Request 19" "0,1" bitfld.long 0x4 18. "CR18,Cancellation Request 18" "0,1" newline bitfld.long 0x4 17. "CR17,Cancellation Request 17" "0,1" bitfld.long 0x4 16. "CR16,Cancellation Request 16" "0,1" newline bitfld.long 0x4 15. "CR15,Cancellation Request 15" "0,1" bitfld.long 0x4 14. "CR14,Cancellation Request 14" "0,1" newline bitfld.long 0x4 13. "CR13,Cancellation Request 13" "0,1" bitfld.long 0x4 12. "CR12,Cancellation Request 12" "0,1" newline bitfld.long 0x4 11. "CR11,Cancellation Request 11" "0,1" bitfld.long 0x4 10. "CR10,Cancellation Request 10" "0,1" newline bitfld.long 0x4 9. "CR9,Cancellation Request 9" "0,1" bitfld.long 0x4 8. "CR8,Cancellation Request 8" "0,1" newline bitfld.long 0x4 7. "CR7,Cancellation Request 7" "0,1" bitfld.long 0x4 6. "CR6,Cancellation Request 6" "0,1" newline bitfld.long 0x4 5. "CR5,Cancellation Request 5" "0,1" bitfld.long 0x4 4. "CR4,Cancellation Request 4" "0,1" newline bitfld.long 0x4 3. "CR3,Cancellation Request 3" "0,1" bitfld.long 0x4 2. "CR2,Cancellation Request 2" "0,1" newline bitfld.long 0x4 1. "CR1,Cancellation Request 1" "0,1" bitfld.long 0x4 0. "CR0,Cancellation Request 0" "0,1" rgroup.long 0xD8++0x7 line.long 0x0 "TXBTO,Tx Buffer Transmission Occurred" bitfld.long 0x0 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x0 30. "TO30,Transmission Occurred 30" "0,1" newline bitfld.long 0x0 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x0 28. "TO28,Transmission Occurred 28" "0,1" newline bitfld.long 0x0 27. "TO27,Transmission Occurred 27" "0,1" bitfld.long 0x0 26. "TO26,Transmission Occurred 26" "0,1" newline bitfld.long 0x0 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x0 24. "TO24,Transmission Occurred 24" "0,1" newline bitfld.long 0x0 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x0 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x0 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x0 20. "TO20,Transmission Occurred 20" "0,1" newline bitfld.long 0x0 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x0 18. "TO18,Transmission Occurred 18" "0,1" newline bitfld.long 0x0 17. "TO17,Transmission Occurred 17" "0,1" bitfld.long 0x0 16. "TO16,Transmission Occurred 16" "0,1" newline bitfld.long 0x0 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x0 14. "TO14,Transmission Occurred 14" "0,1" newline bitfld.long 0x0 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x0 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x0 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x0 10. "TO10,Transmission Occurred 10" "0,1" newline bitfld.long 0x0 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x0 8. "TO8,Transmission Occurred 8" "0,1" newline bitfld.long 0x0 7. "TO7,Transmission Occurred 7" "0,1" bitfld.long 0x0 6. "TO6,Transmission Occurred 6" "0,1" newline bitfld.long 0x0 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x0 4. "TO4,Transmission Occurred 4" "0,1" newline bitfld.long 0x0 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x0 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x0 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x0 0. "TO0,Transmission Occurred 0" "0,1" line.long 0x4 "TXBCF,Tx Buffer Cancellation Finished" bitfld.long 0x4 31. "CF31,Tx Buffer Cancellation Finished 31" "0,1" bitfld.long 0x4 30. "CF30,Tx Buffer Cancellation Finished 30" "0,1" newline bitfld.long 0x4 29. "CF29,Tx Buffer Cancellation Finished 29" "0,1" bitfld.long 0x4 28. "CF28,Tx Buffer Cancellation Finished 28" "0,1" newline bitfld.long 0x4 27. "CF27,Tx Buffer Cancellation Finished 27" "0,1" bitfld.long 0x4 26. "CF26,Tx Buffer Cancellation Finished 26" "0,1" newline bitfld.long 0x4 25. "CF25,Tx Buffer Cancellation Finished 25" "0,1" bitfld.long 0x4 24. "CF24,Tx Buffer Cancellation Finished 24" "0,1" newline bitfld.long 0x4 23. "CF23,Tx Buffer Cancellation Finished 23" "0,1" bitfld.long 0x4 22. "CF22,Tx Buffer Cancellation Finished 22" "0,1" newline bitfld.long 0x4 21. "CF21,Tx Buffer Cancellation Finished 21" "0,1" bitfld.long 0x4 20. "CF20,Tx Buffer Cancellation Finished 20" "0,1" newline bitfld.long 0x4 19. "CF19,Tx Buffer Cancellation Finished 19" "0,1" bitfld.long 0x4 18. "CF18,Tx Buffer Cancellation Finished 18" "0,1" newline bitfld.long 0x4 17. "CF17,Tx Buffer Cancellation Finished 17" "0,1" bitfld.long 0x4 16. "CF16,Tx Buffer Cancellation Finished 16" "0,1" newline bitfld.long 0x4 15. "CF15,Tx Buffer Cancellation Finished 15" "0,1" bitfld.long 0x4 14. "CF14,Tx Buffer Cancellation Finished 14" "0,1" newline bitfld.long 0x4 13. "CF13,Tx Buffer Cancellation Finished 13" "0,1" bitfld.long 0x4 12. "CF12,Tx Buffer Cancellation Finished 12" "0,1" newline bitfld.long 0x4 11. "CF11,Tx Buffer Cancellation Finished 11" "0,1" bitfld.long 0x4 10. "CF10,Tx Buffer Cancellation Finished 10" "0,1" newline bitfld.long 0x4 9. "CF9,Tx Buffer Cancellation Finished 9" "0,1" bitfld.long 0x4 8. "CF8,Tx Buffer Cancellation Finished 8" "0,1" newline bitfld.long 0x4 7. "CF7,Tx Buffer Cancellation Finished 7" "0,1" bitfld.long 0x4 6. "CF6,Tx Buffer Cancellation Finished 6" "0,1" newline bitfld.long 0x4 5. "CF5,Tx Buffer Cancellation Finished 5" "0,1" bitfld.long 0x4 4. "CF4,Tx Buffer Cancellation Finished 4" "0,1" newline bitfld.long 0x4 3. "CF3,Tx Buffer Cancellation Finished 3" "0,1" bitfld.long 0x4 2. "CF2,Tx Buffer Cancellation Finished 2" "0,1" newline bitfld.long 0x4 1. "CF1,Tx Buffer Cancellation Finished 1" "0,1" bitfld.long 0x4 0. "CF0,Tx Buffer Cancellation Finished 0" "0,1" group.long 0xE0++0x7 line.long 0x0 "TXBTIE,Tx Buffer Transmission Interrupt Enable" bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable 31" "0,1" bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable 30" "0,1" newline bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable 29" "0,1" bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable 28" "0,1" newline bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable 27" "0,1" bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable 26" "0,1" newline bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable 25" "0,1" bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable 24" "0,1" newline bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable 23" "0,1" bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable 22" "0,1" newline bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable 21" "0,1" bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable 20" "0,1" newline bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable 19" "0,1" bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable 18" "0,1" newline bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable 17" "0,1" bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable 16" "0,1" newline bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable 15" "0,1" bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable 14" "0,1" newline bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable 13" "0,1" bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable 12" "0,1" newline bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable 11" "0,1" bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable 10" "0,1" newline bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable 9" "0,1" bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable 8" "0,1" newline bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable 7" "0,1" bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable 6" "0,1" newline bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable 5" "0,1" bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable 4" "0,1" newline bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable 3" "0,1" bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable 2" "0,1" newline bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable 1" "0,1" bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable 0" "0,1" line.long 0x4 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable" bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable 31" "0,1" bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable 30" "0,1" newline bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable 29" "0,1" bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable 28" "0,1" newline bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable 27" "0,1" bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable 26" "0,1" newline bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable 25" "0,1" bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable 24" "0,1" newline bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable 23" "0,1" bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable 22" "0,1" newline bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable 21" "0,1" bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable 20" "0,1" newline bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable 19" "0,1" bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable 18" "0,1" newline bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable 17" "0,1" bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable 16" "0,1" newline bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable 15" "0,1" bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable 14" "0,1" newline bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable 13" "0,1" bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable 12" "0,1" newline bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable 11" "0,1" bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable 10" "0,1" newline bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable 9" "0,1" bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable 8" "0,1" newline bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable 7" "0,1" bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable 6" "0,1" newline bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable 5" "0,1" bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable 4" "0,1" newline bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable 3" "0,1" bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable 2" "0,1" newline bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable 1" "0,1" bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable 0" "0,1" group.long 0xF0++0x3 line.long 0x0 "TXEFC,Tx Event FIFO Configuration" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size" newline hexmask.long.word 0x0 0.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long 0xF4++0x3 line.long 0x0 "TXEFS,Tx Event FIFO Status" bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1" newline hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index" newline hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level" group.long 0xF8++0x3 line.long 0x0 "TXEFA,Tx Event FIFO Acknowledge" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index" group.long 0x100++0x3 line.long 0x0 "ERROR,Error Interrupt Flag" bitfld.long 0x0 0. "BERR,AHB Bus Error Detection" "0,1" tree.end tree "CAN5" base ad:0x46860000 rgroup.long 0x0++0x7 line.long 0x0 "CREL,Core Release" hexmask.long.byte 0x0 28.--31. 1. "REL,Core Release" hexmask.long.byte 0x0 24.--27. 1. "STEP,Step of Core Release" newline hexmask.long.byte 0x0 20.--23. 1. "SUBSTEP,Sub-step of Core Release" line.long 0x4 "ENDN,Endian" hexmask.long 0x4 0.--31. 1. "ETV,Endianness Test Value" group.long 0x8++0x1B line.long 0x0 "MRCFG,Message RAM Configuration" hexmask.long.byte 0x0 16.--23. 1. "OFFSET,Base address offset" line.long 0x4 "DBTP,Fast Bit Timing and Prescaler" bitfld.long 0x4 23. "TDC,Tranceiver Delay Compensation" "0,1" hexmask.long.byte 0x4 16.--20. 1. "DBRP,Data Baud Rate Prescaler" newline hexmask.long.byte 0x4 8.--12. 1. "DTSEG1,Data time segment before sample point" hexmask.long.byte 0x4 4.--7. 1. "DTSEG2,Data time segment after sample point" newline hexmask.long.byte 0x4 0.--3. 1. "DSJW,Data (Re)Synchronization Jump Width" line.long 0x8 "TEST,Test" bitfld.long 0x8 7. "RX,Receive Pin" "0,1" bitfld.long 0x8 5.--6. "TX,Control of Transmit Pin" "0: TX controlled by CAN core,1: TX monitoring sample point,2: Dominant (0) level at pin CAN_TX,3: Recessive (1) level at pin CAN_TX" newline bitfld.long 0x8 4. "LBCK,Loop Back Mode" "0,1" line.long 0xC "RWD,RAM Watchdog" hexmask.long.byte 0xC 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0xC 0.--7. 1. "WDC,Watchdog Configuration" line.long 0x10 "CCCR,CC Control" bitfld.long 0x10 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x10 13. "EFBI,Edge Filtering during Bus Integration" "0,1" newline bitfld.long 0x10 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x10 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x10 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x10 7. "TEST,Test Mode Enable" "0,1" newline bitfld.long 0x10 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x10 5. "MON,Bus Monitoring Mode" "0,1" newline bitfld.long 0x10 4. "CSR,Clock Stop Request" "0,1" bitfld.long 0x10 3. "CSA,Clock Stop Acknowledge" "0,1" newline bitfld.long 0x10 2. "ASM,ASM Restricted Operation Mode" "0,1" bitfld.long 0x10 1. "CCE,Configuration Change Enable" "0,1" newline bitfld.long 0x10 0. "INIT,Initialization" "0,1" line.long 0x14 "NBTP,Nominal Bit Timing and Prescaler" hexmask.long.byte 0x14 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x14 16.--24. 1. "NBRP,Nominal Baud Rate Prescaler" newline hexmask.long.byte 0x14 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x14 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" line.long 0x18 "TSCC,Timestamp Counter Configuration" hexmask.long.byte 0x18 16.--19. 1. "TCP,Timestamp Counter Prescaler" bitfld.long 0x18 0.--1. "TSS,Timestamp Select" "0: Timestamp counter value always 0x0000,1: Timestamp counter value incremented by TCP,?,?" rgroup.long 0x24++0x3 line.long 0x0 "TSCV,Timestamp Counter Value" hexmask.long.word 0x0 0.--15. 1. "TSC,Timestamp Counter" group.long 0x28++0x7 line.long 0x0 "TOCC,Timeout Counter Configuration" hexmask.long.word 0x0 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x0 1.--2. "TOS,Timeout Select" "0: Continuout operation,1: Timeout controlled by TX Event FIFO,2: Timeout controlled by Rx FIFO 0,3: Timeout controlled by Rx FIFO 1" newline bitfld.long 0x0 0. "ETOC,Enable Timeout Counter" "0,1" line.long 0x4 "TOCV,Timeout Counter Value" hexmask.long.word 0x4 0.--15. 1. "TOC,Timeout Counter" rgroup.long 0x40++0x7 line.long 0x0 "ECR,Error Counter" hexmask.long.byte 0x0 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x0 15. "RP,Receive Error Passive" "0,1" newline hexmask.long.byte 0x0 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x0 0.--7. 1. "TEC,Transmit Error Counter" line.long 0x4 "PSR,Protocol Status" hexmask.long.byte 0x4 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x4 14. "PXE,Protocol Exception Event" "0,1" newline bitfld.long 0x4 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x4 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" newline bitfld.long 0x4 11. "RESI,ESI flag of last received CAN FD Message" "0,1" bitfld.long 0x4 8.--10. "DLEC,Data Phase Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" newline bitfld.long 0x4 7. "BO,Bus_Off Status" "0,1" bitfld.long 0x4 6. "EW,Warning Status" "0,1" newline bitfld.long 0x4 5. "EP,Error Passive" "0,1" bitfld.long 0x4 3.--4. "ACT,Activity" "0: Node is synchronizing on CAN communication,1: Node is neither receiver nor transmitter,2: Node is operating as receiver,3: Node is operating as transmitter" newline bitfld.long 0x4 0.--2. "LEC,Last Error Code" "0: No Error,1: Stuff Error,2: Form Error,3: Ack Error,4: Bit1 Error,5: Bit0 Error,6: CRC Error,7: No Change" group.long 0x48++0x3 line.long 0x0 "TDCR,Extended ID Filter Configuration" hexmask.long.byte 0x0 8.--14. 1. "TDCO,Transmitter Delay Compensation Offset" hexmask.long.byte 0x0 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Length" group.long 0x50++0xF line.long 0x0 "IR,Interrupt" bitfld.long 0x0 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x0 28. "PED,Protocol Error in Data Phase" "0,1" newline bitfld.long 0x0 27. "PEA,Protocol Error in Arbitration Phase" "0,1" bitfld.long 0x0 26. "WDI,Watchdog Interrupt" "0,1" newline bitfld.long 0x0 25. "BO,Bus_Off Status" "0,1" bitfld.long 0x0 24. "EW,Warning Status" "0,1" newline bitfld.long 0x0 23. "EP,Error Passive" "0,1" bitfld.long 0x0 22. "ELO,Error Logging Overflow" "0,1" newline bitfld.long 0x0 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x0 18. "TOO,Timeout Occurred" "0,1" newline bitfld.long 0x0 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x0 16. "TSW,Timestamp Wraparound" "0,1" newline bitfld.long 0x0 15. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 14. "TEFF,Tx Event FIFO Full" "0,1" newline bitfld.long 0x0 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x0 12. "TEFN,Tx Event FIFO New Entry" "0,1" newline bitfld.long 0x0 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x0 10. "TCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x0 9. "TC,Timestamp Completed" "0,1" bitfld.long 0x0 8. "HPM,High Priority Message" "0,1" newline bitfld.long 0x0 7. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x0 6. "RF1F,Rx FIFO 1 FIFO Full" "0,1" newline bitfld.long 0x0 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" bitfld.long 0x0 4. "RF1N,Rx FIFO 1 New Message" "0,1" newline bitfld.long 0x0 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 2. "RF0F,Rx FIFO 0 Full" "0,1" newline bitfld.long 0x0 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x0 0. "RF0N,Rx FIFO 0 New Message" "0,1" line.long 0x4 "IE,Interrupt Enable" bitfld.long 0x4 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x4 28. "PEDE,Protocol Error in Data Phase Enable" "0,1" newline bitfld.long 0x4 27. "PEAE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x4 26. "WDIE,Watchdog Interrupt Interrupt Enable" "0,1" newline bitfld.long 0x4 25. "BOE,Bus_Off Status Interrupt Enable" "0,1" bitfld.long 0x4 24. "EWE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x4 23. "EPE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x4 22. "ELOE,Error Logging Overflow Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "DRXE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x4 18. "TOOE,Timeout Occurred Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MRAFE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x4 16. "TSWE,Timestamp Wraparound Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "TEFLE,Tx Event FIFO Element Lost Interrupt Enable" "0,1" bitfld.long 0x4 14. "TEFFE,Tx Event FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "TEFWE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 12. "TEFNE,Tx Event FIFO New Entry Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "TFEE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x4 10. "TCFE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x4 9. "TCE,Timestamp Completed Interrupt Enable" "0,1" bitfld.long 0x4 8. "HPME,High Priority Message Interrupt Enable" "0,1" newline bitfld.long 0x4 7. "RF1LE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 6. "RF1FE,Rx FIFO 1 FIFO Full Interrupt Enable" "0,1" newline bitfld.long 0x4 5. "RF1WE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 4. "RF1NE,Rx FIFO 1 New Message Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "RF0LE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x4 2. "RF0FE,Rx FIFO 0 Full Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "RF0WE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x4 0. "RF0NE,Rx FIFO 0 New Message Interrupt Enable" "0,1" line.long 0x8 "ILS,Interrupt Line Select" bitfld.long 0x8 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x8 28. "PEDL,Protocol Error in Data Phase Line" "0,1" newline bitfld.long 0x8 27. "PEAL,Protocol Error in Arbitration Phase Line" "0,1" bitfld.long 0x8 26. "WDIL,Watchdog Interrupt Interrupt Line" "0,1" newline bitfld.long 0x8 25. "BOL,Bus_Off Status Interrupt Line" "0,1" bitfld.long 0x8 24. "EWL,Warning Status Interrupt Line" "0,1" newline bitfld.long 0x8 23. "EPL,Error Passive Interrupt Line" "0,1" bitfld.long 0x8 22. "ELOL,Error Logging Overflow Interrupt Line" "0,1" newline bitfld.long 0x8 19. "DRXL,Message stored to Dedicated Rx Buffer Interrupt Line" "0,1" bitfld.long 0x8 18. "TOOL,Timeout Occurred Interrupt Line" "0,1" newline bitfld.long 0x8 17. "MRAFL,Message RAM Access Failure Interrupt Line" "0,1" bitfld.long 0x8 16. "TSWL,Timestamp Wraparound Interrupt Line" "0,1" newline bitfld.long 0x8 15. "TEFLL,Tx Event FIFO Element Lost Interrupt Line" "0,1" bitfld.long 0x8 14. "TEFFL,Tx Event FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 13. "TEFWL,Tx Event FIFO Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 12. "TEFNL,Tx Event FIFO New Entry Interrupt Line" "0,1" newline bitfld.long 0x8 11. "TFEL,Tx FIFO Empty Interrupt Line" "0,1" bitfld.long 0x8 10. "TCFL,Transmission Cancellation Finished Interrupt Line" "0,1" newline bitfld.long 0x8 9. "TCL,Timestamp Completed Interrupt Line" "0,1" bitfld.long 0x8 8. "HPML,High Priority Message Interrupt Line" "0,1" newline bitfld.long 0x8 7. "RF1LL,Rx FIFO 1 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 6. "RF1FL,Rx FIFO 1 FIFO Full Interrupt Line" "0,1" newline bitfld.long 0x8 5. "RF1WL,Rx FIFO 1 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 4. "RF1NL,Rx FIFO 1 New Message Interrupt Line" "0,1" newline bitfld.long 0x8 3. "RF0LL,Rx FIFO 0 Message Lost Interrupt Line" "0,1" bitfld.long 0x8 2. "RF0FL,Rx FIFO 0 Full Interrupt Line" "0,1" newline bitfld.long 0x8 1. "RF0WL,Rx FIFO 0 Watermark Reached Interrupt Line" "0,1" bitfld.long 0x8 0. "RF0NL,Rx FIFO 0 New Message Interrupt Line" "0,1" line.long 0xC "ILE,Interrupt Line Enable" bitfld.long 0xC 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0xC 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long 0x80++0xB line.long 0x0 "GFC,Global Filter Configuration" bitfld.long 0x0 4.--5. "ANFS,Accept Non-matching Frames Standard" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" bitfld.long 0x0 2.--3. "ANFE,Accept Non-matching Frames Extended" "0: Accept in Rx FIFO 0,1: Accept in Rx FIFO 1,2: Reject,?" newline bitfld.long 0x0 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x0 0. "RRFE,Reject Remote Frames Extended" "0,1" line.long 0x4 "SIDFC,Standard ID Filter Configuration" hexmask.long.byte 0x4 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x4 0.--15. 1. "FLSSA,Filter List Standard Start Address" line.long 0x8 "XIDFC,Extended ID Filter Configuration" hexmask.long.byte 0x8 16.--22. 1. "LSE,List Size Extended" hexmask.long.word 0x8 0.--15. 1. "FLESA,Filter List Extended Start Address" group.long 0x90++0x3 line.long 0x0 "XIDAM,Extended ID AND Mask" hexmask.long 0x0 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long 0x94++0x3 line.long 0x0 "HPMS,High Priority Message Status" bitfld.long 0x0 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x0 8.--14. 1. "FIDX,Filter Index" newline bitfld.long 0x0 6.--7. "MSI,Message Storage Indicator" "0: No FIFO selected,1: FIFO message lost,2: Message stored in FIFO 0,3: Message stored in FIFO 1" hexmask.long.byte 0x0 0.--5. 1. "BIDX,Buffer Index" group.long 0x98++0xB line.long 0x0 "NDAT1,New Data 1" bitfld.long 0x0 31. "ND31,New Data 31" "0,1" bitfld.long 0x0 30. "ND30,New Data 30" "0,1" newline bitfld.long 0x0 29. "ND29,New Data 29" "0,1" bitfld.long 0x0 28. "ND28,New Data 28" "0,1" newline bitfld.long 0x0 27. "ND27,New Data 27" "0,1" bitfld.long 0x0 26. "ND26,New Data 26" "0,1" newline bitfld.long 0x0 25. "ND25,New Data 25" "0,1" bitfld.long 0x0 24. "ND24,New Data 24" "0,1" newline bitfld.long 0x0 23. "ND23,New Data 23" "0,1" bitfld.long 0x0 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x0 21. "ND21,New Data 21" "0,1" bitfld.long 0x0 20. "ND20,New Data 20" "0,1" newline bitfld.long 0x0 19. "ND19,New Data 19" "0,1" bitfld.long 0x0 18. "ND18,New Data 18" "0,1" newline bitfld.long 0x0 17. "ND17,New Data 17" "0,1" bitfld.long 0x0 16. "ND16,New Data 16" "0,1" newline bitfld.long 0x0 15. "ND15,New Data 15" "0,1" bitfld.long 0x0 14. "ND14,New Data 14" "0,1" newline bitfld.long 0x0 13. "ND13,New Data 13" "0,1" bitfld.long 0x0 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x0 11. "ND11,New Data 11" "0,1" bitfld.long 0x0 10. "ND10,New Data 10" "0,1" newline bitfld.long 0x0 9. "ND9,New Data 9" "0,1" bitfld.long 0x0 8. "ND8,New Data 8" "0,1" newline bitfld.long 0x0 7. "ND7,New Data 7" "0,1" bitfld.long 0x0 6. "ND6,New Data 6" "0,1" newline bitfld.long 0x0 5. "ND5,New Data 5" "0,1" bitfld.long 0x0 4. "ND4,New Data 4" "0,1" newline bitfld.long 0x0 3. "ND3,New Data 3" "0,1" bitfld.long 0x0 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x0 1. "ND1,New Data 1" "0,1" bitfld.long 0x0 0. "ND0,New Data 0" "0,1" line.long 0x4 "NDAT2,New Data 2" bitfld.long 0x4 31. "ND63,New Data 63" "0,1" bitfld.long 0x4 30. "ND62,New Data 62" "0,1" newline bitfld.long 0x4 29. "ND61,New Data 61" "0,1" bitfld.long 0x4 28. "ND60,New Data 60" "0,1" newline bitfld.long 0x4 27. "ND59,New Data 59" "0,1" bitfld.long 0x4 26. "ND58,New Data 58" "0,1" newline bitfld.long 0x4 25. "ND57,New Data 57" "0,1" bitfld.long 0x4 24. "ND56,New Data 56" "0,1" newline bitfld.long 0x4 23. "ND55,New Data 55" "0,1" bitfld.long 0x4 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x4 21. "ND53,New Data 53" "0,1" bitfld.long 0x4 20. "ND52,New Data 52" "0,1" newline bitfld.long 0x4 19. "ND51,New Data 51" "0,1" bitfld.long 0x4 18. "ND50,New Data 50" "0,1" newline bitfld.long 0x4 17. "ND49,New Data 49" "0,1" bitfld.long 0x4 16. "ND48,New Data 48" "0,1" newline bitfld.long 0x4 15. "ND47,New Data 47" "0,1" bitfld.long 0x4 14. "ND46,New Data 46" "0,1" newline bitfld.long 0x4 13. "ND45,New Data 45" "0,1" bitfld.long 0x4 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x4 11. "ND43,New Data 43" "0,1" bitfld.long 0x4 10. "ND42,New Data 42" "0,1" newline bitfld.long 0x4 9. "ND41,New Data 41" "0,1" bitfld.long 0x4 8. "ND40,New Data 40" "0,1" newline bitfld.long 0x4 7. "ND39,New Data 39" "0,1" bitfld.long 0x4 6. "ND38,New Data 38" "0,1" newline bitfld.long 0x4 5. "ND37,New Data 37" "0,1" bitfld.long 0x4 4. "ND36,New Data 36" "0,1" newline bitfld.long 0x4 3. "ND35,New Data 35" "0,1" bitfld.long 0x4 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x4 1. "ND33,New Data 33" "0,1" bitfld.long 0x4 0. "ND32,New Data 32" "0,1" line.long 0x8 "RXF0C,Rx FIFO 0 Configuration" bitfld.long 0x8 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x8 0.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long 0xA4++0x3 line.long 0x0 "RXF0S,Rx FIFO 0 Status" bitfld.long 0x0 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x0 24. "F0F,Rx FIFO 0 Full" "0,1" newline hexmask.long.byte 0x0 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x0 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" newline hexmask.long.byte 0x0 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long 0xA8++0xB line.long 0x0 "RXF0A,Rx FIFO 0 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" line.long 0x4 "RXBC,Rx Buffer Configuration" hexmask.long.word 0x4 0.--15. 1. "RBSA,Rx Buffer Start Address" line.long 0x8 "RXF1C,Rx FIFO 1 Configuration" bitfld.long 0x8 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x8 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" newline hexmask.long.byte 0x8 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x8 0.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long 0xB4++0x3 line.long 0x0 "RXF1S,Rx FIFO 1 Status" bitfld.long 0x0 30.--31. "DMS,Debug Message Status" "0: Idle state,1: Debug message A received,2: Debug message A/B received,3: Debug message A/B/C received DMA request set" bitfld.long 0x0 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" newline bitfld.long 0x0 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x0 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" newline hexmask.long.byte 0x0 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x0 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long 0xB8++0xB line.long 0x0 "RXF1A,Rx FIFO 1 Acknowledge" hexmask.long.byte 0x0 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" line.long 0x4 "RXESC,Rx Buffer / FIFO Element Size Configuration" bitfld.long 0x4 8.--10. "RBDS,Rx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" bitfld.long 0x4 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" newline bitfld.long 0x4 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" line.long 0x8 "TXBC,Tx Buffer Configuration" bitfld.long 0x8 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x8 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" newline hexmask.long.byte 0x8 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x8 0.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long 0xC4++0x3 line.long 0x0 "TXFQS,Tx FIFO / Queue Status" bitfld.long 0x0 21. "TFQF,Tx FIFO/Queue Full" "0,1" hexmask.long.byte 0x0 16.--20. 1. "TFQPI,Tx FIFO/Queue Put Index" newline hexmask.long.byte 0x0 8.--12. 1. "TFGI,Tx FIFO Get Index" hexmask.long.byte 0x0 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long 0xC8++0x3 line.long 0x0 "TXESC,Tx Buffer Element Size Configuration" bitfld.long 0x0 0.--2. "TBDS,Tx Buffer Data Field Size" "0: 8 byte data field,1: 12 byte data field,2: 16 byte data field,3: 20 byte data field,4: 24 byte data field,5: 32 byte data field,6: 48 byte data field,7: 64 byte data field" rgroup.long 0xCC++0x3 line.long 0x0 "TXBRP,Tx Buffer Request Pending" bitfld.long 0x0 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x0 30. "TRP30,Transmission Request Pending 30" "0,1" newline bitfld.long 0x0 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x0 28. "TRP28,Transmission Request Pending 28" "0,1" newline bitfld.long 0x0 27. "TRP27,Transmission Request Pending 27" "0,1" bitfld.long 0x0 26. "TRP26,Transmission Request Pending 26" "0,1" newline bitfld.long 0x0 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x0 24. "TRP24,Transmission Request Pending 24" "0,1" newline bitfld.long 0x0 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x0 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x0 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x0 20. "TRP20,Transmission Request Pending 20" "0,1" newline bitfld.long 0x0 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x0 18. "TRP18,Transmission Request Pending 18" "0,1" newline bitfld.long 0x0 17. "TRP17,Transmission Request Pending 17" "0,1" bitfld.long 0x0 16. "TRP16,Transmission Request Pending 16" "0,1" newline bitfld.long 0x0 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x0 14. "TRP14,Transmission Request Pending 14" "0,1" newline bitfld.long 0x0 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x0 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x0 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x0 10. "TRP10,Transmission Request Pending 10" "0,1" newline bitfld.long 0x0 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x0 8. "TRP8,Transmission Request Pending 8" "0,1" newline bitfld.long 0x0 7. "TRP7,Transmission Request Pending 7" "0,1" bitfld.long 0x0 6. "TRP6,Transmission Request Pending 6" "0,1" newline bitfld.long 0x0 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x0 4. "TRP4,Transmission Request Pending 4" "0,1" newline bitfld.long 0x0 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x0 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x0 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x0 0. "TRP0,Transmission Request Pending 0" "0,1" group.long 0xD0++0x7 line.long 0x0 "TXBAR,Tx Buffer Add Request" bitfld.long 0x0 31. "AR31,Add Request 31" "0,1" bitfld.long 0x0 30. "AR30,Add Request 30" "0,1" newline bitfld.long 0x0 29. "AR29,Add Request 29" "0,1" bitfld.long 0x0 28. "AR28,Add Request 28" "0,1" newline bitfld.long 0x0 27. "AR27,Add Request 27" "0,1" bitfld.long 0x0 26. "AR26,Add Request 26" "0,1" newline bitfld.long 0x0 25. "AR25,Add Request 25" "0,1" bitfld.long 0x0 24. "AR24,Add Request 24" "0,1" newline bitfld.long 0x0 23. "AR23,Add Request 23" "0,1" bitfld.long 0x0 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x0 21. "AR21,Add Request 21" "0,1" bitfld.long 0x0 20. "AR20,Add Request 20" "0,1" newline bitfld.long 0x0 19. "AR19,Add Request 19" "0,1" bitfld.long 0x0 18. "AR18,Add Request 18" "0,1" newline bitfld.long 0x0 17. "AR17,Add Request 17" "0,1" bitfld.long 0x0 16. "AR16,Add Request 16" "0,1" newline bitfld.long 0x0 15. "AR15,Add Request 15" "0,1" bitfld.long 0x0 14. "AR14,Add Request 14" "0,1" newline bitfld.long 0x0 13. "AR13,Add Request 13" "0,1" bitfld.long 0x0 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x0 11. "AR11,Add Request 11" "0,1" bitfld.long 0x0 10. "AR10,Add Request 10" "0,1" newline bitfld.long 0x0 9. "AR9,Add Request 9" "0,1" bitfld.long 0x0 8. "AR8,Add Request 8" "0,1" newline bitfld.long 0x0 7. "AR7,Add Request 7" "0,1" bitfld.long 0x0 6. "AR6,Add Request 6" "0,1" newline bitfld.long 0x0 5. "AR5,Add Request 5" "0,1" bitfld.long 0x0 4. "AR4,Add Request 4" "0,1" newline bitfld.long 0x0 3. "AR3,Add Request 3" "0,1" bitfld.long 0x0 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x0 1. "AR1,Add Request 1" "0,1" bitfld.long 0x0 0. "AR0,Add Request 0" "0,1" line.long 0x4 "TXBCR,Tx Buffer Cancellation Request" bitfld.long 0x4 31. "CR31,Cancellation Request 31" "0,1" bitfld.long 0x4 30. "CR30,Cancellation Request 30" "0,1" newline bitfld.long 0x4 29. "CR29,Cancellation Request 29" "0,1" bitfld.long 0x4 28. "CR28,Cancellation Request 28" "0,1" newline bitfld.long 0x4 27. "CR27,Cancellation Request 27" "0,1" bitfld.long 0x4 26. "CR26,Cancellation Request 26" "0,1" newline bitfld.long 0x4 25. "CR25,Cancellation Request 25" "0,1" bitfld.long 0x4 24. "CR24,Cancellation Request 24" "0,1" newline bitfld.long 0x4 23. "CR23,Cancellation Request 23" "0,1" bitfld.long 0x4 22. "CR22,Cancellation Request 22" "0,1" newline bitfld.long 0x4 21. "CR21,Cancellation Request 21" "0,1" bitfld.long 0x4 20. "CR20,Cancellation Request 20" "0,1" newline bitfld.long 0x4 19. "CR19,Cancellation Request 19" "0,1" bitfld.long 0x4 18. "CR18,Cancellation Request 18" "0,1" newline bitfld.long 0x4 17. "CR17,Cancellation Request 17" "0,1" bitfld.long 0x4 16. "CR16,Cancellation Request 16" "0,1" newline bitfld.long 0x4 15. "CR15,Cancellation Request 15" "0,1" bitfld.long 0x4 14. "CR14,Cancellation Request 14" "0,1" newline bitfld.long 0x4 13. "CR13,Cancellation Request 13" "0,1" bitfld.long 0x4 12. "CR12,Cancellation Request 12" "0,1" newline bitfld.long 0x4 11. "CR11,Cancellation Request 11" "0,1" bitfld.long 0x4 10. "CR10,Cancellation Request 10" "0,1" newline bitfld.long 0x4 9. "CR9,Cancellation Request 9" "0,1" bitfld.long 0x4 8. "CR8,Cancellation Request 8" "0,1" newline bitfld.long 0x4 7. "CR7,Cancellation Request 7" "0,1" bitfld.long 0x4 6. "CR6,Cancellation Request 6" "0,1" newline bitfld.long 0x4 5. "CR5,Cancellation Request 5" "0,1" bitfld.long 0x4 4. "CR4,Cancellation Request 4" "0,1" newline bitfld.long 0x4 3. "CR3,Cancellation Request 3" "0,1" bitfld.long 0x4 2. "CR2,Cancellation Request 2" "0,1" newline bitfld.long 0x4 1. "CR1,Cancellation Request 1" "0,1" bitfld.long 0x4 0. "CR0,Cancellation Request 0" "0,1" rgroup.long 0xD8++0x7 line.long 0x0 "TXBTO,Tx Buffer Transmission Occurred" bitfld.long 0x0 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x0 30. "TO30,Transmission Occurred 30" "0,1" newline bitfld.long 0x0 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x0 28. "TO28,Transmission Occurred 28" "0,1" newline bitfld.long 0x0 27. "TO27,Transmission Occurred 27" "0,1" bitfld.long 0x0 26. "TO26,Transmission Occurred 26" "0,1" newline bitfld.long 0x0 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x0 24. "TO24,Transmission Occurred 24" "0,1" newline bitfld.long 0x0 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x0 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x0 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x0 20. "TO20,Transmission Occurred 20" "0,1" newline bitfld.long 0x0 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x0 18. "TO18,Transmission Occurred 18" "0,1" newline bitfld.long 0x0 17. "TO17,Transmission Occurred 17" "0,1" bitfld.long 0x0 16. "TO16,Transmission Occurred 16" "0,1" newline bitfld.long 0x0 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x0 14. "TO14,Transmission Occurred 14" "0,1" newline bitfld.long 0x0 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x0 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x0 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x0 10. "TO10,Transmission Occurred 10" "0,1" newline bitfld.long 0x0 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x0 8. "TO8,Transmission Occurred 8" "0,1" newline bitfld.long 0x0 7. "TO7,Transmission Occurred 7" "0,1" bitfld.long 0x0 6. "TO6,Transmission Occurred 6" "0,1" newline bitfld.long 0x0 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x0 4. "TO4,Transmission Occurred 4" "0,1" newline bitfld.long 0x0 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x0 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x0 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x0 0. "TO0,Transmission Occurred 0" "0,1" line.long 0x4 "TXBCF,Tx Buffer Cancellation Finished" bitfld.long 0x4 31. "CF31,Tx Buffer Cancellation Finished 31" "0,1" bitfld.long 0x4 30. "CF30,Tx Buffer Cancellation Finished 30" "0,1" newline bitfld.long 0x4 29. "CF29,Tx Buffer Cancellation Finished 29" "0,1" bitfld.long 0x4 28. "CF28,Tx Buffer Cancellation Finished 28" "0,1" newline bitfld.long 0x4 27. "CF27,Tx Buffer Cancellation Finished 27" "0,1" bitfld.long 0x4 26. "CF26,Tx Buffer Cancellation Finished 26" "0,1" newline bitfld.long 0x4 25. "CF25,Tx Buffer Cancellation Finished 25" "0,1" bitfld.long 0x4 24. "CF24,Tx Buffer Cancellation Finished 24" "0,1" newline bitfld.long 0x4 23. "CF23,Tx Buffer Cancellation Finished 23" "0,1" bitfld.long 0x4 22. "CF22,Tx Buffer Cancellation Finished 22" "0,1" newline bitfld.long 0x4 21. "CF21,Tx Buffer Cancellation Finished 21" "0,1" bitfld.long 0x4 20. "CF20,Tx Buffer Cancellation Finished 20" "0,1" newline bitfld.long 0x4 19. "CF19,Tx Buffer Cancellation Finished 19" "0,1" bitfld.long 0x4 18. "CF18,Tx Buffer Cancellation Finished 18" "0,1" newline bitfld.long 0x4 17. "CF17,Tx Buffer Cancellation Finished 17" "0,1" bitfld.long 0x4 16. "CF16,Tx Buffer Cancellation Finished 16" "0,1" newline bitfld.long 0x4 15. "CF15,Tx Buffer Cancellation Finished 15" "0,1" bitfld.long 0x4 14. "CF14,Tx Buffer Cancellation Finished 14" "0,1" newline bitfld.long 0x4 13. "CF13,Tx Buffer Cancellation Finished 13" "0,1" bitfld.long 0x4 12. "CF12,Tx Buffer Cancellation Finished 12" "0,1" newline bitfld.long 0x4 11. "CF11,Tx Buffer Cancellation Finished 11" "0,1" bitfld.long 0x4 10. "CF10,Tx Buffer Cancellation Finished 10" "0,1" newline bitfld.long 0x4 9. "CF9,Tx Buffer Cancellation Finished 9" "0,1" bitfld.long 0x4 8. "CF8,Tx Buffer Cancellation Finished 8" "0,1" newline bitfld.long 0x4 7. "CF7,Tx Buffer Cancellation Finished 7" "0,1" bitfld.long 0x4 6. "CF6,Tx Buffer Cancellation Finished 6" "0,1" newline bitfld.long 0x4 5. "CF5,Tx Buffer Cancellation Finished 5" "0,1" bitfld.long 0x4 4. "CF4,Tx Buffer Cancellation Finished 4" "0,1" newline bitfld.long 0x4 3. "CF3,Tx Buffer Cancellation Finished 3" "0,1" bitfld.long 0x4 2. "CF2,Tx Buffer Cancellation Finished 2" "0,1" newline bitfld.long 0x4 1. "CF1,Tx Buffer Cancellation Finished 1" "0,1" bitfld.long 0x4 0. "CF0,Tx Buffer Cancellation Finished 0" "0,1" group.long 0xE0++0x7 line.long 0x0 "TXBTIE,Tx Buffer Transmission Interrupt Enable" bitfld.long 0x0 31. "TIE31,Transmission Interrupt Enable 31" "0,1" bitfld.long 0x0 30. "TIE30,Transmission Interrupt Enable 30" "0,1" newline bitfld.long 0x0 29. "TIE29,Transmission Interrupt Enable 29" "0,1" bitfld.long 0x0 28. "TIE28,Transmission Interrupt Enable 28" "0,1" newline bitfld.long 0x0 27. "TIE27,Transmission Interrupt Enable 27" "0,1" bitfld.long 0x0 26. "TIE26,Transmission Interrupt Enable 26" "0,1" newline bitfld.long 0x0 25. "TIE25,Transmission Interrupt Enable 25" "0,1" bitfld.long 0x0 24. "TIE24,Transmission Interrupt Enable 24" "0,1" newline bitfld.long 0x0 23. "TIE23,Transmission Interrupt Enable 23" "0,1" bitfld.long 0x0 22. "TIE22,Transmission Interrupt Enable 22" "0,1" newline bitfld.long 0x0 21. "TIE21,Transmission Interrupt Enable 21" "0,1" bitfld.long 0x0 20. "TIE20,Transmission Interrupt Enable 20" "0,1" newline bitfld.long 0x0 19. "TIE19,Transmission Interrupt Enable 19" "0,1" bitfld.long 0x0 18. "TIE18,Transmission Interrupt Enable 18" "0,1" newline bitfld.long 0x0 17. "TIE17,Transmission Interrupt Enable 17" "0,1" bitfld.long 0x0 16. "TIE16,Transmission Interrupt Enable 16" "0,1" newline bitfld.long 0x0 15. "TIE15,Transmission Interrupt Enable 15" "0,1" bitfld.long 0x0 14. "TIE14,Transmission Interrupt Enable 14" "0,1" newline bitfld.long 0x0 13. "TIE13,Transmission Interrupt Enable 13" "0,1" bitfld.long 0x0 12. "TIE12,Transmission Interrupt Enable 12" "0,1" newline bitfld.long 0x0 11. "TIE11,Transmission Interrupt Enable 11" "0,1" bitfld.long 0x0 10. "TIE10,Transmission Interrupt Enable 10" "0,1" newline bitfld.long 0x0 9. "TIE9,Transmission Interrupt Enable 9" "0,1" bitfld.long 0x0 8. "TIE8,Transmission Interrupt Enable 8" "0,1" newline bitfld.long 0x0 7. "TIE7,Transmission Interrupt Enable 7" "0,1" bitfld.long 0x0 6. "TIE6,Transmission Interrupt Enable 6" "0,1" newline bitfld.long 0x0 5. "TIE5,Transmission Interrupt Enable 5" "0,1" bitfld.long 0x0 4. "TIE4,Transmission Interrupt Enable 4" "0,1" newline bitfld.long 0x0 3. "TIE3,Transmission Interrupt Enable 3" "0,1" bitfld.long 0x0 2. "TIE2,Transmission Interrupt Enable 2" "0,1" newline bitfld.long 0x0 1. "TIE1,Transmission Interrupt Enable 1" "0,1" bitfld.long 0x0 0. "TIE0,Transmission Interrupt Enable 0" "0,1" line.long 0x4 "TXBCIE,Tx Buffer Cancellation Finished Interrupt Enable" bitfld.long 0x4 31. "CFIE31,Cancellation Finished Interrupt Enable 31" "0,1" bitfld.long 0x4 30. "CFIE30,Cancellation Finished Interrupt Enable 30" "0,1" newline bitfld.long 0x4 29. "CFIE29,Cancellation Finished Interrupt Enable 29" "0,1" bitfld.long 0x4 28. "CFIE28,Cancellation Finished Interrupt Enable 28" "0,1" newline bitfld.long 0x4 27. "CFIE27,Cancellation Finished Interrupt Enable 27" "0,1" bitfld.long 0x4 26. "CFIE26,Cancellation Finished Interrupt Enable 26" "0,1" newline bitfld.long 0x4 25. "CFIE25,Cancellation Finished Interrupt Enable 25" "0,1" bitfld.long 0x4 24. "CFIE24,Cancellation Finished Interrupt Enable 24" "0,1" newline bitfld.long 0x4 23. "CFIE23,Cancellation Finished Interrupt Enable 23" "0,1" bitfld.long 0x4 22. "CFIE22,Cancellation Finished Interrupt Enable 22" "0,1" newline bitfld.long 0x4 21. "CFIE21,Cancellation Finished Interrupt Enable 21" "0,1" bitfld.long 0x4 20. "CFIE20,Cancellation Finished Interrupt Enable 20" "0,1" newline bitfld.long 0x4 19. "CFIE19,Cancellation Finished Interrupt Enable 19" "0,1" bitfld.long 0x4 18. "CFIE18,Cancellation Finished Interrupt Enable 18" "0,1" newline bitfld.long 0x4 17. "CFIE17,Cancellation Finished Interrupt Enable 17" "0,1" bitfld.long 0x4 16. "CFIE16,Cancellation Finished Interrupt Enable 16" "0,1" newline bitfld.long 0x4 15. "CFIE15,Cancellation Finished Interrupt Enable 15" "0,1" bitfld.long 0x4 14. "CFIE14,Cancellation Finished Interrupt Enable 14" "0,1" newline bitfld.long 0x4 13. "CFIE13,Cancellation Finished Interrupt Enable 13" "0,1" bitfld.long 0x4 12. "CFIE12,Cancellation Finished Interrupt Enable 12" "0,1" newline bitfld.long 0x4 11. "CFIE11,Cancellation Finished Interrupt Enable 11" "0,1" bitfld.long 0x4 10. "CFIE10,Cancellation Finished Interrupt Enable 10" "0,1" newline bitfld.long 0x4 9. "CFIE9,Cancellation Finished Interrupt Enable 9" "0,1" bitfld.long 0x4 8. "CFIE8,Cancellation Finished Interrupt Enable 8" "0,1" newline bitfld.long 0x4 7. "CFIE7,Cancellation Finished Interrupt Enable 7" "0,1" bitfld.long 0x4 6. "CFIE6,Cancellation Finished Interrupt Enable 6" "0,1" newline bitfld.long 0x4 5. "CFIE5,Cancellation Finished Interrupt Enable 5" "0,1" bitfld.long 0x4 4. "CFIE4,Cancellation Finished Interrupt Enable 4" "0,1" newline bitfld.long 0x4 3. "CFIE3,Cancellation Finished Interrupt Enable 3" "0,1" bitfld.long 0x4 2. "CFIE2,Cancellation Finished Interrupt Enable 2" "0,1" newline bitfld.long 0x4 1. "CFIE1,Cancellation Finished Interrupt Enable 1" "0,1" bitfld.long 0x4 0. "CFIE0,Cancellation Finished Interrupt Enable 0" "0,1" group.long 0xF0++0x3 line.long 0x0 "TXEFC,Tx Event FIFO Configuration" hexmask.long.byte 0x0 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x0 16.--21. 1. "EFS,Event FIFO Size" newline hexmask.long.word 0x0 0.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long 0xF4++0x3 line.long 0x0 "TXEFS,Tx Event FIFO Status" bitfld.long 0x0 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x0 24. "EFF,Event FIFO Full" "0,1" newline hexmask.long.byte 0x0 16.--20. 1. "EFPI,Event FIFO Put Index" hexmask.long.byte 0x0 8.--12. 1. "EFGI,Event FIFO Get Index" newline hexmask.long.byte 0x0 0.--5. 1. "EFFL,Event FIFO Fill Level" group.long 0xF8++0x3 line.long 0x0 "TXEFA,Tx Event FIFO Acknowledge" hexmask.long.byte 0x0 0.--4. 1. "EFAI,Event FIFO Acknowledge Index" group.long 0x100++0x3 line.long 0x0 "ERROR,Error Interrupt Flag" bitfld.long 0x0 0. "BERR,AHB Bus Error Detection" "0,1" tree.end tree.end tree "COREDEBUG" base ad:0xE000ED00 group.long 0x30++0x3 line.long 0x0 "DFSR,Debug Fault Status Register" group.long 0xF0++0x3 line.long 0x0 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x0 25. "S_RESET_ST," "0,1" bitfld.long 0x0 24. "S_RETIRE_ST," "0,1" bitfld.long 0x0 19. "S_LOCKUP," "0,1" bitfld.long 0x0 18. "S_SLEEP," "0,1" bitfld.long 0x0 17. "S_HALT," "0,1" bitfld.long 0x0 16. "S_REGRDY," "0,1" bitfld.long 0x0 5. "C_SNAPSTALL," "0,1" bitfld.long 0x0 3. "C_MASKINTS," "0,1" bitfld.long 0x0 2. "C_STEP," "0,1" newline bitfld.long 0x0 1. "C_HALT," "0,1" bitfld.long 0x0 0. "C_DEBUGEN," "0,1" wgroup.long 0xF4++0x3 line.long 0x0 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x0 16. "REGWnR," "0,1" hexmask.long.byte 0x0 0.--4. 1. "REGSEL," group.long 0xF8++0x7 line.long 0x0 "DCRDR,Debug Core Register Data Register" line.long 0x4 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x4 24. "TRCENA," "0,1" bitfld.long 0x4 19. "MON_REQ," "0,1" bitfld.long 0x4 18. "MON_STEP," "0,1" bitfld.long 0x4 17. "MON_PEND," "0,1" bitfld.long 0x4 16. "MON_EN," "0,1" bitfld.long 0x4 10. "VC_HARDERR," "0,1" bitfld.long 0x4 9. "VC_INTERR," "0,1" bitfld.long 0x4 8. "VC_BUSERR," "0,1" bitfld.long 0x4 7. "VC_STATERR," "0,1" newline bitfld.long 0x4 6. "VC_CHKERR," "0,1" bitfld.long 0x4 5. "VC_NOCPERR," "0,1" bitfld.long 0x4 4. "VC_MMERR," "0,1" bitfld.long 0x4 0. "VC_CORERESET," "0,1" tree.end tree "DMA (Direct Memory Access)" base ad:0x44850000 group.long 0x0++0x3 line.long 0x0 "CTRLA,DMA CONTROL A REGISTER" bitfld.long 0x0 1. "ENABLE,DMA Enable" "0,1" group.long 0x8++0xB line.long 0x0 "DBGCTRL,DEBUG CONTROL REGISTER" bitfld.long 0x0 0. "DBGRUN,Debug Run" "0,1" line.long 0x4 "CRCPOLYA,DMA CRC POLYNOMIAL A REGISTER" hexmask.long 0x4 0.--31. 1. "POLYA,CRC Polynomial Coefficients A Register" line.long 0x8 "CRCPOLYB,DMA CRC POLYNOMIAL B REGISTER" hexmask.long 0x8 0.--31. 1. "POLYB,CRC Polynomial Coefficients B Register" rgroup.long 0x14++0xF line.long 0x0 "INTSTAT4,DMA INTERRUPT PRIORITY 4 STATUS REGISTER" bitfld.long 0x0 23. "CH23,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 22. "CH22,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 21. "CH21,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 20. "CH20,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 19. "CH19,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 18. "CH18,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 17. "CH17,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 16. "CH16,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 15. "CH15,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 14. "CH14,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 13. "CH13,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 12. "CH12,DMA Channel active interrupt at priority 4" "0,1" newline bitfld.long 0x0 11. "CH11,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 10. "CH10,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 9. "CH9,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 8. "CH8,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 7. "CH7,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 6. "CH6,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 5. "CH5,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 4. "CH4,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 3. "CH3,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 2. "CH2,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 1. "CH1,DMA Channel active interrupt at priority 4" "0,1" bitfld.long 0x0 0. "CH0,DMA Channel active interrupt at priority 4" "0,1" line.long 0x4 "INTSTAT3,DMA INTERRUPT PRIORITY 3 STATUS REGISTER" bitfld.long 0x4 23. "CH23,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 22. "CH22,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 21. "CH21,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 20. "CH20,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 19. "CH19,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 18. "CH18,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 17. "CH17,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 16. "CH16,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 15. "CH15,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 14. "CH14,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 13. "CH13,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 12. "CH12,DMA Channel active interrupt at priority 3" "0,1" newline bitfld.long 0x4 11. "CH11,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 10. "CH10,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 9. "CH9,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 8. "CH8,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 7. "CH7,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 6. "CH6,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 5. "CH5,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 4. "CH4,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 3. "CH3,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 2. "CH2,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 1. "CH1,DMA Channel active interrupt at priority 3" "0,1" bitfld.long 0x4 0. "CH0,DMA Channel active interrupt at priority 3" "0,1" line.long 0x8 "INTSTAT2,DMA INTERRUPT PRIORITY 2 STATUS REGISTER" bitfld.long 0x8 23. "CH23,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 22. "CH22,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 21. "CH21,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 20. "CH20,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 19. "CH19,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 18. "CH18,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 17. "CH17,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 16. "CH16,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 15. "CH15,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 14. "CH14,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 13. "CH13,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 12. "CH12,DMA Channel active interrupt at priority 2" "0,1" newline bitfld.long 0x8 11. "CH11,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 10. "CH10,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 9. "CH9,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 8. "CH8,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 7. "CH7,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 6. "CH6,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 5. "CH5,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 4. "CH4,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 3. "CH3,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 2. "CH2,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 1. "CH1,DMA Channel active interrupt at priority 2" "0,1" bitfld.long 0x8 0. "CH0,DMA Channel active interrupt at priority 2" "0,1" line.long 0xC "INTSTAT1,DMA INTERRUPT PRIORITY 1 STATUS REGISTER" bitfld.long 0xC 23. "CH23,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 22. "CH22,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 21. "CH21,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 20. "CH20,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 19. "CH19,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 18. "CH18,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 17. "CH17,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 16. "CH16,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 15. "CH15,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 14. "CH14,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 13. "CH13,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 12. "CH12,DMA Channel active interrupt at priority 1" "0,1" newline bitfld.long 0xC 11. "CH11,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 10. "CH10,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 9. "CH9,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 8. "CH8,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 7. "CH7,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 6. "CH6,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 5. "CH5,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 4. "CH4,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 3. "CH3,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 2. "CH2,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 1. "CH1,DMA Channel active interrupt at priority 1" "0,1" bitfld.long 0xC 0. "CH0,DMA Channel active interrupt at priority 1" "0,1" repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x44850050 ad:0x448500A0 ad:0x448500F0 ad:0x44850140 ad:0x44850190 ad:0x448501E0 ad:0x44850230 ad:0x44850280 ad:0x448502D0 ad:0x44850320 ad:0x44850370 ad:0x448503C0 ad:0x44850410 ad:0x44850460 ad:0x448504B0 ad:0x44850500) tree "CHANNEL[$1]" base $2 group.long ($2)++0x3B line.long 0x0 "CHCTRLA,CHANNEL CONTROL REGISTER A" bitfld.long 0x0 24. "RUNSTDBY,Run In Standby" "0,1" bitfld.long 0x0 16. "SWFRC,Software Forced Trigger" "0,1" newline bitfld.long 0x0 8. "LLEN,Linked List Enable" "0,1" bitfld.long 0x0 0. "ENABLE,Channel Enable" "0,1" line.long 0x4 "CHCTRLB,CHANNEL CONTROL REGISTER B" bitfld.long 0x4 31. "CRCEN,CRC Enable bit" "0,1" bitfld.long 0x4 29. "CASTEN,Cell Auto Start Enable of Ensuing Transfers for this channel" "0,1" newline bitfld.long 0x4 26. "PATEN,Channel Pattern Match Abort Enable." "0,1" bitfld.long 0x4 25. "PATLEN,Pattern Match Length" "0,1" newline bitfld.long 0x4 24. "PIGNEN,Enable Pattern Ignore Byte" "0,1" hexmask.long.byte 0x4 16.--23. 1. "TRIG,Trigger that can Start a Channel Transfer" newline bitfld.long 0x4 14.--15. "BYTORD,Byte Order" "0: Bytes are processed AS IS,1: Bytes are swapped as: BYTE3 to BYTE0 BYTE2 to..,2: Bytes are swapped as: BYTE3 to BYTE1 BYTE2 to..,3: Bytes are swapped as: BYTE3 to BYTE2 BYTE2 to.." bitfld.long 0x4 13. "WBOEN,Write Byte Order Enable" "0,1" newline bitfld.long 0x4 8.--9. "PRI,Channel Priority level." "0: Channel Priority is 1,1: Channel Priority is 2,2: Channel Priority is 3,3: Channel Priority is 4 (HIGHEST)" bitfld.long 0x4 4.--6. "RAS,Channel Read Address Sequence" "0: Incrementing Address+1 with Transfers of Byte..,1: Incrementing Address+2 with Transfers of..,2: Auto Increment Address and Transfer Size,3: Fixed Byte Address (Single Byte Address with..,4: Fixed Address of HalfWord Operand (Single..,5: Fixed Address Word Burst Transfer,?,?" newline bitfld.long 0x4 0.--2. "WAS,Channel Write Address Sequence." "0: Incrementing Address+1 with Transfers of Byte..,1: Incrementing Address+2 with Transfers of..,2: Auto Increment Address and Transfer Size,3: Fixed Byte Address (Single Byte Address with..,4: Fixed Address of HalfWord Operand (Single..,5: Fixed Address Word Burst Transfer,?,?" line.long 0x8 "CHEVCTRL,CHANNEL EVENT CONTROL REGISTER" bitfld.long 0x8 7. "EVOE,Channel Event Output Enable (0: disable; 1: enable)" "0: disable;,1: enable)" bitfld.long 0x8 6. "EVSTRIE,Channel Start Event Input Enable (0: disable; 1:enable)" "0: disable; 1:enable),?" newline bitfld.long 0x8 5. "EVAUXIE,Channel Auxiliary Event Enable (0: disable; 1: enable)" "0: disable;,1: enable)" bitfld.long 0x8 2.--3. "EVOMODE,Channel Event Output Mode" "0: Generate a channel event strobe for 1 clock..,1: Generate a channel event strobe for 1 clock..,2: Generate a channel event strobe from start event..,3: Generate a channel event strobe from start event.." newline bitfld.long 0x8 0.--1. "EVAUXACT,Channel Auxiliary Event Input Action" "0: Event Aborts Bock Transfer,1: Event Increments Channel Priority,2: Event acts as a Conditional Trigger,?" line.long 0xC "CHINTENCLR,CHANNEL INTERRUPT ENABLE CLEAR REGISTER" bitfld.long 0xC 5. "LL,Clear Linked List Done Interrupt Enable" "0,1" bitfld.long 0xC 4. "BH,Clear Block Transfer Half Complete Interrupt Enable" "0,1" newline bitfld.long 0xC 3. "BC,Clear Cell Transfer Complete Interrupt Enable" "0,1" bitfld.long 0xC 2. "CC,Clear Cell Transfer Complete Interrupt Enable" "0,1" newline bitfld.long 0xC 1. "TA,Clear Transfer Abort Interrupt Enable" "0,1" bitfld.long 0xC 0. "SD,Channel Event Output Enable" "0,1" line.long 0x10 "CHINTENSET,CHANNEL INTERRUPT ENABLE SET REGISTER" bitfld.long 0x10 5. "LL,set Linked List Done Interrupt Enable" "0,1" bitfld.long 0x10 4. "BH,set Block Transfer Half Complete Interrupt Enable" "0,1" newline bitfld.long 0x10 3. "BC,set Cell Transfer Complete Interrupt Enable" "0,1" bitfld.long 0x10 2. "CC,set Cell Transfer Complete Interrupt Enable" "0,1" newline bitfld.long 0x10 1. "TA,Set Transfer Abort Interrupt Enable" "0,1" bitfld.long 0x10 0. "SD,Channel Event Output Enable" "0,1" line.long 0x14 "CHINTF,CHANNEL INTERRUPT FLAG REGISTER" bitfld.long 0x14 18. "RDE,Read Error Flag (0: none; 1: Read Error)" "0: none;,1: Read Error)" bitfld.long 0x14 17. "WRE,Write Error Flag (0: none; 1: Write Error)" "0: none;,1: Write Error)" newline bitfld.long 0x14 5. "LL,Linked List Done Interrupt Flag (0: none; 1: done)" "0: none;,1: done)" bitfld.long 0x14 4. "BH,Block Transfer Half Complete Interrupt Flag (0: none; 1: half complete)" "0: none;,1: half complete)" newline bitfld.long 0x14 3. "BC,Block Transfer Complete Interrupt Flag (0: none; 1:complete;)" "0: none; 1:complete;),?" bitfld.long 0x14 2. "CC,Cell Transfer Complete Interrupt Flag (0: none ; 1: complete)" "0: none ;,1: complete)" newline bitfld.long 0x14 1. "TA,Transfer Abort Interrupt Flag (0: none; 1: Transfer Aborted)" "0: none;,1: Transfer Aborted)" bitfld.long 0x14 0. "SD,Start Detected Interrupt Flag (0: none ; 1: Start Detected)" "0: none ;,1: Start Detected)" line.long 0x18 "CHSSA,CHANNEL SOURCE START ADDRESS" hexmask.long 0x18 0.--31. 1. "SSA,Channel Source Start Address" line.long 0x1C "CHDSA,CHANNEL DESTINATION START ADDRESS" hexmask.long 0x1C 0.--31. 1. "DSA,Channel Destination Start Address" line.long 0x20 "CHSSTRD,CHANNEL SOURCE CELL STRIDE SIZE REGISTER" hexmask.long.word 0x20 0.--15. 1. "SSTRD,Source Cell Stride Size" line.long 0x24 "CHDSTRD,CHANNEL DESTINATION CELL STRIDE SIZE REGISTER" hexmask.long.word 0x24 0.--15. 1. "DSTRD,Destination Cell Stride Size" line.long 0x28 "CHXSIZ,CHANNEL TRANSFER SIZE REGISTER" hexmask.long.word 0x28 16.--31. 1. "BLKSZ,Block transfer size in bytes." hexmask.long.word 0x28 0.--9. 1. "CSZ,Cell transfer size in bytes." line.long 0x2C "CHPDAT,CHANNEL PATTERN MATCH DATA" hexmask.long.byte 0x2C 24.--31. 1. "PIGN,Channel Pattern Ignore Value" hexmask.long.word 0x2C 0.--15. 1. "PDAT,Channel Pattern Match Data" line.long 0x30 "CHCTRLCRC,CHANNEL CONTROL CRC" bitfld.long 0x30 7. "CRCRIN,CRC Reflect Input Selection" "0,1" bitfld.long 0x30 6. "CRCROUT,CRC Reflected Output Mode" "0,1" newline bitfld.long 0x30 5. "CRCXOR,CRC XOR Mode" "0,1" bitfld.long 0x30 3. "CRCAPP,CRC Append Mode" "0,1" newline bitfld.long 0x30 0.--2. "CRCMD,CRC/Checksum Mode" "0: Normal (0x8005) CRC-16/CRC-16-IBM/CRC-16-ANSI,1: Normal (0x1021) CRC-16-CCITT,2: CRC-16 based on polynomial provided in CRCPOLYA..,3: CRC-16 based on polynomial provided in CRCPOLYB..,4: Normal (0x04C11DB7) CRC-32,5: CRC-32 based on polynomial provided in CRCPOLYA..,6: CRC-32 based on polynomial provided in CRCPOLYB..,7: Calculate IP header checksum" line.long 0x34 "CHCRCDAT,CHANNEL CRC/CHECKSUM DATA REGISTER" hexmask.long 0x34 0.--31. 1. "CRCDAT,CRC Data" line.long 0x38 "CHNXT,CHANNEL NEXT DESCRIPTOR ADDRESS POINTER" hexmask.long 0x38 0.--31. 1. "NXT,Channel Address Pointer to Next Descriptor" rgroup.long ($2+0x3C)++0xF line.long 0x0 "CHLLCFGSTAT,CHANNEL LINKED LIST CONFIGURATION STATUS REGISTER" bitfld.long 0x0 9. "CRCDAT,CRC Data Descriptor Load" "0,1" bitfld.long 0x0 8. "CTRLCRC,Control CRC Descriptor Load" "0,1" newline bitfld.long 0x0 7. "PDAT,Match Pattern Descriptor Load" "0,1" bitfld.long 0x0 6. "XSIZ,Transfer Size Descriptor Load" "0,1" newline bitfld.long 0x0 5. "DSTRD,Destination Cell Stride Size Descriptor Load" "0,1" bitfld.long 0x0 4. "SSTRD,Source Cell Stride Size Descriptor Load" "0,1" newline bitfld.long 0x0 3. "DSA,Destination Start Address Descriptor Load" "0,1" bitfld.long 0x0 2. "SSA,Source Start Address Descriptor Load" "0,1" newline bitfld.long 0x0 1. "EVCTRL,EVCTRL Register Descriptor Load" "0,1" bitfld.long 0x0 0. "CTRLB,CTRLB Register Descriptor Load" "0,1" line.long 0x4 "CHSTATBC,CHANNEL STATUS BLOCK COUNT REGISTER" hexmask.long.tbyte 0x4 0.--16. 1. "BBTC,Bytes Transfered in the Block Counter" line.long 0x8 "CHSTATCC,CHANNEL STATUS CELL COUNT REGISTER" hexmask.long.word 0x8 0.--10. 1. "CBTC,Bytes Transfered in the Cell Counter" line.long 0xC "CHSTAT,CHANNEL STATUS REGISTER" bitfld.long 0xC 2. "DREAD,Descriptor Read Status Bit (0: not read or not avail 1: read and loaded)" "0: not read or not avail,1: read and loaded)" bitfld.long 0xC 1. "CELLBUSY,Channel Cell Transfer Busy Status Bit (0: none; 1: busy)" "0: none;,1: busy)" newline bitfld.long 0xC 0. "BLKBUSY,Channel Block Transfer Busy Status Bit (0: none; 1: busy)" "0: none;,1: busy)" tree.end repeat.end tree.end tree "DRMTCM (Data Tightly Coupled Memory)" base ad:0x44820000 group.long 0x0++0x7 line.long 0x0 "CTRLA,CONTROL ENABLE REGISTER A" bitfld.long 0x0 1. "ENABLE,DRMTCM ECC Enable (ON) bit (default ECC is always enabled)" "0,1" bitfld.long 0x0 0. "SWRST,DRMTCM Software Reset" "0,1" line.long 0x4 "CTRLB,CONTROL ENABLE REGISTER B" bitfld.long 0x4 30. "D1ERCNTDIS,D1TCM ERROR COUNTER DISABLE BIT" "0,1" bitfld.long 0x4 29. "D0ERCNTDIS,D0TCM ERROR COUNTER DISABLE BIT" "0,1" bitfld.long 0x4 28. "IERCNTDIS,ITCM ERROR COUNTER DISABLE BIT" "0,1" bitfld.long 0x4 25. "DWAITSTEN,D1TCM and D0TCM ONE WAIT STATE ENABLE BIT" "0,1" bitfld.long 0x4 24. "IWAITSTEN,ITCM ONE WAIT STATE ENABLE BIT" "0,1" hexmask.long.byte 0x4 16.--23. 1. "D1ERRCNT,D1TCM ERROR MAXIMUM COUNT (default 0x7)" hexmask.long.byte 0x4 8.--15. 1. "D0ERRCNT,D0TCM ERROR MAXIMUM COUNT (default 0x7)" newline hexmask.long.byte 0x4 0.--7. 1. "IERRCNT,ITCM ERROR MAXIMUM COUNT (default 0x7)" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,SYNC BUSY REGISTER" bitfld.long 0x0 1. "FLTEN,Fault Injection Enabled busy bit --- Synchronizing Busy bit for FLTEN register (when hard-ware set this bit no writes are allowed to the FLTCTRL register until after the synchronizing is not busy)." "0,1" bitfld.long 0x0 0. "SWRST,Software reset busy bit --- Synchronizing Busy bit for SWRST" "0,1" group.long 0xC++0x17 line.long 0x0 "INTENCLR,INTERRUPT ENABLE CLR REGISTER" bitfld.long 0x0 24. "FLTCAPEN,Fault Capture interrupt enable bit Disable" "0,1" bitfld.long 0x0 18. "D1ECCECNTEN,D1TCM ECC Error Count Flag bit Disable" "0,1" bitfld.long 0x0 17. "D1DERREN,D1TCM Double Bit Error Detection Flag bit Disable" "0,1" bitfld.long 0x0 16. "D1SERREN,D1TCM Single Bit Error Detection Flag bit Disable" "0,1" bitfld.long 0x0 10. "D0ECCECNTEN,D0TCM ECC Error Count Flag bit Disable" "0,1" bitfld.long 0x0 9. "D0DERREN,D0TCM Double Bit Error Detection Flag bit Disable" "0,1" bitfld.long 0x0 8. "D0SERREN,D0TCM Single Bit Error Detection Flag bit Disable" "0,1" newline bitfld.long 0x0 2. "IECCECNTEN,ITCM ECC Error Count Flag bit Disable" "0,1" bitfld.long 0x0 1. "IDERREN,ITCM Double Bit Error Detection Flag bit Disable" "0,1" bitfld.long 0x0 0. "ISERREN,ITCM Single Bit Error Detection Flag bit Disable" "0,1" line.long 0x4 "INTENSET,INTERRUPT ENABLE SET REGISTER" bitfld.long 0x4 24. "FLTCAPEN,Fault Capture interrupt enable bit Enable" "0,1" bitfld.long 0x4 18. "D1ECCECNTEN,D1TCM ECC Error Count Flag bit Enable" "0,1" bitfld.long 0x4 17. "D1DERREN,D1TCM Double Bit Error Detection Flag bit Enable" "0,1" bitfld.long 0x4 16. "D1SERREN,D1TCM Single Bit Error Detection Flag bit Enable" "0,1" bitfld.long 0x4 10. "D0ECCECNTEN,D0TCM ECC Error Count Flag bit Enable" "0,1" bitfld.long 0x4 9. "D0DERREN,D0TCM Double Bit Error Detection Flag bit Enable" "0,1" bitfld.long 0x4 8. "D0SERREN,D0TCM Single Bit Error Detection Flag bit Enable" "0,1" newline bitfld.long 0x4 2. "IECCECNTEN,ITCM ECC Error Count Flag bit Enable" "0,1" bitfld.long 0x4 1. "IDERREN,ITCM Double Bit Error Detection Flag bit Enable" "0,1" bitfld.long 0x4 0. "ISERREN,ITCM Single Bit Error Detection Flag bit Enable" "0,1" line.long 0x8 "INTFLAG,INTERRUPT FLAG REGISTER" bitfld.long 0x8 24. "FLTCAP,Fault Capture interrupt" "0,1" bitfld.long 0x8 18. "D1ECCECNT,D1TCM ECC Error Count Flag" "0,1" bitfld.long 0x8 17. "D1DERR,D1TCM Double Bit Error Detection Flag" "0,1" bitfld.long 0x8 16. "D1SERR,D1TCM Single Bit Error Detection Flag" "0,1" bitfld.long 0x8 10. "D0ECCECNT,D0TCM ECC Error Count Flag" "0,1" bitfld.long 0x8 9. "D0DERR,D0TCM Double Bit Error Detection Flag" "0,1" bitfld.long 0x8 8. "D0SERR,D0TCM Single Bit Error Detection Flag" "0,1" newline bitfld.long 0x8 2. "IECCECNT,ITCM ECC Error Count Flag" "0,1" bitfld.long 0x8 1. "IDERR,ITCM Double Bit Error Detection Flag" "0,1" bitfld.long 0x8 0. "ISERR,ITCM Single Bit Error Detection Flag" "0,1" line.long 0xC "FLTCTRL,FAULT INJECTION CONTROL REGISTER" bitfld.long 0xC 12.--13. "FLTMD,Fault Mode Control" "0,1,2,3" bitfld.long 0xC 1. "FLTEN,Fault Injection Enabled" "0,1" line.long 0x10 "IFLTPTR,ITCM FAULT INJECTION POINTER REGISTER" hexmask.long.byte 0x10 16.--22. 1. "FLT2PTR,ECC Fault injection Bit position pointer (for double bit error)." hexmask.long.byte 0x10 0.--6. 1. "FLT1PTR,ECC Fault injection Bit position pointer (for single bit error)." line.long 0x14 "IFLTADR,ITCM FAULT INJECTION ADDRESS REGISTER" hexmask.long.tbyte 0x14 0.--16. 1. "IFLTADR,Instruction ITCM ECC Fault Injection Address Match Com-pare bits." rgroup.long 0x24++0xB line.long 0x0 "IFLTCAP,ITCM FAULT ERROR CAPTURE ADDRESS REGISTER" hexmask.long.byte 0x0 28.--31. 1. "ITCMMASTER,Master ID of the requester of the current Error access." hexmask.long.tbyte 0x0 0.--16. 1. "FLTADR,Instruction TCM ECC Fault Address bits which caused the ECC Error." line.long 0x4 "IFLTPAR,ITCM FAULT PARITY REGISTER" hexmask.long.byte 0x4 0.--7. 1. "SECIN,Single Error Parity Bits from ITCM" line.long 0x8 "IFLTSYN,ITCM FAULT ECC SYNDROME REGISTER" bitfld.long 0x8 15. "ERR2,Double bit Error" "0,1" bitfld.long 0x8 14. "ERR1,Single Bit Error" "0,1" hexmask.long.byte 0x8 0.--7. 1. "SECSYN,Single Error Syndrome" group.long 0x30++0x7 line.long 0x0 "DFLTPTR,DTCM FAULT INJECTION POINTER REGISTER" hexmask.long.byte 0x0 16.--21. 1. "FLT2PTR,ECC Fault injection Bit position pointer (for double bit error)." hexmask.long.byte 0x0 0.--5. 1. "FLT1PTR,ECC Fault injection Bit position pointer (for single bit error)." line.long 0x4 "DFLTADR,DTCM FAULT INJECTION ADDRESS REGISTER" bitfld.long 0x4 31. "D1D0EN,Fault Injection D1 or D0 Address Enable." "0,1" hexmask.long.tbyte 0x4 0.--16. 1. "FLTADR,Data TCM ECC Fault Injection Address Match Compare bits." rgroup.long 0x38++0x17 line.long 0x0 "D0FLTCAP,D0TCM FAULT ERROR CAPTURE ADDRESS REGISTER" hexmask.long.byte 0x0 28.--31. 1. "TCMMASTER,Master ID of the requester of the current Error access." hexmask.long.tbyte 0x0 0.--16. 1. "FLTADR,Data 0 TCM ECC Fault Address bits which caused the ECC Error." line.long 0x4 "D0FLTPAR,D0TCM FAULT PARITY REGISTER" hexmask.long.byte 0x4 0.--6. 1. "SECIN,Single Error Parity Bits from D0TCM" line.long 0x8 "D0FLTSYN,D0TCM FAULT ECC SYNDROME REGISTER" bitfld.long 0x8 15. "ERR2,Double bit Error" "0,1" bitfld.long 0x8 14. "ERR1,Single Bit Error" "0,1" hexmask.long.byte 0x8 0.--6. 1. "SECSYN,Single Error Syndrome" line.long 0xC "D1FLTCAP,D1TCM FAULT ERROR CAPTURE ADDRESS REGISTER" hexmask.long.byte 0xC 28.--31. 1. "D1TCMMASTER,Master ID of the requester of the current Error access." hexmask.long.tbyte 0xC 0.--16. 1. "FLTADR,Data 1 TCM ECC Fault Address bits which caused the ECC Error." line.long 0x10 "D1FLTPAR,D1TCM FAULT PARITY REGISTER" hexmask.long.byte 0x10 0.--6. 1. "SECIN,Single Error Parity Bits from D1TCM" line.long 0x14 "D1FLTSYN,D1TCM FAULT ECC SYNDROME REGISTER" bitfld.long 0x14 15. "ERR2,Double bit Error" "0,1" bitfld.long 0x14 14. "ERR1,Single Bit Error" "0,1" hexmask.long.byte 0x14 0.--6. 1. "SECSYN,Single Error Syndrome" tree.end tree "DSU (Device Service Unit)" base ad:0x44000000 wgroup.long 0x0++0x3 line.long 0x0 "CTRL,Control" hexmask.long.word 0x0 16.--31. 1. "CMD,Command Register" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.long 0x4++0x3 line.long 0x0 "ADDR,Address" hexmask.long 0x0 2.--31. 1. "ADDR,Address" group.long 0x4++0xB line.long 0x0 "ADDR_MBIST_MODE,Address" hexmask.long 0x0 2.--31. 1. "ADDR,Address" bitfld.long 0x0 0.--1. "AMOD,Access Mode" "0: STATUSA.FAIL rises upon first error and..,1: STATUSA.FAIL rises when an error is detected and..,?,?" line.long 0x4 "LENGTH,Length" hexmask.long 0x4 2.--31. 1. "LENGTH,Length" line.long 0x8 "DATA,Data" hexmask.long 0x8 0.--31. 1. "DATA,Data" group.long 0xC++0xF line.long 0x0 "DATA_MBIST_MODE,Data" hexmask.long.byte 0x0 8.--12. 1. "INDEX,MBIST bit Index" hexmask.long.byte 0x0 0.--4. 1. "STATE,MBIST state" line.long 0x4 "CFG,Configuration" hexmask.long.tbyte 0x4 8.--31. 1. "MISC,Device Specific Configuration Register" bitfld.long 0x4 2. "MBFI,Enables the Memory Bist Fault Injection" "0,1" newline bitfld.long 0x4 1. "DCCDMALEVEL1,DMA Trigger 1 Level" "0: Trigger x rises when DCC is read and falls when..,1: Trigger x rises when DCC is written and falls.." bitfld.long 0x4 0. "DCCDMALEVEL0,DMA Trigger 0 Level" "0: Trigger x rises when DCC is read and falls when..,1: Trigger x rises when DCC is written and falls.." line.long 0x8 "MBFI0,Memory Bist Fault Injection 0" hexmask.long.tbyte 0x8 8.--31. 1. "AMMSK,Address matching Mask (Word address)" bitfld.long 0x8 7. "FTYPE,Fault type" "0: Stuck At 0,1: Stuck At 1" newline bitfld.long 0x8 6. "AMMOD,Address matching mode" "0: Address match fault injected when the masked..,1: Always matches fault injected every AHB access" hexmask.long.byte 0x8 0.--4. 1. "BIDX,Bit Index of injected fault" line.long 0xC "MBFI1,Memory Bist Fault Injection 1" hexmask.long 0xC 2.--31. 1. "ADDR,Word Address" group.long 0x100++0x3 line.long 0x0 "STATUSA,Status A" bitfld.long 0x0 19. "BREXT3,BootRom 3 Phase Extension" "0,1" bitfld.long 0x0 18. "BREXT2,BootRom 2 Phase Extension" "0,1" newline bitfld.long 0x0 17. "BREXT1,BootRom 1 Phase Extension" "0,1" bitfld.long 0x0 16. "BREXT0,BootRom 0 Phase Extension" "0,1" newline bitfld.long 0x0 11. "CRSTEXT3,CPU 3 Reset Phase Extension" "0,1" bitfld.long 0x0 10. "CRSTEXT2,CPU 2 Reset Phase Extension" "0,1" newline bitfld.long 0x0 9. "CRSTEXT1,CPU 1 Reset Phase Extension" "0,1" bitfld.long 0x0 8. "CRSTEXT0,CPU 0 Reset Phase Extension" "0,1" newline bitfld.long 0x0 3. "PERR,Protection Error" "0,1" bitfld.long 0x0 2. "BERR,Bus Error" "0,1" newline bitfld.long 0x0 1. "FAIL,Failure" "0,1" bitfld.long 0x0 0. "DONE,Done" "0,1" rgroup.long 0x104++0x7 line.long 0x0 "STATUSB,Status B" bitfld.long 0x0 11. "APDIS,ARM Access Ports Disabled" "0,1" bitfld.long 0x0 10. "HPE,Hot-Plugging Enable" "0,1" newline bitfld.long 0x0 8. "DBGPRES,Debugger Present" "0,1" bitfld.long 0x0 3. "DCCD1,Debug Communication Channel 1 Dirty" "0,1" newline bitfld.long 0x0 2. "DCCD0,Debug Communication Channel 0 Dirty" "0,1" bitfld.long 0x0 1. "BCCD1,Boot ROM Communication Channel 1 Dirty" "0,1" newline bitfld.long 0x0 0. "BCCD0,Boot ROM Communication Channel 0 Dirty" "0,1" line.long 0x4 "STATUSC,Status C" hexmask.long.byte 0x4 8.--12. 1. "INDEX,MBIST MSA PMSA bit Index" hexmask.long.byte 0x4 0.--4. 1. "STATE,Core State" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x110)++0x3 line.long 0x0 "BCC[$1],Boot ROM Communication Channel x" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x118)++0x3 line.long 0x0 "DCC[$1],Debug Communication Channel x" hexmask.long 0x0 0.--31. 1. "DATA,Data" repeat.end rgroup.long 0x120++0x7 line.long 0x0 "DID,Device Identification" hexmask.long.byte 0x0 28.--31. 1. "REVISION,Revision" hexmask.long.byte 0x0 20.--27. 1. "PRODUCT,Product" newline hexmask.long.byte 0x0 12.--19. 1. "DEVSEL,Device Select" hexmask.long.word 0x0 1.--11. 1. "MANID,Manufacturer ID" newline bitfld.long 0x0 0. "MARKER,Marker Bit" "0,1" line.long 0x4 "DAL,Debugger Access Level" bitfld.long 0x4 6.--7. "CPU3,Per CPU Debugger Access Level" "0: Debugger targeting CPU0 domain can only access..,1: Debugger can access only non-secure regions,2: Debugger can access secure and non-secure regions,3: No CPU in this slot" bitfld.long 0x4 4.--5. "CPU2,Per CPU Debugger Access Level" "0: Debugger targeting CPU0 domain can only access..,1: Debugger can access only non-secure regions,2: Debugger can access secure and non-secure regions,3: No CPU in this slot" newline bitfld.long 0x4 2.--3. "CPU1,Per CPU Debugger Access Level" "0: Debugger targeting CPU0 domain can only access..,1: Debugger can access only non-secure regions,2: Debugger can access secure and non-secure regions,3: No CPU in this slot" bitfld.long 0x4 0.--1. "CPU0,Per CPU Debugger Access Level" "0: Debugger targeting CPU0 domain can only access..,1: Debugger can access only non-secure regions,2: Debugger can access secure and non-secure regions,3: No CPU in this slot" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1000)++0x3 line.long 0x0 "ENTRY[$1],Coresight ROM Table Entry x" hexmask.long.tbyte 0x0 12.--31. 1. "ADDOFF,Address Offset" bitfld.long 0x0 1. "FMT,Format" "0,1" newline bitfld.long 0x0 0. "EPRES,Entry Present" "0,1" repeat.end rgroup.long 0x1FCC++0x33 line.long 0x0 "MEMTYPE,Coresight ROM Table Memory Type" bitfld.long 0x0 0. "SMEMP,System Memory Present" "0,1" line.long 0x4 "PID4,Coresight ROM Table Peripheral Identification 4" hexmask.long.byte 0x4 4.--7. 1. "FKBC,4KB count" hexmask.long.byte 0x4 0.--3. 1. "JEPCC,JEP-106 Continuation Code" line.long 0x8 "PID5,Coresight ROM Table Peripheral Identification 5" line.long 0xC "PID6,Coresight ROM Table Peripheral Identification 6" line.long 0x10 "PID7,Coresight ROM Table Peripheral Identification 7" line.long 0x14 "PID0,Coresight ROM Table Peripheral Identification 0" hexmask.long.byte 0x14 0.--7. 1. "PARTNBL,Part Number Low" line.long 0x18 "PID1,Coresight ROM Table Peripheral Identification 1" hexmask.long.byte 0x18 4.--7. 1. "JEPIDCL,Low part of the JEP-106 Identity Code" hexmask.long.byte 0x18 0.--3. 1. "PARTNBH,Part Number High" line.long 0x1C "PID2,Coresight ROM Table Peripheral Identification 2" hexmask.long.byte 0x1C 4.--7. 1. "REVISION,Revision Number" bitfld.long 0x1C 3. "JEPU,JEP-106 Identity Code is used" "0,1" newline bitfld.long 0x1C 0.--2. "JEPIDCH,JEP-106 Identity Code High" "0,1,2,3,4,5,6,7" line.long 0x20 "PID3,Coresight ROM Table Peripheral Identification 3" hexmask.long.byte 0x20 4.--7. 1. "REVAND,Revision Number" hexmask.long.byte 0x20 0.--3. 1. "CUSMOD,ARM CUSMOD" line.long 0x24 "CID0,Coresight ROM Table Component Identification 0" hexmask.long.byte 0x24 0.--7. 1. "PREAMBLEB0,Preamble Byte 0" line.long 0x28 "CID1,Coresight ROM Table Component Identification 1" hexmask.long.byte 0x28 4.--7. 1. "CCLASS,Component Class" hexmask.long.byte 0x28 0.--3. 1. "PREAMBLE,Preamble" line.long 0x2C "CID2,Coresight ROM Table Component Identification 2" hexmask.long.byte 0x2C 0.--7. 1. "PREAMBLEB2,Preamble Byte 2" line.long 0x30 "CID3,Coresight ROM Table Component Identification 3" hexmask.long.byte 0x30 0.--7. 1. "PREAMBLEB3,Preamble Byte 3" tree.end tree "DWT (Data Watchpoint and Trace Register)" base ad:0xE0001000 group.long 0x0++0x1B line.long 0x0 "CTRL,Control Register" hexmask.long.byte 0x0 28.--31. 1. "NUMCOMP," bitfld.long 0x0 27. "NOTRCPKT," "0,1" bitfld.long 0x0 26. "NOEXTTRIG," "0,1" bitfld.long 0x0 25. "NOCYCCNT," "0,1" bitfld.long 0x0 24. "NOPRFCNT," "0,1" bitfld.long 0x0 22. "CYCEVTENA," "0,1" bitfld.long 0x0 21. "FOLDEVTENA," "0,1" bitfld.long 0x0 20. "LSUEVTENA," "0,1" newline bitfld.long 0x0 19. "SLEEPEVTENA," "0,1" bitfld.long 0x0 18. "EXCEVTENA," "0,1" bitfld.long 0x0 17. "CPIEVTENA," "0,1" bitfld.long 0x0 16. "EXCTRCENA," "0,1" bitfld.long 0x0 12. "PCSAMPLENA," "0,1" bitfld.long 0x0 10.--11. "SYNCTAP," "0,1,2,3" bitfld.long 0x0 9. "CYCTAP," "0,1" hexmask.long.byte 0x0 5.--8. 1. "POSTINIT," newline hexmask.long.byte 0x0 1.--4. 1. "POSTPRESET," bitfld.long 0x0 0. "CYCCNTENA," "0,1" line.long 0x4 "CYCCNT,Cycle Count Register" line.long 0x8 "CPICNT,CPI Count Register" hexmask.long.byte 0x8 0.--7. 1. "CPICNT," line.long 0xC "EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0xC 0.--7. 1. "EXCCNT," line.long 0x10 "SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. "SLEEPCNT," line.long 0x14 "LSUCNT,LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. "LSUCNT," line.long 0x18 "FOLDCNT,Folded-instruction Count Register" hexmask.long.byte 0x18 0.--7. 1. "FOLDCNT," rgroup.long 0x1C++0x3 line.long 0x0 "PCSR,Program Counter Sample Register" group.long 0x20++0xB line.long 0x0 "COMP0,Comparator Register 0" line.long 0x4 "MASK0,Mask Register 0" hexmask.long.byte 0x4 0.--4. 1. "MASK," line.long 0x8 "FUNCTION0,Function Register 0" bitfld.long 0x8 24. "MATCHED," "0,1" hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1," hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0," bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3" bitfld.long 0x8 9. "LNK1ENA," "0,1" bitfld.long 0x8 8. "DATAVMATCH," "0,1" bitfld.long 0x8 7. "CYCMATCH," "0,1" bitfld.long 0x8 5. "EMITRANGE," "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "FUNCTION," group.long 0x30++0xB line.long 0x0 "COMP1,Comparator Register 1" line.long 0x4 "MASK1,Mask Register 1" hexmask.long.byte 0x4 0.--4. 1. "MASK," line.long 0x8 "FUNCTION1,Function Register 1" bitfld.long 0x8 24. "MATCHED," "0,1" hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1," hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0," bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3" bitfld.long 0x8 9. "LNK1ENA," "0,1" bitfld.long 0x8 8. "DATAVMATCH," "0,1" bitfld.long 0x8 7. "CYCMATCH," "0,1" bitfld.long 0x8 5. "EMITRANGE," "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "FUNCTION," group.long 0x40++0xB line.long 0x0 "COMP2,Comparator Register 2" line.long 0x4 "MASK2,Mask Register 2" hexmask.long.byte 0x4 0.--4. 1. "MASK," line.long 0x8 "FUNCTION2,Function Register 2" bitfld.long 0x8 24. "MATCHED," "0,1" hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1," hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0," bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3" bitfld.long 0x8 9. "LNK1ENA," "0,1" bitfld.long 0x8 8. "DATAVMATCH," "0,1" bitfld.long 0x8 7. "CYCMATCH," "0,1" bitfld.long 0x8 5. "EMITRANGE," "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "FUNCTION," group.long 0x50++0xB line.long 0x0 "COMP3,Comparator Register 3" line.long 0x4 "MASK3,Mask Register 3" hexmask.long.byte 0x4 0.--4. 1. "MASK," line.long 0x8 "FUNCTION3,Function Register 3" bitfld.long 0x8 24. "MATCHED," "0,1" hexmask.long.byte 0x8 16.--19. 1. "DATAVADDR1," hexmask.long.byte 0x8 12.--15. 1. "DATAVADDR0," bitfld.long 0x8 10.--11. "DATAVSIZE," "0,1,2,3" bitfld.long 0x8 9. "LNK1ENA," "0,1" bitfld.long 0x8 8. "DATAVMATCH," "0,1" bitfld.long 0x8 7. "CYCMATCH," "0,1" bitfld.long 0x8 5. "EMITRANGE," "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "FUNCTION," wgroup.long 0xFB0++0x3 line.long 0x0 "LAR,DWT Software Lock Access Register" hexmask.long 0x0 0.--31. 1. "KEY,Lock access control" rgroup.long 0xFB4++0x3 line.long 0x0 "LSR,DWT Software Lock Status Register" bitfld.long 0x0 2. "nTT,Not thirty-two bit" "0,1" bitfld.long 0x0 1. "SLK,Software Lock status" "0,1" bitfld.long 0x0 0. "SLI,Software Lock implemented" "0,1" rgroup.long 0xFD0++0x2F line.long 0x0 "PID4,DWT Peripheral Identification Register 4" hexmask.long.byte 0x0 4.--7. 1. "SIZE,4KB count" hexmask.long.byte 0x0 0.--3. 1. "DES_2,JEP106 continuation code" line.long 0x4 "PID5,DWT Peripheral Identification Register 5" line.long 0x8 "PID6,DWT Peripheral Identification Register 6" line.long 0xC "PID7,DWT Peripheral Identification Register 7" line.long 0x10 "PID0,DWT Peripheral Identification Register 0" hexmask.long.byte 0x10 0.--7. 1. "PART_0,Part number bits[7:0]" line.long 0x14 "PID1,DWT Peripheral Identification Register 1" hexmask.long.byte 0x14 4.--7. 1. "DES_0,JEP106 identification code bits [3:0]" hexmask.long.byte 0x14 0.--3. 1. "PART_1,Part number bits[11:8]" line.long 0x18 "PID2,DWT Peripheral Identification Register 2" hexmask.long.byte 0x18 4.--7. 1. "REVISION,Component revision" bitfld.long 0x18 3. "JEDEC,JEDEC assignee value is used" "0,1" bitfld.long 0x18 0.--2. "DES_1,JEP106 identification code bits[6:4]" "0,1,2,3,4,5,6,7" line.long 0x1C "PID3,DWT Peripheral Identification Register 3" hexmask.long.byte 0x1C 4.--7. 1. "REVAND,RevAnd" hexmask.long.byte 0x1C 0.--3. 1. "CMOD,Customer Modified" line.long 0x20 "CID0,DWT Component Identification Register 0" hexmask.long.byte 0x20 0.--7. 1. "PRMBL_0,CoreSight component identification preamble" line.long 0x24 "CID1,DWT Component Identification Register 1" hexmask.long.byte 0x24 4.--7. 1. "CLASS,CoreSight component class" hexmask.long.byte 0x24 0.--3. 1. "PRMBL_1,CoreSight component identification preamble" line.long 0x28 "CID2,DWT Component Identification Register 2" hexmask.long.byte 0x28 0.--7. 1. "PRMBL_2,CoreSight component identification preamble" line.long 0x2C "CID3,DWT Component Identification Register 3" hexmask.long.byte 0x2C 0.--7. 1. "PRMBL_3,CoreSight component identification preamble" tree.end tree "EBI (External Bus Interface)" base ad:0x458B0000 repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x458B0000 ad:0x458B0010 ad:0x458B0020 ad:0x458B0030) tree "CS_X[$1]" base $2 group.long ($2)++0xF line.long 0x0 "SMC_SETUP,SMC Setup Register" hexmask.long.byte 0x0 24.--29. 1. "NCS_RD_SETUP,NCS Setup Length in READ Access" hexmask.long.byte 0x0 16.--21. 1. "NRD_SETUP,NRD Setup Length" newline hexmask.long.byte 0x0 8.--13. 1. "NCS_WR_SETUP,NCS Setup Length in WRITE Access" hexmask.long.byte 0x0 0.--5. 1. "NWE_SETUP,NWE Setup Length" line.long 0x4 "SMC_PULSE,SMC Pulse Register" hexmask.long.byte 0x4 24.--30. 1. "NCS_RD_PULSE,NCS Pulse Length in READ Access" hexmask.long.byte 0x4 16.--22. 1. "NRD_PULSE,NRD Pulse Length" newline hexmask.long.byte 0x4 8.--14. 1. "NCS_WR_PULSE,NCS Pulse Length in WRITE Access" hexmask.long.byte 0x4 0.--6. 1. "NWE_PULSE,NWE Pulse Length" line.long 0x8 "SMC_CYCLE,SMC Cycle Register" hexmask.long.word 0x8 16.--24. 1. "NRD_CYCLE,Total Read Cycle Length" hexmask.long.word 0x8 0.--8. 1. "NWE_CYCLE,Total Write Cycle Length" line.long 0xC "SMC_MODE,SMC Mode Register" bitfld.long 0xC 28.--29. "PS,Page Size" "0: 4-byte page,1: 8-byte page,2: 16-byte page,3: 32-byte page" bitfld.long 0xC 24. "PMEN,Page Mode Enabled" "0,1" newline bitfld.long 0xC 20. "TDF_MODE,TDF Optimization" "0,1" hexmask.long.byte 0xC 16.--19. 1. "TDF_CYCLES,Data Float Time" newline bitfld.long 0xC 12. "DBW,Data Bus Width" "0: 8-bit Data Bus,1: 16-bit Data Bus" bitfld.long 0xC 8. "BAT,Byte Access Type" "0: Byte select access type:- Write operation is..,1: Byte write access type:- Write operation is.." newline bitfld.long 0xC 4.--5. "EXNW_MODE,NWAIT Mode" "0: Disabled-The NWAIT input signal is ignored on..,?,2: Frozen Mode-If asserted the NWAIT signal freezes..,3: Ready Mode-The NWAIT signal indicates the.." bitfld.long 0xC 1. "WRITE_MODE,Write Mode" "0,1" newline bitfld.long 0xC 0. "READ_MODE,Read Mode" "0,1" tree.end repeat.end base ad:0x458B0000 group.long 0xE4++0x3 line.long 0x0 "SMC_WPMR,SMC Write Protection Mode Register" hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key" bitfld.long 0x0 0. "WPEN,Write Protect Enable" "0,1" rgroup.long 0xE8++0x3 line.long 0x0 "SMC_WPSR,SMC Write Protection Status Register" hexmask.long.word 0x0 8.--23. 1. "WPVSRC,Write Protection Violation Source" bitfld.long 0x0 0. "WPVS,Write Protection Violation Status" "0,1" tree.end tree "EIC (External Interrupt Controller)" base ad:0x44800000 group.byte 0x0++0x1 line.byte 0x0 "CTRLA,Control A" bitfld.byte 0x0 4. "CKSEL,Clock Selection" "0: Clocked by GCLK,1: Clocked by ULP32K" bitfld.byte 0x0 1. "ENABLE,Enable" "0,1" bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1" line.byte 0x1 "NMICTRL,Non-Maskable Interrupt Control" bitfld.byte 0x1 4. "NMIASYNCH,Asynchronous Edge Detection Mode" "0: Edge detection is clock synchronously operated,1: Edge detection is clock asynchronously operated" bitfld.byte 0x1 3. "NMIFILTEN,Non-Maskable Interrupt Filter Enable" "0,1" bitfld.byte 0x1 0.--2. "NMISENSE,Non-Maskable Interrupt Sense Configuration" "0: No detection,1: Rising-edge detection,2: Falling-edge detection,3: Both-edges detection,4: High-level detection,5: Low-level detection,?,?" group.word 0x2++0x1 line.word 0x0 "NMIFLAG,Non-Maskable Interrupt Flag Status and Clear" bitfld.word 0x0 0. "NMI,Non-Maskable Interrupt" "0,1" rgroup.long 0x4++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 1. "ENABLE,Enable Synchronization Busy Status" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy Status" "0,1" group.long 0x8++0x1B line.long 0x0 "EVCTRL,Event Control" hexmask.long.word 0x0 0.--15. 1. "EXTINTEO,External Interrupt Event Output Enable" line.long 0x4 "INTENCLR,Interrupt Enable Clear" hexmask.long.word 0x4 0.--15. 1. "EXTINT,External Interrupt Enable" line.long 0x8 "INTENSET,Interrupt Enable Set" hexmask.long.word 0x8 0.--15. 1. "EXTINT,External Interrupt Enable" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" hexmask.long.word 0xC 0.--15. 1. "EXTINT,External Interrupt" line.long 0x10 "ASYNCH,External Interrupt Asynchronous Mode" hexmask.long.word 0x10 0.--15. 1. "ASYNCH,Asynchronous Edge Detection Mode" line.long 0x14 "CONFIG0,External Interrupt Sense Configuration" bitfld.long 0x14 31. "FILTEN7,Filter Enable 7" "0,1" bitfld.long 0x14 28.--30. "SENSE7,Input Sense Configuration 7" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x14 27. "FILTEN6,Filter Enable 6" "0,1" newline bitfld.long 0x14 24.--26. "SENSE6,Input Sense Configuration 6" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x14 23. "FILTEN5,Filter Enable 5" "0,1" bitfld.long 0x14 20.--22. "SENSE5,Input Sense Configuration 5" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" newline bitfld.long 0x14 19. "FILTEN4,Filter Enable 4" "0,1" bitfld.long 0x14 16.--18. "SENSE4,Input Sense Configuration 4" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x14 15. "FILTEN3,Filter Enable 3" "0,1" newline bitfld.long 0x14 12.--14. "SENSE3,Input Sense Configuration 3" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x14 11. "FILTEN2,Filter Enable 2" "0,1" bitfld.long 0x14 8.--10. "SENSE2,Input Sense Configuration 2" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" newline bitfld.long 0x14 7. "FILTEN1,Filter Enable 1" "0,1" bitfld.long 0x14 4.--6. "SENSE1,Input Sense Configuration 1" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x14 3. "FILTEN0,Filter Enable 0" "0,1" newline bitfld.long 0x14 0.--2. "SENSE0,Input Sense Configuration 0" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" line.long 0x18 "CONFIG1,External Interrupt Sense Configuration" bitfld.long 0x18 31. "FILTEN15,Filter Enable 15" "0,1" bitfld.long 0x18 28.--30. "SENSE15,Input Sense Configuration 15" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x18 27. "FILTEN14,Filter Enable 14" "0,1" newline bitfld.long 0x18 24.--26. "SENSE14,Input Sense Configuration 14" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x18 23. "FILTEN13,Filter Enable 13" "0,1" bitfld.long 0x18 20.--22. "SENSE13,Input Sense Configuration 13" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" newline bitfld.long 0x18 19. "FILTEN12,Filter Enable 12" "0,1" bitfld.long 0x18 16.--18. "SENSE12,Input Sense Configuration 12" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x18 15. "FILTEN11,Filter Enable 11" "0,1" newline bitfld.long 0x18 12.--14. "SENSE11,Input Sense Configuration 11" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x18 11. "FILTEN10,Filter Enable 10" "0,1" bitfld.long 0x18 8.--10. "SENSE10,Input Sense Configuration 10" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" newline bitfld.long 0x18 7. "FILTEN9,Filter Enable 9" "0,1" bitfld.long 0x18 4.--6. "SENSE9,Input Sense Configuration 9" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" bitfld.long 0x18 3. "FILTEN8,Filter Enable 8" "0,1" newline bitfld.long 0x18 0.--2. "SENSE8,Input Sense Configuration 8" "0: No detection,1: Rising edge detection,2: Falling edge detection,3: Both edges detection,4: High level detection,5: Low level detection,?,?" group.long 0x30++0x7 line.long 0x0 "DEBOUNCEN,Debouncer Enable" hexmask.long.word 0x0 0.--15. 1. "DEBOUNCEN,Debouncer Enable" line.long 0x4 "DPRESCALER,Debouncer Prescaler" bitfld.long 0x4 16. "TICKON,Pin Sampler frequency selection" "0: Clocked by GCLK,1: Clocked by Low Frequency Clock" bitfld.long 0x4 7. "STATES1,Debouncer number of states" "0: 3 low frequency samples,1: 7 low frequency samples" bitfld.long 0x4 4.--6. "PRESCALER1,Debouncer Prescaler" "0: EIC clock divided by 2,1: EIC clock divided by 4,2: EIC clock divided by 8,3: EIC clock divided by 16,4: EIC clock divided by 32,5: EIC clock divided by 64,6: EIC clock divided by 128,7: EIC clock divided by 256" newline bitfld.long 0x4 3. "STATES0,Debouncer number of states" "0: 3 low frequency samples,1: 7 low frequency samples" bitfld.long 0x4 0.--2. "PRESCALER0,Debouncer Prescaler" "0: EIC clock divided by 2,1: EIC clock divided by 4,2: EIC clock divided by 8,3: EIC clock divided by 16,4: EIC clock divided by 32,5: EIC clock divided by 64,6: EIC clock divided by 128,7: EIC clock divided by 256" rgroup.long 0x38++0x3 line.long 0x0 "PINSTATE,Pin State" hexmask.long.word 0x0 0.--15. 1. "PINSTATE,Pin State" tree.end tree "ETH (Ethernet Controller)" base ad:0x45070000 group.long 0x0++0x7 line.long 0x0 "CTRLA,CTRLA Register" bitfld.long 0x0 6. "RUNSTDBY,Run in standby mode" "0,1" bitfld.long 0x0 1. "ENABLE,Macro Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Bit" "0,1" line.long 0x4 "CTRLB,CTRLB Register" bitfld.long 0x4 6.--7. "TSUINC,Timer Adjust Mode" "0,1,2,3" bitfld.long 0x4 5. "TSUMS,Timer Adjust" "0,1" bitfld.long 0x4 2. "TSUCLKREQ,TSU Clock Request" "0,1" bitfld.long 0x4 1. "GBITCLKREQ,Gigabit clock request" "0,1" bitfld.long 0x4 0. "GMIIEN,Select GMII/MII mode" "0,1" group.long 0xC++0x3 line.long 0x0 "EVCTRL,Event Control Register" bitfld.long 0x0 0. "CMPEO,Compare Event Out enable" "0,1" rgroup.long 0x20++0x3 line.long 0x0 "SYNCB,Sync Busy Register" bitfld.long 0x0 1. "ENABLE,Enable Sync Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Sync Busy" "0,1" group.long 0x30++0x3 line.long 0x0 "WPCTRL,Write Protection Control Register" hexmask.long.tbyte 0x0 8.--31. 1. "WPKEY,Write Protection Key" bitfld.long 0x0 1. "WPLCK,Write Lock Bit" "0,1" bitfld.long 0x0 0. "WPEN,Write Protection Enable" "0,1" group.long 0x1000++0x7 line.long 0x0 "NCR,Network Control Register" bitfld.long 0x0 25. "EXTRXQ,Exxternal RX Queue Enable" "0,1" bitfld.long 0x0 24. "PFCPAUSE,PFC Pause Enable" "0,1" bitfld.long 0x0 23. "TSUPORT,TSU Timer Port Enable" "0,1" bitfld.long 0x0 22. "STUDPOFF,Store UDP Offset Enable" "0,1" bitfld.long 0x0 21. "ALTSGMII,Alternative SGMII Mode Enable" "0,1" bitfld.long 0x0 20. "UNICAST,Unicast PTP Farem Detection Enable" "0,1" newline bitfld.long 0x0 19. "LPI,Low Power Idle Enable" "0,1" bitfld.long 0x0 18. "FNP,Flush Next Packet" "0,1" bitfld.long 0x0 17. "TXPBPF,Transmit PFC Priority-based Pause Frame" "0,1" bitfld.long 0x0 16. "ENPBPR,Enable PFC Priority-based Pause Reception" "0,1" bitfld.long 0x0 15. "SRTSM,Store Receive Time Stamp to Memory" "0,1" bitfld.long 0x0 14. "RSNPSHT,Take Snapshot" "0,1" newline bitfld.long 0x0 13. "TSNPSHT,Take Snapshot" "0,1" bitfld.long 0x0 12. "TXZQPF,Transmit Zero Quantum Pause Frame" "0,1" bitfld.long 0x0 11. "TXPF,Transmit Pause Frame" "0,1" bitfld.long 0x0 10. "THALT,Transmit Halt" "0,1" bitfld.long 0x0 9. "TSTART,Start Transmission" "0,1" bitfld.long 0x0 8. "BP,Back pressure" "0,1" newline bitfld.long 0x0 7. "WESTAT,Write Enable for Statistics Registers" "0,1" bitfld.long 0x0 6. "INCSTAT,Increment Statistics Registers" "0,1" bitfld.long 0x0 5. "CLRSTAT,Clear Statistics Registers" "0,1" bitfld.long 0x0 4. "MPE,Management Port Enable" "0,1" bitfld.long 0x0 3. "TXEN,Transmit Enable" "0,1" bitfld.long 0x0 2. "RXEN,Receive Enable" "0,1" newline bitfld.long 0x0 1. "LBL,Loop Back Local" "0,1" bitfld.long 0x0 0. "LB,Loop Back" "0,1" line.long 0x4 "NCFGR,Network Configuration Register" bitfld.long 0x4 31. "UNI,Uni-Direction Enable" "0,1" bitfld.long 0x4 30. "IRXER,Ignore IPG GRXER" "0,1" bitfld.long 0x4 29. "RXBP,Receive Bad Preamble" "0,1" bitfld.long 0x4 28. "IPGSEN,IP Stretch Enable" "0,1" bitfld.long 0x4 27. "SGMII,SGMII Mode Enable" "0,1" bitfld.long 0x4 26. "IRXFCS,Ignore RX FCS" "0,1" newline bitfld.long 0x4 25. "EFRHD,Enable Frames Received in Half Duplex" "0,1" bitfld.long 0x4 24. "RXCOEN,Receive Checksum Offload Enable" "0,1" bitfld.long 0x4 23. "DCPF,Disable Copy of Pause Frames" "0,1" bitfld.long 0x4 21.--22. "DBW,Data Bus Width" "0,1,2,3" bitfld.long 0x4 18.--20. "CLK,MDC CLock Division" "0,1,2,3,4,5,6,7" bitfld.long 0x4 17. "RFCS,Remove FCS" "0,1" newline bitfld.long 0x4 16. "LFERD,Length Field Error Frame Discard" "0,1" bitfld.long 0x4 14.--15. "RXBUFO,Receive Buffer Offset" "0,1,2,3" bitfld.long 0x4 13. "PEN,Pause Enable" "0,1" bitfld.long 0x4 12. "RTY,Retry Test" "0,1" bitfld.long 0x4 11. "PCSSEL,PCS Select" "0,1" bitfld.long 0x4 10. "GIGE,Gigabit mode Enable" "0,1" newline bitfld.long 0x4 9. "EXTADDMT,External Address Match Enable" "0,1" bitfld.long 0x4 8. "MAXFS,1536 Maximum Frame Size" "0,1" bitfld.long 0x4 7. "UNIHEN,Unicast Hash Enable" "0,1" bitfld.long 0x4 6. "MTIHEN,Multicast Hash Enable" "0,1" bitfld.long 0x4 5. "NBC,No Broadcast" "0,1" bitfld.long 0x4 4. "CAF,Copy All Frames" "0,1" newline bitfld.long 0x4 3. "JFRAME,Jumbo Frame Size" "0,1" bitfld.long 0x4 2. "DNVLAN,Discard Non-VLAN FRAMES" "0,1" bitfld.long 0x4 1. "FD,Full Duplex" "0,1" bitfld.long 0x4 0. "SPD,Speed" "0,1" rgroup.long 0x1008++0x3 line.long 0x0 "NSR,Network Status Register" bitfld.long 0x0 7. "LPI,LPI Indication" "0,1" bitfld.long 0x0 6. "NEGPCLK,PFC Priority Based Pause Negotiated" "0,1" bitfld.long 0x0 5. "MACPTX,PCS Auto-Negotiation Pause Transmit Resolution" "0,1" bitfld.long 0x0 4. "MACPRX,PCS Auto-Negotiation Pause Receive Resolution" "0,1" bitfld.long 0x0 3. "MACFD,Auto-Negotiate Duplex Resolution" "0,1" bitfld.long 0x0 2. "IDLE,PHY Management Logic Idle" "0,1" newline bitfld.long 0x0 1. "MDIO,MDIO Input Status" "0,1" bitfld.long 0x0 0. "PCSLNK,PCS Link State" "0,1" group.long 0x100C++0x1B line.long 0x0 "UR,User Register" bitfld.long 0x0 0. "MII,MII Mode" "0,1" line.long 0x4 "DCFGR,DMA Configuration Register" bitfld.long 0x4 30. "ADDBW,Address Bus Width" "0,1" bitfld.long 0x4 29. "EBDTX,Extended TX BD Mode ENable" "0,1" bitfld.long 0x4 28. "EBDRX,Extended RX BD Mode ENable" "0,1" bitfld.long 0x4 26. "MLBTX,Force Max Length Burst Transmit" "0,1" bitfld.long 0x4 25. "MLBRX,Force Max Length Burst Recieve" "0,1" bitfld.long 0x4 24. "DDRP,DMA Discard Receive Packets" "0,1" newline hexmask.long.byte 0x4 16.--23. 1. "DRBS,DMA Receive Buffer Size" bitfld.long 0x4 12. "ILDB,Infinite Last Data Buffer" "0,1" bitfld.long 0x4 11. "TXCOEN,Transmitter Checksum Generation Offload Enable" "0,1" bitfld.long 0x4 10. "TXPBMS,Transmitter Packet Buffer Memory Size Select" "0,1" bitfld.long 0x4 8.--9. "RXBMS,Receiver Packet Buffer Memory Size Select" "0,1,2,3" bitfld.long 0x4 7. "ESPA,Endian Swap Mode Enable for Packet Data Accesses" "0,1" newline bitfld.long 0x4 6. "ESMA,Endian Swap Mode Enable for Management Descriptor Accesses" "0,1" bitfld.long 0x4 5. "EHDS,Enable Header Data Splitting" "0,1" hexmask.long.byte 0x4 0.--4. 1. "FBLDO,Fixed Burst Length for DMA Data Operations:" line.long 0x8 "TSR,Transmit Status Register" bitfld.long 0x8 8. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x8 7. "LCOL,Late Colision Occured" "0,1" bitfld.long 0x8 6. "UND,Transmit Underrun" "0,1" bitfld.long 0x8 5. "TXCOMP,Transmit Complete" "0,1" bitfld.long 0x8 4. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x8 3. "TXGO,Transmit Go" "0,1" newline bitfld.long 0x8 2. "RLE,Retry Limit Exceeded" "0,1" bitfld.long 0x8 1. "COL,Collision Occurred" "0,1" bitfld.long 0x8 0. "UBR,Used Bit Read" "0,1" line.long 0xC "RBQB,Receive Buffer Queue Base Address" hexmask.long 0xC 2.--31. 1. "ADDR,Receive Buffer Queue Base Address" line.long 0x10 "TBQB,Transmit Buffer Queue Base Address" hexmask.long 0x10 2.--31. 1. "ADDR,Transmit Buffer Queue Base Address" line.long 0x14 "RSR,Receive Status Register" bitfld.long 0x14 3. "HNO,HRESP Not OK" "0,1" bitfld.long 0x14 2. "RXOVR,Receive Overrun" "0,1" bitfld.long 0x14 1. "REC,Frame Received" "0,1" bitfld.long 0x14 0. "BNA,Buffer Not Available" "0,1" line.long 0x18 "ISR,Interrupt Status Register" bitfld.long 0x18 29. "TSUCMP,Tsu timer comparison" "0,1" bitfld.long 0x18 28. "WOL,Wake On LAN" "0,1" bitfld.long 0x18 27. "LPIRX,Receive LPI Indication" "0,1" bitfld.long 0x18 26. "SRI,TSU Seconds Register Increment" "0,1" bitfld.long 0x18 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1" bitfld.long 0x18 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1" newline bitfld.long 0x18 23. "PDRSFR,PDelay Response Frame Received" "0,1" bitfld.long 0x18 22. "PDRQFR,PDelay Request Frame Received" "0,1" bitfld.long 0x18 21. "SFT,PTP Sync Frame Transmitted" "0,1" bitfld.long 0x18 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1" bitfld.long 0x18 19. "SFR,PTP Sync Frame Received" "0,1" bitfld.long 0x18 18. "DRQFR,PTP Delay Request Frame Received" "0,1" newline bitfld.long 0x18 17. "LPPRX,PCS Link Partner Page Recieved" "0,1" bitfld.long 0x18 16. "ANEG,PCS Auto-Negotiation Complete" "0,1" bitfld.long 0x18 15. "EXT,External" "0,1" bitfld.long 0x18 14. "PFTR,Pause Frame Transmitted" "0,1" bitfld.long 0x18 13. "PTZ,Pause Time Zero" "0,1" bitfld.long 0x18 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1" newline bitfld.long 0x18 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x18 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x18 9. "LCHG,Link Change" "0,1" bitfld.long 0x18 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x18 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x18 5. "RLEX,Retry Limit Exceeded" "0,1" newline bitfld.long 0x18 4. "TUR,Transmit Underrun" "0,1" bitfld.long 0x18 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x18 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x18 1. "RCOMP,Receive Complete" "0,1" bitfld.long 0x18 0. "MFS,Management Frame Sent" "0,1" wgroup.long 0x1028++0x7 line.long 0x0 "IER,Interrupt Enable Register" bitfld.long 0x0 29. "TSUCMP,Tsu timer comparison" "0,1" bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1" bitfld.long 0x0 27. "LPIRX,Receive LPI Indication" "0,1" bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1" bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1" bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1" newline bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1" bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1" bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1" bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1" bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1" bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1" newline bitfld.long 0x0 17. "LPPRX,PCS Link Partner Page Received" "0,1" bitfld.long 0x0 16. "ANEG,PCS Auto-Negotiation Complete" "0,1" bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1" bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1" bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1" bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1" newline bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 9. "LCH,Link Change" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1" newline bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1" line.long 0x4 "IDR,Interrupt Disable Register" bitfld.long 0x4 29. "TSUCMP,Tsu timer comparison" "0,1" bitfld.long 0x4 28. "WOL,Wake On LAN" "0,1" bitfld.long 0x4 27. "LPIRX,Receive LPI Indication" "0,1" bitfld.long 0x4 26. "SRI,TSU Seconds Register Increment" "0,1" bitfld.long 0x4 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1" bitfld.long 0x4 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1" newline bitfld.long 0x4 23. "PDRSFR,PDelay Response Frame Received" "0,1" bitfld.long 0x4 22. "PDRQFR,PDelay Request Frame Received" "0,1" bitfld.long 0x4 21. "SFT,PTP Sync Frame Transmitted" "0,1" bitfld.long 0x4 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1" bitfld.long 0x4 19. "SFR,PTP Sync Frame Received" "0,1" bitfld.long 0x4 18. "DRQFR,PTP Delay Request Frame Received" "0,1" newline bitfld.long 0x4 17. "LPPRX,PCS Link Partner Page Received" "0,1" bitfld.long 0x4 16. "ANEG,PCS Auto-Negotiation Complete" "0,1" bitfld.long 0x4 15. "EXINT,External Interrupt" "0,1" bitfld.long 0x4 14. "PFTR,Pause Frame Transmitted" "0,1" bitfld.long 0x4 13. "PTZ,Pause Time Zero" "0,1" bitfld.long 0x4 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1" newline bitfld.long 0x4 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x4 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x4 9. "LCH,Link Change" "0,1" bitfld.long 0x4 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x4 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x4 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1" newline bitfld.long 0x4 4. "TUR,Transmit Underrun" "0,1" bitfld.long 0x4 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x4 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x4 1. "RCOMP,Receive Complete" "0,1" bitfld.long 0x4 0. "MFS,Management Frame Sent" "0,1" rgroup.long 0x1030++0x3 line.long 0x0 "IMR,Interrupt Mask Register" bitfld.long 0x0 29. "TSUCMP,Tsu timer comparison" "0,1" bitfld.long 0x0 28. "WOL,Wake On LAN" "0,1" bitfld.long 0x0 27. "LPIRX,Receive LPI Indication" "0,1" bitfld.long 0x0 26. "SRI,TSU Seconds Register Increment" "0,1" bitfld.long 0x0 25. "PDRSFT,PDelay Response Frame Transmitted" "0,1" bitfld.long 0x0 24. "PDRQFT,PDelay Request Frame Transmitted" "0,1" newline bitfld.long 0x0 23. "PDRSFR,PDelay Response Frame Received" "0,1" bitfld.long 0x0 22. "PDRQFR,PDelay Request Frame Received" "0,1" bitfld.long 0x0 21. "SFT,PTP Sync Frame Transmitted" "0,1" bitfld.long 0x0 20. "DRQFT,PTP Delay Request Frame Transmitted" "0,1" bitfld.long 0x0 19. "SFR,PTP Sync Frame Received" "0,1" bitfld.long 0x0 18. "DRQFR,PTP Delay Request Frame Received" "0,1" newline bitfld.long 0x0 17. "LPPRX,PCS Link Partner Page Received" "0,1" bitfld.long 0x0 16. "ANEG,PCS Auto-Negotiation Complete" "0,1" bitfld.long 0x0 15. "EXINT,External Interrupt" "0,1" bitfld.long 0x0 14. "PFTR,Pause Frame Transmitted" "0,1" bitfld.long 0x0 13. "PTZ,Pause Time Zero" "0,1" bitfld.long 0x0 12. "PFNZ,Pause Frame with Non-zero Pause Quantum Received" "0,1" newline bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 9. "LCH,Link Change" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded or Late Collision" "0,1" newline bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" bitfld.long 0x0 0. "MFS,Management Frame Sent" "0,1" group.long 0x1034++0x3 line.long 0x0 "MAN,PHY Maintenance Register" bitfld.long 0x0 31. "WZO,Write ZERO" "0,1" bitfld.long 0x0 30. "CLTTO,Clause 22 Operation" "0,1" bitfld.long 0x0 28.--29. "OP,Operation" "0,1,2,3" hexmask.long.byte 0x0 23.--27. 1. "PHYA,PHY Address" hexmask.long.byte 0x0 18.--22. 1. "REGA,Register Address" bitfld.long 0x0 16.--17. "WTN,Write Ten" "0,1,2,3" newline hexmask.long.word 0x0 0.--15. 1. "DATA,PHY Data" rgroup.long 0x1038++0x3 line.long 0x0 "RPQ,Received Pause Quantum Register" hexmask.long.word 0x0 0.--15. 1. "RPQ,Received Pause Quantum" group.long 0x103C++0x13 line.long 0x0 "TPQ,Transmit Pause Quantum Register" hexmask.long.word 0x0 16.--31. 1. "TPQP1,Transmit Pause Quantum" hexmask.long.word 0x0 0.--15. 1. "TPQ,Transmit Pause Quantum" line.long 0x4 "TPSF,TX partial store and forward Register" bitfld.long 0x4 31. "ENTXP,Enable TX partial store and forward operation" "0,1" hexmask.long.word 0x4 0.--13. 1. "TPB1ADR,TX packet buffer address" line.long 0x8 "RPSF,RX partial store and forward Register" bitfld.long 0x8 31. "ENRXP,Enable RX partial store and forward operation" "0,1" hexmask.long.word 0x8 0.--10. 1. "RPB1ADR,RX packet buffer address" line.long 0xC "RJFML,RX Jumbo Frame Max Length Register" hexmask.long.word 0xC 0.--13. 1. "FML,Frame Max Length" line.long 0x10 "EFIEN,External FIFO Interface Enable" bitfld.long 0x10 0. "EFIEN,Enable external fifo interface" "0,1" group.long 0x1054++0xF line.long 0x0 "AXIMP,AXI Max Pipeline" hexmask.long.byte 0x0 8.--15. 1. "AXIMRR,AXI Max read requests" hexmask.long.byte 0x0 0.--7. 1. "AXIMWR,AXI Max write requests" line.long 0x4 "RSCCTRL,Receive side coalescing on queues 1-15 Enable" bitfld.long 0x4 16. "RSCCTRLMSK,Mask the clearing of the rsc_en bit" "0,1" hexmask.long.word 0x4 1.--15. 1. "RSCCTRLEN,Enables Receive Side Coalescing" line.long 0x8 "INTMOD,Interrupt Moderation" hexmask.long.byte 0x8 16.--23. 1. "TXINTMOD,TX Interrupt Moderation" hexmask.long.byte 0x8 0.--7. 1. "RXINTMOD,RX Interrupt Moderation" line.long 0xC "SYSWT,Sys Wake Time" hexmask.long.word 0xC 0.--15. 1. "SYSWT,Sys Wake Time" group.long 0x1080++0x7 line.long 0x0 "HRB,Hash Register Bottom [31:0]" hexmask.long 0x0 0.--31. 1. "ADDR,Hash Address" line.long 0x4 "HRT,Hash Register Top [63:32]" hexmask.long 0x4 0.--31. 1. "ADDR,Hash Address" repeat 4. (list 0x0 0x1 0x2 0x3)(list ad:0x45071088 ad:0x45071090 ad:0x45071098 ad:0x450710A0) tree "SA[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "SAB,Specific Address Bottom [31:0] Register" hexmask.long 0x0 0.--31. 1. "ADDR,Specific Address 1" line.long 0x4 "SAT,Specific Address Top [47:32] Register" hexmask.long.byte 0x4 24.--29. 1. "FLTBM,Filter byte mask" bitfld.long 0x4 16. "FLTT,Filter type" "0,1" hexmask.long.word 0x4 0.--15. 1. "ADDR,Specific Address 1" tree.end repeat.end base ad:0x45070000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x10A8)++0x3 line.long 0x0 "STDM[$1],Special Type ID Match N Register" bitfld.long 0x0 31. "ENCPY,Enable copying of type ID match N matched frames" "0,1" hexmask.long.word 0x0 0.--15. 1. "STDM,Special Type ID Match N" repeat.end group.long 0x10B8++0x2F line.long 0x0 "WOL,Wake on LAN" bitfld.long 0x0 19. "MTI,WOL LAN multicast" "0,1" bitfld.long 0x0 18. "SA1,WOL specific address reg 1" "0,1" bitfld.long 0x0 17. "ARP,LAN ARP req" "0,1" bitfld.long 0x0 16. "MAG,Event enable" "0,1" hexmask.long.word 0x0 0.--15. 1. "IP,IP address" line.long 0x4 "IPGS,IPG Stretch Register" hexmask.long.word 0x4 0.--15. 1. "FL,Frame Length" line.long 0x8 "SVLAN,Stacked VLAN Register" bitfld.long 0x8 31. "ESVLAN,Enable Stacked VLAN Processing Mode" "0,1" hexmask.long.word 0x8 0.--15. 1. "VLAN_TYPE,User Defined VLAN_TYPE Field" line.long 0xC "TPFCP,Transmit PFC Pause Register" hexmask.long.byte 0xC 8.--15. 1. "PQ,Pause Quantum" hexmask.long.byte 0xC 0.--7. 1. "PEV,Priority Enable Vector" line.long 0x10 "SAMB1,Specific Address 1 Mask Bottom [31:0] Register" hexmask.long 0x10 0.--31. 1. "ADDR,Specific Address 1 Mask" line.long 0x14 "SAMT1,Specific Address 1 Mask Top [47:32] Register" hexmask.long.word 0x14 0.--15. 1. "ADDR,Specific Address 1 Mask" line.long 0x18 "DMAAM,Receive DMA Data Buffer Address Mask" hexmask.long.byte 0x18 28.--31. 1. "MVAL,Mask Value" hexmask.long.byte 0x18 0.--3. 1. "MEN,Mask Enable" line.long 0x1C "PTPRXUC,PTP RX unicast IP destination address" hexmask.long 0x1C 0.--31. 1. "ADD,Unicast IP destination address" line.long 0x20 "PTPTXUC,PTP TX unicast IP destination address" hexmask.long 0x20 0.--31. 1. "ADD,Unicast IP destination address" line.long 0x24 "NSC,Tsu timer comparison nanoseconds Register" hexmask.long.tbyte 0x24 0.--20. 1. "NANOSEC,1588 Timer Nanosecond comparison value" line.long 0x28 "SCL,Tsu timer second comparison Register" hexmask.long 0x28 0.--31. 1. "SEC,1588 Timer Second comparison value" line.long 0x2C "SCH,Tsu timer second comparison Register" hexmask.long.word 0x2C 0.--15. 1. "SEC,1588 Timer Second comparison value" rgroup.long 0x10E8++0xF line.long 0x0 "EFTSH,PTP Event Frame Transmitted Seconds High Register" hexmask.long.word 0x0 0.--15. 1. "RUD,Register Update" line.long 0x4 "EFRSH,PTP Event Frame Received Seconds High Register" hexmask.long.word 0x4 0.--15. 1. "RUD,Register Update" line.long 0x8 "PEFTSH,PTP Peer Event Frame Transmitted Seconds High Register" hexmask.long.word 0x8 0.--15. 1. "RUD,Register Update" line.long 0xC "PEFRSH,PTP Peer Event Frame Received Seconds High Register" hexmask.long.word 0xC 0.--15. 1. "RUD,Register Update" group.long 0x10F8++0x3 line.long 0x0 "DPRAMFD,TX and RX packet buffer fill levels" hexmask.long.word 0x0 16.--31. 1. "TXRXLVL,TX/RX Buffer Fill Level" hexmask.long.byte 0x0 4.--7. 1. "TXRXQSEL,TX/RX Fill Level Queue Select" bitfld.long 0x0 0. "TXRXSEL,TX/RX Fill Level Select" "0,1" rgroup.long 0x10FC++0x3 line.long 0x0 "REVREG,TX and RX packet buffer fill levels" hexmask.long.byte 0x0 28.--31. 1. "FN,Fix Number" hexmask.long.word 0x0 16.--27. 1. "MID,Module Identification" hexmask.long.word 0x0 0.--15. 1. "MR,Module Revision" group.long 0x1100++0xB7 line.long 0x0 "OTLO,Octets Transmitted [31:0] Register" hexmask.long 0x0 0.--31. 1. "TXO,Transmitted Octets" line.long 0x4 "OTHI,Octets Transmitted [47:32] Register" hexmask.long.word 0x4 0.--15. 1. "TXO,Transmitted Octets" line.long 0x8 "FT,Frames Transmitted Register" hexmask.long 0x8 0.--31. 1. "FTX,Frames Transmitted without Error" line.long 0xC "BCFT,Broadcast Frames Transmitted Register" hexmask.long 0xC 0.--31. 1. "BFTX,Broadcast Frames Transmitted without Error" line.long 0x10 "MFT,Multicast Frames Transmitted Register" hexmask.long 0x10 0.--31. 1. "MFTX,Multicast Frames Transmitted without Error" line.long 0x14 "PFT,Pause Frames Transmitted Register" hexmask.long.word 0x14 0.--15. 1. "PFTX,Pause Frames Transmitted Register" line.long 0x18 "BFT64,64 Byte Frames Transmitted Register" hexmask.long 0x18 0.--31. 1. "NFTX,64 Byte Frames Transmitted without Error" line.long 0x1C "TBFT127,65 to 127 Byte Frames Transmitted Register" hexmask.long 0x1C 0.--31. 1. "NFTX,65 to 127 Byte Frames Transmitted without Error" line.long 0x20 "TBFT255,128 to 255 Byte Frames Transmitted Register" hexmask.long 0x20 0.--31. 1. "NFTX,128 to 255 Byte Frames Transmitted without Error" line.long 0x24 "TBFT511,256 to 511 Byte Frames Transmitted Register" hexmask.long 0x24 0.--31. 1. "NFTX,256 to 511 Byte Frames Transmitted without Error" line.long 0x28 "TBFT1023,512 to 1023 Byte Frames Transmitted Register" hexmask.long 0x28 0.--31. 1. "NFTX,512 to 1023 Byte Frames Transmitted without Error" line.long 0x2C "TBFT1518,1024 to 1518 Byte Frames Transmitted Register" hexmask.long 0x2C 0.--31. 1. "NFTX,1024 to 1518 Byte Frames Transmitted without Error" line.long 0x30 "GTBFT1518,Greater Than 1518 Byte Frames Transmitted Register" hexmask.long 0x30 0.--31. 1. "NFTX,Greater than 1518 Byte Frames Transmitted without Error" line.long 0x34 "TUR,Transmit Underruns Register" hexmask.long.word 0x34 0.--9. 1. "TXUNR,Transmit Underruns" line.long 0x38 "SCF,Single Collision Frames Register" hexmask.long.tbyte 0x38 0.--17. 1. "SCOL,Single Collision" line.long 0x3C "MCF,Multiple Collision Frames Register" hexmask.long.tbyte 0x3C 0.--17. 1. "MCOL,Multiple Collision" line.long 0x40 "EC,Excessive Collisions Register" hexmask.long.word 0x40 0.--9. 1. "XCOL,Excessive Collisions" line.long 0x44 "LC,Late Collisions Register" hexmask.long.word 0x44 0.--9. 1. "LCOL,Late Collisions" line.long 0x48 "DTF,Deferred Transmission Frames Register" hexmask.long.tbyte 0x48 0.--17. 1. "DEFT,Deferred Transmission" line.long 0x4C "CSE,Carrier Sense Errors Register" hexmask.long.word 0x4C 0.--9. 1. "CSR,Carrier Sense Error" line.long 0x50 "ORLO,Octets Received [31:0] Received" hexmask.long 0x50 0.--31. 1. "RXO,Received Octets" line.long 0x54 "ORHI,Octets Received [47:32] Received" hexmask.long.word 0x54 0.--15. 1. "RXO,Received Octets" line.long 0x58 "FR,Frames Received Register" hexmask.long 0x58 0.--31. 1. "FRX,Frames Received without Error" line.long 0x5C "BCFR,Broadcast Frames Received Register" hexmask.long 0x5C 0.--31. 1. "BFRX,Broadcast Frames Received without Error" line.long 0x60 "MFR,Multicast Frames Received Register" hexmask.long 0x60 0.--31. 1. "MFRX,Multicast Frames Received without Error" line.long 0x64 "PFR,Pause Frames Received Register" hexmask.long.word 0x64 0.--15. 1. "PFRX,Pause Frames Received Register" line.long 0x68 "BFR64,64 Byte Frames Received Register" hexmask.long 0x68 0.--31. 1. "NFRX,64 Byte Frames Received without Error" line.long 0x6C "TBFR127,65 to 127 Byte Frames Received Register" hexmask.long 0x6C 0.--31. 1. "NFRX,65 to 127 Byte Frames Received without Error" line.long 0x70 "TBFR255,128 to 255 Byte Frames Received Register" hexmask.long 0x70 0.--31. 1. "NFRX,128 to 255 Byte Frames Received without Error" line.long 0x74 "TBFR511,256 to 511Byte Frames Received Register" hexmask.long 0x74 0.--31. 1. "NFRX,256 to 511 Byte Frames Received without Error" line.long 0x78 "TBFR1023,512 to 1023 Byte Frames Received Register" hexmask.long 0x78 0.--31. 1. "NFRX,512 to 1023 Byte Frames Received without Error" line.long 0x7C "TBFR1518,1024 to 1518 Byte Frames Received Register" hexmask.long 0x7C 0.--31. 1. "NFRX,1024 to 1518 Byte Frames Received without Error" line.long 0x80 "TMXBFR,1519 to Maximum Byte Frames Received Register" hexmask.long 0x80 0.--31. 1. "NFRX,1519 to Maximum Byte Frames Received without Error" line.long 0x84 "UFR,Undersize Frames Received Register" hexmask.long.word 0x84 0.--9. 1. "UFRX,Undersize Frames Received" line.long 0x88 "OFR,Oversize Frames Received Register" hexmask.long.word 0x88 0.--9. 1. "OFRX,Oversized Frames Received" line.long 0x8C "JR,Jabbers Received Register" hexmask.long.word 0x8C 0.--9. 1. "JRX,Jabbers Received" line.long 0x90 "FCSE,Frame Check Sequence Errors Register" hexmask.long.word 0x90 0.--9. 1. "FCKR,Frame Check Sequence Errors" line.long 0x94 "LFFE,Length Field Frame Errors Register" hexmask.long.word 0x94 0.--9. 1. "LFER,Length Field Frame Errors" line.long 0x98 "RSE,Receive Symbol Errors Register" hexmask.long.word 0x98 0.--9. 1. "RXSE,Receive Symbol Errors" line.long 0x9C "AE,Alignment Errors Register" hexmask.long.word 0x9C 0.--9. 1. "AER,Alignment Errors" line.long 0xA0 "RRE,Receive Resource Errors Register" hexmask.long.tbyte 0xA0 0.--17. 1. "RXRER,Receive Resource Errors" line.long 0xA4 "ROE,Receive Overrun Register" hexmask.long.word 0xA4 0.--9. 1. "RXOVR,Receive Overruns" line.long 0xA8 "IHCE,IP Header Checksum Errors Register" hexmask.long.byte 0xA8 0.--7. 1. "HCKER,IP Header Checksum Errors" line.long 0xAC "TCE,TCP Checksum Errors Register" hexmask.long.byte 0xAC 0.--7. 1. "TCKER,TCP Checksum Errors" line.long 0xB0 "UCE,UDP Checksum Errors Register" hexmask.long.byte 0xB0 0.--7. 1. "UCKER,UDP Checksum Errors" line.long 0xB4 "AFP,UDP Checksum Errors Register" hexmask.long.word 0xB4 0.--15. 1. "RDMAFP,Receive DMA Flushed Packets" group.long 0x11BC++0x7 line.long 0x0 "TISUBN,1588 Timer Increment [15:0] Sub-Nanoseconds Register" hexmask.long.byte 0x0 24.--31. 1. "LSBTIR,LSB [7:0] of Timer Increment sub-ns value" hexmask.long.word 0x0 0.--15. 1. "MSBTIR,MSB [23:8] of Timer Increment sub-ns value" line.long 0x4 "TSH,1588 Timer Seconds Register 47:32" hexmask.long.word 0x4 0.--15. 1. "TMR,Timer Value MSB [47:32]" rgroup.long 0x11C4++0xB line.long 0x0 "TSSSH,1588 Timer Sync Strobe Seconds Register 47:32" hexmask.long.word 0x0 0.--15. 1. "VTS,1588 Timer Sync Strobe Seconds" line.long 0x4 "TSSSL,1588 Timer Sync Strobe Seconds [31:0] Register" hexmask.long 0x4 0.--31. 1. "VTS,Value of Timer Seconds Register Capture" line.long 0x8 "TSSN,1588 Timer Sync Strobe Nanoseconds Register" hexmask.long 0x8 0.--29. 1. "VTN,Value Timer Nanoseconds Register Capture" group.long 0x11D0++0xF line.long 0x0 "TSL,1588 Timer Seconds [31:0] Register" hexmask.long 0x0 0.--31. 1. "TCS,Timer Count in Seconds" line.long 0x4 "TN,1588 Timer Nanoseconds Register" hexmask.long 0x4 0.--29. 1. "TNS,Timer Count in Nanoseconds" line.long 0x8 "TA,1588 Timer Adjust Register" bitfld.long 0x8 31. "ADJ,Adjust 1588 Timer" "0,1" hexmask.long 0x8 0.--29. 1. "ITDT,Increment/Decrement" line.long 0xC "TI,1588 Timer Increment Register" hexmask.long.byte 0xC 16.--23. 1. "NIT,Number of Increments" hexmask.long.byte 0xC 8.--15. 1. "ACNS,Alternative Count Nanoseconds" hexmask.long.byte 0xC 0.--7. 1. "CNS,Count Nanoseconds" rgroup.long 0x11E0++0x1F line.long 0x0 "EFTSL,PTP Event Frame Transmitted Seconds Low Register" hexmask.long 0x0 0.--31. 1. "RUD,Register Update" line.long 0x4 "EFTN,PTP Event Frame Transmitted Nanoseconds" hexmask.long 0x4 0.--29. 1. "RUD,Register Update" line.long 0x8 "EFRSL,PTP Event Frame Received Seconds Low Register" hexmask.long 0x8 0.--31. 1. "RUD,Register Update" line.long 0xC "EFRN,PTP Event Frame Received Nanoseconds" hexmask.long 0xC 0.--29. 1. "RUD,Register Update" line.long 0x10 "PEFTSL,PTP Peer Event Frame Transmitted Seconds Low Register" hexmask.long 0x10 0.--31. 1. "RUD,Register Update" line.long 0x14 "PEFTN,PTP Peer Event Frame Transmitted Nanoseconds" hexmask.long 0x14 0.--29. 1. "RUD,Register Update" line.long 0x18 "PEFRSL,PTP Peer Event Frame Received Seconds Low Register" hexmask.long 0x18 0.--31. 1. "RUD,Register Update" line.long 0x1C "PEFRN,PTP Peer Event Frame Received Nanoseconds" hexmask.long 0x1C 0.--29. 1. "RUD,Register Update" group.long 0x1260++0xB line.long 0x0 "TPQ1,Transmit Pause Quantum Register 1" hexmask.long.word 0x0 16.--31. 1. "QP3,Transmit pause quantum priority 3" hexmask.long.word 0x0 0.--15. 1. "QP2,Transmit pause quantum priority 2" line.long 0x4 "TPQ2,Transmit Pause Quantum Register 2" hexmask.long.word 0x4 16.--31. 1. "QP5,Transmit pause quantum priority 5" hexmask.long.word 0x4 0.--15. 1. "QP4,Transmit pause quantum priority 4" line.long 0x8 "TPQ3,Transmit Pause Quantum Register 3" hexmask.long.word 0x8 16.--31. 1. "QP7,Transmit pause quantum priority 7" hexmask.long.word 0x8 0.--15. 1. "QP6,Transmit pause quantum priority 6" rgroup.long 0x1270++0xF line.long 0x0 "RLPITR,Receive LPI transition Register" hexmask.long.word 0x0 0.--15. 1. "RLPITR,Count number of times transition from rx normal idle to low power idle" line.long 0x4 "RLPITI,Receive LPI Time Register" hexmask.long.tbyte 0x4 0.--23. 1. "RLPITI,Increment once over 16 ahb clock when LPI indication bit 20 is set in rx mode" line.long 0x8 "TLPITR,Receive LPI transition Register" hexmask.long.word 0x8 0.--15. 1. "TLPITR,Count number of times enable LPI tx bit 20 goes from low to high" line.long 0xC "TLPITI,Receive LPI Time Register" hexmask.long.tbyte 0xC 0.--23. 1. "TLPITI,Increment once over 16 ahb clock when LPI indication bit 20 is set in tx mode" repeat 10. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x1280)++0x3 line.long 0x0 "DSNCFGDBG[$1],Design Configuration Debug" hexmask.long 0x0 0.--31. 1. "DSNCFGDBG,Design Configuration Debug" repeat.end repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x45071300 ad:0x45071308 ad:0x45071310 ad:0x45071318 ad:0x45071320 ad:0x45071328 ad:0x45071330 ad:0x45071338 ad:0x45071340 ad:0x45071348 ad:0x45071350 ad:0x45071358 ad:0x45071360 ad:0x45071368 ad:0x45071370 ad:0x45071378) tree "SAU[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "SAB,Specific Address Bottom [31:0] Register" hexmask.long 0x0 0.--31. 1. "ADDR,Specific Address 1" line.long 0x4 "SAT,Specific Address Top [47:32] Register" hexmask.long.byte 0x4 24.--29. 1. "FLTBM,Filter byte mask" bitfld.long 0x4 16. "FLTT,Filter type" "0,1" hexmask.long.word 0x4 0.--15. 1. "ADDR,Specific Address 1" tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x45071380 ad:0x45071388 ad:0x45071390 ad:0x45071398 ad:0x450713A0 ad:0x450713A8 ad:0x450713B0 ad:0x450713B8 ad:0x450713C0 ad:0x450713C8 ad:0x450713D0 ad:0x450713D8 ad:0x450713E0 ad:0x450713E8 ad:0x450713F0 ad:0x450713F8) tree "SAU[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "SAB,Specific Address Bottom [31:0] Register" hexmask.long 0x0 0.--31. 1. "ADDR,Specific Address 1" line.long 0x4 "SAT,Specific Address Top [47:32] Register" hexmask.long.byte 0x4 24.--29. 1. "FLTBM,Filter byte mask" bitfld.long 0x4 16. "FLTT,Filter type" "0,1" hexmask.long.word 0x4 0.--15. 1. "ADDR,Specific Address 1" tree.end repeat.end base ad:0x45070000 repeat 15. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1400)++0x3 line.long 0x0 "ISRQ[$1],Interrupt Status Register Queues" bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1" bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" newline bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" repeat.end repeat 15. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1440)++0x3 line.long 0x0 "TBPQB[$1],Transmit Priority Queue Buffer Base Address" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1480)++0x3 line.long 0x0 "RBPQB[$1],Receive Priority Queue Buffer Base Address" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x14A0)++0x3 line.long 0x0 "RBQSZ[$1],Receive Priority Queue Buffer Size" hexmask.long.byte 0x0 0.--7. 1. "RXBUFSZ,DMA Receive Buffer Size" repeat.end group.long 0x14BC++0x1B line.long 0x0 "CBSCTRL,CBS Control Register" bitfld.long 0x0 1. "CBSEQB,Enable Credit-Based shaping on the 2nd highest priority queue (queue B)" "0,1" bitfld.long 0x0 0. "CBSEQA,Enable Credit-Based shaping on the highest priority queue (queue A)" "0,1" line.long 0x4 "CBSISQA,IdleSlope value for queue A" hexmask.long 0x4 0.--31. 1. "ISA,IdleSlope value for queue A" line.long 0x8 "CBSISQB,IdleSlope value for queue B" hexmask.long 0x8 0.--31. 1. "ISA,IdleSlope value for queue A" line.long 0xC "UTXQBA,Upper 32 bits of transmit buffer descriptor queue base address" hexmask.long 0xC 0.--31. 1. "UTXQBA,Upper 32 bits of transmit buffer descriptor queue base address" line.long 0x10 "TXBDCTRL,TX BD control register" bitfld.long 0x10 4.--5. "TXBDTSM,TX Descriptor Timestamp Insertion mode" "0,1,2,3" line.long 0x14 "RXBDCTRL,RX BD control register" bitfld.long 0x14 4.--5. "RXBDTSM,RX Descriptor Timestamp Insertion mode" "0,1,2,3" line.long 0x18 "URXQBA,Upper 32 bits of receive buffer descriptor queue base address" hexmask.long 0x18 0.--31. 1. "URXQBA,Upper 32 bits of receive buffer descriptor queue base address" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1500)++0x3 line.long 0x0 "SCRT1[$1],Screening Type 1 Register N" bitfld.long 0x0 29. "UDPE,UDP Port Match Enable" "0,1" bitfld.long 0x0 28. "DSTCE,DS/TC Enable" "0,1" hexmask.long.word 0x0 12.--27. 1. "UDPP,UDP Port Match" hexmask.long.byte 0x0 4.--11. 1. "DSTCM,DS/TC Match" hexmask.long.byte 0x0 0.--3. 1. "QNMBR,Queue Number" repeat.end repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1540)++0x3 line.long 0x0 "SCRT2[$1],Screening Type 2 Register" bitfld.long 0x0 30. "CMPCE,Compare C Enable" "0,1" hexmask.long.byte 0x0 25.--29. 1. "CMPCID,Compare C Index" bitfld.long 0x0 24. "CMPBE,Compare B Enable" "0,1" hexmask.long.byte 0x0 19.--23. 1. "CMPBID,Compare B Index" bitfld.long 0x0 18. "CMPAE,Compare A Enable" "0,1" hexmask.long.byte 0x0 13.--17. 1. "CMPAID,Compare A Index" newline bitfld.long 0x0 12. "ETE,EtherType Enable" "0,1" bitfld.long 0x0 9.--11. "ETID,EtherType Index" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8. "VLANE,VLAN Enable" "0,1" bitfld.long 0x0 4.--6. "VLANPRI,VLAN Priority" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 0.--3. 1. "QNMBR,Queue Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x15C0)++0x3 line.long 0x0 "RXQPTR[$1],Receive buffer queue base address" hexmask.long 0x0 2.--31. 1. "DMARXQPTR,Receive buffer queue base address" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x15E0)++0x3 line.long 0x0 "DMARXQS[$1],Receive Buffer Queue Size" hexmask.long.byte 0x0 0.--7. 1. "DMARXQS,Receive Buffer Queue Size" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1600)++0x3 line.long 0x0 "IERQ[$1],Interrupt Enable Queue N" bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1" bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" newline bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1620)++0x3 line.long 0x0 "IDRQ[$1],Interrupt Disable Queue N" bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1" bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" newline bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1640)++0x3 line.long 0x0 "IMRQ[$1],Interrupt Mask Queue Register" bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1" bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" newline bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1660)++0x3 line.long 0x0 "IERQU[$1],Interrupt Enable Queue N (upper)" bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1" bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" newline bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1680)++0x3 line.long 0x0 "IDRQU[$1],Interrupt Disable Queue N (upper)" bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1" bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" newline bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x16A0)++0x3 line.long 0x0 "IMRQU[$1],Interrupt Mask Queue N (upper)" bitfld.long 0x0 11. "HRESP,HRESP Not OK" "0,1" bitfld.long 0x0 10. "ROVR,Receive Overrun" "0,1" bitfld.long 0x0 7. "TCOMP,Transmit Complete" "0,1" bitfld.long 0x0 6. "TFC,Transmit Frame Corruption Due to AHB Error" "0,1" bitfld.long 0x0 5. "RLEX,Retry Limit Exceeded" "0,1" bitfld.long 0x0 4. "TUR,Transmit Underrun" "0,1" newline bitfld.long 0x0 3. "TXUBR,TX Used Bit Read" "0,1" bitfld.long 0x0 2. "RXUBR,RX Used Bit Read" "0,1" bitfld.long 0x0 1. "RCOMP,Receive Complete" "0,1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x16E0)++0x3 line.long 0x0 "SCRT2ET[$1],Screening Type 2 EtherType Register" hexmask.long.word 0x0 0.--15. 1. "CMPVAL,Ethertype compare value" repeat.end repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x45071700 ad:0x45071708 ad:0x45071710 ad:0x45071718 ad:0x45071720 ad:0x45071728 ad:0x45071730 ad:0x45071738 ad:0x45071740 ad:0x45071748 ad:0x45071750 ad:0x45071758 ad:0x45071760 ad:0x45071768 ad:0x45071770 ad:0x45071778) tree "SCRT2CMP[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "SCRT2CMP0,Screening Type 2 Compare Registers Word 0" hexmask.long.word 0x0 16.--31. 1. "CMPVAL,2Byte Compare Value" hexmask.long.word 0x0 0.--15. 1. "MASK,2Byte Mask/Compare Value" line.long 0x4 "SCRT2CMP1,Screening Type 2 Compare Registers Word 1" bitfld.long 0x4 8.--9. "OFFSSTRT,Offset Start" "0,1,2,3" hexmask.long.byte 0x4 0.--6. 1. "OFFSVAL,Offset Value" tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x45071780 ad:0x45071788 ad:0x45071790 ad:0x45071798 ad:0x450717A0 ad:0x450717A8 ad:0x450717B0 ad:0x450717B8 ad:0x450717C0 ad:0x450717C8 ad:0x450717D0 ad:0x450717D8 ad:0x450717E0 ad:0x450717E8 ad:0x450717F0 ad:0x450717F8) tree "SCRT2CMP[$1]" base $2 group.long ($2)++0x7 line.long 0x0 "SCRT2CMP0,Screening Type 2 Compare Registers Word 0" hexmask.long.word 0x0 16.--31. 1. "CMPVAL,2Byte Compare Value" hexmask.long.word 0x0 0.--15. 1. "MASK,2Byte Mask/Compare Value" line.long 0x4 "SCRT2CMP1,Screening Type 2 Compare Registers Word 1" bitfld.long 0x4 8.--9. "OFFSSTRT,Offset Start" "0,1,2,3" hexmask.long.byte 0x4 0.--6. 1. "OFFSVAL,Offset Value" tree.end repeat.end tree.end tree "ETM (Embedded Trace Macrocell)" base ad:0xE0041000 group.long 0x0++0x3 line.long 0x0 "CR,ETM Main Control Register" bitfld.long 0x0 28. "TSEN,TimeStamp Enable" "0,1" bitfld.long 0x0 21. "PORTSIZE3,Port Size bit 3" "0,1" bitfld.long 0x0 16.--17. "PORTMODE,Port Mode bits 1:0" "0,1,2,3" bitfld.long 0x0 13. "PORTMODE2,Port Mode bit 2" "0,1" bitfld.long 0x0 11. "PORTSEL,ETM Port Select" "0,1" bitfld.long 0x0 10. "PROG,ETM Programming" "0,1" bitfld.long 0x0 9. "DBGRQ,Debug Request Control" "0,1" bitfld.long 0x0 8. "BROUT,Branch Output" "0,1" bitfld.long 0x0 7. "STALL,Stall Processor" "0,1" newline bitfld.long 0x0 4.--6. "PORTSIZE,Port Size bits 2:0" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "ETMPD,ETM Power Down" "0,1" rgroup.long 0x4++0x3 line.long 0x0 "CCR,ETM Configuration Code Register" group.long 0x8++0x3 line.long 0x0 "TRIGGER,ETM Trigger Event Register" group.long 0x10++0x3 line.long 0x0 "SR,ETM Status Register" rgroup.long 0x14++0x3 line.long 0x0 "SCR,ETM System Configuration Register" group.long 0x20++0xB line.long 0x0 "TEEVR,ETM TraceEnable Event Register" line.long 0x4 "TECR1,ETM TraceEnable Control 1 Register" line.long 0x8 "FFLR,ETM FIFO Full Level Register" group.long 0x140++0x3 line.long 0x0 "CNTRLDVR1,ETM Free-running Counter Reload Value" rgroup.long 0x1E0++0xB line.long 0x0 "SYNCFR,ETM Synchronization Frequency Register" line.long 0x4 "IDR,ETM ID Register" line.long 0x8 "CCER,ETM Configuration Code Extension Register" group.long 0x1F0++0x3 line.long 0x0 "TESSEICR,ETM TraceEnable Start/Stop EmbeddedICE Control Register" group.long 0x1F8++0x3 line.long 0x0 "TSEVT,ETM TimeStamp Event Register" group.long 0x200++0x3 line.long 0x0 "TRACEIDR,ETM CoreSight Trace ID Register" rgroup.long 0x208++0x3 line.long 0x0 "IDR2,ETM ID Register 2" rgroup.long 0x314++0x3 line.long 0x0 "PDSR,ETM Device Power-Down Status Register" rgroup.long 0xEE0++0x3 line.long 0x0 "ITMISCIN,ETM Integration Test Miscellaneous Inputs" wgroup.long 0xEE8++0x3 line.long 0x0 "ITTRIGOUT,ETM Integration Test Trigger Out" rgroup.long 0xEF0++0x3 line.long 0x0 "ITATBCTR2,ETM Integration Test ATB Control 2" wgroup.long 0xEF8++0x3 line.long 0x0 "ITATBCTR0,ETM Integration Test ATB Control 0" group.long 0xF00++0x3 line.long 0x0 "ITCTRL,ETM Integration Mode Control Register" bitfld.long 0x0 0. "INTEGRATION," "0,1" group.long 0xFA0++0x7 line.long 0x0 "CLAIMSET,ETM Claim Tag Set Register" line.long 0x4 "CLAIMCLR,ETM Claim Tag Clear Register" wgroup.long 0xFB0++0x3 line.long 0x0 "LAR,ETM Lock Access Register" rgroup.long 0xFB4++0x7 line.long 0x0 "LSR,ETM Lock Status Register" bitfld.long 0x0 2. "ByteAcc," "0,1" bitfld.long 0x0 1. "Access," "0,1" bitfld.long 0x0 0. "Present," "0,1" line.long 0x4 "AUTHSTATUS,ETM Authentication Status Register" rgroup.long 0xFCC++0x33 line.long 0x0 "DEVTYPE,ETM CoreSight Device Type Register" line.long 0x4 "PIDR4,ETM Peripheral Identification Register #4" line.long 0x8 "PIDR5,ETM Peripheral Identification Register #5" line.long 0xC "PIDR6,ETM Peripheral Identification Register #6" line.long 0x10 "PIDR7,ETM Peripheral Identification Register #7" line.long 0x14 "PIDR0,ETM Peripheral Identification Register #0" line.long 0x18 "PIDR1,ETM Peripheral Identification Register #1" line.long 0x1C "PIDR2,ETM Peripheral Identification Register #2" line.long 0x20 "PIDR3,ETM Peripheral Identification Register #3" line.long 0x24 "CIDR0,ETM Component Identification Register #0" line.long 0x28 "CIDR1,ETM Component Identification Register #1" line.long 0x2C "CIDR2,ETM Component Identification Register #2" line.long 0x30 "CIDR3,ETM Component Identification Register #3" tree.end tree "EVSYS (Event System Interface)" base ad:0x44860000 wgroup.byte 0x0++0x0 line.byte 0x0 "CTRLA,Control" bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "SWEVT,Software Event" bitfld.long 0x0 31. "CHANNEL31,Channel 31 Software Selection" "0,1" bitfld.long 0x0 30. "CHANNEL30,Channel 30 Software Selection" "0,1" bitfld.long 0x0 29. "CHANNEL29,Channel 29 Software Selection" "0,1" bitfld.long 0x0 28. "CHANNEL28,Channel 28 Software Selection" "0,1" bitfld.long 0x0 27. "CHANNEL27,Channel 27 Software Selection" "0,1" bitfld.long 0x0 26. "CHANNEL26,Channel 26 Software Selection" "0,1" bitfld.long 0x0 25. "CHANNEL25,Channel 25 Software Selection" "0,1" bitfld.long 0x0 24. "CHANNEL24,Channel 24 Software Selection" "0,1" bitfld.long 0x0 23. "CHANNEL23,Channel 23 Software Selection" "0,1" bitfld.long 0x0 22. "CHANNEL22,Channel 22 Software Selection" "0,1" newline bitfld.long 0x0 21. "CHANNEL21,Channel 21 Software Selection" "0,1" bitfld.long 0x0 20. "CHANNEL20,Channel 20 Software Selection" "0,1" bitfld.long 0x0 19. "CHANNEL19,Channel 19 Software Selection" "0,1" bitfld.long 0x0 18. "CHANNEL18,Channel 18 Software Selection" "0,1" bitfld.long 0x0 17. "CHANNEL17,Channel 17 Software Selection" "0,1" bitfld.long 0x0 16. "CHANNEL16,Channel 16 Software Selection" "0,1" bitfld.long 0x0 15. "CHANNEL15,Channel 15 Software Selection" "0,1" bitfld.long 0x0 14. "CHANNEL14,Channel 14 Software Selection" "0,1" bitfld.long 0x0 13. "CHANNEL13,Channel 13 Software Selection" "0,1" bitfld.long 0x0 12. "CHANNEL12,Channel 12 Software Selection" "0,1" newline bitfld.long 0x0 11. "CHANNEL11,Channel 11 Software Selection" "0,1" bitfld.long 0x0 10. "CHANNEL10,Channel 10 Software Selection" "0,1" bitfld.long 0x0 9. "CHANNEL9,Channel 9 Software Selection" "0,1" bitfld.long 0x0 8. "CHANNEL8,Channel 8 Software Selection" "0,1" bitfld.long 0x0 7. "CHANNEL7,Channel 7 Software Selection" "0,1" bitfld.long 0x0 6. "CHANNEL6,Channel 6 Software Selection" "0,1" bitfld.long 0x0 5. "CHANNEL5,Channel 5 Software Selection" "0,1" bitfld.long 0x0 4. "CHANNEL4,Channel 4 Software Selection" "0,1" bitfld.long 0x0 3. "CHANNEL3,Channel 3 Software Selection" "0,1" bitfld.long 0x0 2. "CHANNEL2,Channel 2 Software Selection" "0,1" newline bitfld.long 0x0 1. "CHANNEL1,Channel 1 Software Selection" "0,1" bitfld.long 0x0 0. "CHANNEL0,Channel 0 Software Selection" "0,1" group.byte 0x8++0x0 line.byte 0x0 "PRICTRL,Priority Control" bitfld.byte 0x0 7. "RREN,Round-Robin Scheduling Enable" "0,1" hexmask.byte 0x0 0.--3. 1. "PRI,Channel Priority Number" group.word 0x10++0x1 line.word 0x0 "INTPEND,Channel Pending Interrupt" bitfld.word 0x0 15. "BUSY,Busy" "0,1" bitfld.word 0x0 14. "READY,Ready" "0,1" bitfld.word 0x0 9. "EVD,Channel Event Detected" "0,1" bitfld.word 0x0 8. "OVR,Channel Overrun" "0,1" hexmask.word.byte 0x0 0.--3. 1. "ID,Channel ID" rgroup.long 0x14++0xB line.long 0x0 "INTSTATUS,Interrupt Status" bitfld.long 0x0 11. "CHINT11,Channel 11 Pending Interrupt" "0,1" bitfld.long 0x0 10. "CHINT10,Channel 10 Pending Interrupt" "0,1" bitfld.long 0x0 9. "CHINT9,Channel 9 Pending Interrupt" "0,1" bitfld.long 0x0 8. "CHINT8,Channel 8 Pending Interrupt" "0,1" bitfld.long 0x0 7. "CHINT7,Channel 7 Pending Interrupt" "0,1" bitfld.long 0x0 6. "CHINT6,Channel 6 Pending Interrupt" "0,1" bitfld.long 0x0 5. "CHINT5,Channel 5 Pending Interrupt" "0,1" bitfld.long 0x0 4. "CHINT4,Channel 4 Pending Interrupt" "0,1" bitfld.long 0x0 3. "CHINT3,Channel 3 Pending Interrupt" "0,1" bitfld.long 0x0 2. "CHINT2,Channel 2 Pending Interrupt" "0,1" newline bitfld.long 0x0 1. "CHINT1,Channel 1 Pending Interrupt" "0,1" bitfld.long 0x0 0. "CHINT0,Channel 0 Pending Interrupt" "0,1" line.long 0x4 "BUSYCH,Busy Channels" bitfld.long 0x4 11. "BUSYCH11,Busy Channel 11" "0,1" bitfld.long 0x4 10. "BUSYCH10,Busy Channel 10" "0,1" bitfld.long 0x4 9. "BUSYCH9,Busy Channel 9" "0,1" bitfld.long 0x4 8. "BUSYCH8,Busy Channel 8" "0,1" bitfld.long 0x4 7. "BUSYCH7,Busy Channel 7" "0,1" bitfld.long 0x4 6. "BUSYCH6,Busy Channel 6" "0,1" bitfld.long 0x4 5. "BUSYCH5,Busy Channel 5" "0,1" bitfld.long 0x4 4. "BUSYCH4,Busy Channel 4" "0,1" bitfld.long 0x4 3. "BUSYCH3,Busy Channel 3" "0,1" bitfld.long 0x4 2. "BUSYCH2,Busy Channel 2" "0,1" newline bitfld.long 0x4 1. "BUSYCH1,Busy Channel 1" "0,1" bitfld.long 0x4 0. "BUSYCH0,Busy Channel 0" "0,1" line.long 0x8 "READYUSR,Ready Users" bitfld.long 0x8 11. "READYUSR11,Ready User for Channel 11" "0,1" bitfld.long 0x8 10. "READYUSR10,Ready User for Channel 10" "0,1" bitfld.long 0x8 9. "READYUSR9,Ready User for Channel 9" "0,1" bitfld.long 0x8 8. "READYUSR8,Ready User for Channel 8" "0,1" bitfld.long 0x8 7. "READYUSR7,Ready User for Channel 7" "0,1" bitfld.long 0x8 6. "READYUSR6,Ready User for Channel 6" "0,1" bitfld.long 0x8 5. "READYUSR5,Ready User for Channel 5" "0,1" bitfld.long 0x8 4. "READYUSR4,Ready User for Channel 4" "0,1" bitfld.long 0x8 3. "READYUSR3,Ready User for Channel 3" "0,1" bitfld.long 0x8 2. "READYUSR2,Ready User for Channel 2" "0,1" newline bitfld.long 0x8 1. "READYUSR1,Ready User for Channel 1" "0,1" bitfld.long 0x8 0. "READYUSR0,Ready User for Channel 0" "0,1" repeat 16. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF)(list ad:0x44860020 ad:0x44860028 ad:0x44860030 ad:0x44860038 ad:0x44860040 ad:0x44860048 ad:0x44860050 ad:0x44860058 ad:0x44860060 ad:0x44860068 ad:0x44860070 ad:0x44860078 ad:0x44860080 ad:0x44860088 ad:0x44860090 ad:0x44860098) tree "CHANNEL[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "CHANNEL,Channel n Control" bitfld.long 0x0 15. "ONDEMAND,Generic Clock On Demand" "0,1" bitfld.long 0x0 14. "RUNSTDBY,Run in standby" "0,1" bitfld.long 0x0 10.--11. "EDGSEL,Edge Detection Selection" "0: No event output when using the resynchronized or..,1: Event detection only on the rising edge of the..,2: Event detection only on the falling edge of the..,3: Event detection on rising and falling edges of.." bitfld.long 0x0 8.--9. "PATH,Path Selection" "0: Asynchronous path,1: Resynchronized path,?,?" hexmask.long.byte 0x0 0.--7. 1. "EVGEN,Event Generator Selection" group.byte ($2+0x4)++0x2 line.byte 0x0 "CHINTENCLR,Channel n Interrupt Enable Clear" bitfld.byte 0x0 1. "EVD,Channel Event Detected Interrupt Disable" "0,1" bitfld.byte 0x0 0. "OVR,Channel Overrun Interrupt Disable" "0,1" line.byte 0x1 "CHINTENSET,Channel n Interrupt Enable Set" bitfld.byte 0x1 1. "EVD,Channel Event Detected Interrupt Enable" "0,1" bitfld.byte 0x1 0. "OVR,Channel Overrun Interrupt Enable" "0,1" line.byte 0x2 "CHINTFLAG,Channel n Interrupt Flag Status and Clear" bitfld.byte 0x2 1. "EVD,Channel Event Detected" "0,1" bitfld.byte 0x2 0. "OVR,Channel Overrun" "0,1" rgroup.byte ($2+0x7)++0x0 line.byte 0x0 "CHSTATUS,Channel n Status" bitfld.byte 0x0 1. "BUSYCH,Busy Channel" "0,1" bitfld.byte 0x0 0. "RDYUSR,Ready User" "0,1" tree.end repeat.end repeat 16. (list 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F)(list ad:0x448600A0 ad:0x448600A8 ad:0x448600B0 ad:0x448600B8 ad:0x448600C0 ad:0x448600C8 ad:0x448600D0 ad:0x448600D8 ad:0x448600E0 ad:0x448600E8 ad:0x448600F0 ad:0x448600F8 ad:0x44860100 ad:0x44860108 ad:0x44860110 ad:0x44860118) tree "CHANNEL[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "CHANNEL,Channel n Control" bitfld.long 0x0 15. "ONDEMAND,Generic Clock On Demand" "0,1" bitfld.long 0x0 14. "RUNSTDBY,Run in standby" "0,1" bitfld.long 0x0 10.--11. "EDGSEL,Edge Detection Selection" "0: No event output when using the resynchronized or..,1: Event detection only on the rising edge of the..,2: Event detection only on the falling edge of the..,3: Event detection on rising and falling edges of.." bitfld.long 0x0 8.--9. "PATH,Path Selection" "0: Asynchronous path,1: Resynchronized path,?,?" hexmask.long.byte 0x0 0.--7. 1. "EVGEN,Event Generator Selection" group.byte ($2+0x4)++0x2 line.byte 0x0 "CHINTENCLR,Channel n Interrupt Enable Clear" bitfld.byte 0x0 1. "EVD,Channel Event Detected Interrupt Disable" "0,1" bitfld.byte 0x0 0. "OVR,Channel Overrun Interrupt Disable" "0,1" line.byte 0x1 "CHINTENSET,Channel n Interrupt Enable Set" bitfld.byte 0x1 1. "EVD,Channel Event Detected Interrupt Enable" "0,1" bitfld.byte 0x1 0. "OVR,Channel Overrun Interrupt Enable" "0,1" line.byte 0x2 "CHINTFLAG,Channel n Interrupt Flag Status and Clear" bitfld.byte 0x2 1. "EVD,Channel Event Detected" "0,1" bitfld.byte 0x2 0. "OVR,Channel Overrun" "0,1" rgroup.byte ($2+0x7)++0x0 line.byte 0x0 "CHSTATUS,Channel n Status" bitfld.byte 0x0 1. "BUSYCH,Busy Channel" "0,1" bitfld.byte 0x0 0. "RDYUSR,Ready User" "0,1" tree.end repeat.end base ad:0x44860000 repeat 117. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x120)++0x0 line.byte 0x0 "USER[$1],User Multiplexer n" hexmask.byte 0x0 0.--5. 1. "CHANNEL,Channel Event Selection" repeat.end tree.end tree "FCR (Flash Read Controller)" base ad:0x44004000 group.long 0x0++0x13 line.long 0x0 "CTRLA,Control A Register" hexmask.long.byte 0x0 16.--19. 1. "RDBUFWS,Data returned from the Read Buffer match the Flash Wait States" bitfld.long 0x0 15. "AUTOWS,Automatic Wait State Enable." "0,1" bitfld.long 0x0 14. "ADRWS,Address Wait State Enable" "0,1" hexmask.long.byte 0x0 8.--11. 1. "FWS,Flash Access Time Defined in terms of AHB Clock Wait States" bitfld.long 0x0 2. "ARB,AHB Arbitration scheme" "0,1" line.long 0x4 "CTRLB,Control B Register" bitfld.long 0x4 8.--9. "SLP,NVM Power Reduction Mode selection during System Standby Sleep" "0,1,2,3" bitfld.long 0x4 1. "TEMP,NVM Operating Temperature Read Mode" "0,1" bitfld.long 0x4 0. "PRM,Set NVM Power Reduction Mode" "0,1" line.long 0x8 "INTENCLR,Interrupt Enable Clear Register" bitfld.long 0x8 16. "FLTCAP,ECC Fault Capture Clear Enable" "0,1" bitfld.long 0x8 9. "CRCERR,CRC Error Clear Enable" "0,1" bitfld.long 0x8 8. "CRCDONE,CRC Calculation Done Clear Enable" "0,1" bitfld.long 0x8 1. "DERR,ECC Double Error Detected Clear Enable" "0,1" bitfld.long 0x8 0. "SERR,Flash SEC Interrupt Clear Enable" "0,1" line.long 0xC "INTENSET,Interrupt Enable SET Register" bitfld.long 0xC 16. "FLTCAP,ECC Fault Capture Interrupt Set Enable" "0,1" bitfld.long 0xC 9. "CRCERR,CRC Error Interrupt Set Enable" "0,1" bitfld.long 0xC 8. "CRCDONE,CRC Calculation Done Set Enable" "0,1" bitfld.long 0xC 1. "DERR,ECC Double Error Detected Set Enable" "0,1" bitfld.long 0xC 0. "SERR,Flash Single Error Corrected Set Enable" "0,1" line.long 0x10 "INTFLAG,Interrupt Flag Register" bitfld.long 0x10 16. "FLTCAP,ECC Fault Capture Flag" "0,1" bitfld.long 0x10 9. "CRCERR,CRC Error Flag" "0,1" bitfld.long 0x10 8. "CRCDONE,CRC Calculation Done Flag" "0,1" bitfld.long 0x10 1. "DERR,ECC Double Error Detected Flag" "0,1" bitfld.long 0x10 0. "SERR,Flash Single Error Corrected Flag" "0,1" rgroup.long 0x14++0x3 line.long 0x0 "STATUS,NVM Status Register" bitfld.long 0x0 1. "TEMP,NVM Operating Temperature Read Mode Status" "0,1" bitfld.long 0x0 0. "PRM,NVM Power Reduction Mode Status" "0,1" group.long 0x18++0x1B line.long 0x0 "DBGCTRL,Debug Control Register" bitfld.long 0x0 1.--2. "DBGECC,Debug ECC Mode" "0,1,2,3" bitfld.long 0x0 0. "CRCRUN,CRC Debug Run" "0,1" line.long 0x4 "ECCCTRL,ECC Control Register" hexmask.long.byte 0x4 8.--15. 1. "SECCNT,Flash SEC Count" bitfld.long 0x4 6. "ECCUNLCK,NVM ECC Mode Control Unlock" "0,1" bitfld.long 0x4 4.--5. "ECCCTL,NVM ECC Mode Control- restricts one or more NVMOPs" "0,1,2,3" line.long 0x8 "CRCCTRL,CRC Control Register" hexmask.long.word 0x8 16.--31. 1. "PERIOD,Read Period in GCLK counts" bitfld.long 0x8 15. "RIN,CRC Reflected Input" "0,1" bitfld.long 0x8 14. "ROUT,CRC Reflected Output" "0,1" bitfld.long 0x8 13. "AUTOR,CRC Auto Repeat" "0,1" bitfld.long 0x8 12. "PLEN32,Polynomial Length Select" "0,1" bitfld.long 0x8 5. "RUNSTDBY,CRC Run in Standby" "0,1" bitfld.long 0x8 1. "CRCEN,Start CRC Calculation" "0,1" bitfld.long 0x8 0. "CRCRST,CRC Reset" "0,1" line.long 0xC "CRCPAUSE,CRC PAUSE Register" bitfld.long 0xC 0. "PAUSE,CRC Pause" "0,1" line.long 0x10 "CRCMADR,CRC Message Address Register" hexmask.long 0x10 0.--27. 1. "CRCMADR,Message Start Address in Flash" line.long 0x14 "CRCMLEN,CRC Message Length Register" hexmask.long.tbyte 0x14 0.--23. 1. "CRCMLEN,Message Length in Bytes" line.long 0x18 "CRCIV,CRC Initial Value Register" hexmask.long 0x18 0.--31. 1. "CRCIV,CRC Initial Value" rgroup.long 0x34++0x3 line.long 0x0 "CRCACC,CRC Accumulator Register" hexmask.long 0x0 0.--31. 1. "CRCACC,CRC Accumulator Result" group.long 0x38++0x17 line.long 0x0 "CRCPOLY,CRC Polynomial Register" hexmask.long 0x0 0.--31. 1. "CRCPOLY,CRC Polynomial Coefficients for LFSR" line.long 0x4 "CRCFXOR,CRC Final XOR Register" hexmask.long 0x4 0.--31. 1. "CRCFXOR,CRC Final XOR" line.long 0x8 "CRCSUM,CRC Checksum Register" hexmask.long 0x8 0.--31. 1. "CRCSUM,CRC Checksum" line.long 0xC "FFLTCTRL,Flash ECC Fault Control Register" bitfld.long 0xC 12.--14. "FLTMD,Fault Mode Control" "0,1,2,3,4,5,6,7" bitfld.long 0xC 8.--10. "CTLFLT,ECC/Parity Control Fault bits" "0,1,2,3,4,5,6,7" bitfld.long 0xC 1. "FLTEN,ECC Fault Enable bit" "0,1" bitfld.long 0xC 0. "FLTRST,Fault Reset" "0,1" line.long 0x10 "FFLTPTR,Flash ECC Fault Pointer Register" hexmask.long.word 0x10 16.--24. 1. "FLT2PTR,Fault 2 Injection Pointer" hexmask.long.word 0x10 0.--8. 1. "FLT1PTR,Fault 1 Injection Pointer" line.long 0x14 "FFLTADR,Flash Fault Address Register" hexmask.long 0x14 0.--27. 1. "FLTADR,Fault Inject Mode - Physical Address" rgroup.long 0x50++0xB line.long 0x0 "FFLTCAP,Flash Fault Capture Address Register" hexmask.long 0x0 0.--27. 1. "FLTADR,Fault capture Mode - Physical Address" line.long 0x4 "FFLTPAR,Flash ECC Fault Parity Register" bitfld.long 0x4 31. "DEDOUT,The Calculated Overall Parity used in Double Error Detection" "0,1" hexmask.long.word 0x4 16.--24. 1. "SECOUT,The Calculated Single Error Parity bits" bitfld.long 0x4 15. "DEDIN,The Overall Parity from Flash" "0,1" hexmask.long.word 0x4 0.--8. 1. "SECIN,The Single Error Parity bits from Flash" line.long 0x8 "FFLTSYN,Flash ECC Fault Syndrome Register" hexmask.long.byte 0x8 27.--31. 1. "PERR,Per Word Parity Error Status" bitfld.long 0x8 24.--26. "CTLSTAT,Parity vs ECC Control Status" "0,1,2,3,4,5,6,7" bitfld.long 0x8 18. "CERR,ECC Control bit Error" "0,1" bitfld.long 0x8 16.--17. "DERR,Double Error Detected & Single Error Corrected" "0,1,2,3" bitfld.long 0x8 15. "DEDSYN,DED Syndrome" "0,1" hexmask.long.word 0x8 0.--8. 1. "SECSYN,Single Error Correction Syndrome" group.long 0x5C++0x7 line.long 0x0 "CRP,CFM Page Read Protect Register" bitfld.long 0x0 26. "BC2RPLOCK,Boot Configuration Page 2 RP Lock Bit" "0,1" bitfld.long 0x0 18. "BC1RPLOCK,Boot Configuration Page 1 RP Lock Bit" "0,1" bitfld.long 0x0 10. "BC2RP,Boot Configuration Page 2 Read Protect Bit" "0,1" bitfld.long 0x0 2. "BC1RP,Boot Configuration Page 1 Read Protect Bit" "0,1" line.long 0x4 "HSMCTRL,HSM CFM PAGES Control Register" bitfld.long 0x4 1. "KEYZ,Flash Key Locations read 0\xd5 s" "0,1" bitfld.long 0x4 0. "ECCDIS,ECC Disable for HSM Pages in CFM" "0,1" tree.end tree "FCW (Flash Write Control)" base ad:0x44002000 group.long 0x0++0x27 line.long 0x0 "CTRLA,NVM Write Control Register" bitfld.long 0x0 7. "PREPG,NVM Pre-Program Configuration Bit" "0,1" hexmask.long.byte 0x0 0.--3. 1. "NVMOP,NVM Operation" line.long 0x4 "CTRLB,NVM Control B Register" bitfld.long 0x4 6.--7. "SDALCPU3,Set DAL for CPU n" "0,1,2,3" bitfld.long 0x4 4.--5. "SDALCPU2,Set DAL for CPU n" "0,1,2,3" bitfld.long 0x4 2.--3. "SDALCPU1,Set DAL for CPU n" "0,1,2,3" bitfld.long 0x4 0.--1. "SDALCPU0,Set DAL for CPU n" "0,1,2,3" line.long 0x8 "MUTEX,NVM MUTEX Register" bitfld.long 0x8 1.--2. "OWNER,Flash Write Controller (FCW) Owner ID" "0,1,2,3" bitfld.long 0x8 0. "LOCK,Flash Write Controller (FCW) Lock by Owner" "0,1" line.long 0xC "INTENCLR,NVM Interrupt Enable Clear Register" bitfld.long 0xC 13. "WRERR,Write Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 12. "BORERR,Brown Out Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 8. "HTDPGM,High Temperature Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 7. "SECERR,Security Violation Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 6. "OPERR,NVMOP Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 5. "WPERR,Write Protection Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 4. "BUSERR,AHB Bus Error during Row Write Interrupt Enable Bit" "0,1" newline bitfld.long 0xC 3. "FIFOERR,FIFO Underrun during Row Write Interrupt Enable Bit" "0,1" bitfld.long 0xC 2. "CFGERR,Configuration Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 1. "KEYERR,Key Error Interrupt Enable Bit" "0,1" bitfld.long 0xC 0. "DONE,NVM Operation Done Interrupt Enable Bit" "0,1" line.long 0x10 "INTENSET,NVM Interrupt Enable SET Register" bitfld.long 0x10 13. "WRERR,Write Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 12. "BORERR,Brown Out Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 8. "HTDPGM,High Temperature Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 7. "SECERR,Security Violation Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 6. "OPERR,NVMOP Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 5. "WPERR,Write Protection Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 4. "BUSERR,AHB Bus Error during Row Write Interrupt Enable Bit" "0,1" newline bitfld.long 0x10 3. "FIFOERR,FIFO Underrun during Row Write Interrupt Enable Bit" "0,1" bitfld.long 0x10 2. "CFGERR,Configuration Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 1. "KEYERR,Key Error Interrupt Enable Bit" "0,1" bitfld.long 0x10 0. "DONE,NVM Operation Done Interrupt Enable Bit" "0,1" line.long 0x14 "INTFLAG,NVM Interrupt Flag Register" bitfld.long 0x14 13. "WRERR,Write Error Flag Bit" "0,1" bitfld.long 0x14 12. "BORERR,Brown Out Detect Error Flag Bit" "0,1" bitfld.long 0x14 8. "HTDPGM,High Temperature Detect Error Flag Bit" "0,1" bitfld.long 0x14 7. "SECERR,Security Violation Error Bit" "0,1" bitfld.long 0x14 6. "OPERR,NVMOP Error Flag Bit" "0,1" bitfld.long 0x14 5. "WPERR,Write Protection Error Flag Bit" "0,1" bitfld.long 0x14 4. "BUSERR,AHB Bus Error during Row Write Flag Bit" "0,1" newline bitfld.long 0x14 3. "FIFOERR,FIFO Underrun during Row Write Flag Bit" "0,1" bitfld.long 0x14 2. "CFGERR,Configuration Error Flag Bit" "0,1" bitfld.long 0x14 1. "KEYERR,Key Error Flag Bit" "0,1" bitfld.long 0x14 0. "DONE,NVM Operation Done Flag Bit" "0,1" line.long 0x18 "STATUS,NVM Status Register" bitfld.long 0x18 8. "HTDRDY,High Temp Detect Ready Status" "0,1" bitfld.long 0x18 0. "BUSY,NVM Busy Status" "0,1" line.long 0x1C "KEY,SFR Unlock Register" hexmask.long.tbyte 0x1C 8.--31. 1. "KEYCODE,NVM SFR Key Code" hexmask.long.byte 0x1C 0.--7. 1. "KEYVALUE,NVM SFR Key Value" line.long 0x20 "ADDR,Flash Address Register" hexmask.long 0x20 2.--31. 1. "ADDR,Flash Address used by NVMOP" line.long 0x24 "SRCADDR,Source Data Address Register" hexmask.long 0x24 2.--31. 1. "SRCADDR,Source Data (Word) Address" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x28)++0x3 line.long 0x0 "DATA[$1],Flash Write Data Register" hexmask.long 0x0 0.--31. 1. "DATA,Flash Write Data" repeat.end group.long 0x48++0x3 line.long 0x0 "SWAP,NVM Panel Swap Register" bitfld.long 0x0 9. "PFSLOCK,PFM Swap Lock Bit" "0,1" bitfld.long 0x0 8. "PFSWAP,PFM Swap Status/Control Bit" "0,1" bitfld.long 0x0 1. "BFSLOCK,BFM Swap Lock Bit" "0,1" bitfld.long 0x0 0. "BFSWAP,BFM Swap Status/Control Bit" "0,1" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x4C)++0x3 line.long 0x0 "PWP[$1],PFM Write Protect Region 0" hexmask.long.word 0x0 16.--27. 1. "PWPBASE,PWP Region 0 Base Address - 4KB Page Aligned" bitfld.long 0x0 15. "PWPEN,PWP Region 0 Enable Bit" "0,1" bitfld.long 0x0 14. "PWPLOCK,PWP Region 0 Lock Bit" "0,1" bitfld.long 0x0 13. "PWPMIR,Mirror PWP 0 bit" "0,1" hexmask.long.word 0x0 0.--11. 1. "PWPSIZE,PWP Region 0 Size in 4KB pages" repeat.end group.long 0x6C++0xF line.long 0x0 "LBWP,Lower BFM Write Protect Register" bitfld.long 0x0 31. "LBWPLOCK,LBWP Lock Bit" "0,1" hexmask.long.word 0x0 0.--15. 1. "LBWP,Lower Boot Pages Write Protect Bits" line.long 0x4 "UBWP,Upper BFM Write Protect Register" bitfld.long 0x4 31. "UBWPLOCK,UBWP Register Lock Bit" "0,1" hexmask.long.word 0x4 0.--15. 1. "UBWP,Upper Boot Pages Write Protect Bits" line.long 0x8 "UOWP,User OTP Write Protect Register" hexmask.long.byte 0x8 24.--27. 1. "UO2WPRLOCK,User OTP Page 2 WP Row Lock Bit" hexmask.long.byte 0x8 16.--19. 1. "UO1WPRLOCK,User OTP Page 1 WP Row Lock Bit" hexmask.long.byte 0x8 8.--11. 1. "UO2WP,User OTP Page 2 Write Protect Row Bit" hexmask.long.byte 0x8 0.--3. 1. "UO1WP,User OTP Page 1 Write Protect Row Bit" line.long 0xC "CWP,CFM Page Write Protect Register" bitfld.long 0xC 26. "BC2WPLOCK,Boot Configuration Page 2 WP Lock Bit" "0,1" bitfld.long 0xC 24. "UC2WPLOCK,User Configuration Page 2 WP Lock Bit" "0,1" bitfld.long 0xC 18. "BC1WPLOCK,Boot Configuration Page 1 WP Lock Bit" "0,1" bitfld.long 0xC 16. "UC1WPLOCK,User Configuration Page 1 WP Lock Bit" "0,1" bitfld.long 0xC 10. "BC2WP,Boot Configuration Page 2 Write Protect Bit" "0,1" bitfld.long 0xC 8. "UC2WP,User Configuration Page 2 Write Protect Bit" "0,1" bitfld.long 0xC 2. "BC1WP,Boot Configuration Page 1 Write Protect Bit" "0,1" newline bitfld.long 0xC 0. "UC1WP,User Configuration Page 1 Write Protect Bit" "0,1" group.long 0x80++0xF line.long 0x0 "HSMINTENCLR,HSM NVM Interrupt Enable Clear Register" bitfld.long 0x0 13. "WRERR,Write Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 12. "BORERR,Brown Out Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 8. "HTDPGM,High Temperature Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 7. "SECERR,Security Violation Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 6. "OPERR,NVMOP Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 5. "WPERR,Write Protection Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 4. "BUSERR,AHB Bus Error during Row Write Interrupt Enable Bit" "0,1" newline bitfld.long 0x0 3. "FIFOERR,FIFO Underrun during Row Write Interrupt Enable Bit" "0,1" bitfld.long 0x0 2. "CFGERR,Configuration Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 1. "KEYERR,Key Error Interrupt Enable Bit" "0,1" bitfld.long 0x0 0. "DONE,NVM Operation Done Interrupt Enable Bit" "0,1" line.long 0x4 "HSMINTENSET,HSM NVM Interrupt Enable SET Register" bitfld.long 0x4 13. "WRERR,Write Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 12. "BORERR,Brown Out Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 8. "HTDPGM,High Temperature Detect Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 7. "SECERR,Security Violation Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 6. "OPERR,NVMOP Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 5. "WPERR,Write Protection Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 4. "BUSERR,AHB Bus Error during Row Write Interrupt Enable Bit" "0,1" newline bitfld.long 0x4 3. "FIFOERR,FIFO Underrun during Row Write Interrupt Enable Bit" "0,1" bitfld.long 0x4 2. "CFGERR,Configuration Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 1. "KEYERR,Key Error Interrupt Enable Bit" "0,1" bitfld.long 0x4 0. "DONE,NVM Operation Done Interrupt Enable Bit" "0,1" line.long 0x8 "HSMINTFLAG,HSM NVM Interrupt Flag Register" bitfld.long 0x8 13. "WRERR,Write Error Flag Bit" "0,1" bitfld.long 0x8 12. "BORERR,Brown Out Detect Error Flag Bit" "0,1" bitfld.long 0x8 8. "HTDPGM,High Temperature Detect Error Flag Bit" "0,1" bitfld.long 0x8 7. "SECERR,Security Violation Error Bit" "0,1" bitfld.long 0x8 6. "OPERR,NVMOP Error Flag Bit" "0,1" bitfld.long 0x8 5. "WPERR,Write Protection Error Flag Bit" "0,1" bitfld.long 0x8 4. "BUSERR,AHB Bus Error during Row Write Flag Bit" "0,1" newline bitfld.long 0x8 3. "FIFOERR,FIFO Underrun during Row Write Flag Bit" "0,1" bitfld.long 0x8 2. "CFGERR,Configuration Error Flag Bit" "0,1" bitfld.long 0x8 1. "KEYERR,Key Error Flag Bit" "0,1" bitfld.long 0x8 0. "DONE,NVM Operation Done Flag Bit" "0,1" line.long 0xC "HSMCWP,HSM CFG Write Protect Register" hexmask.long.byte 0xC 28.--31. 1. "HCWPLOCK,HSMCWP Register Lock Bit" hexmask.long.byte 0xC 12.--15. 1. "HCWP,HSM CFG Page Write Protect Bits" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x90)++0x3 line.long 0x0 "HSMLDAT[$1],HSM Tamper Lower Overwrite Data Register" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xB0)++0x3 line.long 0x0 "HSMUDAT[$1],HSM Tamper Upper Overwrite Data Register" repeat.end tree.end tree "FPB (Flash Patch and Breakpoint)" base ad:0xE0002000 group.long 0x0++0x3 line.long 0x0 "FP_CTRL,Flash Patch Control Register" hexmask.long.byte 0x0 28.--31. 1. "REV,Revision" bitfld.long 0x0 12.--14. "NUM_CODE_1,Number of implemented code comparators bits [6:4]" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0 8.--11. 1. "NUM_LIT,Number of literal comparators" hexmask.long.byte 0x0 4.--7. 1. "NUM_CODE,Number of implemented code comparators bits [3:0]" bitfld.long 0x0 1. "KEY,FP_CTRL write-enable key" "0,1" bitfld.long 0x0 0. "ENABLE,Flash Patch global enable" "0,1" rgroup.long 0x4++0x3 line.long 0x0 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x0 29. "RMPSPT,Remap supported" "0,1" hexmask.long.tbyte 0x0 5.--28. 1. "REMAP,Remap address" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "FP_COMP[$1],Flash Patch Comparator Register n" bitfld.long 0x0 31. "FE,Flash Patch enable" "0,1" hexmask.long 0x0 2.--28. 1. "FPADDR,Flash Patch address" bitfld.long 0x0 0. "BE,Breakpoint enable" "0,1" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x8)++0x3 line.long 0x0 "FP_COMP_BREAKPOINT_MODE[$1],Flash Patch Comparator Register n" hexmask.long 0x0 1.--31. 1. "BPADDR,Breakpoint address" bitfld.long 0x0 0. "BE,Breakpoint enable" "0,1" repeat.end wgroup.long 0xFB0++0x3 line.long 0x0 "FP_LAR,FPB Software Lock Access Register" hexmask.long 0x0 0.--31. 1. "KEY,Lock access control" rgroup.long 0xFB4++0x3 line.long 0x0 "FP_LSR,FPB Software Lock Status Register" bitfld.long 0x0 2. "nTT,Not thirty-two bit" "0,1" bitfld.long 0x0 1. "SLK,Software Lock status" "0,1" bitfld.long 0x0 0. "SLI,Software Lock implemented" "0,1" rgroup.long 0xFD0++0x2F line.long 0x0 "FP_PID4,FP Peripheral Identification Register 4" hexmask.long.byte 0x0 4.--7. 1. "SIZE,4KB count" hexmask.long.byte 0x0 0.--3. 1. "DES_2,JEP106 continuation code" line.long 0x4 "FP_PID5,FP Peripheral Identification Register 5" line.long 0x8 "FP_PID6,FP Peripheral Identification Register 6" line.long 0xC "FP_PID7,FP Peripheral Identification Register 7" line.long 0x10 "FP_PID0,FP Peripheral Identification Register 0" hexmask.long.byte 0x10 0.--7. 1. "PART_0,Part number bits[7:0]" line.long 0x14 "FP_PID1,FP Peripheral Identification Register 1" hexmask.long.byte 0x14 4.--7. 1. "DES_0,JEP106 identification code bits [3:0]" hexmask.long.byte 0x14 0.--3. 1. "PART_1,Part number bits[11:8]" line.long 0x18 "FP_PID2,FP Peripheral Identification Register 2" hexmask.long.byte 0x18 4.--7. 1. "REVISION,Component revision" bitfld.long 0x18 3. "JEDEC,JEDEC assignee value is used" "0,1" bitfld.long 0x18 0.--2. "DES_1,JEP106 identification code bits[6:4]" "0,1,2,3,4,5,6,7" line.long 0x1C "FP_PID3,FP Peripheral Identification Register 3" hexmask.long.byte 0x1C 4.--7. 1. "REVAND,RevAnd" hexmask.long.byte 0x1C 0.--3. 1. "CMOD,Customer Modified" line.long 0x20 "FP_CID0,FP Component Identification Register 0" hexmask.long.byte 0x20 0.--7. 1. "PRMBL_0,CoreSight component identification preamble" line.long 0x24 "FP_CID1,FP Component Identification Register 1" hexmask.long.byte 0x24 4.--7. 1. "CLASS,CoreSight component class" hexmask.long.byte 0x24 0.--3. 1. "PRMBL_1,CoreSight component identification preamble" line.long 0x28 "FP_CID2,FP Component Identification Register 2" hexmask.long.byte 0x28 0.--7. 1. "PRMBL_2,CoreSight component identification preamble" line.long 0x2C "FP_CID3,FP Component Identification Register 3" hexmask.long.byte 0x2C 0.--7. 1. "PRMBL_3,CoreSight component identification preamble" tree.end tree "FPU (Floating Point Unit)" base ad:0xE000EF30 group.long 0x4++0xB line.long 0x0 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x0 31. "ASPEN," "0,1" bitfld.long 0x0 30. "LSPEN," "0,1" bitfld.long 0x0 8. "MONRDY," "0,1" bitfld.long 0x0 6. "BFRDY," "0,1" newline bitfld.long 0x0 5. "MMRDY," "0,1" bitfld.long 0x0 4. "HFRDY," "0,1" bitfld.long 0x0 3. "THREAD," "0,1" bitfld.long 0x0 1. "USER," "0,1" newline bitfld.long 0x0 0. "LSPACT," "0,1" line.long 0x4 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x4 3.--31. 1. "ADDRESS,Address for FP registers in exception stack frame" line.long 0x8 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x8 26. "AHP,Default value for FPSCR.AHP" "0,1" bitfld.long 0x8 25. "DN,Default value for FPSCR.DN" "0,1" bitfld.long 0x8 24. "FZ,Default value for FPSCR.FZ" "0,1" bitfld.long 0x8 22.--23. "RMODE,Default value for FPSCR.RMODE" "0: Round to Nearest,1: Round towards Positive Infinity,2: Round towards Negative Infinity,3: Round towards Zero" rgroup.long 0x10++0xB line.long 0x0 "MVFR0,Media and FP Feature Register 0" hexmask.long.byte 0x0 28.--31. 1. "FP_rounding_modes," hexmask.long.byte 0x0 24.--27. 1. "Short_vectors," hexmask.long.byte 0x0 20.--23. 1. "Square_root," hexmask.long.byte 0x0 16.--19. 1. "Divide," newline hexmask.long.byte 0x0 12.--15. 1. "FP_excep_trapping," hexmask.long.byte 0x0 8.--11. 1. "Double_precision," hexmask.long.byte 0x0 4.--7. 1. "Single_precision," hexmask.long.byte 0x0 0.--3. 1. "A_SIMD_registers," line.long 0x4 "MVFR1,Media and FP Feature Register 1" hexmask.long.byte 0x4 28.--31. 1. "FP_fused_MAC," hexmask.long.byte 0x4 24.--27. 1. "FP_HPFP," hexmask.long.byte 0x4 4.--7. 1. "D_NaN_mode," hexmask.long.byte 0x4 0.--3. 1. "FtZ_mode," line.long 0x8 "MVFR2,Media and FP Feature Register 2" tree.end tree "FREQM (Frequency Meter)" base ad:0x44060000 group.byte 0x0++0x0 line.byte 0x0 "CTRLA,Control A Register" bitfld.byte 0x0 7. "ONDEMAND,On Demand Control" "0,1" bitfld.byte 0x0 6. "RUNSTDBY,Run In Standby" "0,1" bitfld.byte 0x0 2. "FREERUN,Free Running Mode" "0,1" bitfld.byte 0x0 1. "ENABLE,Enable" "0,1" bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1" wgroup.byte 0x1++0x0 line.byte 0x0 "CTRLB,Control B Register" bitfld.byte 0x0 0. "START,Start Measurement" "0,1" group.word 0x2++0x1 line.word 0x0 "CFGA,Config A Register" bitfld.word 0x0 15. "DIVREF,Divide Reference Clock" "0: The reference clock is divided by 1,1: The reference clock is divided by 8" bitfld.word 0x0 8.--10. "MSRSEL,Measurement Clock Selection" "0: GCLK Input Clock,1: CPU Input Clock,?,?,?,?,?,?" hexmask.word.byte 0x0 0.--7. 1. "REFNUM,Number of Reference Clock Cycles" group.byte 0x4++0x0 line.byte 0x0 "CTRLC,Control C Register" bitfld.byte 0x0 0.--2. "WINMODE,Window Monitor Mode" "0: No window mode (default),1: VALUE > WINLT,2: VALUE < WINUT,3: WINLT < VALUE < WINUT,4: !(WINLT < VALUE < WINUT),?,?,?" group.byte 0x6++0x0 line.byte 0x0 "EVCTRL,Event Control Register" bitfld.byte 0x0 5. "WINMONEO,Window Monitor Event Out" "0,1" bitfld.byte 0x0 4. "DONEEO,Measurement Done Event Out" "0,1" bitfld.byte 0x0 1. "STARTINV,Start Measurement Event Invert Enable" "0,1" bitfld.byte 0x0 0. "STARTEI,Start Measurement Event Input Enable" "0,1" group.byte 0x8++0x3 line.byte 0x0 "INTENCLR,Interrupt Enable Clear Register" bitfld.byte 0x0 1. "WINMON,Window Monitor Interrupt Disable" "0,1" bitfld.byte 0x0 0. "DONE,Measurement Done Interrupt Disable" "0,1" line.byte 0x1 "INTENSET,Interrupt Enable Set Register" bitfld.byte 0x1 1. "WINMON,Window Monitor Interrupt Enable" "0,1" bitfld.byte 0x1 0. "DONE,Measurement Done Interrupt Enable" "0,1" line.byte 0x2 "INTFLAG,Interrupt Flag Register" bitfld.byte 0x2 1. "WINMON,Window Monitor" "0,1" bitfld.byte 0x2 0. "DONE,Measurement Done" "0,1" line.byte 0x3 "STATUS,Status Register" bitfld.byte 0x3 1. "OVF,Sticky Count Value Overflow" "0,1" bitfld.byte 0x3 0. "BUSY,FREQM Status" "0,1" rgroup.long 0xC++0x7 line.long 0x0 "SYNCBUSY,Synchronization Busy Register" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "VALUE,Count Value Register" hexmask.long.tbyte 0x4 0.--23. 1. "VALUE,Measurement Value" group.long 0x20++0x7 line.long 0x0 "WINLT,Window Monitor Lower Threshold" hexmask.long.tbyte 0x0 0.--23. 1. "WINLT,Window Lower Threshold" line.long 0x4 "WINUT,Window Monitor Upper Threshold" hexmask.long.tbyte 0x4 0.--23. 1. "WINUT,Window Upper Threshold" tree.end tree "GCLK (Generic Clock Generator)" base ad:0x44050000 group.byte 0x0++0x0 line.byte 0x0 "CTRLA,Control" bitfld.byte 0x0 0. "SWRST,Software Reset" "0,1" rgroup.long 0x4++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 17. "GENCTRL15,Generic Clock Generator Control 15 Synchronization Busy bit" "0,1" bitfld.long 0x0 16. "GENCTRL14,Generic Clock Generator Control 14 Synchronization Busy bit" "0,1" bitfld.long 0x0 15. "GENCTRL13,Generic Clock Generator Control 13 Synchronization Busy bit" "0,1" bitfld.long 0x0 14. "GENCTRL12,Generic Clock Generator Control 12 Synchronization Busy bit" "0,1" bitfld.long 0x0 13. "GENCTRL11,Generic Clock Generator Control 11 Synchronization Busy bit" "0,1" bitfld.long 0x0 12. "GENCTRL10,Generic Clock Generator Control 10 Synchronization Busy bit" "0,1" bitfld.long 0x0 11. "GENCTRL9,Generic Clock Generator Control 9 Synchronization Busy bit" "0,1" newline bitfld.long 0x0 10. "GENCTRL8,Generic Clock Generator Control 8 Synchronization Busy bit" "0,1" bitfld.long 0x0 9. "GENCTRL7,Generic Clock Generator Control 7 Synchronization Busy bit" "0,1" bitfld.long 0x0 8. "GENCTRL6,Generic Clock Generator Control 6 Synchronization Busy bit" "0,1" bitfld.long 0x0 7. "GENCTRL5,Generic Clock Generator Control 5 Synchronization Busy bit" "0,1" bitfld.long 0x0 6. "GENCTRL4,Generic Clock Generator Control 4 Synchronization Busy bit" "0,1" bitfld.long 0x0 5. "GENCTRL3,Generic Clock Generator Control 3 Synchronization Busy bit" "0,1" bitfld.long 0x0 4. "GENCTRL2,Generic Clock Generator Control 2 Synchronization Busy bit" "0,1" newline bitfld.long 0x0 3. "GENCTRL1,Generic Clock Generator Control 1 Synchronization Busy bit" "0,1" bitfld.long 0x0 2. "GENCTRL0,Generic Clock Generator Control 0 Synchronization Busy bit" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy bit" "0,1" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "GENCTRL[$1],Generic Clock Generator Control" hexmask.long.word 0x0 16.--31. 1. "DIV,Division Factor" bitfld.long 0x0 13. "RUNSTDBY,Run in Standby" "0,1" bitfld.long 0x0 12. "DIVSEL,Divide Selection" "0: Divide input directly by divider factor,1: Divide input by 2^(divider factor+ 1)" bitfld.long 0x0 11. "OE,Output Enable" "0,1" bitfld.long 0x0 10. "OOV,Output Off Value" "0,1" bitfld.long 0x0 9. "IDC,Improve Duty Cycle" "0,1" bitfld.long 0x0 8. "GENEN,Generic Clock Generator Enable" "0,1" newline hexmask.long.byte 0x0 0.--3. 1. "SRC,Source Select" repeat.end repeat 64. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x80)++0x3 line.long 0x0 "PCHCTRL[$1],Peripheral Clock Control" bitfld.long 0x0 7. "WRTLOCK,Write Lock" "0,1" bitfld.long 0x0 6. "CHEN,Channel Enable" "0,1" hexmask.long.byte 0x0 0.--3. 1. "GEN,Generic Clock Generator" repeat.end tree.end sif (cpuis("PIC32CZ2051CA90208")||cpuis("PIC32CZ4010CA90208")||cpuis("PIC32CZ8110CA90208")) tree "HSM (Hardware Security Module)" base ad:0x4F018000 group.long 0x0++0x17 line.long 0x0 "CTRLA,CONTROL REGISTER A" bitfld.long 0x0 6. "RUNSTDBY,Run In Standby bit" "0,1" bitfld.long 0x0 2. "PRIV,Privileged Access Only bit" "0,1" bitfld.long 0x0 1. "ENABLE,Clock Enable bit" "0,1" line.long 0x4 "CTRLB,CONTROL REGISTER B" bitfld.long 0x4 0. "CANCEL,Cancel Command" "0,1" line.long 0x8 "INTENCLR,INTERRUPT ENABLE CLEAR REGISTER" bitfld.long 0x8 1. "TAMPER,Tamper Interrupt Enable" "0,1" bitfld.long 0x8 0. "ERROR,Error Interrupt Enable" "0,1" line.long 0xC "INTENSET,INTERRUPT ENABLE SET" bitfld.long 0xC 1. "TAMPER,Tamper Interrupt Enable" "0,1" bitfld.long 0xC 0. "ERROR,Error Interrupt Enable" "0,1" line.long 0x10 "INTFLAG,INTERRUPT FLAG" bitfld.long 0x10 1. "TAMPER,Tamper Interrupt Flag" "0,1" bitfld.long 0x10 0. "ERROR,Error Interrupt Flag" "0,1" line.long 0x14 "STATUS,STATUS" hexmask.long.byte 0x14 16.--19. 1. "ECODE,ERROR CODE" bitfld.long 0x14 12.--14. "SBS,SECURE BOOT STATE" "0,1,2,3,4,5,6,7" bitfld.long 0x14 8.--10. "LCS,LIFECYCLE STATE" "0,1,2,3,4,5,6,7" bitfld.long 0x14 4.--6. "PS,PROCESSING STATE" "0,1,2,3,4,5,6,7" bitfld.long 0x14 1. "LKUP,HSM CPU LOCKUP" "0,1" bitfld.long 0x14 0. "BUSY,HSM CPU BUSY" "0,1" repeat 16. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "MBFIFO[$1],MAILBOX FIFO" hexmask.long 0x0 0.--31. 1. "MBFIFO,MAILBOX FIFO" repeat.end group.long 0x140++0x1B line.long 0x0 "MBTXSTATUS,MAILBOX TRANSMIT STATUS" bitfld.long 0x0 23. "TXERR,TRANSMIT ERROR" "0,1" bitfld.long 0x0 21. "TXFULL,TRANSMIT FIFO FULL" "0,1" bitfld.long 0x0 20. "TXINT,TRANSMIT FIFO INTERRUPT FLAG" "0,1" hexmask.long.byte 0x0 16.--19. 1. "TXTYPE,TRANSMIT MESSAGE HEADER TYPE" hexmask.long.word 0x0 0.--15. 1. "TXREMAINING,TRANSMIT BYTES REMAINING" line.long 0x4 "MBRXSTATUS,MAILBOX RECEIVE STATUS" bitfld.long 0x4 23. "RXERR,RECEIVE ERROR" "0,1" bitfld.long 0x4 22. "RXHEAD,Receive Header Next Word bit" "0,1" bitfld.long 0x4 21. "RXEMPTY,RECEIVE FIFO FULL" "0,1" bitfld.long 0x4 20. "RXINT,RECEIVE FIFO INTERRUPT FLAG" "0,1" hexmask.long.byte 0x4 16.--19. 1. "RXTYPE,RECEIVE MESSAGE HEADER TYPE" hexmask.long.word 0x4 0.--15. 1. "RXREMAINING,RECEIVE BYTES REMAINING" line.long 0x8 "MBTXPROT,MAILBOX TX PROTECTION" hexmask.long.byte 0x8 24.--31. 1. "USER,USER SIDEBAND" bitfld.long 0x8 23. "NSEC,MAILBOX MESSAGE NON-SECURE ACCESS" "0,1" bitfld.long 0x8 22. "PRIV,MAILBOX MESSAGE PRIVILEDGED ACCESS" "0,1" bitfld.long 0x8 21. "UNPROT,MAILBOX UNPROTECTED" "0,1" line.long 0xC "MBRXPROT,MAILBOX RX PROTECTION" hexmask.long.byte 0xC 24.--31. 1. "USER,USER SIDEBAND" bitfld.long 0xC 23. "NSEC,MAILBOX MESSAGE NON-SECURE ACCESS" "0,1" bitfld.long 0xC 22. "PRIV,MAILBOX MESSAGE PRIVILEDGED ACCESS" "0,1" bitfld.long 0xC 21. "UNPROT,MAILBOX UNPROTECTED" "0,1" line.long 0x10 "MBTXHEAD,MAILBOX TRANSMIT HEADER" hexmask.long 0x10 0.--31. 1. "TXHEAD,MAILBOX TRANSMIT HEADER REGISTER" line.long 0x14 "MBRXHEAD,MAILBOX RECEIVE HEADER" hexmask.long 0x14 0.--31. 1. "RXHEAD,MAILBOX RECEIVE HEADER REGISTER" line.long 0x18 "MBCONFIG,MAILBOX CONFIGURATION" bitfld.long 0x18 1. "RXINT,MAILBOX RECEIVE INTERRUPT ENABLE" "0,1" bitfld.long 0x18 0. "TXINT,MAILBOX TRANSMIT INTERRUPT ENABLE" "0,1" tree.end endif tree "ITM (Instrumentation Trace Macrocell)" base ad:0xE0041000 repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "PORT_BYTE_MODE[$1],ITM Stimulus Port Registers" hexmask.long.byte 0x0 0.--7. 1. "PORT," repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "PORT_HWORD_MODE[$1],ITM Stimulus Port Registers" hexmask.long.word 0x0 0.--15. 1. "PORT," repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x4) wgroup.long ($2)++0x3 line.long 0x0 "PORT_WORD_MODE[$1],ITM Stimulus Port Registers" hexmask.long 0x0 0.--31. 1. "PORT," repeat.end group.long 0xE00++0x3 line.long 0x0 "TER,ITM Trace Enable Register" group.long 0xE40++0x3 line.long 0x0 "TPR,ITM Trace Privilege Register" hexmask.long.byte 0x0 0.--3. 1. "PRIVMASK," group.long 0xE80++0x3 line.long 0x0 "TCR,ITM Trace Control Register" bitfld.long 0x0 23. "BUSY," "0,1" hexmask.long.byte 0x0 16.--22. 1. "TraceBusID," bitfld.long 0x0 10.--11. "GTSFREQ," "0,1,2,3" bitfld.long 0x0 8.--9. "TSPrescale," "0,1,2,3" bitfld.long 0x0 5. "STALLENA," "0,1" bitfld.long 0x0 4. "SWOENA," "0,1" bitfld.long 0x0 3. "DWTENA," "0,1" bitfld.long 0x0 2. "SYNCENA," "0,1" newline bitfld.long 0x0 1. "TSENA," "0,1" bitfld.long 0x0 0. "ITMENA," "0,1" wgroup.long 0xEF8++0x3 line.long 0x0 "IWR,ITM Integration Write Register" bitfld.long 0x0 0. "ATVALIDM," "0,1" rgroup.long 0xEFC++0x3 line.long 0x0 "IRR,ITM Integration Read Register" bitfld.long 0x0 0. "ATREADYM," "0,1" tree.end tree "MCLK (Main Clock)" base ad:0x44052000 group.long 0x0++0xB line.long 0x0 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x0 0. "CKRDY,Clock Ready Interrupt Enable" "0,1" line.long 0x4 "INTENSET,Interrupt Enable Set" bitfld.long 0x4 0. "CKRDY,Clock Ready Interrupt Enable" "0,1" line.long 0x8 "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0x8 0. "CKRDY,Clock Ready" "0,1" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xC)++0x3 line.long 0x0 "CLKDIV[$1],Clock Divider Control" hexmask.long.byte 0x0 0.--7. 1. "DIV,Clock Domain Division Factor" repeat.end repeat 9. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x3C)++0x3 line.long 0x0 "CLKMSK[$1],Peripheral Clock Enable Mask" hexmask.long 0x0 0.--31. 1. "MASK,Peripheral Clock Enable Mask" repeat.end tree.end tree "MCRAMC (Multi-Channel RAM Controller)" base ad:0x44822000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control Enable A Register" bitfld.long 0x0 1. "ENABLE,ECC Decoder Enable" "0: ECC decoding is disabled.,1: ECC decoding is enabled." bitfld.long 0x0 0. "SWRST,Software Reset" "0: No effect.,1: Reset the MCRAMC. A software-triggered hardware.." rgroup.long 0x4++0x3 line.long 0x0 "SYNCBUSY,Sync Busy Register" bitfld.long 0x0 2. "ENABLE,ECC Decoder Enable busy bit" "0,1" bitfld.long 0x0 1. "FLTEN,Fault Injection Enabled busy bit" "0,1" bitfld.long 0x0 0. "SWRST,Software reset busy bit" "0,1" group.long 0x8++0x17 line.long 0x0 "INTENCLR,Interrupt Enable Clear Register" bitfld.long 0x0 1. "DERREN,Double Bit Error Interrupt Enable Clear" "0,1" bitfld.long 0x0 0. "SERREN,Single Bit Error Interrupt Enable Clear" "0,1" line.long 0x4 "INTENSET,Interrupt Enable Set Register" bitfld.long 0x4 1. "DERREN,Double Bit Error Interrupt Enable Set" "0,1" bitfld.long 0x4 0. "SERREN,Single Bit Error Interrupt Enable Set" "0,1" line.long 0x8 "INTSTA,Interrupt Status Register" bitfld.long 0x8 1. "DERR,Double Bit Error" "0,1" bitfld.long 0x8 0. "SERR,Single Bit Error" "0,1" line.long 0xC "FLTCTRL,Fault Injection Control Register" bitfld.long 0xC 12.--13. "FLTMD,Fault Injection Mode" "0,1,2,3" bitfld.long 0xC 1. "FLTEN,Fault Injection Enabled" "0: Disables fault injection.,1: Enables fault injection at FLTADR address offset.." line.long 0x10 "FLTPTR,Fault Injection Pointer Register" hexmask.long.byte 0x10 16.--23. 1. "FLT2PTR,Double Fault Injection Bit Pointer" hexmask.long.byte 0x10 0.--7. 1. "FLT1PTR,Single Fault Injection Bit Pointer" line.long 0x14 "FLTADR,Fault Injection Address Register" hexmask.long.tbyte 0x14 0.--23. 1. "FLTADR,Fault Address Offset" rgroup.long 0x20++0xB line.long 0x0 "ERRCADR,Error Capture Address Register" hexmask.long.tbyte 0x0 0.--23. 1. "ERCADR,ECC SECDED Error Capture Address" line.long 0x4 "ERRCPAR,Error Capture Parity Register" hexmask.long.byte 0x4 0.--7. 1. "ERCPAR,ECC SECDED Error Capture Parity" line.long 0x8 "ERRCSYN,Error Capture Syndrome Register" bitfld.long 0x8 15. "ERR2,ECC Double Bit Error" "0: Not a Double bit error.,1: Double bit error." bitfld.long 0x8 14. "ERR1,ECC Single Bit Error" "0,1" hexmask.long.byte 0x8 0.--7. 1. "ERCSYN,ECC SECDED Error Capture Syndrome" tree.end tree "MLB (Media Local Bus)" base ad:0x458C0000 group.long 0x0++0x3 line.long 0x0 "CTRLA,MLB Wrapper Control Register" bitfld.long 0x0 6. "RUNSTDBY,Run In Standby" "0,1" bitfld.long 0x0 1. "ENABLE,MediaLB Enable (ON) bit" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.long 0x10++0xF line.long 0x0 "INTENCLR,Interrupt Enable Clear Register" bitfld.long 0x0 2. "INT1AHB,AHB Interrupt 1 Enable Clear" "0,1" bitfld.long 0x0 1. "INT0AHB,AHB Interrupt 0 Enable Clear" "0,1" newline bitfld.long 0x0 0. "INTMLB,MLB General Interrupt Enable Clear" "0,1" line.long 0x4 "INTENSET,Interrupt Enable Set Register" bitfld.long 0x4 2. "INT1AHB,AHB Interrupt 1 Enable Set" "0,1" bitfld.long 0x4 1. "INT0AHB,AHB Interrupt 0 Enable Set" "0,1" newline bitfld.long 0x4 0. "INTMLB,MLB General Interrupt Enable Set" "0,1" line.long 0x8 "INTFLAG,Interrupt Status and Clear Register" bitfld.long 0x8 2. "INT1AHB,AHB Interrupt 1 Flag" "0,1" bitfld.long 0x8 1. "INT0AHB,AHB Interrupt 0 Flag" "0,1" newline bitfld.long 0x8 0. "INTMLB,MLB General Interrupt Flag" "0,1" line.long 0xC "DBGCTRL,Debug Control Register" bitfld.long 0xC 0. "DBGRUN,Debug Run Enable" "0,1" rgroup.long 0x20++0x3 line.long 0x0 "SYNCBUSY,SYNCBUSY Register" bitfld.long 0x0 1. "ENABLE,Module Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x400++0x3 line.long 0x0 "MLBC0,MediaLB Control 0 Register" bitfld.long 0x0 15.--17. "FCNT,Number of frames per sub-buffer (synchronous channels)" "0,1,2,3,4,5,6,7" bitfld.long 0x0 14. "CTLRETRY,Control Tx packet retry" "0,1" newline bitfld.long 0x0 12. "ASYRETRY,Asynchronous Tx packet retry" "0,1" bitfld.long 0x0 7. "MLBLK,MediaLB lock status (read-only)" "0,1" newline bitfld.long 0x0 5. "MLBPEN,MediaLB 6-pin enable." "0,1" bitfld.long 0x0 2.--4. "MLBCLK,MediaLB clock speed select" "0: 256x Frame Speed,1: 512x Frame Speed,2: 1024x Frame Speed,?,?,?,?,?" newline bitfld.long 0x0 0. "MLBEN,MediaLB enable" "0,1" group.long 0x40C++0x3 line.long 0x0 "MS0,MediaLB Channel Status 0 Register" hexmask.long 0x0 0.--31. 1. "MCS,MediaLB channel status (for channels 31 to 0)" group.long 0x414++0x3 line.long 0x0 "MS1,MediaLB Channel Status 1 Register" hexmask.long 0x0 0.--31. 1. "MCS,MediaLB channel status (for channels 63 to 32)" group.long 0x420++0x3 line.long 0x0 "MSS,MediaLB System Status Register" bitfld.long 0x0 5. "SERVREQ,Service request enable" "0,1" bitfld.long 0x0 4. "SWSYSCMD,Software system command detected" "0,1" newline bitfld.long 0x0 3. "CSSYSCMD,Channel scan system command detected" "0,1" bitfld.long 0x0 2. "ULKSYSCMD,Network unlock system command detected" "0,1" newline bitfld.long 0x0 1. "LKSYSCMD,Network lock system command detected" "0,1" bitfld.long 0x0 0. "RSTSYSCMD,Reset system command detected" "0,1" rgroup.long 0x424++0x3 line.long 0x0 "MSD,MediaLB System Data Register (Read-only)" hexmask.long.byte 0x0 24.--31. 1. "SD3,System data (byte 3) - MSB" hexmask.long.byte 0x0 16.--23. 1. "SD2,System data (byte 2)" newline hexmask.long.byte 0x0 8.--15. 1. "SD1,System data (byte 1)" hexmask.long.byte 0x0 0.--7. 1. "SD0,System data (byte 0) - LSB" group.long 0x42C++0x3 line.long 0x0 "MIEN,MediaLB Interrupt Enable Register" bitfld.long 0x0 29. "CTX_BREAK,Control Tx break enable" "0,1" bitfld.long 0x0 28. "CTX_PE,Control Tx protocol error enable" "0,1" newline bitfld.long 0x0 27. "CTX_DONE,Control Tx packet done enable" "0,1" bitfld.long 0x0 26. "CRX_BREAK,Control Rx break enable" "0,1" newline bitfld.long 0x0 25. "CRX_PE,Control Rx protocol error enable" "0,1" bitfld.long 0x0 24. "CRX_DONE,Control Rx packet done enable" "0,1" newline bitfld.long 0x0 22. "ATX_BREAK,Asynchronous Tx break enable" "0,1" bitfld.long 0x0 21. "ATX_PE,Asynchronous Tx protocol error enable" "0,1" newline bitfld.long 0x0 20. "ATX_DONE,Asynchronous Tx packet done enable" "0,1" bitfld.long 0x0 19. "ARX_BREAK,Asynchronous Rx break enable" "0,1" newline bitfld.long 0x0 18. "ARX_PE,Asynchronous Rx protocol error enable" "0,1" bitfld.long 0x0 17. "ARX_DONE,Asynchronous Rx packet done enable" "0,1" newline bitfld.long 0x0 16. "SYNC_PE,Synchronous protocol error enable" "0,1" bitfld.long 0x0 1. "ISOC_BUFO,Isochronous Rx buffer overflow enable" "0,1" newline bitfld.long 0x0 0. "ISOC_PE,Isochronous Rx protocol error enable" "0,1" group.long 0x43C++0x3 line.long 0x0 "MLBC1,MediaLB Control 1 Register" hexmask.long.byte 0x0 8.--15. 1. "NDA,Node device address" bitfld.long 0x0 7. "CLKM,MediaLB clock missing status" "0,1" newline bitfld.long 0x0 6. "LOCK,MediaLB lock error status" "0,1" group.long 0x480++0x3 line.long 0x0 "HCTL,HBI Control Register" bitfld.long 0x0 15. "EN,HBI enable: 1 = enabled 0 = disabled" "0: disabled,1: enabled" bitfld.long 0x0 1. "RST1,AGU1 software reset: 1 = reset active 0 = reset inactive" "0: reset inactive,1: reset active" newline bitfld.long 0x0 0. "RST0,AGU0 software reset: 1 = reset active 0 = reset inactive" "0: reset inactive,1: reset active" group.long 0x488++0xF line.long 0x0 "HCMR0,HBI Channel Mask 0 Register" hexmask.long 0x0 0.--31. 1. "CHM,Bitwise channel mask bit: 0 = masked 1 = unmasked" line.long 0x4 "HCMR1,HBI Channel Mask 1 Register" hexmask.long 0x4 0.--31. 1. "CHM,Bitwise channel mask bit: 0 = masked 1 = unmasked" line.long 0x8 "HCER0,HBI Channel Error 0 Register" hexmask.long 0x8 0.--31. 1. "CERR,Bitwise channel error bit" line.long 0xC "HCER1,HBI Channel Error 1 Register" hexmask.long 0xC 0.--31. 1. "CERR,Bitwise channel error bit" rgroup.long 0x498++0x7 line.long 0x0 "HCBR0,HBI Channel Busy 0 Register" hexmask.long 0x0 0.--31. 1. "CHB,Bitwise channel busy bit: 0 = idle 1 = busy" line.long 0x4 "HCBR1,HBI Channel Busy 1 Register" hexmask.long 0x4 0.--31. 1. "CHB,Bitwise channel busy bit: 0 = idle 1 = busy" group.long 0x4C0++0x27 line.long 0x0 "MDAT0,MIF Data 0 Register" hexmask.long 0x0 0.--31. 1. "DATA,CTR data - bits[31:0] of 128-bit entry or DBR data - bits[7:0] of 8-bit entry" line.long 0x4 "MDAT1,MIF Data 1 Register" hexmask.long 0x4 0.--31. 1. "DATA,CTR data - bits[63:32] of 128-bit entry" line.long 0x8 "MDAT2,MIF Data 2 Register" hexmask.long 0x8 0.--31. 1. "DATA,CTR data - bits[95:64] of 128-bit entry" line.long 0xC "MDAT3,MIF Data 3 Register" hexmask.long 0xC 0.--31. 1. "DATA,CTR data - bits[127:96] of 128-bit entry" line.long 0x10 "MDWE0,MIF Data Write Enable 0 Register" hexmask.long 0x10 0.--31. 1. "MASK,Bitwise write enable for CTR data - bits[31:0] (0 = disabled 1 = enabled)" line.long 0x14 "MDWE1,MIF Data Write Enable 1 Register" hexmask.long 0x14 0.--31. 1. "MASK,Bitwise write enable for CTR data - bits[63:32] (0 = disabled 1 = enabled)" line.long 0x18 "MDWE2,MIF Data Write Enable 2 Register" hexmask.long 0x18 0.--31. 1. "MASK,Bitwise write enable for CTR data - bits[95:64] (0 = disabled 1 = enabled)" line.long 0x1C "MDWE3,MIF Data Write Enable 3 Register" hexmask.long 0x1C 0.--31. 1. "MASK,Bitwise write enable for CTR data - bits[127:96] (0 = disabled 1 = enabled)" line.long 0x20 "MCTL,MIF Control Register" bitfld.long 0x20 0. "XCMP,Transfer complete (write 0 to clear)" "0,1" line.long 0x24 "MADR,MIF Address Register" bitfld.long 0x24 31. "WNR,Write-Not-Read selection (0 = read 1 = write)" "0: read,1: write)" bitfld.long 0x24 30. "TB,Target location bit (0 = selects CTR 1 = selects DBR)" "0: selects CTR,1: selects DBR)" newline hexmask.long.word 0x24 0.--13. 1. "ADDR,DBR address of 8-bit entry - bits[13:8].CTR address of 128-bit entry or DBR address of 8-bit entry - bits[7:0]" group.long 0x7C0++0x3 line.long 0x0 "ACTL,AHB Control Register" bitfld.long 0x0 4. "MPB,Packet buffering mode: 0 = single-packet mode 1 = multiple-packet mode" "0: single-packet mode,1: multiple-packet mode" bitfld.long 0x0 2. "DMAMODE,DMA Mode: 0 = DMA Mode 0 1 = DMA Mode 1" "0: DMA Mode 0,1: DMA Mode 1" newline bitfld.long 0x0 1. "SMX,AHB interrupt mux enable: 0 = ACSR0 generates an interrupt on ahb_int[0]; ACSR1 generates an interrupt on ahb_int[1] 1 = ACSR0 and ACSR1 generate an interrupts on ahb_int[0] only" "0: ACSR0 generates an interrupt on ahb_int[0];..,1: ACSR0 and ACSR1 generate an interrupts on.." bitfld.long 0x0 0. "SCE,Software clear enable: 0 = Hardware clears interrupt after a ACSRn register read 1 = Software clears interrupt" "0: Hardware clears interrupt after a ACSRn register..,1: Software clears interrupt" group.long 0x7D0++0xF line.long 0x0 "ACSR0,AHB Channel Status 0 Register" hexmask.long 0x0 0.--31. 1. "CHS,Interrupt status for logical channels 31 to 0: 0 = None 1 = Interrupt" line.long 0x4 "ACSR1,AHB Channel Status 1 Register" hexmask.long 0x4 0.--31. 1. "CHS,Interrupt status for logical channels 63 to 32: 0 = None 1 = Interrupt" line.long 0x8 "ACMR0,AHB Channel Mask 0 Register" hexmask.long 0x8 0.--31. 1. "CHM,Bitwise channel mask bit:0 = Masked 1 = Unmasked" line.long 0xC "ACMR1,AHB Channel Mask 1 Register" hexmask.long 0xC 0.--31. 1. "CHM,Bitwise channel mask bit:0 = Masked 1 = Unmasked" tree.end tree "MPU (Memory Protection Unit)" base ad:0xE000ED90 rgroup.long 0x0++0x3 line.long 0x0 "TYPE,MPU Type Register" hexmask.long.byte 0x0 16.--23. 1. "IREGION,Number of Instruction Regions" hexmask.long.byte 0x0 8.--15. 1. "DREGION,Number of Data Regions" bitfld.long 0x0 0. "SEPARATE,Separate instruction and Data Memory MapsRegions" "0,1" group.long 0x4++0x27 line.long 0x0 "CTRL,MPU Control Register" bitfld.long 0x0 2. "PRIVDEFENA,Enables privileged software access to default memory map" "0,1" bitfld.long 0x0 1. "HFNMIENA,Enable Hard Fault and NMI handlers" "0,1" bitfld.long 0x0 0. "ENABLE,MPU Enable" "0,1" line.long 0x4 "RNR,MPU Region Number Register" hexmask.long.byte 0x4 0.--7. 1. "REGION,Region referenced by RBAR and RASR" line.long 0x8 "RBAR,MPU Region Base Address Register" hexmask.long 0x8 5.--31. 1. "ADDR,Region base address" bitfld.long 0x8 4. "VALID,Region number valid" "0,1" hexmask.long.byte 0x8 0.--3. 1. "REGION,Region number" line.long 0xC "RASR,MPU Region Attribute and Size Register" bitfld.long 0xC 28. "XN,Execute Never Attribute" "0,1" bitfld.long 0xC 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7" bitfld.long 0xC 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7" bitfld.long 0xC 18. "S,Shareable bit" "0,1" bitfld.long 0xC 17. "C,Cacheable bit" "0,1" bitfld.long 0xC 16. "B,Bufferable bit" "0,1" hexmask.long.byte 0xC 8.--15. 1. "SRD,Sub-region disable" bitfld.long 0xC 1. "SIZE,Region Size" "0,1" newline bitfld.long 0xC 0. "ENABLE,Region Enable" "0,1" line.long 0x10 "RBAR_A1,MPU Alias 1 Region Base Address Register" hexmask.long 0x10 5.--31. 1. "ADDR,Region base address" bitfld.long 0x10 4. "VALID,Region number valid" "0,1" hexmask.long.byte 0x10 0.--3. 1. "REGION,Region number" line.long 0x14 "RASR_A1,MPU Alias 1 Region Attribute and Size Register" bitfld.long 0x14 28. "XN,Execute Never Attribute" "0,1" bitfld.long 0x14 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7" bitfld.long 0x14 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7" bitfld.long 0x14 18. "S,Shareable bit" "0,1" bitfld.long 0x14 17. "C,Cacheable bit" "0,1" bitfld.long 0x14 16. "B,Bufferable bit" "0,1" hexmask.long.byte 0x14 8.--15. 1. "SRD,Sub-region disable" bitfld.long 0x14 1. "SIZE,Region Size" "0,1" newline bitfld.long 0x14 0. "ENABLE,Region Enable" "0,1" line.long 0x18 "RBAR_A2,MPU Alias 2 Region Base Address Register" hexmask.long 0x18 5.--31. 1. "ADDR,Region base address" bitfld.long 0x18 4. "VALID,Region number valid" "0,1" hexmask.long.byte 0x18 0.--3. 1. "REGION,Region number" line.long 0x1C "RASR_A2,MPU Alias 2 Region Attribute and Size Register" bitfld.long 0x1C 28. "XN,Execute Never Attribute" "0,1" bitfld.long 0x1C 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 18. "S,Shareable bit" "0,1" bitfld.long 0x1C 17. "C,Cacheable bit" "0,1" bitfld.long 0x1C 16. "B,Bufferable bit" "0,1" hexmask.long.byte 0x1C 8.--15. 1. "SRD,Sub-region disable" bitfld.long 0x1C 1. "SIZE,Region Size" "0,1" newline bitfld.long 0x1C 0. "ENABLE,Region Enable" "0,1" line.long 0x20 "RBAR_A3,MPU Alias 3 Region Base Address Register" hexmask.long 0x20 5.--31. 1. "ADDR,Region base address" bitfld.long 0x20 4. "VALID,Region number valid" "0,1" hexmask.long.byte 0x20 0.--3. 1. "REGION,Region number" line.long 0x24 "RASR_A3,MPU Alias 3 Region Attribute and Size Register" bitfld.long 0x24 28. "XN,Execute Never Attribute" "0,1" bitfld.long 0x24 24.--26. "AP,Access Permission" "0,1,2,3,4,5,6,7" bitfld.long 0x24 19.--21. "TEX,TEX bit" "0,1,2,3,4,5,6,7" bitfld.long 0x24 18. "S,Shareable bit" "0,1" bitfld.long 0x24 17. "C,Cacheable bit" "0,1" bitfld.long 0x24 16. "B,Bufferable bit" "0,1" hexmask.long.byte 0x24 8.--15. 1. "SRD,Sub-region disable" bitfld.long 0x24 1. "SIZE,Region Size" "0,1" newline bitfld.long 0x24 0. "ENABLE,Region Enable" "0,1" tree.end tree "NVIC (Nested Vectored Interrupt Controller)" base ad:0xE000E000 rgroup.long 0x4++0x3 line.long 0x0 "ICTR,Interrupt Controller Type Register" hexmask.long.byte 0x0 0.--3. 1. "INTLINESNUM,Number of 32-interrupt groups - 1" repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x100)++0x3 line.long 0x0 "ISER[$1],Interrupt Set Enable Register" hexmask.long 0x0 0.--31. 1. "SETENA,Interrupt set enable bits" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x180)++0x3 line.long 0x0 "ICER[$1],Interrupt Clear Enable Register" hexmask.long 0x0 0.--31. 1. "CLRENA,Interrupt clear-enable bits" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x200)++0x3 line.long 0x0 "ISPR[$1],Interrupt Set Pending Register" hexmask.long 0x0 0.--31. 1. "SETPEND,Interrupt set-pending bits" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x280)++0x3 line.long 0x0 "ICPR[$1],Interrupt Clear Pending Register" hexmask.long 0x0 0.--31. 1. "CLRPEND,Interrupt clear-pending bits" repeat.end repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x300)++0x3 line.long 0x0 "IABR[$1],Interrupt Active Bit Register" hexmask.long 0x0 0.--31. 1. "ACTIVE,Interrupt active bits" repeat.end repeat 56. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x400)++0x0 line.byte 0x0 "IPR[$1],Interrupt Priority Register n" bitfld.byte 0x0 0.--2. "PRI0,Priority of interrupt n" "0,1,2,3,4,5,6,7" repeat.end tree.end tree "OSC32KCTRL (32kHz Oscillators Control)" base ad:0x44042000 group.long 0x0++0xB line.long 0x0 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x0 2. "XOSC32KFAIL,XOSC32K Clock Failure Detector Interrupt Enable" "0,1" bitfld.long 0x0 0. "XOSC32KRDY,XOSC32K Ready Interrupt Enable" "0,1" line.long 0x4 "INTENSET,Interrupt Enable Set" bitfld.long 0x4 2. "XOSC32KFAIL,XOSC32K Clock Failure Detector Interrupt Enable" "0,1" bitfld.long 0x4 0. "XOSC32KRDY,XOSC32K Ready Interrupt Enable" "0,1" line.long 0x8 "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0x8 2. "XOSC32KFAIL,XOSC32K Clock Failure Detector" "0,1" bitfld.long 0x8 0. "XOSC32KRDY,XOSC32K Ready" "0,1" rgroup.long 0xC++0x3 line.long 0x0 "STATUS,Power and Clocks Status" bitfld.long 0x0 3. "XOSC32KSW,XOSC32K Clock switch" "0,1" bitfld.long 0x0 2. "XOSC32KFAIL,XOSC32K Clock Failure Detector" "0,1" bitfld.long 0x0 0. "XOSC32KRDY,XOSC32K Ready" "0,1" group.long 0x10++0xF line.long 0x0 "CLKSELCTRL,Clock Selection Control" bitfld.long 0x0 4.--5. "HSMSEL,HSM Clock Selection" "0: 32.768kHz from 32kHz internal ULP oscillator,?,2: 32.768kHz from 32.768kHz external crystal..,?" bitfld.long 0x0 0.--1. "RTCSEL,RTC Clock Selection" "0: 32.768kHz from 32kHz internal ULP oscillator,1: 1.024kHz from 32kHz internal ULP oscillator,2: 32.768kHz from 32.768kHz external crystal..,3: 1.024kHz from 32.768kHz internal oscillator" line.long 0x4 "CFDCTRL,Clock Failure Detector Control" bitfld.long 0x4 2. "CFDPRESC,Clock Failure Detector Prescaler" "0,1" bitfld.long 0x4 1. "SWBACK,Clock Switch Back" "0,1" bitfld.long 0x4 0. "CFDEN,Clock Failure Detector Enable" "0,1" line.long 0x8 "EVCTRL,Event Control" bitfld.long 0x8 0. "CFDEO,Clock Failure Detector Event Output Enable" "0,1" line.long 0xC "XOSC32K,32kHz External Crystal Oscillator (XOSC32K) Control" hexmask.long.byte 0xC 24.--27. 1. "CTRLX,Extended Control" hexmask.long.byte 0xC 18.--21. 1. "CGM,Control Gain Mode" bitfld.long 0xC 17. "BOOST,Gain Boost" "0,1" newline bitfld.long 0xC 16. "ENSL,Enable Servo Loop" "0,1" hexmask.long.byte 0xC 8.--11. 1. "STARTUP,Startup Mode" bitfld.long 0xC 7. "ONDEMAND,On Demand Mode" "0,1" newline bitfld.long 0xC 2. "XTALEN,Crystal Oscillator Enable" "0,1" bitfld.long 0xC 1. "ENABLE,Oscillator Enable" "0,1" tree.end tree "OSCCTRL (Oscillators Control)" base ad:0x44040000 group.long 0x0++0xF line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 0. "CFDEO,Clock Failure Detector Event Output Enable" "0,1" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 26. "PLL1LOCKR,PLL 1 Lock Rise Interrupt Enable" "0,1" bitfld.long 0x4 24. "PLL0LOCKR,PLL 0 Lock Rise Interrupt Enable" "0,1" bitfld.long 0x4 13. "DFLLFAIL,DFLL Startup Failure Interrupt Enable" "0,1" newline bitfld.long 0x4 12. "DFLLRCS,DFLL Reference Clock Stopped Interrupt Enable" "0,1" bitfld.long 0x4 11. "DFLLUNF,DFLL Tuner Underflow Interrupt Enable" "0,1" bitfld.long 0x4 10. "DFLLOVF,DFLL Tuner Overflow Interrupt Enable" "0,1" newline bitfld.long 0x4 9. "DFLLLOCK,DFLL Lock Interrupt Enable" "0,1" bitfld.long 0x4 8. "DFLLRDY,DFLL Ready Interrupt Enable" "0,1" bitfld.long 0x4 2. "CLKFAIL,XOSC Clock Failure Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "XOSCFAIL,XOSC Startup Failure Interrupt Enable" "0,1" bitfld.long 0x4 0. "XOSCRDY,XOSC Ready Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 26. "PLL1LOCKR,PLL 1 Lock Rise Interrupt Enable" "0,1" bitfld.long 0x8 24. "PLL0LOCKR,PLL 0 Lock Rise Interrupt Enable" "0,1" bitfld.long 0x8 13. "DFLLFAIL,DFLL Startup Failure Interrupt Enable" "0,1" newline bitfld.long 0x8 12. "DFLLRCS,DFLL Reference Clock Stopped Interrupt Enable" "0,1" bitfld.long 0x8 11. "DFLLUNF,DFLL Tuner Underflow Interrupt Enable" "0,1" bitfld.long 0x8 10. "DFLLOVF,DFLL Tuner Overflow Interrupt Enable" "0,1" newline bitfld.long 0x8 9. "DFLLLOCK,DFLL Lock Interrupt Enable" "0,1" bitfld.long 0x8 8. "DFLLRDY,DFLL Ready Interrupt Enable" "0,1" bitfld.long 0x8 2. "CLKFAIL,XOSC Clock Failure Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "XOSCFAIL,XOSC Startup Failure Interrupt Enable" "0,1" bitfld.long 0x8 0. "XOSCRDY,XOSC Ready Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 26. "PLL1LOCKR,PLL 1 Lock Rise" "0,1" bitfld.long 0xC 24. "PLL0LOCKR,PLL 0 Lock Rise" "0,1" bitfld.long 0xC 13. "DFLLFAIL,DFLL Startup Failure" "0,1" newline bitfld.long 0xC 12. "DFLLRCS,DFLL Reference Clock Stopped" "0,1" bitfld.long 0xC 11. "DFLLUNF,DFLL Tuner Underflow" "0,1" bitfld.long 0xC 10. "DFLLOVF,DFLL Tuner Overflow" "0,1" newline bitfld.long 0xC 9. "DFLLLOCK,DFLL Lock" "0,1" bitfld.long 0xC 8. "DFLLRDY,DFLL Ready" "0,1" bitfld.long 0xC 2. "CLKFAIL,XOSC Clock Failure" "0,1" newline bitfld.long 0xC 1. "XOSCFAIL,XOSC Startup Failure" "0,1" bitfld.long 0xC 0. "XOSCRDY,XOSC Ready" "0,1" rgroup.long 0x10++0x3 line.long 0x0 "STATUS,Status" bitfld.long 0x0 25. "PLL1LOCK,PLL 1 Lock" "0,1" bitfld.long 0x0 24. "PLL0LOCK,PLL 0 Lock" "0,1" bitfld.long 0x0 13. "DFLLFAIL,DFLL Startup Failure" "0,1" newline bitfld.long 0x0 12. "DFLLRCS,DFLL Reference Clock Stopped" "0,1" bitfld.long 0x0 11. "DFLLUNF,DFLL Tuner Underflow" "0,1" bitfld.long 0x0 10. "DFLLOVF,DFLL Tuner Overflow" "0,1" newline bitfld.long 0x0 9. "DFLLLOCK,DFLL Lock" "0,1" bitfld.long 0x0 8. "DFLLRDY,DFLL Ready" "0,1" bitfld.long 0x0 3. "XOSCCKSW,XOSC Clock Switch" "0,1" newline bitfld.long 0x0 2. "CLKFAIL,XOSC Clock Failure" "0,1" bitfld.long 0x0 1. "XOSCFAIL,XOSC Startup Failure" "0,1" bitfld.long 0x0 0. "XOSCRDY,XOSC Ready" "0,1" group.long 0x14++0x7 line.long 0x0 "XOSCCTRLA,External Multipurpose Crystal Oscillator Control A" bitfld.long 0x0 31. "WRTLOCK,Write Lock for CTRLA register" "0,1" bitfld.long 0x0 24.--25. "USBHSDIV,USBHS Referrence Clock Division" "0: USBHS PLL reference XOSC clock is disabled,1: USBHS PLL reference XOSC clock is divided by 1,2: USBHS PLL reference XOSC clock is divided by 2,3: USBHS PLL reference XOSC clock is divided by 4" hexmask.long.byte 0x0 16.--19. 1. "CFDPRESC,Clock Failure Detector Prescaler" newline hexmask.long.byte 0x0 8.--11. 1. "STARTUP,Start-Up Time" bitfld.long 0x0 7. "ONDEMAND,On Demand Control" "0,1" bitfld.long 0x0 5. "SWBEN,Xosc Clock Switch Back Enable" "0,1" newline bitfld.long 0x0 4. "CFDEN,Clock Failure Detector Enable" "0,1" bitfld.long 0x0 3. "XTALEN,Crystal Oscillator Enable" "0,1" bitfld.long 0x0 2. "AGC,Auto Gain Control Loop Enable" "0,1" newline bitfld.long 0x0 1. "ENABLE,Oscillator Enable" "0,1" line.long 0x4 "XOSCCTRLB,External Multipurpose Crystal Oscillator Control B" bitfld.long 0x4 31. "WRTLOCK,Write Lock for CTRLB register" "0,1" hexmask.long.byte 0x4 0.--7. 1. "USRCFG,User Configuration Control Bits" group.long 0x2C++0xB line.long 0x0 "DFLLCTRLA,DFLL48M Control A" bitfld.long 0x0 7. "ONDEMAND,On Demand Control" "0,1" bitfld.long 0x0 3. "LOWFREQ,Low Frequency Mode" "0,1" bitfld.long 0x0 2. "WRTLOCK,Write Lock" "0,1" newline bitfld.long 0x0 1. "ENABLE,DFLL Enable" "0,1" line.long 0x4 "DFLLCTRLB,DFLL48M Control B" bitfld.long 0x4 7. "WAITLOCK,Wait Lock" "0,1" bitfld.long 0x4 5. "QLDIS,Quick Lock Disable" "0,1" bitfld.long 0x4 4. "CCDIS,Chill Cycle Disable" "0,1" newline bitfld.long 0x4 3. "USBCRM,USB Clock Recovery Mode" "0,1" bitfld.long 0x4 2. "LLAW,Lose Lock After Wake" "0,1" bitfld.long 0x4 1. "STABLE,Stable DFLL Frequency" "0,1" newline bitfld.long 0x4 0. "LOOPEN,Operating Mode Selection" "0,1" line.long 0x8 "DFLLTUNE,DFLL48M Tune" hexmask.long.byte 0x8 0.--6. 1. "TUNE,Tune Value" rgroup.long 0x38++0x3 line.long 0x0 "DFLLDIFF,DFLL48M Diff" hexmask.long.word 0x0 0.--15. 1. "DIFF,Multiplication Ratio Difference" group.long 0x3C++0x13 line.long 0x0 "DFLLMUL,DFLL48M Multiplier" hexmask.long.byte 0x0 16.--22. 1. "STEP,Tune Maximum Step" hexmask.long.word 0x0 0.--15. 1. "MUL,DFLL Multiply Factor" line.long 0x4 "PLL0CTRL,PLL Control" bitfld.long 0x4 11.--13. "BWSEL,Bandwidth selection" "0: TBD,1: TBD,2: TBD,3: TBD,4: TBD,5: TBD,6: TBD,7: TBD" bitfld.long 0x4 8.--10. "REFSEL,Reference selection" "0: Dedicated GCLK clock reference,1: XOSC clock reference,2: DFLL48M clock reference,?,?,?,?,?" bitfld.long 0x4 7. "ONDEMAND,On Demand Control" "0,1" newline bitfld.long 0x4 2. "WRTLOCK,Write Lock" "0,1" bitfld.long 0x4 1. "ENABLE,PLL Enable" "0,1" line.long 0x8 "PLL0FBDIV,PLL Feed-Back Divider" hexmask.long.word 0x8 0.--9. 1. "FBDIV,PLL Feed-Back Divider Factor" line.long 0xC "PLL0REFDIV,PLL reference divider" hexmask.long.byte 0xC 0.--5. 1. "REFDIV,PLL reference division factor" line.long 0x10 "PLL0POSTDIVA,PLL output clock divider A" bitfld.long 0x10 31. "OUTEN3,PLL output 0 enable" "0,1" hexmask.long.byte 0x10 24.--29. 1. "POSTDIV3,PLL output 0 clock division factor" bitfld.long 0x10 23. "OUTEN2,PLL output 0 enable" "0,1" newline hexmask.long.byte 0x10 16.--21. 1. "POSTDIV2,PLL output 0 clock division factor" bitfld.long 0x10 15. "OUTEN1,PLL output 0 enable" "0,1" hexmask.long.byte 0x10 8.--13. 1. "POSTDIV1,PLL output 0 clock division factor" newline bitfld.long 0x10 7. "OUTEN0,PLL output 0 enable" "0,1" hexmask.long.byte 0x10 0.--5. 1. "POSTDIV0,PLL output 0 clock division factor" group.long 0x54++0xF line.long 0x0 "PLL1CTRL,PLL Control" bitfld.long 0x0 11.--13. "BWSEL,Bandwidth selection" "0: TBD,1: TBD,2: TBD,3: TBD,4: TBD,5: TBD,6: TBD,7: TBD" bitfld.long 0x0 8.--10. "REFSEL,Reference selection" "0: Dedicated GCLK clock reference,1: XOSC clock reference,2: DFLL48M clock reference,?,?,?,?,?" bitfld.long 0x0 7. "ONDEMAND,On Demand Control" "0,1" newline bitfld.long 0x0 2. "WRTLOCK,Write Lock" "0,1" bitfld.long 0x0 1. "ENABLE,PLL Enable" "0,1" line.long 0x4 "PLL1FBDIV,PLL Feed-Back Divider" hexmask.long.word 0x4 0.--9. 1. "FBDIV,PLL Feed-Back Divider Factor" line.long 0x8 "PLL1REFDIV,PLL reference divider" hexmask.long.byte 0x8 0.--5. 1. "REFDIV,PLL reference division factor" line.long 0xC "PLL1POSTDIVA,PLL output clock divider A" bitfld.long 0xC 31. "OUTEN3,PLL output 0 enable" "0,1" hexmask.long.byte 0xC 24.--29. 1. "POSTDIV3,PLL output 0 clock division factor" bitfld.long 0xC 23. "OUTEN2,PLL output 0 enable" "0,1" newline hexmask.long.byte 0xC 16.--21. 1. "POSTDIV2,PLL output 0 clock division factor" bitfld.long 0xC 15. "OUTEN1,PLL output 0 enable" "0,1" hexmask.long.byte 0xC 8.--13. 1. "POSTDIV1,PLL output 0 clock division factor" newline bitfld.long 0xC 7. "OUTEN0,PLL output 0 enable" "0,1" hexmask.long.byte 0xC 0.--5. 1. "POSTDIV0,PLL output 0 clock division factor" group.long 0x6C++0x3 line.long 0x0 "FRACDIV0,Fractional Divider" hexmask.long.word 0x0 16.--30. 1. "INTDIV,Frequency division factor integer part" hexmask.long.word 0x0 7.--15. 1. "REMDIV,Frequency division factor reminder part" group.long 0x74++0x3 line.long 0x0 "FRACDIV1,Fractional Divider" hexmask.long.word 0x0 16.--30. 1. "INTDIV,Frequency division factor integer part" hexmask.long.word 0x0 7.--15. 1. "REMDIV,Frequency division factor reminder part" rgroup.long 0x78++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 7. "FRACDIV1,FRACDIV1 Synchronization Busy" "0,1" bitfld.long 0x0 6. "FRACDIV0,FRACDIV0 Synchronization Busy" "0,1" bitfld.long 0x0 5. "DFLLMUL,DFLLMUL Synchronization Busy" "0,1" newline bitfld.long 0x0 4. "DFLLDIFF,DFLLDIFF Synchronization Busy" "0,1" bitfld.long 0x0 3. "DFLLTUNE,DFLLTUNE Synchronization Busy" "0,1" bitfld.long 0x0 2. "DFLLCTRLB,DFLLCTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "DFLLENABLE,DFLL48M ENABLE Synchronization Busy" "0,1" group.long 0x80++0x3 line.long 0x0 "XOSCCAL,XOSC Calibration Register" hexmask.long.word 0x0 0.--15. 1. "CAL,XOSC Calibration" group.long 0x80++0x3 line.long 0x0 "XOSCCAL_FUSES_OSC_XTAL_HF_AGC_V2_MODE,XOSC Calibration Register" hexmask.long.byte 0x0 10.--15. 1. "SPARES,Spare bits" bitfld.long 0x0 9. "REDOSC,reduce oscillation debug counter" "0,1" bitfld.long 0x0 8. "REDGAIN,reduce gain control timer" "0,1" newline bitfld.long 0x0 7. "FLIPPOL,flip output clock polarity" "0,1" bitfld.long 0x0 6. "CMSEL,clock buffer common mode selection" "0,1" bitfld.long 0x0 5. "HYST,loop hysteresis control" "0,1" newline bitfld.long 0x0 3.--4. "ENVAMP,envelope amplitude at osci" "0,1,2,3" bitfld.long 0x0 2. "KICKEREN,Kicker enable" "0,1" bitfld.long 0x0 0.--1. "FTRANS,Fine Transconductance programmability for Oscillator" "0,1,2,3" group.long 0x88++0x3 line.long 0x0 "RC48MCAL0,RC48M Calibration 0" hexmask.long 0x0 0.--31. 1. "CAL,RC48M Calibration" group.long 0x88++0x3 line.long 0x0 "RC48MCAL0_FUSES_OSC_RC48MHZ_V1_MODE,RC48M Calibration 0" bitfld.long 0x0 20.--22. "cmp_pwr_ctrl,Comparator power control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 19. "cmp_8m_lp,Comparator 8MHz low-power" "0,1" bitfld.long 0x0 18. "ldo_vout_boost,LDO VOUT boost" "0,1" newline bitfld.long 0x0 17. "out_buf_sel,Output buffer select" "0,1" bitfld.long 0x0 16. "iosc_boost,IOSC boost" "0,1" hexmask.long.byte 0x0 6.--13. 1. "proc_trim_mv,Proc trim value" newline hexmask.long.byte 0x0 0.--5. 1. "temp_trim_mv,Temp trim value" tree.end tree "PAC (Peripheral Access Controller)" base ad:0x44810000 group.long 0x0++0x3 line.long 0x0 "WRCTRL,Write control" hexmask.long.byte 0x0 16.--23. 1. "KEY,Peripheral access control key" hexmask.long.word 0x0 0.--15. 1. "PERID,Peripheral identifier" group.byte 0x4++0x0 line.byte 0x0 "EVCTRL,Event control" bitfld.byte 0x0 0. "ERREO,Peripheral acess error event output" "0,1" group.byte 0x8++0x1 line.byte 0x0 "INTENCLR,Interrupt enable clear" bitfld.byte 0x0 0. "ERR,Peripheral access error interrupt disable" "0,1" line.byte 0x1 "INTENSET,Interrupt enable set" bitfld.byte 0x1 0. "ERR,Peripheral access error interrupt enable" "0,1" group.long 0x10++0xF line.long 0x0 "INTFLAGAHB,Bridge interrupt flag status" line.long 0x4 "INTFLAGA,Peripheral interrupt flag status - Bridge A" bitfld.long 0x4 31. "SERCOM8_,SERCOM8" "0,1" bitfld.long 0x4 30. "SERCOM7_,SERCOM7" "0,1" bitfld.long 0x4 29. "SERCOM6_,SERCOM6" "0,1" bitfld.long 0x4 28. "SERCOM5_,SERCOM5" "0,1" bitfld.long 0x4 27. "SERCOM4_,SERCOM4" "0,1" bitfld.long 0x4 26. "SERCOM3_,SERCOM3" "0,1" bitfld.long 0x4 25. "SERCOM2_,SERCOM2" "0,1" bitfld.long 0x4 24. "SERCOM1_,SERCOM1" "0,1" newline bitfld.long 0x4 23. "SERCOM0_,SERCOM0" "0,1" bitfld.long 0x4 22. "EVSYS_,EVSYS" "0,1" bitfld.long 0x4 21. "PRM_,PRM" "0,1" bitfld.long 0x4 19. "DMA_,DMA" "0,1" bitfld.long 0x4 18. "PORT_,PORT" "0,1" bitfld.long 0x4 17. "TRAM_,TRAM" "0,1" bitfld.long 0x4 16. "MCRAMC_,MCRAMC" "0,1" bitfld.long 0x4 15. "DRMTCM_,DRMTCM" "0,1" newline bitfld.long 0x4 14. "PAC_,PAC" "0,1" bitfld.long 0x4 13. "EIC_,EIC" "0,1" bitfld.long 0x4 12. "RTC_,RTC" "0,1" bitfld.long 0x4 11. "WDT_,WDT" "0,1" bitfld.long 0x4 10. "FREQM_,FREQM" "0,1" bitfld.long 0x4 9. "MCLK_,MCLK" "0,1" bitfld.long 0x4 8. "GCLK_,GCLK" "0,1" bitfld.long 0x4 7. "OSC32KCTRL_,OSC32KCTRL" "0,1" newline bitfld.long 0x4 6. "OSCCTRL_,OSCCTRL" "0,1" bitfld.long 0x4 5. "RSTC_,RSTC" "0,1" bitfld.long 0x4 4. "SUPC_,SUPC" "0,1" bitfld.long 0x4 3. "PM_,PM" "0,1" bitfld.long 0x4 2. "FCR_,FCR" "0,1" bitfld.long 0x4 1. "FCW_,FCW" "0,1" bitfld.long 0x4 0. "DSU_,DSU" "0,1" line.long 0x8 "INTFLAGB,Peripheral interrupt flag status - Bridge B" bitfld.long 0x8 29. "SDMMC1_,SDMMC1" "0,1" bitfld.long 0x8 28. "SDMMC0_,SDMMC0" "0,1" bitfld.long 0x8 27. "TRNG_,TRNG" "0,1" bitfld.long 0x8 24. "ETH_,ETH" "0,1" bitfld.long 0x8 21. "CAN5_,CAN5" "0,1" bitfld.long 0x8 20. "CAN4_,CAN4" "0,1" bitfld.long 0x8 19. "CAN3_,CAN3" "0,1" bitfld.long 0x8 18. "CAN2_,CAN2" "0,1" newline bitfld.long 0x8 17. "CAN1_,CAN1" "0,1" bitfld.long 0x8 16. "CAN0_,CAN0" "0,1" bitfld.long 0x8 15. "SPI_IXS1_,SPI_IXS1" "0,1" bitfld.long 0x8 14. "SPI_IXS0_,SPI_IXS0" "0,1" bitfld.long 0x8 13. "PTC_,PTC" "0,1" bitfld.long 0x8 12. "AC_,AC" "0,1" bitfld.long 0x8 11. "ADC_,ADC" "0,1" bitfld.long 0x8 10. "TCC9_,TCC9" "0,1" newline bitfld.long 0x8 9. "TCC8_,TCC8" "0,1" bitfld.long 0x8 8. "TCC7_,TCC7" "0,1" bitfld.long 0x8 7. "TCC6_,TCC6" "0,1" bitfld.long 0x8 6. "TCC5_,TCC5" "0,1" bitfld.long 0x8 5. "TCC4_,TCC4" "0,1" bitfld.long 0x8 4. "TCC3_,TCC3" "0,1" bitfld.long 0x8 3. "TCC2_,TCC2" "0,1" bitfld.long 0x8 2. "TCC1_,TCC1" "0,1" newline bitfld.long 0x8 1. "TCC0_,TCC0" "0,1" bitfld.long 0x8 0. "SERCOM9_,SERCOM9" "0,1" line.long 0xC "INTFLAGC,Peripheral interrupt flag status - Bridge C" bitfld.long 0xC 2. "MLB_,MLB" "0,1" rgroup.long 0x34++0xB line.long 0x0 "STATUSA,Peripheral write protection status - Bridge A" bitfld.long 0x0 31. "SERCOM8_,SERCOM8 APB Protect Enable" "0,1" bitfld.long 0x0 30. "SERCOM7_,SERCOM7 APB Protect Enable" "0,1" bitfld.long 0x0 29. "SERCOM6_,SERCOM6 APB Protect Enable" "0,1" bitfld.long 0x0 28. "SERCOM5_,SERCOM5 APB Protect Enable" "0,1" bitfld.long 0x0 27. "SERCOM4_,SERCOM4 APB Protect Enable" "0,1" bitfld.long 0x0 26. "SERCOM3_,SERCOM3 APB Protect Enable" "0,1" bitfld.long 0x0 25. "SERCOM2_,SERCOM2 APB Protect Enable" "0,1" bitfld.long 0x0 24. "SERCOM1_,SERCOM1 APB Protect Enable" "0,1" newline bitfld.long 0x0 23. "SERCOM0_,SERCOM0 APB Protect Enable" "0,1" bitfld.long 0x0 22. "EVSYS_,EVSYS APB Protect Enable" "0,1" bitfld.long 0x0 21. "PRM_,PRM APB Protect Enable" "0,1" bitfld.long 0x0 19. "DMA_,DMA APB Protect Enable" "0,1" bitfld.long 0x0 18. "PORT_,PORT APB Protect Enable" "0,1" bitfld.long 0x0 17. "TRAM_,TRAM APB Protect Enable" "0,1" bitfld.long 0x0 16. "MCRAMC_,MCRAMC APB Protect Enable" "0,1" bitfld.long 0x0 15. "DRMTCM_,DRMTCM APB Protect Enable" "0,1" newline bitfld.long 0x0 14. "PAC_,PAC APB Protect Enable" "0,1" bitfld.long 0x0 13. "EIC_,EIC APB Protect Enable" "0,1" bitfld.long 0x0 12. "RTC_,RTC APB Protect Enable" "0,1" bitfld.long 0x0 11. "WDT_,WDT APB Protect Enable" "0,1" bitfld.long 0x0 10. "FREQM_,FREQM APB Protect Enable" "0,1" bitfld.long 0x0 9. "MCLK_,MCLK APB Protect Enable" "0,1" bitfld.long 0x0 8. "GCLK_,GCLK APB Protect Enable" "0,1" bitfld.long 0x0 7. "OSC32KCTRL_,OSC32KCTRL APB Protect Enable" "0,1" newline bitfld.long 0x0 6. "OSCCTRL_,OSCCTRL APB Protect Enable" "0,1" bitfld.long 0x0 5. "RSTC_,RSTC APB Protect Enable" "0,1" bitfld.long 0x0 4. "SUPC_,SUPC APB Protect Enable" "0,1" bitfld.long 0x0 3. "PM_,PM APB Protect Enable" "0,1" bitfld.long 0x0 2. "FCR_,FCR APB Protect Enable" "0,1" bitfld.long 0x0 1. "FCW_,FCW APB Protect Enable" "0,1" bitfld.long 0x0 0. "DSU_,DSU APB Protect Enable" "0,1" line.long 0x4 "STATUSB,Peripheral write protection status - Bridge B" bitfld.long 0x4 29. "SDMMC1_,SDMMC1 APB Protect Enable" "0,1" bitfld.long 0x4 28. "SDMMC0_,SDMMC0 APB Protect Enable" "0,1" bitfld.long 0x4 27. "TRNG_,TRNG APB Protect Enable" "0,1" bitfld.long 0x4 26. "SQI1_,SQI1 APB Protect Enable" "0,1" bitfld.long 0x4 25. "SQI0_,SQI0 APB Protect Enable" "0,1" bitfld.long 0x4 24. "ETH_,ETH APB Protect Enable" "0,1" bitfld.long 0x4 21. "CAN5_,CAN5 APB Protect Enable" "0,1" bitfld.long 0x4 20. "CAN4_,CAN4 APB Protect Enable" "0,1" newline bitfld.long 0x4 19. "CAN3_,CAN3 APB Protect Enable" "0,1" bitfld.long 0x4 18. "CAN2_,CAN2 APB Protect Enable" "0,1" bitfld.long 0x4 17. "CAN1_,CAN1 APB Protect Enable" "0,1" bitfld.long 0x4 16. "CAN0_,CAN0 APB Protect Enable" "0,1" bitfld.long 0x4 15. "SPI_IXS1_,SPI_IXS1 APB Protect Enable" "0,1" bitfld.long 0x4 14. "SPI_IXS0_,SPI_IXS0 APB Protect Enable" "0,1" bitfld.long 0x4 13. "PTC_,PTC APB Protect Enable" "0,1" bitfld.long 0x4 12. "AC_,AC APB Protect Enable" "0,1" newline bitfld.long 0x4 11. "ADC_,ADC APB Protect Enable" "0,1" bitfld.long 0x4 10. "TCC9_,TCC9 APB Protect Enable" "0,1" bitfld.long 0x4 9. "TCC8_,TCC8 APB Protect Enable" "0,1" bitfld.long 0x4 8. "TCC7_,TCC7 APB Protect Enable" "0,1" bitfld.long 0x4 7. "TCC6_,TCC6 APB Protect Enable" "0,1" bitfld.long 0x4 6. "TCC5_,TCC5 APB Protect Enable" "0,1" bitfld.long 0x4 5. "TCC4_,TCC4 APB Protect Enable" "0,1" bitfld.long 0x4 4. "TCC3_,TCC3 APB Protect Enable" "0,1" newline bitfld.long 0x4 3. "TCC2_,TCC2 APB Protect Enable" "0,1" bitfld.long 0x4 2. "TCC1_,TCC1 APB Protect Enable" "0,1" bitfld.long 0x4 1. "TCC0_,TCC0 APB Protect Enable" "0,1" bitfld.long 0x4 0. "SERCOM9_,SERCOM9 APB Protect Enable" "0,1" line.long 0x8 "STATUSC,Peripheral write protection status - Bridge C" bitfld.long 0x8 2. "MLB_,MLB APB Protect Enable" "0,1" tree.end tree "PM (Power Manager)" base ad:0x44010000 group.byte 0x0++0x1 line.byte 0x0 "CTRLA,Control A" bitfld.byte 0x0 2. "IORET,I/O Retention" "0: When the device exits the HIBERNATE or BACKUP..,1: When the device exits the HIBERNATE or BACKUP.." line.byte 0x1 "SLEEPCFG,Sleep Configuration" bitfld.byte 0x1 0.--2. "SLEEPMODE,Sleep Mode" "?,?,2: CPU AHB and APB clocks are OFF,?,4: All Clocks are OFF,5: Backup domain is ON as well as some PDRAMs,6: Only Backup domain is powered ON,7: All power domains are powered OFF" group.byte 0x4++0x2 line.byte 0x0 "INTENCLR,Interrupt Enable Clear" bitfld.byte 0x0 0. "SLEEPRDY,Backup Sleep Mode Entry Ready Enable" "0,1" line.byte 0x1 "INTENSET,Interrupt Enable Set" bitfld.byte 0x1 0. "SLEEPRDY,Backup Sleep Mode Entry Ready Enable" "0,1" line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear" bitfld.byte 0x2 0. "SLEEPRDY,Backup Sleep Mode Entry Ready" "0,1" group.byte 0x8++0x1 line.byte 0x0 "STDBYCFG,Standby Configuration" bitfld.byte 0x0 2. "LPRAM,Low Power RAM Enable" "0,1" bitfld.byte 0x0 0. "RAMCFG,Ram Configuration" "0: All the RAMs are retained,1: Only the first 32K bytes are retained" line.byte 0x1 "HIBCFG,Hibernate Configuration" bitfld.byte 0x1 2. "LPRAM,Low Power RAM Enable" "0,1" bitfld.byte 0x1 0. "RAMCFG,Ram Configuration" "0: All the RAMs are retained,1: Only the first 32K bytes are retained" tree.end tree "PORT" base ad:0x44840000 repeat 7. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6)(list ad:0x44840000 ad:0x44840080 ad:0x44840100 ad:0x44840180 ad:0x44840200 ad:0x44840280 ad:0x44840300) tree "GROUP[$1]" base $2 group.long ($2)++0x1F line.long 0x0 "DIR,Data Direction" hexmask.long 0x0 0.--31. 1. "DIR,Port Data Direction" line.long 0x4 "DIRCLR,Data Direction Clear" hexmask.long 0x4 0.--31. 1. "DIRCLR,Port Data Direction Clear" line.long 0x8 "DIRSET,Data Direction Set" hexmask.long 0x8 0.--31. 1. "DIRSET,Port Data Direction Set" line.long 0xC "DIRTGL,Data Direction Toggle" hexmask.long 0xC 0.--31. 1. "DIRTGL,Port Data Direction Toggle" line.long 0x10 "OUT,Data Output Value" hexmask.long 0x10 0.--31. 1. "OUT,PORT Data Output Value" line.long 0x14 "OUTCLR,Data Output Value Clear" hexmask.long 0x14 0.--31. 1. "OUTCLR,PORT Data Output Value Clear" line.long 0x18 "OUTSET,Data Output Value Set" hexmask.long 0x18 0.--31. 1. "OUTSET,PORT Data Output Value Set" line.long 0x1C "OUTTGL,Data Output Value Toggle" hexmask.long 0x1C 0.--31. 1. "OUTTGL,PORT Data Output Value Toggle" rgroup.long ($2+0x20)++0x3 line.long 0x0 "IN,Data Input Value" hexmask.long 0x0 0.--31. 1. "IN,PORT Data Input Value" group.long ($2+0x24)++0x3 line.long 0x0 "CTRL,Control" hexmask.long 0x0 0.--31. 1. "SAMPLING,Input Sampling Mode" wgroup.long ($2+0x28)++0x3 line.long 0x0 "WRCONFIG,Write Configuration" bitfld.long 0x0 31. "HWSEL,Half-Word Select" "0,1" bitfld.long 0x0 30. "WRPINCFG,Write PINCFG" "0,1" bitfld.long 0x0 28. "WRPMUX,Write PMUX" "0,1" newline hexmask.long.byte 0x0 24.--27. 1. "PMUX,Peripheral Multiplexing" bitfld.long 0x0 20.--21. "SLEWLIM,Output Driver Slew Rate Selection" "0,1,2,3" bitfld.long 0x0 19. "ODRAIN,Open Drain Output" "0,1" newline bitfld.long 0x0 18. "PULLEN,Pull Enable" "0,1" bitfld.long 0x0 17. "INEN,Input Enable" "0,1" bitfld.long 0x0 16. "PMUXEN,Peripheral Multiplexer Enable" "0,1" newline hexmask.long.word 0x0 0.--15. 1. "PINMASK,Pin Mask for Multiple Pin Configuration" group.long ($2+0x2C)++0x3 line.long 0x0 "EVCTRL,Event Input Control" bitfld.long 0x0 31. "PORTEI3,PORT Event Input Enable 3" "0,1" bitfld.long 0x0 29.--30. "EVACT3,PORT Event Action 3" "0,1,2,3" hexmask.long.byte 0x0 24.--28. 1. "PID3,PORT Event Pin Identifier 3" newline bitfld.long 0x0 23. "PORTEI2,PORT Event Input Enable 2" "0,1" bitfld.long 0x0 21.--22. "EVACT2,PORT Event Action 2" "0,1,2,3" hexmask.long.byte 0x0 16.--20. 1. "PID2,PORT Event Pin Identifier 2" newline bitfld.long 0x0 15. "PORTEI1,PORT Event Input Enable 1" "0,1" bitfld.long 0x0 13.--14. "EVACT1,PORT Event Action 1" "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "PID1,PORT Event Pin Identifier 1" newline bitfld.long 0x0 7. "PORTEI0,PORT Event Input Enable 0" "0,1" bitfld.long 0x0 5.--6. "EVACT0,PORT Event Action 0" "0: Event output to pin,1: Set output register of pin on event,2: Clear output register of pin on event,3: Toggle output register of pin on event" hexmask.long.byte 0x0 0.--4. 1. "PID0,PORT Event Pin Identifier 0" repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x30)++0x0 line.byte 0x0 "PMUX[$1],Peripheral Multiplexing" hexmask.byte 0x0 4.--7. 1. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" hexmask.byte 0x0 0.--3. 1. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x40)++0x0 line.byte 0x0 "PINCFG[$1],Pin Configuration" bitfld.byte 0x0 4.--5. "SLEWLIM,Output Driver Slew Rate Selection" "0: Slew rate control disabled (fast rise/fall time..,1: Slew rate control enabled (4x slower),2: Slew rate control enabled (8x slower),3: Slew rate control enabled (12x slower)" bitfld.byte 0x0 3. "ODRAIN,Open Drain Output" "0,1" bitfld.byte 0x0 2. "PULLEN,Pull Enable" "0,1" newline bitfld.byte 0x0 1. "INEN,Input Enable" "0,1" bitfld.byte 0x0 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1" repeat.end tree.end repeat.end tree.end tree "PORT_AHB" base ad:0x40000000 repeat 7. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6)(list ad:0x40000000 ad:0x40000080 ad:0x40000100 ad:0x40000180 ad:0x40000200 ad:0x40000280 ad:0x40000300) tree "GROUP[$1]" base $2 group.long ($2)++0x1F line.long 0x0 "DIR,Data Direction" hexmask.long 0x0 0.--31. 1. "DIR,Port Data Direction" line.long 0x4 "DIRCLR,Data Direction Clear" hexmask.long 0x4 0.--31. 1. "DIRCLR,Port Data Direction Clear" line.long 0x8 "DIRSET,Data Direction Set" hexmask.long 0x8 0.--31. 1. "DIRSET,Port Data Direction Set" line.long 0xC "DIRTGL,Data Direction Toggle" hexmask.long 0xC 0.--31. 1. "DIRTGL,Port Data Direction Toggle" line.long 0x10 "OUT,Data Output Value" hexmask.long 0x10 0.--31. 1. "OUT,PORT Data Output Value" line.long 0x14 "OUTCLR,Data Output Value Clear" hexmask.long 0x14 0.--31. 1. "OUTCLR,PORT Data Output Value Clear" line.long 0x18 "OUTSET,Data Output Value Set" hexmask.long 0x18 0.--31. 1. "OUTSET,PORT Data Output Value Set" line.long 0x1C "OUTTGL,Data Output Value Toggle" hexmask.long 0x1C 0.--31. 1. "OUTTGL,PORT Data Output Value Toggle" rgroup.long ($2+0x20)++0x3 line.long 0x0 "IN,Data Input Value" hexmask.long 0x0 0.--31. 1. "IN,PORT Data Input Value" group.long ($2+0x24)++0x3 line.long 0x0 "CTRL,Control" hexmask.long 0x0 0.--31. 1. "SAMPLING,Input Sampling Mode" wgroup.long ($2+0x28)++0x3 line.long 0x0 "WRCONFIG,Write Configuration" bitfld.long 0x0 31. "HWSEL,Half-Word Select" "0,1" bitfld.long 0x0 30. "WRPINCFG,Write PINCFG" "0,1" bitfld.long 0x0 28. "WRPMUX,Write PMUX" "0,1" newline hexmask.long.byte 0x0 24.--27. 1. "PMUX,Peripheral Multiplexing" bitfld.long 0x0 20.--21. "SLEWLIM,Output Driver Slew Rate Selection" "0,1,2,3" bitfld.long 0x0 19. "ODRAIN,Open Drain Output" "0,1" newline bitfld.long 0x0 18. "PULLEN,Pull Enable" "0,1" bitfld.long 0x0 17. "INEN,Input Enable" "0,1" bitfld.long 0x0 16. "PMUXEN,Peripheral Multiplexer Enable" "0,1" newline hexmask.long.word 0x0 0.--15. 1. "PINMASK,Pin Mask for Multiple Pin Configuration" group.long ($2+0x2C)++0x3 line.long 0x0 "EVCTRL,Event Input Control" bitfld.long 0x0 31. "PORTEI3,PORT Event Input Enable 3" "0,1" bitfld.long 0x0 29.--30. "EVACT3,PORT Event Action 3" "0,1,2,3" hexmask.long.byte 0x0 24.--28. 1. "PID3,PORT Event Pin Identifier 3" newline bitfld.long 0x0 23. "PORTEI2,PORT Event Input Enable 2" "0,1" bitfld.long 0x0 21.--22. "EVACT2,PORT Event Action 2" "0,1,2,3" hexmask.long.byte 0x0 16.--20. 1. "PID2,PORT Event Pin Identifier 2" newline bitfld.long 0x0 15. "PORTEI1,PORT Event Input Enable 1" "0,1" bitfld.long 0x0 13.--14. "EVACT1,PORT Event Action 1" "0,1,2,3" hexmask.long.byte 0x0 8.--12. 1. "PID1,PORT Event Pin Identifier 1" newline bitfld.long 0x0 7. "PORTEI0,PORT Event Input Enable 0" "0,1" bitfld.long 0x0 5.--6. "EVACT0,PORT Event Action 0" "0: Event output to pin,1: Set output register of pin on event,2: Clear output register of pin on event,3: Toggle output register of pin on event" hexmask.long.byte 0x0 0.--4. 1. "PID0,PORT Event Pin Identifier 0" repeat 16. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x30)++0x0 line.byte 0x0 "PMUX[$1],Peripheral Multiplexing" hexmask.byte 0x0 4.--7. 1. "PMUXO,Peripheral Multiplexing for Odd-Numbered Pin" hexmask.byte 0x0 0.--3. 1. "PMUXE,Peripheral Multiplexing for Even-Numbered Pin" repeat.end repeat 32. (increment 0x0 0x1)(increment 0x0 0x1) group.byte ($2+0x40)++0x0 line.byte 0x0 "PINCFG[$1],Pin Configuration" bitfld.byte 0x0 4.--5. "SLEWLIM,Output Driver Slew Rate Selection" "0: Slew rate control disabled (fast rise/fall time..,1: Slew rate control enabled (4x slower),2: Slew rate control enabled (8x slower),3: Slew rate control enabled (12x slower)" bitfld.byte 0x0 3. "ODRAIN,Open Drain Output" "0,1" bitfld.byte 0x0 2. "PULLEN,Pull Enable" "0,1" newline bitfld.byte 0x0 1. "INEN,Input Enable" "0,1" bitfld.byte 0x0 0. "PMUXEN,Peripheral Multiplexer Enable" "0,1" repeat.end tree.end repeat.end tree.end tree "PRM (Power Reduction Mode)" base ad:0x44080000 group.long 0x0++0x3 line.long 0x0 "CTRLA,CONTROL A REGISTER" bitfld.long 0x0 8.--10. "PRMWS,ROM ACCESS TIME WAIT STATE" "0,1,2,3,4,5,6,7" bitfld.long 0x0 1. "ENABLE,ENABLE BIT" "0,1" bitfld.long 0x0 0. "SWRST,SOFTWARE RESET BIT" "0,1" tree.end tree "RSTC (Reset Controller)" base ad:0x44030000 rgroup.word 0x0++0x1 line.word 0x0 "RCAUSE,Reset Cause" bitfld.word 0x0 9. "LOCKUP,Lockup Reset" "0,1" bitfld.word 0x0 8. "BACKUP,Backup Reset" "0,1" bitfld.word 0x0 7. "SYST,System Reset Request" "0,1" bitfld.word 0x0 6. "WDT,Watchdog Reset" "0,1" bitfld.word 0x0 5. "EXT,External Reset" "0,1" bitfld.word 0x0 4. "BORVDDIO,Brown Out VDDIO Detector Reset" "0,1" bitfld.word 0x0 3. "BORVDDA,Brown Out VDDA Detector Reset" "0,1" bitfld.word 0x0 2. "BORVDDREG,Brown Out VDDREG Detector Reset" "0,1" bitfld.word 0x0 1. "PORCORE,Brown Out CORE Detector Reset" "0,1" bitfld.word 0x0 0. "POR,Power On Reset" "0,1" rgroup.byte 0x2++0x0 line.byte 0x0 "BKUPEXIT,Backup Exit Source. Implemented only if RSTC_BACKUP_IMPLEMENTED=1" bitfld.byte 0x0 7. "HIB0,Hibernate" "0,1" bitfld.byte 0x0 1. "RTC,Real Timer Counter Interrupt" "0,1" group.long 0x4++0x3 line.long 0x0 "DBGCTRL,Debug Control" bitfld.long 0x0 0. "LCKUPDIS,Lockup Disable" "0,1" tree.end tree "RTC (Real-Time Counter)" base ad:0x44072000 tree "MODE0" group.word 0x0++0x3 line.word 0x0 "CTRLA,MODE0 Control A" bitfld.word 0x0 15. "COUNTSYNC,Count Read Synchronization Enable" "0,1" bitfld.word 0x0 14. "GPTRST,GP Registers Reset On Tamper Enable" "0,1" newline hexmask.word.byte 0x0 8.--11. 1. "PRESCALER,Prescaler" bitfld.word 0x0 7. "MATCHCLR,Clear on Match" "0,1" newline bitfld.word 0x0 2.--3. "MODE,Operating Mode" "0: Mode 0: 32-bit Counter,1: Mode 1: 16-bit Counter,2: Mode 2: Clock/Calendar,?" bitfld.word 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.word 0x0 0. "SWRST,Software Reset" "0,1" line.word 0x2 "CTRLB,MODE0 Control B" bitfld.word 0x2 15. "SEPTO,Separate Tamper Outputs" "0,1" bitfld.word 0x2 12.--14. "ACTF,Active Layer Frequency" "0: CLK_RTC_OUT = CLK_RTC/2,1: CLK_RTC_OUT = CLK_RTC/4,2: CLK_RTC_OUT = CLK_RTC/8,3: CLK_RTC_OUT = CLK_RTC/16,4: CLK_RTC_OUT = CLK_RTC/32,5: CLK_RTC_OUT = CLK_RTC/64,6: CLK_RTC_OUT = CLK_RTC/128,7: CLK_RTC_OUT = CLK_RTC/256" newline bitfld.word 0x2 8.--10. "DEBF,Debounce Frequency" "0: CLK_RTC_DEB = CLK_RTC/2,1: CLK_RTC_DEB = CLK_RTC/4,2: CLK_RTC_DEB = CLK_RTC/8,3: CLK_RTC_DEB = CLK_RTC/16,4: CLK_RTC_DEB = CLK_RTC/32,5: CLK_RTC_DEB = CLK_RTC/64,6: CLK_RTC_DEB = CLK_RTC/128,7: CLK_RTC_DEB = CLK_RTC/256" bitfld.word 0x2 7. "DMAEN,DMA Enable" "0,1" newline bitfld.word 0x2 6. "RTCOUT,RTC Output Enable" "0,1" bitfld.word 0x2 5. "DEBASYNC,Debouncer Asynchronous Enable" "0,1" newline bitfld.word 0x2 4. "DEBMAJ,Debouncer Majority Enable" "0,1" bitfld.word 0x2 1. "GP2EN,General Purpose 2 Enable" "0,1" newline bitfld.word 0x2 0. "GP0EN,General Purpose 0 Enable" "0,1" group.long 0x4++0x3 line.long 0x0 "EVCTRL,MODE0 Event Control" bitfld.long 0x0 24. "PERDEO,Periodic Interval Daily Event Output Enable" "0,1" bitfld.long 0x0 16. "TAMPEVEI,Tamper Event Input Enable" "0,1" newline bitfld.long 0x0 15. "OVFEO,Overflow Event Output Enable" "0,1" bitfld.long 0x0 14. "TAMPEREO,Tamper Event Output Enable" "0,1" newline bitfld.long 0x0 9. "CMPEO1,Compare 1 Event Output Enable" "0,1" bitfld.long 0x0 8. "CMPEO0,Compare 0 Event Output Enable" "0,1" newline bitfld.long 0x0 7. "PEREO7,Periodic Interval 7 Event Output Enable" "0,1" bitfld.long 0x0 6. "PEREO6,Periodic Interval 6 Event Output Enable" "0,1" newline bitfld.long 0x0 5. "PEREO5,Periodic Interval 5 Event Output Enable" "0,1" bitfld.long 0x0 4. "PEREO4,Periodic Interval 4 Event Output Enable" "0,1" newline bitfld.long 0x0 3. "PEREO3,Periodic Interval 3 Event Output Enable" "0,1" bitfld.long 0x0 2. "PEREO2,Periodic Interval 2 Event Output Enable" "0,1" newline bitfld.long 0x0 1. "PEREO1,Periodic Interval 1 Event Output Enable" "0,1" bitfld.long 0x0 0. "PEREO0,Periodic Interval 0 Event Output Enable" "0,1" group.word 0x8++0x5 line.word 0x0 "INTENCLR,MODE0 Interrupt Enable Clear" bitfld.word 0x0 15. "OVF,Overflow Interrupt Enable" "0,1" bitfld.word 0x0 14. "TAMPER,Tamper Enable" "0,1" newline bitfld.word 0x0 9. "CMP1,Compare 1 Interrupt Enable" "0,1" bitfld.word 0x0 8. "CMP0,Compare 0 Interrupt Enable" "0,1" newline bitfld.word 0x0 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1" bitfld.word 0x0 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1" newline bitfld.word 0x0 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1" bitfld.word 0x0 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1" newline bitfld.word 0x0 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1" bitfld.word 0x0 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1" newline bitfld.word 0x0 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1" bitfld.word 0x0 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1" line.word 0x2 "INTENSET,MODE0 Interrupt Enable Set" bitfld.word 0x2 15. "OVF,Overflow Interrupt Enable" "0,1" bitfld.word 0x2 14. "TAMPER,Tamper Enable" "0,1" newline bitfld.word 0x2 9. "CMP1,Compare 1 Interrupt Enable" "0,1" bitfld.word 0x2 8. "CMP0,Compare 0 Interrupt Enable" "0,1" newline bitfld.word 0x2 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1" bitfld.word 0x2 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1" newline bitfld.word 0x2 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1" bitfld.word 0x2 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1" newline bitfld.word 0x2 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1" bitfld.word 0x2 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1" newline bitfld.word 0x2 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1" bitfld.word 0x2 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1" line.word 0x4 "INTFLAG,MODE0 Interrupt Flag Status and Clear" bitfld.word 0x4 15. "OVF,Overflow" "0,1" bitfld.word 0x4 14. "TAMPER,Tamper" "0,1" newline bitfld.word 0x4 9. "CMP1,Compare 1" "0,1" bitfld.word 0x4 8. "CMP0,Compare 0" "0,1" newline bitfld.word 0x4 7. "PER7,Periodic Interval 7" "0,1" bitfld.word 0x4 6. "PER6,Periodic Interval 6" "0,1" newline bitfld.word 0x4 5. "PER5,Periodic Interval 5" "0,1" bitfld.word 0x4 4. "PER4,Periodic Interval 4" "0,1" newline bitfld.word 0x4 3. "PER3,Periodic Interval 3" "0,1" bitfld.word 0x4 2. "PER2,Periodic Interval 2" "0,1" newline bitfld.word 0x4 1. "PER1,Periodic Interval 1" "0,1" bitfld.word 0x4 0. "PER0,Periodic Interval 0" "0,1" group.byte 0xE++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1" rgroup.long 0x10++0x3 line.long 0x0 "SYNCBUSY,MODE0 Synchronization Busy Status" bitfld.long 0x0 19. "GP3,General Purpose 3 Register Busy" "0,1" bitfld.long 0x0 18. "GP2,General Purpose 2 Register Busy" "0,1" newline bitfld.long 0x0 17. "GP1,General Purpose 1 Register Busy" "0,1" bitfld.long 0x0 16. "GP0,General Purpose 0 Register Busy" "0,1" newline bitfld.long 0x0 15. "COUNTSYNC,Count Synchronization Enable Bit Busy" "0,1" bitfld.long 0x0 6. "COMP1,COMP 1 Register Busy" "0,1" newline bitfld.long 0x0 5. "COMP0,COMP 0 Register Busy" "0,1" bitfld.long 0x0 3. "COUNT,COUNT Register Busy" "0,1" newline bitfld.long 0x0 2. "FREQCORR,FREQCORR Register Busy" "0,1" bitfld.long 0x0 1. "ENABLE,Enable Bit Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Busy" "0,1" group.byte 0x14++0x0 line.byte 0x0 "FREQCORR,Frequency Correction" bitfld.byte 0x0 7. "SIGN,Correction Sign" "0,1" hexmask.byte 0x0 0.--6. 1. "VALUE,Correction Value" group.long 0x18++0x3 line.long 0x0 "COUNT,MODE0 Counter Value" hexmask.long 0x0 0.--31. 1. "COUNT,Counter Value" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x20)++0x3 line.long 0x0 "COMP[$1],MODE0 Compare n Value" hexmask.long 0x0 0.--31. 1. "COMP,Compare Value" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x40)++0x3 line.long 0x0 "GP[$1],General Purpose" hexmask.long 0x0 0.--31. 1. "GP,General Purpose" repeat.end group.long 0x60++0x3 line.long 0x0 "TAMPCTRL,Tamper Control" bitfld.long 0x0 31. "DEBNC7,Debouncer Enable 7" "0,1" bitfld.long 0x0 30. "DEBNC6,Debouncer Enable 6" "0,1" newline bitfld.long 0x0 29. "DEBNC5,Debouncer Enable 5" "0,1" bitfld.long 0x0 28. "DEBNC4,Debouncer Enable 4" "0,1" newline bitfld.long 0x0 27. "DEBNC3,Debouncer Enable 3" "0,1" bitfld.long 0x0 26. "DEBNC2,Debouncer Enable 2" "0,1" newline bitfld.long 0x0 25. "DEBNC1,Debouncer Enable 1" "0,1" bitfld.long 0x0 24. "DEBNC0,Debouncer Enable 0" "0,1" newline bitfld.long 0x0 23. "TAMLVL7,Tamper Level Select 7" "0,1" bitfld.long 0x0 22. "TAMLVL6,Tamper Level Select 6" "0,1" newline bitfld.long 0x0 21. "TAMLVL5,Tamper Level Select 5" "0,1" bitfld.long 0x0 20. "TAMLVL4,Tamper Level Select 4" "0,1" newline bitfld.long 0x0 19. "TAMLVL3,Tamper Level Select 3" "0,1" bitfld.long 0x0 18. "TAMLVL2,Tamper Level Select 2" "0,1" newline bitfld.long 0x0 17. "TAMLVL1,Tamper Level Select 1" "0,1" bitfld.long 0x0 16. "TAMLVL0,Tamper Level Select 0" "0,1" newline bitfld.long 0x0 14.--15. "IN7ACT,Tamper Input 7 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN7 to OUT. When a mismatch occurs.." bitfld.long 0x0 12.--13. "IN6ACT,Tamper Input 6 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN6 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 10.--11. "IN5ACT,Tamper Input 5 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN5 to OUT. When a mismatch occurs.." bitfld.long 0x0 8.--9. "IN4ACT,Tamper Input 4 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN4 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 6.--7. "IN3ACT,Tamper Input 3 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN3 to OUT. When a mismatch occurs.." bitfld.long 0x0 4.--5. "IN2ACT,Tamper Input 2 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN2 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 2.--3. "IN1ACT,Tamper Input 1 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN1 to OUT. When a mismatch occurs.." bitfld.long 0x0 0.--1. "IN0ACT,Tamper Input 0 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN0 to OUT. When a mismatch occurs.." rgroup.long 0x64++0x3 line.long 0x0 "TIMESTAMP,MODE0 Timestamp" hexmask.long 0x0 0.--31. 1. "COUNT,Count Timestamp Value" group.long 0x68++0x7 line.long 0x0 "TAMPID,Tamper ID" bitfld.long 0x0 31. "TAMPEVT,Tamper Event Detected" "0,1" bitfld.long 0x0 7. "TAMPID7,Tamper Input 7 Detected" "0,1" newline bitfld.long 0x0 6. "TAMPID6,Tamper Input 6 Detected" "0,1" bitfld.long 0x0 5. "TAMPID5,Tamper Input 5 Detected" "0,1" newline bitfld.long 0x0 4. "TAMPID4,Tamper Input 4 Detected" "0,1" bitfld.long 0x0 3. "TAMPID3,Tamper Input 3 Detected" "0,1" newline bitfld.long 0x0 2. "TAMPID2,Tamper Input 2 Detected" "0,1" bitfld.long 0x0 1. "TAMPID1,Tamper Input 1 Detected" "0,1" newline bitfld.long 0x0 0. "TAMPID0,Tamper Input 0 Detected" "0,1" line.long 0x4 "TAMPCTRLB,Tamper Control B" bitfld.long 0x4 7. "ALSI7,Active Layer Select Internal 7" "0,1" bitfld.long 0x4 6. "ALSI6,Active Layer Select Internal 6" "0,1" newline bitfld.long 0x4 5. "ALSI5,Active Layer Select Internal 5" "0,1" bitfld.long 0x4 4. "ALSI4,Active Layer Select Internal 4" "0,1" newline bitfld.long 0x4 3. "ALSI3,Active Layer Select Internal 3" "0,1" bitfld.long 0x4 2. "ALSI2,Active Layer Select Internal 2" "0,1" newline bitfld.long 0x4 1. "ALSI1,Active Layer Select Internal 1" "0,1" bitfld.long 0x4 0. "ALSI0,Active Layer Select Internal 0" "0,1" tree.end tree "MODE1" group.word 0x0++0x3 line.word 0x0 "CTRLA,MODE1 Control A" bitfld.word 0x0 15. "COUNTSYNC,Count Read Synchronization Enable" "0,1" bitfld.word 0x0 14. "GPTRST,GP Registers Reset On Tamper Enable" "0,1" newline hexmask.word.byte 0x0 8.--11. 1. "PRESCALER,Prescaler" bitfld.word 0x0 2.--3. "MODE,Operating Mode" "0: Mode 0: 32-bit Counter,1: Mode 1: 16-bit Counter,2: Mode 2: Clock/Calendar,?" newline bitfld.word 0x0 1. "ENABLE,Enable" "0,1" bitfld.word 0x0 0. "SWRST,Software Reset" "0,1" line.word 0x2 "CTRLB,MODE1 Control B" bitfld.word 0x2 15. "SEPTO,Separate Tamper Outputs" "0,1" bitfld.word 0x2 12.--14. "ACTF,Active Layer Frequency" "0: CLK_RTC_OUT = CLK_RTC/2,1: CLK_RTC_OUT = CLK_RTC/4,2: CLK_RTC_OUT = CLK_RTC/8,3: CLK_RTC_OUT = CLK_RTC/16,4: CLK_RTC_OUT = CLK_RTC/32,5: CLK_RTC_OUT = CLK_RTC/64,6: CLK_RTC_OUT = CLK_RTC/128,7: CLK_RTC_OUT = CLK_RTC/256" newline bitfld.word 0x2 8.--10. "DEBF,Debounce Frequency" "0: CLK_RTC_DEB = CLK_RTC/2,1: CLK_RTC_DEB = CLK_RTC/4,2: CLK_RTC_DEB = CLK_RTC/8,3: CLK_RTC_DEB = CLK_RTC/16,4: CLK_RTC_DEB = CLK_RTC/32,5: CLK_RTC_DEB = CLK_RTC/64,6: CLK_RTC_DEB = CLK_RTC/128,7: CLK_RTC_DEB = CLK_RTC/256" bitfld.word 0x2 7. "DMAEN,DMA Enable" "0,1" newline bitfld.word 0x2 6. "RTCOUT,RTC Output Enable" "0,1" bitfld.word 0x2 5. "DEBASYNC,Debouncer Asynchronous Enable" "0,1" newline bitfld.word 0x2 4. "DEBMAJ,Debouncer Majority Enable" "0,1" bitfld.word 0x2 1. "GP2EN,General Purpose 2 Enable" "0,1" newline bitfld.word 0x2 0. "GP0EN,General Purpose 0 Enable" "0,1" group.long 0x4++0x3 line.long 0x0 "EVCTRL,MODE1 Event Control" bitfld.long 0x0 24. "PERDEO,Periodic Interval Daily Event Output Enable" "0,1" bitfld.long 0x0 16. "TAMPEVEI,Tamper Event Input Enable" "0,1" newline bitfld.long 0x0 15. "OVFEO,Overflow Event Output Enable" "0,1" bitfld.long 0x0 14. "TAMPEREO,Tamper Event Output Enable" "0,1" newline bitfld.long 0x0 11. "CMPEO3,Compare 3 Event Output Enable" "0,1" bitfld.long 0x0 10. "CMPEO2,Compare 2 Event Output Enable" "0,1" newline bitfld.long 0x0 9. "CMPEO1,Compare 1 Event Output Enable" "0,1" bitfld.long 0x0 8. "CMPEO0,Compare 0 Event Output Enable" "0,1" newline bitfld.long 0x0 7. "PEREO7,Periodic Interval 7 Event Output Enable" "0,1" bitfld.long 0x0 6. "PEREO6,Periodic Interval 6 Event Output Enable" "0,1" newline bitfld.long 0x0 5. "PEREO5,Periodic Interval 5 Event Output Enable" "0,1" bitfld.long 0x0 4. "PEREO4,Periodic Interval 4 Event Output Enable" "0,1" newline bitfld.long 0x0 3. "PEREO3,Periodic Interval 3 Event Output Enable" "0,1" bitfld.long 0x0 2. "PEREO2,Periodic Interval 2 Event Output Enable" "0,1" newline bitfld.long 0x0 1. "PEREO1,Periodic Interval 1 Event Output Enable" "0,1" bitfld.long 0x0 0. "PEREO0,Periodic Interval 0 Event Output Enable" "0,1" group.word 0x8++0x5 line.word 0x0 "INTENCLR,MODE1 Interrupt Enable Clear" bitfld.word 0x0 15. "OVF,Overflow Interrupt Enable" "0,1" bitfld.word 0x0 14. "TAMPER,Tamper Enable" "0,1" newline bitfld.word 0x0 11. "CMP3,Compare 3 Interrupt Enable" "0,1" bitfld.word 0x0 10. "CMP2,Compare 2 Interrupt Enable" "0,1" newline bitfld.word 0x0 9. "CMP1,Compare 1 Interrupt Enable" "0,1" bitfld.word 0x0 8. "CMP0,Compare 0 Interrupt Enable" "0,1" newline bitfld.word 0x0 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1" bitfld.word 0x0 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1" newline bitfld.word 0x0 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1" bitfld.word 0x0 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1" newline bitfld.word 0x0 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1" bitfld.word 0x0 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1" newline bitfld.word 0x0 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1" bitfld.word 0x0 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1" line.word 0x2 "INTENSET,MODE1 Interrupt Enable Set" bitfld.word 0x2 15. "OVF,Overflow Interrupt Enable" "0,1" bitfld.word 0x2 14. "TAMPER,Tamper Enable" "0,1" newline bitfld.word 0x2 11. "CMP3,Compare 3 Interrupt Enable" "0,1" bitfld.word 0x2 10. "CMP2,Compare 2 Interrupt Enable" "0,1" newline bitfld.word 0x2 9. "CMP1,Compare 1 Interrupt Enable" "0,1" bitfld.word 0x2 8. "CMP0,Compare 0 Interrupt Enable" "0,1" newline bitfld.word 0x2 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1" bitfld.word 0x2 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1" newline bitfld.word 0x2 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1" bitfld.word 0x2 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1" newline bitfld.word 0x2 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1" bitfld.word 0x2 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1" newline bitfld.word 0x2 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1" bitfld.word 0x2 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1" line.word 0x4 "INTFLAG,MODE1 Interrupt Flag Status and Clear" bitfld.word 0x4 15. "OVF,Overflow" "0,1" bitfld.word 0x4 14. "TAMPER,Tamper" "0,1" newline bitfld.word 0x4 11. "CMP3,Compare 3" "0,1" bitfld.word 0x4 10. "CMP2,Compare 2" "0,1" newline bitfld.word 0x4 9. "CMP1,Compare 1" "0,1" bitfld.word 0x4 8. "CMP0,Compare 0" "0,1" newline bitfld.word 0x4 7. "PER7,Periodic Interval 7" "0,1" bitfld.word 0x4 6. "PER6,Periodic Interval 6" "0,1" newline bitfld.word 0x4 5. "PER5,Periodic Interval 5" "0,1" bitfld.word 0x4 4. "PER4,Periodic Interval 4" "0,1" newline bitfld.word 0x4 3. "PER3,Periodic Interval 3" "0,1" bitfld.word 0x4 2. "PER2,Periodic Interval 2" "0,1" newline bitfld.word 0x4 1. "PER1,Periodic Interval 1" "0,1" bitfld.word 0x4 0. "PER0,Periodic Interval 0" "0,1" group.byte 0xE++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1" rgroup.long 0x10++0x3 line.long 0x0 "SYNCBUSY,MODE1 Synchronization Busy Status" bitfld.long 0x0 19. "GP3,General Purpose 3 Register Busy" "0,1" bitfld.long 0x0 18. "GP2,General Purpose 2 Register Busy" "0,1" newline bitfld.long 0x0 17. "GP1,General Purpose 1 Register Busy" "0,1" bitfld.long 0x0 16. "GP0,General Purpose 0 Register Busy" "0,1" newline bitfld.long 0x0 15. "COUNTSYNC,Count Synchronization Enable Bit Busy" "0,1" bitfld.long 0x0 8. "COMP3,COMP 3 Register Busy" "0,1" newline bitfld.long 0x0 7. "COMP2,COMP 2 Register Busy" "0,1" bitfld.long 0x0 6. "COMP1,COMP 1 Register Busy" "0,1" newline bitfld.long 0x0 5. "COMP0,COMP 0 Register Busy" "0,1" bitfld.long 0x0 4. "PER,PER Register Busy" "0,1" newline bitfld.long 0x0 3. "COUNT,COUNT Register Busy" "0,1" bitfld.long 0x0 2. "FREQCORR,FREQCORR Register Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Bit Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Bit Busy" "0,1" group.byte 0x14++0x0 line.byte 0x0 "FREQCORR,Frequency Correction" bitfld.byte 0x0 7. "SIGN,Correction Sign" "0,1" hexmask.byte 0x0 0.--6. 1. "VALUE,Correction Value" group.word 0x18++0x1 line.word 0x0 "COUNT,MODE1 Counter Value" hexmask.word 0x0 0.--15. 1. "COUNT,Counter Value" group.word 0x1C++0x1 line.word 0x0 "PER,MODE1 Counter Period" hexmask.word 0x0 0.--15. 1. "PER,Counter Period" repeat 4. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x20)++0x1 line.word 0x0 "COMP[$1],MODE1 Compare n Value" hexmask.word 0x0 0.--15. 1. "COMP,Compare Value" repeat.end repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x40)++0x3 line.long 0x0 "GP[$1],General Purpose" hexmask.long 0x0 0.--31. 1. "GP,General Purpose" repeat.end group.long 0x60++0x3 line.long 0x0 "TAMPCTRL,Tamper Control" bitfld.long 0x0 31. "DEBNC7,Debouncer Enable 7" "0,1" bitfld.long 0x0 30. "DEBNC6,Debouncer Enable 6" "0,1" newline bitfld.long 0x0 29. "DEBNC5,Debouncer Enable 5" "0,1" bitfld.long 0x0 28. "DEBNC4,Debouncer Enable 4" "0,1" newline bitfld.long 0x0 27. "DEBNC3,Debouncer Enable 3" "0,1" bitfld.long 0x0 26. "DEBNC2,Debouncer Enable 2" "0,1" newline bitfld.long 0x0 25. "DEBNC1,Debouncer Enable 1" "0,1" bitfld.long 0x0 24. "DEBNC0,Debouncer Enable 0" "0,1" newline bitfld.long 0x0 23. "TAMLVL7,Tamper Level Select 7" "0,1" bitfld.long 0x0 22. "TAMLVL6,Tamper Level Select 6" "0,1" newline bitfld.long 0x0 21. "TAMLVL5,Tamper Level Select 5" "0,1" bitfld.long 0x0 20. "TAMLVL4,Tamper Level Select 4" "0,1" newline bitfld.long 0x0 19. "TAMLVL3,Tamper Level Select 3" "0,1" bitfld.long 0x0 18. "TAMLVL2,Tamper Level Select 2" "0,1" newline bitfld.long 0x0 17. "TAMLVL1,Tamper Level Select 1" "0,1" bitfld.long 0x0 16. "TAMLVL0,Tamper Level Select 0" "0,1" newline bitfld.long 0x0 14.--15. "IN7ACT,Tamper Input 7 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN7 to OUT. When a mismatch occurs.." bitfld.long 0x0 12.--13. "IN6ACT,Tamper Input 6 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN6 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 10.--11. "IN5ACT,Tamper Input 5 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN5 to OUT. When a mismatch occurs.." bitfld.long 0x0 8.--9. "IN4ACT,Tamper Input 4 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN4 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 6.--7. "IN3ACT,Tamper Input 3 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN3 to OUT. When a mismatch occurs.." bitfld.long 0x0 4.--5. "IN2ACT,Tamper Input 2 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN2 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 2.--3. "IN1ACT,Tamper Input 1 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN1 to OUT. When a mismatch occurs.." bitfld.long 0x0 0.--1. "IN0ACT,Tamper Input 0 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN0 to OUT. When a mismatch occurs.." rgroup.long 0x64++0x3 line.long 0x0 "TIMESTAMP,MODE1 Timestamp" hexmask.long.word 0x0 0.--15. 1. "COUNT,Count Timestamp Value" group.long 0x68++0x7 line.long 0x0 "TAMPID,Tamper ID" bitfld.long 0x0 31. "TAMPEVT,Tamper Event Detected" "0,1" bitfld.long 0x0 7. "TAMPID7,Tamper Input 7 Detected" "0,1" newline bitfld.long 0x0 6. "TAMPID6,Tamper Input 6 Detected" "0,1" bitfld.long 0x0 5. "TAMPID5,Tamper Input 5 Detected" "0,1" newline bitfld.long 0x0 4. "TAMPID4,Tamper Input 4 Detected" "0,1" bitfld.long 0x0 3. "TAMPID3,Tamper Input 3 Detected" "0,1" newline bitfld.long 0x0 2. "TAMPID2,Tamper Input 2 Detected" "0,1" bitfld.long 0x0 1. "TAMPID1,Tamper Input 1 Detected" "0,1" newline bitfld.long 0x0 0. "TAMPID0,Tamper Input 0 Detected" "0,1" line.long 0x4 "TAMPCTRLB,Tamper Control B" bitfld.long 0x4 7. "ALSI7,Active Layer Select Internal 7" "0,1" bitfld.long 0x4 6. "ALSI6,Active Layer Select Internal 6" "0,1" newline bitfld.long 0x4 5. "ALSI5,Active Layer Select Internal 5" "0,1" bitfld.long 0x4 4. "ALSI4,Active Layer Select Internal 4" "0,1" newline bitfld.long 0x4 3. "ALSI3,Active Layer Select Internal 3" "0,1" bitfld.long 0x4 2. "ALSI2,Active Layer Select Internal 2" "0,1" newline bitfld.long 0x4 1. "ALSI1,Active Layer Select Internal 1" "0,1" bitfld.long 0x4 0. "ALSI0,Active Layer Select Internal 0" "0,1" tree.end tree "MODE2" group.word 0x0++0x3 line.word 0x0 "CTRLA,MODE2 Control A" bitfld.word 0x0 15. "CLOCKSYNC,Clock Read Synchronization Enable" "0,1" bitfld.word 0x0 14. "GPTRST,GP Registers Reset On Tamper Enable" "0,1" newline hexmask.word.byte 0x0 8.--11. 1. "PRESCALER,Prescaler" bitfld.word 0x0 7. "MATCHCLR,Clear on Match" "0,1" newline bitfld.word 0x0 6. "CLKREP,Clock Representation" "0,1" bitfld.word 0x0 2.--3. "MODE,Operating Mode" "0: Mode 0: 32-bit Counter,1: Mode 1: 16-bit Counter,2: Mode 2: Clock/Calendar,?" newline bitfld.word 0x0 1. "ENABLE,Enable" "0,1" bitfld.word 0x0 0. "SWRST,Software Reset" "0,1" line.word 0x2 "CTRLB,MODE2 Control B" bitfld.word 0x2 15. "SEPTO,Separate Tamper Outputs" "0,1" bitfld.word 0x2 12.--14. "ACTF,Active Layer Frequency" "0: CLK_RTC_OUT = CLK_RTC/2,1: CLK_RTC_OUT = CLK_RTC/4,2: CLK_RTC_OUT = CLK_RTC/8,3: CLK_RTC_OUT = CLK_RTC/16,4: CLK_RTC_OUT = CLK_RTC/32,5: CLK_RTC_OUT = CLK_RTC/64,6: CLK_RTC_OUT = CLK_RTC/128,7: CLK_RTC_OUT = CLK_RTC/256" newline bitfld.word 0x2 8.--10. "DEBF,Debounce Frequency" "0: CLK_RTC_DEB = CLK_RTC/2,1: CLK_RTC_DEB = CLK_RTC/4,2: CLK_RTC_DEB = CLK_RTC/8,3: CLK_RTC_DEB = CLK_RTC/16,4: CLK_RTC_DEB = CLK_RTC/32,5: CLK_RTC_DEB = CLK_RTC/64,6: CLK_RTC_DEB = CLK_RTC/128,7: CLK_RTC_DEB = CLK_RTC/256" bitfld.word 0x2 7. "DMAEN,DMA Enable" "0,1" newline bitfld.word 0x2 6. "RTCOUT,RTC Output Enable" "0,1" bitfld.word 0x2 5. "DEBASYNC,Debouncer Asynchronous Enable" "0,1" newline bitfld.word 0x2 4. "DEBMAJ,Debouncer Majority Enable" "0,1" bitfld.word 0x2 1. "GP2EN,General Purpose 2 Enable" "0,1" newline bitfld.word 0x2 0. "GP0EN,General Purpose 0 Enable" "0,1" group.long 0x4++0x3 line.long 0x0 "EVCTRL,MODE2 Event Control" bitfld.long 0x0 24. "PERDEO,Periodic Interval Daily Event Output Enable" "0,1" bitfld.long 0x0 16. "TAMPEVEI,Tamper Event Input Enable" "0,1" newline bitfld.long 0x0 15. "OVFEO,Overflow Event Output Enable" "0,1" bitfld.long 0x0 14. "TAMPEREO,Tamper Event Output Enable" "0,1" newline bitfld.long 0x0 9. "ALARMEO1,Alarm 1 Event Output Enable" "0,1" bitfld.long 0x0 8. "ALARMEO0,Alarm 0 Event Output Enable" "0,1" newline bitfld.long 0x0 7. "PEREO7,Periodic Interval 7 Event Output Enable" "0,1" bitfld.long 0x0 6. "PEREO6,Periodic Interval 6 Event Output Enable" "0,1" newline bitfld.long 0x0 5. "PEREO5,Periodic Interval 5 Event Output Enable" "0,1" bitfld.long 0x0 4. "PEREO4,Periodic Interval 4 Event Output Enable" "0,1" newline bitfld.long 0x0 3. "PEREO3,Periodic Interval 3 Event Output Enable" "0,1" bitfld.long 0x0 2. "PEREO2,Periodic Interval 2 Event Output Enable" "0,1" newline bitfld.long 0x0 1. "PEREO1,Periodic Interval 1 Event Output Enable" "0,1" bitfld.long 0x0 0. "PEREO0,Periodic Interval 0 Event Output Enable" "0,1" group.word 0x8++0x5 line.word 0x0 "INTENCLR,MODE2 Interrupt Enable Clear" bitfld.word 0x0 15. "OVF,Overflow Interrupt Enable" "0,1" bitfld.word 0x0 14. "TAMPER,Tamper Enable" "0,1" newline bitfld.word 0x0 9. "ALARM1,Alarm 1 Interrupt Enable" "0,1" bitfld.word 0x0 8. "ALARM0,Alarm 0 Interrupt Enable" "0,1" newline bitfld.word 0x0 7. "PER7,Periodic Interval 7 Interrupt Enable" "0,1" bitfld.word 0x0 6. "PER6,Periodic Interval 6 Interrupt Enable" "0,1" newline bitfld.word 0x0 5. "PER5,Periodic Interval 5 Interrupt Enable" "0,1" bitfld.word 0x0 4. "PER4,Periodic Interval 4 Interrupt Enable" "0,1" newline bitfld.word 0x0 3. "PER3,Periodic Interval 3 Interrupt Enable" "0,1" bitfld.word 0x0 2. "PER2,Periodic Interval 2 Interrupt Enable" "0,1" newline bitfld.word 0x0 1. "PER1,Periodic Interval 1 Interrupt Enable" "0,1" bitfld.word 0x0 0. "PER0,Periodic Interval 0 Interrupt Enable" "0,1" line.word 0x2 "INTENSET,MODE2 Interrupt Enable Set" bitfld.word 0x2 15. "OVF,Overflow Interrupt Enable" "0,1" bitfld.word 0x2 14. "TAMPER,Tamper Enable" "0,1" newline bitfld.word 0x2 9. "ALARM1,Alarm 1 Interrupt Enable" "0,1" bitfld.word 0x2 8. "ALARM0,Alarm 0 Interrupt Enable" "0,1" newline bitfld.word 0x2 7. "PER7,Periodic Interval 7 Enable" "0,1" bitfld.word 0x2 6. "PER6,Periodic Interval 6 Enable" "0,1" newline bitfld.word 0x2 5. "PER5,Periodic Interval 5 Enable" "0,1" bitfld.word 0x2 4. "PER4,Periodic Interval 4 Enable" "0,1" newline bitfld.word 0x2 3. "PER3,Periodic Interval 3 Enable" "0,1" bitfld.word 0x2 2. "PER2,Periodic Interval 2 Enable" "0,1" newline bitfld.word 0x2 1. "PER1,Periodic Interval 1 Enable" "0,1" bitfld.word 0x2 0. "PER0,Periodic Interval 0 Enable" "0,1" line.word 0x4 "INTFLAG,MODE2 Interrupt Flag Status and Clear" bitfld.word 0x4 15. "OVF,Overflow" "0,1" bitfld.word 0x4 14. "TAMPER,Tamper" "0,1" newline bitfld.word 0x4 9. "ALARM1,Alarm 1" "0,1" bitfld.word 0x4 8. "ALARM0,Alarm 0" "0,1" newline bitfld.word 0x4 7. "PER7,Periodic Interval 7" "0,1" bitfld.word 0x4 6. "PER6,Periodic Interval 6" "0,1" newline bitfld.word 0x4 5. "PER5,Periodic Interval 5" "0,1" bitfld.word 0x4 4. "PER4,Periodic Interval 4" "0,1" newline bitfld.word 0x4 3. "PER3,Periodic Interval 3" "0,1" bitfld.word 0x4 2. "PER2,Periodic Interval 2" "0,1" newline bitfld.word 0x4 1. "PER1,Periodic Interval 1" "0,1" bitfld.word 0x4 0. "PER0,Periodic Interval 0" "0,1" group.byte 0xE++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 0. "DBGRUN,Run During Debug" "0,1" rgroup.long 0x10++0x3 line.long 0x0 "SYNCBUSY,MODE2 Synchronization Busy Status" bitfld.long 0x0 19. "GP3,General Purpose 3 Register Busy" "0,1" bitfld.long 0x0 18. "GP2,General Purpose 2 Register Busy" "0,1" newline bitfld.long 0x0 17. "GP1,General Purpose 1 Register Busy" "0,1" bitfld.long 0x0 16. "GP0,General Purpose 0 Register Busy" "0,1" newline bitfld.long 0x0 15. "CLOCKSYNC,Clock Synchronization Enable Bit Busy" "0,1" bitfld.long 0x0 12. "MASK1,MASK 1 Register Busy" "0,1" newline bitfld.long 0x0 11. "MASK0,MASK 0 Register Busy" "0,1" bitfld.long 0x0 6. "ALARM1,ALARM 1 Register Busy" "0,1" newline bitfld.long 0x0 5. "ALARM0,ALARM 0 Register Busy" "0,1" bitfld.long 0x0 3. "CLOCK,CLOCK Register Busy" "0,1" newline bitfld.long 0x0 2. "FREQCORR,FREQCORR Register Busy" "0,1" bitfld.long 0x0 1. "ENABLE,Enable Bit Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Bit Busy" "0,1" group.byte 0x14++0x0 line.byte 0x0 "FREQCORR,Frequency Correction" bitfld.byte 0x0 7. "SIGN,Correction Sign" "0,1" hexmask.byte 0x0 0.--6. 1. "VALUE,Correction Value" group.long 0x18++0x3 line.long 0x0 "CLOCK,MODE2 Clock Value" hexmask.long.byte 0x0 26.--31. 1. "YEAR,Year" hexmask.long.byte 0x0 22.--25. 1. "MONTH,Month" newline hexmask.long.byte 0x0 17.--21. 1. "DAY,Day" hexmask.long.byte 0x0 12.--16. 1. "HOUR,Hour" newline hexmask.long.byte 0x0 6.--11. 1. "MINUTE,Minute" hexmask.long.byte 0x0 0.--5. 1. "SECOND,Second" repeat 2. (list 0x0 0x1)(list ad:0x44072020 ad:0x44072028) tree "MODE2_ALARM[$1]" base $2 group.long ($2)++0x3 line.long 0x0 "ALARM,MODE2_ALARM Alarm n Value" hexmask.long.byte 0x0 26.--31. 1. "YEAR,Year" hexmask.long.byte 0x0 22.--25. 1. "MONTH,Month" hexmask.long.byte 0x0 17.--21. 1. "DAY,Day" hexmask.long.byte 0x0 12.--16. 1. "HOUR,Hour" hexmask.long.byte 0x0 6.--11. 1. "MINUTE,Minute" hexmask.long.byte 0x0 0.--5. 1. "SECOND,Second" group.byte ($2+0x4)++0x0 line.byte 0x0 "MASK,MODE2_ALARM Alarm n Mask" bitfld.byte 0x0 0.--2. "SEL,Alarm Mask Selection" "0: Alarm Disabled,1: Match seconds only,2: Match seconds and minutes only,3: Match seconds minutes and hours only,4: Match seconds minutes hours and days only,5: Match seconds minutes hours days and months only,6: Match seconds minutes hours days months and years,?" tree.end repeat.end base ad:0x44072000 repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x40)++0x3 line.long 0x0 "GP[$1],General Purpose" hexmask.long 0x0 0.--31. 1. "GP,General Purpose" repeat.end group.long 0x60++0x3 line.long 0x0 "TAMPCTRL,Tamper Control" bitfld.long 0x0 31. "DEBNC7,Debouncer Enable 7" "0,1" bitfld.long 0x0 30. "DEBNC6,Debouncer Enable 6" "0,1" newline bitfld.long 0x0 29. "DEBNC5,Debouncer Enable 5" "0,1" bitfld.long 0x0 28. "DEBNC4,Debouncer Enable 4" "0,1" newline bitfld.long 0x0 27. "DEBNC3,Debouncer Enable 3" "0,1" bitfld.long 0x0 26. "DEBNC2,Debouncer Enable 2" "0,1" newline bitfld.long 0x0 25. "DEBNC1,Debouncer Enable 1" "0,1" bitfld.long 0x0 24. "DEBNC0,Debouncer Enable 0" "0,1" newline bitfld.long 0x0 23. "TAMLVL7,Tamper Level Select 7" "0,1" bitfld.long 0x0 22. "TAMLVL6,Tamper Level Select 6" "0,1" newline bitfld.long 0x0 21. "TAMLVL5,Tamper Level Select 5" "0,1" bitfld.long 0x0 20. "TAMLVL4,Tamper Level Select 4" "0,1" newline bitfld.long 0x0 19. "TAMLVL3,Tamper Level Select 3" "0,1" bitfld.long 0x0 18. "TAMLVL2,Tamper Level Select 2" "0,1" newline bitfld.long 0x0 17. "TAMLVL1,Tamper Level Select 1" "0,1" bitfld.long 0x0 16. "TAMLVL0,Tamper Level Select 0" "0,1" newline bitfld.long 0x0 14.--15. "IN7ACT,Tamper Input 7 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN7 to OUT. When a mismatch occurs.." bitfld.long 0x0 12.--13. "IN6ACT,Tamper Input 6 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN6 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 10.--11. "IN5ACT,Tamper Input 5 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN5 to OUT. When a mismatch occurs.." bitfld.long 0x0 8.--9. "IN4ACT,Tamper Input 4 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN4 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 6.--7. "IN3ACT,Tamper Input 3 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN3 to OUT. When a mismatch occurs.." bitfld.long 0x0 4.--5. "IN2ACT,Tamper Input 2 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN2 to OUT. When a mismatch occurs.." newline bitfld.long 0x0 2.--3. "IN1ACT,Tamper Input 1 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN1 to OUT. When a mismatch occurs.." bitfld.long 0x0 0.--1. "IN0ACT,Tamper Input 0 Action" "0: Off (Disabled),1: Wake and set Tamper flag,2: Capture timestamp and set Tamper flag,3: Compare IN0 to OUT. When a mismatch occurs.." rgroup.long 0x64++0x3 line.long 0x0 "TIMESTAMP,MODE2 Timestamp" hexmask.long.byte 0x0 26.--31. 1. "YEAR,Year Timestamp Value" hexmask.long.byte 0x0 22.--25. 1. "MONTH,Month Timestamp Value" newline hexmask.long.byte 0x0 17.--21. 1. "DAY,Day Timestamp Value" hexmask.long.byte 0x0 12.--16. 1. "HOUR,Hour Timestamp Value" newline hexmask.long.byte 0x0 6.--11. 1. "MINUTE,Minute Timestamp Value" hexmask.long.byte 0x0 0.--5. 1. "SECOND,Second Timestamp Value" group.long 0x68++0x7 line.long 0x0 "TAMPID,Tamper ID" bitfld.long 0x0 31. "TAMPEVT,Tamper Event Detected" "0,1" bitfld.long 0x0 7. "TAMPID7,Tamper Input 7 Detected" "0,1" newline bitfld.long 0x0 6. "TAMPID6,Tamper Input 6 Detected" "0,1" bitfld.long 0x0 5. "TAMPID5,Tamper Input 5 Detected" "0,1" newline bitfld.long 0x0 4. "TAMPID4,Tamper Input 4 Detected" "0,1" bitfld.long 0x0 3. "TAMPID3,Tamper Input 3 Detected" "0,1" newline bitfld.long 0x0 2. "TAMPID2,Tamper Input 2 Detected" "0,1" bitfld.long 0x0 1. "TAMPID1,Tamper Input 1 Detected" "0,1" newline bitfld.long 0x0 0. "TAMPID0,Tamper Input 0 Detected" "0,1" line.long 0x4 "TAMPCTRLB,Tamper Control B" bitfld.long 0x4 7. "ALSI7,Active Layer Select Internal 7" "0,1" bitfld.long 0x4 6. "ALSI6,Active Layer Select Internal 6" "0,1" newline bitfld.long 0x4 5. "ALSI5,Active Layer Select Internal 5" "0,1" bitfld.long 0x4 4. "ALSI4,Active Layer Select Internal 4" "0,1" newline bitfld.long 0x4 3. "ALSI3,Active Layer Select Internal 3" "0,1" bitfld.long 0x4 2. "ALSI2,Active Layer Select Internal 2" "0,1" newline bitfld.long 0x4 1. "ALSI1,Active Layer Select Internal 1" "0,1" bitfld.long 0x4 0. "ALSI0,Active Layer Select Internal 0" "0,1" tree.end tree.end tree "SDMMC (SD/MMC Host Controller)" base ad:0x0 tree "SDMMC0" base ad:0x458A0000 group.long 0x0++0x3 line.long 0x0 "SSAR,SDMA System Address / Argument 2" hexmask.long 0x0 0.--31. 1. "ADDR,SDMA System Address" group.long 0x0++0x3 line.long 0x0 "SSAR_CMD23_MODE,SDMA System Address / Argument 2" hexmask.long 0x0 0.--31. 1. "ARG2,Argument 2" group.word 0x4++0x3 line.word 0x0 "BSR,Block Size" bitfld.word 0x0 12.--14. "BOUNDARY,SDMA Buffer Boundary" "0: 4k bytes,1: 8k bytes,2: 16k bytes,3: 32k bytes,4: 64k bytes,5: 128k bytes,6: 256k bytes,7: 512k bytes" hexmask.word 0x0 0.--9. 1. "BLOCKSIZE,Transfer Block Size" line.word 0x2 "BCR,Block Count" hexmask.word 0x2 0.--15. 1. "BCNT,Blocks Count for Current Transfer" group.long 0x8++0x3 line.long 0x0 "ARG1R,Argument 1" hexmask.long 0x0 0.--31. 1. "ARG,Argument 1" group.word 0xC++0x3 line.word 0x0 "TMR,Transfer Mode" bitfld.word 0x0 5. "MSBSEL,Multi/Single Block Selection" "0: Single Block,1: Multiple Block" bitfld.word 0x0 4. "DTDSEL,Data Transfer Direction Selection" "0: Write (Host to Card),1: Read (Card to Host)" newline bitfld.word 0x0 2.--3. "ACMDEN,Auto Command Enable" "0: Auto Command Disabled,1: Auto CMD12 Enable,2: Auto CMD23 Enable,?" bitfld.word 0x0 1. "BCEN,Block Count Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 0. "DMAEN,DMA Enable" "0: No data transfer or Non DMA data transfer,1: DMA data transfer" line.word 0x2 "CR,Command" hexmask.word.byte 0x2 8.--13. 1. "CMDIDX,Command Index" bitfld.word 0x2 6.--7. "CMDTYP,Command Type" "0: Other commands,1: CMD52 for writing Bus Suspend in CCCR,2: CMD52 for writing Function Select in CCCR,3: CMD12 CMD52 for writing I/O Abort in CCCR" newline bitfld.word 0x2 5. "DPSEL,Data Present Select" "0: No Data Present,1: Data Present" bitfld.word 0x2 4. "CMDICEN,Command Index Check Enable" "0: Disable,1: Enable" newline bitfld.word 0x2 3. "CMDCCEN,Command CRC Check Enable" "0: Disable,1: Enable" bitfld.word 0x2 0.--1. "RESPTYP,Response Type" "0: No response,1: 136-bit response,2: 48-bit response,3: 48-bit response check busy after response" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x10)++0x3 line.long 0x0 "RR[$1],Response" hexmask.long 0x0 0.--31. 1. "CMDRESP,Command Response" repeat.end group.long 0x20++0x3 line.long 0x0 "BDPR,Buffer Data Port" hexmask.long 0x0 0.--31. 1. "BUFDATA,Buffer Data" rgroup.long 0x24++0x3 line.long 0x0 "PSR,Present State" bitfld.long 0x0 24. "CMDLL,CMD Line Level" "0,1" hexmask.long.byte 0x0 20.--23. 1. "DATLL,DAT[3:0] Line Level" newline bitfld.long 0x0 19. "WRPPL,Write Protect Pin Level" "0: Write protected (SDWP#=0),1: Write enabled (SDWP#=1)" bitfld.long 0x0 18. "CARDDPL,Card Detect Pin Level" "0: No card present (SDCD#=1),1: Card present (SDCD#=0)" newline bitfld.long 0x0 17. "CARDSS,Card State Stable" "0: Reset or Debouncing,1: No Card or Insered" bitfld.long 0x0 16. "CARDINS,Card Inserted" "0: Reset or Debouncing or No Card,1: Card inserted" newline bitfld.long 0x0 11. "BUFRDEN,Buffer Read Enable" "0: Read disable,1: Read enable" bitfld.long 0x0 10. "BUFWREN,Buffer Write Enable" "0: Write disable,1: Write enable" newline bitfld.long 0x0 9. "RTACT,Read Transfer Active" "0: No valid data,1: Transferring data" bitfld.long 0x0 8. "WTACT,Write Transfer Active" "0: No valid data,1: Transferring data" newline bitfld.long 0x0 3. "RTREQ,Re-Tuning Request" "0: Fixed or well-tuned sampling clock,1: Sampling clock needs re-tuning" bitfld.long 0x0 2. "DLACT,DAT Line Active" "0: DAT Line Inactive,1: DAT Line Active" newline bitfld.long 0x0 1. "CMDINHD,Command Inhibit (DAT)" "0: Can issue command which uses the DAT line,1: Cannot issue command which uses the DAT line" bitfld.long 0x0 0. "CMDINHC,Command Inhibit (CMD)" "0: Can issue command using only CMD line,1: Cannot issue command" group.byte 0x28++0x0 line.byte 0x0 "HC1R,Host Control 1" bitfld.byte 0x0 7. "CARDDSEL,Card Detect Signal Selection" "0: SDCD# is selected (for normal use),1: The Card Select Test Level is selected (for test.." bitfld.byte 0x0 6. "CARDDTL,Card Detect Test Level" "0: No Card,1: Card Inserted" newline bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?" bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0: Normal Speed mode,1: High Speed mode" newline bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode,1: 4-bit mode" bitfld.byte 0x0 0. "LEDCTRL,LED Control" "0: LED off,1: LED on" group.byte 0x28++0x2 line.byte 0x0 "HC1R_EMMC_MODE,Host Control 1" bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?" bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0: Normal Speed mode,1: High Speed mode" newline bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode,1: 4-bit mode" line.byte 0x1 "PCR,Power Control" bitfld.byte 0x1 1.--3. "SDBVSEL,SD Bus Voltage Select" "?,?,?,?,?,5: 1.8V (Typ.),6: 3.0V (Typ.),7: 3.3V (Typ.)" bitfld.byte 0x1 0. "SDBPWR,SD Bus Power" "0: Power off,1: Power on" line.byte 0x2 "BGCR,Block Gap Control" bitfld.byte 0x2 3. "INTBG,Interrupt at Block Gap" "0: Disabled,1: Enabled" bitfld.byte 0x2 2. "RWCTRL,Read Wait Control" "0: Disable Read Wait Control,1: Enable Read Wait Control" newline bitfld.byte 0x2 1. "CONTR,Continue Request" "0: Not affected,1: Restart" bitfld.byte 0x2 0. "STPBGR,Stop at Block Gap Request" "0: Transfer,1: Stop" group.byte 0x2A++0x1 line.byte 0x0 "BGCR_EMMC_MODE,Block Gap Control" bitfld.byte 0x0 1. "CONTR,Continue Request" "0: Not affected,1: Restart" bitfld.byte 0x0 0. "STPBGR,Stop at Block Gap Request" "0: Transfer,1: Stop" line.byte 0x1 "WCR,Wakeup Control" bitfld.byte 0x1 2. "WKENCREM,Wakeup Event Enable on Card Removal" "0: Disable,1: Enable" bitfld.byte 0x1 1. "WKENCINS,Wakeup Event Enable on Card Insertion" "0: Disable,1: Enable" newline bitfld.byte 0x1 0. "WKENCINT,Wakeup Event Enable on Card Interrupt" "0: Disable,1: Enable" group.word 0x2C++0x1 line.word 0x0 "CCR,Clock Control" hexmask.word.byte 0x0 8.--15. 1. "SDCLKFSEL,SDCLK Frequency Select" bitfld.word 0x0 6.--7. "USDCLKFSEL,Upper Bits of SDCLK Frequency Select" "0,1,2,3" newline bitfld.word 0x0 5. "CLKGSEL,Clock Generator Select" "0: Divided Clock Mode,1: Programmable Clock Mode" bitfld.word 0x0 2. "SDCLKEN,SD Clock Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "INTCLKS,Internal Clock Stable" "0: Not Ready,1: Ready" bitfld.word 0x0 0. "INTCLKEN,Internal Clock Enable" "0: Stop,1: Oscillate" group.byte 0x2E++0x1 line.byte 0x0 "TCR,Timeout Control" hexmask.byte 0x0 0.--3. 1. "DTCVAL,Data Timeout Counter Value" line.byte 0x1 "SRR,Software Reset" bitfld.byte 0x1 2. "SWRSTDAT,Software Reset For DAT Line" "0: Work,1: Reset" bitfld.byte 0x1 1. "SWRSTCMD,Software Reset For CMD Line" "0: Work,1: Reset" newline bitfld.byte 0x1 0. "SWRSTALL,Software Reset For All" "0: Work,1: Reset" group.word 0x30++0x1 line.word 0x0 "NISTR,Normal Interrupt Status" bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0: No Error,1: Error" bitfld.word 0x0 8. "CINT,Card Interrupt" "0: No Card Interrupt,1: Generate Card Interrupt" newline bitfld.word 0x0 7. "CREM,Card Removal" "0: Card state stable or Debouncing,1: Card Removed" bitfld.word 0x0 6. "CINS,Card Insertion" "0: Card state stable or Debouncing,1: Card inserted" newline bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0: Not ready to read buffer,1: Ready to read buffer" bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0: Not ready to write buffer,1: Ready to write buffer" newline bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA Interrupt,1: DMA Interrupt is generated" bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0: No Block Gap Event,1: Transaction stopped at block gap" newline bitfld.word 0x0 1. "TRFC,Transfer Complete" "0: Not complete,1: Command execution is completed" bitfld.word 0x0 0. "CMDC,Command Complete" "0: No command complete,1: Command complete" group.word 0x30++0x3 line.word 0x0 "NISTR_EMMC_MODE,Normal Interrupt Status" bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0: No Error,1: Error" bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received" "0,1" newline bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0: Not ready to read buffer,1: Ready to read buffer" bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0: Not ready to write buffer,1: Ready to write buffer" newline bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA Interrupt,1: DMA Interrupt is generated" bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0: No Block Gap Event,1: Transaction stopped at block gap" newline bitfld.word 0x0 1. "TRFC,Transfer Complete" "0: Not complete,1: Command execution is completed" bitfld.word 0x0 0. "CMDC,Command Complete" "0: No command complete,1: Command complete" line.word 0x2 "EISTR,Error Interrupt Status" bitfld.word 0x2 9. "ADMA,ADMA Error" "0: No Error,1: Error" bitfld.word 0x2 8. "ACMD,Auto CMD Error" "0: No Error,1: Error" newline bitfld.word 0x2 7. "CURLIM,Current Limit Error" "0: No Error,1: Power Fail" bitfld.word 0x2 6. "DATEND,Data End Bit Error" "0: No Error,1: Error" newline bitfld.word 0x2 5. "DATCRC,Data CRC Error" "0: No Error,1: Error" bitfld.word 0x2 4. "DATTEO,Data Timeout Error" "0: No Error,1: Timeout" newline bitfld.word 0x2 3. "CMDIDX,Command Index Error" "0: No Error,1: Error" bitfld.word 0x2 2. "CMDEND,Command End Bit Error" "0: No error,1: End Bit Error Generated" newline bitfld.word 0x2 1. "CMDCRC,Command CRC Error" "0: No Error,1: CRC Error Generated" bitfld.word 0x2 0. "CMDTEO,Command Timeout Error" "0: No Error,1: Timeout" group.word 0x32++0x3 line.word 0x0 "EISTR_EMMC_MODE,Error Interrupt Status" bitfld.word 0x0 12. "BOOTAE,Boot Acknowledge Error" "0: FIFO contains at least one byte,1: FIFO is empty" bitfld.word 0x0 9. "ADMA,ADMA Error" "0: No Error,1: Error" newline bitfld.word 0x0 8. "ACMD,Auto CMD Error" "0: No Error,1: Error" bitfld.word 0x0 7. "CURLIM,Current Limit Error" "0: No Error,1: Power Fail" newline bitfld.word 0x0 6. "DATEND,Data End Bit Error" "0: No Error,1: Error" bitfld.word 0x0 5. "DATCRC,Data CRC Error" "0: No Error,1: Error" newline bitfld.word 0x0 4. "DATTEO,Data Timeout Error" "0: No Error,1: Timeout" bitfld.word 0x0 3. "CMDIDX,Command Index Error" "0: No Error,1: Error" newline bitfld.word 0x0 2. "CMDEND,Command End Bit Error" "0: No error,1: End Bit Error Generated" bitfld.word 0x0 1. "CMDCRC,Command CRC Error" "0: No Error,1: CRC Error Generated" newline bitfld.word 0x0 0. "CMDTEO,Command Timeout Error" "0: No Error,1: Timeout" line.word 0x2 "NISTER,Normal Interrupt Status Enable" bitfld.word 0x2 8. "CINT,Card Interrupt Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 7. "CREM,Card Removal Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 6. "CINS,Card Insertion Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 3. "DMAINT,DMA Interrupt Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 2. "BLKGE,Block Gap Event Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 1. "TRFC,Transfer Complete Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 0. "CMDC,Command Complete Status Enable" "0: Masked,1: Enabled" group.word 0x34++0x3 line.word 0x0 "NISTER_EMMC_MODE,Normal Interrupt Status Enable" bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received Status Enable" "0,1" bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "DMAINT,DMA Interrupt Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "BLKGE,Block Gap Event Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "TRFC,Transfer Complete Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDC,Command Complete Status Enable" "0: Masked,1: Enabled" line.word 0x2 "EISTER,Error Interrupt Status Enable" bitfld.word 0x2 9. "ADMA,ADMA Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 8. "ACMD,Auto CMD Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 7. "CURLIM,Current Limit Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 6. "DATEND,Data End Bit Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 5. "DATCRC,Data CRC Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 4. "DATTEO,Data Timeout Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 3. "CMDIDX,Command Index Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 2. "CMDEND,Command End Bit Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 1. "CMDCRC,Command CRC Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Status Enable" "0: Masked,1: Enabled" group.word 0x36++0x3 line.word 0x0 "EISTER_EMMC_MODE,Error Interrupt Status Enable" bitfld.word 0x0 12. "BOOTAE,Boot Acknowledge Error Status Enable" "0,1" bitfld.word 0x0 9. "ADMA,ADMA Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 8. "ACMD,Auto CMD Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 7. "CURLIM,Current Limit Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 6. "DATEND,Data End Bit Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 5. "DATCRC,Data CRC Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "DATTEO,Data Timeout Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "CMDIDX,Command Index Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "CMDEND,Command End Bit Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "CMDCRC,Command CRC Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Status Enable" "0: Masked,1: Enabled" line.word 0x2 "NISIER,Normal Interrupt Signal Enable" bitfld.word 0x2 8. "CINT,Card Interrupt Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 7. "CREM,Card Removal Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 6. "CINS,Card Insertion Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 3. "DMAINT,DMA Interrupt Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 2. "BLKGE,Block Gap Event Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 1. "TRFC,Transfer Complete Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 0. "CMDC,Command Complete Signal Enable" "0: Masked,1: Enabled" group.word 0x38++0x3 line.word 0x0 "NISIER_EMMC_MODE,Normal Interrupt Signal Enable" bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received Signal Enable" "0,1" bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "DMAINT,DMA Interrupt Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "BLKGE,Block Gap Event Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "TRFC,Transfer Complete Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDC,Command Complete Signal Enable" "0: Masked,1: Enabled" line.word 0x2 "EISIER,Error Interrupt Signal Enable" bitfld.word 0x2 9. "ADMA,ADMA Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 8. "ACMD,Auto CMD Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 7. "CURLIM,Current Limit Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 6. "DATEND,Data End Bit Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 5. "DATCRC,Data CRC Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 4. "DATTEO,Data Timeout Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 3. "CMDIDX,Command Index Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 2. "CMDEND,Command End Bit Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 1. "CMDCRC,Command CRC Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Signal Enable" "0: Masked,1: Enabled" group.word 0x3A++0x1 line.word 0x0 "EISIER_EMMC_MODE,Error Interrupt Signal Enable" bitfld.word 0x0 12. "BOOTAE,Boot Acknowledge Error Signal Enable" "0,1" bitfld.word 0x0 9. "ADMA,ADMA Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 8. "ACMD,Auto CMD Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 7. "CURLIM,Current Limit Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 6. "DATEND,Data End Bit Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 5. "DATCRC,Data CRC Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "DATTEO,Data Timeout Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "CMDIDX,Command Index Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "CMDEND,Command End Bit Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "CMDCRC,Command CRC Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Signal Enable" "0: Masked,1: Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "ACESR,Auto CMD Error Status" bitfld.word 0x0 7. "CMDNI,Command not Issued By Auto CMD12 Error" "0: No error,1: Not Issued" bitfld.word 0x0 4. "ACMDIDX,Auto CMD Index Error" "0: No error,1: Error" newline bitfld.word 0x0 3. "ACMDEND,Auto CMD End Bit Error" "0: No error,1: End Bit Error Generated" bitfld.word 0x0 2. "ACMDCRC,Auto CMD CRC Error" "0: No error,1: CRC Error Generated" newline bitfld.word 0x0 1. "ACMDTEO,Auto CMD Timeout Error" "0: No error,1: Timeout" bitfld.word 0x0 0. "ACMD12NE,Auto CMD12 Not Executed" "0: Executed,1: Not executed" group.word 0x3E++0x1 line.word 0x0 "HC2R,Host Control 2" bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver Strength are controlled by Host..,1: Automatic Selection by Preset Value is Enabled" bitfld.word 0x0 14. "ASINTEN,Asynchronous Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 7. "SLCKSEL,Sampling Clock Select" "0: Fixed clock is used to sample data,1: Tuned clock is used to sample data" bitfld.word 0x0 6. "EXTUN,Execute Tuning" "0: Not Tuned or Tuning Completed,1: Execute Tuning" newline bitfld.word 0x0 4.--5. "DRVSEL,Driver Strength Select" "0: Driver Type B is Selected (Default),1: Driver Type A is Selected,2: Driver Type C is Selected,3: Driver Type D is Selected" bitfld.word 0x0 3. "VS18EN,1.8V Signaling Enable" "0: 3.3V Signaling,1: 1.8V Signaling" newline bitfld.word 0x0 0.--2. "UHSMS,UHS Mode Select" "0: SDR12,1: SDR25,2: SDR50,3: SDR104,4: DDR50,?,?,?" group.word 0x3E++0x1 line.word 0x0 "HC2R_EMMC_MODE,Host Control 2" bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver Strength are controlled by Host..,1: Automatic Selection by Preset Value is Enabled" bitfld.word 0x0 7. "SLCKSEL,Sampling Clock Select" "0: Fixed clock is used to sample data,1: Tuned clock is used to sample data" newline bitfld.word 0x0 6. "EXTUN,Execute Tuning" "0: Not Tuned or Tuning Completed,1: Execute Tuning" bitfld.word 0x0 4.--5. "DRVSEL,Driver Strength Select" "0: Driver Type B is Selected (Default),1: Driver Type A is Selected,2: Driver Type C is Selected,3: Driver Type D is Selected" newline hexmask.word.byte 0x0 0.--3. 1. "HS200EN,HS200 Mode Enable" group.long 0x40++0x7 line.long 0x0 "CA0R,Capabilities 0" bitfld.long 0x0 30.--31. "SLTYPE,Slot Type" "0: Removable Card Slot,1: Embedded Slot for One Device,?,?" bitfld.long 0x0 29. "ASINTSUP,Asynchronous Interrupt Support" "0: Asynchronous Interrupt not Supported,1: Asynchronous Interrupt supported" newline bitfld.long 0x0 28. "SB64SUP,64-Bit System Bus Support" "0: 32-bit Address Descriptors and System Bus,1: 64-bit Address Descriptors and System Bus" bitfld.long 0x0 26. "V18VSUP,Voltage Support 1.8V" "0: 1.8V Not Supported,1: 1.8V Supported" newline bitfld.long 0x0 25. "V30VSUP,Voltage Support 3.0V" "0: 3.0V Not Supported,1: 3.0V Supported" bitfld.long 0x0 24. "V33VSUP,Voltage Support 3.3V" "0: 3.3V Not Supported,1: 3.3V Supported" newline bitfld.long 0x0 23. "SRSUP,Suspend/Resume Support" "0: Suspend/Resume not Supported,1: Suspend/Resume Supported" bitfld.long 0x0 22. "SDMASUP,SDMA Support" "0: SDMA not Supported,1: SDMA Supported" newline bitfld.long 0x0 21. "HSSUP,High Speed Support" "0: High Speed not Supported,1: High Speed Supported" bitfld.long 0x0 19. "ADMA2SUP,ADMA2 Support" "0: ADMA2 not Supported,1: ADMA2 Supported" newline bitfld.long 0x0 18. "ED8SUP,8-bit Support for Embedded Device" "0: 8-bit Bus Width not Supported,1: 8-bit Bus Width Supported" bitfld.long 0x0 16.--17. "MAXBLKL,Max Block Length" "0: 512 bytes,1: 1024 bytes,2: 2048 bytes,?" newline hexmask.long.byte 0x0 8.--15. 1. "BASECLKF,Base Clock Frequency" bitfld.long 0x0 7. "TEOCLKU,Timeout Clock Unit" "0: KHz,1: MHz" newline hexmask.long.byte 0x0 0.--5. 1. "TEOCLKF,Timeout Clock Frequency" line.long 0x4 "CA1R,Capabilities 1" hexmask.long.byte 0x4 16.--23. 1. "CLKMULT,Clock Multiplier" bitfld.long 0x4 13. "TSDR50,Use Tuning for SDR50" "0: SDR50 does not require tuning,1: SDR50 requires tuning" newline hexmask.long.byte 0x4 8.--11. 1. "TCNTRT,Timer Count for Re-Tuning" bitfld.long 0x4 6. "DRVDSUP,Driver Type D Support" "0: Driver Type D is Not Supported,1: Driver Type D is Supported" newline bitfld.long 0x4 5. "DRVCSUP,Driver Type C Support" "0: Driver Type C is Not Supported,1: Driver Type C is Supported" bitfld.long 0x4 4. "DRVASUP,Driver Type A Support" "0: Driver Type A is Not Supported,1: Driver Type A is Supported" newline bitfld.long 0x4 2. "DDR50SUP,DDR50 Support" "0: DDR50 is Not Supported,1: DDR50 is Supported" bitfld.long 0x4 1. "SDR104SUP,SDR104 Support" "0: SDR104 is Not Supported,1: SDR104 is Supported" newline bitfld.long 0x4 0. "SDR50SUP,SDR50 Support" "0: SDR50 is Not Supported,1: SDR50 is Supported" rgroup.long 0x48++0x3 line.long 0x0 "MCCAR,Maximum Current Capabilities" hexmask.long.byte 0x0 16.--23. 1. "MAXCUR18V,Maximum Current for 1.8V" hexmask.long.byte 0x0 8.--15. 1. "MAXCUR30V,Maximum Current for 3.0V" newline hexmask.long.byte 0x0 0.--7. 1. "MAXCUR33V,Maximum Current for 3.3V" wgroup.word 0x50++0x3 line.word 0x0 "FERACES,Force Event for Auto CMD Error Status" bitfld.word 0x0 7. "CMDNI,Force Event for Command Not Issued By Auto CMD12 Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x0 4. "ACMDIDX,Force Event for Auto CMD Index Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x0 3. "ACMDEND,Force Event for Auto CMD End Bit Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x0 2. "ACMDCRC,Force Event for Auto CMD CRC Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x0 1. "ACMDTEO,Force Event for Auto CMD Timeout Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x0 0. "ACMD12NE,Force Event for Auto CMD12 Not Executed" "0: No Interrupt,1: Interrupt is generated" line.word 0x2 "FEREIS,Force Event for Error Interrupt Status" bitfld.word 0x2 12. "BOOTAE,Force Event for Boot Acknowledge Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 9. "ADMA,Force Event for ADMA Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 8. "ACMD,Force Event for Auto CMD Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 7. "CURLIM,Force Event for Current Limit Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 6. "DATEND,Force Event for Data End Bit Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 5. "DATCRC,Force Event for Data CRC Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 4. "DATTEO,Force Event for Data Timeout Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 3. "CMDIDX,Force Event for Command Index Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 2. "CMDEND,Force Event for Command End Bit Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 1. "CMDCRC,Force Event for Command CRC Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 0. "CMDTEO,Force Event for Command Timeout Error" "0: No Interrupt,1: Interrupt is generated" rgroup.byte 0x54++0x0 line.byte 0x0 "AESR,ADMA Error Status" bitfld.byte 0x0 2. "LMIS,ADMA Length Mismatch Error" "0: No Error,1: Error" bitfld.byte 0x0 0.--1. "ERRST,ADMA Error State" "0: ST_STOP (Stop DMA),1: ST_FDS (Fetch Descriptor),?,3: ST_TFR (Transfer Data)" group.long 0x58++0x3 line.long 0x0 "ASAR,ADMA System Address n" hexmask.long 0x0 0.--31. 1. "ADMASA,ADMA System Address" repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x60)++0x1 line.word 0x0 "PVR[$1],Preset Value n" bitfld.word 0x0 14.--15. "DRVSEL,Driver Strength Select Value for Initialization" "0: Driver Type B is Selected,1: Driver Type A is Selected,2: Driver Type C is Selected,3: Driver Type D is Selected" bitfld.word 0x0 10. "CLKGSEL,Clock Generator Select Value for Initialization" "0: Host Controller Ver2.00 Compatible Clock..,1: Programmable Clock Generator" newline hexmask.word 0x0 0.--9. 1. "SDCLKFSEL,SDCLK Frequency Select Value for Initialization" repeat.end rgroup.word 0xFC++0x3 line.word 0x0 "SISR,Slot Interrupt Status" bitfld.word 0x0 0.--1. "INTSSL,Interrupt Signal for Each Slot" "0,1,2,3" line.word 0x2 "HCVR,Host Controller Version" hexmask.word.byte 0x2 8.--15. 1. "VVER,Vendor Version" hexmask.word.byte 0x2 0.--7. 1. "SVER,Spec Version" group.byte 0x204++0x0 line.byte 0x0 "MC1R,e.MMC Control 1" bitfld.byte 0x0 7. "FCD,e.MMC Force Card Detect" "0,1" bitfld.byte 0x0 6. "RSTN,e.MMC Reset Signal" "0,1" newline bitfld.byte 0x0 5. "BOOTA,e.MMC Boot Acknowledge Enable" "0,1" bitfld.byte 0x0 4. "OPD,e.MMC Open Drain Mode" "0,1" newline bitfld.byte 0x0 3. "DDR,e.MMC HSDDR Mode" "0,1" bitfld.byte 0x0 0.--1. "CMDTYP,e.MMC Command Type" "0: Not a MMC specific command,1: Wait IRQ Command,2: Stream Command,3: Boot Command" wgroup.byte 0x205++0x0 line.byte 0x0 "MC2R,e.MMC Control 2" bitfld.byte 0x0 1. "ABOOT,e.MMC Abort Boot" "0,1" bitfld.byte 0x0 0. "SRESP,e.MMC Abort Wait IRQ" "0,1" group.byte 0x207++0x0 line.byte 0x0 "DEBR,Debounce Register" bitfld.byte 0x0 0.--1. "CDDVAL,Card Detect Debounce Value" "0: 1 slow clock cycle,1: 8 slow clock cycles,2: 33 slow clock cycle,3: 328 slow clock cycle" group.long 0x208++0x7 line.long 0x0 "ACR,AHB Control" bitfld.long 0x0 0.--1. "BMAX,AHB Maximum Burst" "0,1,2,3" line.long 0x4 "CC2R,Clock Control 2" bitfld.long 0x4 0. "FSDCLKD,Force SDCK Disabled" "0: No effect,1: SDCLK can be stopped at any time after DATA.." group.long 0x230++0x7 line.long 0x0 "CACR,Capabilities Control" hexmask.long.byte 0x0 8.--15. 1. "KEY,Key (0x46)" bitfld.long 0x0 0. "CAPWREN,Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)" "0,1" line.long 0x4 "DBGR,Debug" bitfld.long 0x4 0. "NIDBG,Non-intrusive debug enable" "0: Debugging is intrusive (reads of BDPR from..,1: Debugging is not intrusive (reads of BDPR from.." tree.end tree "SDMMC1" base ad:0x460A0000 group.long 0x0++0x3 line.long 0x0 "SSAR,SDMA System Address / Argument 2" hexmask.long 0x0 0.--31. 1. "ADDR,SDMA System Address" group.long 0x0++0x3 line.long 0x0 "SSAR_CMD23_MODE,SDMA System Address / Argument 2" hexmask.long 0x0 0.--31. 1. "ARG2,Argument 2" group.word 0x4++0x3 line.word 0x0 "BSR,Block Size" bitfld.word 0x0 12.--14. "BOUNDARY,SDMA Buffer Boundary" "0: 4k bytes,1: 8k bytes,2: 16k bytes,3: 32k bytes,4: 64k bytes,5: 128k bytes,6: 256k bytes,7: 512k bytes" hexmask.word 0x0 0.--9. 1. "BLOCKSIZE,Transfer Block Size" line.word 0x2 "BCR,Block Count" hexmask.word 0x2 0.--15. 1. "BCNT,Blocks Count for Current Transfer" group.long 0x8++0x3 line.long 0x0 "ARG1R,Argument 1" hexmask.long 0x0 0.--31. 1. "ARG,Argument 1" group.word 0xC++0x3 line.word 0x0 "TMR,Transfer Mode" bitfld.word 0x0 5. "MSBSEL,Multi/Single Block Selection" "0: Single Block,1: Multiple Block" bitfld.word 0x0 4. "DTDSEL,Data Transfer Direction Selection" "0: Write (Host to Card),1: Read (Card to Host)" newline bitfld.word 0x0 2.--3. "ACMDEN,Auto Command Enable" "0: Auto Command Disabled,1: Auto CMD12 Enable,2: Auto CMD23 Enable,?" bitfld.word 0x0 1. "BCEN,Block Count Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 0. "DMAEN,DMA Enable" "0: No data transfer or Non DMA data transfer,1: DMA data transfer" line.word 0x2 "CR,Command" hexmask.word.byte 0x2 8.--13. 1. "CMDIDX,Command Index" bitfld.word 0x2 6.--7. "CMDTYP,Command Type" "0: Other commands,1: CMD52 for writing Bus Suspend in CCCR,2: CMD52 for writing Function Select in CCCR,3: CMD12 CMD52 for writing I/O Abort in CCCR" newline bitfld.word 0x2 5. "DPSEL,Data Present Select" "0: No Data Present,1: Data Present" bitfld.word 0x2 4. "CMDICEN,Command Index Check Enable" "0: Disable,1: Enable" newline bitfld.word 0x2 3. "CMDCCEN,Command CRC Check Enable" "0: Disable,1: Enable" bitfld.word 0x2 0.--1. "RESPTYP,Response Type" "0: No response,1: 136-bit response,2: 48-bit response,3: 48-bit response check busy after response" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0x10)++0x3 line.long 0x0 "RR[$1],Response" hexmask.long 0x0 0.--31. 1. "CMDRESP,Command Response" repeat.end group.long 0x20++0x3 line.long 0x0 "BDPR,Buffer Data Port" hexmask.long 0x0 0.--31. 1. "BUFDATA,Buffer Data" rgroup.long 0x24++0x3 line.long 0x0 "PSR,Present State" bitfld.long 0x0 24. "CMDLL,CMD Line Level" "0,1" hexmask.long.byte 0x0 20.--23. 1. "DATLL,DAT[3:0] Line Level" newline bitfld.long 0x0 19. "WRPPL,Write Protect Pin Level" "0: Write protected (SDWP#=0),1: Write enabled (SDWP#=1)" bitfld.long 0x0 18. "CARDDPL,Card Detect Pin Level" "0: No card present (SDCD#=1),1: Card present (SDCD#=0)" newline bitfld.long 0x0 17. "CARDSS,Card State Stable" "0: Reset or Debouncing,1: No Card or Insered" bitfld.long 0x0 16. "CARDINS,Card Inserted" "0: Reset or Debouncing or No Card,1: Card inserted" newline bitfld.long 0x0 11. "BUFRDEN,Buffer Read Enable" "0: Read disable,1: Read enable" bitfld.long 0x0 10. "BUFWREN,Buffer Write Enable" "0: Write disable,1: Write enable" newline bitfld.long 0x0 9. "RTACT,Read Transfer Active" "0: No valid data,1: Transferring data" bitfld.long 0x0 8. "WTACT,Write Transfer Active" "0: No valid data,1: Transferring data" newline bitfld.long 0x0 3. "RTREQ,Re-Tuning Request" "0: Fixed or well-tuned sampling clock,1: Sampling clock needs re-tuning" bitfld.long 0x0 2. "DLACT,DAT Line Active" "0: DAT Line Inactive,1: DAT Line Active" newline bitfld.long 0x0 1. "CMDINHD,Command Inhibit (DAT)" "0: Can issue command which uses the DAT line,1: Cannot issue command which uses the DAT line" bitfld.long 0x0 0. "CMDINHC,Command Inhibit (CMD)" "0: Can issue command using only CMD line,1: Cannot issue command" group.byte 0x28++0x0 line.byte 0x0 "HC1R,Host Control 1" bitfld.byte 0x0 7. "CARDDSEL,Card Detect Signal Selection" "0: SDCD# is selected (for normal use),1: The Card Select Test Level is selected (for test.." bitfld.byte 0x0 6. "CARDDTL,Card Detect Test Level" "0: No Card,1: Card Inserted" newline bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?" bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0: Normal Speed mode,1: High Speed mode" newline bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode,1: 4-bit mode" bitfld.byte 0x0 0. "LEDCTRL,LED Control" "0: LED off,1: LED on" group.byte 0x28++0x2 line.byte 0x0 "HC1R_EMMC_MODE,Host Control 1" bitfld.byte 0x0 3.--4. "DMASEL,DMA Select" "0: SDMA is selected,?,2: 32-bit Address ADMA2 is selected,?" bitfld.byte 0x0 2. "HSEN,High Speed Enable" "0: Normal Speed mode,1: High Speed mode" newline bitfld.byte 0x0 1. "DW,Data Width" "0: 1-bit mode,1: 4-bit mode" line.byte 0x1 "PCR,Power Control" bitfld.byte 0x1 1.--3. "SDBVSEL,SD Bus Voltage Select" "?,?,?,?,?,5: 1.8V (Typ.),6: 3.0V (Typ.),7: 3.3V (Typ.)" bitfld.byte 0x1 0. "SDBPWR,SD Bus Power" "0: Power off,1: Power on" line.byte 0x2 "BGCR,Block Gap Control" bitfld.byte 0x2 3. "INTBG,Interrupt at Block Gap" "0: Disabled,1: Enabled" bitfld.byte 0x2 2. "RWCTRL,Read Wait Control" "0: Disable Read Wait Control,1: Enable Read Wait Control" newline bitfld.byte 0x2 1. "CONTR,Continue Request" "0: Not affected,1: Restart" bitfld.byte 0x2 0. "STPBGR,Stop at Block Gap Request" "0: Transfer,1: Stop" group.byte 0x2A++0x1 line.byte 0x0 "BGCR_EMMC_MODE,Block Gap Control" bitfld.byte 0x0 1. "CONTR,Continue Request" "0: Not affected,1: Restart" bitfld.byte 0x0 0. "STPBGR,Stop at Block Gap Request" "0: Transfer,1: Stop" line.byte 0x1 "WCR,Wakeup Control" bitfld.byte 0x1 2. "WKENCREM,Wakeup Event Enable on Card Removal" "0: Disable,1: Enable" bitfld.byte 0x1 1. "WKENCINS,Wakeup Event Enable on Card Insertion" "0: Disable,1: Enable" newline bitfld.byte 0x1 0. "WKENCINT,Wakeup Event Enable on Card Interrupt" "0: Disable,1: Enable" group.word 0x2C++0x1 line.word 0x0 "CCR,Clock Control" hexmask.word.byte 0x0 8.--15. 1. "SDCLKFSEL,SDCLK Frequency Select" bitfld.word 0x0 6.--7. "USDCLKFSEL,Upper Bits of SDCLK Frequency Select" "0,1,2,3" newline bitfld.word 0x0 5. "CLKGSEL,Clock Generator Select" "0: Divided Clock Mode,1: Programmable Clock Mode" bitfld.word 0x0 2. "SDCLKEN,SD Clock Enable" "0: Disable,1: Enable" newline bitfld.word 0x0 1. "INTCLKS,Internal Clock Stable" "0: Not Ready,1: Ready" bitfld.word 0x0 0. "INTCLKEN,Internal Clock Enable" "0: Stop,1: Oscillate" group.byte 0x2E++0x1 line.byte 0x0 "TCR,Timeout Control" hexmask.byte 0x0 0.--3. 1. "DTCVAL,Data Timeout Counter Value" line.byte 0x1 "SRR,Software Reset" bitfld.byte 0x1 2. "SWRSTDAT,Software Reset For DAT Line" "0: Work,1: Reset" bitfld.byte 0x1 1. "SWRSTCMD,Software Reset For CMD Line" "0: Work,1: Reset" newline bitfld.byte 0x1 0. "SWRSTALL,Software Reset For All" "0: Work,1: Reset" group.word 0x30++0x1 line.word 0x0 "NISTR,Normal Interrupt Status" bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0: No Error,1: Error" bitfld.word 0x0 8. "CINT,Card Interrupt" "0: No Card Interrupt,1: Generate Card Interrupt" newline bitfld.word 0x0 7. "CREM,Card Removal" "0: Card state stable or Debouncing,1: Card Removed" bitfld.word 0x0 6. "CINS,Card Insertion" "0: Card state stable or Debouncing,1: Card inserted" newline bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0: Not ready to read buffer,1: Ready to read buffer" bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0: Not ready to write buffer,1: Ready to write buffer" newline bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA Interrupt,1: DMA Interrupt is generated" bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0: No Block Gap Event,1: Transaction stopped at block gap" newline bitfld.word 0x0 1. "TRFC,Transfer Complete" "0: Not complete,1: Command execution is completed" bitfld.word 0x0 0. "CMDC,Command Complete" "0: No command complete,1: Command complete" group.word 0x30++0x3 line.word 0x0 "NISTR_EMMC_MODE,Normal Interrupt Status" bitfld.word 0x0 15. "ERRINT,Error Interrupt" "0: No Error,1: Error" bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received" "0,1" newline bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready" "0: Not ready to read buffer,1: Ready to read buffer" bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready" "0: Not ready to write buffer,1: Ready to write buffer" newline bitfld.word 0x0 3. "DMAINT,DMA Interrupt" "0: No DMA Interrupt,1: DMA Interrupt is generated" bitfld.word 0x0 2. "BLKGE,Block Gap Event" "0: No Block Gap Event,1: Transaction stopped at block gap" newline bitfld.word 0x0 1. "TRFC,Transfer Complete" "0: Not complete,1: Command execution is completed" bitfld.word 0x0 0. "CMDC,Command Complete" "0: No command complete,1: Command complete" line.word 0x2 "EISTR,Error Interrupt Status" bitfld.word 0x2 9. "ADMA,ADMA Error" "0: No Error,1: Error" bitfld.word 0x2 8. "ACMD,Auto CMD Error" "0: No Error,1: Error" newline bitfld.word 0x2 7. "CURLIM,Current Limit Error" "0: No Error,1: Power Fail" bitfld.word 0x2 6. "DATEND,Data End Bit Error" "0: No Error,1: Error" newline bitfld.word 0x2 5. "DATCRC,Data CRC Error" "0: No Error,1: Error" bitfld.word 0x2 4. "DATTEO,Data Timeout Error" "0: No Error,1: Timeout" newline bitfld.word 0x2 3. "CMDIDX,Command Index Error" "0: No Error,1: Error" bitfld.word 0x2 2. "CMDEND,Command End Bit Error" "0: No error,1: End Bit Error Generated" newline bitfld.word 0x2 1. "CMDCRC,Command CRC Error" "0: No Error,1: CRC Error Generated" bitfld.word 0x2 0. "CMDTEO,Command Timeout Error" "0: No Error,1: Timeout" group.word 0x32++0x3 line.word 0x0 "EISTR_EMMC_MODE,Error Interrupt Status" bitfld.word 0x0 12. "BOOTAE,Boot Acknowledge Error" "0: FIFO contains at least one byte,1: FIFO is empty" bitfld.word 0x0 9. "ADMA,ADMA Error" "0: No Error,1: Error" newline bitfld.word 0x0 8. "ACMD,Auto CMD Error" "0: No Error,1: Error" bitfld.word 0x0 7. "CURLIM,Current Limit Error" "0: No Error,1: Power Fail" newline bitfld.word 0x0 6. "DATEND,Data End Bit Error" "0: No Error,1: Error" bitfld.word 0x0 5. "DATCRC,Data CRC Error" "0: No Error,1: Error" newline bitfld.word 0x0 4. "DATTEO,Data Timeout Error" "0: No Error,1: Timeout" bitfld.word 0x0 3. "CMDIDX,Command Index Error" "0: No Error,1: Error" newline bitfld.word 0x0 2. "CMDEND,Command End Bit Error" "0: No error,1: End Bit Error Generated" bitfld.word 0x0 1. "CMDCRC,Command CRC Error" "0: No Error,1: CRC Error Generated" newline bitfld.word 0x0 0. "CMDTEO,Command Timeout Error" "0: No Error,1: Timeout" line.word 0x2 "NISTER,Normal Interrupt Status Enable" bitfld.word 0x2 8. "CINT,Card Interrupt Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 7. "CREM,Card Removal Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 6. "CINS,Card Insertion Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 3. "DMAINT,DMA Interrupt Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 2. "BLKGE,Block Gap Event Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 1. "TRFC,Transfer Complete Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 0. "CMDC,Command Complete Status Enable" "0: Masked,1: Enabled" group.word 0x34++0x3 line.word 0x0 "NISTER_EMMC_MODE,Normal Interrupt Status Enable" bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received Status Enable" "0,1" bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "DMAINT,DMA Interrupt Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "BLKGE,Block Gap Event Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "TRFC,Transfer Complete Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDC,Command Complete Status Enable" "0: Masked,1: Enabled" line.word 0x2 "EISTER,Error Interrupt Status Enable" bitfld.word 0x2 9. "ADMA,ADMA Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 8. "ACMD,Auto CMD Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 7. "CURLIM,Current Limit Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 6. "DATEND,Data End Bit Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 5. "DATCRC,Data CRC Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 4. "DATTEO,Data Timeout Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 3. "CMDIDX,Command Index Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 2. "CMDEND,Command End Bit Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 1. "CMDCRC,Command CRC Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Status Enable" "0: Masked,1: Enabled" group.word 0x36++0x3 line.word 0x0 "EISTER_EMMC_MODE,Error Interrupt Status Enable" bitfld.word 0x0 12. "BOOTAE,Boot Acknowledge Error Status Enable" "0,1" bitfld.word 0x0 9. "ADMA,ADMA Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 8. "ACMD,Auto CMD Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 7. "CURLIM,Current Limit Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 6. "DATEND,Data End Bit Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 5. "DATCRC,Data CRC Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "DATTEO,Data Timeout Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "CMDIDX,Command Index Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "CMDEND,Command End Bit Error Status Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "CMDCRC,Command CRC Error Status Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Status Enable" "0: Masked,1: Enabled" line.word 0x2 "NISIER,Normal Interrupt Signal Enable" bitfld.word 0x2 8. "CINT,Card Interrupt Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 7. "CREM,Card Removal Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 6. "CINS,Card Insertion Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 5. "BRDRDY,Buffer Read Ready Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 4. "BWRRDY,Buffer Write Ready Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 3. "DMAINT,DMA Interrupt Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 2. "BLKGE,Block Gap Event Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 1. "TRFC,Transfer Complete Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 0. "CMDC,Command Complete Signal Enable" "0: Masked,1: Enabled" group.word 0x38++0x3 line.word 0x0 "NISIER_EMMC_MODE,Normal Interrupt Signal Enable" bitfld.word 0x0 14. "BOOTAR,Boot Acknowledge Received Signal Enable" "0,1" bitfld.word 0x0 5. "BRDRDY,Buffer Read Ready Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "BWRRDY,Buffer Write Ready Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "DMAINT,DMA Interrupt Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "BLKGE,Block Gap Event Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "TRFC,Transfer Complete Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDC,Command Complete Signal Enable" "0: Masked,1: Enabled" line.word 0x2 "EISIER,Error Interrupt Signal Enable" bitfld.word 0x2 9. "ADMA,ADMA Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 8. "ACMD,Auto CMD Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 7. "CURLIM,Current Limit Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 6. "DATEND,Data End Bit Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 5. "DATCRC,Data CRC Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 4. "DATTEO,Data Timeout Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 3. "CMDIDX,Command Index Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 2. "CMDEND,Command End Bit Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x2 1. "CMDCRC,Command CRC Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x2 0. "CMDTEO,Command Timeout Error Signal Enable" "0: Masked,1: Enabled" group.word 0x3A++0x1 line.word 0x0 "EISIER_EMMC_MODE,Error Interrupt Signal Enable" bitfld.word 0x0 12. "BOOTAE,Boot Acknowledge Error Signal Enable" "0,1" bitfld.word 0x0 9. "ADMA,ADMA Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 8. "ACMD,Auto CMD Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 7. "CURLIM,Current Limit Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 6. "DATEND,Data End Bit Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 5. "DATCRC,Data CRC Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 4. "DATTEO,Data Timeout Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 3. "CMDIDX,Command Index Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 2. "CMDEND,Command End Bit Error Signal Enable" "0: Masked,1: Enabled" bitfld.word 0x0 1. "CMDCRC,Command CRC Error Signal Enable" "0: Masked,1: Enabled" newline bitfld.word 0x0 0. "CMDTEO,Command Timeout Error Signal Enable" "0: Masked,1: Enabled" rgroup.word 0x3C++0x1 line.word 0x0 "ACESR,Auto CMD Error Status" bitfld.word 0x0 7. "CMDNI,Command not Issued By Auto CMD12 Error" "0: No error,1: Not Issued" bitfld.word 0x0 4. "ACMDIDX,Auto CMD Index Error" "0: No error,1: Error" newline bitfld.word 0x0 3. "ACMDEND,Auto CMD End Bit Error" "0: No error,1: End Bit Error Generated" bitfld.word 0x0 2. "ACMDCRC,Auto CMD CRC Error" "0: No error,1: CRC Error Generated" newline bitfld.word 0x0 1. "ACMDTEO,Auto CMD Timeout Error" "0: No error,1: Timeout" bitfld.word 0x0 0. "ACMD12NE,Auto CMD12 Not Executed" "0: Executed,1: Not executed" group.word 0x3E++0x1 line.word 0x0 "HC2R,Host Control 2" bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver Strength are controlled by Host..,1: Automatic Selection by Preset Value is Enabled" bitfld.word 0x0 14. "ASINTEN,Asynchronous Interrupt Enable" "0: Disabled,1: Enabled" newline bitfld.word 0x0 7. "SLCKSEL,Sampling Clock Select" "0: Fixed clock is used to sample data,1: Tuned clock is used to sample data" bitfld.word 0x0 6. "EXTUN,Execute Tuning" "0: Not Tuned or Tuning Completed,1: Execute Tuning" newline bitfld.word 0x0 4.--5. "DRVSEL,Driver Strength Select" "0: Driver Type B is Selected (Default),1: Driver Type A is Selected,2: Driver Type C is Selected,3: Driver Type D is Selected" bitfld.word 0x0 3. "VS18EN,1.8V Signaling Enable" "0: 3.3V Signaling,1: 1.8V Signaling" newline bitfld.word 0x0 0.--2. "UHSMS,UHS Mode Select" "0: SDR12,1: SDR25,2: SDR50,3: SDR104,4: DDR50,?,?,?" group.word 0x3E++0x1 line.word 0x0 "HC2R_EMMC_MODE,Host Control 2" bitfld.word 0x0 15. "PVALEN,Preset Value Enable" "0: SDCLK and Driver Strength are controlled by Host..,1: Automatic Selection by Preset Value is Enabled" bitfld.word 0x0 7. "SLCKSEL,Sampling Clock Select" "0: Fixed clock is used to sample data,1: Tuned clock is used to sample data" newline bitfld.word 0x0 6. "EXTUN,Execute Tuning" "0: Not Tuned or Tuning Completed,1: Execute Tuning" bitfld.word 0x0 4.--5. "DRVSEL,Driver Strength Select" "0: Driver Type B is Selected (Default),1: Driver Type A is Selected,2: Driver Type C is Selected,3: Driver Type D is Selected" newline hexmask.word.byte 0x0 0.--3. 1. "HS200EN,HS200 Mode Enable" group.long 0x40++0x7 line.long 0x0 "CA0R,Capabilities 0" bitfld.long 0x0 30.--31. "SLTYPE,Slot Type" "0: Removable Card Slot,1: Embedded Slot for One Device,?,?" bitfld.long 0x0 29. "ASINTSUP,Asynchronous Interrupt Support" "0: Asynchronous Interrupt not Supported,1: Asynchronous Interrupt supported" newline bitfld.long 0x0 28. "SB64SUP,64-Bit System Bus Support" "0: 32-bit Address Descriptors and System Bus,1: 64-bit Address Descriptors and System Bus" bitfld.long 0x0 26. "V18VSUP,Voltage Support 1.8V" "0: 1.8V Not Supported,1: 1.8V Supported" newline bitfld.long 0x0 25. "V30VSUP,Voltage Support 3.0V" "0: 3.0V Not Supported,1: 3.0V Supported" bitfld.long 0x0 24. "V33VSUP,Voltage Support 3.3V" "0: 3.3V Not Supported,1: 3.3V Supported" newline bitfld.long 0x0 23. "SRSUP,Suspend/Resume Support" "0: Suspend/Resume not Supported,1: Suspend/Resume Supported" bitfld.long 0x0 22. "SDMASUP,SDMA Support" "0: SDMA not Supported,1: SDMA Supported" newline bitfld.long 0x0 21. "HSSUP,High Speed Support" "0: High Speed not Supported,1: High Speed Supported" bitfld.long 0x0 19. "ADMA2SUP,ADMA2 Support" "0: ADMA2 not Supported,1: ADMA2 Supported" newline bitfld.long 0x0 18. "ED8SUP,8-bit Support for Embedded Device" "0: 8-bit Bus Width not Supported,1: 8-bit Bus Width Supported" bitfld.long 0x0 16.--17. "MAXBLKL,Max Block Length" "0: 512 bytes,1: 1024 bytes,2: 2048 bytes,?" newline hexmask.long.byte 0x0 8.--15. 1. "BASECLKF,Base Clock Frequency" bitfld.long 0x0 7. "TEOCLKU,Timeout Clock Unit" "0: KHz,1: MHz" newline hexmask.long.byte 0x0 0.--5. 1. "TEOCLKF,Timeout Clock Frequency" line.long 0x4 "CA1R,Capabilities 1" hexmask.long.byte 0x4 16.--23. 1. "CLKMULT,Clock Multiplier" bitfld.long 0x4 13. "TSDR50,Use Tuning for SDR50" "0: SDR50 does not require tuning,1: SDR50 requires tuning" newline hexmask.long.byte 0x4 8.--11. 1. "TCNTRT,Timer Count for Re-Tuning" bitfld.long 0x4 6. "DRVDSUP,Driver Type D Support" "0: Driver Type D is Not Supported,1: Driver Type D is Supported" newline bitfld.long 0x4 5. "DRVCSUP,Driver Type C Support" "0: Driver Type C is Not Supported,1: Driver Type C is Supported" bitfld.long 0x4 4. "DRVASUP,Driver Type A Support" "0: Driver Type A is Not Supported,1: Driver Type A is Supported" newline bitfld.long 0x4 2. "DDR50SUP,DDR50 Support" "0: DDR50 is Not Supported,1: DDR50 is Supported" bitfld.long 0x4 1. "SDR104SUP,SDR104 Support" "0: SDR104 is Not Supported,1: SDR104 is Supported" newline bitfld.long 0x4 0. "SDR50SUP,SDR50 Support" "0: SDR50 is Not Supported,1: SDR50 is Supported" rgroup.long 0x48++0x3 line.long 0x0 "MCCAR,Maximum Current Capabilities" hexmask.long.byte 0x0 16.--23. 1. "MAXCUR18V,Maximum Current for 1.8V" hexmask.long.byte 0x0 8.--15. 1. "MAXCUR30V,Maximum Current for 3.0V" newline hexmask.long.byte 0x0 0.--7. 1. "MAXCUR33V,Maximum Current for 3.3V" wgroup.word 0x50++0x3 line.word 0x0 "FERACES,Force Event for Auto CMD Error Status" bitfld.word 0x0 7. "CMDNI,Force Event for Command Not Issued By Auto CMD12 Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x0 4. "ACMDIDX,Force Event for Auto CMD Index Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x0 3. "ACMDEND,Force Event for Auto CMD End Bit Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x0 2. "ACMDCRC,Force Event for Auto CMD CRC Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x0 1. "ACMDTEO,Force Event for Auto CMD Timeout Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x0 0. "ACMD12NE,Force Event for Auto CMD12 Not Executed" "0: No Interrupt,1: Interrupt is generated" line.word 0x2 "FEREIS,Force Event for Error Interrupt Status" bitfld.word 0x2 12. "BOOTAE,Force Event for Boot Acknowledge Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 9. "ADMA,Force Event for ADMA Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 8. "ACMD,Force Event for Auto CMD Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 7. "CURLIM,Force Event for Current Limit Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 6. "DATEND,Force Event for Data End Bit Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 5. "DATCRC,Force Event for Data CRC Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 4. "DATTEO,Force Event for Data Timeout Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 3. "CMDIDX,Force Event for Command Index Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 2. "CMDEND,Force Event for Command End Bit Error" "0: No Interrupt,1: Interrupt is generated" bitfld.word 0x2 1. "CMDCRC,Force Event for Command CRC Error" "0: No Interrupt,1: Interrupt is generated" newline bitfld.word 0x2 0. "CMDTEO,Force Event for Command Timeout Error" "0: No Interrupt,1: Interrupt is generated" rgroup.byte 0x54++0x0 line.byte 0x0 "AESR,ADMA Error Status" bitfld.byte 0x0 2. "LMIS,ADMA Length Mismatch Error" "0: No Error,1: Error" bitfld.byte 0x0 0.--1. "ERRST,ADMA Error State" "0: ST_STOP (Stop DMA),1: ST_FDS (Fetch Descriptor),?,3: ST_TFR (Transfer Data)" group.long 0x58++0x3 line.long 0x0 "ASAR,ADMA System Address n" hexmask.long 0x0 0.--31. 1. "ADMASA,ADMA System Address" repeat 3. (increment 0x0 0x1)(increment 0x0 0x2) group.word ($2+0x60)++0x1 line.word 0x0 "PVR[$1],Preset Value n" bitfld.word 0x0 14.--15. "DRVSEL,Driver Strength Select Value for Initialization" "0: Driver Type B is Selected,1: Driver Type A is Selected,2: Driver Type C is Selected,3: Driver Type D is Selected" bitfld.word 0x0 10. "CLKGSEL,Clock Generator Select Value for Initialization" "0: Host Controller Ver2.00 Compatible Clock..,1: Programmable Clock Generator" newline hexmask.word 0x0 0.--9. 1. "SDCLKFSEL,SDCLK Frequency Select Value for Initialization" repeat.end rgroup.word 0xFC++0x3 line.word 0x0 "SISR,Slot Interrupt Status" bitfld.word 0x0 0.--1. "INTSSL,Interrupt Signal for Each Slot" "0,1,2,3" line.word 0x2 "HCVR,Host Controller Version" hexmask.word.byte 0x2 8.--15. 1. "VVER,Vendor Version" hexmask.word.byte 0x2 0.--7. 1. "SVER,Spec Version" group.byte 0x204++0x0 line.byte 0x0 "MC1R,e.MMC Control 1" bitfld.byte 0x0 7. "FCD,e.MMC Force Card Detect" "0,1" bitfld.byte 0x0 6. "RSTN,e.MMC Reset Signal" "0,1" newline bitfld.byte 0x0 5. "BOOTA,e.MMC Boot Acknowledge Enable" "0,1" bitfld.byte 0x0 4. "OPD,e.MMC Open Drain Mode" "0,1" newline bitfld.byte 0x0 3. "DDR,e.MMC HSDDR Mode" "0,1" bitfld.byte 0x0 0.--1. "CMDTYP,e.MMC Command Type" "0: Not a MMC specific command,1: Wait IRQ Command,2: Stream Command,3: Boot Command" wgroup.byte 0x205++0x0 line.byte 0x0 "MC2R,e.MMC Control 2" bitfld.byte 0x0 1. "ABOOT,e.MMC Abort Boot" "0,1" bitfld.byte 0x0 0. "SRESP,e.MMC Abort Wait IRQ" "0,1" group.byte 0x207++0x0 line.byte 0x0 "DEBR,Debounce Register" bitfld.byte 0x0 0.--1. "CDDVAL,Card Detect Debounce Value" "0: 1 slow clock cycle,1: 8 slow clock cycles,2: 33 slow clock cycle,3: 328 slow clock cycle" group.long 0x208++0x7 line.long 0x0 "ACR,AHB Control" bitfld.long 0x0 0.--1. "BMAX,AHB Maximum Burst" "0,1,2,3" line.long 0x4 "CC2R,Clock Control 2" bitfld.long 0x4 0. "FSDCLKD,Force SDCK Disabled" "0: No effect,1: SDCLK can be stopped at any time after DATA.." group.long 0x230++0x7 line.long 0x0 "CACR,Capabilities Control" hexmask.long.byte 0x0 8.--15. 1. "KEY,Key (0x46)" bitfld.long 0x0 0. "CAPWREN,Capabilities Registers Write Enable (Required to write the correct frequencies in the Capabilities Registers)" "0,1" line.long 0x4 "DBGR,Debug" bitfld.long 0x4 0. "NIDBG,Non-intrusive debug enable" "0: Debugging is intrusive (reads of BDPR from..,1: Debugging is not intrusive (reads of BDPR from.." tree.end tree.end tree "SERCOM (Serial Communication Interface)" base ad:0x0 tree "SERCOM0" base ad:0x46000000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM1" base ad:0x46002000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM2" base ad:0x45800000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM3" base ad:0x45802000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM4" base ad:0x46004000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM5" base ad:0x45804000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM6" base ad:0x45806000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM7" base ad:0x45000000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM8" base ad:0x45002000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree "SERCOM9" base ad:0x45004000 tree "I2CM (I2C Master Mode)" group.long 0x0++0xF line.long 0x0 "CTRLA,I2CM Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 28.--29. "INACTOUT,Inactive Time-Out" "0: Disable,1: 5-6 SCL cycle time-out,2: 10-11 SCL cycle time-out,3: 20-21-6 SCL cycle time-out" newline bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" newline bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" bitfld.long 0x0 22. "MEXTTOEN,Master SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0: Disable,?,2: Minimum 50ns filter,3: Minimum 10ns filter" bitfld.long 0x0 7. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 9. "QCEN,Quick Command Enable" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" line.long 0xC "BAUD,I2CM Baud Rate" hexmask.long.byte 0xC 24.--31. 1. "HSBAUDLOW,High Speed Baud Rate Value Low" hexmask.long.byte 0xC 16.--23. 1. "HSBAUD,High Speed Baud Rate Value" newline hexmask.long.byte 0xC 8.--15. 1. "BAUDLOW,Baud Rate Value Low" hexmask.long.byte 0xC 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 1. "SB,Slave On Bus Interrupt" "0,1" newline bitfld.byte 0x0 0. "MB,Master On Bus Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CM Status" bitfld.word 0x0 10. "LENERR,Length Error" "0,1" bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" newline bitfld.word 0x0 8. "MEXTTOUT,Master SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4.--5. "BUSSTATE,Bus State" "0,1,2,3" newline bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" bitfld.word 0x0 1. "ARBLOST,Arbitration Lost" "0,1" newline bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CM Address" hexmask.long.byte 0x0 16.--23. 1. "LEN,Length" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline bitfld.long 0x0 14. "HS,High Speed Mode" "0,1" bitfld.long 0x0 13. "LENEN,Length Enable" "0,1" newline hexmask.long.word 0x0 0.--10. 1. "ADDR,Address Value" line.long 0x4 "DATA,I2CM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,I2CM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "I2CS (I2C Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,I2CS Control A" bitfld.long 0x0 30. "LOWTOUTEN,SCL Low Timeout Enable" "0,1" bitfld.long 0x0 27. "SCLSM,SCL Clock Stretch Mode" "0,1" newline bitfld.long 0x0 24.--25. "SPEED,Transfer Speed" "0: Standard-Mode (SM) and Fast-Mode (FM),1: Fast-Mode Plus (FM+),2: High-Speed Mode,?" bitfld.long 0x0 23. "SEXTTOEN,Slave SCL Low Extend Timeout" "0,1" newline bitfld.long 0x0 20.--21. "SDAHOLD,SDA Hold Time" "0: Disable,1: 50ns - 100ns hold time,2: 300ns - 600ns hold time,3: 400ns - 800ns hold time" bitfld.long 0x0 17. "SMBUSEN,SMBUS Input Buffer Enable" "0,1" newline bitfld.long 0x0 16. "PINOUT,Pin Usage" "0,1" bitfld.long 0x0 10.--11. "SLEWRATE,Slew Rate Selection" "0: Standard mode,1: Fast mode,2: Fast mode plus,3: High-speed mode" newline bitfld.long 0x0 8.--9. "FILTSEL,Input Filter Selection" "0,1,2,3" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,I2CS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 18. "ACKACT,Acknowledge Action" "0,1" newline bitfld.long 0x4 16.--17. "CMD,Command" "0,1,2,3" bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: The slave responds to the address written in..,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" newline bitfld.long 0x4 10. "AACKEN,Automatic Address Acknowledge" "0,1" bitfld.long 0x4 9. "GCMD,PMBus Group Command" "0,1" newline bitfld.long 0x4 8. "SMEN,Smart Mode Enable" "0,1" line.long 0x8 "CTRLC,I2CS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline hexmask.long.byte 0x8 0.--3. 1. "SDASETUP,SDA Setup Time" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,I2CS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Disable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Disable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Disable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Disable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,I2CS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt Enable" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,I2CS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 4. "RXFF,Rx FIFO Full Interrupt" "0,1" newline bitfld.byte 0x0 3. "TXFE,Tx FIFO Empty Interrupt" "0,1" bitfld.byte 0x0 2. "DRDY,Data Interrupt" "0,1" newline bitfld.byte 0x0 1. "AMATCH,Address Match Interrupt" "0,1" bitfld.byte 0x0 0. "PREC,Stop Received Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,I2CS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 10. "HS,High Speed" "0,1" newline bitfld.word 0x0 9. "SEXTTOUT,Slave SCL Low Extend Timeout" "0,1" bitfld.word 0x0 7. "CLKHOLD,Clock Hold" "0,1" newline bitfld.word 0x0 6. "LOWTOUT,SCL Low Timeout" "0,1" bitfld.word 0x0 4. "SR,Repeated Start" "0,1" newline bitfld.word 0x0 3. "DIR,Read/Write Direction" "0,1" bitfld.word 0x0 2. "RXNACK,Received Not Acknowledge" "0,1" newline bitfld.word 0x0 1. "COLL,Transmit Collision" "0,1" bitfld.word 0x0 0. "BUSERR,Bus Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,I2CS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,Length Synchronization Busy" "0,1" bitfld.long 0x0 2. "SYSOP,System Operation Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,I2CS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,I2CS Address" hexmask.long.word 0x0 17.--26. 1. "ADDRMASK,Address Mask" bitfld.long 0x0 15. "TENBITEN,Ten Bit Addressing Enable" "0,1" newline hexmask.long.word 0x0 1.--10. 1. "ADDR,Address Value" bitfld.long 0x0 0. "GENCEN,General Call Address Enable" "0,1" line.long 0x4 "DATA,I2CS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,I2CS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,I2CS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIM (SPI Master Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIM Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIM Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0: Hardware SS control is disabled,1: Hardware SS control is enabled" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0: SS low detector is disabled,1: SS low detector is enabled" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIM Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIM Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIM Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIM Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIM Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIM Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIM Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIM Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIM Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIM Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIM Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIM FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIM FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "SPIS (SPI Slave Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,SPIS Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first,1: LSB is transmitted first" bitfld.long 0x0 29. "CPOL,Clock Polarity" "0: SCK is low when idle,1: SCK is high when idle" newline bitfld.long 0x0 28. "CPHA,Clock Phase" "0: The data is sampled on a leading SCK edge and..,1: The data is sampled on a trailing SCK edge and.." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 20.--21. "DIPO,Data In Pinout" "0: SERCOM PAD0 is used as data input,1: SERCOM PAD1 is used as data input,2: SERCOM PAD2 is used as data input,3: SERCOM PAD3 is used as data input" bitfld.long 0x0 16.--17. "DOPO,Data Out Pinout" "0: DO on PAD[0] SCK on PAD[1] and SS on PAD[2],?,2: DO on PAD[3] SCK on PAD[1] and SS on PAD[2],?" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,SPIS Control B" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" newline bitfld.long 0x4 14.--15. "AMODE,Address Mode" "0: ADDRMASK is used as a mask to the AADR register,1: The slave responds to the two unique addresses..,2: The slave responds to the range of addresses..,?" bitfld.long 0x4 13. "MSSEN,Master Slave Select Enable" "0,1" newline bitfld.long 0x4 9. "SSDE,Slave Select Low Detect Enable" "0,1" bitfld.long 0x4 6. "PLOADEN,Data Preload Enable" "0,1" newline bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,?,?,?" line.long 0x8 "CTRLC,SPIS Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated as long..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24. "DATA32B,Data 32 Bit" "0,1" newline bitfld.long 0x8 17. "FMODE,Frame mode" "0: Frame Master,1: Frame Slave" bitfld.long 0x8 16. "FRMEN,Frame mode enable" "0,1" newline bitfld.long 0x8 11. "IGNTUR,Ignore Transmit Underrun" "0,1" bitfld.long 0x8 10. "FSPOL,Frame Synch Polarity" "0: VCC-level valid polarity,1: GND-level valid polarity" newline bitfld.long 0x8 9. "FSLEN,Frame Synch Length" "0: One SCK pulse,1: One frame duration" bitfld.long 0x8 8. "FSES,Frame Synch Edge Select" "0,1" newline hexmask.long.byte 0x8 0.--5. 1. "ICSPACE,Inter-Character Spacing" group.byte 0xC++0x0 line.byte 0x0 "BAUD,SPIS Baud Rate" hexmask.byte 0x0 0.--7. 1. "BAUD,Baud Rate Value" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,SPIS Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,SPIS Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,SPIS Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 3. "SSL,Slave Select Low Interrupt Flag" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,SPIS Status" bitfld.word 0x0 11. "LENERR,Transaction Length Error" "0,1" bitfld.word 0x0 3. "TUR,Frame Transmit Underrun" "0,1" newline bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,SPIS Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" group.word 0x22++0x1 line.word 0x0 "LENGTH,SPIS Length" bitfld.word 0x0 8. "LENEN,Data Length Enable" "0,1" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x24++0x7 line.long 0x0 "ADDR,SPIS Address" hexmask.long.byte 0x0 16.--23. 1. "ADDRMASK,Address Mask" hexmask.long.byte 0x0 0.--7. 1. "ADDR,Address Value" line.long 0x4 "DATA,SPIS Data" hexmask.long 0x4 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,SPIS Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,SPIS FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,SPIS FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree "USART_INT (USART INTERNAL CLOCK Mode)" group.long 0x0++0xB line.long 0x0 "CTRLA,USART Control A" bitfld.long 0x0 30. "DORD,Data Order" "0: MSB is transmitted first.,1: LSB is transmitted first." bitfld.long 0x0 29. "CPOL,Clock Polarity" "0,1" newline bitfld.long 0x0 28. "CMODE,Communication Mode" "0: Asynchronous communication.,1: Synchronous communication." hexmask.long.byte 0x0 24.--27. 1. "FORM,Frame Format" newline bitfld.long 0x0 22.--23. "SAMPA,Sample Adjustment" "0,1,2,3" bitfld.long 0x0 20.--21. "RXPO,Receive Data Pinout" "0: SERCOM PAD0 is used for data reception,1: SERCOM PAD1 is used for data reception,2: SERCOM PAD2 is used for data reception,3: SERCOM PAD3 is used for data reception" newline bitfld.long 0x0 16.--17. "TXPO,Transmit Data Pinout" "0: PAD[0] = TxD; PAD[1] = XCK,?,2: PAD[0] = TxD; PAD[2] = RTS; PAD[3] = CTS,3: PAD[0] = TxD; PAD[1] = XCK; PAD[2] = TE" bitfld.long 0x0 13.--15. "SAMPR,Sample" "0: 16x oversampling using arithmetic baud rate..,1: 16x oversampling using fractional baud rate..,2: 8x oversampling using arithmetic baud rate..,3: 8x oversampling using fractional baud rate..,4: 3x oversampling using arithmetic baud rate..,?,?,?" newline bitfld.long 0x0 10. "RXINV,Receive Data Invert" "0: RxD is not inverted,1: RxD is inverted" bitfld.long 0x0 9. "TXINV,Transmit Data Invert" "0: TxD is not inverted,1: TxD is inverted" newline bitfld.long 0x0 8. "IBON,Immediate Buffer Overflow Notification" "0,1" bitfld.long 0x0 7. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x0 2.--4. "MODE,Operating Mode" "0: USART with external clock,1: USART with internal clock,2: SPI in slave operation,3: SPI in master operation,4: I2C slave operation,5: I2C master operation,?,?" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "CTRLB,USART Control B" bitfld.long 0x4 24.--25. "LINCMD,LIN Command" "0: Normal USART transmission,1: Break field is transmitted when DATA is written,2: Break synch and identifier are automaticcaly..,?" bitfld.long 0x4 22.--23. "FIFOCLR,FIFO Clear" "0: No action,1: Clear TX FIFO,2: Clear RX FIFO,3: Clear both TX and RF FIFOs" newline bitfld.long 0x4 17. "RXEN,Receiver Enable" "0,1" bitfld.long 0x4 16. "TXEN,Transmitter Enable" "0,1" newline bitfld.long 0x4 13. "PMODE,Parity Mode" "0: Even parity,1: Odd parity" bitfld.long 0x4 10. "ENC,Encoding Format" "0: Data is not encoded,1: Data is IrDA encoded" newline bitfld.long 0x4 9. "SFDE,Start of Frame Detection Enable" "0,1" bitfld.long 0x4 8. "COLDEN,Collision Detection Enable" "0,1" newline bitfld.long 0x4 6. "SBMODE,Stop Bit Mode" "0: One stop bit,1: Two stop bits" bitfld.long 0x4 0.--2. "CHSIZE,Character Size" "0: 8-bits character,1: 9-bits character,?,?,?,5: 5-bits character,6: 6-bits character,7: 7-bits character" line.long 0x8 "CTRLC,USART Control C" bitfld.long 0x8 30.--31. "TXTRHOLD,Transmit FIFO Threshold" "0: Interrupt and DMA triggers are generated as long..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" bitfld.long 0x8 28.--29. "RXTRHOLD,Receive FIFO Threshold" "0: Interrupt and DMA triggers are generated when..,1: Interrupt and DMA triggers are generated when..,2: Interrupt and DMA triggers are generated when..,?" newline bitfld.long 0x8 27. "FIFOEN,FIFO Enable" "0,1" bitfld.long 0x8 24.--25. "DATA32B,Data 32 Bit" "0,1,2,3" newline bitfld.long 0x8 20.--22. "MAXITER,Maximum Iterations" "0,1,2,3,4,5,6,7" bitfld.long 0x8 17. "DSNACK,Disable Successive NACK" "0,1" newline bitfld.long 0x8 16. "INACK,Inhibit Not Acknowledge" "0,1" bitfld.long 0x8 10.--11. "HDRDLY,LIN Master Header Delay" "0: Delay between break and sync transmission is..,1: Delay between break and sync transmission is..,2: Delay between break and sync transmission is..,3: Delay between break and sync transmission is.." newline bitfld.long 0x8 8.--9. "BRKLEN,LIN Master Break Length" "0: Break field transmission is 13 bit times,1: Break field transmission is 17 bit times,2: Break field transmission is 21 bit times,3: Break field transmission is 26 bit times" bitfld.long 0x8 0.--2. "GTIME,Guard Time" "0,1,2,3,4,5,6,7" group.word 0xC++0x1 line.word 0x0 "BAUD,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRAC_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_FRACFP_MODE,USART Baud Rate" bitfld.word 0x0 13.--15. "FP,Fractional Part" "0,1,2,3,4,5,6,7" hexmask.word 0x0 0.--12. 1. "BAUD,Baud Rate Value" group.word 0xC++0x1 line.word 0x0 "BAUD_USARTFP_MODE,USART Baud Rate" hexmask.word 0x0 0.--15. 1. "BAUD,Baud Rate Value" group.byte 0xE++0x0 line.byte 0x0 "RXPL,USART Receive Pulse Length" hexmask.byte 0x0 0.--7. 1. "RXPL,Receive Pulse Length" group.byte 0x14++0x0 line.byte 0x0 "INTENCLR,USART Interrupt Enable Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Disable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Disable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Disable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Disable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Disable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Disable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Disable" "0,1" group.byte 0x16++0x0 line.byte 0x0 "INTENSET,USART Interrupt Enable Set" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt Enable" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt Enable" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt Enable" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt Enable" "0,1" group.byte 0x18++0x0 line.byte 0x0 "INTFLAG,USART Interrupt Flag Status and Clear" bitfld.byte 0x0 7. "ERROR,Combined Error Interrupt" "0,1" bitfld.byte 0x0 5. "RXBRK,Break Received Interrupt" "0,1" newline bitfld.byte 0x0 4. "CTSIC,Clear To Send Input Change Interrupt" "0,1" bitfld.byte 0x0 3. "RXS,Receive Start Interrupt" "0,1" newline bitfld.byte 0x0 2. "RXC,Receive Complete Interrupt" "0,1" bitfld.byte 0x0 1. "TXC,Transmit Complete Interrupt" "0,1" newline bitfld.byte 0x0 0. "DRE,Data Register Empty Interrupt" "0,1" group.word 0x1A++0x1 line.word 0x0 "STATUS,USART Status" bitfld.word 0x0 7. "ITER,Maximum Number of Repetitions Reached" "0,1" bitfld.word 0x0 6. "TXE,Transmitter Empty" "0,1" newline bitfld.word 0x0 5. "COLL,Collision Detected" "0,1" bitfld.word 0x0 4. "ISF,Inconsistent Sync Field" "0,1" newline bitfld.word 0x0 3. "CTS,Clear To Send" "0,1" bitfld.word 0x0 2. "BUFOVF,Buffer Overflow" "0,1" newline bitfld.word 0x0 1. "FERR,Frame Error" "0,1" bitfld.word 0x0 0. "PERR,Parity Error" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "SYNCBUSY,USART Synchronization Busy" bitfld.long 0x0 4. "LENGTH,LENGTH Synchronization Busy" "0,1" bitfld.long 0x0 3. "RXERRCNT,RXERRCNT Synchronization Busy" "0,1" newline bitfld.long 0x0 2. "CTRLB,CTRLB Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,SERCOM Enable Synchronization Busy" "0,1" newline bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0,1" rgroup.byte 0x20++0x0 line.byte 0x0 "RXERRCNT,USART Receive Error Count" group.word 0x22++0x1 line.word 0x0 "LENGTH,USART Length" bitfld.word 0x0 8.--9. "LENEN,Data Length Enable" "0: Length counter is disabled,1: Length counter is enabled for transmit,2: Length counter is enabled for receive,?" hexmask.word.byte 0x0 0.--7. 1. "LEN,Data Length" group.long 0x28++0x3 line.long 0x0 "DATA,USART Data" hexmask.long 0x0 0.--31. 1. "DATA,Data Value" group.byte 0x30++0x0 line.byte 0x0 "DBGCTRL,USART Debug Control" bitfld.byte 0x0 0. "DBGSTOP,Debug Mode" "0,1" rgroup.word 0x34++0x1 line.word 0x0 "FIFOSPACE,USART FIFO Space" hexmask.word.byte 0x0 8.--12. 1. "RXSPACE,Rx FIFO Filled Space" hexmask.word.byte 0x0 0.--4. 1. "TXSPACE,Tx FIFO Empty Space" group.word 0x36++0x1 line.word 0x0 "FIFOPTR,USART FIFO CPU Pointers" hexmask.word.byte 0x0 8.--11. 1. "CPURDPTR,CPU FIFO Read Pointer" hexmask.word.byte 0x0 0.--3. 1. "CPUWRPTR,CPU FIFO Write Pointer" tree.end tree.end tree.end tree "SPI_IXS (SPI Audio)" base ad:0x0 tree "SPI_IXS0" base ad:0x46030000 group.long 0x0++0x23 line.long 0x0 "CTRLA,SPI Control Enable Register" bitfld.long 0x0 6. "RUNSTDBY,RUN STANDBY Mode Enable bit" "0,1" bitfld.long 0x0 1. "ENABLE,SPI Enable (ON) bit" "0,1" bitfld.long 0x0 0. "SWRST,SPI Software Reset" "0,1" line.long 0x4 "SELCTRL,SPI Control Options Select Register" bitfld.long 0x4 30.--31. "MODEEN,MACRO MODE ENABLED" "0: Default Mode,1: Audio Mode,2: Framed Mode,3: Broadcast Mode" bitfld.long 0x4 24. "DATFILL,DATFILL undefined bits 1 or 0" "0,1" bitfld.long 0x4 23. "TURSAMP,Transmit Under-run last sample sent" "0,1" newline bitfld.long 0x4 16. "DATFMTLR,Packed data format -- left or right justified" "0,1" bitfld.long 0x4 14. "IGNTUR,Ignore Transmit Underrun (for Audio Data Transmissions)" "0,1" bitfld.long 0x4 12.--13. "STXISEL,SPI Transmit Service Request Interrupt Select" "0: TXB And SR Empty,1: TXB Empty,2: TXB Half Empty,3: TXB Not Full" newline bitfld.long 0x4 11. "CPOL,Clock Polarity Select bit" "0,1" bitfld.long 0x4 10. "CPHA,SPI Clock Edge Select bit" "0,1" bitfld.long 0x4 6. "IGNROV,Ignore Receive Overflow (for Audio Data Transmissions)" "0,1" newline bitfld.long 0x4 4.--5. "SRXISEL,SPI Receive Service Request Interrupt Select" "0: RXB Empty,1: RXB Not Empty,2: RXB Half Full,3: RXB Full" bitfld.long 0x4 0.--1. "CLKINDLY,Serial Clock Input Delay for SDI sampling" "0: 0 Tap Delays,1: 1 Tap Delay,2: 2 Tap Delay,3: 3 Tap Delay" line.long 0x8 "SPICTRL,SPI Control Register" bitfld.long 0x8 10. "SMP,SPI Data Input Sample Phase bit" "0,1" bitfld.long 0x8 9. "SPISGNEXT,Sign Extend Read Data from the RX FIFO" "0,1" bitfld.long 0x8 6. "MSSEN,Master/Slave Mode Select Enable bit" "0,1" newline bitfld.long 0x8 5. "MSTEN,Master Mode Enable bit" "0,1" bitfld.long 0x8 4. "DISSDO,Disable SDO bit" "0,1" bitfld.long 0x8 3. "DISSDI,Disable SDI bit" "0,1" newline bitfld.long 0x8 0.--1. "MODE,Serial Word Length bits for AUDEN=0 not used when AUDEN=1" "0: 8 Bits Mode,1: 16 Bits Mode,2: 32 Bits Mode,?" line.long 0xC "FRAMECTRL,SPI Control Frame Register" bitfld.long 0xC 29.--31. "TDMWSZ,TDM Number of Bits in a Word Size" "0: Word Size 8,1: Word Size 12,2: Word Size 16,3: Word Size 20,4: Word Size 24,5: Word Size 28,6: Word Size 32,?" bitfld.long 0xC 24.--26. "TDMSSZ,TDM Number of Bits in a Slot Size" "0: Slot Size 8,1: Slot Size 12,2: Slot Size 16,3: Slot Size 20,4: Slot Size 24,5: Slot Size 28,6: Slot Size 32,?" hexmask.long.byte 0xC 16.--20. 1. "FRMCNT,Frame sync pulse counter" newline bitfld.long 0xC 14. "FRMSLV,Frame Sync Pulse Direction Control bit" "0,1" bitfld.long 0xC 13. "FRMPOL,Frame Sync / Slave Select Polarity bit" "0,1" bitfld.long 0xC 8. "FRMCOINC,Frame Sync Pulse Edge Select bit" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "FRMSYPW,Frame sync pulse width in serial words" line.long 0x10 "AUDCTRL,SPI Control Audio Register" bitfld.long 0x10 8.--9. "AUDWDMODE,Serial Word Length bits (Ignored when AUDEN=0)" "0,1,2,3" bitfld.long 0x10 4.--6. "AUDFMT,Audio Protocol Format" "0: Legacy I2S Mode,1: I2S Raw Audio Format,2: I2S Other AM824 Format,?,4: I8S Other Format,5: I8S Raw Audio Format,6: I8S Other AM824 Format,?" bitfld.long 0x10 3. "AUDMONO,Transmit audio data format" "0,1" newline bitfld.long 0x10 0.--1. "AUDMOD,Audio Protocol Mode" "0: I2S/I8S Standard Mode,1: I2S/I8S Left Or Right Justified,?,3: PCM/DSP Mode" line.long 0x14 "TPDCTRL,SPI Control Tpd Register" bitfld.long 0x14 8.--10. "SLVNUM,Number of the Slave designated: to be used with the PKFMT to determine the slave." "0: SLAVE 0,1: SLAVE 1,2: SLAVE 2,3: SLAVE 3,4: SLAVE 4,?,?,?" bitfld.long 0x14 0.--2. "PKFMT,Master Slave TPD mode." "0: 32 bit data in 4x32 packed format,1: 32 bit data in 3x32 packed format,2: 24 bit data in 4x24 packed format,3: 24 bit data in 3x24 packed format,4: 16 bit data in 6x16 packed format,5: 16 bit data in 4x16 packed format,6: 16 bit data in 2x16 packed format,?" line.long 0x18 "INTENSET,SPI Interrupt Enable Set Register" bitfld.long 0x18 30. "SPIROVEN,Enable Interrupt Events via SPIROV" "0,1" bitfld.long 0x18 27. "SPITUREN,Enable Interrupt Events via SPITUR" "0,1" bitfld.long 0x18 15. "FRMERREN,Enable Interrupt Events via FRMERR" "0,1" newline bitfld.long 0x18 4. "SPITXBEEN,Enablie Interrupt Events via SPITXBE" "0,1" bitfld.long 0x18 0. "SPIRXBFEN,Enablie Interrupt Events via SPIRXBF" "0,1" line.long 0x1C "INTENCLR,SPI Interrupt Enable Clear Register" bitfld.long 0x1C 30. "SPIROVEN,Enable Interrupt Events via SPIROV" "0,1" bitfld.long 0x1C 27. "SPITUREN,Enable Interrupt Events via SPITUR" "0,1" bitfld.long 0x1C 15. "FRMERREN,Enable Interrupt Events via FRMERR" "0,1" newline bitfld.long 0x1C 4. "SPITXBEEN,Enablie Interrupt Events via SPITXBE" "0,1" bitfld.long 0x1C 0. "SPIRXBFEN,Enablie Interrupt Events via SPIRXBF" "0,1" line.long 0x20 "INTFLAG,SPI Interrupt Flag Register" bitfld.long 0x20 30. "SPIROV,Receive Overflow Status bit" "0,1" bitfld.long 0x20 27. "SPITUR,Transmit Underrun Status bit" "0,1" bitfld.long 0x20 15. "FRMERR,SPI Frame Error Status bit" "0,1" newline bitfld.long 0x20 4. "SPITXBE,SPI Transmit Buffer Empty Status Bit" "0,1" bitfld.long 0x20 0. "SPIRXBF,SPI Receive Buffer Full Status Bit" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "STATUS,SPI Status Register" bitfld.long 0x0 31. "SPIRBE,RX Buffer Empty bit" "0,1" bitfld.long 0x0 29. "SPIRBF,SPI Receive Buffer Full status bit" "0,1" bitfld.long 0x0 28. "SPITBE,SPI Transmit Buffer Empty status bit" "0,1" newline bitfld.long 0x0 26. "SPITBF,SPI Transmit Buffer Full Status bit" "0,1" hexmask.long.word 0x0 16.--24. 1. "TXBUFELM,Transmit Buffer Element Count bits" bitfld.long 0x0 14. "SPIBUSY,SPI activity status bit" "0,1" newline bitfld.long 0x0 13. "SRMT,Register (SR) Empty bit" "0,1" hexmask.long.word 0x0 0.--8. 1. "RXBUFELM,Receive Buffer Element Count bits" group.long 0x28++0xB line.long 0x0 "BUF,SPI Buffer Register" hexmask.long 0x0 0.--31. 1. "DATA,FIFO Data bits" line.long 0x4 "BRG,SPI Baud Rate Register" hexmask.long.word 0x4 0.--12. 1. "BRG,Baud Rate Divisor bits" line.long 0x8 "DBGCTRL,SPI Debug Control Register" bitfld.long 0x8 0. "DBGRUN,Debug Running State" "0,1" rgroup.long 0x34++0x3 line.long 0x0 "SYNCBUSY,SPI Sync Busy Register" bitfld.long 0x0 0. "SWRSTBSY,Software reset busy bit --- Synchronizing Busy bit for swrst" "0,1" group.long 0x38++0x3 line.long 0x0 "EVCTRL,SPI Event Control Register" bitfld.long 0x0 0. "FPSEEN,Frame Pulse Event Enable Bit" "0,1" tree.end tree "SPI_IXS1" base ad:0x45030000 group.long 0x0++0x23 line.long 0x0 "CTRLA,SPI Control Enable Register" bitfld.long 0x0 6. "RUNSTDBY,RUN STANDBY Mode Enable bit" "0,1" bitfld.long 0x0 1. "ENABLE,SPI Enable (ON) bit" "0,1" bitfld.long 0x0 0. "SWRST,SPI Software Reset" "0,1" line.long 0x4 "SELCTRL,SPI Control Options Select Register" bitfld.long 0x4 30.--31. "MODEEN,MACRO MODE ENABLED" "0: Default Mode,1: Audio Mode,2: Framed Mode,3: Broadcast Mode" bitfld.long 0x4 24. "DATFILL,DATFILL undefined bits 1 or 0" "0,1" bitfld.long 0x4 23. "TURSAMP,Transmit Under-run last sample sent" "0,1" newline bitfld.long 0x4 16. "DATFMTLR,Packed data format -- left or right justified" "0,1" bitfld.long 0x4 14. "IGNTUR,Ignore Transmit Underrun (for Audio Data Transmissions)" "0,1" bitfld.long 0x4 12.--13. "STXISEL,SPI Transmit Service Request Interrupt Select" "0: TXB And SR Empty,1: TXB Empty,2: TXB Half Empty,3: TXB Not Full" newline bitfld.long 0x4 11. "CPOL,Clock Polarity Select bit" "0,1" bitfld.long 0x4 10. "CPHA,SPI Clock Edge Select bit" "0,1" bitfld.long 0x4 6. "IGNROV,Ignore Receive Overflow (for Audio Data Transmissions)" "0,1" newline bitfld.long 0x4 4.--5. "SRXISEL,SPI Receive Service Request Interrupt Select" "0: RXB Empty,1: RXB Not Empty,2: RXB Half Full,3: RXB Full" bitfld.long 0x4 0.--1. "CLKINDLY,Serial Clock Input Delay for SDI sampling" "0: 0 Tap Delays,1: 1 Tap Delay,2: 2 Tap Delay,3: 3 Tap Delay" line.long 0x8 "SPICTRL,SPI Control Register" bitfld.long 0x8 10. "SMP,SPI Data Input Sample Phase bit" "0,1" bitfld.long 0x8 9. "SPISGNEXT,Sign Extend Read Data from the RX FIFO" "0,1" bitfld.long 0x8 6. "MSSEN,Master/Slave Mode Select Enable bit" "0,1" newline bitfld.long 0x8 5. "MSTEN,Master Mode Enable bit" "0,1" bitfld.long 0x8 4. "DISSDO,Disable SDO bit" "0,1" bitfld.long 0x8 3. "DISSDI,Disable SDI bit" "0,1" newline bitfld.long 0x8 0.--1. "MODE,Serial Word Length bits for AUDEN=0 not used when AUDEN=1" "0: 8 Bits Mode,1: 16 Bits Mode,2: 32 Bits Mode,?" line.long 0xC "FRAMECTRL,SPI Control Frame Register" bitfld.long 0xC 29.--31. "TDMWSZ,TDM Number of Bits in a Word Size" "0: Word Size 8,1: Word Size 12,2: Word Size 16,3: Word Size 20,4: Word Size 24,5: Word Size 28,6: Word Size 32,?" bitfld.long 0xC 24.--26. "TDMSSZ,TDM Number of Bits in a Slot Size" "0: Slot Size 8,1: Slot Size 12,2: Slot Size 16,3: Slot Size 20,4: Slot Size 24,5: Slot Size 28,6: Slot Size 32,?" hexmask.long.byte 0xC 16.--20. 1. "FRMCNT,Frame sync pulse counter" newline bitfld.long 0xC 14. "FRMSLV,Frame Sync Pulse Direction Control bit" "0,1" bitfld.long 0xC 13. "FRMPOL,Frame Sync / Slave Select Polarity bit" "0,1" bitfld.long 0xC 8. "FRMCOINC,Frame Sync Pulse Edge Select bit" "0,1" newline hexmask.long.byte 0xC 0.--3. 1. "FRMSYPW,Frame sync pulse width in serial words" line.long 0x10 "AUDCTRL,SPI Control Audio Register" bitfld.long 0x10 8.--9. "AUDWDMODE,Serial Word Length bits (Ignored when AUDEN=0)" "0,1,2,3" bitfld.long 0x10 4.--6. "AUDFMT,Audio Protocol Format" "0: Legacy I2S Mode,1: I2S Raw Audio Format,2: I2S Other AM824 Format,?,4: I8S Other Format,5: I8S Raw Audio Format,6: I8S Other AM824 Format,?" bitfld.long 0x10 3. "AUDMONO,Transmit audio data format" "0,1" newline bitfld.long 0x10 0.--1. "AUDMOD,Audio Protocol Mode" "0: I2S/I8S Standard Mode,1: I2S/I8S Left Or Right Justified,?,3: PCM/DSP Mode" line.long 0x14 "TPDCTRL,SPI Control Tpd Register" bitfld.long 0x14 8.--10. "SLVNUM,Number of the Slave designated: to be used with the PKFMT to determine the slave." "0: SLAVE 0,1: SLAVE 1,2: SLAVE 2,3: SLAVE 3,4: SLAVE 4,?,?,?" bitfld.long 0x14 0.--2. "PKFMT,Master Slave TPD mode." "0: 32 bit data in 4x32 packed format,1: 32 bit data in 3x32 packed format,2: 24 bit data in 4x24 packed format,3: 24 bit data in 3x24 packed format,4: 16 bit data in 6x16 packed format,5: 16 bit data in 4x16 packed format,6: 16 bit data in 2x16 packed format,?" line.long 0x18 "INTENSET,SPI Interrupt Enable Set Register" bitfld.long 0x18 30. "SPIROVEN,Enable Interrupt Events via SPIROV" "0,1" bitfld.long 0x18 27. "SPITUREN,Enable Interrupt Events via SPITUR" "0,1" bitfld.long 0x18 15. "FRMERREN,Enable Interrupt Events via FRMERR" "0,1" newline bitfld.long 0x18 4. "SPITXBEEN,Enablie Interrupt Events via SPITXBE" "0,1" bitfld.long 0x18 0. "SPIRXBFEN,Enablie Interrupt Events via SPIRXBF" "0,1" line.long 0x1C "INTENCLR,SPI Interrupt Enable Clear Register" bitfld.long 0x1C 30. "SPIROVEN,Enable Interrupt Events via SPIROV" "0,1" bitfld.long 0x1C 27. "SPITUREN,Enable Interrupt Events via SPITUR" "0,1" bitfld.long 0x1C 15. "FRMERREN,Enable Interrupt Events via FRMERR" "0,1" newline bitfld.long 0x1C 4. "SPITXBEEN,Enablie Interrupt Events via SPITXBE" "0,1" bitfld.long 0x1C 0. "SPIRXBFEN,Enablie Interrupt Events via SPIRXBF" "0,1" line.long 0x20 "INTFLAG,SPI Interrupt Flag Register" bitfld.long 0x20 30. "SPIROV,Receive Overflow Status bit" "0,1" bitfld.long 0x20 27. "SPITUR,Transmit Underrun Status bit" "0,1" bitfld.long 0x20 15. "FRMERR,SPI Frame Error Status bit" "0,1" newline bitfld.long 0x20 4. "SPITXBE,SPI Transmit Buffer Empty Status Bit" "0,1" bitfld.long 0x20 0. "SPIRXBF,SPI Receive Buffer Full Status Bit" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "STATUS,SPI Status Register" bitfld.long 0x0 31. "SPIRBE,RX Buffer Empty bit" "0,1" bitfld.long 0x0 29. "SPIRBF,SPI Receive Buffer Full status bit" "0,1" bitfld.long 0x0 28. "SPITBE,SPI Transmit Buffer Empty status bit" "0,1" newline bitfld.long 0x0 26. "SPITBF,SPI Transmit Buffer Full Status bit" "0,1" hexmask.long.word 0x0 16.--24. 1. "TXBUFELM,Transmit Buffer Element Count bits" bitfld.long 0x0 14. "SPIBUSY,SPI activity status bit" "0,1" newline bitfld.long 0x0 13. "SRMT,Register (SR) Empty bit" "0,1" hexmask.long.word 0x0 0.--8. 1. "RXBUFELM,Receive Buffer Element Count bits" group.long 0x28++0xB line.long 0x0 "BUF,SPI Buffer Register" hexmask.long 0x0 0.--31. 1. "DATA,FIFO Data bits" line.long 0x4 "BRG,SPI Baud Rate Register" hexmask.long.word 0x4 0.--12. 1. "BRG,Baud Rate Divisor bits" line.long 0x8 "DBGCTRL,SPI Debug Control Register" bitfld.long 0x8 0. "DBGRUN,Debug Running State" "0,1" rgroup.long 0x34++0x3 line.long 0x0 "SYNCBUSY,SPI Sync Busy Register" bitfld.long 0x0 0. "SWRSTBSY,Software reset busy bit --- Synchronizing Busy bit for swrst" "0,1" group.long 0x38++0x3 line.long 0x0 "EVCTRL,SPI Event Control Register" bitfld.long 0x0 0. "FPSEEN,Frame Pulse Event Enable Bit" "0,1" tree.end tree.end tree "SQI (Serial Quad Interface)" base ad:0x0 tree "SQI0" base ad:0x4F008000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A register" bitfld.long 0x0 6. "RUNSTDBY,Run in Standby" "0: Module is disabled in Standby Sleep mode,1: Module continues to run in Standby Sleep mode" bitfld.long 0x0 0. "SWRST,Software Reset" "0: No reset in progress,1: Reseting the registers and EIP" group.long 0x10++0xB line.long 0x0 "INTENCLR,Interrupt Enable Clear Register" bitfld.long 0x0 0. "SQI,SQI Interrupt Enable Clear" "0: Interrupt Enabled,1: Interrupt Disabled" line.long 0x4 "INTENSET,Interrupt Enable Set Register" bitfld.long 0x4 0. "SQI,SQI Interrupt Enable Set" "0: Interrupt disabled,1: Interrupt enabled" line.long 0x8 "INTFLAG,Interrupt Status and Clear Register" bitfld.long 0x8 0. "SQI,Read value reflects the state of the interrupt flag. Do not use the interrupt flag and associated mask registers if the EIP already provides similar controls for its interrupts. This feature is design for interrupts created in the SIB or EIP which do.." "0,1" rgroup.long 0x20++0x3 line.long 0x0 "SYNCBUSY,Syncbusy Register" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0: SWRST synchronization is not busy,1: SWRST synchronization is busy" group.long 0x100++0x27 line.long 0x0 "XCON1,SPI XIP Control1 register" bitfld.long 0x0 29. "SDRCMD,SPI TYPE CMD SDR2DDR: This bit is used by the controller only when XIP_SPI_TYPE_CMD_DDR is 1?b1 i.e. when command sent in DDR mode. 0 - The command (XIP_SPI_READ_OPCODE) will take 4 clock cycles. Data will go in both the edges. Used when Flash.." "0: The command,1: Say opcode = 'h ac" bitfld.long 0x0 28. "DDRDATA,XIP SPI TYPE DATA DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the data in SDR/DDR mode." "0: SDR mode,1: DDR mode" newline bitfld.long 0x0 27. "DDRDUMMY,XIP SPI TYPE DUMMY DDR. 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the dummy bytes in SDR/DDR mode." "0: SDR mode,1: DDR mode" bitfld.long 0x0 26. "DDRMODE,XIP SPI TYPE MODE DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the mode bytes in SDR/DDR mode." "0: SDR mode,1: DDR mode" newline bitfld.long 0x0 25. "DDRADDR,XIP SPI TYPE ADDR DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the address bytes in SDR/DDR mode." "0: SDR mode,1: DDR mode" bitfld.long 0x0 24. "DDRCMD,XIP SPI TYPE CMD DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the command in SDR/DDR mode." "0: SDR mode,1: DDR mode" newline bitfld.long 0x0 21.--23. "DUMMYBYTES,000 - Zero Dummy bytes 001 - Transmit one dummy byte (8?h ff) 010 - Transmit two dummy bytes (16?h ffff) 011 - Transmit three dummy bytes (24?h ffffff) 111 - Transmit Seven dummy bytes" "0: Zero Dummy bytes,1: Transmit one dummy byte,?,?,?,?,?,?" bitfld.long 0x0 18.--20. "ADDRBYTES,000 - Zero Address Bytes 001 - 1 Address Byte 010 - 2 Address Bytes 011 - 3 Address Bytes 100 - 4 Address Bytes 101 - 111- Reserved for Future Use" "0: Zero Address Bytes,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--17. 1. "READOPCODE,8bit opcode value for Read operation" bitfld.long 0x0 8.--9. "TYPEDATA,SPI TYPE DATA: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use Based on this field the boot controller will receive the data in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" newline bitfld.long 0x0 6.--7. "TYPEDUMMY,SPI TYPE DUMMY: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use. Based on this field the boot controller will send the Dummy in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" bitfld.long 0x0 4.--5. "TYPEMODE,SPI TYPE Mode: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use. Based on this field the boot controller will send the Mode in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" newline bitfld.long 0x0 2.--3. "TYPEADDR,SPI TYPE Address 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use Based on this field the boot controller will send the Address in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" bitfld.long 0x0 0.--1. "TYPECMD,SPI TYPE Command - Single lane mode - Dual lane mode - Quad lane mode - Reserved for Future use Based on this field the boot controller will send the command in 1/2/4 lane." "0,1,2,3" line.long 0x4 "XCON2,SPI XIP Control2 register" bitfld.long 0x4 10.--12. "DEVSEL,XIP SPI Device Select: This field is used to select a particular SPI device 000 - Select Device0 001 - Select Device1 010 - Select Device2 011 - Select Device3 100 - Select Device4 101 - Select Device5 110 - Select Device6 111 -.." "0: Select Device0,1: Select Device1,?,?,?,?,?,?" bitfld.long 0x4 8.--9. "MODEBYTES,Mode Bytes 00 - 0 Mode Bytes 01 - 1 Mode Byte 10 - 2 Mode Bytes 11 - 3 Mode Bytes" "0,1,2,3" newline hexmask.long.byte 0x4 0.--7. 1. "MODECODE,8bit value for Mode byte" line.long 0x8 "CFG,SPI Configuration Register" hexmask.long.byte 0x8 24.--31. 1. "CSEN,1 - Chip Select is used 0 - Chip Select is not used SPI_CS[7] for CS7 SPI_CS[6] for CS6 SPI_CS[5] for CS5 SPI_CS[4] for CS4 SPI_CS[3] for CS3 SPI_CS[2] for CS2 SPI_CS[1] for CS1 SPI_CS[0] for CS0. SPI_CS_PIN_EN[7:0/3:0] output pins.." bitfld.long 0x8 23. "SQIEN,1 - Enabled 0 - Disabled SPI_ON output pin is controlled by writing to this bit." "0: Disabled SPI_ON output pin is controlled by..,1: Enabled" newline bitfld.long 0x8 20.--21. "DATAEN,Max Data Lanes 11 - Reserved 10 - 4 01 - 2 00 - 1 SPI_OUT_PIN_EN[3:0] output pins are controlled by writing to these bits." "0,1,2,3" bitfld.long 0x8 19. "CONBUFRST,Control FIFO Reset A reset pulse is generated when writing 1 to this bit. This bit is Auto clear and SPI Controller will clear this bit. Control fifo pointers will get reset by this reset pulse. Note: Control FIFO reset can be done only after a.." "0,1" newline bitfld.long 0x8 18. "RXBUFRST,Receive FIFO Reset A reset pulse is generated when writing 1 to this bit. This bit is Auto clear and SPI Controller will clear this bit. Receive fifo pointers will get reset by this reset pulse. Note: Receive FIFO reset can be done only after a.." "0,1" bitfld.long 0x8 17. "TXBUFRST,Transmit FIFO Reset A reset pulse is generated when writing 1 to this bit. This bit is Auto clear and SPI Controller will clear this bit. Transmit FIFO pointers will get reset by this reset pulse. Note: Transmit FIFO reset can be done only after.." "0,1" newline bitfld.long 0x8 14. "AHB_BURST_INCR16_EN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR16 is enabled. 0 - AHB INCR16 is disabled" "0: AHB INCR16 is disabled,1: AHB INCR16 is enabled" bitfld.long 0x8 13. "AHB_BURST_INCR8_EN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR8 is enabled. 0 - AHB INCR8 is disabled" "0: AHB INCR8 is disabled,1: AHB INCR8 is enabled" newline bitfld.long 0x8 12. "AHB_BURST_INCR4_EN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR4 is enabled. 0 - AHB INCR4 is disabled" "0: AHB INCR4 is disabled,1: AHB INCR4 is enabled" bitfld.long 0x8 11. "BURSTEN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR is enabled 0 - AHB INCR is disabled" "?,1: AHB INCR is enabled 0" newline bitfld.long 0x8 10. "HOLD,Hold: In Single or Dual lane mode this bit is used to drive the spiout3 signal. Whenever this bit is high the controller drives 0 on spiout3 line and sets spimoe3 high (active only during transfer)." "0,1" bitfld.long 0x8 9. "WP,Write Protect: In single or Dual lane mode this bit is used to drive the spiout2 signal. Whenever this bit is high the controller drives 0 on spiout2 line and sets spimoe2 high (active only during transfer)." "0,1" newline bitfld.long 0x8 5. "LSBF,Data format on SPI interface 0 = MSBit sent/received first. 1 = LSBit sent/received first. This setting is supeceded by LSBF control bit in Buffer Descriptor during DMA operations." "0: MSBit sent/received first,1: LSBit sent/received first" bitfld.long 0x8 4. "CPOL,Clock polarity 0 = active-high SPICLK (SPICLK low is the idle state) 1 = active-low SPICLK (SPICLK high is the idle state)" "0: active-high SPICLK,1: active-low SPICLK" newline bitfld.long 0x8 3. "CPHA,Clock phase (selects the transfer format) 0 = SPICLK starts toggling at the middle of 1st data bit. 1 = SPICLK starts toggling at the start of 1st data bit." "0: SPICLK starts toggling at the middle of 1st data..,1: SPICLK starts toggling at the start of 1st data.." bitfld.long 0x8 0.--2. "MODE,Mode Select The default value of this field is 0. After power on reset the controller enters boot mode. 000 - Boot mode. The CSR registers are loaded with boot strap values. 001 - PIO mode. The controller is controlled by the CPU in PIO mode. 010 -.." "0: Boot mode,1: PIO mode,?,?,?,?,?,?" line.long 0xC "CON,SPI Control register" bitfld.long 0xC 25. "DEV_SEL_2,SPI Device Select[2]: This field along with SPI DEVICE SELECT [1:0] (bits 21:20) together is used to select a particular SPI device. Bit25 Bit21 Bit20 0 0 0 - SPI Device 0 0 0 1 - SPI Device 1 0 1 0 - SPI Device 2 0 1 1 - SPI Device 3 1 0.." "0: SPI Device 6,1: SPI Device 7 Note: For Michigan Ax versions" bitfld.long 0xC 24. "SCHECK,Status Check This bit is mainly used for Programming or Erase operations. 0 - do not check status 1 - check status. If this bit is set to 1 the hardware will issue the status command automatically after the current operation and wait for busy.." "0: do not check status,1: check status" newline bitfld.long 0xC 23. "DDRMODE,SDR_DDR: 0 - SDR mode 1 - DDR mode. Note: For Michigan Ax versions this bit is Reserved and should be kept 0." "0: SDR mode,1: DDR mode" bitfld.long 0xC 22. "DASSERT,Chip Select Assert 0 - CS is not de-asserted after transmission/reception of specified number of bytes in the control register 1 - CS is de-asserted after transmission/reception of specified number of bytes in the control register" "0: CS is not de-asserted after..,?" newline bitfld.long 0xC 20.--21. "DEVSEL,SPI Device Select: This field along with bit25 is used to select a particular SPI device. Note: For Michigan Ax versions extension by bit25 is NOT used (only 4 devices are selectable by bits 21:20 here)." "0,1,2,3" bitfld.long 0xC 18.--19. "LANEMODE,SPI Lane mode 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use" "0: Single lane mode,1: Dual lane mode,?,?" newline bitfld.long 0xC 16.--17. "CMDINIT,This signal indicates the command initiation mode. If it is Transmit Commands are initiated based on writes to transmit register or the contents of TX FIFO. If the CMD_INIT is Receive commands are initiated based on reads to Read register or RX.." "0: Reserved,1: Initiate Transmit,?,?" hexmask.long.word 0xC 0.--15. 1. "TXRXCOUNT,This bit specifies the total number of bytes to transmit or receive (based on CMD_INIT field). 16?d 0 - Reserved 16?d 1 - 1byte to transmit/receive 16?d 2 - 2bytes to transmit/receive NOTE: Count must be programmed to non-zero value prior to.." line.long 0x10 "CLKCON,SPI Clock Control register" hexmask.long.word 0x10 8.--18. 1. "CLKDIV,SPI Clock Frequency Select 400h - base clock divided by 2048 200h - base clock divided by 1024 100h - base clock divided by 512 080h - base clock divided by 256 040h - base clock divided by 128 020h - base clock divided by 64 010h - base.." bitfld.long 0x10 1. "STABLE,After Reset this bit is set to 1 when SPI Clock is stable after writing Internal Clock Enable in this register to 1. The Clock Stable indication will continue unless the Clock Divisor Value is changed in which case it.." "?,1: Stable 0" newline bitfld.long 0x10 0. "EN,This bit is set to 0 when the SPI Driver is not using the SPI Controller. The SPI Controller should stop its internal clock to go very low power state. Still registers will be able to be read and written. Clock starts to oscillate when this bit is.." "?,1: Enable 0" line.long 0x14 "CMDTHR,SPI command threshold register" hexmask.long.byte 0x14 8.--15. 1. "TXCMDTHR,In TX Initiation Mode SPI Performs a transmit Operation when TX_CMD_THRES bytes are present in the TX FIFO. This should usually be set to 1 for normal flash commands and is desired to be set to a higher value for page programming. NOTE: Value.." hexmask.long.byte 0x14 0.--7. 1. "RXCMDTHR,In RX initiation mode SPI attempts to perform receive fetch operations until RX_CMD_THRES bytes of space remain in the receive buffer. If space for RX_CMD_THRES bytes is not present in the FIFO then SPI would not initiate any transfer." line.long 0x18 "INTTHR,SPI Interrupt Threshold register" hexmask.long.byte 0x18 8.--15. 1. "TXINTTHR,Transmit Interrupt is set when Transmit FIFO has equal or more space than TX_INT_THRES bytes." hexmask.long.byte 0x18 0.--7. 1. "RXINTTHR,Receive Interrupt is set when Receive FIFO CNT is larger than or equal to RX_INT_THRES Value." line.long 0x1C "INTEN,SPI Interrupt Enable Register" bitfld.long 0x1C 11. "DMAEIE,Master Error Interrupt Enable" "0,1" bitfld.long 0x1C 10. "PKTCOMPIE,Packet completion Interrupt" "0,1" newline bitfld.long 0x1C 9. "BDDONEIE,Current Buffer Descriptor Interrupt Enable" "0,1" bitfld.long 0x1C 8. "CONTHRIE,Control Buffer Threshold Interrupt Enable" "0,1" newline bitfld.long 0x1C 7. "CONEMPTYIE,Control Buffer Empty Interrupt Enable" "0,1" bitfld.long 0x1C 6. "CONFULLIE,Control Buffer Full Interrupt Enable" "0,1" newline bitfld.long 0x1C 5. "RXTHRIE,Enable Interrupt to be generated when the RX FIFO has data more than or equal to RX_INT_THRES words. In case of Boot/XIP mode the power on reset value of RX buffer threshold is zero. So this bit will be set to 1 immediately after power on.." "0,1" bitfld.long 0x1C 4. "RXFULLIE,RX FIFO Full Interrupt Enable." "0,1" newline bitfld.long 0x1C 3. "RXEMPTYIE,RX FIFO Empty Interrupt Enable." "0,1" bitfld.long 0x1C 2. "TXTHRIE,Enable Interrupt to be generated when the TX FIFO has space equal to or more than TX_INT_THRES words." "0,1" newline bitfld.long 0x1C 1. "TXFULLIE,TX FIFO Full Interrupt Enable." "0,1" bitfld.long 0x1C 0. "TXEMPTYIE,TX FIFO Empty Interrupt Enable." "0,1" line.long 0x20 "INTSTAT,SPI Interrupt Status Register" bitfld.long 0x20 11. "DMAEIF,Master Error Interrupt" "0,1" bitfld.long 0x20 10. "PKTCOMPIF,Packet completion Interrupt" "0,1" newline bitfld.long 0x20 9. "BDDONEIF,BDP sets this bit to '1' after current buffer descriptor is processed" "0,1" bitfld.long 0x20 8. "CONTHRIF,Control Buffer Threshold Interrupt" "0,1" newline bitfld.long 0x20 7. "CONEMPTYIF,Control Buffer Empty Interrupt" "0,1" bitfld.long 0x20 6. "CONFULLIF,Control Buffer Full Interrupt" "0,1" newline bitfld.long 0x20 5. "RXTHRIF,Interrupt to be generated when the RX FIFO has data more than or equal to RX_INT_THRES words. In case of Boot/XIP mode the power on reset value of RX buffer threshold is zero. So this bit will be set to 1 immediately after power on reset till.." "0,1" bitfld.long 0x20 4. "RXFULLIF,RX FIFO Full Interrupt." "0,1" newline bitfld.long 0x20 3. "RXEMPTYIF,RX FIFO Empty Interrupt." "0,1" bitfld.long 0x20 2. "TXTHRIF,Interrupt to be generated when the TX FIFO has space equal to or more than TX_INT_THRES words." "0,1" newline bitfld.long 0x20 1. "TXFULLIF,TX FIFO Full Interrupt." "0,1" bitfld.long 0x20 0. "TXEMPTYIF,TX FIFO Empty Interrupt." "0,1" line.long 0x24 "TXDATA,SPI Transmit Data Register" hexmask.long 0x24 0.--31. 1. "TXDATA,Data is loaded into this register before being transmitted. Just prior to the beginning of a data transfer the data in TX_DATA is loaded into the shift register. This register is used as a window to write data into Transmit buffer." rgroup.long 0x128++0xB line.long 0x0 "RXDATA,SPI Receive Data Register" hexmask.long 0x0 0.--31. 1. "RXDATA,At the end of a data transfer the data in the shift register is loaded into RX_DATA register. This register is used as a window to read data from Receive buffer." line.long 0x4 "STAT1,SPI Status1 Register" hexmask.long.word 0x4 16.--31. 1. "TXBUFFREE,Number of Words of Space available in the TX FIFO. Max value equals value of MEM_SIZE_BYTES parameter. Default value is Max" hexmask.long.word 0x4 0.--15. 1. "RXBUFCNT,Number of Words of Read Data in the FIFO." line.long 0x8 "STAT2,SPI status 2 register" bitfld.long 0x8 16.--17. "CMDSTAT,Reflect the (internal state machine) CMD_INIT value. Indicates whether the controller is in Transmit/Receive/IDLE state. 2?b00 - IDLE 2?b01 - Transmit 2?b10 - Receive 2?b11 - Reserved" "0: IDLE,1: Transmit,2: Receive,3: Reserved" bitfld.long 0x8 7.--9. "CONAVAIL,Indicates the number of entries in Control Buffer remaining. NOTE: This field not present in Michigan Ax versions. Treat as Reserved." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 6. "SQID3,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" bitfld.long 0x8 5. "SQID2,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" newline bitfld.long 0x8 4. "SQID1,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" bitfld.long 0x8 3. "SQID0,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" newline bitfld.long 0x8 1. "RXUN,This bit would get set when RX FIFO UNDERFLOW happens. S/W needs to monitor RX_FIFO_CNT when emptying RX_FIFO to make sure RX FIFO doesn?t under flow or in case UNDERFLOW bit gets set then RX_FIFO_RST (bit 18 of SPI Configuration register) must be.." "0,1" bitfld.long 0x8 0. "TXOV,This bit would get set when TX FIFO OVERFLOW happens. S/W needs to monitor TX_FIFO_FREE when filling TX_FIFO to make sure TX FIFO doesn?t over flow or in case OVERFLOW bit gets set then TX_FIFO_RST (bit 17 of SPI Configuration register) should be.." "0,1" group.long 0x134++0x3 line.long 0x0 "BDCON,BD_CTRL Register" bitfld.long 0x0 2. "START,Setting this bit to '1' would start BDP (Buffer Descriptor Processor) to fetch a descriptor and hence this bit should be enabled only after all the DMA descriptor programming is done. Hardware clears this bit automatically after one clock cycle." "0,1" bitfld.long 0x0 1. "POLLEN,Setting this bit would cause Buffer Descriptor processor (BDP) to poll for descriptor valid till descriptor valid bit is set or till poll counter expires based on value programmed in BD_POLL_CTRL register." "0,1" newline bitfld.long 0x0 0. "DMAEN,DMA Enable Bit 1 - Enabled 0 - Disabled" "0: Disabled,1: Enabled" rgroup.long 0x138++0x3 line.long 0x0 "BDCURADD,BD_CURR_ADDR Register" hexmask.long 0x0 0.--31. 1. "BDCURRADDR,This register field contains the current descriptor address being processed by Buffer Descriptor Processor (BDP)" group.long 0x140++0x3 line.long 0x0 "BDBASEADD,BD_BASE_ADDR register" hexmask.long 0x0 0.--31. 1. "BDADDR,This register field contains the base address of the DMA. This register must be updated only when the DMA is IDLE." rgroup.long 0x144++0x3 line.long 0x0 "BDSTAT,BD_STATUS Register" hexmask.long.byte 0x0 18.--21. 1. "BDSTATE,This register field contains current BDP state : 0 IDLE 1 Descriptor fetch Request Pending 2 BD loading 3 Data phase 4 Descriptor Done 5 Fetched BD is disabled 6 Wait for Control Buffer Available 7 Wait for AHB Error.." bitfld.long 0x0 17. "DMASTART,This register field would indicate whether DMA has started or not if bit it set '1' then it indicates DMA start has happened. Value of '0' would indicate that DMA hasn't started." "0,1" newline bitfld.long 0x0 16. "DMAACTV,A value of '1' would indicate that Buffer Descriptor Processor (BDP) is not Idle. Value of '0' would indicate that BDP is in IDLE state" "0,1" hexmask.long.word 0x0 0.--15. 1. "BDCON,This register field contains the current Descriptor control information. Bits [31:16] of BD_CTRL field of current descriptor are indicated in this register field." group.long 0x148++0x7 line.long 0x0 "BDPOLLCON,BD_POLL_CTRL Register" hexmask.long.word 0x0 0.--15. 1. "POLLCON,Number of cycles that BDP block would wait before re-fetching the Descriptor control word if the previous descriptor fetched was disabled" line.long 0x4 "BDTXDSTAT,BD_TX_DMA_STATUS Register" hexmask.long.byte 0x4 16.--23. 1. "TXBUFCNT,This register field gives the information about the internal transmit FIFO space." hexmask.long.word 0x4 0.--15. 1. "TXCURBUFLEN,This register field gives the length of the current buffer transmit length" rgroup.long 0x150++0x3 line.long 0x0 "BDRXDSTAT,BD_RX_DMA_STATUS Register" bitfld.long 0x0 16. "RXBUFCNT,This register field gives the information about the internal receive FIFO space." "0,1" hexmask.long.word 0x0 0.--15. 1. "RXCURBUFLEN,This register field gives the length of the current buffer receive length" group.long 0x154++0x17 line.long 0x0 "THR,SPI Control threshold register" bitfld.long 0x0 0.--2. "THRES,SPI Control Threshold Value. SPI Control Threshold Interrupt is asserted whenever larger than SPI Control Threshold amount of space available in SPI Control Buffer." "0,1,2,3,4,5,6,7" line.long 0x4 "INTSIGEN,SPI Interrupt Signal Enable Register" bitfld.long 0x4 11. "DMAEISE,Master Error Interrupt Signal Enable" "0,1" bitfld.long 0x4 10. "PKTCOMPISE,Packet completion Interrupt Signal Enable" "0,1" newline bitfld.long 0x4 9. "BDDONEISE,Current Buffer Descriptor Interrupt Signal Enable" "0,1" bitfld.long 0x4 8. "CONTHRISE,Control Buffer Threshold Interrupt Signal Enable" "0,1" newline bitfld.long 0x4 7. "CONEMPTYISE,Control Buffer Empty Interrupt Signal Enable" "0,1" bitfld.long 0x4 6. "CONFULLISE,Control Buffer Full Interrupt Signal Enable" "0,1" newline bitfld.long 0x4 5. "RXTHRISE,Signal Enable Interrupt to be generated when the RX FIFO has data more than or equal to RX_INT_THRES words. In case of Boot/XIP mode the power on reset value of RX buffer threshold is zero. So this bit will be set to 1 immediately after power.." "0,1" bitfld.long 0x4 4. "RXFULLISE,RX FIFO Full Interrupt Signal Enable." "0,1" newline bitfld.long 0x4 3. "RXEMPTYISE,RX FIFO Empty Interrupt Signal Enable." "0,1" bitfld.long 0x4 2. "TXTHRISE,Signal Enable Interrupt to be generated when the TX FIFO has space equal to or more than TX_INT_THRES words." "0,1" newline bitfld.long 0x4 1. "TXFULLISE,TX FIFO Full Interrupt Signal Enable." "0,1" bitfld.long 0x4 0. "TXEMPTYISE,TX FIFO Empty Interrupt Signal Enable." "0,1" line.long 0x8 "TAPCON,Tap Control Register" hexmask.long.byte 0x8 24.--29. 1. "DDRCLKINDLY,Used only in DDR mode. This field is used to add tap delay cells on the spi clock input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (CLK_IN_DLY_CNT Vs CLK_IN_ALT_DLY_CNT)." hexmask.long.byte 0x8 20.--23. 1. "SDRDATINDLY,Used only in SDR mode. This field is used to add tap delay cells on the Data input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (DATA_IN_ALT_DLY_CNT Vs DATA_IN_DLY_CNT)." newline hexmask.long.byte 0x8 16.--19. 1. "DDRDATINDLY,Used only in DDR mode. This field is used to add tap delay cells on the data input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (DATA_IN_ALT_DLY_CNT Vs DATA_IN_DLY_CNT)." hexmask.long.byte 0x8 8.--13. 1. "SDRCLKINDLY,Used only in SDR mode. This field is used to add tap delay cells on the spi clock input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (CLK_IN_DLY_CNT Vs CLK_IN_ALT_DLY_CNT)." newline hexmask.long.byte 0x8 4.--7. 1. "DATAOUTDLY,Used to add delay on spi data outputs (1/2/4lanes). 16 taps available." hexmask.long.byte 0x8 0.--3. 1. "CLKOUTDLY,Used to add delay on spi clock output.16 taps available." line.long 0xC "MEMSTAT,SPI Status Control Register" bitfld.long 0xC 20. "STATPOS,Indicates whether the BUSY bit position in Status Register of flash is 0 or 7. 1?b0 - 0th bit position (bit 0 is valid for busy status) 1?b1 - 7th bit position (bit7 is valid for busy status) The Controller continuously reads the Status register.." "0,1" bitfld.long 0xC 18.--19. "TYPESTAT,Status Lane: Indicates the number of lanes (single/dual/quad) in which the Status command/ Read Status Register value is transmitted to /received from flash. 2?b00 - single lane 2?b01 - dual lane 2?b10 - quad lane" "0: single lane,1: dual lane,2: quad lane,?" newline bitfld.long 0xC 16.--17. "STATBYTES,No. of bytes to send: 00 - Reserved 01 - 1 byte 10 - 2 bytes 11 - Reserved" "0: Reserved,?,?,?" hexmask.long.word 0xC 0.--15. 1. "STATCMD,Status Data: The first byte to be sent must be in LSB. For example if the user wants to send 0F first and 0C second then we should program 16?h0C0F." line.long 0x10 "XCON3,SPI XIP Control 3 Register" bitfld.long 0x10 28. "INIT1SCHECK,SPI Init1 Status Check: 0 - do not check status 1 - check status. If this bit is set to 1 the hardware will issue the status command automatically after the current operation and wait for busy bit to clear. The hardware will issue the next.." "0: do not check status,1: check status" bitfld.long 0x10 26.--27. "INIT1COUNT,2bit SPI INIT1 Count. Indicates whether 1 2 or 3 bytes of INIT1 Code value are being sent." "0,1,2,3" newline bitfld.long 0x10 24.--25. "INIT1TYPE,SPI TYPE INIT1: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use. Based on this field the boot controller will send the INIT1 Code in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" hexmask.long.byte 0x10 16.--23. 1. "INIT1CMD3,8bit SPI Init1 Code3 value." newline hexmask.long.byte 0x10 8.--15. 1. "INIT1CMD2,8bit SPI Init1 Code2 value." hexmask.long.byte 0x10 0.--7. 1. "INIT1CMD1,8bit SPI Init1 Code1 value." line.long 0x14 "XCON4,SPI XIP Control4 Register" bitfld.long 0x14 28. "INIT2SCHECK,SPI Init2 Status Check: 0 - do not check status 1 - check status If this bit is set to 1 the hardware will issue the status command automatically after thecurrent operation and wait for busy bit to clear. The hardware will issue the next.." "0: do not check status 1,?" bitfld.long 0x14 26.--27. "INIT2COUNT,2bit SPI INIT2 Count. Indicates whether 1 2 or 3 bytes of INIT2 Code value are being sent." "0,1,2,3" newline bitfld.long 0x14 24.--25. "INIT2TYPE,SPI TYPE INIT2: 00 - Single lane mode. 01 - Dual lane mode. 10 - Quad lane mode. 11 - Reserved for Future use. Based on this field the boot controller will send the INIT2 Code in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" hexmask.long.byte 0x14 16.--23. 1. "INIT2CMD3,8bit SPI Init2 Code3 value" newline hexmask.long.byte 0x14 8.--15. 1. "INIT2CMD2,8bit SPI Init2 Code2 value" hexmask.long.byte 0x14 0.--7. 1. "INIT2CMD1,8bit SPI Init2 Code1 value." tree.end tree "SQI1" base ad:0x4F009000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A register" bitfld.long 0x0 6. "RUNSTDBY,Run in Standby" "0: Module is disabled in Standby Sleep mode,1: Module continues to run in Standby Sleep mode" bitfld.long 0x0 0. "SWRST,Software Reset" "0: No reset in progress,1: Reseting the registers and EIP" group.long 0x10++0xB line.long 0x0 "INTENCLR,Interrupt Enable Clear Register" bitfld.long 0x0 0. "SQI,SQI Interrupt Enable Clear" "0: Interrupt Enabled,1: Interrupt Disabled" line.long 0x4 "INTENSET,Interrupt Enable Set Register" bitfld.long 0x4 0. "SQI,SQI Interrupt Enable Set" "0: Interrupt disabled,1: Interrupt enabled" line.long 0x8 "INTFLAG,Interrupt Status and Clear Register" bitfld.long 0x8 0. "SQI,Read value reflects the state of the interrupt flag. Do not use the interrupt flag and associated mask registers if the EIP already provides similar controls for its interrupts. This feature is design for interrupts created in the SIB or EIP which do.." "0,1" rgroup.long 0x20++0x3 line.long 0x0 "SYNCBUSY,Syncbusy Register" bitfld.long 0x0 0. "SWRST,Software Reset Synchronization Busy" "0: SWRST synchronization is not busy,1: SWRST synchronization is busy" group.long 0x100++0x27 line.long 0x0 "XCON1,SPI XIP Control1 register" bitfld.long 0x0 29. "SDRCMD,SPI TYPE CMD SDR2DDR: This bit is used by the controller only when XIP_SPI_TYPE_CMD_DDR is 1?b1 i.e. when command sent in DDR mode. 0 - The command (XIP_SPI_READ_OPCODE) will take 4 clock cycles. Data will go in both the edges. Used when Flash.." "0: The command,1: Say opcode = 'h ac" bitfld.long 0x0 28. "DDRDATA,XIP SPI TYPE DATA DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the data in SDR/DDR mode." "0: SDR mode,1: DDR mode" newline bitfld.long 0x0 27. "DDRDUMMY,XIP SPI TYPE DUMMY DDR. 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the dummy bytes in SDR/DDR mode." "0: SDR mode,1: DDR mode" bitfld.long 0x0 26. "DDRMODE,XIP SPI TYPE MODE DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the mode bytes in SDR/DDR mode." "0: SDR mode,1: DDR mode" newline bitfld.long 0x0 25. "DDRADDR,XIP SPI TYPE ADDR DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the address bytes in SDR/DDR mode." "0: SDR mode,1: DDR mode" bitfld.long 0x0 24. "DDRCMD,XIP SPI TYPE CMD DDR 0 - SDR mode 1 - DDR mode. Based on this field the boot controller will send the command in SDR/DDR mode." "0: SDR mode,1: DDR mode" newline bitfld.long 0x0 21.--23. "DUMMYBYTES,000 - Zero Dummy bytes 001 - Transmit one dummy byte (8?h ff) 010 - Transmit two dummy bytes (16?h ffff) 011 - Transmit three dummy bytes (24?h ffffff) 111 - Transmit Seven dummy bytes" "0: Zero Dummy bytes,1: Transmit one dummy byte,?,?,?,?,?,?" bitfld.long 0x0 18.--20. "ADDRBYTES,000 - Zero Address Bytes 001 - 1 Address Byte 010 - 2 Address Bytes 011 - 3 Address Bytes 100 - 4 Address Bytes 101 - 111- Reserved for Future Use" "0: Zero Address Bytes,?,?,?,?,?,?,?" newline hexmask.long.byte 0x0 10.--17. 1. "READOPCODE,8bit opcode value for Read operation" bitfld.long 0x0 8.--9. "TYPEDATA,SPI TYPE DATA: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use Based on this field the boot controller will receive the data in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" newline bitfld.long 0x0 6.--7. "TYPEDUMMY,SPI TYPE DUMMY: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use. Based on this field the boot controller will send the Dummy in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" bitfld.long 0x0 4.--5. "TYPEMODE,SPI TYPE Mode: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use. Based on this field the boot controller will send the Mode in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" newline bitfld.long 0x0 2.--3. "TYPEADDR,SPI TYPE Address 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use Based on this field the boot controller will send the Address in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" bitfld.long 0x0 0.--1. "TYPECMD,SPI TYPE Command - Single lane mode - Dual lane mode - Quad lane mode - Reserved for Future use Based on this field the boot controller will send the command in 1/2/4 lane." "0,1,2,3" line.long 0x4 "XCON2,SPI XIP Control2 register" bitfld.long 0x4 10.--12. "DEVSEL,XIP SPI Device Select: This field is used to select a particular SPI device 000 - Select Device0 001 - Select Device1 010 - Select Device2 011 - Select Device3 100 - Select Device4 101 - Select Device5 110 - Select Device6 111 -.." "0: Select Device0,1: Select Device1,?,?,?,?,?,?" bitfld.long 0x4 8.--9. "MODEBYTES,Mode Bytes 00 - 0 Mode Bytes 01 - 1 Mode Byte 10 - 2 Mode Bytes 11 - 3 Mode Bytes" "0,1,2,3" newline hexmask.long.byte 0x4 0.--7. 1. "MODECODE,8bit value for Mode byte" line.long 0x8 "CFG,SPI Configuration Register" hexmask.long.byte 0x8 24.--31. 1. "CSEN,1 - Chip Select is used 0 - Chip Select is not used SPI_CS[7] for CS7 SPI_CS[6] for CS6 SPI_CS[5] for CS5 SPI_CS[4] for CS4 SPI_CS[3] for CS3 SPI_CS[2] for CS2 SPI_CS[1] for CS1 SPI_CS[0] for CS0. SPI_CS_PIN_EN[7:0/3:0] output pins.." bitfld.long 0x8 23. "SQIEN,1 - Enabled 0 - Disabled SPI_ON output pin is controlled by writing to this bit." "0: Disabled SPI_ON output pin is controlled by..,1: Enabled" newline bitfld.long 0x8 20.--21. "DATAEN,Max Data Lanes 11 - Reserved 10 - 4 01 - 2 00 - 1 SPI_OUT_PIN_EN[3:0] output pins are controlled by writing to these bits." "0,1,2,3" bitfld.long 0x8 19. "CONBUFRST,Control FIFO Reset A reset pulse is generated when writing 1 to this bit. This bit is Auto clear and SPI Controller will clear this bit. Control fifo pointers will get reset by this reset pulse. Note: Control FIFO reset can be done only after a.." "0,1" newline bitfld.long 0x8 18. "RXBUFRST,Receive FIFO Reset A reset pulse is generated when writing 1 to this bit. This bit is Auto clear and SPI Controller will clear this bit. Receive fifo pointers will get reset by this reset pulse. Note: Receive FIFO reset can be done only after a.." "0,1" bitfld.long 0x8 17. "TXBUFRST,Transmit FIFO Reset A reset pulse is generated when writing 1 to this bit. This bit is Auto clear and SPI Controller will clear this bit. Transmit FIFO pointers will get reset by this reset pulse. Note: Transmit FIFO reset can be done only after.." "0,1" newline bitfld.long 0x8 14. "AHB_BURST_INCR16_EN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR16 is enabled. 0 - AHB INCR16 is disabled" "0: AHB INCR16 is disabled,1: AHB INCR16 is enabled" bitfld.long 0x8 13. "AHB_BURST_INCR8_EN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR8 is enabled. 0 - AHB INCR8 is disabled" "0: AHB INCR8 is disabled,1: AHB INCR8 is enabled" newline bitfld.long 0x8 12. "AHB_BURST_INCR4_EN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR4 is enabled. 0 - AHB INCR4 is disabled" "0: AHB INCR4 is disabled,1: AHB INCR4 is enabled" bitfld.long 0x8 11. "BURSTEN,This field is used to configure the AHB Master Burst capability. 1 - AHB INCR is enabled 0 - AHB INCR is disabled" "?,1: AHB INCR is enabled 0" newline bitfld.long 0x8 10. "HOLD,Hold: In Single or Dual lane mode this bit is used to drive the spiout3 signal. Whenever this bit is high the controller drives 0 on spiout3 line and sets spimoe3 high (active only during transfer)." "0,1" bitfld.long 0x8 9. "WP,Write Protect: In single or Dual lane mode this bit is used to drive the spiout2 signal. Whenever this bit is high the controller drives 0 on spiout2 line and sets spimoe2 high (active only during transfer)." "0,1" newline bitfld.long 0x8 5. "LSBF,Data format on SPI interface 0 = MSBit sent/received first. 1 = LSBit sent/received first. This setting is supeceded by LSBF control bit in Buffer Descriptor during DMA operations." "0: MSBit sent/received first,1: LSBit sent/received first" bitfld.long 0x8 4. "CPOL,Clock polarity 0 = active-high SPICLK (SPICLK low is the idle state) 1 = active-low SPICLK (SPICLK high is the idle state)" "0: active-high SPICLK,1: active-low SPICLK" newline bitfld.long 0x8 3. "CPHA,Clock phase (selects the transfer format) 0 = SPICLK starts toggling at the middle of 1st data bit. 1 = SPICLK starts toggling at the start of 1st data bit." "0: SPICLK starts toggling at the middle of 1st data..,1: SPICLK starts toggling at the start of 1st data.." bitfld.long 0x8 0.--2. "MODE,Mode Select The default value of this field is 0. After power on reset the controller enters boot mode. 000 - Boot mode. The CSR registers are loaded with boot strap values. 001 - PIO mode. The controller is controlled by the CPU in PIO mode. 010 -.." "0: Boot mode,1: PIO mode,?,?,?,?,?,?" line.long 0xC "CON,SPI Control register" bitfld.long 0xC 25. "DEV_SEL_2,SPI Device Select[2]: This field along with SPI DEVICE SELECT [1:0] (bits 21:20) together is used to select a particular SPI device. Bit25 Bit21 Bit20 0 0 0 - SPI Device 0 0 0 1 - SPI Device 1 0 1 0 - SPI Device 2 0 1 1 - SPI Device 3 1 0.." "0: SPI Device 6,1: SPI Device 7 Note: For Michigan Ax versions" bitfld.long 0xC 24. "SCHECK,Status Check This bit is mainly used for Programming or Erase operations. 0 - do not check status 1 - check status. If this bit is set to 1 the hardware will issue the status command automatically after the current operation and wait for busy.." "0: do not check status,1: check status" newline bitfld.long 0xC 23. "DDRMODE,SDR_DDR: 0 - SDR mode 1 - DDR mode. Note: For Michigan Ax versions this bit is Reserved and should be kept 0." "0: SDR mode,1: DDR mode" bitfld.long 0xC 22. "DASSERT,Chip Select Assert 0 - CS is not de-asserted after transmission/reception of specified number of bytes in the control register 1 - CS is de-asserted after transmission/reception of specified number of bytes in the control register" "0: CS is not de-asserted after..,?" newline bitfld.long 0xC 20.--21. "DEVSEL,SPI Device Select: This field along with bit25 is used to select a particular SPI device. Note: For Michigan Ax versions extension by bit25 is NOT used (only 4 devices are selectable by bits 21:20 here)." "0,1,2,3" bitfld.long 0xC 18.--19. "LANEMODE,SPI Lane mode 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use" "0: Single lane mode,1: Dual lane mode,?,?" newline bitfld.long 0xC 16.--17. "CMDINIT,This signal indicates the command initiation mode. If it is Transmit Commands are initiated based on writes to transmit register or the contents of TX FIFO. If the CMD_INIT is Receive commands are initiated based on reads to Read register or RX.." "0: Reserved,1: Initiate Transmit,?,?" hexmask.long.word 0xC 0.--15. 1. "TXRXCOUNT,This bit specifies the total number of bytes to transmit or receive (based on CMD_INIT field). 16?d 0 - Reserved 16?d 1 - 1byte to transmit/receive 16?d 2 - 2bytes to transmit/receive NOTE: Count must be programmed to non-zero value prior to.." line.long 0x10 "CLKCON,SPI Clock Control register" hexmask.long.word 0x10 8.--18. 1. "CLKDIV,SPI Clock Frequency Select 400h - base clock divided by 2048 200h - base clock divided by 1024 100h - base clock divided by 512 080h - base clock divided by 256 040h - base clock divided by 128 020h - base clock divided by 64 010h - base.." bitfld.long 0x10 1. "STABLE,After Reset this bit is set to 1 when SPI Clock is stable after writing Internal Clock Enable in this register to 1. The Clock Stable indication will continue unless the Clock Divisor Value is changed in which case it.." "?,1: Stable 0" newline bitfld.long 0x10 0. "EN,This bit is set to 0 when the SPI Driver is not using the SPI Controller. The SPI Controller should stop its internal clock to go very low power state. Still registers will be able to be read and written. Clock starts to oscillate when this bit is.." "?,1: Enable 0" line.long 0x14 "CMDTHR,SPI command threshold register" hexmask.long.byte 0x14 8.--15. 1. "TXCMDTHR,In TX Initiation Mode SPI Performs a transmit Operation when TX_CMD_THRES bytes are present in the TX FIFO. This should usually be set to 1 for normal flash commands and is desired to be set to a higher value for page programming. NOTE: Value.." hexmask.long.byte 0x14 0.--7. 1. "RXCMDTHR,In RX initiation mode SPI attempts to perform receive fetch operations until RX_CMD_THRES bytes of space remain in the receive buffer. If space for RX_CMD_THRES bytes is not present in the FIFO then SPI would not initiate any transfer." line.long 0x18 "INTTHR,SPI Interrupt Threshold register" hexmask.long.byte 0x18 8.--15. 1. "TXINTTHR,Transmit Interrupt is set when Transmit FIFO has equal or more space than TX_INT_THRES bytes." hexmask.long.byte 0x18 0.--7. 1. "RXINTTHR,Receive Interrupt is set when Receive FIFO CNT is larger than or equal to RX_INT_THRES Value." line.long 0x1C "INTEN,SPI Interrupt Enable Register" bitfld.long 0x1C 11. "DMAEIE,Master Error Interrupt Enable" "0,1" bitfld.long 0x1C 10. "PKTCOMPIE,Packet completion Interrupt" "0,1" newline bitfld.long 0x1C 9. "BDDONEIE,Current Buffer Descriptor Interrupt Enable" "0,1" bitfld.long 0x1C 8. "CONTHRIE,Control Buffer Threshold Interrupt Enable" "0,1" newline bitfld.long 0x1C 7. "CONEMPTYIE,Control Buffer Empty Interrupt Enable" "0,1" bitfld.long 0x1C 6. "CONFULLIE,Control Buffer Full Interrupt Enable" "0,1" newline bitfld.long 0x1C 5. "RXTHRIE,Enable Interrupt to be generated when the RX FIFO has data more than or equal to RX_INT_THRES words. In case of Boot/XIP mode the power on reset value of RX buffer threshold is zero. So this bit will be set to 1 immediately after power on.." "0,1" bitfld.long 0x1C 4. "RXFULLIE,RX FIFO Full Interrupt Enable." "0,1" newline bitfld.long 0x1C 3. "RXEMPTYIE,RX FIFO Empty Interrupt Enable." "0,1" bitfld.long 0x1C 2. "TXTHRIE,Enable Interrupt to be generated when the TX FIFO has space equal to or more than TX_INT_THRES words." "0,1" newline bitfld.long 0x1C 1. "TXFULLIE,TX FIFO Full Interrupt Enable." "0,1" bitfld.long 0x1C 0. "TXEMPTYIE,TX FIFO Empty Interrupt Enable." "0,1" line.long 0x20 "INTSTAT,SPI Interrupt Status Register" bitfld.long 0x20 11. "DMAEIF,Master Error Interrupt" "0,1" bitfld.long 0x20 10. "PKTCOMPIF,Packet completion Interrupt" "0,1" newline bitfld.long 0x20 9. "BDDONEIF,BDP sets this bit to '1' after current buffer descriptor is processed" "0,1" bitfld.long 0x20 8. "CONTHRIF,Control Buffer Threshold Interrupt" "0,1" newline bitfld.long 0x20 7. "CONEMPTYIF,Control Buffer Empty Interrupt" "0,1" bitfld.long 0x20 6. "CONFULLIF,Control Buffer Full Interrupt" "0,1" newline bitfld.long 0x20 5. "RXTHRIF,Interrupt to be generated when the RX FIFO has data more than or equal to RX_INT_THRES words. In case of Boot/XIP mode the power on reset value of RX buffer threshold is zero. So this bit will be set to 1 immediately after power on reset till.." "0,1" bitfld.long 0x20 4. "RXFULLIF,RX FIFO Full Interrupt." "0,1" newline bitfld.long 0x20 3. "RXEMPTYIF,RX FIFO Empty Interrupt." "0,1" bitfld.long 0x20 2. "TXTHRIF,Interrupt to be generated when the TX FIFO has space equal to or more than TX_INT_THRES words." "0,1" newline bitfld.long 0x20 1. "TXFULLIF,TX FIFO Full Interrupt." "0,1" bitfld.long 0x20 0. "TXEMPTYIF,TX FIFO Empty Interrupt." "0,1" line.long 0x24 "TXDATA,SPI Transmit Data Register" hexmask.long 0x24 0.--31. 1. "TXDATA,Data is loaded into this register before being transmitted. Just prior to the beginning of a data transfer the data in TX_DATA is loaded into the shift register. This register is used as a window to write data into Transmit buffer." rgroup.long 0x128++0xB line.long 0x0 "RXDATA,SPI Receive Data Register" hexmask.long 0x0 0.--31. 1. "RXDATA,At the end of a data transfer the data in the shift register is loaded into RX_DATA register. This register is used as a window to read data from Receive buffer." line.long 0x4 "STAT1,SPI Status1 Register" hexmask.long.word 0x4 16.--31. 1. "TXBUFFREE,Number of Words of Space available in the TX FIFO. Max value equals value of MEM_SIZE_BYTES parameter. Default value is Max" hexmask.long.word 0x4 0.--15. 1. "RXBUFCNT,Number of Words of Read Data in the FIFO." line.long 0x8 "STAT2,SPI status 2 register" bitfld.long 0x8 16.--17. "CMDSTAT,Reflect the (internal state machine) CMD_INIT value. Indicates whether the controller is in Transmit/Receive/IDLE state. 2?b00 - IDLE 2?b01 - Transmit 2?b10 - Receive 2?b11 - Reserved" "0: IDLE,1: Transmit,2: Receive,3: Reserved" bitfld.long 0x8 7.--9. "CONAVAIL,Indicates the number of entries in Control Buffer remaining. NOTE: This field not present in Michigan Ax versions. Treat as Reserved." "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 6. "SQID3,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" bitfld.long 0x8 5. "SQID2,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" newline bitfld.long 0x8 4. "SQID1,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" bitfld.long 0x8 3. "SQID0,SPI Data bus: This status is used to check the SPI DATA line level for Debugging. Bit3 - SPI_IO0 Bit4 - SPI_IO1 Bit5 - SPI_IO2 Bit6 - SPI_IO3" "0,1" newline bitfld.long 0x8 1. "RXUN,This bit would get set when RX FIFO UNDERFLOW happens. S/W needs to monitor RX_FIFO_CNT when emptying RX_FIFO to make sure RX FIFO doesn?t under flow or in case UNDERFLOW bit gets set then RX_FIFO_RST (bit 18 of SPI Configuration register) must be.." "0,1" bitfld.long 0x8 0. "TXOV,This bit would get set when TX FIFO OVERFLOW happens. S/W needs to monitor TX_FIFO_FREE when filling TX_FIFO to make sure TX FIFO doesn?t over flow or in case OVERFLOW bit gets set then TX_FIFO_RST (bit 17 of SPI Configuration register) should be.." "0,1" group.long 0x134++0x3 line.long 0x0 "BDCON,BD_CTRL Register" bitfld.long 0x0 2. "START,Setting this bit to '1' would start BDP (Buffer Descriptor Processor) to fetch a descriptor and hence this bit should be enabled only after all the DMA descriptor programming is done. Hardware clears this bit automatically after one clock cycle." "0,1" bitfld.long 0x0 1. "POLLEN,Setting this bit would cause Buffer Descriptor processor (BDP) to poll for descriptor valid till descriptor valid bit is set or till poll counter expires based on value programmed in BD_POLL_CTRL register." "0,1" newline bitfld.long 0x0 0. "DMAEN,DMA Enable Bit 1 - Enabled 0 - Disabled" "0: Disabled,1: Enabled" rgroup.long 0x138++0x3 line.long 0x0 "BDCURADD,BD_CURR_ADDR Register" hexmask.long 0x0 0.--31. 1. "BDCURRADDR,This register field contains the current descriptor address being processed by Buffer Descriptor Processor (BDP)" group.long 0x140++0x3 line.long 0x0 "BDBASEADD,BD_BASE_ADDR register" hexmask.long 0x0 0.--31. 1. "BDADDR,This register field contains the base address of the DMA. This register must be updated only when the DMA is IDLE." rgroup.long 0x144++0x3 line.long 0x0 "BDSTAT,BD_STATUS Register" hexmask.long.byte 0x0 18.--21. 1. "BDSTATE,This register field contains current BDP state : 0 IDLE 1 Descriptor fetch Request Pending 2 BD loading 3 Data phase 4 Descriptor Done 5 Fetched BD is disabled 6 Wait for Control Buffer Available 7 Wait for AHB Error.." bitfld.long 0x0 17. "DMASTART,This register field would indicate whether DMA has started or not if bit it set '1' then it indicates DMA start has happened. Value of '0' would indicate that DMA hasn't started." "0,1" newline bitfld.long 0x0 16. "DMAACTV,A value of '1' would indicate that Buffer Descriptor Processor (BDP) is not Idle. Value of '0' would indicate that BDP is in IDLE state" "0,1" hexmask.long.word 0x0 0.--15. 1. "BDCON,This register field contains the current Descriptor control information. Bits [31:16] of BD_CTRL field of current descriptor are indicated in this register field." group.long 0x148++0x7 line.long 0x0 "BDPOLLCON,BD_POLL_CTRL Register" hexmask.long.word 0x0 0.--15. 1. "POLLCON,Number of cycles that BDP block would wait before re-fetching the Descriptor control word if the previous descriptor fetched was disabled" line.long 0x4 "BDTXDSTAT,BD_TX_DMA_STATUS Register" hexmask.long.byte 0x4 16.--23. 1. "TXBUFCNT,This register field gives the information about the internal transmit FIFO space." hexmask.long.word 0x4 0.--15. 1. "TXCURBUFLEN,This register field gives the length of the current buffer transmit length" rgroup.long 0x150++0x3 line.long 0x0 "BDRXDSTAT,BD_RX_DMA_STATUS Register" bitfld.long 0x0 16. "RXBUFCNT,This register field gives the information about the internal receive FIFO space." "0,1" hexmask.long.word 0x0 0.--15. 1. "RXCURBUFLEN,This register field gives the length of the current buffer receive length" group.long 0x154++0x17 line.long 0x0 "THR,SPI Control threshold register" bitfld.long 0x0 0.--2. "THRES,SPI Control Threshold Value. SPI Control Threshold Interrupt is asserted whenever larger than SPI Control Threshold amount of space available in SPI Control Buffer." "0,1,2,3,4,5,6,7" line.long 0x4 "INTSIGEN,SPI Interrupt Signal Enable Register" bitfld.long 0x4 11. "DMAEISE,Master Error Interrupt Signal Enable" "0,1" bitfld.long 0x4 10. "PKTCOMPISE,Packet completion Interrupt Signal Enable" "0,1" newline bitfld.long 0x4 9. "BDDONEISE,Current Buffer Descriptor Interrupt Signal Enable" "0,1" bitfld.long 0x4 8. "CONTHRISE,Control Buffer Threshold Interrupt Signal Enable" "0,1" newline bitfld.long 0x4 7. "CONEMPTYISE,Control Buffer Empty Interrupt Signal Enable" "0,1" bitfld.long 0x4 6. "CONFULLISE,Control Buffer Full Interrupt Signal Enable" "0,1" newline bitfld.long 0x4 5. "RXTHRISE,Signal Enable Interrupt to be generated when the RX FIFO has data more than or equal to RX_INT_THRES words. In case of Boot/XIP mode the power on reset value of RX buffer threshold is zero. So this bit will be set to 1 immediately after power.." "0,1" bitfld.long 0x4 4. "RXFULLISE,RX FIFO Full Interrupt Signal Enable." "0,1" newline bitfld.long 0x4 3. "RXEMPTYISE,RX FIFO Empty Interrupt Signal Enable." "0,1" bitfld.long 0x4 2. "TXTHRISE,Signal Enable Interrupt to be generated when the TX FIFO has space equal to or more than TX_INT_THRES words." "0,1" newline bitfld.long 0x4 1. "TXFULLISE,TX FIFO Full Interrupt Signal Enable." "0,1" bitfld.long 0x4 0. "TXEMPTYISE,TX FIFO Empty Interrupt Signal Enable." "0,1" line.long 0x8 "TAPCON,Tap Control Register" hexmask.long.byte 0x8 24.--29. 1. "DDRCLKINDLY,Used only in DDR mode. This field is used to add tap delay cells on the spi clock input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (CLK_IN_DLY_CNT Vs CLK_IN_ALT_DLY_CNT)." hexmask.long.byte 0x8 20.--23. 1. "SDRDATINDLY,Used only in SDR mode. This field is used to add tap delay cells on the Data input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (DATA_IN_ALT_DLY_CNT Vs DATA_IN_DLY_CNT)." newline hexmask.long.byte 0x8 16.--19. 1. "DDRDATINDLY,Used only in DDR mode. This field is used to add tap delay cells on the data input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (DATA_IN_ALT_DLY_CNT Vs DATA_IN_DLY_CNT)." hexmask.long.byte 0x8 8.--13. 1. "SDRCLKINDLY,Used only in SDR mode. This field is used to add tap delay cells on the spi clock input. Based on the mode of operation (SDR Vs DDR) the controller dynamically picks the appropriate delay values (CLK_IN_DLY_CNT Vs CLK_IN_ALT_DLY_CNT)." newline hexmask.long.byte 0x8 4.--7. 1. "DATAOUTDLY,Used to add delay on spi data outputs (1/2/4lanes). 16 taps available." hexmask.long.byte 0x8 0.--3. 1. "CLKOUTDLY,Used to add delay on spi clock output.16 taps available." line.long 0xC "MEMSTAT,SPI Status Control Register" bitfld.long 0xC 20. "STATPOS,Indicates whether the BUSY bit position in Status Register of flash is 0 or 7. 1?b0 - 0th bit position (bit 0 is valid for busy status) 1?b1 - 7th bit position (bit7 is valid for busy status) The Controller continuously reads the Status register.." "0,1" bitfld.long 0xC 18.--19. "TYPESTAT,Status Lane: Indicates the number of lanes (single/dual/quad) in which the Status command/ Read Status Register value is transmitted to /received from flash. 2?b00 - single lane 2?b01 - dual lane 2?b10 - quad lane" "0: single lane,1: dual lane,2: quad lane,?" newline bitfld.long 0xC 16.--17. "STATBYTES,No. of bytes to send: 00 - Reserved 01 - 1 byte 10 - 2 bytes 11 - Reserved" "0: Reserved,?,?,?" hexmask.long.word 0xC 0.--15. 1. "STATCMD,Status Data: The first byte to be sent must be in LSB. For example if the user wants to send 0F first and 0C second then we should program 16?h0C0F." line.long 0x10 "XCON3,SPI XIP Control 3 Register" bitfld.long 0x10 28. "INIT1SCHECK,SPI Init1 Status Check: 0 - do not check status 1 - check status. If this bit is set to 1 the hardware will issue the status command automatically after the current operation and wait for busy bit to clear. The hardware will issue the next.." "0: do not check status,1: check status" bitfld.long 0x10 26.--27. "INIT1COUNT,2bit SPI INIT1 Count. Indicates whether 1 2 or 3 bytes of INIT1 Code value are being sent." "0,1,2,3" newline bitfld.long 0x10 24.--25. "INIT1TYPE,SPI TYPE INIT1: 00 - Single lane mode 01 - Dual lane mode 10 - Quad lane mode 11 - Reserved for Future use. Based on this field the boot controller will send the INIT1 Code in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" hexmask.long.byte 0x10 16.--23. 1. "INIT1CMD3,8bit SPI Init1 Code3 value." newline hexmask.long.byte 0x10 8.--15. 1. "INIT1CMD2,8bit SPI Init1 Code2 value." hexmask.long.byte 0x10 0.--7. 1. "INIT1CMD1,8bit SPI Init1 Code1 value." line.long 0x14 "XCON4,SPI XIP Control4 Register" bitfld.long 0x14 28. "INIT2SCHECK,SPI Init2 Status Check: 0 - do not check status 1 - check status If this bit is set to 1 the hardware will issue the status command automatically after thecurrent operation and wait for busy bit to clear. The hardware will issue the next.." "0: do not check status 1,?" bitfld.long 0x14 26.--27. "INIT2COUNT,2bit SPI INIT2 Count. Indicates whether 1 2 or 3 bytes of INIT2 Code value are being sent." "0,1,2,3" newline bitfld.long 0x14 24.--25. "INIT2TYPE,SPI TYPE INIT2: 00 - Single lane mode. 01 - Dual lane mode. 10 - Quad lane mode. 11 - Reserved for Future use. Based on this field the boot controller will send the INIT2 Code in 1/2/4 lane." "0: Single lane mode,1: Dual lane mode,?,?" hexmask.long.byte 0x14 16.--23. 1. "INIT2CMD3,8bit SPI Init2 Code3 value" newline hexmask.long.byte 0x14 8.--15. 1. "INIT2CMD2,8bit SPI Init2 Code2 value" hexmask.long.byte 0x14 0.--7. 1. "INIT2CMD1,8bit SPI Init2 Code1 value." tree.end tree.end tree "SUPC (Supply Controller)" base ad:0x44020000 group.long 0x0++0xB line.long 0x0 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x0 10. "ADDVREGRDY2,Additional Regulator ready 2 Interrupt Enable" "0,1" bitfld.long 0x0 9. "ADDVREGRDY1,Additional Regulator ready 1 Interrupt Enable" "0,1" newline bitfld.long 0x0 8. "ADDVREGRDY0,Additional Regulator ready 0 Interrupt Enable" "0,1" bitfld.long 0x0 5.--6. "BORVDDUSB,BORVDDUSB Interrupt Enable" "0,1,2,3" newline bitfld.long 0x0 1. "LVDRDY,Low Voltage Detector Ready Interrupt Enable" "0,1" bitfld.long 0x0 0. "LVDET,Low Voltage Detector Interrupt Enable" "0,1" line.long 0x4 "INTENSET,Interrupt Enable Set" bitfld.long 0x4 10. "ADDVREGRDY2,Additional Regulator ready 2 Interrupt Enable" "0,1" bitfld.long 0x4 9. "ADDVREGRDY1,Additional Regulator ready 1 Interrupt Enable" "0,1" newline bitfld.long 0x4 8. "ADDVREGRDY0,Additional Regulator ready 0 Interrupt Enable" "0,1" bitfld.long 0x4 5.--6. "BORVDDUSB,BORVDDUSB Interrupt Enable" "0,1,2,3" newline bitfld.long 0x4 1. "LVDRDY,Low Voltage Detector Ready Interrupt Enable" "0,1" bitfld.long 0x4 0. "LVDET,Low Voltage Detector Interrupt Enable" "0,1" line.long 0x8 "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0x8 10. "ADDVREGRDY2,Additional Regulator ready 2 Interrupt. Set to one if additionnal regulator is ready meaning that output voltage is correct." "0,1" bitfld.long 0x8 9. "ADDVREGRDY1,Additional Regulator ready 1 Interrupt. Set to one if additionnal regulator is ready meaning that output voltage is correct." "0,1" newline bitfld.long 0x8 8. "ADDVREGRDY0,Additional Regulator ready 0 Interrupt. Set to one if additionnal regulator is ready meaning that output voltage is correct." "0,1" bitfld.long 0x8 5.--6. "BORVDDUSB,BORVDDUSB Interrupt. Set to one if VDDUSB issue is detected." "0,1,2,3" newline bitfld.long 0x8 1. "LVDRDY,Low Voltage Detector Ready Interrupt. Set to one if LVD is ready to operate." "0,1" bitfld.long 0x8 0. "LVDET,Low Voltage Detector Interrupt. Set to one if VDDIO crosses the treshold voltage in the good direction according to LVD.DIR." "0,1" rgroup.long 0xC++0x7 line.long 0x0 "STATUS,Flag status" bitfld.long 0x0 10. "ADDVREGRDY2,Additional Regulator ready 2 Status. One if voltage is OK. It corresponds to vreg_ready_mv signal of additional regulator." "0,1" bitfld.long 0x0 9. "ADDVREGRDY1,Additional Regulator ready 1 Status. One if voltage is OK. It corresponds to vreg_ready_mv signal of additional regulator." "0,1" newline bitfld.long 0x0 8. "ADDVREGRDY0,Additional Regulator ready 0 Status. One if voltage is OK. It corresponds to vreg_ready_mv signal of additional regulator." "0,1" bitfld.long 0x0 5.--6. "BORVDDUSB,BORVDDUSB Status. One if VDDUSB is OK. It corresponds to bor_vddusb_n_mv signal of SMOR." "0,1,2,3" newline bitfld.long 0x0 1. "LVDRDY,Low Voltage Detector Ready Status" "0,1" bitfld.long 0x0 0. "LVDET,Low Voltage Detector Status." "0,1" line.long 0x4 "SYNCBUSY,Synchronisation Busy" bitfld.long 0x4 0. "BOR,BOR Synchronization Busy" "0,1" group.long 0x14++0xF line.long 0x0 "BOR,BOR Control" bitfld.long 0x0 8.--9. "BORFILT,BOR filtering" "0: No digital filtering,1: 32us filtering,2: 125us filtering,3: 250us filtering" bitfld.long 0x0 4.--6. "DCBORPSEL,Duty Cycle BOR Prescaler Select" "0: Not Divided,1: Divide clock by 2,2: Divide clock by 4,3: Divide clock by 8,4: Divide clock by 16,5: Divide clock by 32,6: Divide clock by 64,7: Divide clock by 128" line.long 0x4 "LVD,LVD Control" hexmask.long.byte 0x4 16.--19. 1. "LEVEL,Threshold Level. See 'pwr_smor_[nn]_v1 DOS' - level section to get details." bitfld.long 0x4 4. "RUNSTDBY,Run during Standby" "0,1" newline bitfld.long 0x4 3. "OEVEN,Output Event Enable" "0,1" bitfld.long 0x4 2. "DIR,Direction" "0: Rising detection,1: Falling detection" newline bitfld.long 0x4 1. "ENABLE,Enable" "0,1" line.long 0x8 "VREGCTRL,VREG Control" bitfld.long 0x8 24.--26. "AVREGSTDBY,Additional Voltage Regulator Configuration" "0: Regulator is OFF while in sleep mode equal or..,1: Regulator is ON in Standby mode if AVREGEN bit..,?,?,?,?,?,?" bitfld.long 0x8 16.--18. "AVREGEN,Additional Voltage Regulator Enable" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 8.--10. "CPEN,Charge Pump Enable and Auto-enable." "0,1,2,3,4,5,6,7" bitfld.long 0x8 5. "BKUP_VLD,Backup Valid Status Bit" "0,1" newline bitfld.long 0x8 4. "SRAM_VLD,SRAM Valid Status Bit" "0,1" bitfld.long 0x8 2. "OFFSTDBY,Off in Standby Control for VREGSW[N-1]. Useful for Riverside only." "0: In standby mode VREGSW1 2 3 are OFF,1: In standby mode VREGSW1 2 3 are ON" newline bitfld.long 0x8 0.--1. "VREGOUT,VREG Output Control in RUN mode only. Enable by production fuse by CALSUPC.VREGOUTEN" "0: In Active mode VDDCORE_RAM VDDCORE_BU VDDCORE_SW..,1: In Active mode VDDCORE_RAM VDDCORE_BU VDDCORE_SW..,2: In Active mode VDDCORE_RAM VDDCORE_BU VDDCORE_SW..,?" line.long 0xC "VREFCTRL,VREF Control" bitfld.long 0xC 4. "TSEN,Temperature Sensor Output Enable" "0,1" bitfld.long 0xC 1. "LPHIB,Bandgap and Regulators Low Power Hibernate Enable" "0: In hibernate mode bandgap is set to nominal..,1: In hibernate mode bandgap is set to low power.." newline bitfld.long 0xC 0. "LPSTDBY,Bandgap and Regulators Low Power Standby Enable" "0: In standby mode bandgap and enabled regulator(s)..,1: In standby mode bandgap and enabled regulator(s).." group.long 0x28++0x3 line.long 0x0 "BKOUT,Backup Output Control" bitfld.long 0x0 26.--27. "TGLOM1,Toggle Output Mode" "0: The output does not toggle.,1: The output toggles on RTC event.,2: The output is set when the device enters backup..,?" bitfld.long 0x0 24.--25. "TGLOM0,Toggle Output Mode" "0: The output does not toggle.,1: The output toggles on RTC event.,2: The output is set when the device enters backup..,?" newline bitfld.long 0x0 18. "SET1,Set Output" "0,1" bitfld.long 0x0 16. "SET0,Set Output" "0,1" newline bitfld.long 0x0 10. "CLR1,Clear Output" "0,1" bitfld.long 0x0 8. "CLR0,Clear Output" "0,1" newline bitfld.long 0x0 2. "EN1,Enable Output" "0,1" bitfld.long 0x0 0. "EN0,Enable Output" "0,1" rgroup.long 0x2C++0x3 line.long 0x0 "BKIN,Backup Input Control" bitfld.long 0x0 0.--1. "BKIN,Backup Input Value" "0,1,2,3" tree.end tree "SYSTEMCONTROL (System Control Registers)" base ad:0xE000E000 rgroup.long 0x4++0x3 line.long 0x0 "ICTR,Interrupt Controller Type Register" hexmask.long.byte 0x0 0.--3. 1. "INTLINESNUM," group.long 0x8++0x3 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x0 9. "DISOOFP,Disable out-of-order FP instructions" "0,1" bitfld.long 0x0 8. "DISFPCA,Disable automatic update of CONTROL.FPCA" "0,1" newline bitfld.long 0x0 2. "DISFOLD,Disable IT folding" "0,1" bitfld.long 0x0 1. "DISDEFWBUF,Disable wruite buffer use during default memory map accesses" "0,1" newline bitfld.long 0x0 0. "DISMCYCINT,Disable interruption of LDM/STM instructions" "0,1" rgroup.long 0xD00++0x3 line.long 0x0 "CPUID,CPUID Base Register" hexmask.long.byte 0x0 24.--31. 1. "IMPLEMENTER,Implementer code 0x41=ARM" hexmask.long.byte 0x0 20.--23. 1. "VARIANT,Variant number" newline hexmask.long.byte 0x0 16.--19. 1. "CONSTANT,Constant" hexmask.long.word 0x0 4.--15. 1. "PARTNO,Process Part Number 0xC24=Cortex-M4" newline hexmask.long.byte 0x0 0.--3. 1. "REVISION,Processor revision number" group.long 0xD04++0x3B line.long 0x0 "ICSR,Interrupt Control and State Register" bitfld.long 0x0 31. "NMIPENDSET,NMI set-pending bit" "0: Write: no effect; read: NMI exception is not..,1: Write: changes NMI exception state to pending;.." bitfld.long 0x0 28. "PENDSVSET,PendSV set-pending bit" "0: Write: no effect; read: PendSV exception is not..,1: Write: changes PendSV exception state to.." newline bitfld.long 0x0 27. "PENDSVCLR,PendSV clear-pending bit" "0: No effect,1: Removes the pending state from the PendSV.." bitfld.long 0x0 26. "PENDSTSET,SysTick set-pending bit" "0: Write: no effect; read: SysTick exception is not..,1: Write: changes SysTick exception state to.." newline bitfld.long 0x0 25. "PENDSTCLR,SysTick clear-pending bit" "0: No effect,1: Removes the pending state from the SysTick.." bitfld.long 0x0 23. "ISRPREEMPT,Debug only" "0,1" newline bitfld.long 0x0 22. "ISRPENDING,Interrupt pending flag" "0,1" hexmask.long.byte 0x0 12.--17. 1. "VECTPENDING,Exception number of the highest priority pending enabled exception" newline bitfld.long 0x0 11. "RETTOBASE,No preempted active exceptions to execute" "0,1" hexmask.long.word 0x0 0.--8. 1. "VECTACTIVE,Active exception number" line.long 0x4 "VTOR,Vector Table Offset Register" hexmask.long 0x4 7.--31. 1. "TBLOFF,Vector table base offset" line.long 0x8 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x8 16.--31. 1. "VECTKEY,Register key" bitfld.long 0x8 15. "ENDIANNESS,Data endianness 0=little 1=big" "0: little,1: big" newline bitfld.long 0x8 8.--10. "PRIGROUP,Interrupt priority grouping" "0,1,2,3,4,5,6,7" bitfld.long 0x8 2. "SYSRESETREQ,System Reset Request" "0: No system reset request,1: Asserts a signal to the outer system that.." newline bitfld.long 0x8 1. "VECTCLRACTIVE,Must write 0" "0,1" bitfld.long 0x8 0. "VECTRESET,Must write 0" "0,1" line.long 0xC "SCR,System Control Register" bitfld.long 0xC 4. "SEVONPEND,Send Event on Pending bit" "0: Only enabled interrupts or events can wakeup the..,1: Enabled events and all interrupts including.." bitfld.long 0xC 2. "SLEEPDEEP,Deep Sleep used as low power mode" "0: Sleep,1: Deep sleep" newline bitfld.long 0xC 1. "SLEEPONEXIT,Sleep-on-exit on handler return" "0: Do not sleep when returning to Thread mode,1: Enter sleep or deep sleep on return from an ISR" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 9. "STKALIGN,Indicates stack alignment on exception entry" "0: 4-byte aligned,1: 8-byte aligned" bitfld.long 0x10 8. "BFHFNMIGN,Ignore LDM/STM BusFault for -1/-2 priority handlers" "0,1" newline bitfld.long 0x10 4. "DIV_0_TRP,Enables divide by 0 trap" "0,1" bitfld.long 0x10 3. "UNALIGN_TRP,Enables unaligned access traps" "0: Do not trap unaligned halfword and word accesses,1: Trap unaligned halfword and word accesses" newline bitfld.long 0x10 1. "USERSETMPEND,Enables unprivileged software access to STIR register" "0,1" bitfld.long 0x10 0. "NONBASETHRDENA,Indicates how processor enters Thread mode" "0,1" line.long 0x14 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x14 16.--23. 1. "PRI_6,Priority of system handler 6 UsageFault" hexmask.long.byte 0x14 8.--15. 1. "PRI_5,Priority of system handler 5 BusFault" newline hexmask.long.byte 0x14 0.--7. 1. "PRI_4,Priority of system handler 4 MemManage" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. "PRI_11,Priority of system handler 11 SVCall" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. "PRI_15,Priority of system handler 15 SysTick exception" hexmask.long.byte 0x1C 16.--23. 1. "PRI_14,Priority of system handler 14 PendSV" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 18. "USGFAULTENA,UsageFault enable bit" "0,1" bitfld.long 0x20 17. "BUSFAULTENA,BusFault enable bit" "0,1" newline bitfld.long 0x20 16. "MEMFAULTENA,MemManage enable bit" "0,1" bitfld.long 0x20 15. "SVCALLPENDED,SVCall pending bit" "0,1" newline bitfld.long 0x20 14. "BUSFAULTPENDED,BusFault exception pending bit" "0,1" bitfld.long 0x20 13. "MEMFAULTPENDED,MemManage exception pending bit" "0,1" newline bitfld.long 0x20 12. "USGFAULTPENDED,UsageFault exception pending bit" "0,1" bitfld.long 0x20 11. "SYSTICKACT,SysTick exception active bit" "0,1" newline bitfld.long 0x20 10. "PENDSVACT,PendSV exception active bit" "0,1" bitfld.long 0x20 8. "MONITORACT,DebugMonitor exception active bit" "0,1" newline bitfld.long 0x20 7. "SVCALLACT,SVCall active bit" "0,1" bitfld.long 0x20 3. "USGFAULTACT,UsageFault exception active bit" "0,1" newline bitfld.long 0x20 1. "BUSFAULTACT,BusFault exception active bit" "0,1" bitfld.long 0x20 0. "MEMFAULTACT,MemManage exception active bit" "0,1" line.long 0x24 "CFSR,Configurable Fault Status Register" bitfld.long 0x24 25. "DIVBYZERO,Divide by zero UsageFault" "0,1" bitfld.long 0x24 24. "UNALIGNED,Unaligned access UsageFault" "0,1" newline bitfld.long 0x24 19. "NOCP,No coprocessor UsageFault" "0,1" bitfld.long 0x24 18. "INVPC,Invalid PC load UsageFault" "0,1" newline bitfld.long 0x24 17. "INVSTATE,Invalid state UsageFault" "0,1" bitfld.long 0x24 16. "UNDEFINSTR,Undefined instruction UsageFault" "0,1" newline bitfld.long 0x24 15. "BFARVALID,BusFault Address Register valid" "0,1" bitfld.long 0x24 13. "LSPERR,BusFault occured during FP lazy state preservation" "0,1" newline bitfld.long 0x24 12. "STKERR,BusFault on stacking for exception entry" "0,1" bitfld.long 0x24 11. "UNSTKERR,BusFault on unstacking for exception return" "0,1" newline bitfld.long 0x24 10. "IMPRECISERR,Imprecise data bus error" "0,1" bitfld.long 0x24 9. "PRECISERR,Precise data bus error" "0,1" newline bitfld.long 0x24 8. "IBUSERR,Instruction bus error" "0,1" bitfld.long 0x24 7. "MMARVALID,MemManage Fault Address Register valid" "0,1" newline bitfld.long 0x24 5. "MLSPERR,MemManager Fault occured during FP lazy state preservation" "0,1" bitfld.long 0x24 4. "MSTKERR,MemManage Fault on stacking for exception entry" "0,1" newline bitfld.long 0x24 3. "MUNSTKERR,MemManage Fault on unstacking for exception return" "0,1" bitfld.long 0x24 1. "DACCVIOL,Data access violation" "0,1" newline bitfld.long 0x24 0. "IACCVIOL,Instruction access violation" "0,1" line.long 0x28 "HFSR,HardFault Status Register" bitfld.long 0x28 31. "DEBUGEVT,Debug: always write 0" "0,1" bitfld.long 0x28 30. "FORCED,Forced Hard Fault" "0,1" newline bitfld.long 0x28 1. "VECTTBL,BusFault on a Vector Table read during exception processing" "0,1" line.long 0x2C "DFSR,Debug Fault Status Register" bitfld.long 0x2C 4. "EXTERNAL," "0,1" bitfld.long 0x2C 3. "VCATCH," "0,1" newline bitfld.long 0x2C 2. "DWTTRAP," "0,1" bitfld.long 0x2C 1. "BKPT," "0,1" newline bitfld.long 0x2C 0. "HALTED," "0,1" line.long 0x30 "MMFAR,MemManage Fault Address Register" hexmask.long 0x30 0.--31. 1. "ADDRESS,Address that generated the MemManage fault" line.long 0x34 "BFAR,BusFault Address Register" hexmask.long 0x34 0.--31. 1. "ADDRESS,Address that generated the BusFault" line.long 0x38 "AFSR,Auxiliary Fault Status Register" hexmask.long 0x38 0.--31. 1. "IMPDEF,AUXFAULT input signals" repeat 2. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0xD40)++0x3 line.long 0x0 "PFR[$1],Processor Feature Register" repeat.end rgroup.long 0xD48++0x7 line.long 0x0 "DFR,Debug Feature Register" line.long 0x4 "ADR,Auxiliary Feature Register" repeat 4. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD50)++0x3 line.long 0x0 "MMFR[$1],Memory Model Feature Register" repeat.end repeat 5. (increment 0x0 0x1)(increment 0x0 0x4) rgroup.long ($2+0xD60)++0x3 line.long 0x0 "ISAR[$1],Instruction Set Attributes Register" repeat.end group.long 0xD88++0x3 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 22.--23. "CP11,Access privileges for coprocessor 11" "0: Access denied,1: Privileged access only,?,3: Full access" bitfld.long 0x0 20.--21. "CP10,Access privileges for coprocessor 10" "0: Access denied,1: Privileged access only,?,3: Full access" tree.end tree "SYSTICK (System Timer)" base ad:0xE000E010 group.long 0x0++0xB line.long 0x0 "CSR,SysTick Control and Status Register" bitfld.long 0x0 16. "COUNTFLAG,Timer counted to 0 since last read of register" "0,1" bitfld.long 0x0 2. "CLKSOURCE,Clock Source 0=external 1=processor" "0: external,1: processor" newline bitfld.long 0x0 1. "TICKINT,SysTick Exception Request Enable" "0: Counting down to 0 does not assert the SysTick..,1: Counting down to 0 asserts the SysTick exception.." bitfld.long 0x0 0. "ENABLE,SysTick Counter Enable" "0: Counter disabled,1: Counter enabled" line.long 0x4 "RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x4 0.--23. 1. "RELOAD,Value to load into the SysTick Current Value Register when the counter reaches 0" line.long 0x8 "CVR,SysTick Current Value Register" hexmask.long.tbyte 0x8 0.--23. 1. "CURRENT,Current value at the time the register is accessed" rgroup.long 0xC++0x3 line.long 0x0 "CALIB,SysTick Calibration Value Register" bitfld.long 0x0 31. "NOREF,No Separate Reference Clock" "0: The reference clock is provided,1: The reference clock is not provided" bitfld.long 0x0 30. "SKEW,TENMS is rounded from non-integer ratio" "0: 10ms calibration value is exact,1: 10ms calibration value is inexact because of the.." newline hexmask.long.tbyte 0x0 0.--23. 1. "TENMS,Reload value to use for 10ms timing" tree.end tree "TCC (Timer/Counter)" base ad:0x0 tree "TCC0" base ad:0x45010000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC1" base ad:0x45012000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC2" base ad:0x45014000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC3" base ad:0x45810000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC4" base ad:0x45812000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC5" base ad:0x46010000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC6" base ad:0x46012000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC7" base ad:0x46810000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC8" base ad:0x46812000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree "TCC9" base ad:0x46814000 group.long 0x0++0x3 line.long 0x0 "CTRLA,Control A" bitfld.long 0x0 31. "CPTEN7,Capture Channel 7 Enable" "0,1" bitfld.long 0x0 30. "CPTEN6,Capture Channel 6 Enable" "0,1" newline bitfld.long 0x0 29. "CPTEN5,Capture Channel 5 Enable" "0,1" bitfld.long 0x0 28. "CPTEN4,Capture Channel 4 Enable" "0,1" newline bitfld.long 0x0 27. "CPTEN3,Capture Channel 3 Enable" "0,1" bitfld.long 0x0 26. "CPTEN2,Capture Channel 2 Enable" "0,1" newline bitfld.long 0x0 25. "CPTEN1,Capture Channel 1 Enable" "0,1" bitfld.long 0x0 24. "CPTEN0,Capture Channel 0 Enable" "0,1" newline bitfld.long 0x0 23. "DMAOS,DMA One-shot Trigger Mode" "0,1" bitfld.long 0x0 16. "FCYCLE,Full Cycle" "0,1" newline bitfld.long 0x0 15. "MSYNC,Master Synchronization (only for TCC Slave Instance)" "0,1" bitfld.long 0x0 14. "ALOCK,Auto Lock" "0,1" newline bitfld.long 0x0 12.--13. "PRESCSYNC,Prescaler and Counter Synchronization Selection" "0: Reload or reset counter on next GCLK,1: Reload or reset counter on next prescaler clock,2: Reload or reset counter on next GCLK and reset..,?" bitfld.long 0x0 11. "RUNSTDBY,Run in Standby" "0,1" newline bitfld.long 0x0 8.--10. "PRESCALER,Prescaler" "0: No division,1: Divide by 2,2: Divide by 4,3: Divide by 8,4: Divide by 16,5: Divide by 64,6: Divide by 256,7: Divide by 1024" bitfld.long 0x0 5.--6. "RESOLUTION,Enhanced Resolution" "0: Dithering is disabled,1: Dithering is done every 16 PWM frames,2: Dithering is done every 32 PWM frames,3: Dithering is done every 64 PWM frames" newline bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" group.byte 0x4++0x1 line.byte 0x0 "CTRLBCLR,Control B Clear" bitfld.byte 0x0 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x0 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x0 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x0 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x0 0. "DIR,Counter Direction" "0,1" line.byte 0x1 "CTRLBSET,Control B Set" bitfld.byte 0x1 5.--7. "CMD,TCC Command" "0: No action,1: Clear start restart or retrigger,2: Force stop,3: Force update or double buffered registers,4: Force COUNT read synchronization,5: One-shot DMA trigger,?,?" bitfld.byte 0x1 3.--4. "IDXCMD,Ramp Index Command" "0: Command disabled: Index toggles between cycles A..,1: Set index: cycle B will be forced in the next..,2: Clear index: cycle A will be forced in the next..,3: Hold index: the next cycle will be the same as.." newline bitfld.byte 0x1 2. "ONESHOT,One-Shot" "0,1" bitfld.byte 0x1 1. "LUPD,Lock Update" "0,1" newline bitfld.byte 0x1 0. "DIR,Counter Direction" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 15. "CC7,Compare Channel 7 Busy" "0,1" bitfld.long 0x0 14. "CC6,Compare Channel 6 Busy" "0,1" newline bitfld.long 0x0 13. "CC5,Compare Channel 5 Busy" "0,1" bitfld.long 0x0 12. "CC4,Compare Channel 4 Busy" "0,1" newline bitfld.long 0x0 11. "CC3,Compare Channel 3 Busy" "0,1" bitfld.long 0x0 10. "CC2,Compare Channel 2 Busy" "0,1" newline bitfld.long 0x0 9. "CC1,Compare Channel 1 Busy" "0,1" bitfld.long 0x0 8. "CC0,Compare Channel 0 Busy" "0,1" newline bitfld.long 0x0 7. "PER,Period Busy" "0,1" bitfld.long 0x0 6. "WAVE,Wave Busy" "0,1" newline bitfld.long 0x0 5. "PATT,Pattern Busy" "0,1" bitfld.long 0x0 4. "COUNT,Count Busy" "0,1" newline bitfld.long 0x0 3. "STATUS,Status Busy" "0,1" bitfld.long 0x0 2. "CTRLB,Ctrlb Busy" "0,1" newline bitfld.long 0x0 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x0 0. "SWRST,Swrst Busy" "0,1" group.long 0xC++0xF line.long 0x0 "FCTRLA,Recoverable Fault A Configuration" hexmask.long.byte 0x0 24.--27. 1. "FILTERVAL,Fault A Filter Value" hexmask.long.byte 0x0 16.--23. 1. "BLANKVAL,Fault A Blanking Time" newline bitfld.long 0x0 15. "BLANKPRESC,Fault A Blanking Prescaler" "0,1" bitfld.long 0x0 12.--14. "CAPTURE,Fault A Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x0 10.--11. "CHSEL,Fault A Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x0 8.--9. "HALT,Fault A Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x0 7. "RESTART,Fault A Restart" "0,1" bitfld.long 0x0 5.--6. "BLANK,Fault A Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x0 4. "QUAL,Fault A Qualification" "0,1" bitfld.long 0x0 3. "KEEP,Fault A Keeper" "0,1" newline bitfld.long 0x0 0.--1. "SRC,Fault A Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x4 "FCTRLB,Recoverable Fault B Configuration" hexmask.long.byte 0x4 24.--27. 1. "FILTERVAL,Fault B Filter Value" hexmask.long.byte 0x4 16.--23. 1. "BLANKVAL,Fault B Blanking Time" newline bitfld.long 0x4 15. "BLANKPRESC,Fault B Blanking Prescaler" "0,1" bitfld.long 0x4 12.--14. "CAPTURE,Fault B Capture Action" "0: No capture,1: Capture on fault,2: Minimum capture,3: Maximum capture,4: Minimum local detection,5: Maximum local detection,6: Minimum and maximum local detection,7: Capture with ramp index as MSB value" newline bitfld.long 0x4 10.--11. "CHSEL,Fault B Capture Channel" "0: Capture value stored in channel 0,1: Capture value stored in channel 1,2: Capture value stored in channel 2,3: Capture value stored in channel 3" bitfld.long 0x4 8.--9. "HALT,Fault B Halt Mode" "0: Halt action disabled,1: Hardware halt action,2: Software halt action,3: Non-recoverable fault" newline bitfld.long 0x4 7. "RESTART,Fault B Restart" "0,1" bitfld.long 0x4 5.--6. "BLANK,Fault B Blanking Mode" "0: Blanking applied from start of the ramp,1: Blanking applied from rising edge of the output..,2: Blanking applied from falling edge of the output..,3: Blanking applied from each toggle of the output.." newline bitfld.long 0x4 4. "QUAL,Fault B Qualification" "0,1" bitfld.long 0x4 3. "KEEP,Fault B Keeper" "0,1" newline bitfld.long 0x4 0.--1. "SRC,Fault B Source" "0: Fault input disabled,1: MCEx (x=0 1) event input,2: Inverted MCEx (x=0 1) event input,3: Alternate fault (A or B) state at the end of the.." line.long 0x8 "WEXCTRL,Waveform Extension Configuration" hexmask.long.byte 0x8 24.--31. 1. "DTHS,Dead-time High Side Outputs Value" hexmask.long.byte 0x8 16.--23. 1. "DTLS,Dead-time Low Side Outputs Value" newline bitfld.long 0x8 11. "DTIEN3,Dead-time Insertion Generator 3 Enable" "0,1" bitfld.long 0x8 10. "DTIEN2,Dead-time Insertion Generator 2 Enable" "0,1" newline bitfld.long 0x8 9. "DTIEN1,Dead-time Insertion Generator 1 Enable" "0,1" bitfld.long 0x8 8. "DTIEN0,Dead-time Insertion Generator 0 Enable" "0,1" newline bitfld.long 0x8 0.--1. "OTMX,Output Matrix" "0,1,2,3" line.long 0xC "DRVCTRL,Driver Control" hexmask.long.byte 0xC 28.--31. 1. "FILTERVAL1,Non-Recoverable Fault Input 1 Filter Value" hexmask.long.byte 0xC 24.--27. 1. "FILTERVAL0,Non-Recoverable Fault Input 0 Filter Value" newline bitfld.long 0xC 23. "INVEN7,Output Waveform 7 Inversion" "0,1" bitfld.long 0xC 22. "INVEN6,Output Waveform 6 Inversion" "0,1" newline bitfld.long 0xC 21. "INVEN5,Output Waveform 5 Inversion" "0,1" bitfld.long 0xC 20. "INVEN4,Output Waveform 4 Inversion" "0,1" newline bitfld.long 0xC 19. "INVEN3,Output Waveform 3 Inversion" "0,1" bitfld.long 0xC 18. "INVEN2,Output Waveform 2 Inversion" "0,1" newline bitfld.long 0xC 17. "INVEN1,Output Waveform 1 Inversion" "0,1" bitfld.long 0xC 16. "INVEN0,Output Waveform 0 Inversion" "0,1" newline bitfld.long 0xC 15. "NRV7,Non-Recoverable State 7 Output Value" "0,1" bitfld.long 0xC 14. "NRV6,Non-Recoverable State 6 Output Value" "0,1" newline bitfld.long 0xC 13. "NRV5,Non-Recoverable State 5 Output Value" "0,1" bitfld.long 0xC 12. "NRV4,Non-Recoverable State 4 Output Value" "0,1" newline bitfld.long 0xC 11. "NRV3,Non-Recoverable State 3 Output Value" "0,1" bitfld.long 0xC 10. "NRV2,Non-Recoverable State 2 Output Value" "0,1" newline bitfld.long 0xC 9. "NRV1,Non-Recoverable State 1 Output Value" "0,1" bitfld.long 0xC 8. "NRV0,Non-Recoverable State 0 Output Value" "0,1" newline bitfld.long 0xC 7. "NRE7,Non-Recoverable State 7 Output Enable" "0,1" bitfld.long 0xC 6. "NRE6,Non-Recoverable State 6 Output Enable" "0,1" newline bitfld.long 0xC 5. "NRE5,Non-Recoverable State 5 Output Enable" "0,1" bitfld.long 0xC 4. "NRE4,Non-Recoverable State 4 Output Enable" "0,1" newline bitfld.long 0xC 3. "NRE3,Non-Recoverable State 3 Output Enable" "0,1" bitfld.long 0xC 2. "NRE2,Non-Recoverable State 2 Output Enable" "0,1" newline bitfld.long 0xC 1. "NRE1,Non-Recoverable State 1 Output Enable" "0,1" bitfld.long 0xC 0. "NRE0,Non-Recoverable State 0 Output Enable" "0,1" group.byte 0x1E++0x0 line.byte 0x0 "DBGCTRL,Debug Control" bitfld.byte 0x0 2. "FDDBD,Fault Detection on Debug Break Detection" "0,1" bitfld.byte 0x0 0. "DBGRUN,Debug Running Mode" "0,1" group.long 0x20++0x17 line.long 0x0 "EVCTRL,Event Control" bitfld.long 0x0 31. "MCEO7,Match or Capture Channel 7 Event Output Enable" "0,1" bitfld.long 0x0 30. "MCEO6,Match or Capture Channel 6 Event Output Enable" "0,1" newline bitfld.long 0x0 29. "MCEO5,Match or Capture Channel 5 Event Output Enable" "0,1" bitfld.long 0x0 28. "MCEO4,Match or Capture Channel 4 Event Output Enable" "0,1" newline bitfld.long 0x0 27. "MCEO3,Match or Capture Channel 3 Event Output Enable" "0,1" bitfld.long 0x0 26. "MCEO2,Match or Capture Channel 2 Event Output Enable" "0,1" newline bitfld.long 0x0 25. "MCEO1,Match or Capture Channel 1 Event Output Enable" "0,1" bitfld.long 0x0 24. "MCEO0,Match or Capture Channel 0 Event Output Enable" "0,1" newline bitfld.long 0x0 23. "MCEI7,Match or Capture Channel 7 Event Input Enable" "0,1" bitfld.long 0x0 22. "MCEI6,Match or Capture Channel 6 Event Input Enable" "0,1" newline bitfld.long 0x0 21. "MCEI5,Match or Capture Channel 5 Event Input Enable" "0,1" bitfld.long 0x0 20. "MCEI4,Match or Capture Channel 4 Event Input Enable" "0,1" newline bitfld.long 0x0 19. "MCEI3,Match or Capture Channel 3 Event Input Enable" "0,1" bitfld.long 0x0 18. "MCEI2,Match or Capture Channel 2 Event Input Enable" "0,1" newline bitfld.long 0x0 17. "MCEI1,Match or Capture Channel 1 Event Input Enable" "0,1" bitfld.long 0x0 16. "MCEI0,Match or Capture Channel 0 Event Input Enable" "0,1" newline bitfld.long 0x0 15. "TCEI1,Timer/counter Event 1 Input Enable" "0,1" bitfld.long 0x0 14. "TCEI0,Timer/counter Event 0 Input Enable" "0,1" newline bitfld.long 0x0 13. "TCINV1,Inverted Event 1 Input Enable" "0,1" bitfld.long 0x0 12. "TCINV0,Inverted Event 0 Input Enable" "0,1" newline bitfld.long 0x0 10. "CNTEO,Timer/counter Output Event Enable" "0,1" bitfld.long 0x0 9. "TRGEO,Retrigger Output Event Enable" "0,1" newline bitfld.long 0x0 8. "OVFEO,Overflow/Underflow Output Event Enable" "0,1" bitfld.long 0x0 6.--7. "CNTSEL,Timer/counter Output Event Mode" "0: An interrupt/event is generated when a new..,1: An interrupt/event is generated when a counter..,?,3: An interrupt/event is generated when a new.." newline bitfld.long 0x0 3.--5. "EVACT1,Timer/counter Input Event1 Action" "0: Event action disabled,1: Re-trigger counter on event,2: Direction control,3: Stop counter on event,4: Decrement counter on event,?,6: Period capture value in CC1 register pulse width..,7: Non-recoverable fault" bitfld.long 0x0 0.--2. "EVACT0,Timer/counter Input Event0 Action" "0: Event action disabled,1: Start restart or re-trigger counter on event,2: Count on event,3: Start counter on event,4: Increment counter on event,5: Count on active state of asynchronous event,6: Stamp capture,7: Non-recoverable fault" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x4 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x4 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x4 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x4 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x4 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x4 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x4 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x4 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x4 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x4 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x4 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x4 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x4 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x4 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x4 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x4 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 23. "MC7,Match or Capture Channel 7 Interrupt Enable" "0,1" bitfld.long 0x8 22. "MC6,Match or Capture Channel 6 Interrupt Enable" "0,1" newline bitfld.long 0x8 21. "MC5,Match or Capture Channel 5 Interrupt Enable" "0,1" bitfld.long 0x8 20. "MC4,Match or Capture Channel 4 Interrupt Enable" "0,1" newline bitfld.long 0x8 19. "MC3,Match or Capture Channel 3 Interrupt Enable" "0,1" bitfld.long 0x8 18. "MC2,Match or Capture Channel 2 Interrupt Enable" "0,1" newline bitfld.long 0x8 17. "MC1,Match or Capture Channel 1 Interrupt Enable" "0,1" bitfld.long 0x8 16. "MC0,Match or Capture Channel 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 15. "FAULT1,Non-Recoverable Fault 1 Interrupt Enable" "0,1" bitfld.long 0x8 14. "FAULT0,Non-Recoverable Fault 0 Interrupt Enable" "0,1" newline bitfld.long 0x8 13. "FAULTB,Recoverable Fault B Interrupt Enable" "0,1" bitfld.long 0x8 12. "FAULTA,Recoverable Fault A Interrupt Enable" "0,1" newline bitfld.long 0x8 11. "DFS,Non-Recoverable Debug Fault Interrupt Enable" "0,1" bitfld.long 0x8 10. "UFS,Non-Recoverable Update Fault Interrupt Enable" "0,1" newline bitfld.long 0x8 3. "ERR,Error Interrupt Enable" "0,1" bitfld.long 0x8 2. "CNT,Counter Interrupt Enable" "0,1" newline bitfld.long 0x8 1. "TRG,Retrigger Interrupt Enable" "0,1" bitfld.long 0x8 0. "OVF,Overflow Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 23. "MC7,Match or Capture 7" "0,1" bitfld.long 0xC 22. "MC6,Match or Capture 6" "0,1" newline bitfld.long 0xC 21. "MC5,Match or Capture 5" "0,1" bitfld.long 0xC 20. "MC4,Match or Capture 4" "0,1" newline bitfld.long 0xC 19. "MC3,Match or Capture 3" "0,1" bitfld.long 0xC 18. "MC2,Match or Capture 2" "0,1" newline bitfld.long 0xC 17. "MC1,Match or Capture 1" "0,1" bitfld.long 0xC 16. "MC0,Match or Capture 0" "0,1" newline bitfld.long 0xC 15. "FAULT1,Non-Recoverable Fault 1" "0,1" bitfld.long 0xC 14. "FAULT0,Non-Recoverable Fault 0" "0,1" newline bitfld.long 0xC 13. "FAULTB,Recoverable Fault B" "0,1" bitfld.long 0xC 12. "FAULTA,Recoverable Fault A" "0,1" newline bitfld.long 0xC 11. "DFS,Non-Recoverable Debug Fault" "0,1" bitfld.long 0xC 10. "UFS,Non-Recoverable Update Fault" "0,1" newline bitfld.long 0xC 3. "ERR,Error" "0,1" bitfld.long 0xC 2. "CNT,Counter" "0,1" newline bitfld.long 0xC 1. "TRG,Retrigger" "0,1" bitfld.long 0xC 0. "OVF,Overflow" "0,1" line.long 0x10 "STATUS,Status" bitfld.long 0x10 31. "CMP7,Compare Channel 7 Value" "0,1" bitfld.long 0x10 30. "CMP6,Compare Channel 6 Value" "0,1" newline bitfld.long 0x10 29. "CMP5,Compare Channel 5 Value" "0,1" bitfld.long 0x10 28. "CMP4,Compare Channel 4 Value" "0,1" newline bitfld.long 0x10 27. "CMP3,Compare Channel 3 Value" "0,1" bitfld.long 0x10 26. "CMP2,Compare Channel 2 Value" "0,1" newline bitfld.long 0x10 25. "CMP1,Compare Channel 1 Value" "0,1" bitfld.long 0x10 24. "CMP0,Compare Channel 0 Value" "0,1" newline bitfld.long 0x10 23. "CCBUFV7,Compare Channel 7 Buffer Valid" "0,1" bitfld.long 0x10 22. "CCBUFV6,Compare Channel 6 Buffer Valid" "0,1" newline bitfld.long 0x10 21. "CCBUFV5,Compare Channel 5 Buffer Valid" "0,1" bitfld.long 0x10 20. "CCBUFV4,Compare Channel 4 Buffer Valid" "0,1" newline bitfld.long 0x10 19. "CCBUFV3,Compare Channel 3 Buffer Valid" "0,1" bitfld.long 0x10 18. "CCBUFV2,Compare Channel 2 Buffer Valid" "0,1" newline bitfld.long 0x10 17. "CCBUFV1,Compare Channel 1 Buffer Valid" "0,1" bitfld.long 0x10 16. "CCBUFV0,Compare Channel 0 Buffer Valid" "0,1" newline bitfld.long 0x10 15. "FAULT1,Non-Recoverable Fault 1 State" "0,1" bitfld.long 0x10 14. "FAULT0,Non-Recoverable Fault 0 State" "0,1" newline bitfld.long 0x10 13. "FAULTB,Recoverable Fault B State" "0,1" bitfld.long 0x10 12. "FAULTA,Recoverable Fault A State" "0,1" newline bitfld.long 0x10 11. "FAULT1IN,Non-Recoverable Fault1 Input" "0,1" bitfld.long 0x10 10. "FAULT0IN,Non-Recoverable Fault0 Input" "0,1" newline bitfld.long 0x10 9. "FAULTBIN,Recoverable Fault B Input" "0,1" bitfld.long 0x10 8. "FAULTAIN,Recoverable Fault A Input" "0,1" newline bitfld.long 0x10 7. "PERBUFV,Period Buffer Valid" "0,1" bitfld.long 0x10 5. "PATTBUFV,Pattern Buffer Valid" "0,1" newline bitfld.long 0x10 4. "SLAVE,Slave" "0,1" bitfld.long 0x10 3. "DFS,Non-Recoverable Debug Fault State" "0,1" newline bitfld.long 0x10 2. "UFS,Non-recoverable Update Fault State" "0,1" bitfld.long 0x10 1. "IDX,Ramp" "0,1" newline bitfld.long 0x10 0. "STOP,Stop" "0,1" line.long 0x14 "COUNT,Count" hexmask.long 0x14 0.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH4_MODE,Count" hexmask.long 0x0 4.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH5_MODE,Count" hexmask.long 0x0 5.--31. 1. "COUNT,Counter Value" group.long 0x34++0x3 line.long 0x0 "COUNT_DITH6_MODE,Count" hexmask.long 0x0 6.--31. 1. "COUNT,Counter Value" group.word 0x38++0x1 line.word 0x0 "PATT,Pattern" bitfld.word 0x0 15. "PGV7,Pattern Generator 7 Output Value" "0,1" bitfld.word 0x0 14. "PGV6,Pattern Generator 6 Output Value" "0,1" newline bitfld.word 0x0 13. "PGV5,Pattern Generator 5 Output Value" "0,1" bitfld.word 0x0 12. "PGV4,Pattern Generator 4 Output Value" "0,1" newline bitfld.word 0x0 11. "PGV3,Pattern Generator 3 Output Value" "0,1" bitfld.word 0x0 10. "PGV2,Pattern Generator 2 Output Value" "0,1" newline bitfld.word 0x0 9. "PGV1,Pattern Generator 1 Output Value" "0,1" bitfld.word 0x0 8. "PGV0,Pattern Generator 0 Output Value" "0,1" newline bitfld.word 0x0 7. "PGE7,Pattern Generator 7 Output Enable" "0,1" bitfld.word 0x0 6. "PGE6,Pattern Generator 6 Output Enable" "0,1" newline bitfld.word 0x0 5. "PGE5,Pattern Generator 5 Output Enable" "0,1" bitfld.word 0x0 4. "PGE4,Pattern Generator 4 Output Enable" "0,1" newline bitfld.word 0x0 3. "PGE3,Pattern Generator 3 Output Enable" "0,1" bitfld.word 0x0 2. "PGE2,Pattern Generator 2 Output Enable" "0,1" newline bitfld.word 0x0 1. "PGE1,Pattern Generator 1 Output Enable" "0,1" bitfld.word 0x0 0. "PGE0,Pattern Generator 0 Output Enable" "0,1" group.long 0x3C++0x7 line.long 0x0 "WAVE,Waveform Control" bitfld.long 0x0 27. "SWAP3,Swap DTI Output Pair 3" "0,1" bitfld.long 0x0 26. "SWAP2,Swap DTI Output Pair 2" "0,1" newline bitfld.long 0x0 25. "SWAP1,Swap DTI Output Pair 1" "0,1" bitfld.long 0x0 24. "SWAP0,Swap DTI Output Pair 0" "0,1" newline bitfld.long 0x0 23. "POL7,Channel 7 Polarity" "0,1" bitfld.long 0x0 22. "POL6,Channel 6 Polarity" "0,1" newline bitfld.long 0x0 21. "POL5,Channel 5 Polarity" "0,1" bitfld.long 0x0 20. "POL4,Channel 4 Polarity" "0,1" newline bitfld.long 0x0 19. "POL3,Channel 3 Polarity" "0,1" bitfld.long 0x0 18. "POL2,Channel 2 Polarity" "0,1" newline bitfld.long 0x0 17. "POL1,Channel 1 Polarity" "0,1" bitfld.long 0x0 16. "POL0,Channel 0 Polarity" "0,1" newline bitfld.long 0x0 11. "CICCEN3,Circular Channel 3 Enable" "0,1" bitfld.long 0x0 10. "CICCEN2,Circular Channel 2 Enable" "0,1" newline bitfld.long 0x0 9. "CICCEN1,Circular Channel 1 Enable" "0,1" bitfld.long 0x0 8. "CICCEN0,Circular Channel 0 Enable" "0,1" newline bitfld.long 0x0 7. "CIPEREN,Circular period Enable" "0,1" bitfld.long 0x0 4.--6. "RAMP,Ramp Mode" "0: RAMP1 operation,1: Alternative RAMP2 operation,2: RAMP2 operation,3: Critical RAMP2 operation,4: Critical Swapped RAMP2 operation,?,?,?" newline bitfld.long 0x0 0.--2. "WAVEGEN,Waveform Generation" "0: Normal frequency,1: Match frequency,2: Normal PWM,3: Dual compare PWM,4: Dual-slope critical,5: Dual-slope with interrupt/event condition when..,6: Dual-slope with interrupt/event condition when..,7: Dual-slope with interrupt/event condition when.." line.long 0x4 "PER,Period" hexmask.long 0x4 0.--31. 1. "PER,Period Value" group.long 0x40++0x3 line.long 0x0 "PER_DITH4_MODE,Period" hexmask.long 0x0 4.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH5_MODE,Period" hexmask.long 0x0 5.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" group.long 0x40++0x3 line.long 0x0 "PER_DITH6_MODE,Period" hexmask.long 0x0 6.--31. 1. "PER,Period Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC[$1],Compare and Capture" hexmask.long 0x0 0.--31. 1. "CC,Channel Compare/Capture Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH4_MODE[$1],Compare and Capture" hexmask.long 0x0 4.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--3. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH5_MODE[$1],Compare and Capture" hexmask.long 0x0 5.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--4. 1. "DITHER,Dithering Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x44)++0x3 line.long 0x0 "CC_DITH6_MODE[$1],Compare and Capture" hexmask.long 0x0 6.--31. 1. "CC,Channel Compare/Capture Value" hexmask.long.byte 0x0 0.--5. 1. "DITHER,Dithering Cycle Number" repeat.end group.word 0x64++0x1 line.word 0x0 "PATTBUF,Pattern Buffer" bitfld.word 0x0 15. "PGVB7,Pattern Generation 7 Output Value Buffer" "0,1" bitfld.word 0x0 14. "PGVB6,Pattern Generation 6 Output Value Buffer" "0,1" newline bitfld.word 0x0 13. "PGVB5,Pattern Generation 5 Output Value Buffer" "0,1" bitfld.word 0x0 12. "PGVB4,Pattern Generation 4 Output Value Buffer" "0,1" newline bitfld.word 0x0 11. "PGVB3,Pattern Generation 3 Output Value Buffer" "0,1" bitfld.word 0x0 10. "PGVB2,Pattern Generation 2 Output Value Buffer" "0,1" newline bitfld.word 0x0 9. "PGVB1,Pattern Generation 1 Output Value Buffer" "0,1" bitfld.word 0x0 8. "PGVB0,Pattern Generation 0 Output Value Buffer" "0,1" newline bitfld.word 0x0 7. "PGEB7,Pattern Generation 7 Output Enable Buffer" "0,1" bitfld.word 0x0 6. "PGEB6,Pattern Generation 6 Output Enable Buffer" "0,1" newline bitfld.word 0x0 5. "PGEB5,Pattern Generation 5 Output Enable Buffer" "0,1" bitfld.word 0x0 4. "PGEB4,Pattern Generation 4 Output Enable Buffer" "0,1" newline bitfld.word 0x0 3. "PGEB3,Pattern Generation 3 Output Enable Buffer" "0,1" bitfld.word 0x0 2. "PGEB2,Pattern Generation 2 Output Enable Buffer" "0,1" newline bitfld.word 0x0 1. "PGEB1,Pattern Generation 1 Output Enable Buffer" "0,1" bitfld.word 0x0 0. "PGEB0,Pattern Generation 0 Output Enable Buffer" "0,1" group.long 0x6C++0x3 line.long 0x0 "PERBUF,Period Buffer" hexmask.long 0x0 0.--31. 1. "PERBUF,Period Buffer Value" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH4_MODE,Period Buffer" hexmask.long 0x0 4.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH5_MODE,Period Buffer" hexmask.long 0x0 5.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" group.long 0x6C++0x3 line.long 0x0 "PERBUF_DITH6_MODE,Period Buffer" hexmask.long 0x0 6.--31. 1. "PERBUF,Period Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF[$1],Compare and Capture Buffer" hexmask.long 0x0 0.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH4_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 4.--31. 1. "CCBUF,Dithering Buffer Cycle Number" hexmask.long.byte 0x0 0.--3. 1. "DITHERBUF,Channel Compare/Capture Buffer Value" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH5_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 5.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--4. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x70)++0x3 line.long 0x0 "CCBUF_DITH6_MODE[$1],Compare and Capture Buffer" hexmask.long 0x0 6.--31. 1. "CCBUF,Channel Compare/Capture Buffer Value" hexmask.long.byte 0x0 0.--5. 1. "DITHERBUF,Dithering Buffer Cycle Number" repeat.end tree.end tree.end tree "TPI (Trace Port Interface Register)" base ad:0xE0040000 rgroup.long 0x0++0x3 line.long 0x0 "SSPSR,Supported Parallel Port Size Register" group.long 0x4++0x3 line.long 0x0 "CSPSR,Current Parallel Port Size Register" group.long 0x10++0x3 line.long 0x0 "ACPR,Asynchronous Clock Prescaler Register" hexmask.long.word 0x0 0.--12. 1. "PRESCALER," group.long 0xF0++0x3 line.long 0x0 "SPPR,Selected Pin Protocol Register" bitfld.long 0x0 0.--1. "TXMODE," "0,1,2,3" rgroup.long 0x300++0x3 line.long 0x0 "FFSR,Formatter and Flush Status Register" bitfld.long 0x0 3. "FtNonStop," "0,1" bitfld.long 0x0 2. "TCPresent," "0,1" bitfld.long 0x0 1. "FtStopped," "0,1" bitfld.long 0x0 0. "FlInProg," "0,1" group.long 0x304++0x3 line.long 0x0 "FFCR,Formatter and Flush Control Register" bitfld.long 0x0 8. "TrigIn," "0,1" bitfld.long 0x0 1. "EnFCont," "0,1" rgroup.long 0x308++0x3 line.long 0x0 "FSCR,Formatter Synchronization Counter Register" rgroup.long 0xEE8++0xB line.long 0x0 "TRIGGER,TRIGGER" bitfld.long 0x0 0. "TRIGGER," "0,1" line.long 0x4 "FIFO0,Integration ETM Data" bitfld.long 0x4 29. "ITM_ATVALID," "0,1" bitfld.long 0x4 27.--28. "ITM_bytecount," "0,1,2,3" bitfld.long 0x4 26. "ETM_ATVALID," "0,1" bitfld.long 0x4 24.--25. "ETM_bytecount," "0,1,2,3" hexmask.long.byte 0x4 16.--23. 1. "ETM2," hexmask.long.byte 0x4 8.--15. 1. "ETM1," hexmask.long.byte 0x4 0.--7. 1. "ETM0," line.long 0x8 "ITATBCTR2,ITATBCTR2" bitfld.long 0x8 0. "ATREADY," "0,1" rgroup.long 0xEF8++0x7 line.long 0x0 "ITATBCTR0,ITATBCTR0" bitfld.long 0x0 0. "ATREADY," "0,1" line.long 0x4 "FIFO1,Integration ITM Data" bitfld.long 0x4 29. "ITM_ATVALID," "0,1" bitfld.long 0x4 27.--28. "ITM_bytecount," "0,1,2,3" bitfld.long 0x4 26. "ETM_ATVALID," "0,1" bitfld.long 0x4 24.--25. "ETM_bytecount," "0,1,2,3" hexmask.long.byte 0x4 16.--23. 1. "ITM2," hexmask.long.byte 0x4 8.--15. 1. "ITM1," hexmask.long.byte 0x4 0.--7. 1. "ITM0," group.long 0xF00++0x3 line.long 0x0 "ITCTRL,Integration Mode Control" bitfld.long 0x0 0. "Mode," "0,1" group.long 0xFA0++0x7 line.long 0x0 "CLAIMSET,Claim tag set" line.long 0x4 "CLAIMCLR,Claim tag clear" rgroup.long 0xFC8++0x7 line.long 0x0 "DEVID,TPIU_DEVID" bitfld.long 0x0 11. "NRZVALID," "0,1" bitfld.long 0x0 10. "MANCVALID," "0,1" bitfld.long 0x0 9. "PTINVALID," "0,1" bitfld.long 0x0 6.--8. "MinBufSz," "0,1,2,3,4,5,6,7" bitfld.long 0x0 5. "AsynClkIn," "0,1" bitfld.long 0x0 0. "NrTraceInput," "0,1" line.long 0x4 "DEVTYPE,TPIU_DEVTYPE" hexmask.long.byte 0x4 4.--7. 1. "MajorType," hexmask.long.byte 0x4 0.--3. 1. "SubType," tree.end tree "TRAM (TrustRAM)" base ad:0x44824000 group.long 0x0++0xF line.long 0x0 "CTRLA,Control" bitfld.long 0x0 7. "SILACC,Silent Access" "0,1" bitfld.long 0x0 6. "DRP,Data Remanence Prevention" "0,1" bitfld.long 0x0 4. "TAMPERS,Tamper Erase" "0,1" bitfld.long 0x0 1. "ENABLE,Enable" "0,1" bitfld.long 0x0 0. "SWRST,Software Reset" "0,1" line.long 0x4 "INTENCLR,Interrupt Enable Clear" bitfld.long 0x4 1. "DRP,Data Remanence Prevention Ended Interrupt Enable" "0,1" bitfld.long 0x4 0. "ERR,TrustRAM Readout Error Interrupt Enable" "0,1" line.long 0x8 "INTENSET,Interrupt Enable Set" bitfld.long 0x8 1. "DRP,Data Remanence Prevention Ended Interrupt Enable" "0,1" bitfld.long 0x8 0. "ERR,TrustRAM Readout Error Interrupt Enable" "0,1" line.long 0xC "INTFLAG,Interrupt Flag Status and Clear" bitfld.long 0xC 1. "DRP,Data Remanence Prevention Ended" "0,1" bitfld.long 0xC 0. "ERR,TrustRAM Readout Error" "0,1" rgroup.long 0x10++0x7 line.long 0x0 "STATUS,Status" bitfld.long 0x0 1. "DRP,Data Remanence Prevention Ongoing" "0,1" bitfld.long 0x0 0. "RAMINV,RAM Inversion Bit" "0,1" line.long 0x4 "SYNCBUSY,Synchronization Busy Status" bitfld.long 0x4 1. "ENABLE,Enable Busy" "0,1" bitfld.long 0x4 0. "SWRST,Software Reset Busy" "0,1" wgroup.long 0x18++0x7 line.long 0x0 "DSCC,Data Scramble Control" bitfld.long 0x0 31. "DSCEN,Data Scramble Enable" "0,1" hexmask.long 0x0 0.--29. 1. "DSCKEY,Data Scramble Key" line.long 0x4 "PERMW,Permutation Write" bitfld.long 0x4 0.--2. "DATA,Permutation Scrambler Data Input" "0,1,2,3,4,5,6,7" rgroup.long 0x20++0x3 line.long 0x0 "PERMR,Permutation Read" bitfld.long 0x0 0.--2. "DATA,Permutation Scrambler Data Output" "0,1,2,3,4,5,6,7" repeat 2048. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1000)++0x3 line.long 0x0 "RAM[$1],TrustRAM" hexmask.long 0x0 0.--31. 1. "DATA,Trust RAM Data" repeat.end tree.end tree "TRNG (True Random Number Generator)" base ad:0x44870000 group.byte 0x0++0x0 line.byte 0x0 "CTRLA,Control A" bitfld.byte 0x0 6. "RUNSTDBY,Run in Standby" "0,1" bitfld.byte 0x0 1. "ENABLE,Enable" "0,1" group.byte 0x4++0x0 line.byte 0x0 "EVCTRL,Event Control" bitfld.byte 0x0 0. "DATARDYEO,Data Ready Event Output" "0,1" group.byte 0x8++0x2 line.byte 0x0 "INTENCLR,Interrupt Enable Clear" bitfld.byte 0x0 0. "DATARDY,Data Ready Interrupt Enable" "0,1" line.byte 0x1 "INTENSET,Interrupt Enable Set" bitfld.byte 0x1 0. "DATARDY,Data Ready Interrupt Enable" "0,1" line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear" bitfld.byte 0x2 0. "DATARDY,Data Ready Interrupt Flag" "0,1" rgroup.long 0x20++0x3 line.long 0x0 "DATA,Output Data" hexmask.long 0x0 0.--31. 1. "DATA,Output Data" tree.end tree "USBHS (USB High-Speed)" base ad:0x0 tree "USBHS0" base ad:0x4F010000 tree "ENDPOINT0" group.long 0x0++0x17 line.long 0x0 "CTRLA,USBHS Control Register A. (All bits except ENABLE and SWRST are Enable protected)" bitfld.long 0x0 10. "REFCLKSEL,Select USB PLL Reference Clock Speed" "0,1" newline bitfld.long 0x0 9. "IDOVEN,ID Source Select" "0,1" newline bitfld.long 0x0 8. "IDVAL,Override Valud of ID" "0,1" newline bitfld.long 0x0 1. "ENABLE,USBHS Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,USBHS Software Reset" "0,1" line.long 0x4 "CTRLB,USBHS Control Register B" hexmask.long.tbyte 0x4 0.--19. 1. "BLANK,Blank the wakeup monitoring for a specific real time" line.long 0x8 "CTRLC,USBHS Control Register C" bitfld.long 0x8 4. "T1MSEN,REFCLK and SUSPENDM override" "0,1" line.long 0xC "INTENCLR,USBHS Interrupt Enable Clear Register" bitfld.long 0xC 5. "PHYRDY,Clear PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0xC 4. "T1MS,Clear T1MS Interrupt Enable" "0,1" newline bitfld.long 0xC 3. "DMA,Clear DMA Interrupt Enable" "0,1" newline bitfld.long 0xC 2. "USB,Clear USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0xC 1. "RESUME,Clear Resume Interrupt Enable" "0,1" newline bitfld.long 0xC 0. "WAKEUP,Clear USCORE Detaction Interrupt Enable" "0,1" line.long 0x10 "INTENSET,USBHS Interrupt Enable Clear Register" bitfld.long 0x10 5. "PHYRDY,PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0x10 4. "T1MS,T1MS Interrupt Enable" "0,1" newline bitfld.long 0x10 3. "DMA,DMA Interrupt Enable" "0,1" newline bitfld.long 0x10 2. "USB,USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0x10 1. "RESUME,Resume Interrupt Enable" "0,1" newline bitfld.long 0x10 0. "WAKEUP,USCORE Detaction Interrupt Enable" "0,1" line.long 0x14 "INTFLAG,USBHS Interrupt Flag Register" bitfld.long 0x14 5. "PHYRDY,PHY Ready Interrupt" "0,1" newline bitfld.long 0x14 4. "T1MS,Timer 1ms Tick Interrupt" "0,1" newline bitfld.long 0x14 3. "DMA,DMA Interrupt" "0,1" newline bitfld.long 0x14 2. "USB,USBCORE General Interrupt" "0,1" newline bitfld.long 0x14 1. "RESUME,Resume Interrupt" "0,1" newline bitfld.long 0x14 0. "WAKEUP,USB Activity Detection Interrupt" "0,1" rgroup.long 0x18++0x7 line.long 0x0 "STATUS,USBHS Status Register" bitfld.long 0x0 2. "VREGRDY,USB Voltage Regulator Status" "0,1" newline bitfld.long 0x0 1. "PHYON,Power On of PHY Complete" "0,1" newline bitfld.long 0x0 0. "PHYRDY,PHY Is Ready for USBCORE Activity" "0,1" line.long 0x4 "SYNCBUSY,USBHS Syncbusy Register" bitfld.long 0x4 2. "T1MSEN,T1MS enable busy bit" "0,1" newline bitfld.long 0x4 1. "ENABLE,Enable busy bit" "0,1" newline bitfld.long 0x4 0. "SWRST,Software reset busy bit" "0,1" group.byte 0x1000++0x1 line.byte 0x0 "FADDR,Function Address Register" hexmask.byte 0x0 0.--6. 1. "FUNCADDR,Function address" line.byte 0x1 "POWER,Used For Controlling Suspend And Resume Signaling And Some Basic Operation Of USBCORE" bitfld.byte 0x1 7. "ISOUPDATE,when set by cpu the usbcore will wait for an sof token" "0,1" newline bitfld.byte 0x1 6. "SOFTCONN,if enabled the D+ D- lines are enabled when this bit is set by the cpu" "0,1" newline bitfld.byte 0x1 5. "HSENABLE,when set by cpu the usbcore will negotiate the high speed mode" "0,1" newline bitfld.byte 0x1 4. "HSMODE,when set this read only bit indicates high speed mode successfully negotiated during usb reset" "0,1" newline bitfld.byte 0x1 3. "RESET,this bit is set when reset signaling is present on the bus" "0,1" newline bitfld.byte 0x1 2. "RESUME,set by cpu to generate resume signaling when te device is in suspend" "0,1" newline bitfld.byte 0x1 1. "SUSPENDMODE,set by cpu to enter suspend mode" "0,1" newline bitfld.byte 0x1 0. "ENABLESUSPENDM,set by the cpu to enable suspendm output" "0,1" rgroup.word 0x1002++0x3 line.word 0x0 "INTRTX,Read Only Register Which Indicates Which Interrupts Are Currently Active For EP0 And TX EP1-15" bitfld.word 0x0 7. "EP7TX,Interrupts Active For TX7 Endpoint" "0,1" newline bitfld.word 0x0 6. "EP6TX,Interrupts Active For TX6 Endpoint" "0,1" newline bitfld.word 0x0 5. "EP5TX,Interrupts Active For TX5 Endpoint" "0,1" newline bitfld.word 0x0 4. "EP4TX,Interrupts Active For TX4 Endpoint" "0,1" newline bitfld.word 0x0 3. "EP3TX,Interrupts Active For TX3 Endpoint" "0,1" newline bitfld.word 0x0 2. "EP2TX,Interrupts Active For TX2 Endpoint" "0,1" newline bitfld.word 0x0 1. "EP1TX,Interrupts Active For TX1 Endpoint" "0,1" newline bitfld.word 0x0 0. "EP0TX,Interrupts Active For TX0 Endpoint" "0,1" line.word 0x2 "INTRRX,Read Only Register Which Indicates Which Interrupts Are Currently Active For RX EP1-15" bitfld.word 0x2 7. "EP7RX,Interrupts Active For Which RX7 Endpoint" "0,1" newline bitfld.word 0x2 6. "EP6RX,Interrupts Active For Which RX6 Endpoint" "0,1" newline bitfld.word 0x2 5. "EP5RX,Interrupts Active For Which RX5 Endpoint" "0,1" newline bitfld.word 0x2 4. "EP4RX,Interrupts Active For Which RX4 Endpoint" "0,1" newline bitfld.word 0x2 3. "EP3RX,Interrupts Active For Which RX3 Endpoint" "0,1" newline bitfld.word 0x2 2. "EP2RX,Interrupts Active For Which RX2 Endpoint" "0,1" newline bitfld.word 0x2 1. "EP1RX,Interrupts Active For Which RX1 Endpoint" "0,1" group.word 0x1006++0x3 line.word 0x0 "INTRTXE,Interrupt Enable Bits for INTRTX" bitfld.word 0x0 7. "EP7TXEN,Interrupt Enabled for TX EP7" "0,1" newline bitfld.word 0x0 6. "EP6TXEN,Interrupt Enabled for TX EP6" "0,1" newline bitfld.word 0x0 5. "EP5TXEN,Interrupt Enabled for TX EP5" "0,1" newline bitfld.word 0x0 4. "EP4TXEN,Interrupt Enabled for TX EP4" "0,1" newline bitfld.word 0x0 3. "EP3TXEN,Interrupt Enabled for TX EP3" "0,1" newline bitfld.word 0x0 2. "EP2TXEN,Interrupt Enabled for TX EP2" "0,1" newline bitfld.word 0x0 1. "EP1TXEN,Interrupt Enabled for TX EP1" "0,1" newline bitfld.word 0x0 0. "EP0TXEN,Interrupt Enabled for TX EP0" "0,1" line.word 0x2 "INTRRXE,Interrupt Enable Bits for INTRRX" bitfld.word 0x2 7. "EP7RXE,Interrupt Enabled for RX EP7" "0,1" newline bitfld.word 0x2 6. "EP6RXE,Interrupt Enabled for RX EP6" "0,1" newline bitfld.word 0x2 5. "EP5RXE,Interrupt Enabled for RX EP5" "0,1" newline bitfld.word 0x2 4. "EP4RXE,Interrupt Enabled for RX EP4" "0,1" newline bitfld.word 0x2 3. "EP3RXE,Interrupt Enabled for RX EP3" "0,1" newline bitfld.word 0x2 2. "EP2RXE,Interrupt Enabled for RX EP2" "0,1" newline bitfld.word 0x2 1. "EP1RXE,Interrupt Enabled for RX EP1" "0,1" rgroup.byte 0x100A++0x0 line.byte 0x0 "INTRUSB,Read Only Register Which Indicates Which USB Interrupts Are Currently Active." bitfld.byte 0x0 7. "VBUSERR,Set When VBus Drops Below The VBus Valid Threshold During A Session." "0,1" newline bitfld.byte 0x0 6. "SESSREQ,Set When Session Request Signaling Has Been Detected." "0,1" newline bitfld.byte 0x0 5. "DISCON,Set In Host Mode When A Device Disconnect Is Detected.Set In Peripheral Mode When A Session Ends" "0,1" newline bitfld.byte 0x0 4. "CONN,Set When A Device Connection Is Detected" "0,1" newline bitfld.byte 0x0 3. "SOF,Set When A New Frame Starts" "0,1" newline bitfld.byte 0x0 2. "RESET,Set In Peripheral Mode when Reset Is Detected On The Bus. In HostMode When Babble Is Detected" "0,1" newline bitfld.byte 0x0 1. "RESUME,Set When Resume Signal Is Detected On The Bus" "0,1" newline bitfld.byte 0x0 0. "SUSPEND,Set When Suspend Signal Is Detected On The Bus" "0,1" group.byte 0x100B++0x0 line.byte 0x0 "INTRUSBE,Interrupt Enable Bits for USB Interrupts" bitfld.byte 0x0 7. "VBUSERREN,VBus Error Interrupt Enable" "0,1" newline bitfld.byte 0x0 6. "SESSREQEN,SESSREQ Interrupt Enable" "0,1" newline bitfld.byte 0x0 5. "DISCONEN,DISCONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CONNEN,CONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "SOFEN,SOF Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RESETEN,RESET/BABBLE Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "RESUMEEN,RESUME Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "SUSPENDEN,SUSEPND Interrupt Enable" "0,1" rgroup.word 0x100C++0x1 line.word 0x0 "FRAME,Holds The Last Received Frame Number" hexmask.word 0x0 0.--10. 1. "FRMNUM,Frame Number" group.byte 0x100E++0x1 line.byte 0x0 "INDEX,Index Is A 4-Bit Register That Determines Which Endpoint Control/Status Registers Are Accessed" hexmask.byte 0x0 0.--3. 1. "SELEP,The Selected Endpoint" line.byte 0x1 "TESTMODE,Not Used In Normal Operation. Configuration To Put the USBCORE Into One Of The Four Test Modes For HighSpeed Operation" bitfld.byte 0x1 7. "FORCEHOST,The CPU Sets This Bit To Instruct The Core To Enter Host Mode When The Session Bit Is Set" "0,1" newline bitfld.byte 0x1 6. "FIFOACCESS,The CPU Sets This Bit To Transfer The Packet In The Endpoint 0 TX FIFO To The Endpoint 0 Rx FIFO. It Is Cleared Automatically." "0,1" newline bitfld.byte 0x1 5. "FORCEFS,Depending On Bit 7 Force Controller Into FS Speed Mode" "0,1" newline bitfld.byte 0x1 4. "FORCEHS,Depending On Bit 7 Force Controller Into High Speed Mode" "0,1" newline bitfld.byte 0x1 3. "TESTPACKET,Set To Enter The Test_Packet mode" "0,1" newline bitfld.byte 0x1 2. "TESTK,Set To Enter The Test_K mode" "0,1" newline bitfld.byte 0x1 1. "TESTJ,Set To Enter The Test_J mode" "0,1" newline bitfld.byte 0x1 0. "TESTSE0NAK,Set To Enter The Test_SE0_NAK mode" "0,1" group.byte 0x1012++0x0 line.byte 0x0 "CSR0L_HOST_EP0_MODE,ENDPOINT0 Control And Status Bits for TX Endpoint 0" bitfld.byte 0x0 7. "NAKTIMEOUT,This Bit Will Be Set When Endpoint 0 Is Halted Following The Receipt Of NAK Responses For Longer Than The Time Set By The NAKLimit0 register." "0,1" newline bitfld.byte 0x0 6. "STATUSPKT,The CPU Sets This Bit At The Same Time As The TxPktRdy Or ReqPkt Bit Is Set To Perform A Status Stage Transaction" "0,1" newline bitfld.byte 0x0 5. "REQPKT,The CPU Sets This Bit To Request An IN Transaction" "0,1" newline bitfld.byte 0x0 4. "ERROR,This Bit Will Be Set When Three Attempts Have Been Made To Perform A Transaction With No Response From The Peripheral" "0,1" newline bitfld.byte 0x0 3. "SETUPPKT,The CPU Sets This Bit At The Same Time As The TxPktRdy Bit Is Set To Send A SETUP Token Instead Of An OUT Token For The Transaction" "0,1" newline bitfld.byte 0x0 2. "RXSTALL,This Bit Is Set When A Stall Handshake Is Received." "0,1" newline bitfld.byte 0x0 1. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received" "0,1" group.byte 0x1012++0x1 line.byte 0x0 "CSR0L_PERIPHERAL_EP0_MODE,ENDPOINT0 Control And Status Bits for TX Endpoint 0" bitfld.byte 0x0 7. "SERVICEDSETUPEND,The CPU Writes A 1 To This Bit To Clear The SetupEnd Bit. It Is Cleared Automatically." "0,1" newline bitfld.byte 0x0 6. "SERVICEDRXPKTRDY,The CPU Writes A 1 To This Bit To Clear The RxPktRdy Bit. It Is Cleared Automatically" "0,1" newline bitfld.byte 0x0 5. "SENDSTALL,The CPU Writes A 1 To This Bit To Terminate The Current Transaction" "0,1" newline bitfld.byte 0x0 4. "SETUPEND,This Bit Will Be Set When A Control Transaction Ends Before The DataEnd Bit Has Been Set" "0,1" newline bitfld.byte 0x0 3. "DATAEND,The CPU Sets This Bit 1. When Setting TxPktRdy For The Last Data Packet 2. When Clearing RxPktRdy After Unloading The Last Data Packet.3. When Setting TxPktRdy For A Zero Length Data Packet." "0,1" newline bitfld.byte 0x0 2. "SENTSTALL,This Bit Is Set When A Stall Handshake Is Transmitted." "0,1" newline bitfld.byte 0x0 1. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received" "0,1" line.byte 0x1 "CSR0H_HOST_EP0_MODE,ENDPOINT0 Additional Control And Status Bits For TX Endpoint 0" bitfld.byte 0x1 3. "DISPING,The CPU Writes A 1 To This Bit To Instruct The Core Not To Issue PING Tokens In Data And Status Phases Of A High-Speed Control Transfer" "0,1" newline bitfld.byte 0x1 2. "DATATOGGLEWRTENABLE,The CPU Writes A 1 To This Bit To Enable The Current State Of The Endpoint 0 Data Toggle To Be Written" "0,1" newline bitfld.byte 0x1 1. "DATATOGGLE,When Read This Bit Indicates The Current State Of The Endpoint 0 Data Toggle" "0,1" newline bitfld.byte 0x1 0. "FLUSHFIFO,Flush The Next Packet To Be Transmitted/Read" "0,1" group.byte 0x1013++0x0 line.byte 0x0 "CSR0H_PERIPHERAL_EP0_MODE,ENDPOINT0 Additional Control And Status Bits For TX Endpoint 0" bitfld.byte 0x0 0. "FLUSHFIFO,Flush The Next Packet To Be Transmitted/Read" "0,1" rgroup.byte 0x1018++0x0 line.byte 0x0 "COUNT0,ENDPOINT0 Number Of Received Bytes In Endpoint 0 FIFO" hexmask.byte 0x0 0.--6. 1. "EP0RXCOUNT,Number Of Received Data Bytes In Endpoint 0 FIFO" group.byte 0x101A++0x1 line.byte 0x0 "TYPE0,ENDPOINT0 Host Mode Only: Operating Speed Of The Targeted Device" bitfld.byte 0x0 6.--7. "SPEED,Operating Speed Of The Target Device" "?,1: Device In High Speed,2: Device In Full Speed,3: Device In Low Speed" line.byte 0x1 "NAKLIMIT0,ENDPOINT0 Host Mode Only: Sets The NAK Response Timeout On Endpoint 0." hexmask.byte 0x1 0.--4. 1. "EP0NAKLIMIT,Number Of Frames/Microframes After Which Endpoint 0 Should Timeout" rgroup.byte 0x101F++0x0 line.byte 0x0 "CONFIGDATA,ENDPOINT0 Returns Information About The Selected Core Configuration. Only Applicable when INDEX Regsiter Is 0. That Is Endpoint0 Is Selected." bitfld.byte 0x0 7. "MPRXE,Automatic Splitting Of Bulk Amalgamation Is Selected" "0,1" newline bitfld.byte 0x0 6. "MPTXE,Automatic Splitting Of Bulk Packets Is Selected" "0,1" newline bitfld.byte 0x0 5. "BIGENDIAN,Indicates Little Endian Ordering" "0,1" newline bitfld.byte 0x0 4. "HBRXE,Indicates High Bandwidth RX ISO Endpoint Support Selected" "0,1" newline bitfld.byte 0x0 3. "HBTXE,Indicates High Bandwidth TX ISO Endpoint Support Selected" "0,1" newline bitfld.byte 0x0 2. "DYNFIFOSIZING,Dynamic FIFO Sizing Is Selected Or Not" "0,1" newline bitfld.byte 0x0 1. "SOFTCONE,Indicates Soft Connect Or Disconnect" "0,1" newline bitfld.byte 0x0 0. "UTMIDATAWIDTH,Indicates Selected UTMI+ DataWidth. Always 0 Indicates 8 Bits" "0,1" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1020)++0x3 line.long 0x0 "FIFOX[$1],Address Range Provides 16 Addresses For CPU Access To The FIFO's For Each Endpoint" hexmask.long 0x0 0.--31. 1. "FIFOADDR,Writing To These Addresses Loads Data Into The TXFIFO For The Corresponding Endpoint" repeat.end group.byte 0x1060++0x3 line.byte 0x0 "DEVCTL,Selects Whether The Core Is Operating In Peripheral Or Host Mode" bitfld.byte 0x0 7. "BDEVICE,indicates whether the core is operating as a 'A' device or 'B' device" "0,1" newline bitfld.byte 0x0 6. "FSDEV,host mode only: this bit is set when a full or high speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 5. "LSDEV,host mode only: this bit is set when a low speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 3.--4. "VBUS,encoded value for the VBus level" "0: Below SessionEnd,1: Above SessionEnd below AValid,2: Above AValid below VBus Valid,3: Above VBusValid" newline bitfld.byte 0x0 2. "HOSTMODE,this read-only bit is set when the USBCORE is acting as a host" "0,1" newline bitfld.byte 0x0 1. "HOSTREQ,when set the USBCORE will initiate the host negotiation when suspend mode is entered." "0,1" newline bitfld.byte 0x0 0. "SESSION,when operating as an 'A' device this bit is set or cleared by CPU to state or end a session. when operating as a 'B' device this bit is set/cleared by the USBCORE when a session starts/ends" "0,1" line.byte 0x1 "MISC,RX/TX Early DMA Enable Bits" bitfld.byte 0x1 1. "TXEDMA,DMA_REQ signal for all IN endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all in endpoints will be..,1: Dma_req signal for all in endpoints will be.." newline bitfld.byte 0x1 0. "RXEDMA,DMA_REQ signal for all OUT endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all out endpoints will be..,1: Dma_req signal for all out endpoints will be.." line.byte 0x2 "TXFIFOSZ,Controls The Size Of The Selected TX Endpoint FIFO" bitfld.byte 0x2 4. "DPB,double packet buffering supported or not" "0,1" newline hexmask.byte 0x2 0.--3. 1. "SZ,maximum packet size to be allowed" line.byte 0x3 "RXFIFOSZ,Controls The Size Of The Selected RX Endpoint FIFO" bitfld.byte 0x3 4. "DPB,double packet buffering enabled or not" "0,1" newline hexmask.byte 0x3 0.--3. 1. "SZ,maximum packet size to be allowed" group.word 0x1064++0x3 line.word 0x0 "TXFIFOADD,Controls The Start Address Of the Selected TX Endpoint FIFO" hexmask.word 0x0 0.--12. 1. "ADDR,start address of the endpoint FIFO" line.word 0x2 "RXFIFOADD,Controls The Start Address Of the Selected RX Endpoint FIFO" hexmask.word 0x2 0.--12. 1. "ADDR,start address of the endpoint FIFO" rgroup.byte 0x1078++0x1 line.byte 0x0 "EPINFO,Allows Read-Back Of The Number Of TX And RX Endpoints" hexmask.byte 0x0 4.--7. 1. "RXENDPOINTS,number of rx endpoints" newline hexmask.byte 0x0 0.--3. 1. "TXENDPOINTS,number of tx endpoints" line.byte 0x1 "RAMINFO,Details About Width Of RAM and DMA Channels" hexmask.byte 0x1 4.--7. 1. "DMACHANS,number of dma channels implemented in the design" newline hexmask.byte 0x1 0.--3. 1. "RAMBITS,width of the ram address bus" group.byte 0x107A++0x5 line.byte 0x0 "LINKINFO,Allows Some Delays To Be Specified" hexmask.byte 0x0 4.--7. 1. "WTCON,sets the wait to be applied to allow for the user's connect/disconnect filter in units of 533.3ns" newline hexmask.byte 0x0 0.--3. 1. "WTID,sets the delay to be applied from idpullup being asserted to iddig being considered valid in units of 4.369ms" line.byte 0x1 "VPLEN,Sets The Duration Of The VBus Pulsing Charge" hexmask.byte 0x1 0.--7. 1. "VPLEN,duration of VBus pulsing charge in units of 546.1us" line.byte 0x2 "HSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For HS Transactions" hexmask.byte 0x2 0.--7. 1. "HSEOF1,sets for high-speed transactions the time before eof to stop beginning new transactions in units of 133.3ns. (the default setting corresponds to 17.07us.)" line.byte 0x3 "FSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For FS Transactions" hexmask.byte 0x3 0.--7. 1. "FSEOF1,sets for full-speed transactions the time before eof to stop beginning new transactions in units of 533.3ns. (the default setting corresponds to 63.46us.)" line.byte 0x4 "LSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For LS Transactions" hexmask.byte 0x4 0.--7. 1. "LSEOF1,sets for low-speed transactions the time before eof to stop beginning new transactions in units of 1.067us. (the default setting corresponds to 121.6us.)" line.byte 0x5 "SOFTRST,Assert Low The Output Reset Signals NRSTO and NRSTXO" bitfld.byte 0x5 1. "NRSTX,when a 1 is written to this bit the output nrstxo will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrstxo will be asynchronously asserted and synchronously de-asserted with respect to xclk." "0,1" newline bitfld.byte 0x5 0. "NRST,when a 1 is written to this bit the output nrsto will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrsto will be asynchronously asserted and synchronously de-asserted with respect to clk." "0,1" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F011080 ad:0x4F011088 ad:0x4F011090 ad:0x4F011098 ad:0x4F0110A0 ad:0x4F0110A8 ad:0x4F0110B0 ad:0x4F0110B8) tree "TXFUNADDR[$1]" base $2 group.byte ($2)++0x0 line.byte 0x0 "TXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x0 0.--6. 1. "TXFUNCADDR,address of the target function" group.byte ($2+0x2)++0x2 line.byte 0x0 "TXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "TXHUBADDR,hub address" line.byte 0x1 "TXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" line.byte 0x2 "RXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x2 0.--6. 1. "RXFUNCADDR,address of the target function" group.byte ($2+0x6)++0x1 line.byte 0x0 "RXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "RXHUBADDR,hub address" line.byte 0x1 "RXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" tree.end repeat.end base ad:0x4F010000 group.long 0x1200++0x3 line.long 0x0 "DMAINTR,DMA Interrupt Status for Each Channel" hexmask.long.byte 0x0 0.--7. 1. "DMAINTR,DMA Interrupt for each channel" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F011204 ad:0x4F011214 ad:0x4F011224 ad:0x4F011234 ad:0x4F011244 ad:0x4F011254 ad:0x4F011264 ad:0x4F011274) tree "DMACNT[$1]" base $2 group.long ($2)++0xB line.long 0x0 "DMACNTL,DMA Transfer Control For Each Channel" bitfld.long 0x0 9.--10. "DMABRSTM,burst mode" "0: Burst Mode 0,1: Burst Mode 1,2: Burst Mode 2,3: Burst Mode 3" bitfld.long 0x0 8. "DMAERR,bus error bit" "0,1" hexmask.long.byte 0x0 4.--7. 1. "DMAEP,endpoint number this channel is assigned to" bitfld.long 0x0 3. "DMAIE,interrupt enable" "0,1" bitfld.long 0x0 2. "DMAMODE,transfer mode" "0: Mode 0 Transfer,1: Mode1 Transfer" bitfld.long 0x0 1. "DMADIR,transfer direction" "0: DMA Write (RX Endpoint),1: DMA Read (TX Endpoint)" bitfld.long 0x0 0. "DMAEN,dma transfer enable" "0,1" line.long 0x4 "DMAADDR,Memory Address Of The Corresponding DMA Channel" hexmask.long 0x4 2.--31. 1. "ADDR312,upper 30 bits of address" bitfld.long 0x4 0.--1. "ADDR10,Lower 2 bits of DMA memory address" "0,1,2,3" line.long 0x8 "DMACOUNT,Current DMA Count Of The Transfer" hexmask.long 0x8 0.--31. 1. "DMACOUNT,current dma count of the transfer" tree.end repeat.end base ad:0x4F010000 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1304)++0x3 line.long 0x0 "RQPKTCOUNT[$1],Host Mode Only: Used To Specify Number Of Packets That Are To Be Transaferred In A Block Transfer" hexmask.long.word 0x0 0.--15. 1. "RQPKTCOUNT,sets the number of packets of size maxp that are to be transferred in a block transfer. only used in host mode when autoreq is set. has no effect in peripheral mode or when autoreq is not set." repeat.end group.word 0x1340++0x9 line.word 0x0 "RXDPKTBUFDIS,Indicates Which Of The RX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x0 1.--15. 1. "EPxRXDIS,each bit indicates which of the Rx endpoint have disabled double buffer functionality" line.word 0x2 "TXDPKTBUFDIS,Indicates Which Of The TX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x2 1.--15. 1. "EPxTXDIS,each bit indicates which of the Tx endpoint have disabled double buffer functionality" line.word 0x4 "CTUCH,Chirp Timeout. Number Of XCLK Cycles Before The Timeout" hexmask.word 0x4 0.--15. 1. "CTUCH,this number when multiplied by 4 represents the number of xclk cycles before the timeout occurs" line.word 0x6 "CTHHSRTN,Sets The Delay From The End Of High-Speed Resume Signaling (Acting As A Host) To Enable The UTM Normal Operating Mode" hexmask.word 0x6 0.--15. 1. "CTHHSRTN,the delay from the end of high speed resume signaling to enabling utm normal operating mode." line.word 0x8 "CTHSBT,This Register Represents The Value To Be Added To The Minimum High Speed Timeout Period Of 736 Bit Times." hexmask.word.byte 0x8 0.--3. 1. "HSTMEOUTADD,this register represents the value to be added to the mimumum high speed timeout period of 736 bit times" group.word 0x1360++0x1 line.word 0x0 "LPMATTR,Defines The Attributes Of An LPM Transaction And Sleep Cycle." hexmask.word.byte 0x0 12.--15. 1. "ENDPOINT,this is the endpnt that in the token packet of the lpm transaction." newline bitfld.word 0x0 8. "RMTWAK,this bit is the remote wakeup enable bit." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "HIRD,this is the host initiated resume duration." newline hexmask.word.byte 0x0 0.--3. 1. "LINKSTATE,this value is provided by the host to the peripheral to indicate what state the peripheral must transition to after the receipt and acceptance of a lpm transaction." group.byte 0x1362++0x0 line.byte 0x0 "LPMCNTRL_HOST_MODE,LPM Control Register" bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate a resume from the l1 state" "0,1" newline bitfld.byte 0x0 0. "LPMXMT,software should set this bit to transmit an lpm transaction." "0,1" group.byte 0x1362++0x2 line.byte 0x0 "LPMCNTRL_PERIPHERAL_MODE,LPM Control Register" bitfld.byte 0x0 4. "LPMNAK,this bit is used to place all end points in a state such that the response to all transactions other then an lpm transaction will be a nak." "0,1" newline bitfld.byte 0x0 2.--3. "LPMEN,this register is used to enable lpm in the musbmhdrc." "0: Core supports LPM extended transactions,1: LPM is not supported but extended transactions..,2: LPM and extended transactions are not supported,3: LPM and extended transactions are not supported" newline bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate resume (remote wakeup)." "0,1" newline bitfld.byte 0x0 0. "LPMXMT,this bit is set by software to instruct the core to transition to the l1 state upon the receipt of the next lpm transaction." "0,1" line.byte 0x1 "LPMINTREN,LPM Interrupts Enable Register" bitfld.byte 0x1 5. "LPMERREN,LPMERR interrupt" "0,1" newline bitfld.byte 0x1 4. "LPMRESEN,LPMRES interrupt" "0,1" newline bitfld.byte 0x1 3. "LPMNCEN,LPMNC interrupt" "0,1" newline bitfld.byte 0x1 2. "LPMACKEN,LPMACK interrupt" "0,1" newline bitfld.byte 0x1 1. "LPMNYEN,LPMMNY interrupt" "0,1" newline bitfld.byte 0x1 0. "LPMSTEN,LPMMST interrupt" "0,1" line.byte 0x2 "LPMINTR_HOST_MODE,Status Of The LPM Power State" bitfld.byte 0x2 5. "LPMERR,this bit is set if a response to the lpm transaction is received with a bit stuff error or a pid error" "0,1" newline bitfld.byte 0x2 4. "LPMRES,this bit is set when the core has been resumed for any reason." "0,1" newline bitfld.byte 0x2 3. "LPMNC,this bit is set when an lpm transaction has been transmitted and has failed to complete." "0,1" newline bitfld.byte 0x2 2. "LPMACK,this bit is set when an lpm transaction is transmitted and the device responds with an ack." "0,1" newline bitfld.byte 0x2 1. "LPMNY,this bit is set when an lpm transaction is transmitted and the device responds with a nyet." "0,1" newline bitfld.byte 0x2 0. "LPMST,this bit is set when an lpm transaction is transmitted and the device responds with a stall." "0,1" group.byte 0x1364++0x1 line.byte 0x0 "LPMINTR_PERIPHERAL_MODE,Status Of The LPM Power State" bitfld.byte 0x0 5. "LPMERR,this bit is set if an lpm transaction is received that has a linkstate field that is not supported" "0,1" newline bitfld.byte 0x0 4. "LPMRES,this bit is set if the core has been resumed for any reason." "0,1" newline bitfld.byte 0x0 3. "LPMNC,this bit is set when an lpm transaction is received and the core responds with a nyet due to data pending in the rx fifos." "0,1" newline bitfld.byte 0x0 2. "LPMACK,this bit is set when an lpm transaction is received and the core responds with an ack." "0,1" newline bitfld.byte 0x0 1. "LPMNY,this bit is set when an lpm transaction is received and the core responds with a nyet" "0,1" newline bitfld.byte 0x0 0. "LPMST,this bit is set when an lpm transaction is received and the core responds with a stall." "0,1" line.byte 0x1 "LPMFADDR,Function Address In LPM Payload" hexmask.byte 0x1 0.--6. 1. "FUNCADDR,function address that will be placed in the LPM payload" group.long 0x1500++0x2B line.long 0x0 "PHY00,USBHPHY Control Register." bitfld.long 0x0 5.--7. "RXPHSSEL,RX clock phase select" "0: Earliest phase,?,?,?,?,?,?,7: Latest phase" newline bitfld.long 0x0 3.--4. "SLEWRATE,adjust FS/LS slew rate" "0: Highest slew rate,1: Middle slew rate,2: Middle slew rate,3: Smallest slew rate" newline bitfld.long 0x0 0.--2. "PREEMP,enables pre-emphasis" "0: Enable pre-emphasis during SOF and EOP,1: Enable pre-emphasis during chirp,2: Enable pre-emphasis in non-chirp state,3: Always enable pre-emphasis,?,?,?,?" line.long 0x4 "PHY04,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SQUELCH210,Lower 3 bits of RX squelch trigger point configuration" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 4. "HIZ,Set D+/D- to a high impedence state" "0,1" newline bitfld.long 0x4 3. "RSVD0," "0,1" newline bitfld.long 0x4 0.--2. "TXPHSSEL,set the Tx clock phase select" "0,1,2,3,4,5,6,7" line.long 0x8 "PHY08,USBHPHY Control Register." hexmask.long.byte 0x8 1.--7. 1. "RSVD0," newline bitfld.long 0x8 0. "SQUELCH3,MSB of Squelch configuration" "0,1" line.long 0xC "PHY0C,USBHPHY Control Register." bitfld.long 0xC 5.--7. "TUNE210,Lower 3 bits for HS amplitude tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0xC 0.--4. 1. "RSVD0," line.long 0x10 "PHY10,USBHPHY Control Register." bitfld.long 0x10 5.--7. "DRVTUNE210,Lower 3 bits for HS/FS/LS driver strength tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x10 0.--4. 1. "TUNE76543,Upper 5 bits for HS amplitude tuning" line.long 0x14 "PHY14,USBHPHY Control Register." bitfld.long 0x14 7. "ODT0,On die termination compensation voltage reference" "0,1" newline bitfld.long 0x14 4. "BYPSSSQUELCH,Bypass squelch trigger point configure in chirp mode" "0,1" newline bitfld.long 0x14 2.--3. "COMPBYPSS,Auto compensation bypass" "0,1,2,3" newline bitfld.long 0x14 0.--1. "DRVTUNE43,Upper 2 bits for HS/FS/LS driver strength tuning" "0,1,2,3" line.long 0x18 "PHY18,USBHPHY Control Register." hexmask.long.byte 0x18 2.--5. 1. "RSVD0," newline bitfld.long 0x18 0.--1. "ODT21,Upper 3 bits for on die termination compensation voltage reference" "0,1,2,3" line.long 0x1C "PHY1C,USBHPHY Control Register." bitfld.long 0x1C 7. "FSLSDIFF,Turn off FS/LS differential receiver in suspend mode" "0,1" newline hexmask.long.byte 0x1C 2.--6. 1. "RSVD1," newline bitfld.long 0x1C 1. "ODTBYPASS,ODT auto-refresh bypass" "0,1" newline bitfld.long 0x1C 0. "RSVD0," "0,1" line.long 0x20 "PHY20,USBHPHY Control Register." bitfld.long 0x20 6.--7. "HSSLEW10,Lower 2 bits for HS slew adjust rate" "0,1,2,3" newline hexmask.long.byte 0x20 0.--5. 1. "RSVD0," line.long 0x24 "PHY24,USBHPHY Control Register." bitfld.long 0x24 6.--7. "HSDRIVST10,HS transmit drive strength" "0,1,2,3" newline bitfld.long 0x24 3.--5. "HSPREEMPST,HS transmit pre emphasis strength" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 2. "RSVD0," "0,1" newline bitfld.long 0x24 0. "HSSLEW2,MSB of HS slew rate adjust" "0,1" line.long 0x28 "PHY28,USBHPHY Control Register." bitfld.long 0x28 5.--7. "HSDRVCOMP,HS drive current compensation voltage reference" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x28 1.--4. 1. "DISCONDET,HOST disconnects detection trigger point" newline bitfld.long 0x28 0. "HSDRIVST2,MSB of HS transmit driver strength" "0,1" group.long 0x1544++0xF line.long 0x0 "PHY44,USBHPHY Control Register." bitfld.long 0x0 7. "FRCSESSEND,force session end" "0,1" newline bitfld.long 0x0 4.--6. "RSVD1," "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3. "FRCVBUSVAL,Force output vbus_valid" "0,1" newline bitfld.long 0x0 2. "DIGDBG,Digital debug interface" "0,1" newline bitfld.long 0x0 1. "PLLDAMP,PLL damping factor" "0,1" newline bitfld.long 0x0 0. "RSVD0," "0,1" line.long 0x4 "PHY48,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SESSENDTUNE,Session end reference tuning" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 3.--4. "RSVD0," "0,1,2,3" newline bitfld.long 0x4 2. "VBUSCHRGE,VBus charging/discharging bypass" "0,1" newline bitfld.long 0x4 1. "FRCBSESSVAL,force B_sessionvalid" "0,1" newline bitfld.long 0x4 0. "FRCASESSVAL,force A_sessionvalid" "0,1" line.long 0x8 "PHY4C,USBHPHY Control Register." bitfld.long 0x8 6.--7. "BSESSVALIDTUNE10,Lower 2 B_sessionvalid reference tune" "0,1,2,3" newline bitfld.long 0x8 3.--5. "RSVD0," "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "VBUSVALTUNE,VBus_valid reference tuning" "0,1,2,3,4,5,6,7" line.long 0xC "PHY50,USBHPHY Control Register." bitfld.long 0xC 5.--7. "COMPCURREF,Compensation current tuning reference" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 4. "RSVD0," "0,1" newline bitfld.long 0xC 1.--3. "ASESSVALIDTUNE,A_sessionvalid reference tune" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 0. "BSESSVALIDTUNE2,MSB of B_sessionvalid reference tune" "0,1" tree.end tree "ENDPOINTX" group.long 0x0++0x17 line.long 0x0 "CTRLA,USBHS Control Register A. (All bits except ENABLE and SWRST are Enable protected)" bitfld.long 0x0 10. "REFCLKSEL,Select USB PLL Reference Clock Speed" "0,1" newline bitfld.long 0x0 9. "IDOVEN,ID Source Select" "0,1" newline bitfld.long 0x0 8. "IDVAL,Override Valud of ID" "0,1" newline bitfld.long 0x0 1. "ENABLE,USBHS Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,USBHS Software Reset" "0,1" line.long 0x4 "CTRLB,USBHS Control Register B" hexmask.long.tbyte 0x4 0.--19. 1. "BLANK,Blank the wakeup monitoring for a specific real time" line.long 0x8 "CTRLC,USBHS Control Register C" bitfld.long 0x8 4. "T1MSEN,REFCLK and SUSPENDM override" "0,1" line.long 0xC "INTENCLR,USBHS Interrupt Enable Clear Register" bitfld.long 0xC 5. "PHYRDY,Clear PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0xC 4. "T1MS,Clear T1MS Interrupt Enable" "0,1" newline bitfld.long 0xC 3. "DMA,Clear DMA Interrupt Enable" "0,1" newline bitfld.long 0xC 2. "USB,Clear USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0xC 1. "RESUME,Clear Resume Interrupt Enable" "0,1" newline bitfld.long 0xC 0. "WAKEUP,Clear USCORE Detaction Interrupt Enable" "0,1" line.long 0x10 "INTENSET,USBHS Interrupt Enable Clear Register" bitfld.long 0x10 5. "PHYRDY,PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0x10 4. "T1MS,T1MS Interrupt Enable" "0,1" newline bitfld.long 0x10 3. "DMA,DMA Interrupt Enable" "0,1" newline bitfld.long 0x10 2. "USB,USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0x10 1. "RESUME,Resume Interrupt Enable" "0,1" newline bitfld.long 0x10 0. "WAKEUP,USCORE Detaction Interrupt Enable" "0,1" line.long 0x14 "INTFLAG,USBHS Interrupt Flag Register" bitfld.long 0x14 5. "PHYRDY,PHY Ready Interrupt" "0,1" newline bitfld.long 0x14 4. "T1MS,Timer 1ms Tick Interrupt" "0,1" newline bitfld.long 0x14 3. "DMA,DMA Interrupt" "0,1" newline bitfld.long 0x14 2. "USB,USBCORE General Interrupt" "0,1" newline bitfld.long 0x14 1. "RESUME,Resume Interrupt" "0,1" newline bitfld.long 0x14 0. "WAKEUP,USB Activity Detection Interrupt" "0,1" rgroup.long 0x18++0x7 line.long 0x0 "STATUS,USBHS Status Register" bitfld.long 0x0 2. "VREGRDY,USB Voltage Regulator Status" "0,1" newline bitfld.long 0x0 1. "PHYON,Power On of PHY Complete" "0,1" newline bitfld.long 0x0 0. "PHYRDY,PHY Is Ready for USBCORE Activity" "0,1" line.long 0x4 "SYNCBUSY,USBHS Syncbusy Register" bitfld.long 0x4 2. "T1MSEN,T1MS enable busy bit" "0,1" newline bitfld.long 0x4 1. "ENABLE,Enable busy bit" "0,1" newline bitfld.long 0x4 0. "SWRST,Software reset busy bit" "0,1" group.byte 0x1000++0x1 line.byte 0x0 "FADDR,Function Address Register" hexmask.byte 0x0 0.--6. 1. "FUNCADDR,Function address" line.byte 0x1 "POWER,Used For Controlling Suspend And Resume Signaling And Some Basic Operation Of USBCORE" bitfld.byte 0x1 7. "ISOUPDATE,when set by cpu the usbcore will wait for an sof token" "0,1" newline bitfld.byte 0x1 6. "SOFTCONN,if enabled the D+ D- lines are enabled when this bit is set by the cpu" "0,1" newline bitfld.byte 0x1 5. "HSENABLE,when set by cpu the usbcore will negotiate the high speed mode" "0,1" newline bitfld.byte 0x1 4. "HSMODE,when set this read only bit indicates high speed mode successfully negotiated during usb reset" "0,1" newline bitfld.byte 0x1 3. "RESET,this bit is set when reset signaling is present on the bus" "0,1" newline bitfld.byte 0x1 2. "RESUME,set by cpu to generate resume signaling when te device is in suspend" "0,1" newline bitfld.byte 0x1 1. "SUSPENDMODE,set by cpu to enter suspend mode" "0,1" newline bitfld.byte 0x1 0. "ENABLESUSPENDM,set by the cpu to enable suspendm output" "0,1" rgroup.word 0x1002++0x3 line.word 0x0 "INTRTX,Read Only Register Which Indicates Which Interrupts Are Currently Active For EP0 And TX EP1-15" bitfld.word 0x0 7. "EP7TX,Interrupts Active For TX7 Endpoint" "0,1" newline bitfld.word 0x0 6. "EP6TX,Interrupts Active For TX6 Endpoint" "0,1" newline bitfld.word 0x0 5. "EP5TX,Interrupts Active For TX5 Endpoint" "0,1" newline bitfld.word 0x0 4. "EP4TX,Interrupts Active For TX4 Endpoint" "0,1" newline bitfld.word 0x0 3. "EP3TX,Interrupts Active For TX3 Endpoint" "0,1" newline bitfld.word 0x0 2. "EP2TX,Interrupts Active For TX2 Endpoint" "0,1" newline bitfld.word 0x0 1. "EP1TX,Interrupts Active For TX1 Endpoint" "0,1" newline bitfld.word 0x0 0. "EP0TX,Interrupts Active For TX0 Endpoint" "0,1" line.word 0x2 "INTRRX,Read Only Register Which Indicates Which Interrupts Are Currently Active For RX EP1-15" bitfld.word 0x2 7. "EP7RX,Interrupts Active For Which RX7 Endpoint" "0,1" newline bitfld.word 0x2 6. "EP6RX,Interrupts Active For Which RX6 Endpoint" "0,1" newline bitfld.word 0x2 5. "EP5RX,Interrupts Active For Which RX5 Endpoint" "0,1" newline bitfld.word 0x2 4. "EP4RX,Interrupts Active For Which RX4 Endpoint" "0,1" newline bitfld.word 0x2 3. "EP3RX,Interrupts Active For Which RX3 Endpoint" "0,1" newline bitfld.word 0x2 2. "EP2RX,Interrupts Active For Which RX2 Endpoint" "0,1" newline bitfld.word 0x2 1. "EP1RX,Interrupts Active For Which RX1 Endpoint" "0,1" group.word 0x1006++0x3 line.word 0x0 "INTRTXE,Interrupt Enable Bits for INTRTX" bitfld.word 0x0 7. "EP7TXEN,Interrupt Enabled for TX EP7" "0,1" newline bitfld.word 0x0 6. "EP6TXEN,Interrupt Enabled for TX EP6" "0,1" newline bitfld.word 0x0 5. "EP5TXEN,Interrupt Enabled for TX EP5" "0,1" newline bitfld.word 0x0 4. "EP4TXEN,Interrupt Enabled for TX EP4" "0,1" newline bitfld.word 0x0 3. "EP3TXEN,Interrupt Enabled for TX EP3" "0,1" newline bitfld.word 0x0 2. "EP2TXEN,Interrupt Enabled for TX EP2" "0,1" newline bitfld.word 0x0 1. "EP1TXEN,Interrupt Enabled for TX EP1" "0,1" newline bitfld.word 0x0 0. "EP0TXEN,Interrupt Enabled for TX EP0" "0,1" line.word 0x2 "INTRRXE,Interrupt Enable Bits for INTRRX" bitfld.word 0x2 7. "EP7RXE,Interrupt Enabled for RX EP7" "0,1" newline bitfld.word 0x2 6. "EP6RXE,Interrupt Enabled for RX EP6" "0,1" newline bitfld.word 0x2 5. "EP5RXE,Interrupt Enabled for RX EP5" "0,1" newline bitfld.word 0x2 4. "EP4RXE,Interrupt Enabled for RX EP4" "0,1" newline bitfld.word 0x2 3. "EP3RXE,Interrupt Enabled for RX EP3" "0,1" newline bitfld.word 0x2 2. "EP2RXE,Interrupt Enabled for RX EP2" "0,1" newline bitfld.word 0x2 1. "EP1RXE,Interrupt Enabled for RX EP1" "0,1" rgroup.byte 0x100A++0x0 line.byte 0x0 "INTRUSB,Read Only Register Which Indicates Which USB Interrupts Are Currently Active." bitfld.byte 0x0 7. "VBUSERR,Set When VBus Drops Below The VBus Valid Threshold During A Session." "0,1" newline bitfld.byte 0x0 6. "SESSREQ,Set When Session Request Signaling Has Been Detected." "0,1" newline bitfld.byte 0x0 5. "DISCON,Set In Host Mode When A Device Disconnect Is Detected.Set In Peripheral Mode When A Session Ends" "0,1" newline bitfld.byte 0x0 4. "CONN,Set When A Device Connection Is Detected" "0,1" newline bitfld.byte 0x0 3. "SOF,Set When A New Frame Starts" "0,1" newline bitfld.byte 0x0 2. "RESET,Set In Peripheral Mode when Reset Is Detected On The Bus. In HostMode When Babble Is Detected" "0,1" newline bitfld.byte 0x0 1. "RESUME,Set When Resume Signal Is Detected On The Bus" "0,1" newline bitfld.byte 0x0 0. "SUSPEND,Set When Suspend Signal Is Detected On The Bus" "0,1" group.byte 0x100B++0x0 line.byte 0x0 "INTRUSBE,Interrupt Enable Bits for USB Interrupts" bitfld.byte 0x0 7. "VBUSERREN,VBus Error Interrupt Enable" "0,1" newline bitfld.byte 0x0 6. "SESSREQEN,SESSREQ Interrupt Enable" "0,1" newline bitfld.byte 0x0 5. "DISCONEN,DISCONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CONNEN,CONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "SOFEN,SOF Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RESETEN,RESET/BABBLE Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "RESUMEEN,RESUME Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "SUSPENDEN,SUSEPND Interrupt Enable" "0,1" rgroup.word 0x100C++0x1 line.word 0x0 "FRAME,Holds The Last Received Frame Number" hexmask.word 0x0 0.--10. 1. "FRMNUM,Frame Number" group.byte 0x100E++0x1 line.byte 0x0 "INDEX,Index Is A 4-Bit Register That Determines Which Endpoint Control/Status Registers Are Accessed" hexmask.byte 0x0 0.--3. 1. "SELEP,The Selected Endpoint" line.byte 0x1 "TESTMODE,Not Used In Normal Operation. Configuration To Put the USBCORE Into One Of The Four Test Modes For HighSpeed Operation" bitfld.byte 0x1 7. "FORCEHOST,The CPU Sets This Bit To Instruct The Core To Enter Host Mode When The Session Bit Is Set" "0,1" newline bitfld.byte 0x1 6. "FIFOACCESS,The CPU Sets This Bit To Transfer The Packet In The Endpoint 0 TX FIFO To The Endpoint 0 Rx FIFO. It Is Cleared Automatically." "0,1" newline bitfld.byte 0x1 5. "FORCEFS,Depending On Bit 7 Force Controller Into FS Speed Mode" "0,1" newline bitfld.byte 0x1 4. "FORCEHS,Depending On Bit 7 Force Controller Into High Speed Mode" "0,1" newline bitfld.byte 0x1 3. "TESTPACKET,Set To Enter The Test_Packet mode" "0,1" newline bitfld.byte 0x1 2. "TESTK,Set To Enter The Test_K mode" "0,1" newline bitfld.byte 0x1 1. "TESTJ,Set To Enter The Test_J mode" "0,1" newline bitfld.byte 0x1 0. "TESTSE0NAK,Set To Enter The Test_SE0_NAK mode" "0,1" group.word 0x1010++0x1 line.word 0x0 "TXMAXP,ENDPOINTX Maximum Amount Of Data That Can Be Transferred Through The Selected TX Endpoint In A Single Operation" hexmask.word.byte 0x0 11.--15. 1. "MULTIPLIER,Multiplier Value (m-1)" newline hexmask.word 0x0 0.--10. 1. "MAXPAYLOAD,Maximum Payload/Transactions" group.byte 0x1012++0x0 line.byte 0x0 "TXCSRL_HOST_EPX_MODE,ENDPOINTX Control And Status Bits for TX Endpoints 1-15" bitfld.byte 0x0 7. "NAKTIMEOUT,This Bit Will Be Set When Endpoint 0 Is Halted Following The Receipt Of NAK Responses For Longer Than The Time Set By The NAKLimit0 register." "0,1" newline bitfld.byte 0x0 6. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 5. "RXSTALL,This Bit Is Set When A Stall Handshake Is Received." "0,1" newline bitfld.byte 0x0 4. "SETUPPKT,The CPU Sets This Bit At The Same Time As The TxPktRdy Bit Is Set To Send A SETUP Token Instead Of An OUT Token For The Transaction" "0,1" newline bitfld.byte 0x0 3. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Latest Packet From The Endpoint TX FIFO" "0,1" newline bitfld.byte 0x0 2. "ERROR,This Bit Will Be Set When Three Attempts Have Been Made To Perform A Transaction With No Response From The Peripheral" "0,1" newline bitfld.byte 0x0 1. "FIFONOTEMPTY,The USB Sets This Bit When There Is At Least 1 Packet In The TX FIFO." "0,1" newline bitfld.byte 0x0 0. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" group.byte 0x1012++0x1 line.byte 0x0 "TXCSRL_PERIPHERAL_EPX_MODE,ENDPOINTX Control And Status Bits for TX Endpoints 1-15" bitfld.byte 0x0 7. "INCOMPTX,When The Endpoint Is Being Used For High-Bandwidth Isochronous This Bit Is Set To Indicate Where A Large Packet Has Been Split Into 2 Or 3 Packets For Transmission But Insufficient IN Tokens Have Been Received To Send All The Parts." "0,1" newline bitfld.byte 0x0 6. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 5. "SENTSTALL,This Bit Is Set When A Stall Handshake Is Transmitted." "0,1" newline bitfld.byte 0x0 4. "SENDSTALL,The CPU Writes A 1 To This Bit To Issue A Stall Handshake To An In Token" "0,1" newline bitfld.byte 0x0 3. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Latest Packet From The Endpoint TX FIFO" "0,1" newline bitfld.byte 0x0 2. "UNDERRUN,The USB Sets This Bit If An In Token Is Received When TxPktRdy Is Not Set." "0,1" newline bitfld.byte 0x0 1. "FIFONOTEMPTY,The USB Sets This Bit When There Is At Least 1 Packet In The TX FIFO." "0,1" newline bitfld.byte 0x0 0. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" line.byte 0x1 "TXCSRH_HOST_EPX_MODE,ENDPOINTX Additional Control And Status Bits For TX Endpoints 1-15" bitfld.byte 0x1 7. "AUTOSET,If The CPU Sets This Bit TxPktRdy Will Be Automatically Set When Data Of The Maximum P" "0,1" newline bitfld.byte 0x1 5. "MODE,The CPU Sets This Bit To Enable The Endpoint Direction As TX" "0,1" newline bitfld.byte 0x1 4. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The RX Endpoint" "0,1" newline bitfld.byte 0x1 3. "FRCDATATOG,The CPU Sets This Bit To Force The Endpoint Data Toggle To Switch And The Data Packe" "0,1" newline bitfld.byte 0x1 2. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode" "0,1" newline bitfld.byte 0x1 1. "DATATOGGLEWRENABLE,The CPU Writes A 1 To This Bit To Enable The Current State Of The Endpoint 0 Data Toggle To Be Written" "0,1" newline bitfld.byte 0x1 0. "DATATOGGLE,When Read This Bit Indicates The Current State Of The Endpoint" "0,1" group.byte 0x1013++0x0 line.byte 0x0 "TXCSRH_PERIPHERAL_EPX_MODE,ENDPOINTX Additional Control And Status Bits For TX Endpoints 1-15" bitfld.byte 0x0 7. "AUTOSET,If The CPU Sets This Bit TxPktRdy Will Be Automatically Set When Data Of The Maximum Packet Size Is Loaded Into The TX FIFO." "0,1" newline bitfld.byte 0x0 6. "ISO,The CPU Sets This Bit To Enable The TX Endpoint For Isochronous Transfers" "0,1" newline bitfld.byte 0x0 5. "MODE,The CPU Sets This Bit To Enable The Endpoint Direction As TX" "0,1" newline bitfld.byte 0x0 4. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The TX Endpoint" "0,1" newline bitfld.byte 0x0 3. "FRCDATATOG,The CPU Sets This Bit To Force The Endpoint Data Toggle To Switch And The Data Packet To Be Cleared From The FIFO." "0,1" newline bitfld.byte 0x0 2. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode 1 And Clears It To Select DMA Request Mode 0." "0,1" group.word 0x1014++0x1 line.word 0x0 "RXMAXP,ENDPOINTX Maximum Amount Of Data That Can Be Transferred Through The Selected RX Endpoint In A Single Operation" hexmask.word.byte 0x0 11.--15. 1. "MULTIPLIER,Multiplier Value (m-1)" newline hexmask.word 0x0 0.--10. 1. "MAXPAYLOAD,Maximum Payload/Transactions" group.byte 0x1016++0x0 line.byte 0x0 "RXCSRL_HOST_EPX_MODE,ENDPOINTX Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x0 7. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 6. "RXSTALL,When A STALL Handshake Is Received This Bit Is Set And An Interrupt Is Generated." "0,1" newline bitfld.byte 0x0 5. "REQPKT,The CPU Writes A 1 To This Bit To Request An IN Transaction." "0,1" newline bitfld.byte 0x0 4. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Next Packet To Be Read From The Endpoint Rx FIFO" "0,1" newline bitfld.byte 0x0 3. "NAKTIMEOUT,This Bit Is Set When RxPktRdy Is Set If The Data Packet Has A CRC Or Bit-stuff Error." "0,1" newline bitfld.byte 0x0 2. "ERROR,The USB Sets This Bit When 3 Attempts Have Been Made To Receive A Packet And No Data Packet Has Been Received." "0,1" newline bitfld.byte 0x0 1. "FIFOFULL,This Bit Is Set When No More Packets Can Be Loaded" "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received." "0,1" group.byte 0x1016++0x1 line.byte 0x0 "RXCSRL_PERIPHERAL_EPX_MODE,ENDPOINTX Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x0 7. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 6. "SENTSTALL,This Bit Is Set When A STALL Handshake Is Transmitted." "0,1" newline bitfld.byte 0x0 5. "SENDSTALL,The CPU Writes A 1 To This Bit To Issue A STALL Handshake." "0,1" newline bitfld.byte 0x0 4. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Next Packet To Be Read From The Endpoint Rx FIFO" "0,1" newline bitfld.byte 0x0 3. "DATAERROR,This Bit Is Set When RxPktRdy Is Set If The Data Packet Has A CRC Or Bit-stuff Error." "0,1" newline bitfld.byte 0x0 2. "OVERRUN,This Bit Is Set If An OUT Packet Cannot Be Loaded Into The Rx FIFO." "0,1" newline bitfld.byte 0x0 1. "FIFOFULL,This Bit Is Set When No More Packets Can Be Loaded Into The Rx FIFO." "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received." "0,1" line.byte 0x1 "RXCSRH_HOST_EPX_MODE,ENDPOINTX Additional Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x1 7. "AUTOCLEAR,If The CPU Sets This Bit TxPktRdy Will Be Automatically Cleared When A Packet Of RxMaxP Bytes Has Been Unloaded From The RX FIFO" "0,1" newline bitfld.byte 0x1 6. "AUTOREQ,If The CPU Sets This Bit The ReqPkt Bit Will Be Automatically Set When The RxPktRdy Bit Is Cleared." "0,1" newline bitfld.byte 0x1 5. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The RX Endpoint" "0,1" newline bitfld.byte 0x1 4. "PIDERROR,Indicates A PID Error In The Received Packet" "0,1" newline bitfld.byte 0x1 3. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode" "0,1" newline bitfld.byte 0x1 2. "DATATOGGLEWRTENABLE,The CPU Writes A 1 To This Bit To Enable The Current State Of The Endpoint 0 Data Toggle To Be Written" "0,1" newline bitfld.byte 0x1 1. "DATATOGGLE,When Read This Bit Indicates The Current State Of The Endpoint" "0,1" newline bitfld.byte 0x1 0. "INCOMPRX,This Bit Is Set In A High-Bandwidth Isochronous/Interrupt Transfer If The Packet In The Rx FIFO Is Incomplete" "0,1" group.byte 0x1017++0x0 line.byte 0x0 "RXCSRH_PERIPHERAL_EPX_MODE,ENDPOINTX Additional Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x0 7. "AUTOCLEAR,If The CPU Sets This Bit Then The RxPktRdy Bit Will Be Automatically Cleared Whean A Packet Of RxMaxP Bytes Has Benn Unloaded Froim The Rx FIFO" "0,1" newline bitfld.byte 0x0 6. "ISO,The CPU Sets This Bit To Enable the RX Endpoint For Isochronous Transfers" "0,1" newline bitfld.byte 0x0 5. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The RX Endpoint" "0,1" newline bitfld.byte 0x0 4. "DISNYET,The CPU Sets This Bit To Disable The Sending Of NYET Handshakes" "0,1" newline bitfld.byte 0x0 3. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode" "0,1" newline bitfld.byte 0x0 0. "INCOMPRX,This Bit Is Set In A High-Bandwidth Isochronous/Interrupt Transfer If The Packet In The Rx FIFO Is Incomplete Because Parts Of The Data Were Not Received." "0,1" rgroup.word 0x1018++0x1 line.word 0x0 "RXCOUNT,ENDPOINTX Number Of Data Bytes In The Packet Currently In Line To Be Read From The RX FIFO." hexmask.word 0x0 0.--13. 1. "ENDPOINTRXCOUNT,Number Of Data Bytes In The Packet Currently In Line To Be Read From The RX FIFO." group.byte 0x101A++0x3 line.byte 0x0 "TXTYPE,ENDPOINTX Host Mode Only: Should Be Written With The Endpoint Number To Be Targeted By The Endpoint" bitfld.byte 0x0 6.--7. "SPEED,operating speed of the target device when the core is configured with the multipoint option: 00: unused (note: if selected the target will be assumed to be using the same connection speed as the core.) 01: high 10: full 11: low" "0: unused,1: high,2: Device In Full Speed,3: Device In Low Speed" newline bitfld.byte 0x0 4.--5. "PROTOCOL,the cpu should set this to select the required protocol for the tx endpoint 00: control 01: isochronous 10: bulk 11: interrupt" "0: control,1: isochronous,?,?" newline hexmask.byte 0x0 0.--3. 1. "ENDPOINTNUMBER,the cpu should set this value to the endpoint number contained in the tx endpoint descriptor" line.byte 0x1 "TXINTERVAL,ENDPOINTX Host Mode Only: Defines The Polling Interval For The Currently Selected TX Endpoint." hexmask.byte 0x1 0.--7. 1. "TXPOLLINGINTERVAL,polling interval" line.byte 0x2 "RXTYPE,ENDPOINTX Host Mode Only: Should Be Written With The Endpoint Number To Be Targeted By The Endpoint" bitfld.byte 0x2 6.--7. "SPEED,operating speed of the target device when the core is configured with the multipoint option: 00: unused (note: if selected the target will be assumed to be using the same connection speed as the core.) 01: high 10: full 11: low" "0: unused,1: high,?,?" newline bitfld.byte 0x2 4.--5. "PROTOCOL,the cpu should set this to select the required protocol for the rx endpoint 00: control 01: isochronous 10: bulk 11: interrupt" "0: control,1: isochronous,?,?" newline hexmask.byte 0x2 0.--3. 1. "ENDPOINTNUMBER,the cpu should set this value to the endpoint number contained in the rx endpoint descriptor returned to the musbmhdrc during device enumeration." line.byte 0x3 "RXINTERVAL,ENDPOINTX Host Mode Only: Defines The Polling Interval For The Currently Selected RX Endpoint." hexmask.byte 0x3 0.--7. 1. "RXPOLLINGINTERVAL,polling interval" rgroup.byte 0x101F++0x0 line.byte 0x0 "FIFOSIZE,ENDPOINTX Read Only Register That Returns The Sizes Of The FIFO's Associated With The Selected Additional TX/RX Endpoints. INDEX Regsiter should be set 1-15" hexmask.byte 0x0 4.--7. 1. "RXFIFOSIZE,Rx FIFO Size" newline hexmask.byte 0x0 0.--3. 1. "TXFIFOSIZE,Tx FIFO Size" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1020)++0x3 line.long 0x0 "FIFOX[$1],Address Range Provides 16 Addresses For CPU Access To The FIFO's For Each Endpoint" hexmask.long 0x0 0.--31. 1. "FIFOADDR,Writing To These Addresses Loads Data Into The TXFIFO For The Corresponding Endpoint" repeat.end group.byte 0x1060++0x3 line.byte 0x0 "DEVCTL,Selects Whether The Core Is Operating In Peripheral Or Host Mode" bitfld.byte 0x0 7. "BDEVICE,indicates whether the core is operating as a 'A' device or 'B' device" "0,1" newline bitfld.byte 0x0 6. "FSDEV,host mode only: this bit is set when a full or high speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 5. "LSDEV,host mode only: this bit is set when a low speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 3.--4. "VBUS,encoded value for the VBus level" "0: Below SessionEnd,1: Above SessionEnd below AValid,2: Above AValid below VBus Valid,3: Above VBusValid" newline bitfld.byte 0x0 2. "HOSTMODE,this read-only bit is set when the USBCORE is acting as a host" "0,1" newline bitfld.byte 0x0 1. "HOSTREQ,when set the USBCORE will initiate the host negotiation when suspend mode is entered." "0,1" newline bitfld.byte 0x0 0. "SESSION,when operating as an 'A' device this bit is set or cleared by CPU to state or end a session. when operating as a 'B' device this bit is set/cleared by the USBCORE when a session starts/ends" "0,1" line.byte 0x1 "MISC,RX/TX Early DMA Enable Bits" bitfld.byte 0x1 1. "TXEDMA,DMA_REQ signal for all IN endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all in endpoints will be..,1: Dma_req signal for all in endpoints will be.." newline bitfld.byte 0x1 0. "RXEDMA,DMA_REQ signal for all OUT endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all out endpoints will be..,1: Dma_req signal for all out endpoints will be.." line.byte 0x2 "TXFIFOSZ,Controls The Size Of The Selected TX Endpoint FIFO" bitfld.byte 0x2 4. "DPB,double packet buffering supported or not" "0,1" newline hexmask.byte 0x2 0.--3. 1. "SZ,maximum packet size to be allowed" line.byte 0x3 "RXFIFOSZ,Controls The Size Of The Selected RX Endpoint FIFO" bitfld.byte 0x3 4. "DPB,double packet buffering enabled or not" "0,1" newline hexmask.byte 0x3 0.--3. 1. "SZ,maximum packet size to be allowed" group.word 0x1064++0x3 line.word 0x0 "TXFIFOADD,Controls The Start Address Of the Selected TX Endpoint FIFO" hexmask.word 0x0 0.--12. 1. "ADDR,start address of the endpoint FIFO" line.word 0x2 "RXFIFOADD,Controls The Start Address Of the Selected RX Endpoint FIFO" hexmask.word 0x2 0.--12. 1. "ADDR,start address of the endpoint FIFO" rgroup.byte 0x1078++0x1 line.byte 0x0 "EPINFO,Allows Read-Back Of The Number Of TX And RX Endpoints" hexmask.byte 0x0 4.--7. 1. "RXENDPOINTS,number of rx endpoints" newline hexmask.byte 0x0 0.--3. 1. "TXENDPOINTS,number of tx endpoints" line.byte 0x1 "RAMINFO,Details About Width Of RAM and DMA Channels" hexmask.byte 0x1 4.--7. 1. "DMACHANS,number of dma channels implemented in the design" newline hexmask.byte 0x1 0.--3. 1. "RAMBITS,width of the ram address bus" group.byte 0x107A++0x5 line.byte 0x0 "LINKINFO,Allows Some Delays To Be Specified" hexmask.byte 0x0 4.--7. 1. "WTCON,sets the wait to be applied to allow for the user's connect/disconnect filter in units of 533.3ns" newline hexmask.byte 0x0 0.--3. 1. "WTID,sets the delay to be applied from idpullup being asserted to iddig being considered valid in units of 4.369ms" line.byte 0x1 "VPLEN,Sets The Duration Of The VBus Pulsing Charge" hexmask.byte 0x1 0.--7. 1. "VPLEN,duration of VBus pulsing charge in units of 546.1us" line.byte 0x2 "HSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For HS Transactions" hexmask.byte 0x2 0.--7. 1. "HSEOF1,sets for high-speed transactions the time before eof to stop beginning new transactions in units of 133.3ns. (the default setting corresponds to 17.07us.)" line.byte 0x3 "FSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For FS Transactions" hexmask.byte 0x3 0.--7. 1. "FSEOF1,sets for full-speed transactions the time before eof to stop beginning new transactions in units of 533.3ns. (the default setting corresponds to 63.46us.)" line.byte 0x4 "LSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For LS Transactions" hexmask.byte 0x4 0.--7. 1. "LSEOF1,sets for low-speed transactions the time before eof to stop beginning new transactions in units of 1.067us. (the default setting corresponds to 121.6us.)" line.byte 0x5 "SOFTRST,Assert Low The Output Reset Signals NRSTO and NRSTXO" bitfld.byte 0x5 1. "NRSTX,when a 1 is written to this bit the output nrstxo will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrstxo will be asynchronously asserted and synchronously de-asserted with respect to xclk." "0,1" newline bitfld.byte 0x5 0. "NRST,when a 1 is written to this bit the output nrsto will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrsto will be asynchronously asserted and synchronously de-asserted with respect to clk." "0,1" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F011080 ad:0x4F011088 ad:0x4F011090 ad:0x4F011098 ad:0x4F0110A0 ad:0x4F0110A8 ad:0x4F0110B0 ad:0x4F0110B8) tree "TXFUNADDR[$1]" base $2 group.byte ($2)++0x0 line.byte 0x0 "TXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x0 0.--6. 1. "TXFUNCADDR,address of the target function" group.byte ($2+0x2)++0x2 line.byte 0x0 "TXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "TXHUBADDR,hub address" line.byte 0x1 "TXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" line.byte 0x2 "RXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x2 0.--6. 1. "RXFUNCADDR,address of the target function" group.byte ($2+0x6)++0x1 line.byte 0x0 "RXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "RXHUBADDR,hub address" line.byte 0x1 "RXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" tree.end repeat.end base ad:0x4F010000 group.long 0x1200++0x3 line.long 0x0 "DMAINTR,DMA Interrupt Status for Each Channel" hexmask.long.byte 0x0 0.--7. 1. "DMAINTR,DMA Interrupt for each channel" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F011204 ad:0x4F011214 ad:0x4F011224 ad:0x4F011234 ad:0x4F011244 ad:0x4F011254 ad:0x4F011264 ad:0x4F011274) tree "DMACNT[$1]" base $2 group.long ($2)++0xB line.long 0x0 "DMACNTL,DMA Transfer Control For Each Channel" bitfld.long 0x0 9.--10. "DMABRSTM,burst mode" "0: Burst Mode 0,1: Burst Mode 1,2: Burst Mode 2,3: Burst Mode 3" bitfld.long 0x0 8. "DMAERR,bus error bit" "0,1" hexmask.long.byte 0x0 4.--7. 1. "DMAEP,endpoint number this channel is assigned to" bitfld.long 0x0 3. "DMAIE,interrupt enable" "0,1" bitfld.long 0x0 2. "DMAMODE,transfer mode" "0: Mode 0 Transfer,1: Mode1 Transfer" bitfld.long 0x0 1. "DMADIR,transfer direction" "0: DMA Write (RX Endpoint),1: DMA Read (TX Endpoint)" bitfld.long 0x0 0. "DMAEN,dma transfer enable" "0,1" line.long 0x4 "DMAADDR,Memory Address Of The Corresponding DMA Channel" hexmask.long 0x4 2.--31. 1. "ADDR312,upper 30 bits of address" bitfld.long 0x4 0.--1. "ADDR10,Lower 2 bits of DMA memory address" "0,1,2,3" line.long 0x8 "DMACOUNT,Current DMA Count Of The Transfer" hexmask.long 0x8 0.--31. 1. "DMACOUNT,current dma count of the transfer" tree.end repeat.end base ad:0x4F010000 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1304)++0x3 line.long 0x0 "RQPKTCOUNT[$1],Host Mode Only: Used To Specify Number Of Packets That Are To Be Transaferred In A Block Transfer" hexmask.long.word 0x0 0.--15. 1. "RQPKTCOUNT,sets the number of packets of size maxp that are to be transferred in a block transfer. only used in host mode when autoreq is set. has no effect in peripheral mode or when autoreq is not set." repeat.end group.word 0x1340++0x9 line.word 0x0 "RXDPKTBUFDIS,Indicates Which Of The RX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x0 1.--15. 1. "EPxRXDIS,each bit indicates which of the Rx endpoint have disabled double buffer functionality" line.word 0x2 "TXDPKTBUFDIS,Indicates Which Of The TX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x2 1.--15. 1. "EPxTXDIS,each bit indicates which of the Tx endpoint have disabled double buffer functionality" line.word 0x4 "CTUCH,Chirp Timeout. Number Of XCLK Cycles Before The Timeout" hexmask.word 0x4 0.--15. 1. "CTUCH,this number when multiplied by 4 represents the number of xclk cycles before the timeout occurs" line.word 0x6 "CTHHSRTN,Sets The Delay From The End Of High-Speed Resume Signaling (Acting As A Host) To Enable The UTM Normal Operating Mode" hexmask.word 0x6 0.--15. 1. "CTHHSRTN,the delay from the end of high speed resume signaling to enabling utm normal operating mode." line.word 0x8 "CTHSBT,This Register Represents The Value To Be Added To The Minimum High Speed Timeout Period Of 736 Bit Times." hexmask.word.byte 0x8 0.--3. 1. "HSTMEOUTADD,this register represents the value to be added to the mimumum high speed timeout period of 736 bit times" group.word 0x1360++0x1 line.word 0x0 "LPMATTR,Defines The Attributes Of An LPM Transaction And Sleep Cycle." hexmask.word.byte 0x0 12.--15. 1. "ENDPOINT,this is the endpnt that in the token packet of the lpm transaction." newline bitfld.word 0x0 8. "RMTWAK,this bit is the remote wakeup enable bit." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "HIRD,this is the host initiated resume duration." newline hexmask.word.byte 0x0 0.--3. 1. "LINKSTATE,this value is provided by the host to the peripheral to indicate what state the peripheral must transition to after the receipt and acceptance of a lpm transaction." group.byte 0x1362++0x0 line.byte 0x0 "LPMCNTRL_HOST_MODE,LPM Control Register" bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate a resume from the l1 state" "0,1" newline bitfld.byte 0x0 0. "LPMXMT,software should set this bit to transmit an lpm transaction." "0,1" group.byte 0x1362++0x2 line.byte 0x0 "LPMCNTRL_PERIPHERAL_MODE,LPM Control Register" bitfld.byte 0x0 4. "LPMNAK,this bit is used to place all end points in a state such that the response to all transactions other then an lpm transaction will be a nak." "0,1" newline bitfld.byte 0x0 2.--3. "LPMEN,this register is used to enable lpm in the musbmhdrc." "0: Core supports LPM extended transactions,1: LPM is not supported but extended transactions..,2: LPM and extended transactions are not supported,3: LPM and extended transactions are not supported" newline bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate resume (remote wakeup)." "0,1" newline bitfld.byte 0x0 0. "LPMXMT,this bit is set by software to instruct the core to transition to the l1 state upon the receipt of the next lpm transaction." "0,1" line.byte 0x1 "LPMINTREN,LPM Interrupts Enable Register" bitfld.byte 0x1 5. "LPMERREN,LPMERR interrupt" "0,1" newline bitfld.byte 0x1 4. "LPMRESEN,LPMRES interrupt" "0,1" newline bitfld.byte 0x1 3. "LPMNCEN,LPMNC interrupt" "0,1" newline bitfld.byte 0x1 2. "LPMACKEN,LPMACK interrupt" "0,1" newline bitfld.byte 0x1 1. "LPMNYEN,LPMMNY interrupt" "0,1" newline bitfld.byte 0x1 0. "LPMSTEN,LPMMST interrupt" "0,1" line.byte 0x2 "LPMINTR_HOST_MODE,Status Of The LPM Power State" bitfld.byte 0x2 5. "LPMERR,this bit is set if a response to the lpm transaction is received with a bit stuff error or a pid error" "0,1" newline bitfld.byte 0x2 4. "LPMRES,this bit is set when the core has been resumed for any reason." "0,1" newline bitfld.byte 0x2 3. "LPMNC,this bit is set when an lpm transaction has been transmitted and has failed to complete." "0,1" newline bitfld.byte 0x2 2. "LPMACK,this bit is set when an lpm transaction is transmitted and the device responds with an ack." "0,1" newline bitfld.byte 0x2 1. "LPMNY,this bit is set when an lpm transaction is transmitted and the device responds with a nyet." "0,1" newline bitfld.byte 0x2 0. "LPMST,this bit is set when an lpm transaction is transmitted and the device responds with a stall." "0,1" group.byte 0x1364++0x1 line.byte 0x0 "LPMINTR_PERIPHERAL_MODE,Status Of The LPM Power State" bitfld.byte 0x0 5. "LPMERR,this bit is set if an lpm transaction is received that has a linkstate field that is not supported" "0,1" newline bitfld.byte 0x0 4. "LPMRES,this bit is set if the core has been resumed for any reason." "0,1" newline bitfld.byte 0x0 3. "LPMNC,this bit is set when an lpm transaction is received and the core responds with a nyet due to data pending in the rx fifos." "0,1" newline bitfld.byte 0x0 2. "LPMACK,this bit is set when an lpm transaction is received and the core responds with an ack." "0,1" newline bitfld.byte 0x0 1. "LPMNY,this bit is set when an lpm transaction is received and the core responds with a nyet" "0,1" newline bitfld.byte 0x0 0. "LPMST,this bit is set when an lpm transaction is received and the core responds with a stall." "0,1" line.byte 0x1 "LPMFADDR,Function Address In LPM Payload" hexmask.byte 0x1 0.--6. 1. "FUNCADDR,function address that will be placed in the LPM payload" group.long 0x1500++0x2B line.long 0x0 "PHY00,USBHPHY Control Register." bitfld.long 0x0 5.--7. "RXPHSSEL,RX clock phase select" "0: Earliest phase,?,?,?,?,?,?,7: Latest phase" newline bitfld.long 0x0 3.--4. "SLEWRATE,adjust FS/LS slew rate" "0: Highest slew rate,1: Middle slew rate,2: Middle slew rate,3: Smallest slew rate" newline bitfld.long 0x0 0.--2. "PREEMP,enables pre-emphasis" "0: Enable pre-emphasis during SOF and EOP,1: Enable pre-emphasis during chirp,2: Enable pre-emphasis in non-chirp state,3: Always enable pre-emphasis,?,?,?,?" line.long 0x4 "PHY04,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SQUELCH210,Lower 3 bits of RX squelch trigger point configuration" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 4. "HIZ,Set D+/D- to a high impedence state" "0,1" newline bitfld.long 0x4 3. "RSVD0," "0,1" newline bitfld.long 0x4 0.--2. "TXPHSSEL,set the Tx clock phase select" "0,1,2,3,4,5,6,7" line.long 0x8 "PHY08,USBHPHY Control Register." hexmask.long.byte 0x8 1.--7. 1. "RSVD0," newline bitfld.long 0x8 0. "SQUELCH3,MSB of Squelch configuration" "0,1" line.long 0xC "PHY0C,USBHPHY Control Register." bitfld.long 0xC 5.--7. "TUNE210,Lower 3 bits for HS amplitude tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0xC 0.--4. 1. "RSVD0," line.long 0x10 "PHY10,USBHPHY Control Register." bitfld.long 0x10 5.--7. "DRVTUNE210,Lower 3 bits for HS/FS/LS driver strength tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x10 0.--4. 1. "TUNE76543,Upper 5 bits for HS amplitude tuning" line.long 0x14 "PHY14,USBHPHY Control Register." bitfld.long 0x14 7. "ODT0,On die termination compensation voltage reference" "0,1" newline bitfld.long 0x14 4. "BYPSSSQUELCH,Bypass squelch trigger point configure in chirp mode" "0,1" newline bitfld.long 0x14 2.--3. "COMPBYPSS,Auto compensation bypass" "0,1,2,3" newline bitfld.long 0x14 0.--1. "DRVTUNE43,Upper 2 bits for HS/FS/LS driver strength tuning" "0,1,2,3" line.long 0x18 "PHY18,USBHPHY Control Register." hexmask.long.byte 0x18 2.--5. 1. "RSVD0," newline bitfld.long 0x18 0.--1. "ODT21,Upper 3 bits for on die termination compensation voltage reference" "0,1,2,3" line.long 0x1C "PHY1C,USBHPHY Control Register." bitfld.long 0x1C 7. "FSLSDIFF,Turn off FS/LS differential receiver in suspend mode" "0,1" newline hexmask.long.byte 0x1C 2.--6. 1. "RSVD1," newline bitfld.long 0x1C 1. "ODTBYPASS,ODT auto-refresh bypass" "0,1" newline bitfld.long 0x1C 0. "RSVD0," "0,1" line.long 0x20 "PHY20,USBHPHY Control Register." bitfld.long 0x20 6.--7. "HSSLEW10,Lower 2 bits for HS slew adjust rate" "0,1,2,3" newline hexmask.long.byte 0x20 0.--5. 1. "RSVD0," line.long 0x24 "PHY24,USBHPHY Control Register." bitfld.long 0x24 6.--7. "HSDRIVST10,HS transmit drive strength" "0,1,2,3" newline bitfld.long 0x24 3.--5. "HSPREEMPST,HS transmit pre emphasis strength" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 2. "RSVD0," "0,1" newline bitfld.long 0x24 0. "HSSLEW2,MSB of HS slew rate adjust" "0,1" line.long 0x28 "PHY28,USBHPHY Control Register." bitfld.long 0x28 5.--7. "HSDRVCOMP,HS drive current compensation voltage reference" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x28 1.--4. 1. "DISCONDET,HOST disconnects detection trigger point" newline bitfld.long 0x28 0. "HSDRIVST2,MSB of HS transmit driver strength" "0,1" group.long 0x1544++0xF line.long 0x0 "PHY44,USBHPHY Control Register." bitfld.long 0x0 7. "FRCSESSEND,force session end" "0,1" newline bitfld.long 0x0 4.--6. "RSVD1," "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3. "FRCVBUSVAL,Force output vbus_valid" "0,1" newline bitfld.long 0x0 2. "DIGDBG,Digital debug interface" "0,1" newline bitfld.long 0x0 1. "PLLDAMP,PLL damping factor" "0,1" newline bitfld.long 0x0 0. "RSVD0," "0,1" line.long 0x4 "PHY48,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SESSENDTUNE,Session end reference tuning" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 3.--4. "RSVD0," "0,1,2,3" newline bitfld.long 0x4 2. "VBUSCHRGE,VBus charging/discharging bypass" "0,1" newline bitfld.long 0x4 1. "FRCBSESSVAL,force B_sessionvalid" "0,1" newline bitfld.long 0x4 0. "FRCASESSVAL,force A_sessionvalid" "0,1" line.long 0x8 "PHY4C,USBHPHY Control Register." bitfld.long 0x8 6.--7. "BSESSVALIDTUNE10,Lower 2 B_sessionvalid reference tune" "0,1,2,3" newline bitfld.long 0x8 3.--5. "RSVD0," "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "VBUSVALTUNE,VBus_valid reference tuning" "0,1,2,3,4,5,6,7" line.long 0xC "PHY50,USBHPHY Control Register." bitfld.long 0xC 5.--7. "COMPCURREF,Compensation current tuning reference" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 4. "RSVD0," "0,1" newline bitfld.long 0xC 1.--3. "ASESSVALIDTUNE,A_sessionvalid reference tune" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 0. "BSESSVALIDTUNE2,MSB of B_sessionvalid reference tune" "0,1" tree.end tree.end tree "USBHS1" base ad:0x4F012000 tree "ENDPOINT0" group.long 0x0++0x17 line.long 0x0 "CTRLA,USBHS Control Register A. (All bits except ENABLE and SWRST are Enable protected)" bitfld.long 0x0 10. "REFCLKSEL,Select USB PLL Reference Clock Speed" "0,1" newline bitfld.long 0x0 9. "IDOVEN,ID Source Select" "0,1" newline bitfld.long 0x0 8. "IDVAL,Override Valud of ID" "0,1" newline bitfld.long 0x0 1. "ENABLE,USBHS Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,USBHS Software Reset" "0,1" line.long 0x4 "CTRLB,USBHS Control Register B" hexmask.long.tbyte 0x4 0.--19. 1. "BLANK,Blank the wakeup monitoring for a specific real time" line.long 0x8 "CTRLC,USBHS Control Register C" bitfld.long 0x8 4. "T1MSEN,REFCLK and SUSPENDM override" "0,1" line.long 0xC "INTENCLR,USBHS Interrupt Enable Clear Register" bitfld.long 0xC 5. "PHYRDY,Clear PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0xC 4. "T1MS,Clear T1MS Interrupt Enable" "0,1" newline bitfld.long 0xC 3. "DMA,Clear DMA Interrupt Enable" "0,1" newline bitfld.long 0xC 2. "USB,Clear USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0xC 1. "RESUME,Clear Resume Interrupt Enable" "0,1" newline bitfld.long 0xC 0. "WAKEUP,Clear USCORE Detaction Interrupt Enable" "0,1" line.long 0x10 "INTENSET,USBHS Interrupt Enable Clear Register" bitfld.long 0x10 5. "PHYRDY,PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0x10 4. "T1MS,T1MS Interrupt Enable" "0,1" newline bitfld.long 0x10 3. "DMA,DMA Interrupt Enable" "0,1" newline bitfld.long 0x10 2. "USB,USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0x10 1. "RESUME,Resume Interrupt Enable" "0,1" newline bitfld.long 0x10 0. "WAKEUP,USCORE Detaction Interrupt Enable" "0,1" line.long 0x14 "INTFLAG,USBHS Interrupt Flag Register" bitfld.long 0x14 5. "PHYRDY,PHY Ready Interrupt" "0,1" newline bitfld.long 0x14 4. "T1MS,Timer 1ms Tick Interrupt" "0,1" newline bitfld.long 0x14 3. "DMA,DMA Interrupt" "0,1" newline bitfld.long 0x14 2. "USB,USBCORE General Interrupt" "0,1" newline bitfld.long 0x14 1. "RESUME,Resume Interrupt" "0,1" newline bitfld.long 0x14 0. "WAKEUP,USB Activity Detection Interrupt" "0,1" rgroup.long 0x18++0x7 line.long 0x0 "STATUS,USBHS Status Register" bitfld.long 0x0 2. "VREGRDY,USB Voltage Regulator Status" "0,1" newline bitfld.long 0x0 1. "PHYON,Power On of PHY Complete" "0,1" newline bitfld.long 0x0 0. "PHYRDY,PHY Is Ready for USBCORE Activity" "0,1" line.long 0x4 "SYNCBUSY,USBHS Syncbusy Register" bitfld.long 0x4 2. "T1MSEN,T1MS enable busy bit" "0,1" newline bitfld.long 0x4 1. "ENABLE,Enable busy bit" "0,1" newline bitfld.long 0x4 0. "SWRST,Software reset busy bit" "0,1" group.byte 0x1000++0x1 line.byte 0x0 "FADDR,Function Address Register" hexmask.byte 0x0 0.--6. 1. "FUNCADDR,Function address" line.byte 0x1 "POWER,Used For Controlling Suspend And Resume Signaling And Some Basic Operation Of USBCORE" bitfld.byte 0x1 7. "ISOUPDATE,when set by cpu the usbcore will wait for an sof token" "0,1" newline bitfld.byte 0x1 6. "SOFTCONN,if enabled the D+ D- lines are enabled when this bit is set by the cpu" "0,1" newline bitfld.byte 0x1 5. "HSENABLE,when set by cpu the usbcore will negotiate the high speed mode" "0,1" newline bitfld.byte 0x1 4. "HSMODE,when set this read only bit indicates high speed mode successfully negotiated during usb reset" "0,1" newline bitfld.byte 0x1 3. "RESET,this bit is set when reset signaling is present on the bus" "0,1" newline bitfld.byte 0x1 2. "RESUME,set by cpu to generate resume signaling when te device is in suspend" "0,1" newline bitfld.byte 0x1 1. "SUSPENDMODE,set by cpu to enter suspend mode" "0,1" newline bitfld.byte 0x1 0. "ENABLESUSPENDM,set by the cpu to enable suspendm output" "0,1" rgroup.word 0x1002++0x3 line.word 0x0 "INTRTX,Read Only Register Which Indicates Which Interrupts Are Currently Active For EP0 And TX EP1-15" bitfld.word 0x0 7. "EP7TX,Interrupts Active For TX7 Endpoint" "0,1" newline bitfld.word 0x0 6. "EP6TX,Interrupts Active For TX6 Endpoint" "0,1" newline bitfld.word 0x0 5. "EP5TX,Interrupts Active For TX5 Endpoint" "0,1" newline bitfld.word 0x0 4. "EP4TX,Interrupts Active For TX4 Endpoint" "0,1" newline bitfld.word 0x0 3. "EP3TX,Interrupts Active For TX3 Endpoint" "0,1" newline bitfld.word 0x0 2. "EP2TX,Interrupts Active For TX2 Endpoint" "0,1" newline bitfld.word 0x0 1. "EP1TX,Interrupts Active For TX1 Endpoint" "0,1" newline bitfld.word 0x0 0. "EP0TX,Interrupts Active For TX0 Endpoint" "0,1" line.word 0x2 "INTRRX,Read Only Register Which Indicates Which Interrupts Are Currently Active For RX EP1-15" bitfld.word 0x2 7. "EP7RX,Interrupts Active For Which RX7 Endpoint" "0,1" newline bitfld.word 0x2 6. "EP6RX,Interrupts Active For Which RX6 Endpoint" "0,1" newline bitfld.word 0x2 5. "EP5RX,Interrupts Active For Which RX5 Endpoint" "0,1" newline bitfld.word 0x2 4. "EP4RX,Interrupts Active For Which RX4 Endpoint" "0,1" newline bitfld.word 0x2 3. "EP3RX,Interrupts Active For Which RX3 Endpoint" "0,1" newline bitfld.word 0x2 2. "EP2RX,Interrupts Active For Which RX2 Endpoint" "0,1" newline bitfld.word 0x2 1. "EP1RX,Interrupts Active For Which RX1 Endpoint" "0,1" group.word 0x1006++0x3 line.word 0x0 "INTRTXE,Interrupt Enable Bits for INTRTX" bitfld.word 0x0 7. "EP7TXEN,Interrupt Enabled for TX EP7" "0,1" newline bitfld.word 0x0 6. "EP6TXEN,Interrupt Enabled for TX EP6" "0,1" newline bitfld.word 0x0 5. "EP5TXEN,Interrupt Enabled for TX EP5" "0,1" newline bitfld.word 0x0 4. "EP4TXEN,Interrupt Enabled for TX EP4" "0,1" newline bitfld.word 0x0 3. "EP3TXEN,Interrupt Enabled for TX EP3" "0,1" newline bitfld.word 0x0 2. "EP2TXEN,Interrupt Enabled for TX EP2" "0,1" newline bitfld.word 0x0 1. "EP1TXEN,Interrupt Enabled for TX EP1" "0,1" newline bitfld.word 0x0 0. "EP0TXEN,Interrupt Enabled for TX EP0" "0,1" line.word 0x2 "INTRRXE,Interrupt Enable Bits for INTRRX" bitfld.word 0x2 7. "EP7RXE,Interrupt Enabled for RX EP7" "0,1" newline bitfld.word 0x2 6. "EP6RXE,Interrupt Enabled for RX EP6" "0,1" newline bitfld.word 0x2 5. "EP5RXE,Interrupt Enabled for RX EP5" "0,1" newline bitfld.word 0x2 4. "EP4RXE,Interrupt Enabled for RX EP4" "0,1" newline bitfld.word 0x2 3. "EP3RXE,Interrupt Enabled for RX EP3" "0,1" newline bitfld.word 0x2 2. "EP2RXE,Interrupt Enabled for RX EP2" "0,1" newline bitfld.word 0x2 1. "EP1RXE,Interrupt Enabled for RX EP1" "0,1" rgroup.byte 0x100A++0x0 line.byte 0x0 "INTRUSB,Read Only Register Which Indicates Which USB Interrupts Are Currently Active." bitfld.byte 0x0 7. "VBUSERR,Set When VBus Drops Below The VBus Valid Threshold During A Session." "0,1" newline bitfld.byte 0x0 6. "SESSREQ,Set When Session Request Signaling Has Been Detected." "0,1" newline bitfld.byte 0x0 5. "DISCON,Set In Host Mode When A Device Disconnect Is Detected.Set In Peripheral Mode When A Session Ends" "0,1" newline bitfld.byte 0x0 4. "CONN,Set When A Device Connection Is Detected" "0,1" newline bitfld.byte 0x0 3. "SOF,Set When A New Frame Starts" "0,1" newline bitfld.byte 0x0 2. "RESET,Set In Peripheral Mode when Reset Is Detected On The Bus. In HostMode When Babble Is Detected" "0,1" newline bitfld.byte 0x0 1. "RESUME,Set When Resume Signal Is Detected On The Bus" "0,1" newline bitfld.byte 0x0 0. "SUSPEND,Set When Suspend Signal Is Detected On The Bus" "0,1" group.byte 0x100B++0x0 line.byte 0x0 "INTRUSBE,Interrupt Enable Bits for USB Interrupts" bitfld.byte 0x0 7. "VBUSERREN,VBus Error Interrupt Enable" "0,1" newline bitfld.byte 0x0 6. "SESSREQEN,SESSREQ Interrupt Enable" "0,1" newline bitfld.byte 0x0 5. "DISCONEN,DISCONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CONNEN,CONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "SOFEN,SOF Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RESETEN,RESET/BABBLE Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "RESUMEEN,RESUME Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "SUSPENDEN,SUSEPND Interrupt Enable" "0,1" rgroup.word 0x100C++0x1 line.word 0x0 "FRAME,Holds The Last Received Frame Number" hexmask.word 0x0 0.--10. 1. "FRMNUM,Frame Number" group.byte 0x100E++0x1 line.byte 0x0 "INDEX,Index Is A 4-Bit Register That Determines Which Endpoint Control/Status Registers Are Accessed" hexmask.byte 0x0 0.--3. 1. "SELEP,The Selected Endpoint" line.byte 0x1 "TESTMODE,Not Used In Normal Operation. Configuration To Put the USBCORE Into One Of The Four Test Modes For HighSpeed Operation" bitfld.byte 0x1 7. "FORCEHOST,The CPU Sets This Bit To Instruct The Core To Enter Host Mode When The Session Bit Is Set" "0,1" newline bitfld.byte 0x1 6. "FIFOACCESS,The CPU Sets This Bit To Transfer The Packet In The Endpoint 0 TX FIFO To The Endpoint 0 Rx FIFO. It Is Cleared Automatically." "0,1" newline bitfld.byte 0x1 5. "FORCEFS,Depending On Bit 7 Force Controller Into FS Speed Mode" "0,1" newline bitfld.byte 0x1 4. "FORCEHS,Depending On Bit 7 Force Controller Into High Speed Mode" "0,1" newline bitfld.byte 0x1 3. "TESTPACKET,Set To Enter The Test_Packet mode" "0,1" newline bitfld.byte 0x1 2. "TESTK,Set To Enter The Test_K mode" "0,1" newline bitfld.byte 0x1 1. "TESTJ,Set To Enter The Test_J mode" "0,1" newline bitfld.byte 0x1 0. "TESTSE0NAK,Set To Enter The Test_SE0_NAK mode" "0,1" group.byte 0x1012++0x0 line.byte 0x0 "CSR0L_HOST_EP0_MODE,ENDPOINT0 Control And Status Bits for TX Endpoint 0" bitfld.byte 0x0 7. "NAKTIMEOUT,This Bit Will Be Set When Endpoint 0 Is Halted Following The Receipt Of NAK Responses For Longer Than The Time Set By The NAKLimit0 register." "0,1" newline bitfld.byte 0x0 6. "STATUSPKT,The CPU Sets This Bit At The Same Time As The TxPktRdy Or ReqPkt Bit Is Set To Perform A Status Stage Transaction" "0,1" newline bitfld.byte 0x0 5. "REQPKT,The CPU Sets This Bit To Request An IN Transaction" "0,1" newline bitfld.byte 0x0 4. "ERROR,This Bit Will Be Set When Three Attempts Have Been Made To Perform A Transaction With No Response From The Peripheral" "0,1" newline bitfld.byte 0x0 3. "SETUPPKT,The CPU Sets This Bit At The Same Time As The TxPktRdy Bit Is Set To Send A SETUP Token Instead Of An OUT Token For The Transaction" "0,1" newline bitfld.byte 0x0 2. "RXSTALL,This Bit Is Set When A Stall Handshake Is Received." "0,1" newline bitfld.byte 0x0 1. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received" "0,1" group.byte 0x1012++0x1 line.byte 0x0 "CSR0L_PERIPHERAL_EP0_MODE,ENDPOINT0 Control And Status Bits for TX Endpoint 0" bitfld.byte 0x0 7. "SERVICEDSETUPEND,The CPU Writes A 1 To This Bit To Clear The SetupEnd Bit. It Is Cleared Automatically." "0,1" newline bitfld.byte 0x0 6. "SERVICEDRXPKTRDY,The CPU Writes A 1 To This Bit To Clear The RxPktRdy Bit. It Is Cleared Automatically" "0,1" newline bitfld.byte 0x0 5. "SENDSTALL,The CPU Writes A 1 To This Bit To Terminate The Current Transaction" "0,1" newline bitfld.byte 0x0 4. "SETUPEND,This Bit Will Be Set When A Control Transaction Ends Before The DataEnd Bit Has Been Set" "0,1" newline bitfld.byte 0x0 3. "DATAEND,The CPU Sets This Bit 1. When Setting TxPktRdy For The Last Data Packet 2. When Clearing RxPktRdy After Unloading The Last Data Packet.3. When Setting TxPktRdy For A Zero Length Data Packet." "0,1" newline bitfld.byte 0x0 2. "SENTSTALL,This Bit Is Set When A Stall Handshake Is Transmitted." "0,1" newline bitfld.byte 0x0 1. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received" "0,1" line.byte 0x1 "CSR0H_HOST_EP0_MODE,ENDPOINT0 Additional Control And Status Bits For TX Endpoint 0" bitfld.byte 0x1 3. "DISPING,The CPU Writes A 1 To This Bit To Instruct The Core Not To Issue PING Tokens In Data And Status Phases Of A High-Speed Control Transfer" "0,1" newline bitfld.byte 0x1 2. "DATATOGGLEWRTENABLE,The CPU Writes A 1 To This Bit To Enable The Current State Of The Endpoint 0 Data Toggle To Be Written" "0,1" newline bitfld.byte 0x1 1. "DATATOGGLE,When Read This Bit Indicates The Current State Of The Endpoint 0 Data Toggle" "0,1" newline bitfld.byte 0x1 0. "FLUSHFIFO,Flush The Next Packet To Be Transmitted/Read" "0,1" group.byte 0x1013++0x0 line.byte 0x0 "CSR0H_PERIPHERAL_EP0_MODE,ENDPOINT0 Additional Control And Status Bits For TX Endpoint 0" bitfld.byte 0x0 0. "FLUSHFIFO,Flush The Next Packet To Be Transmitted/Read" "0,1" rgroup.byte 0x1018++0x0 line.byte 0x0 "COUNT0,ENDPOINT0 Number Of Received Bytes In Endpoint 0 FIFO" hexmask.byte 0x0 0.--6. 1. "EP0RXCOUNT,Number Of Received Data Bytes In Endpoint 0 FIFO" group.byte 0x101A++0x1 line.byte 0x0 "TYPE0,ENDPOINT0 Host Mode Only: Operating Speed Of The Targeted Device" bitfld.byte 0x0 6.--7. "SPEED,Operating Speed Of The Target Device" "?,1: Device In High Speed,2: Device In Full Speed,3: Device In Low Speed" line.byte 0x1 "NAKLIMIT0,ENDPOINT0 Host Mode Only: Sets The NAK Response Timeout On Endpoint 0." hexmask.byte 0x1 0.--4. 1. "EP0NAKLIMIT,Number Of Frames/Microframes After Which Endpoint 0 Should Timeout" rgroup.byte 0x101F++0x0 line.byte 0x0 "CONFIGDATA,ENDPOINT0 Returns Information About The Selected Core Configuration. Only Applicable when INDEX Regsiter Is 0. That Is Endpoint0 Is Selected." bitfld.byte 0x0 7. "MPRXE,Automatic Splitting Of Bulk Amalgamation Is Selected" "0,1" newline bitfld.byte 0x0 6. "MPTXE,Automatic Splitting Of Bulk Packets Is Selected" "0,1" newline bitfld.byte 0x0 5. "BIGENDIAN,Indicates Little Endian Ordering" "0,1" newline bitfld.byte 0x0 4. "HBRXE,Indicates High Bandwidth RX ISO Endpoint Support Selected" "0,1" newline bitfld.byte 0x0 3. "HBTXE,Indicates High Bandwidth TX ISO Endpoint Support Selected" "0,1" newline bitfld.byte 0x0 2. "DYNFIFOSIZING,Dynamic FIFO Sizing Is Selected Or Not" "0,1" newline bitfld.byte 0x0 1. "SOFTCONE,Indicates Soft Connect Or Disconnect" "0,1" newline bitfld.byte 0x0 0. "UTMIDATAWIDTH,Indicates Selected UTMI+ DataWidth. Always 0 Indicates 8 Bits" "0,1" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1020)++0x3 line.long 0x0 "FIFOX[$1],Address Range Provides 16 Addresses For CPU Access To The FIFO's For Each Endpoint" hexmask.long 0x0 0.--31. 1. "FIFOADDR,Writing To These Addresses Loads Data Into The TXFIFO For The Corresponding Endpoint" repeat.end group.byte 0x1060++0x3 line.byte 0x0 "DEVCTL,Selects Whether The Core Is Operating In Peripheral Or Host Mode" bitfld.byte 0x0 7. "BDEVICE,indicates whether the core is operating as a 'A' device or 'B' device" "0,1" newline bitfld.byte 0x0 6. "FSDEV,host mode only: this bit is set when a full or high speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 5. "LSDEV,host mode only: this bit is set when a low speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 3.--4. "VBUS,encoded value for the VBus level" "0: Below SessionEnd,1: Above SessionEnd below AValid,2: Above AValid below VBus Valid,3: Above VBusValid" newline bitfld.byte 0x0 2. "HOSTMODE,this read-only bit is set when the USBCORE is acting as a host" "0,1" newline bitfld.byte 0x0 1. "HOSTREQ,when set the USBCORE will initiate the host negotiation when suspend mode is entered." "0,1" newline bitfld.byte 0x0 0. "SESSION,when operating as an 'A' device this bit is set or cleared by CPU to state or end a session. when operating as a 'B' device this bit is set/cleared by the USBCORE when a session starts/ends" "0,1" line.byte 0x1 "MISC,RX/TX Early DMA Enable Bits" bitfld.byte 0x1 1. "TXEDMA,DMA_REQ signal for all IN endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all in endpoints will be..,1: Dma_req signal for all in endpoints will be.." newline bitfld.byte 0x1 0. "RXEDMA,DMA_REQ signal for all OUT endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all out endpoints will be..,1: Dma_req signal for all out endpoints will be.." line.byte 0x2 "TXFIFOSZ,Controls The Size Of The Selected TX Endpoint FIFO" bitfld.byte 0x2 4. "DPB,double packet buffering supported or not" "0,1" newline hexmask.byte 0x2 0.--3. 1. "SZ,maximum packet size to be allowed" line.byte 0x3 "RXFIFOSZ,Controls The Size Of The Selected RX Endpoint FIFO" bitfld.byte 0x3 4. "DPB,double packet buffering enabled or not" "0,1" newline hexmask.byte 0x3 0.--3. 1. "SZ,maximum packet size to be allowed" group.word 0x1064++0x3 line.word 0x0 "TXFIFOADD,Controls The Start Address Of the Selected TX Endpoint FIFO" hexmask.word 0x0 0.--12. 1. "ADDR,start address of the endpoint FIFO" line.word 0x2 "RXFIFOADD,Controls The Start Address Of the Selected RX Endpoint FIFO" hexmask.word 0x2 0.--12. 1. "ADDR,start address of the endpoint FIFO" rgroup.byte 0x1078++0x1 line.byte 0x0 "EPINFO,Allows Read-Back Of The Number Of TX And RX Endpoints" hexmask.byte 0x0 4.--7. 1. "RXENDPOINTS,number of rx endpoints" newline hexmask.byte 0x0 0.--3. 1. "TXENDPOINTS,number of tx endpoints" line.byte 0x1 "RAMINFO,Details About Width Of RAM and DMA Channels" hexmask.byte 0x1 4.--7. 1. "DMACHANS,number of dma channels implemented in the design" newline hexmask.byte 0x1 0.--3. 1. "RAMBITS,width of the ram address bus" group.byte 0x107A++0x5 line.byte 0x0 "LINKINFO,Allows Some Delays To Be Specified" hexmask.byte 0x0 4.--7. 1. "WTCON,sets the wait to be applied to allow for the user's connect/disconnect filter in units of 533.3ns" newline hexmask.byte 0x0 0.--3. 1. "WTID,sets the delay to be applied from idpullup being asserted to iddig being considered valid in units of 4.369ms" line.byte 0x1 "VPLEN,Sets The Duration Of The VBus Pulsing Charge" hexmask.byte 0x1 0.--7. 1. "VPLEN,duration of VBus pulsing charge in units of 546.1us" line.byte 0x2 "HSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For HS Transactions" hexmask.byte 0x2 0.--7. 1. "HSEOF1,sets for high-speed transactions the time before eof to stop beginning new transactions in units of 133.3ns. (the default setting corresponds to 17.07us.)" line.byte 0x3 "FSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For FS Transactions" hexmask.byte 0x3 0.--7. 1. "FSEOF1,sets for full-speed transactions the time before eof to stop beginning new transactions in units of 533.3ns. (the default setting corresponds to 63.46us.)" line.byte 0x4 "LSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For LS Transactions" hexmask.byte 0x4 0.--7. 1. "LSEOF1,sets for low-speed transactions the time before eof to stop beginning new transactions in units of 1.067us. (the default setting corresponds to 121.6us.)" line.byte 0x5 "SOFTRST,Assert Low The Output Reset Signals NRSTO and NRSTXO" bitfld.byte 0x5 1. "NRSTX,when a 1 is written to this bit the output nrstxo will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrstxo will be asynchronously asserted and synchronously de-asserted with respect to xclk." "0,1" newline bitfld.byte 0x5 0. "NRST,when a 1 is written to this bit the output nrsto will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrsto will be asynchronously asserted and synchronously de-asserted with respect to clk." "0,1" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F013080 ad:0x4F013088 ad:0x4F013090 ad:0x4F013098 ad:0x4F0130A0 ad:0x4F0130A8 ad:0x4F0130B0 ad:0x4F0130B8) tree "TXFUNADDR[$1]" base $2 group.byte ($2)++0x0 line.byte 0x0 "TXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x0 0.--6. 1. "TXFUNCADDR,address of the target function" group.byte ($2+0x2)++0x2 line.byte 0x0 "TXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "TXHUBADDR,hub address" line.byte 0x1 "TXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" line.byte 0x2 "RXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x2 0.--6. 1. "RXFUNCADDR,address of the target function" group.byte ($2+0x6)++0x1 line.byte 0x0 "RXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "RXHUBADDR,hub address" line.byte 0x1 "RXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" tree.end repeat.end base ad:0x4F012000 group.long 0x1200++0x3 line.long 0x0 "DMAINTR,DMA Interrupt Status for Each Channel" hexmask.long.byte 0x0 0.--7. 1. "DMAINTR,DMA Interrupt for each channel" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F013204 ad:0x4F013214 ad:0x4F013224 ad:0x4F013234 ad:0x4F013244 ad:0x4F013254 ad:0x4F013264 ad:0x4F013274) tree "DMACNT[$1]" base $2 group.long ($2)++0xB line.long 0x0 "DMACNTL,DMA Transfer Control For Each Channel" bitfld.long 0x0 9.--10. "DMABRSTM,burst mode" "0: Burst Mode 0,1: Burst Mode 1,2: Burst Mode 2,3: Burst Mode 3" bitfld.long 0x0 8. "DMAERR,bus error bit" "0,1" hexmask.long.byte 0x0 4.--7. 1. "DMAEP,endpoint number this channel is assigned to" bitfld.long 0x0 3. "DMAIE,interrupt enable" "0,1" bitfld.long 0x0 2. "DMAMODE,transfer mode" "0: Mode 0 Transfer,1: Mode1 Transfer" bitfld.long 0x0 1. "DMADIR,transfer direction" "0: DMA Write (RX Endpoint),1: DMA Read (TX Endpoint)" bitfld.long 0x0 0. "DMAEN,dma transfer enable" "0,1" line.long 0x4 "DMAADDR,Memory Address Of The Corresponding DMA Channel" hexmask.long 0x4 2.--31. 1. "ADDR312,upper 30 bits of address" bitfld.long 0x4 0.--1. "ADDR10,Lower 2 bits of DMA memory address" "0,1,2,3" line.long 0x8 "DMACOUNT,Current DMA Count Of The Transfer" hexmask.long 0x8 0.--31. 1. "DMACOUNT,current dma count of the transfer" tree.end repeat.end base ad:0x4F012000 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1304)++0x3 line.long 0x0 "RQPKTCOUNT[$1],Host Mode Only: Used To Specify Number Of Packets That Are To Be Transaferred In A Block Transfer" hexmask.long.word 0x0 0.--15. 1. "RQPKTCOUNT,sets the number of packets of size maxp that are to be transferred in a block transfer. only used in host mode when autoreq is set. has no effect in peripheral mode or when autoreq is not set." repeat.end group.word 0x1340++0x9 line.word 0x0 "RXDPKTBUFDIS,Indicates Which Of The RX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x0 1.--15. 1. "EPxRXDIS,each bit indicates which of the Rx endpoint have disabled double buffer functionality" line.word 0x2 "TXDPKTBUFDIS,Indicates Which Of The TX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x2 1.--15. 1. "EPxTXDIS,each bit indicates which of the Tx endpoint have disabled double buffer functionality" line.word 0x4 "CTUCH,Chirp Timeout. Number Of XCLK Cycles Before The Timeout" hexmask.word 0x4 0.--15. 1. "CTUCH,this number when multiplied by 4 represents the number of xclk cycles before the timeout occurs" line.word 0x6 "CTHHSRTN,Sets The Delay From The End Of High-Speed Resume Signaling (Acting As A Host) To Enable The UTM Normal Operating Mode" hexmask.word 0x6 0.--15. 1. "CTHHSRTN,the delay from the end of high speed resume signaling to enabling utm normal operating mode." line.word 0x8 "CTHSBT,This Register Represents The Value To Be Added To The Minimum High Speed Timeout Period Of 736 Bit Times." hexmask.word.byte 0x8 0.--3. 1. "HSTMEOUTADD,this register represents the value to be added to the mimumum high speed timeout period of 736 bit times" group.word 0x1360++0x1 line.word 0x0 "LPMATTR,Defines The Attributes Of An LPM Transaction And Sleep Cycle." hexmask.word.byte 0x0 12.--15. 1. "ENDPOINT,this is the endpnt that in the token packet of the lpm transaction." newline bitfld.word 0x0 8. "RMTWAK,this bit is the remote wakeup enable bit." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "HIRD,this is the host initiated resume duration." newline hexmask.word.byte 0x0 0.--3. 1. "LINKSTATE,this value is provided by the host to the peripheral to indicate what state the peripheral must transition to after the receipt and acceptance of a lpm transaction." group.byte 0x1362++0x0 line.byte 0x0 "LPMCNTRL_HOST_MODE,LPM Control Register" bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate a resume from the l1 state" "0,1" newline bitfld.byte 0x0 0. "LPMXMT,software should set this bit to transmit an lpm transaction." "0,1" group.byte 0x1362++0x2 line.byte 0x0 "LPMCNTRL_PERIPHERAL_MODE,LPM Control Register" bitfld.byte 0x0 4. "LPMNAK,this bit is used to place all end points in a state such that the response to all transactions other then an lpm transaction will be a nak." "0,1" newline bitfld.byte 0x0 2.--3. "LPMEN,this register is used to enable lpm in the musbmhdrc." "0: Core supports LPM extended transactions,1: LPM is not supported but extended transactions..,2: LPM and extended transactions are not supported,3: LPM and extended transactions are not supported" newline bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate resume (remote wakeup)." "0,1" newline bitfld.byte 0x0 0. "LPMXMT,this bit is set by software to instruct the core to transition to the l1 state upon the receipt of the next lpm transaction." "0,1" line.byte 0x1 "LPMINTREN,LPM Interrupts Enable Register" bitfld.byte 0x1 5. "LPMERREN,LPMERR interrupt" "0,1" newline bitfld.byte 0x1 4. "LPMRESEN,LPMRES interrupt" "0,1" newline bitfld.byte 0x1 3. "LPMNCEN,LPMNC interrupt" "0,1" newline bitfld.byte 0x1 2. "LPMACKEN,LPMACK interrupt" "0,1" newline bitfld.byte 0x1 1. "LPMNYEN,LPMMNY interrupt" "0,1" newline bitfld.byte 0x1 0. "LPMSTEN,LPMMST interrupt" "0,1" line.byte 0x2 "LPMINTR_HOST_MODE,Status Of The LPM Power State" bitfld.byte 0x2 5. "LPMERR,this bit is set if a response to the lpm transaction is received with a bit stuff error or a pid error" "0,1" newline bitfld.byte 0x2 4. "LPMRES,this bit is set when the core has been resumed for any reason." "0,1" newline bitfld.byte 0x2 3. "LPMNC,this bit is set when an lpm transaction has been transmitted and has failed to complete." "0,1" newline bitfld.byte 0x2 2. "LPMACK,this bit is set when an lpm transaction is transmitted and the device responds with an ack." "0,1" newline bitfld.byte 0x2 1. "LPMNY,this bit is set when an lpm transaction is transmitted and the device responds with a nyet." "0,1" newline bitfld.byte 0x2 0. "LPMST,this bit is set when an lpm transaction is transmitted and the device responds with a stall." "0,1" group.byte 0x1364++0x1 line.byte 0x0 "LPMINTR_PERIPHERAL_MODE,Status Of The LPM Power State" bitfld.byte 0x0 5. "LPMERR,this bit is set if an lpm transaction is received that has a linkstate field that is not supported" "0,1" newline bitfld.byte 0x0 4. "LPMRES,this bit is set if the core has been resumed for any reason." "0,1" newline bitfld.byte 0x0 3. "LPMNC,this bit is set when an lpm transaction is received and the core responds with a nyet due to data pending in the rx fifos." "0,1" newline bitfld.byte 0x0 2. "LPMACK,this bit is set when an lpm transaction is received and the core responds with an ack." "0,1" newline bitfld.byte 0x0 1. "LPMNY,this bit is set when an lpm transaction is received and the core responds with a nyet" "0,1" newline bitfld.byte 0x0 0. "LPMST,this bit is set when an lpm transaction is received and the core responds with a stall." "0,1" line.byte 0x1 "LPMFADDR,Function Address In LPM Payload" hexmask.byte 0x1 0.--6. 1. "FUNCADDR,function address that will be placed in the LPM payload" group.long 0x1500++0x2B line.long 0x0 "PHY00,USBHPHY Control Register." bitfld.long 0x0 5.--7. "RXPHSSEL,RX clock phase select" "0: Earliest phase,?,?,?,?,?,?,7: Latest phase" newline bitfld.long 0x0 3.--4. "SLEWRATE,adjust FS/LS slew rate" "0: Highest slew rate,1: Middle slew rate,2: Middle slew rate,3: Smallest slew rate" newline bitfld.long 0x0 0.--2. "PREEMP,enables pre-emphasis" "0: Enable pre-emphasis during SOF and EOP,1: Enable pre-emphasis during chirp,2: Enable pre-emphasis in non-chirp state,3: Always enable pre-emphasis,?,?,?,?" line.long 0x4 "PHY04,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SQUELCH210,Lower 3 bits of RX squelch trigger point configuration" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 4. "HIZ,Set D+/D- to a high impedence state" "0,1" newline bitfld.long 0x4 3. "RSVD0," "0,1" newline bitfld.long 0x4 0.--2. "TXPHSSEL,set the Tx clock phase select" "0,1,2,3,4,5,6,7" line.long 0x8 "PHY08,USBHPHY Control Register." hexmask.long.byte 0x8 1.--7. 1. "RSVD0," newline bitfld.long 0x8 0. "SQUELCH3,MSB of Squelch configuration" "0,1" line.long 0xC "PHY0C,USBHPHY Control Register." bitfld.long 0xC 5.--7. "TUNE210,Lower 3 bits for HS amplitude tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0xC 0.--4. 1. "RSVD0," line.long 0x10 "PHY10,USBHPHY Control Register." bitfld.long 0x10 5.--7. "DRVTUNE210,Lower 3 bits for HS/FS/LS driver strength tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x10 0.--4. 1. "TUNE76543,Upper 5 bits for HS amplitude tuning" line.long 0x14 "PHY14,USBHPHY Control Register." bitfld.long 0x14 7. "ODT0,On die termination compensation voltage reference" "0,1" newline bitfld.long 0x14 4. "BYPSSSQUELCH,Bypass squelch trigger point configure in chirp mode" "0,1" newline bitfld.long 0x14 2.--3. "COMPBYPSS,Auto compensation bypass" "0,1,2,3" newline bitfld.long 0x14 0.--1. "DRVTUNE43,Upper 2 bits for HS/FS/LS driver strength tuning" "0,1,2,3" line.long 0x18 "PHY18,USBHPHY Control Register." hexmask.long.byte 0x18 2.--5. 1. "RSVD0," newline bitfld.long 0x18 0.--1. "ODT21,Upper 3 bits for on die termination compensation voltage reference" "0,1,2,3" line.long 0x1C "PHY1C,USBHPHY Control Register." bitfld.long 0x1C 7. "FSLSDIFF,Turn off FS/LS differential receiver in suspend mode" "0,1" newline hexmask.long.byte 0x1C 2.--6. 1. "RSVD1," newline bitfld.long 0x1C 1. "ODTBYPASS,ODT auto-refresh bypass" "0,1" newline bitfld.long 0x1C 0. "RSVD0," "0,1" line.long 0x20 "PHY20,USBHPHY Control Register." bitfld.long 0x20 6.--7. "HSSLEW10,Lower 2 bits for HS slew adjust rate" "0,1,2,3" newline hexmask.long.byte 0x20 0.--5. 1. "RSVD0," line.long 0x24 "PHY24,USBHPHY Control Register." bitfld.long 0x24 6.--7. "HSDRIVST10,HS transmit drive strength" "0,1,2,3" newline bitfld.long 0x24 3.--5. "HSPREEMPST,HS transmit pre emphasis strength" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 2. "RSVD0," "0,1" newline bitfld.long 0x24 0. "HSSLEW2,MSB of HS slew rate adjust" "0,1" line.long 0x28 "PHY28,USBHPHY Control Register." bitfld.long 0x28 5.--7. "HSDRVCOMP,HS drive current compensation voltage reference" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x28 1.--4. 1. "DISCONDET,HOST disconnects detection trigger point" newline bitfld.long 0x28 0. "HSDRIVST2,MSB of HS transmit driver strength" "0,1" group.long 0x1544++0xF line.long 0x0 "PHY44,USBHPHY Control Register." bitfld.long 0x0 7. "FRCSESSEND,force session end" "0,1" newline bitfld.long 0x0 4.--6. "RSVD1," "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3. "FRCVBUSVAL,Force output vbus_valid" "0,1" newline bitfld.long 0x0 2. "DIGDBG,Digital debug interface" "0,1" newline bitfld.long 0x0 1. "PLLDAMP,PLL damping factor" "0,1" newline bitfld.long 0x0 0. "RSVD0," "0,1" line.long 0x4 "PHY48,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SESSENDTUNE,Session end reference tuning" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 3.--4. "RSVD0," "0,1,2,3" newline bitfld.long 0x4 2. "VBUSCHRGE,VBus charging/discharging bypass" "0,1" newline bitfld.long 0x4 1. "FRCBSESSVAL,force B_sessionvalid" "0,1" newline bitfld.long 0x4 0. "FRCASESSVAL,force A_sessionvalid" "0,1" line.long 0x8 "PHY4C,USBHPHY Control Register." bitfld.long 0x8 6.--7. "BSESSVALIDTUNE10,Lower 2 B_sessionvalid reference tune" "0,1,2,3" newline bitfld.long 0x8 3.--5. "RSVD0," "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "VBUSVALTUNE,VBus_valid reference tuning" "0,1,2,3,4,5,6,7" line.long 0xC "PHY50,USBHPHY Control Register." bitfld.long 0xC 5.--7. "COMPCURREF,Compensation current tuning reference" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 4. "RSVD0," "0,1" newline bitfld.long 0xC 1.--3. "ASESSVALIDTUNE,A_sessionvalid reference tune" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 0. "BSESSVALIDTUNE2,MSB of B_sessionvalid reference tune" "0,1" tree.end tree "ENDPOINTX" group.long 0x0++0x17 line.long 0x0 "CTRLA,USBHS Control Register A. (All bits except ENABLE and SWRST are Enable protected)" bitfld.long 0x0 10. "REFCLKSEL,Select USB PLL Reference Clock Speed" "0,1" newline bitfld.long 0x0 9. "IDOVEN,ID Source Select" "0,1" newline bitfld.long 0x0 8. "IDVAL,Override Valud of ID" "0,1" newline bitfld.long 0x0 1. "ENABLE,USBHS Enable" "0,1" newline bitfld.long 0x0 0. "SWRST,USBHS Software Reset" "0,1" line.long 0x4 "CTRLB,USBHS Control Register B" hexmask.long.tbyte 0x4 0.--19. 1. "BLANK,Blank the wakeup monitoring for a specific real time" line.long 0x8 "CTRLC,USBHS Control Register C" bitfld.long 0x8 4. "T1MSEN,REFCLK and SUSPENDM override" "0,1" line.long 0xC "INTENCLR,USBHS Interrupt Enable Clear Register" bitfld.long 0xC 5. "PHYRDY,Clear PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0xC 4. "T1MS,Clear T1MS Interrupt Enable" "0,1" newline bitfld.long 0xC 3. "DMA,Clear DMA Interrupt Enable" "0,1" newline bitfld.long 0xC 2. "USB,Clear USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0xC 1. "RESUME,Clear Resume Interrupt Enable" "0,1" newline bitfld.long 0xC 0. "WAKEUP,Clear USCORE Detaction Interrupt Enable" "0,1" line.long 0x10 "INTENSET,USBHS Interrupt Enable Clear Register" bitfld.long 0x10 5. "PHYRDY,PHYRDY Interrupt Enable" "0,1" newline bitfld.long 0x10 4. "T1MS,T1MS Interrupt Enable" "0,1" newline bitfld.long 0x10 3. "DMA,DMA Interrupt Enable" "0,1" newline bitfld.long 0x10 2. "USB,USBCORE General Interrupt Enable" "0,1" newline bitfld.long 0x10 1. "RESUME,Resume Interrupt Enable" "0,1" newline bitfld.long 0x10 0. "WAKEUP,USCORE Detaction Interrupt Enable" "0,1" line.long 0x14 "INTFLAG,USBHS Interrupt Flag Register" bitfld.long 0x14 5. "PHYRDY,PHY Ready Interrupt" "0,1" newline bitfld.long 0x14 4. "T1MS,Timer 1ms Tick Interrupt" "0,1" newline bitfld.long 0x14 3. "DMA,DMA Interrupt" "0,1" newline bitfld.long 0x14 2. "USB,USBCORE General Interrupt" "0,1" newline bitfld.long 0x14 1. "RESUME,Resume Interrupt" "0,1" newline bitfld.long 0x14 0. "WAKEUP,USB Activity Detection Interrupt" "0,1" rgroup.long 0x18++0x7 line.long 0x0 "STATUS,USBHS Status Register" bitfld.long 0x0 2. "VREGRDY,USB Voltage Regulator Status" "0,1" newline bitfld.long 0x0 1. "PHYON,Power On of PHY Complete" "0,1" newline bitfld.long 0x0 0. "PHYRDY,PHY Is Ready for USBCORE Activity" "0,1" line.long 0x4 "SYNCBUSY,USBHS Syncbusy Register" bitfld.long 0x4 2. "T1MSEN,T1MS enable busy bit" "0,1" newline bitfld.long 0x4 1. "ENABLE,Enable busy bit" "0,1" newline bitfld.long 0x4 0. "SWRST,Software reset busy bit" "0,1" group.byte 0x1000++0x1 line.byte 0x0 "FADDR,Function Address Register" hexmask.byte 0x0 0.--6. 1. "FUNCADDR,Function address" line.byte 0x1 "POWER,Used For Controlling Suspend And Resume Signaling And Some Basic Operation Of USBCORE" bitfld.byte 0x1 7. "ISOUPDATE,when set by cpu the usbcore will wait for an sof token" "0,1" newline bitfld.byte 0x1 6. "SOFTCONN,if enabled the D+ D- lines are enabled when this bit is set by the cpu" "0,1" newline bitfld.byte 0x1 5. "HSENABLE,when set by cpu the usbcore will negotiate the high speed mode" "0,1" newline bitfld.byte 0x1 4. "HSMODE,when set this read only bit indicates high speed mode successfully negotiated during usb reset" "0,1" newline bitfld.byte 0x1 3. "RESET,this bit is set when reset signaling is present on the bus" "0,1" newline bitfld.byte 0x1 2. "RESUME,set by cpu to generate resume signaling when te device is in suspend" "0,1" newline bitfld.byte 0x1 1. "SUSPENDMODE,set by cpu to enter suspend mode" "0,1" newline bitfld.byte 0x1 0. "ENABLESUSPENDM,set by the cpu to enable suspendm output" "0,1" rgroup.word 0x1002++0x3 line.word 0x0 "INTRTX,Read Only Register Which Indicates Which Interrupts Are Currently Active For EP0 And TX EP1-15" bitfld.word 0x0 7. "EP7TX,Interrupts Active For TX7 Endpoint" "0,1" newline bitfld.word 0x0 6. "EP6TX,Interrupts Active For TX6 Endpoint" "0,1" newline bitfld.word 0x0 5. "EP5TX,Interrupts Active For TX5 Endpoint" "0,1" newline bitfld.word 0x0 4. "EP4TX,Interrupts Active For TX4 Endpoint" "0,1" newline bitfld.word 0x0 3. "EP3TX,Interrupts Active For TX3 Endpoint" "0,1" newline bitfld.word 0x0 2. "EP2TX,Interrupts Active For TX2 Endpoint" "0,1" newline bitfld.word 0x0 1. "EP1TX,Interrupts Active For TX1 Endpoint" "0,1" newline bitfld.word 0x0 0. "EP0TX,Interrupts Active For TX0 Endpoint" "0,1" line.word 0x2 "INTRRX,Read Only Register Which Indicates Which Interrupts Are Currently Active For RX EP1-15" bitfld.word 0x2 7. "EP7RX,Interrupts Active For Which RX7 Endpoint" "0,1" newline bitfld.word 0x2 6. "EP6RX,Interrupts Active For Which RX6 Endpoint" "0,1" newline bitfld.word 0x2 5. "EP5RX,Interrupts Active For Which RX5 Endpoint" "0,1" newline bitfld.word 0x2 4. "EP4RX,Interrupts Active For Which RX4 Endpoint" "0,1" newline bitfld.word 0x2 3. "EP3RX,Interrupts Active For Which RX3 Endpoint" "0,1" newline bitfld.word 0x2 2. "EP2RX,Interrupts Active For Which RX2 Endpoint" "0,1" newline bitfld.word 0x2 1. "EP1RX,Interrupts Active For Which RX1 Endpoint" "0,1" group.word 0x1006++0x3 line.word 0x0 "INTRTXE,Interrupt Enable Bits for INTRTX" bitfld.word 0x0 7. "EP7TXEN,Interrupt Enabled for TX EP7" "0,1" newline bitfld.word 0x0 6. "EP6TXEN,Interrupt Enabled for TX EP6" "0,1" newline bitfld.word 0x0 5. "EP5TXEN,Interrupt Enabled for TX EP5" "0,1" newline bitfld.word 0x0 4. "EP4TXEN,Interrupt Enabled for TX EP4" "0,1" newline bitfld.word 0x0 3. "EP3TXEN,Interrupt Enabled for TX EP3" "0,1" newline bitfld.word 0x0 2. "EP2TXEN,Interrupt Enabled for TX EP2" "0,1" newline bitfld.word 0x0 1. "EP1TXEN,Interrupt Enabled for TX EP1" "0,1" newline bitfld.word 0x0 0. "EP0TXEN,Interrupt Enabled for TX EP0" "0,1" line.word 0x2 "INTRRXE,Interrupt Enable Bits for INTRRX" bitfld.word 0x2 7. "EP7RXE,Interrupt Enabled for RX EP7" "0,1" newline bitfld.word 0x2 6. "EP6RXE,Interrupt Enabled for RX EP6" "0,1" newline bitfld.word 0x2 5. "EP5RXE,Interrupt Enabled for RX EP5" "0,1" newline bitfld.word 0x2 4. "EP4RXE,Interrupt Enabled for RX EP4" "0,1" newline bitfld.word 0x2 3. "EP3RXE,Interrupt Enabled for RX EP3" "0,1" newline bitfld.word 0x2 2. "EP2RXE,Interrupt Enabled for RX EP2" "0,1" newline bitfld.word 0x2 1. "EP1RXE,Interrupt Enabled for RX EP1" "0,1" rgroup.byte 0x100A++0x0 line.byte 0x0 "INTRUSB,Read Only Register Which Indicates Which USB Interrupts Are Currently Active." bitfld.byte 0x0 7. "VBUSERR,Set When VBus Drops Below The VBus Valid Threshold During A Session." "0,1" newline bitfld.byte 0x0 6. "SESSREQ,Set When Session Request Signaling Has Been Detected." "0,1" newline bitfld.byte 0x0 5. "DISCON,Set In Host Mode When A Device Disconnect Is Detected.Set In Peripheral Mode When A Session Ends" "0,1" newline bitfld.byte 0x0 4. "CONN,Set When A Device Connection Is Detected" "0,1" newline bitfld.byte 0x0 3. "SOF,Set When A New Frame Starts" "0,1" newline bitfld.byte 0x0 2. "RESET,Set In Peripheral Mode when Reset Is Detected On The Bus. In HostMode When Babble Is Detected" "0,1" newline bitfld.byte 0x0 1. "RESUME,Set When Resume Signal Is Detected On The Bus" "0,1" newline bitfld.byte 0x0 0. "SUSPEND,Set When Suspend Signal Is Detected On The Bus" "0,1" group.byte 0x100B++0x0 line.byte 0x0 "INTRUSBE,Interrupt Enable Bits for USB Interrupts" bitfld.byte 0x0 7. "VBUSERREN,VBus Error Interrupt Enable" "0,1" newline bitfld.byte 0x0 6. "SESSREQEN,SESSREQ Interrupt Enable" "0,1" newline bitfld.byte 0x0 5. "DISCONEN,DISCONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 4. "CONNEN,CONN Interrupt Enable" "0,1" newline bitfld.byte 0x0 3. "SOFEN,SOF Interrupt Enable" "0,1" newline bitfld.byte 0x0 2. "RESETEN,RESET/BABBLE Interrupt Enable" "0,1" newline bitfld.byte 0x0 1. "RESUMEEN,RESUME Interrupt Enable" "0,1" newline bitfld.byte 0x0 0. "SUSPENDEN,SUSEPND Interrupt Enable" "0,1" rgroup.word 0x100C++0x1 line.word 0x0 "FRAME,Holds The Last Received Frame Number" hexmask.word 0x0 0.--10. 1. "FRMNUM,Frame Number" group.byte 0x100E++0x1 line.byte 0x0 "INDEX,Index Is A 4-Bit Register That Determines Which Endpoint Control/Status Registers Are Accessed" hexmask.byte 0x0 0.--3. 1. "SELEP,The Selected Endpoint" line.byte 0x1 "TESTMODE,Not Used In Normal Operation. Configuration To Put the USBCORE Into One Of The Four Test Modes For HighSpeed Operation" bitfld.byte 0x1 7. "FORCEHOST,The CPU Sets This Bit To Instruct The Core To Enter Host Mode When The Session Bit Is Set" "0,1" newline bitfld.byte 0x1 6. "FIFOACCESS,The CPU Sets This Bit To Transfer The Packet In The Endpoint 0 TX FIFO To The Endpoint 0 Rx FIFO. It Is Cleared Automatically." "0,1" newline bitfld.byte 0x1 5. "FORCEFS,Depending On Bit 7 Force Controller Into FS Speed Mode" "0,1" newline bitfld.byte 0x1 4. "FORCEHS,Depending On Bit 7 Force Controller Into High Speed Mode" "0,1" newline bitfld.byte 0x1 3. "TESTPACKET,Set To Enter The Test_Packet mode" "0,1" newline bitfld.byte 0x1 2. "TESTK,Set To Enter The Test_K mode" "0,1" newline bitfld.byte 0x1 1. "TESTJ,Set To Enter The Test_J mode" "0,1" newline bitfld.byte 0x1 0. "TESTSE0NAK,Set To Enter The Test_SE0_NAK mode" "0,1" group.word 0x1010++0x1 line.word 0x0 "TXMAXP,ENDPOINTX Maximum Amount Of Data That Can Be Transferred Through The Selected TX Endpoint In A Single Operation" hexmask.word.byte 0x0 11.--15. 1. "MULTIPLIER,Multiplier Value (m-1)" newline hexmask.word 0x0 0.--10. 1. "MAXPAYLOAD,Maximum Payload/Transactions" group.byte 0x1012++0x0 line.byte 0x0 "TXCSRL_HOST_EPX_MODE,ENDPOINTX Control And Status Bits for TX Endpoints 1-15" bitfld.byte 0x0 7. "NAKTIMEOUT,This Bit Will Be Set When Endpoint 0 Is Halted Following The Receipt Of NAK Responses For Longer Than The Time Set By The NAKLimit0 register." "0,1" newline bitfld.byte 0x0 6. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 5. "RXSTALL,This Bit Is Set When A Stall Handshake Is Received." "0,1" newline bitfld.byte 0x0 4. "SETUPPKT,The CPU Sets This Bit At The Same Time As The TxPktRdy Bit Is Set To Send A SETUP Token Instead Of An OUT Token For The Transaction" "0,1" newline bitfld.byte 0x0 3. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Latest Packet From The Endpoint TX FIFO" "0,1" newline bitfld.byte 0x0 2. "ERROR,This Bit Will Be Set When Three Attempts Have Been Made To Perform A Transaction With No Response From The Peripheral" "0,1" newline bitfld.byte 0x0 1. "FIFONOTEMPTY,The USB Sets This Bit When There Is At Least 1 Packet In The TX FIFO." "0,1" newline bitfld.byte 0x0 0. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" group.byte 0x1012++0x1 line.byte 0x0 "TXCSRL_PERIPHERAL_EPX_MODE,ENDPOINTX Control And Status Bits for TX Endpoints 1-15" bitfld.byte 0x0 7. "INCOMPTX,When The Endpoint Is Being Used For High-Bandwidth Isochronous This Bit Is Set To Indicate Where A Large Packet Has Been Split Into 2 Or 3 Packets For Transmission But Insufficient IN Tokens Have Been Received To Send All The Parts." "0,1" newline bitfld.byte 0x0 6. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 5. "SENTSTALL,This Bit Is Set When A Stall Handshake Is Transmitted." "0,1" newline bitfld.byte 0x0 4. "SENDSTALL,The CPU Writes A 1 To This Bit To Issue A Stall Handshake To An In Token" "0,1" newline bitfld.byte 0x0 3. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Latest Packet From The Endpoint TX FIFO" "0,1" newline bitfld.byte 0x0 2. "UNDERRUN,The USB Sets This Bit If An In Token Is Received When TxPktRdy Is Not Set." "0,1" newline bitfld.byte 0x0 1. "FIFONOTEMPTY,The USB Sets This Bit When There Is At Least 1 Packet In The TX FIFO." "0,1" newline bitfld.byte 0x0 0. "TXPKTRDY,The CPU Sets This Bit After Loading A Data Packet Into The FIFO." "0,1" line.byte 0x1 "TXCSRH_HOST_EPX_MODE,ENDPOINTX Additional Control And Status Bits For TX Endpoints 1-15" bitfld.byte 0x1 7. "AUTOSET,If The CPU Sets This Bit TxPktRdy Will Be Automatically Set When Data Of The Maximum P" "0,1" newline bitfld.byte 0x1 5. "MODE,The CPU Sets This Bit To Enable The Endpoint Direction As TX" "0,1" newline bitfld.byte 0x1 4. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The RX Endpoint" "0,1" newline bitfld.byte 0x1 3. "FRCDATATOG,The CPU Sets This Bit To Force The Endpoint Data Toggle To Switch And The Data Packe" "0,1" newline bitfld.byte 0x1 2. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode" "0,1" newline bitfld.byte 0x1 1. "DATATOGGLEWRENABLE,The CPU Writes A 1 To This Bit To Enable The Current State Of The Endpoint 0 Data Toggle To Be Written" "0,1" newline bitfld.byte 0x1 0. "DATATOGGLE,When Read This Bit Indicates The Current State Of The Endpoint" "0,1" group.byte 0x1013++0x0 line.byte 0x0 "TXCSRH_PERIPHERAL_EPX_MODE,ENDPOINTX Additional Control And Status Bits For TX Endpoints 1-15" bitfld.byte 0x0 7. "AUTOSET,If The CPU Sets This Bit TxPktRdy Will Be Automatically Set When Data Of The Maximum Packet Size Is Loaded Into The TX FIFO." "0,1" newline bitfld.byte 0x0 6. "ISO,The CPU Sets This Bit To Enable The TX Endpoint For Isochronous Transfers" "0,1" newline bitfld.byte 0x0 5. "MODE,The CPU Sets This Bit To Enable The Endpoint Direction As TX" "0,1" newline bitfld.byte 0x0 4. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The TX Endpoint" "0,1" newline bitfld.byte 0x0 3. "FRCDATATOG,The CPU Sets This Bit To Force The Endpoint Data Toggle To Switch And The Data Packet To Be Cleared From The FIFO." "0,1" newline bitfld.byte 0x0 2. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode 1 And Clears It To Select DMA Request Mode 0." "0,1" group.word 0x1014++0x1 line.word 0x0 "RXMAXP,ENDPOINTX Maximum Amount Of Data That Can Be Transferred Through The Selected RX Endpoint In A Single Operation" hexmask.word.byte 0x0 11.--15. 1. "MULTIPLIER,Multiplier Value (m-1)" newline hexmask.word 0x0 0.--10. 1. "MAXPAYLOAD,Maximum Payload/Transactions" group.byte 0x1016++0x0 line.byte 0x0 "RXCSRL_HOST_EPX_MODE,ENDPOINTX Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x0 7. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 6. "RXSTALL,When A STALL Handshake Is Received This Bit Is Set And An Interrupt Is Generated." "0,1" newline bitfld.byte 0x0 5. "REQPKT,The CPU Writes A 1 To This Bit To Request An IN Transaction." "0,1" newline bitfld.byte 0x0 4. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Next Packet To Be Read From The Endpoint Rx FIFO" "0,1" newline bitfld.byte 0x0 3. "NAKTIMEOUT,This Bit Is Set When RxPktRdy Is Set If The Data Packet Has A CRC Or Bit-stuff Error." "0,1" newline bitfld.byte 0x0 2. "ERROR,The USB Sets This Bit When 3 Attempts Have Been Made To Receive A Packet And No Data Packet Has Been Received." "0,1" newline bitfld.byte 0x0 1. "FIFOFULL,This Bit Is Set When No More Packets Can Be Loaded" "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received." "0,1" group.byte 0x1016++0x1 line.byte 0x0 "RXCSRL_PERIPHERAL_EPX_MODE,ENDPOINTX Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x0 7. "CLRDATATOG,The CPU Writes A 1 To This Bit To Reset The Endpoint Data Toggle To 0." "0,1" newline bitfld.byte 0x0 6. "SENTSTALL,This Bit Is Set When A STALL Handshake Is Transmitted." "0,1" newline bitfld.byte 0x0 5. "SENDSTALL,The CPU Writes A 1 To This Bit To Issue A STALL Handshake." "0,1" newline bitfld.byte 0x0 4. "FLUSHFIFO,The CPU Writes A 1 To This Bit To Flush The Next Packet To Be Read From The Endpoint Rx FIFO" "0,1" newline bitfld.byte 0x0 3. "DATAERROR,This Bit Is Set When RxPktRdy Is Set If The Data Packet Has A CRC Or Bit-stuff Error." "0,1" newline bitfld.byte 0x0 2. "OVERRUN,This Bit Is Set If An OUT Packet Cannot Be Loaded Into The Rx FIFO." "0,1" newline bitfld.byte 0x0 1. "FIFOFULL,This Bit Is Set When No More Packets Can Be Loaded Into The Rx FIFO." "0,1" newline bitfld.byte 0x0 0. "RXPKTRDY,This Bit Is Set When A Data Packet Has Been Received." "0,1" line.byte 0x1 "RXCSRH_HOST_EPX_MODE,ENDPOINTX Additional Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x1 7. "AUTOCLEAR,If The CPU Sets This Bit TxPktRdy Will Be Automatically Cleared When A Packet Of RxMaxP Bytes Has Been Unloaded From The RX FIFO" "0,1" newline bitfld.byte 0x1 6. "AUTOREQ,If The CPU Sets This Bit The ReqPkt Bit Will Be Automatically Set When The RxPktRdy Bit Is Cleared." "0,1" newline bitfld.byte 0x1 5. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The RX Endpoint" "0,1" newline bitfld.byte 0x1 4. "PIDERROR,Indicates A PID Error In The Received Packet" "0,1" newline bitfld.byte 0x1 3. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode" "0,1" newline bitfld.byte 0x1 2. "DATATOGGLEWRTENABLE,The CPU Writes A 1 To This Bit To Enable The Current State Of The Endpoint 0 Data Toggle To Be Written" "0,1" newline bitfld.byte 0x1 1. "DATATOGGLE,When Read This Bit Indicates The Current State Of The Endpoint" "0,1" newline bitfld.byte 0x1 0. "INCOMPRX,This Bit Is Set In A High-Bandwidth Isochronous/Interrupt Transfer If The Packet In The Rx FIFO Is Incomplete" "0,1" group.byte 0x1017++0x0 line.byte 0x0 "RXCSRH_PERIPHERAL_EPX_MODE,ENDPOINTX Additional Control And Status Bits for RX Endpoint 0 Or Endpoint 1-15" bitfld.byte 0x0 7. "AUTOCLEAR,If The CPU Sets This Bit Then The RxPktRdy Bit Will Be Automatically Cleared Whean A Packet Of RxMaxP Bytes Has Benn Unloaded Froim The Rx FIFO" "0,1" newline bitfld.byte 0x0 6. "ISO,The CPU Sets This Bit To Enable the RX Endpoint For Isochronous Transfers" "0,1" newline bitfld.byte 0x0 5. "DMAREQENAB,The CPU Sets This Bit To Enable The DMA Request For The RX Endpoint" "0,1" newline bitfld.byte 0x0 4. "DISNYET,The CPU Sets This Bit To Disable The Sending Of NYET Handshakes" "0,1" newline bitfld.byte 0x0 3. "DMAREQMODE,The CPU Sets This Bit To Select DMA Request Mode" "0,1" newline bitfld.byte 0x0 0. "INCOMPRX,This Bit Is Set In A High-Bandwidth Isochronous/Interrupt Transfer If The Packet In The Rx FIFO Is Incomplete Because Parts Of The Data Were Not Received." "0,1" rgroup.word 0x1018++0x1 line.word 0x0 "RXCOUNT,ENDPOINTX Number Of Data Bytes In The Packet Currently In Line To Be Read From The RX FIFO." hexmask.word 0x0 0.--13. 1. "ENDPOINTRXCOUNT,Number Of Data Bytes In The Packet Currently In Line To Be Read From The RX FIFO." group.byte 0x101A++0x3 line.byte 0x0 "TXTYPE,ENDPOINTX Host Mode Only: Should Be Written With The Endpoint Number To Be Targeted By The Endpoint" bitfld.byte 0x0 6.--7. "SPEED,operating speed of the target device when the core is configured with the multipoint option: 00: unused (note: if selected the target will be assumed to be using the same connection speed as the core.) 01: high 10: full 11: low" "0: unused,1: high,2: Device In Full Speed,3: Device In Low Speed" newline bitfld.byte 0x0 4.--5. "PROTOCOL,the cpu should set this to select the required protocol for the tx endpoint 00: control 01: isochronous 10: bulk 11: interrupt" "0: control,1: isochronous,?,?" newline hexmask.byte 0x0 0.--3. 1. "ENDPOINTNUMBER,the cpu should set this value to the endpoint number contained in the tx endpoint descriptor" line.byte 0x1 "TXINTERVAL,ENDPOINTX Host Mode Only: Defines The Polling Interval For The Currently Selected TX Endpoint." hexmask.byte 0x1 0.--7. 1. "TXPOLLINGINTERVAL,polling interval" line.byte 0x2 "RXTYPE,ENDPOINTX Host Mode Only: Should Be Written With The Endpoint Number To Be Targeted By The Endpoint" bitfld.byte 0x2 6.--7. "SPEED,operating speed of the target device when the core is configured with the multipoint option: 00: unused (note: if selected the target will be assumed to be using the same connection speed as the core.) 01: high 10: full 11: low" "0: unused,1: high,?,?" newline bitfld.byte 0x2 4.--5. "PROTOCOL,the cpu should set this to select the required protocol for the rx endpoint 00: control 01: isochronous 10: bulk 11: interrupt" "0: control,1: isochronous,?,?" newline hexmask.byte 0x2 0.--3. 1. "ENDPOINTNUMBER,the cpu should set this value to the endpoint number contained in the rx endpoint descriptor returned to the musbmhdrc during device enumeration." line.byte 0x3 "RXINTERVAL,ENDPOINTX Host Mode Only: Defines The Polling Interval For The Currently Selected RX Endpoint." hexmask.byte 0x3 0.--7. 1. "RXPOLLINGINTERVAL,polling interval" rgroup.byte 0x101F++0x0 line.byte 0x0 "FIFOSIZE,ENDPOINTX Read Only Register That Returns The Sizes Of The FIFO's Associated With The Selected Additional TX/RX Endpoints. INDEX Regsiter should be set 1-15" hexmask.byte 0x0 4.--7. 1. "RXFIFOSIZE,Rx FIFO Size" newline hexmask.byte 0x0 0.--3. 1. "TXFIFOSIZE,Tx FIFO Size" repeat 8. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1020)++0x3 line.long 0x0 "FIFOX[$1],Address Range Provides 16 Addresses For CPU Access To The FIFO's For Each Endpoint" hexmask.long 0x0 0.--31. 1. "FIFOADDR,Writing To These Addresses Loads Data Into The TXFIFO For The Corresponding Endpoint" repeat.end group.byte 0x1060++0x3 line.byte 0x0 "DEVCTL,Selects Whether The Core Is Operating In Peripheral Or Host Mode" bitfld.byte 0x0 7. "BDEVICE,indicates whether the core is operating as a 'A' device or 'B' device" "0,1" newline bitfld.byte 0x0 6. "FSDEV,host mode only: this bit is set when a full or high speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 5. "LSDEV,host mode only: this bit is set when a low speed device has been detected being connected to the port" "0,1" newline bitfld.byte 0x0 3.--4. "VBUS,encoded value for the VBus level" "0: Below SessionEnd,1: Above SessionEnd below AValid,2: Above AValid below VBus Valid,3: Above VBusValid" newline bitfld.byte 0x0 2. "HOSTMODE,this read-only bit is set when the USBCORE is acting as a host" "0,1" newline bitfld.byte 0x0 1. "HOSTREQ,when set the USBCORE will initiate the host negotiation when suspend mode is entered." "0,1" newline bitfld.byte 0x0 0. "SESSION,when operating as an 'A' device this bit is set or cleared by CPU to state or end a session. when operating as a 'B' device this bit is set/cleared by the USBCORE when a session starts/ends" "0,1" line.byte 0x1 "MISC,RX/TX Early DMA Enable Bits" bitfld.byte 0x1 1. "TXEDMA,DMA_REQ signal for all IN endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all in endpoints will be..,1: Dma_req signal for all in endpoints will be.." newline bitfld.byte 0x1 0. "RXEDMA,DMA_REQ signal for all OUT endpoints will be deasserted based on this bit selection" "0: Dma_req signal for all out endpoints will be..,1: Dma_req signal for all out endpoints will be.." line.byte 0x2 "TXFIFOSZ,Controls The Size Of The Selected TX Endpoint FIFO" bitfld.byte 0x2 4. "DPB,double packet buffering supported or not" "0,1" newline hexmask.byte 0x2 0.--3. 1. "SZ,maximum packet size to be allowed" line.byte 0x3 "RXFIFOSZ,Controls The Size Of The Selected RX Endpoint FIFO" bitfld.byte 0x3 4. "DPB,double packet buffering enabled or not" "0,1" newline hexmask.byte 0x3 0.--3. 1. "SZ,maximum packet size to be allowed" group.word 0x1064++0x3 line.word 0x0 "TXFIFOADD,Controls The Start Address Of the Selected TX Endpoint FIFO" hexmask.word 0x0 0.--12. 1. "ADDR,start address of the endpoint FIFO" line.word 0x2 "RXFIFOADD,Controls The Start Address Of the Selected RX Endpoint FIFO" hexmask.word 0x2 0.--12. 1. "ADDR,start address of the endpoint FIFO" rgroup.byte 0x1078++0x1 line.byte 0x0 "EPINFO,Allows Read-Back Of The Number Of TX And RX Endpoints" hexmask.byte 0x0 4.--7. 1. "RXENDPOINTS,number of rx endpoints" newline hexmask.byte 0x0 0.--3. 1. "TXENDPOINTS,number of tx endpoints" line.byte 0x1 "RAMINFO,Details About Width Of RAM and DMA Channels" hexmask.byte 0x1 4.--7. 1. "DMACHANS,number of dma channels implemented in the design" newline hexmask.byte 0x1 0.--3. 1. "RAMBITS,width of the ram address bus" group.byte 0x107A++0x5 line.byte 0x0 "LINKINFO,Allows Some Delays To Be Specified" hexmask.byte 0x0 4.--7. 1. "WTCON,sets the wait to be applied to allow for the user's connect/disconnect filter in units of 533.3ns" newline hexmask.byte 0x0 0.--3. 1. "WTID,sets the delay to be applied from idpullup being asserted to iddig being considered valid in units of 4.369ms" line.byte 0x1 "VPLEN,Sets The Duration Of The VBus Pulsing Charge" hexmask.byte 0x1 0.--7. 1. "VPLEN,duration of VBus pulsing charge in units of 546.1us" line.byte 0x2 "HSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For HS Transactions" hexmask.byte 0x2 0.--7. 1. "HSEOF1,sets for high-speed transactions the time before eof to stop beginning new transactions in units of 133.3ns. (the default setting corresponds to 17.07us.)" line.byte 0x3 "FSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For FS Transactions" hexmask.byte 0x3 0.--7. 1. "FSEOF1,sets for full-speed transactions the time before eof to stop beginning new transactions in units of 533.3ns. (the default setting corresponds to 63.46us.)" line.byte 0x4 "LSEOF1,Sets The Minimum Time Gap That Is To Be Allowed Between The Start Of The Last Transaction And The EOF For LS Transactions" hexmask.byte 0x4 0.--7. 1. "LSEOF1,sets for low-speed transactions the time before eof to stop beginning new transactions in units of 1.067us. (the default setting corresponds to 121.6us.)" line.byte 0x5 "SOFTRST,Assert Low The Output Reset Signals NRSTO and NRSTXO" bitfld.byte 0x5 1. "NRSTX,when a 1 is written to this bit the output nrstxo will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrstxo will be asynchronously asserted and synchronously de-asserted with respect to xclk." "0,1" newline bitfld.byte 0x5 0. "NRST,when a 1 is written to this bit the output nrsto will be asserted (low) within a minimum delay of 7 cycles of the clk input. the output nrsto will be asynchronously asserted and synchronously de-asserted with respect to clk." "0,1" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F013080 ad:0x4F013088 ad:0x4F013090 ad:0x4F013098 ad:0x4F0130A0 ad:0x4F0130A8 ad:0x4F0130B0 ad:0x4F0130B8) tree "TXFUNADDR[$1]" base $2 group.byte ($2)++0x0 line.byte 0x0 "TXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x0 0.--6. 1. "TXFUNCADDR,address of the target function" group.byte ($2+0x2)++0x2 line.byte 0x0 "TXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "TXHUBADDR,hub address" line.byte 0x1 "TXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" line.byte 0x2 "RXFUNCADDREP,Relevant In Host Mode Only. Address Of The Target Function." hexmask.byte 0x2 0.--6. 1. "RXFUNCADDR,address of the target function" group.byte ($2+0x6)++0x1 line.byte 0x0 "RXHUBADDREP,Relevant In Host Mode Only. HUB Address" bitfld.byte 0x0 7. "MULTRANS,hub has multiple or single translator" "0,1" hexmask.byte 0x0 0.--6. 1. "RXHUBADDR,hub address" line.byte 0x1 "RXHUBPORT,Relevant In Host Mode Only. HUB Address" hexmask.byte 0x1 0.--6. 1. "HUBPORT,Hub Port" tree.end repeat.end base ad:0x4F012000 group.long 0x1200++0x3 line.long 0x0 "DMAINTR,DMA Interrupt Status for Each Channel" hexmask.long.byte 0x0 0.--7. 1. "DMAINTR,DMA Interrupt for each channel" repeat 8. (list 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7)(list ad:0x4F013204 ad:0x4F013214 ad:0x4F013224 ad:0x4F013234 ad:0x4F013244 ad:0x4F013254 ad:0x4F013264 ad:0x4F013274) tree "DMACNT[$1]" base $2 group.long ($2)++0xB line.long 0x0 "DMACNTL,DMA Transfer Control For Each Channel" bitfld.long 0x0 9.--10. "DMABRSTM,burst mode" "0: Burst Mode 0,1: Burst Mode 1,2: Burst Mode 2,3: Burst Mode 3" bitfld.long 0x0 8. "DMAERR,bus error bit" "0,1" hexmask.long.byte 0x0 4.--7. 1. "DMAEP,endpoint number this channel is assigned to" bitfld.long 0x0 3. "DMAIE,interrupt enable" "0,1" bitfld.long 0x0 2. "DMAMODE,transfer mode" "0: Mode 0 Transfer,1: Mode1 Transfer" bitfld.long 0x0 1. "DMADIR,transfer direction" "0: DMA Write (RX Endpoint),1: DMA Read (TX Endpoint)" bitfld.long 0x0 0. "DMAEN,dma transfer enable" "0,1" line.long 0x4 "DMAADDR,Memory Address Of The Corresponding DMA Channel" hexmask.long 0x4 2.--31. 1. "ADDR312,upper 30 bits of address" bitfld.long 0x4 0.--1. "ADDR10,Lower 2 bits of DMA memory address" "0,1,2,3" line.long 0x8 "DMACOUNT,Current DMA Count Of The Transfer" hexmask.long 0x8 0.--31. 1. "DMACOUNT,current dma count of the transfer" tree.end repeat.end base ad:0x4F012000 repeat 7. (increment 0x0 0x1)(increment 0x0 0x4) group.long ($2+0x1304)++0x3 line.long 0x0 "RQPKTCOUNT[$1],Host Mode Only: Used To Specify Number Of Packets That Are To Be Transaferred In A Block Transfer" hexmask.long.word 0x0 0.--15. 1. "RQPKTCOUNT,sets the number of packets of size maxp that are to be transferred in a block transfer. only used in host mode when autoreq is set. has no effect in peripheral mode or when autoreq is not set." repeat.end group.word 0x1340++0x9 line.word 0x0 "RXDPKTBUFDIS,Indicates Which Of The RX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x0 1.--15. 1. "EPxRXDIS,each bit indicates which of the Rx endpoint have disabled double buffer functionality" line.word 0x2 "TXDPKTBUFDIS,Indicates Which Of The TX Endpoints Have Disabled Double Packet Buffer Functionality" hexmask.word 0x2 1.--15. 1. "EPxTXDIS,each bit indicates which of the Tx endpoint have disabled double buffer functionality" line.word 0x4 "CTUCH,Chirp Timeout. Number Of XCLK Cycles Before The Timeout" hexmask.word 0x4 0.--15. 1. "CTUCH,this number when multiplied by 4 represents the number of xclk cycles before the timeout occurs" line.word 0x6 "CTHHSRTN,Sets The Delay From The End Of High-Speed Resume Signaling (Acting As A Host) To Enable The UTM Normal Operating Mode" hexmask.word 0x6 0.--15. 1. "CTHHSRTN,the delay from the end of high speed resume signaling to enabling utm normal operating mode." line.word 0x8 "CTHSBT,This Register Represents The Value To Be Added To The Minimum High Speed Timeout Period Of 736 Bit Times." hexmask.word.byte 0x8 0.--3. 1. "HSTMEOUTADD,this register represents the value to be added to the mimumum high speed timeout period of 736 bit times" group.word 0x1360++0x1 line.word 0x0 "LPMATTR,Defines The Attributes Of An LPM Transaction And Sleep Cycle." hexmask.word.byte 0x0 12.--15. 1. "ENDPOINT,this is the endpnt that in the token packet of the lpm transaction." newline bitfld.word 0x0 8. "RMTWAK,this bit is the remote wakeup enable bit." "0,1" newline hexmask.word.byte 0x0 4.--7. 1. "HIRD,this is the host initiated resume duration." newline hexmask.word.byte 0x0 0.--3. 1. "LINKSTATE,this value is provided by the host to the peripheral to indicate what state the peripheral must transition to after the receipt and acceptance of a lpm transaction." group.byte 0x1362++0x0 line.byte 0x0 "LPMCNTRL_HOST_MODE,LPM Control Register" bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate a resume from the l1 state" "0,1" newline bitfld.byte 0x0 0. "LPMXMT,software should set this bit to transmit an lpm transaction." "0,1" group.byte 0x1362++0x2 line.byte 0x0 "LPMCNTRL_PERIPHERAL_MODE,LPM Control Register" bitfld.byte 0x0 4. "LPMNAK,this bit is used to place all end points in a state such that the response to all transactions other then an lpm transaction will be a nak." "0,1" newline bitfld.byte 0x0 2.--3. "LPMEN,this register is used to enable lpm in the musbmhdrc." "0: Core supports LPM extended transactions,1: LPM is not supported but extended transactions..,2: LPM and extended transactions are not supported,3: LPM and extended transactions are not supported" newline bitfld.byte 0x0 1. "LPMRES,this bit is used by software to initiate resume (remote wakeup)." "0,1" newline bitfld.byte 0x0 0. "LPMXMT,this bit is set by software to instruct the core to transition to the l1 state upon the receipt of the next lpm transaction." "0,1" line.byte 0x1 "LPMINTREN,LPM Interrupts Enable Register" bitfld.byte 0x1 5. "LPMERREN,LPMERR interrupt" "0,1" newline bitfld.byte 0x1 4. "LPMRESEN,LPMRES interrupt" "0,1" newline bitfld.byte 0x1 3. "LPMNCEN,LPMNC interrupt" "0,1" newline bitfld.byte 0x1 2. "LPMACKEN,LPMACK interrupt" "0,1" newline bitfld.byte 0x1 1. "LPMNYEN,LPMMNY interrupt" "0,1" newline bitfld.byte 0x1 0. "LPMSTEN,LPMMST interrupt" "0,1" line.byte 0x2 "LPMINTR_HOST_MODE,Status Of The LPM Power State" bitfld.byte 0x2 5. "LPMERR,this bit is set if a response to the lpm transaction is received with a bit stuff error or a pid error" "0,1" newline bitfld.byte 0x2 4. "LPMRES,this bit is set when the core has been resumed for any reason." "0,1" newline bitfld.byte 0x2 3. "LPMNC,this bit is set when an lpm transaction has been transmitted and has failed to complete." "0,1" newline bitfld.byte 0x2 2. "LPMACK,this bit is set when an lpm transaction is transmitted and the device responds with an ack." "0,1" newline bitfld.byte 0x2 1. "LPMNY,this bit is set when an lpm transaction is transmitted and the device responds with a nyet." "0,1" newline bitfld.byte 0x2 0. "LPMST,this bit is set when an lpm transaction is transmitted and the device responds with a stall." "0,1" group.byte 0x1364++0x1 line.byte 0x0 "LPMINTR_PERIPHERAL_MODE,Status Of The LPM Power State" bitfld.byte 0x0 5. "LPMERR,this bit is set if an lpm transaction is received that has a linkstate field that is not supported" "0,1" newline bitfld.byte 0x0 4. "LPMRES,this bit is set if the core has been resumed for any reason." "0,1" newline bitfld.byte 0x0 3. "LPMNC,this bit is set when an lpm transaction is received and the core responds with a nyet due to data pending in the rx fifos." "0,1" newline bitfld.byte 0x0 2. "LPMACK,this bit is set when an lpm transaction is received and the core responds with an ack." "0,1" newline bitfld.byte 0x0 1. "LPMNY,this bit is set when an lpm transaction is received and the core responds with a nyet" "0,1" newline bitfld.byte 0x0 0. "LPMST,this bit is set when an lpm transaction is received and the core responds with a stall." "0,1" line.byte 0x1 "LPMFADDR,Function Address In LPM Payload" hexmask.byte 0x1 0.--6. 1. "FUNCADDR,function address that will be placed in the LPM payload" group.long 0x1500++0x2B line.long 0x0 "PHY00,USBHPHY Control Register." bitfld.long 0x0 5.--7. "RXPHSSEL,RX clock phase select" "0: Earliest phase,?,?,?,?,?,?,7: Latest phase" newline bitfld.long 0x0 3.--4. "SLEWRATE,adjust FS/LS slew rate" "0: Highest slew rate,1: Middle slew rate,2: Middle slew rate,3: Smallest slew rate" newline bitfld.long 0x0 0.--2. "PREEMP,enables pre-emphasis" "0: Enable pre-emphasis during SOF and EOP,1: Enable pre-emphasis during chirp,2: Enable pre-emphasis in non-chirp state,3: Always enable pre-emphasis,?,?,?,?" line.long 0x4 "PHY04,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SQUELCH210,Lower 3 bits of RX squelch trigger point configuration" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 4. "HIZ,Set D+/D- to a high impedence state" "0,1" newline bitfld.long 0x4 3. "RSVD0," "0,1" newline bitfld.long 0x4 0.--2. "TXPHSSEL,set the Tx clock phase select" "0,1,2,3,4,5,6,7" line.long 0x8 "PHY08,USBHPHY Control Register." hexmask.long.byte 0x8 1.--7. 1. "RSVD0," newline bitfld.long 0x8 0. "SQUELCH3,MSB of Squelch configuration" "0,1" line.long 0xC "PHY0C,USBHPHY Control Register." bitfld.long 0xC 5.--7. "TUNE210,Lower 3 bits for HS amplitude tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0xC 0.--4. 1. "RSVD0," line.long 0x10 "PHY10,USBHPHY Control Register." bitfld.long 0x10 5.--7. "DRVTUNE210,Lower 3 bits for HS/FS/LS driver strength tuning" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x10 0.--4. 1. "TUNE76543,Upper 5 bits for HS amplitude tuning" line.long 0x14 "PHY14,USBHPHY Control Register." bitfld.long 0x14 7. "ODT0,On die termination compensation voltage reference" "0,1" newline bitfld.long 0x14 4. "BYPSSSQUELCH,Bypass squelch trigger point configure in chirp mode" "0,1" newline bitfld.long 0x14 2.--3. "COMPBYPSS,Auto compensation bypass" "0,1,2,3" newline bitfld.long 0x14 0.--1. "DRVTUNE43,Upper 2 bits for HS/FS/LS driver strength tuning" "0,1,2,3" line.long 0x18 "PHY18,USBHPHY Control Register." hexmask.long.byte 0x18 2.--5. 1. "RSVD0," newline bitfld.long 0x18 0.--1. "ODT21,Upper 3 bits for on die termination compensation voltage reference" "0,1,2,3" line.long 0x1C "PHY1C,USBHPHY Control Register." bitfld.long 0x1C 7. "FSLSDIFF,Turn off FS/LS differential receiver in suspend mode" "0,1" newline hexmask.long.byte 0x1C 2.--6. 1. "RSVD1," newline bitfld.long 0x1C 1. "ODTBYPASS,ODT auto-refresh bypass" "0,1" newline bitfld.long 0x1C 0. "RSVD0," "0,1" line.long 0x20 "PHY20,USBHPHY Control Register." bitfld.long 0x20 6.--7. "HSSLEW10,Lower 2 bits for HS slew adjust rate" "0,1,2,3" newline hexmask.long.byte 0x20 0.--5. 1. "RSVD0," line.long 0x24 "PHY24,USBHPHY Control Register." bitfld.long 0x24 6.--7. "HSDRIVST10,HS transmit drive strength" "0,1,2,3" newline bitfld.long 0x24 3.--5. "HSPREEMPST,HS transmit pre emphasis strength" "0,1,2,3,4,5,6,7" newline bitfld.long 0x24 2. "RSVD0," "0,1" newline bitfld.long 0x24 0. "HSSLEW2,MSB of HS slew rate adjust" "0,1" line.long 0x28 "PHY28,USBHPHY Control Register." bitfld.long 0x28 5.--7. "HSDRVCOMP,HS drive current compensation voltage reference" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x28 1.--4. 1. "DISCONDET,HOST disconnects detection trigger point" newline bitfld.long 0x28 0. "HSDRIVST2,MSB of HS transmit driver strength" "0,1" group.long 0x1544++0xF line.long 0x0 "PHY44,USBHPHY Control Register." bitfld.long 0x0 7. "FRCSESSEND,force session end" "0,1" newline bitfld.long 0x0 4.--6. "RSVD1," "0,1,2,3,4,5,6,7" newline bitfld.long 0x0 3. "FRCVBUSVAL,Force output vbus_valid" "0,1" newline bitfld.long 0x0 2. "DIGDBG,Digital debug interface" "0,1" newline bitfld.long 0x0 1. "PLLDAMP,PLL damping factor" "0,1" newline bitfld.long 0x0 0. "RSVD0," "0,1" line.long 0x4 "PHY48,USBHPHY Control Register." bitfld.long 0x4 5.--7. "SESSENDTUNE,Session end reference tuning" "0,1,2,3,4,5,6,7" newline bitfld.long 0x4 3.--4. "RSVD0," "0,1,2,3" newline bitfld.long 0x4 2. "VBUSCHRGE,VBus charging/discharging bypass" "0,1" newline bitfld.long 0x4 1. "FRCBSESSVAL,force B_sessionvalid" "0,1" newline bitfld.long 0x4 0. "FRCASESSVAL,force A_sessionvalid" "0,1" line.long 0x8 "PHY4C,USBHPHY Control Register." bitfld.long 0x8 6.--7. "BSESSVALIDTUNE10,Lower 2 B_sessionvalid reference tune" "0,1,2,3" newline bitfld.long 0x8 3.--5. "RSVD0," "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "VBUSVALTUNE,VBus_valid reference tuning" "0,1,2,3,4,5,6,7" line.long 0xC "PHY50,USBHPHY Control Register." bitfld.long 0xC 5.--7. "COMPCURREF,Compensation current tuning reference" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 4. "RSVD0," "0,1" newline bitfld.long 0xC 1.--3. "ASESSVALIDTUNE,A_sessionvalid reference tune" "0,1,2,3,4,5,6,7" newline bitfld.long 0xC 0. "BSESSVALIDTUNE2,MSB of B_sessionvalid reference tune" "0,1" tree.end tree.end tree.end tree "WDT (Watchdog Timer)" base ad:0x44070000 group.byte 0x0++0x2 line.byte 0x0 "CTRLA,Control" bitfld.byte 0x0 7. "ALWAYSON,Always-On" "0,1" bitfld.byte 0x0 6. "RUNSTDBY,Run During Standby" "0,1" bitfld.byte 0x0 2. "WEN,Watchdog Timer Window Mode Enable" "0,1" bitfld.byte 0x0 1. "ENABLE,Enable" "0,1" line.byte 0x1 "CONFIG,Configuration" hexmask.byte 0x1 4.--7. 1. "WINDOW,Window Mode Time-Out Period" hexmask.byte 0x1 0.--3. 1. "PER,Time-Out Period" line.byte 0x2 "EWCTRL,Early Warning Interrupt Control" hexmask.byte 0x2 0.--3. 1. "EWOFFSET,Early Warning Interrupt Time Offset" group.byte 0x4++0x2 line.byte 0x0 "INTENCLR,Interrupt Enable Clear" bitfld.byte 0x0 0. "EW,Early Warning Interrupt Enable" "0,1" line.byte 0x1 "INTENSET,Interrupt Enable Set" bitfld.byte 0x1 0. "EW,Early Warning Interrupt Enable" "0,1" line.byte 0x2 "INTFLAG,Interrupt Flag Status and Clear" bitfld.byte 0x2 0. "EW,Early Warning" "0,1" rgroup.long 0x8++0x3 line.long 0x0 "SYNCBUSY,Synchronization Busy" bitfld.long 0x0 5. "CLEAR,Clear Synchronization Busy" "0,1" bitfld.long 0x0 4. "ALWAYSON,Always-On Synchronization Busy" "0,1" bitfld.long 0x0 3. "RUNSTDBY,Run During Standby Synchronization Busy" "0,1" bitfld.long 0x0 2. "WEN,Window Enable Synchronization Busy" "0,1" bitfld.long 0x0 1. "ENABLE,Enable Synchronization Busy" "0,1" wgroup.byte 0xC++0x0 line.byte 0x0 "CLEAR,Clear" hexmask.byte 0x0 0.--7. 1. "CLEAR,Watchdog Clear" tree.end AUTOINDENT.OFF